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Posted to notifications@mynewt.apache.org by "Fabio Utzig (JIRA)" <ji...@apache.org> on 2017/03/27 19:43:41 UTC

[jira] [Created] (MYNEWT-690) Create new port for RISC-V architecture and BSP for Hifive 1

Fabio Utzig created MYNEWT-690:
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             Summary: Create new port for RISC-V architecture and BSP for Hifive 1
                 Key: MYNEWT-690
                 URL: https://issues.apache.org/jira/browse/MYNEWT-690
             Project: Mynewt
          Issue Type: Task
          Components: BSP
            Reporter: Fabio Utzig
            Priority: Minor


The RISC-V architecture is a proper 100% open IP specification of CPU architecture. There are now commercial boards available that use the RISC-V core like the Sifive Hifive 1. Would be great adding a Mynewt port + BSP targetting this board.

Hifiv 1 board: https://dev.sifive.com/dev-kits/
RiSC-V specs: https://riscv.org/



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