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Posted to commits@nuttx.apache.org by "lipan118 (via GitHub)" <gi...@apache.org> on 2023/07/31 13:56:43 UTC
[GitHub] [nuttx] lipan118 opened a new pull request, #9977: Optimize stm32 RTC accuracy
lipan118 opened a new pull request, #9977:
URL: https://github.com/apache/nuttx/pull/9977
## Summary
Optimize stm32 RTC accuracy
## Impact
## Testing
chip
stm32f103ret6
board
et-stm32-stamp:nsh
config
CONFIG_RTC_DRIVER=y
CONFIG_STM32_BKP=y
CONFIG_STM32_PWR=y
CONFIG_STM32_RTC=y
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[GitHub] [nuttx] lipan118 commented on pull request #9977: Optimize stm32 RTC accuracy
Posted by "lipan118 (via GitHub)" <gi...@apache.org>.
lipan118 commented on PR #9977:
URL: https://github.com/apache/nuttx/pull/9977#issuecomment-1659396246
>
Due to the repeated initialization of RTC, restarting will cause the clock to lag for a few seconds.
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[GitHub] [nuttx] lipan118 commented on pull request #9977: Optimize stm32 RTC accuracy
Posted by "lipan118 (via GitHub)" <gi...@apache.org>.
lipan118 commented on PR #9977:
URL: https://github.com/apache/nuttx/pull/9977#issuecomment-1659396422
> @lipan118 can you please explain how this change affects the accuracy of the RTC?
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[GitHub] [nuttx] lipan118 commented on pull request #9977: Optimize stm32 RTC accuracy
Posted by "lipan118 (via GitHub)" <gi...@apache.org>.
lipan118 commented on PR #9977:
URL: https://github.com/apache/nuttx/pull/9977#issuecomment-1661397472
> @lipan118 thank you for your explanation, it now makes sense.
>
> However, maybe we should also check that ` RCC_BDCR_LSERDY` is set? What if the RTC is initialized, but for some reason (e.g. h/w fault), the clock stops? It will be impossible to be restart.
This process is implemented by default in the function void stm32_rcc_enablelse(void).
```
void stm32_rcc_enablelse(void)
{
/* The LSE is in the RTC domain and write access is denied to this domain
* after reset, you have to enable write access using DBP bit in the PWR CR
* register before to configuring the LSE.
*/
stm32_pwr_enablebkp(true);
#if defined(CONFIG_STM32_STM32L15XX)
/* Enable the External Low-Speed (LSE) oscillator by setting the LSEON bit
* the RCC CSR register.
*/
modifyreg32(STM32_RCC_CSR, 0, RCC_CSR_LSEON);
/* Wait for the LSE clock to be ready */
while ((getreg32(STM32_RCC_CSR) & RCC_CSR_LSERDY) == 0)
{
stm32_waste();
}
#else
/* Enable the External Low-Speed (LSE) oscillator by setting the LSEON bit
* the RCC BDCR register.
*/
modifyreg16(STM32_RCC_BDCR, 0, RCC_BDCR_LSEON);
/* Wait for the LSE clock to be ready */
while ((getreg16(STM32_RCC_BDCR) & RCC_BDCR_LSERDY) == 0)
{
stm32_waste();
}
#endif
/* Disable backup domain access if it was disabled on entry */
stm32_pwr_enablebkp(false);
}
```
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[GitHub] [nuttx] fjpanag commented on pull request #9977: Optimize stm32 RTC accuracy
Posted by "fjpanag (via GitHub)" <gi...@apache.org>.
fjpanag commented on PR #9977:
URL: https://github.com/apache/nuttx/pull/9977#issuecomment-1658556942
@lipan118 can you please explain how this change affects the accuracy of the RTC?
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[GitHub] [nuttx] fjpanag commented on pull request #9977: Optimize stm32 RTC accuracy
Posted by "fjpanag (via GitHub)" <gi...@apache.org>.
fjpanag commented on PR #9977:
URL: https://github.com/apache/nuttx/pull/9977#issuecomment-1661004908
@lipan118 thank you for your explanation, it now makes sense.
However, maybe we should also check that ` RCC_BDCR_LSERDY` is set?
What if the RTC is initialized, but for some reason (e.g. h/w fault), the clock stops? It will be impossible to be restart.
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[GitHub] [nuttx] lipan118 commented on pull request #9977: Optimize stm32 RTC accuracy
Posted by "lipan118 (via GitHub)" <gi...@apache.org>.
lipan118 commented on PR #9977:
URL: https://github.com/apache/nuttx/pull/9977#issuecomment-1659402384
> @lipan118 can you please explain how this change affects the accuracy of the RTC?
Refer to stm32 official example(AN2821) .
After I committed the last code, I started to pay attention to the accuracy and power consumption of RTC, during the process, I noticed that the RTC clock was constantly lagging, after reviewed the code, I found out that even though the RTC initialization was completed and the magic word existed in BKP, the RTC would still repeat the initialization, which was illogical, and after the modification, even if I rebooted the system, the clock would not occur After the modification, even if the system is restarted, the clock will not be lagged.
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[GitHub] [nuttx] raiden00pl merged pull request #9977: Optimize stm32 RTC accuracy
Posted by "raiden00pl (via GitHub)" <gi...@apache.org>.
raiden00pl merged PR #9977:
URL: https://github.com/apache/nuttx/pull/9977
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[GitHub] [nuttx] lipan118 closed pull request #9977: Optimize stm32 RTC accuracy
Posted by "lipan118 (via GitHub)" <gi...@apache.org>.
lipan118 closed pull request #9977: Optimize stm32 RTC accuracy
URL: https://github.com/apache/nuttx/pull/9977
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[GitHub] [nuttx] acassis commented on pull request #9977: Optimize stm32 RTC accuracy
Posted by "acassis (via GitHub)" <gi...@apache.org>.
acassis commented on PR #9977:
URL: https://github.com/apache/nuttx/pull/9977#issuecomment-1658563098
Thank you very much @lipan118 !
Could you please share some results before and after this patch?
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