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Posted to commits@nuttx.apache.org by ac...@apache.org on 2021/05/01 18:18:32 UTC

[incubator-nuttx] branch master updated: boards/arm/stm32/nucleo-f446re: added support for PWM

This is an automated email from the ASF dual-hosted git repository.

acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 2dcd41f  boards/arm/stm32/nucleo-f446re: added support for PWM
2dcd41f is described below

commit 2dcd41f2ab827992654372f6df831bb0999a9fac
Author: Michal Lenc <mi...@seznam.cz>
AuthorDate: Thu Apr 29 16:34:47 2021 +0200

    boards/arm/stm32/nucleo-f446re: added support for PWM
    
    Signed-off-by: Michal Lenc <mi...@seznam.cz>
---
 boards/arm/stm32/nucleo-f446re/README.txt          |  36 +++---
 .../arm/stm32/nucleo-f446re/configs/pwm/defconfig  |  60 ++++++++++
 boards/arm/stm32/nucleo-f446re/include/board.h     |   3 +
 boards/arm/stm32/nucleo-f446re/src/Make.defs       |   4 +
 boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h |  15 +++
 boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c |  10 ++
 boards/arm/stm32/nucleo-f446re/src/stm32_pwm.c     | 132 +++++++++++++++++++++
 7 files changed, 245 insertions(+), 15 deletions(-)

diff --git a/boards/arm/stm32/nucleo-f446re/README.txt b/boards/arm/stm32/nucleo-f446re/README.txt
index 8fd031d..8acb8c1 100644
--- a/boards/arm/stm32/nucleo-f446re/README.txt
+++ b/boards/arm/stm32/nucleo-f446re/README.txt
@@ -559,21 +559,6 @@ Configurations
     Functionality of CAN driver can be tested by calling application
     "can" in NuttShell. This application sends 100 messages over CAN 1.
 
-  lcd:
-  ----
-    This is basically an nsh configuration (see above) with added support
-    of ILI9225 176x220 TFT display and test framebuffer application.
-
-    Display connection is set to SPI 3 and pinout is following:
-
-    CS    D8
-    RST   D6
-    RS    D7
-    SDA   D4
-    CLK   D3
-
-    Framebuffer application can be started from terminal by typing "fb".
-
   ihm08m1_f32 and ihm08m1_b16:
   ----------------------------
 
@@ -637,3 +622,24 @@ Configurations
     VBUS_RATIO   = 1/VBUS_gain      = 19.152
 
     For now only 3-shunt resistors configuration is supported.
+
+  lcd:
+  ----
+    This is basically an nsh configuration (see above) with added support
+    of ILI9225 176x220 TFT display and test framebuffer application.
+
+    Display connection is set to SPI 3 and pinout is following:
+
+    CS    D8
+    RST   D6
+    RS    D7
+    SDA   D4
+    CLK   D3
+
+    Framebuffer application can be started from terminal by typing "fb".
+
+  pwm:
+  ----
+  This is an nsh configuration (see above) with added capability of pulse width
+  modulation. PWM output is on Timer 3 channel 1, which is pin PA_6 (D12) on
+  Nucleo board. Example program can be stared by "pwm" command.
diff --git a/boards/arm/stm32/nucleo-f446re/configs/pwm/defconfig b/boards/arm/stm32/nucleo-f446re/configs/pwm/defconfig
new file mode 100644
index 0000000..45caa56
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f446re/configs/pwm/defconfig
@@ -0,0 +1,60 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_FPU is not set
+# CONFIG_NSH_ARGCAT is not set
+# CONFIG_NSH_CMDOPT_HEXDUMP is not set
+# CONFIG_NSH_CMDPARMS is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_STM32_FLASH_PREFETCH is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-f446re"
+CONFIG_ARCH_BOARD_NUCLEO_F446RE=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32F446R=y
+CONFIG_ARCH_INTERRUPTSTACK=2048
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LATE_INITIALIZE=y
+CONFIG_BOARD_LOOPSPERMSEC=8499
+CONFIG_BUILTIN=y
+CONFIG_EXAMPLES_PWM=y
+CONFIG_EXAMPLES_PWM_DEVPATH="/dev/pwm2"
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MAX_TASKS=16
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_PWM=y
+CONFIG_RAM_SIZE=131072
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_START_DAY=14
+CONFIG_START_MONTH=10
+CONFIG_START_YEAR=2014
+CONFIG_STM32_CRC=y
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_OTGFS=y
+CONFIG_STM32_PWR=y
+CONFIG_STM32_TIM3=y
+CONFIG_STM32_TIM3_CH1OUT=y
+CONFIG_STM32_TIM3_PWM=y
+CONFIG_STM32_USART2=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_TESTING_OSTEST=y
+CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/arm/stm32/nucleo-f446re/include/board.h b/boards/arm/stm32/nucleo-f446re/include/board.h
index f7d9a69..d5b48be 100644
--- a/boards/arm/stm32/nucleo-f446re/include/board.h
+++ b/boards/arm/stm32/nucleo-f446re/include/board.h
@@ -380,6 +380,9 @@
 #define GPIO_TIM2_CH1IN (GPIO_TIM2_CH1IN_1 | GPIO_PULLUP)
 #define GPIO_TIM2_CH2IN (GPIO_TIM2_CH2IN_1 | GPIO_PULLUP)
 
+/* TIM3 configuration *******************************************************/
+#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1
+
 #ifdef CONFIG_BOARD_STM32_IHM08M1
 
 /* Configuration specific to the X-NUCLEO-IHM08M1 expansion board with
diff --git a/boards/arm/stm32/nucleo-f446re/src/Make.defs b/boards/arm/stm32/nucleo-f446re/src/Make.defs
index 34acbcb..736ef6b 100644
--- a/boards/arm/stm32/nucleo-f446re/src/Make.defs
+++ b/boards/arm/stm32/nucleo-f446re/src/Make.defs
@@ -49,6 +49,10 @@ ifeq ($(CONFIG_CAN),y)
 CSRCS += stm32_can.c
 endif
 
+ifeq ($(CONFIG_STM32_PWM),y)
+CSRCS += stm32_pwm.c
+endif
+
 ifeq ($(CONFIG_LIB_BOARDCTL),y)
 CSRCS += stm32_appinit.c
 endif
diff --git a/boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h b/boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h
index cd15cae..d8b0a3c 100644
--- a/boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h
+++ b/boards/arm/stm32/nucleo-f446re/src/nucleo-f446re.h
@@ -330,4 +330,19 @@ int board_ajoy_initialize(void);
 int stm32_foc_setup(void);
 #endif
 
+/****************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ * Return Value:
+ *   OK on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
 #endif /* __BOARDS_ARM_STM32_NUCLEO_F401RE_SRC_NUCLEO_F446RE_H */
diff --git a/boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c b/boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c
index e0684fc..fce98f1 100644
--- a/boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c
+++ b/boards/arm/stm32/nucleo-f446re/src/stm32_bringup.c
@@ -182,5 +182,15 @@ int stm32_bringup(void)
     }
 #endif
 
+#ifdef CONFIG_PWM
+  /* Initialize PWM and register the PWM device */
+
+  ret = stm32_pwm_setup();
+  if (ret < 0)
+    {
+      syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+    }
+#endif
+
   return ret;
 }
diff --git a/boards/arm/stm32/nucleo-f446re/src/stm32_pwm.c b/boards/arm/stm32/nucleo-f446re/src/stm32_pwm.c
new file mode 100644
index 0000000..ee2c0de
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f446re/src/stm32_pwm.c
@@ -0,0 +1,132 @@
+/****************************************************************************
+ * boards/arm/stm32/nucleo-f446re/src/stm32_pwm.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+#include <debug.h>
+#include <sys/types.h>
+
+#include <nuttx/board.h>
+#include <nuttx/timers/pwm.h>
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "arm_arch.h"
+#include "stm32_pwm.h"
+#include "nucleo-f446re.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ *   Initialize PWM and register the PWM device.
+ *
+ * Return Value:
+ *   OK on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int stm32_pwm_setup(void)
+{
+#ifdef CONFIG_PWM
+  struct pwm_lowerhalf_s *pwm;
+  int ret;
+
+  /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+#if defined(CONFIG_STM32_TIM1_PWM)
+  pwm = stm32_pwminitialize(1);
+  if (!pwm)
+    {
+      pwmerr("ERROR: Failed to get the STM32 PWM lower half\n");
+      return -ENODEV;
+    }
+
+  ret = pwm_register("/dev/pwm0", pwm);
+  if (ret < 0)
+    {
+      pwmerr("ERROR: pwm_register failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#if defined(CONFIG_STM32_TIM2_PWM)
+  pwm = stm32_pwminitialize(2);
+  if (!pwm)
+    {
+      pwmerr("ERROR: Failed to get the STM32 PWM lower half\n");
+      return -ENODEV;
+    }
+
+  ret = pwm_register("/dev/pwm1", pwm);
+  if (ret < 0)
+    {
+      pwmerr("ERROR: pwm_register failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#if defined(CONFIG_STM32_TIM3_PWM)
+  pwm = stm32_pwminitialize(3);
+  if (!pwm)
+    {
+      pwmerr("ERROR: Failed to get the STM32 PWM lower half\n");
+      return -ENODEV;
+    }
+
+  ret = pwm_register("/dev/pwm2", pwm);
+  if (ret < 0)
+    {
+      pwmerr("ERROR: pwm_register failed: %d\n", ret);
+      return ret;
+    }
+#endif
+
+#if defined(CONFIG_STM32_TIM4_PWM)
+  pwm = stm32_pwminitialize(4);
+  if (!pwm)
+    {
+      pwmerr("ERROR: Failed to get the STM32 PWM lower half\n");
+      return -ENODEV;
+    }
+
+  ret = pwm_register("/dev/pwm3", pwm);
+  if (ret < 0)
+    {
+      pwmerr("ERROR: pwm_register failed: %d\n", ret);
+      return ret;
+    }
+
+#endif
+
+  return OK;
+#else
+  return -ENODEV;
+#endif
+}