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Posted to commits@mynewt.apache.org by an...@apache.org on 2018/11/23 16:16:41 UTC
[mynewt-core] 09/26: [wip] hw/mcu/nordic: Add bus driver support to
nrf52xxx
This is an automated email from the ASF dual-hosted git repository.
andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit da8ed7acc2357af67ac6057779055b1a569a3479
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Thu Nov 8 17:30:48 2018 +0100
[wip] hw/mcu/nordic: Add bus driver support to nrf52xxx
---
hw/mcu/nordic/nrf52xxx/pkg.yml | 4 ++++
hw/mcu/nordic/nrf52xxx/src/nrf52_periph.c | 19 +++++++++++++++++++
2 files changed, 23 insertions(+)
diff --git a/hw/mcu/nordic/nrf52xxx/pkg.yml b/hw/mcu/nordic/nrf52xxx/pkg.yml
index 7b11033..63c0fd2 100644
--- a/hw/mcu/nordic/nrf52xxx/pkg.yml
+++ b/hw/mcu/nordic/nrf52xxx/pkg.yml
@@ -75,3 +75,7 @@ pkg.deps.I2C_0:
pkg.deps.I2C_1:
- "@apache-mynewt-core/hw/bus"
- "@apache-mynewt-core/hw/bus/i2c"
+
+pkg.deps.SPI_1_MASTER:
+ - "@apache-mynewt-core/hw/bus"
+ - "@apache-mynewt-core/hw/bus/spi"
diff --git a/hw/mcu/nordic/nrf52xxx/src/nrf52_periph.c b/hw/mcu/nordic/nrf52xxx/src/nrf52_periph.c
index 56887b4..0aaacd7 100644
--- a/hw/mcu/nordic/nrf52xxx/src/nrf52_periph.c
+++ b/hw/mcu/nordic/nrf52xxx/src/nrf52_periph.c
@@ -28,6 +28,10 @@
#include "bus/bus.h"
#include "bus/i2c.h"
#endif
+#if MYNEWT_VAL(SPI_1_MASTER)
+#include "bus/bus.h"
+#include "bus/spi.h"
+#endif
#include "nrfx.h"
#if MYNEWT_VAL(ADC_0)
#include "adc/adc.h"
@@ -139,6 +143,15 @@ static const struct nrf52_hal_spi_cfg os_bsp_spi0s_cfg = {
};
#endif
#if MYNEWT_VAL(SPI_1_MASTER)
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+static const struct bus_spi_dev_cfg spi1_cfg = {
+ .spi_num = 1,
+ .pin_sck = MYNEWT_VAL(SPI_1_MASTER_PIN_SCK),
+ .pin_mosi = MYNEWT_VAL(SPI_1_MASTER_PIN_MOSI),
+ .pin_miso = MYNEWT_VAL(SPI_1_MASTER_PIN_MISO),
+};
+static struct bus_spi_dev spi1_bus;
+#else
static const struct nrf52_hal_spi_cfg os_bsp_spi1m_cfg = {
.sck_pin = MYNEWT_VAL(SPI_1_MASTER_PIN_SCK),
.mosi_pin = MYNEWT_VAL(SPI_1_MASTER_PIN_MOSI),
@@ -146,6 +159,7 @@ static const struct nrf52_hal_spi_cfg os_bsp_spi1m_cfg = {
/* For SPI master, SS pin is controlled as regular GPIO */
};
#endif
+#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
static const struct nrf52_hal_spi_cfg os_bsp_spi1s_cfg = {
.sck_pin = MYNEWT_VAL(SPI_1_SLAVE_PIN_SCK),
@@ -336,9 +350,14 @@ nrf52_periph_create_spi(void)
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_MASTER)
+#if MYNEWT_VAL(BUS_DRIVER_PRESENT)
+ rc = bus_spi_dev_create("spi1", &spi1_bus, (struct bus_spi_dev_cfg *)&spi1_cfg);
+ assert(rc == 0);
+#else
rc = hal_spi_init(1, (void *)&os_bsp_spi1m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
+#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);