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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/12/23 12:55:27 UTC

[incubator-nuttx] branch master updated: risc-v/mpfs: update m100pfsevp board info

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 509350a  risc-v/mpfs: update m100pfsevp board info
509350a is described below

commit 509350a61410eba6087df731e2f949f763cf374e
Author: Eero Nurkkala <ee...@offcode.fi>
AuthorDate: Thu Dec 23 13:05:09 2021 +0200

    risc-v/mpfs: update m100pfsevp board info
    
    Update the cache settings for the Aries m100pfsevp board. This
    assigns scratchpad ways for this board as well, as seen in the
    commit 491ae6c.
    
    Signed-off-by: Eero Nurkkala <ee...@offcode.fi>
---
 .../mpfs/m100pfsevp/include/board_liberodefs.h     | 34 +++++++++++-----------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h b/boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h
index 9759501..798ffa8 100644
--- a/boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h
+++ b/boards/risc-v/mpfs/m100pfsevp/include/board_liberodefs.h
@@ -591,23 +591,23 @@
 
 /* Cache settings */
 
-#define LIBERO_SETTING_WAY_MASK_DMA          0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_0  0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_1  0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_2  0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_3  0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_E51_DCACHE   0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_E51_ICACHE   0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_U54_1_DCACHE 0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_U54_1_ICACHE 0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_U54_2_DCACHE 0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_U54_2_ICACHE 0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_U54_3_DCACHE 0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_U54_3_ICACHE 0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_U54_4_DCACHE 0x0000ffff
-#define LIBERO_SETTING_WAY_MASK_U54_4_ICACHE 0x0000ffff
-#define LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS  0x00000000
+#define LIBERO_SETTING_WAY_MASK_DMA          0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_0  0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_1  0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_2  0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_AXI4_PORT_3  0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_E51_DCACHE   0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_E51_ICACHE   0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_U54_1_DCACHE 0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_U54_1_ICACHE 0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_U54_2_DCACHE 0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_U54_2_ICACHE 0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_U54_3_DCACHE 0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_U54_3_ICACHE 0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_U54_4_DCACHE 0x0000f0ff
+#define LIBERO_SETTING_WAY_MASK_U54_4_ICACHE 0x0000f0ff
+#define LIBERO_SETTING_NUM_SCRATCH_PAD_WAYS  0x00000004
 #define LIBERO_SETTING_L2_SHUTDOWN_CR        0x00000000
-#define LIBERO_SETTING_WAY_ENABLE            0x00000007
+#define LIBERO_SETTING_WAY_ENABLE            0x0000000b
 
 #endif /* __BOARDS_RISCV_MPFS_M100PFSEVP_INCLUDE_BOARD_LIBERODEFS_H */