[GitHub] [tvm] csullivan commented on a diff in pull request #13349: [TIR][Hexagon] Add vtcm memory capacity verification for Hexagon target

[GitBox <gi...@apache.org>]

csullivan commented on code in PR #13349:
URL: https://github.com/apache/tvm/pull/13349#discussion_r1023063919


##########
src/meta_schedule/postproc/verify_vtcm_limit.cc:
##########
@@ -0,0 +1,101 @@
+/*
+ * Licensed to the Apache Software Foundation (ASF) under one
+ * or more contributor license agreements.  See the NOTICE file
+ * distributed with this work for additional information
+ * regarding copyright ownership.  The ASF licenses this file
+ * to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance
+ * with the License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing,
+ * software distributed under the License is distributed on an
+ * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+ * KIND, either express or implied.  See the License for the
+ * specific language governing permissions and limitations
+ * under the License.
+ */
+#include <tvm/tir/transform.h>
+
+#include "../utils.h"
+
+namespace tvm {
+namespace meta_schedule {
+
+/*! \brief Verify the correctness of the generated Hexagon code. */
+class VerifyVTCMLimitNode : public PostprocNode {
+ public:
+  int64_t vtcm_capacity = 0;
+
+  void InitializeWithTuneContext(const TuneContext& context) final {
+    ICHECK(context->target.defined());
+    Target target = context->target.value();
+    vtcm_capacity = target->GetAttr<Integer>("vtcm-capacity").value().IntValue();
+  }
+
+  bool Verify(const IRModule& mod) const {
+    for (const auto& kv : mod->functions) {
+      if (auto* n = kv.second.as<tir::PrimFuncNode>()) {
+        auto func = GetRef<tir::PrimFunc>(n);
+        auto sizes = CalculateAllocatedBytes(func);
+        const auto vtcm_allocated = sizes.Get("global.vtcm").value_or(0);
+        if (vtcm_capacity > 0 && vtcm_allocated.IntValue() > vtcm_capacity) {
+          return false;
+        }
+      }
+    }
+    return true;
+  }
+
+  bool Apply(const tir::Schedule& sch) final {
+    IRModule mod = sch->mod();
+    for (const auto& kv : mod->functions) {
+      const GlobalVar& g_var = kv.first;
+      const BaseFunc& base_func = kv.second;
+      if (const auto* prim_func = base_func.as<tir::PrimFuncNode>()) {
+        IRModule lowered{nullptr};
+        try {
+          auto pass_list = Array<tvm::transform::Pass>();

Review Comment:
   We'll need to include a set of passes here that reproduces the standard lowering in TIR including the new `VerifyVTCMLimit` in order to actually exclude bad samples in the search. 



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