You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@mynewt.apache.org by "kasjer (via GitHub)" <gi...@apache.org> on 2023/01/25 13:55:16 UTC
[GitHub] [mynewt-core] kasjer opened a new pull request, #2931: mcu/fe310: Export SystemCoreClock variable
kasjer opened a new pull request, #2931:
URL: https://github.com/apache/mynewt-core/pull/2931
This does not change anything special it just exports SystemCoreClock that matches name commonly used in ARM builds.
Old cpu_freq value was local declaration so there is no risk of breaking anything.
Since there is no common way defined by mynewt for application to get system clock frequency fe310 adopts convention used by ARM code.
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: commits-unsubscribe@mynewt.apache.org
For queries about this service, please contact Infrastructure at:
users@infra.apache.org
[GitHub] [mynewt-core] kasjer merged pull request #2931: mcu/fe310: Export SystemCoreClock variable
Posted by "kasjer (via GitHub)" <gi...@apache.org>.
kasjer merged PR #2931:
URL: https://github.com/apache/mynewt-core/pull/2931
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: commits-unsubscribe@mynewt.apache.org
For queries about this service, please contact Infrastructure at:
users@infra.apache.org
[GitHub] [mynewt-core] apache-mynewt-bot commented on pull request #2931: mcu/fe310: Export SystemCoreClock variable
Posted by "apache-mynewt-bot (via GitHub)" <gi...@apache.org>.
apache-mynewt-bot commented on PR #2931:
URL: https://github.com/apache/mynewt-core/pull/2931#issuecomment-1403664646
<!-- style-bot -->
## Style check summary
### Our coding style is [here!](https://github.com/apache/mynewt-core/blob/master/CODING_STANDARDS.md)
#### hw/mcu/sifive/fe310/src/sys_clock.c
<details>
```diff
@@ -43,44 +43,44 @@
* correctly for baudrate 125000 not 115200.
*/
const clock_config_t
-HFROSC = { 82000000, 0, 0, 0, 0, 0, 0, 1, 0}; /* HFROSC */
+ HFROSC = { 82000000, 0, 0, 0, 0, 0, 0, 1, 0}; /* HFROSC */
const clock_config_t
-HFROSC_DIV_2 = { 41000000, 0, 0, 1, 0, 0, 0, 1, 0}; /* HFROSC / 2 */
+ HFROSC_DIV_2 = { 41000000, 0, 0, 1, 0, 0, 0, 1, 0}; /* HFROSC / 2 */
const clock_config_t
-HFROSC_DIV_3 = { 27300000, 0, 0, 2, 0, 0, 0, 1, 0}; /* HFROSC / 3 */
+ HFROSC_DIV_3 = { 27300000, 0, 0, 2, 0, 0, 0, 1, 0}; /* HFROSC / 3 */
const clock_config_t
-HFROSC_DIV_4 = { 21000000, 0, 0, 3, 0, 0, 0, 1, 0}; /* HFROSC / 4 */
+ HFROSC_DIV_4 = { 21000000, 0, 0, 3, 0, 0, 0, 1, 0}; /* HFROSC / 4 */
const clock_config_t
-HFROSC_DIV_6 = { 14000000, 0, 0, 5, 0, 0, 0, 1, 0}; /* HFROSC / 6 */
+ HFROSC_DIV_6 = { 14000000, 0, 0, 5, 0, 0, 0, 1, 0}; /* HFROSC / 6 */
const clock_config_t
-HFROSC_DIV_12 = { 7000000, 0, 0, 11, 0, 0, 0, 1, 0}; /* HFROSC / 12 */
+ HFROSC_DIV_12 = { 7000000, 0, 0, 11, 0, 0, 0, 1, 0}; /* HFROSC / 12 */
const clock_config_t
-HFROSC_DIV_24 = { 4000000, 0, 0, 23, 0, 0, 0, 1, 0}; /* HFROSC / 24 */
+ HFROSC_DIV_24 = { 4000000, 0, 0, 23, 0, 0, 0, 1, 0}; /* HFROSC / 24 */
const clock_config_t
-HFROSC_DIV_36 = { 3000000, 0, 0, 35, 0, 0, 0, 1, 0}; /* HFROSC / 36 */
+ HFROSC_DIV_36 = { 3000000, 0, 0, 35, 0, 0, 0, 1, 0}; /* HFROSC / 36 */
const clock_config_t
-HFROSC_DIV_64 = { 1250000, 0, 0, 63, 0, 0, 0, 1, 0}; /* HFROSC / 64 */
+ HFROSC_DIV_64 = { 1250000, 0, 0, 63, 0, 0, 0, 1, 0}; /* HFROSC / 64 */
const clock_config_t
-HFXOSC_PLL_320_MHZ = {320000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(80), PLL_DIVQ(2), 1, 0}; /* 320 MHz */
+ HFXOSC_PLL_320_MHZ = {320000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(80), PLL_DIVQ(2), 1, 0};/* 320 MHz */
const clock_config_t
-HFXOSC_PLL_256_MHZ = {256000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(64), PLL_DIVQ(2), 1, 0}; /* 256 MHz */
+ HFXOSC_PLL_256_MHZ = {256000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(64), PLL_DIVQ(2), 1, 0};/* 256 MHz */
const clock_config_t
-HFXOSC_PLL_128_MHZ = {128000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(64), PLL_DIVQ(4), 1, 0}; /* 128 MHz */
+ HFXOSC_PLL_128_MHZ = {128000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(64), PLL_DIVQ(4), 1, 0};/* 128 MHz */
const clock_config_t
-HFXOSC_PLL_64_MHZ = { 64000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(64), PLL_DIVQ(8), 1, 0}; /* 64 MHz */
+ HFXOSC_PLL_64_MHZ = { 64000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(64), PLL_DIVQ(8), 1, 0};/* 64 MHz */
const clock_config_t
-HFXOSC_PLL_32_MHZ = { 32000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(64), PLL_DIVQ(8), 0, 0}; /* 32 MHz */
+ HFXOSC_PLL_32_MHZ = { 32000000, 1, 1, 4, PLL_DIVR(2), PLL_MULF(64), PLL_DIVQ(8), 0, 0};/* 32 MHz */
const clock_config_t
-HFXOSC_16_MHZ = { 16000000, 1, 0, 0, 0, 0, 0, 1, 0}; /* 16 MHz */
+ HFXOSC_16_MHZ = { 16000000, 1, 0, 0, 0, 0, 0, 1, 0}; /* 16 MHz */
const clock_config_t
-HFXOSC_8_MHZ = { 8000000, 1, 0, 0, 0, 0, 0, 0, 0}; /* 8 MHz */
+ HFXOSC_8_MHZ = { 8000000, 1, 0, 0, 0, 0, 0, 0, 0}; /* 8 MHz */
const clock_config_t
-HFXOSC_4_MHZ = { 4000000, 1, 0, 0, 0, 0, 0, 0, 1}; /* 4 MHz */
+ HFXOSC_4_MHZ = { 4000000, 1, 0, 0, 0, 0, 0, 0, 1}; /* 4 MHz */
const clock_config_t
-HFXOSC_2_MHZ = { 2000000, 1, 0, 0, 0, 0, 0, 0, 3}; /* 2 MHz */
+ HFXOSC_2_MHZ = { 2000000, 1, 0, 0, 0, 0, 0, 0, 3}; /* 2 MHz */
const clock_config_t
-HFXOSC_1_MHZ = { 1000000, 1, 0, 0, 0, 0, 0, 0, 7}; /* 1 MHz */
+ HFXOSC_1_MHZ = { 1000000, 1, 0, 0, 0, 0, 0, 0, 7}; /* 1 MHz */
uint32_t SystemCoreClock;
@@ -112,9 +112,9 @@
{
if (!SystemCoreClock) {
- // warm up I$
+ /* warm up I$ */
measure_cpu_freq(1);
- // measure for real
+ /* measure for real */
SystemCoreClock = measure_cpu_freq(10);
}
```
</details>
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: commits-unsubscribe@mynewt.apache.org
For queries about this service, please contact Infrastructure at:
users@infra.apache.org