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Posted to commits@nuttx.apache.org by ac...@apache.org on 2026/10/13 18:23:07 UTC
(nuttx) 24/30: boards/arm/stm32u5: add TIM8 and TIM17 input clocks

This is an automated email from the ASF dual-hosted git repository.

acassis pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git

commit 8ecf3d4f4369261f6dad3a3502a702eefb3e09b5
Author: raiden00pl <ra...@railab.me>
AuthorDate: Sat Oct 10 15:29:02 2026 +0200

    boards/arm/stm32u5: add TIM8 and TIM17 input clocks
    
    Add the missing TIM8 and TIM17 input clock definitions to the U5 boards
    so these timers can be enabled.
    
    Signed-off-by: raiden00pl <ra...@railab.me>
    Assisted-by: Claude Code
---
 boards/arm/stm32u5/b-u585i-iot02a/include/board.h  | 4 +++-
 boards/arm/stm32u5/nucleo-u5a5zj-q/include/board.h | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/boards/arm/stm32u5/b-u585i-iot02a/include/board.h b/boards/arm/stm32u5/b-u585i-iot02a/include/board.h
index 3706b2938b8..9380214c345 100644
--- a/boards/arm/stm32u5/b-u585i-iot02a/include/board.h
+++ b/boards/arm/stm32u5/b-u585i-iot02a/include/board.h
@@ -115,8 +115,10 @@
 #define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY / 1)
 
 #define STM32_TIM1_CLKIN   (STM32_PCLK2_FREQUENCY)
+#define STM32_TIM8_CLKIN   (STM32_PCLK2_FREQUENCY)
 #define STM32_TIM15_CLKIN  (STM32_PCLK2_FREQUENCY)
 #define STM32_TIM16_CLKIN  (STM32_PCLK2_FREQUENCY)
+#define STM32_TIM17_CLKIN  (STM32_PCLK2_FREQUENCY)
 
 /* Configure the APB3 prescaler */
 
@@ -126,7 +128,7 @@
 /* The timer clock frequencies are automatically defined by hardware.  If the
  * APB prescaler equals 1, the timer clock frequencies are set to the same
  * frequency as that of the APB domain. Otherwise they are set to twice.
- * Note: TIM1,15,16 are on APB2, others on APB1
+ * Note: TIM1,8,15,16,17 are on APB2, others on APB1
  */
 
 #define STM32_LPTIM1_CLKIN      STM32_HCLK_FREQUENCY
diff --git a/boards/arm/stm32u5/nucleo-u5a5zj-q/include/board.h b/boards/arm/stm32u5/nucleo-u5a5zj-q/include/board.h
index 20bf65e7f10..f29e78fdbd0 100644
--- a/boards/arm/stm32u5/nucleo-u5a5zj-q/include/board.h
+++ b/boards/arm/stm32u5/nucleo-u5a5zj-q/include/board.h
@@ -115,8 +115,10 @@
 #define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY / 1)
 
 #define STM32_TIM1_CLKIN   (STM32_PCLK2_FREQUENCY)
+#define STM32_TIM8_CLKIN   (STM32_PCLK2_FREQUENCY)
 #define STM32_TIM15_CLKIN  (STM32_PCLK2_FREQUENCY)
 #define STM32_TIM16_CLKIN  (STM32_PCLK2_FREQUENCY)
+#define STM32_TIM17_CLKIN  (STM32_PCLK2_FREQUENCY)
 
 /* Configure the APB3 prescaler */
 
@@ -126,7 +128,7 @@
 /* The timer clock frequencies are automatically defined by hardware.  If the
  * APB prescaler equals 1, the timer clock frequencies are set to the same
  * frequency as that of the APB domain. Otherwise they are set to twice.
- * Note: TIM1,15,16 are on APB2, others on APB1
+ * Note: TIM1,8,15,16,17 are on APB2, others on APB1
  */
 
 #define STM32_LPTIM1_CLKIN      STM32_HCLK_FREQUENCY