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Posted to issues@trafficserver.apache.org by "Leif Hedstrom (JIRA)" <ji...@apache.org> on 2015/03/31 03:39:53 UTC
[jira] [Reopened] (TS-3471) ats source code at
iocore/cache/P_CacheInternal.h
[ https://issues.apache.org/jira/browse/TS-3471?page=com.atlassian.jira.plugin.system.issuetabpanels:all-tabpanel ]
Leif Hedstrom reopened TS-3471:
-------------------------------
> ats source code at iocore/cache/P_CacheInternal.h
> -------------------------------------------------
>
> Key: TS-3471
> URL: https://issues.apache.org/jira/browse/TS-3471
> Project: Traffic Server
> Issue Type: Wish
> Components: Cache
> Affects Versions: 5.2.0
> Reporter: daemon
>
> path:
> trafficserver/iocore/cache/P_CacheInternal.h
> 487:
> struct
> {
> unsigned int use_first_key:1;
> unsigned int overwrite:1; // overwrite first_key Dir if it exists
> unsigned int close_complete:1; // WRITE_COMPLETE is final
> unsigned int sync:1; // write to be committed to durable storage before WRITE_COMPLETE
> unsigned int evacuator:1;
> unsigned int single_fragment:1;
> unsigned int evac_vector:1;
> unsigned int lookup:1;
> unsigned int update:1;
> unsigned int remove:1;
> unsigned int remove_aborted_writers:1;
> unsigned int open_read_timeout:1; // UNUSED
> unsigned int data_done:1;
> unsigned int read_from_writer_called:1;
> unsigned int not_from_ram_cache:1; // entire object was from ram cache
> unsigned int rewrite_resident_alt:1;
> unsigned int readers:1;
> unsigned int doc_from_ram_cache:1;
> unsigned int hit_evacuate:1;
> #if TS_USE_INTERIM_CACHE == 1
> unsigned int read_from_interim:1;
> unsigned int write_into_interim:1;
> unsigned int ram_fixup:1;
> unsigned int transistor:1;
> #endif
> #ifdef HTTP_CACHE
> unsigned int allow_empty_doc:1; // used for cache empty http document
> #endif
> } f;
> 508:
> question:
> unsigned int ram_fixup:1; ?????
> Help me to explain the role of this parameter it
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