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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/05/05 11:59:39 UTC
[GitHub] [incubator-nuttx] minabeoki opened a new pull request, #6211: armv7-a: Inner Shareable TLB maintenance operations
minabeoki opened a new pull request, #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211
## Summary
- Use Inner Shareable for TLB maintenance operations
- This PR is in preparation for smp with kernel build
TLB maintenance sample code is following:
(TLB maintenance operations and barriers in ARMv7-A's ARM Architecture Reference Manual)
<img width="759" alt="tlb_maintenance" src="https://user-images.githubusercontent.com/59300590/166917491-102b9fa8-db10-4c75-bd60-388f4e12ee19.png">
## Impact
- armv7-a
## Testing
- sabre-6quad:smp w/ qemu
- sabre-6quad:knsh_smp w/ qemu (WIP)
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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a diff in pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on code in PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211#discussion_r866039086
##########
arch/arm/src/armv7-a/arm_cpuhead.S:
##########
@@ -200,11 +200,17 @@ __cpu3_start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
If so, should we change the check to CONFIG_SMP? BTW, it isn't harm to do the full sync in SMP?
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[GitHub] [incubator-nuttx] minabeoki commented on a diff in pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
minabeoki commented on code in PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211#discussion_r866064978
##########
arch/arm/src/armv7-a/arm_cpuhead.S:
##########
@@ -200,11 +200,17 @@ __cpu3_start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
The single core A9 chip uses the Inner Shareable operations for ACP port feature.
The ACP connect to DMA controllers and can be coherency.
If CONFIG_SMP is used, these single core chips cannot Inner Shareable operations.
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[GitHub] [incubator-nuttx] masayuki2009 merged pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
masayuki2009 merged PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211
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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a diff in pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on code in PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211#discussion_r866039086
##########
arch/arm/src/armv7-a/arm_cpuhead.S:
##########
@@ -200,11 +200,17 @@ __cpu3_start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
If so, should we change the check to CONFIG_SMP?
--
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[GitHub] [incubator-nuttx] minabeoki commented on a diff in pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
minabeoki commented on code in PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211#discussion_r866492993
##########
arch/arm/src/armv7-a/arm_cpuhead.S:
##########
@@ -200,11 +200,17 @@ __cpu3_start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
I added the new config and removed A8's ifdef.
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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a diff in pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on code in PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211#discussion_r866018049
##########
arch/arm/src/armv7-a/arm_head.S:
##########
@@ -326,11 +326,17 @@ __start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
ditto
##########
arch/arm/src/armv7-a/arm_cpuhead.S:
##########
@@ -200,11 +200,17 @@ __cpu3_start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
why A8 need special treatment?
##########
arch/arm/src/armv7-a/mmu.h:
##########
@@ -1227,7 +1227,16 @@ static inline void cp15_invalidate_tlbs(void)
{
__asm__ __volatile__
(
+ "\tdsb\n"
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
ditto
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[GitHub] [incubator-nuttx] xiaoxiang781216 commented on a diff in pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 commented on code in PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211#discussion_r866222561
##########
arch/arm/src/armv7-a/arm_cpuhead.S:
##########
@@ -200,11 +200,17 @@ __cpu3_start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
Yes, I think it's better to add a new Kconfig(outer v.s. inner) and let each chip(A7, A8, A9) select it base on the capability.
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[GitHub] [incubator-nuttx] minabeoki commented on a diff in pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
minabeoki commented on code in PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211#discussion_r866073552
##########
arch/arm/src/armv7-a/arm_cpuhead.S:
##########
@@ -200,11 +200,17 @@ __cpu3_start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
The another way, add new config such as CONFIG_ARCH_HAVE_MPCORE_EXTENSION ?
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[GitHub] [incubator-nuttx] minabeoki commented on a diff in pull request #6211: armv7-a: Inner Shareable TLB maintenance operations
Posted by GitBox <gi...@apache.org>.
minabeoki commented on code in PR #6211:
URL: https://github.com/apache/incubator-nuttx/pull/6211#discussion_r866023982
##########
arch/arm/src/armv7-a/arm_cpuhead.S:
##########
@@ -200,11 +200,17 @@ __cpu3_start:
*/
mov r0, #0
+#ifdef CONFIG_ARCH_CORTEXA8
Review Comment:
@xiaoxiang781216 A8 does not have MPCore extension, so Inner Shareable operations does not supported.
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