[GitHub] [incubator-nuttx] davids5 commented on pull request #3525: Fix stm32f7 protected build

[GitBox <gi...@apache.org>]

davids5 commented on pull request #3525:
URL: https://github.com/apache/incubator-nuttx/pull/3525#issuecomment-817763746


   > For some reason (which I didn't fully understand), setting the MPU_RASR_S makes SRAM not writable. Not setting this bit solves the problem; My thinking here is that since this is a single core chip anyhow, it is fine to leave the bit out.
   
   @jlaitine Is this the reason?
   
   The S field is for a shareable memory region: the memory system provides data synchronization between
   bus masters in a system with multiple bus masters, for example, a processor with a DMA controller. A
   strongly-ordered memory is always shareable. If multiple bus masters can access a non-shareable memory
   region, the software must ensure the data coherency between the bus masters. **The STM32F7 Series and
   STM32H7 Series do not support hardware coherency. The S field is equivalent to non-cacheable memory**.


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