You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by ag...@apache.org on 2021/02/11 20:40:00 UTC
[incubator-nuttx] branch master updated: Add
esp32_gpio_matrix_in/out to replace ROM functions
This is an automated email from the ASF dual-hosted git repository.
aguettouche pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new f56ff40 Add esp32_gpio_matrix_in/out to replace ROM functions
f56ff40 is described below
commit f56ff40101b9fd15ee8b6c5a3043646c1db1cc1a
Author: Alan C. Assis <ac...@gmail.com>
AuthorDate: Wed Feb 10 13:59:10 2021 -0300
Add esp32_gpio_matrix_in/out to replace ROM functions
---
arch/xtensa/src/esp32/esp32_emac.c | 7 +-
arch/xtensa/src/esp32/esp32_gpio.c | 74 ++++
arch/xtensa/src/esp32/esp32_gpio.h | 31 ++
arch/xtensa/src/esp32/esp32_i2c.c | 9 +-
arch/xtensa/src/esp32/esp32_psram.c | 71 ++--
arch/xtensa/src/esp32/esp32_serial.c | 20 +-
arch/xtensa/src/esp32/esp32_spi.c | 19 +-
arch/xtensa/src/esp32/esp32_spi_slave.c | 17 +-
arch/xtensa/src/esp32/hardware/esp32_gpio.h | 2 +
arch/xtensa/src/esp32/rom/esp32_gpio.h | 434 ---------------------
.../xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c | 3 +-
11 files changed, 181 insertions(+), 506 deletions(-)
diff --git a/arch/xtensa/src/esp32/esp32_emac.c b/arch/xtensa/src/esp32/esp32_emac.c
index 3cd7671..c35e9a6 100644
--- a/arch/xtensa/src/esp32/esp32_emac.c
+++ b/arch/xtensa/src/esp32/esp32_emac.c
@@ -56,7 +56,6 @@
#include "xtensa.h"
#include "xtensa_attr.h"
-#include "rom/esp32_gpio.h"
#include "hardware/esp32_gpio_sigmap.h"
#include "hardware/esp32_dport.h"
#include "hardware/esp32_emac.h"
@@ -507,11 +506,11 @@ static void emac_init_gpio(void)
esp32_configgpio(EMAC_ICLK_PIN, INPUT_FUNCTION_6);
esp32_configgpio(EMAC_MDC_PIN, OUTPUT | FUNCTION_3);
- gpio_matrix_out(EMAC_MDC_PIN, EMAC_MDC_O_IDX, 0, 0);
+ esp32_gpio_matrix_out(EMAC_MDC_PIN, EMAC_MDC_O_IDX, 0, 0);
esp32_configgpio(EMAC_MDIO_PIN, OUTPUT | INPUT | FUNCTION_3);
- gpio_matrix_out(EMAC_MDIO_PIN, EMAC_MDO_O_IDX, 0, 0);
- gpio_matrix_in(EMAC_MDIO_PIN, EMAC_MDI_I_IDX, 0);
+ esp32_gpio_matrix_out(EMAC_MDIO_PIN, EMAC_MDO_O_IDX, 0, 0);
+ esp32_gpio_matrix_in(EMAC_MDIO_PIN, EMAC_MDI_I_IDX, 0);
esp32_configgpio(EMAC_PHYRST_PIN, OUTPUT | PULLUP);
}
diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c
index cd1276b..fcd4225 100644
--- a/arch/xtensa/src/esp32/esp32_gpio.c
+++ b/arch/xtensa/src/esp32/esp32_gpio.c
@@ -436,3 +436,77 @@ void esp32_gpioirqdisable(int irq)
up_enable_irq(g_gpio_cpuint);
}
#endif
+
+/****************************************************************************
+ * Name: esp32_gpio_matrix_in
+ *
+ * Description:
+ * Set gpio input to a signal
+ * NOTE: one gpio can input to several signals
+ * If gpio == 0x30, cancel input to the signal, input 0 to signal
+ * If gpio == 0x38, cancel input to the signal, input 1 to signal,
+ * for I2C pad
+ *
+ ****************************************************************************/
+
+void esp32_gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv)
+{
+ uint32_t regaddr = GPIO_FUNC0_IN_SEL_CFG_REG + (signal_idx * 4);
+ uint32_t regval = (gpio << GPIO_FUNC0_IN_SEL_S);
+
+ if (inv)
+ {
+ regval |= GPIO_FUNC0_IN_INV_SEL;
+ }
+
+ if (gpio != 0x34)
+ {
+ regval |= GPIO_SIG0_IN_SEL;
+ }
+
+ putreg32(regval, regaddr);
+}
+
+/****************************************************************************
+ * Name: esp32_gpio_matrix_out
+ *
+ * Description:
+ * Set signal output to gpio
+ * NOTE: one signal can output to several gpios
+ * If signal_idx == 0x100, cancel output put to the gpio
+ *
+ ****************************************************************************/
+
+void esp32_gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv,
+ bool oen_inv)
+{
+ uint32_t regaddr = GPIO_FUNC0_OUT_SEL_CFG_REG + (gpio * 4);
+ uint32_t regval = signal_idx << GPIO_FUNC0_OUT_SEL_S;
+
+ if (gpio >= GPIO_PIN_COUNT)
+ {
+ return;
+ }
+
+ if (gpio < 32)
+ {
+ putreg32((1ul << gpio), GPIO_ENABLE_W1TS_REG);
+ }
+ else
+ {
+ putreg32((1ul << (gpio - 32)), GPIO_ENABLE1_W1TS_REG);
+ }
+
+ if (out_inv)
+ {
+ regval |= GPIO_FUNC0_OUT_INV_SEL;
+ }
+
+ if (oen_inv)
+ {
+ regval |= GPIO_FUNC0_OEN_INV_SEL;
+ }
+
+ putreg32(regval, regaddr);
+}
+
diff --git a/arch/xtensa/src/esp32/esp32_gpio.h b/arch/xtensa/src/esp32/esp32_gpio.h
index e9182df..1b34867 100644
--- a/arch/xtensa/src/esp32/esp32_gpio.h
+++ b/arch/xtensa/src/esp32/esp32_gpio.h
@@ -40,6 +40,10 @@
* Pre-processor Definitions
****************************************************************************/
+#define MATRIX_DETACH_OUT_SIG 0x100 /* Detach an OUTPUT signal */
+#define MATRIX_DETACH_IN_LOW_PIN 0x30 /* Detach non-inverted INPUT signal */
+#define MATRIX_DETACH_IN_LOW_HIGH 0x38 /* Detach inverted INPUT signal */
+
/* Bit-encoded input to esp32_configgpio() **********************************/
/* Encoded pin attributes used with esp32_configgpio()
@@ -201,6 +205,33 @@ void esp32_gpioirqdisable(int irq);
# define esp32_gpioirqdisable(irq)
#endif
+/****************************************************************************
+ * Name: esp32_gpio_matrix_in
+ *
+ * Description:
+ * Set gpio input to a signal
+ * NOTE: one gpio can input to several signals
+ * If gpio == 0x30, cancel input to the signal, input 0 to signal
+ * If gpio == 0x38, cancel input to the signal, input 1 to signal,
+ * for I2C pad
+ *
+ ****************************************************************************/
+
+void esp32_gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
+
+/****************************************************************************
+ * Name: esp32_gpio_matrix_out
+ *
+ * Description:
+ * Set signal output to gpio
+ * NOTE: one signal can output to several gpios
+ * If signal_idx == 0x100, cancel output put to the gpio
+ *
+ ****************************************************************************/
+
+void esp32_gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv,
+ bool oen_inv);
+
#ifdef __cplusplus
}
#endif
diff --git a/arch/xtensa/src/esp32/esp32_i2c.c b/arch/xtensa/src/esp32/esp32_i2c.c
index fb480ea..08fc0a5 100644
--- a/arch/xtensa/src/esp32/esp32_i2c.c
+++ b/arch/xtensa/src/esp32/esp32_i2c.c
@@ -52,7 +52,6 @@
#include "hardware/esp32_dport.h"
#include "hardware/esp32_i2c.h"
#include "hardware/esp32_soc.h"
-#include "rom/esp32_gpio.h"
/****************************************************************************
* Private Functions
@@ -505,15 +504,15 @@ static void esp32_i2c_init(FAR struct esp32_i2c_priv_s *priv)
esp32_gpiowrite(config->sda_pin, 1);
esp32_configgpio(config->scl_pin, OUTPUT | OPEN_DRAIN | FUNCTION_3);
- gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
- gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
+ esp32_gpio_matrix_out(config->scl_pin, config->scl_outsig, 0, 0);
+ esp32_gpio_matrix_in(config->scl_pin, config->scl_insig, 0);
esp32_configgpio(config->sda_pin, INPUT |
OUTPUT |
OPEN_DRAIN |
FUNCTION_3);
- gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
- gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
+ esp32_gpio_matrix_out(config->sda_pin, config->sda_outsig, 0, 0);
+ esp32_gpio_matrix_in(config->sda_pin, config->sda_insig, 0);
modifyreg32(DPORT_PERIP_CLK_EN_REG, 0, config->clk_bit);
modifyreg32(DPORT_PERIP_RST_EN_REG, config->rst_bit, 0);
diff --git a/arch/xtensa/src/esp32/esp32_psram.c b/arch/xtensa/src/esp32/esp32_psram.c
index 6ddfc10..403352a 100644
--- a/arch/xtensa/src/esp32/esp32_psram.c
+++ b/arch/xtensa/src/esp32/esp32_psram.c
@@ -40,8 +40,6 @@
#include "hardware/esp32_rtccntl.h"
#include "hardware/esp32_gpio_sigmap.h"
-#include "rom/esp32_gpio.h"
-#include "rom/esp32_gpio.h"
#include "rom/esp32_efuse.h"
#include "rom/esp32_spiflash.h"
#include "hardware/efuse_reg.h"
@@ -935,12 +933,12 @@ psram_2t_mode_enable(psram_spi_num_t spi_num)
*/
GPIO_OUTPUT_SET(CONFIG_D0WD_PSRAM_CS_IO, 1);
- gpio_matrix_out(CONFIG_D0WD_PSRAM_CS_IO, SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(CONFIG_D0WD_PSRAM_CS_IO, SIG_GPIO_OUT_IDX, 0, 0);
- gpio_matrix_out(PSRAM_SPID_SD1_IO, SPIQ_OUT_IDX, 0, 0);
- gpio_matrix_in(PSRAM_SPID_SD1_IO, SPIQ_IN_IDX, 0);
- gpio_matrix_out(PSRAM_SPIQ_SD0_IO, SPID_OUT_IDX, 0, 0);
- gpio_matrix_in(PSRAM_SPIQ_SD0_IO, SPID_IN_IDX, 0);
+ esp32_gpio_matrix_out(PSRAM_SPID_SD1_IO, SPIQ_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(PSRAM_SPID_SD1_IO, SPIQ_IN_IDX, 0);
+ esp32_gpio_matrix_out(PSRAM_SPIQ_SD0_IO, SPID_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(PSRAM_SPIQ_SD0_IO, SPID_IN_IDX, 0);
uint32_t w_data_2t[4] =
{
@@ -957,12 +955,12 @@ psram_2t_mode_enable(psram_spi_num_t spi_num)
psram_cmd_recv_start(spi_num, NULL, 0, PSRAM_CMD_SPI);
psram_cmd_end(spi_num);
- gpio_matrix_out(PSRAM_SPIQ_SD0_IO, SPIQ_OUT_IDX, 0, 0);
- gpio_matrix_in(PSRAM_SPIQ_SD0_IO, SPIQ_IN_IDX, 0);
- gpio_matrix_out(PSRAM_SPID_SD1_IO, SPID_OUT_IDX, 0, 0);
- gpio_matrix_in(PSRAM_SPID_SD1_IO, SPID_IN_IDX, 0);
+ esp32_gpio_matrix_out(PSRAM_SPIQ_SD0_IO, SPIQ_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(PSRAM_SPIQ_SD0_IO, SPIQ_IN_IDX, 0);
+ esp32_gpio_matrix_out(PSRAM_SPID_SD1_IO, SPID_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(PSRAM_SPID_SD1_IO, SPID_IN_IDX, 0);
- gpio_matrix_out(CONFIG_D0WD_PSRAM_CS_IO, SPICS1_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(CONFIG_D0WD_PSRAM_CS_IO, SPICS1_OUT_IDX, 0, 0);
/* setp4: send cmd 0x5f
* send one more bit clock after send cmd
@@ -1194,16 +1192,16 @@ static void IRAM_ATTR psram_gpio_config(psram_io_t *psram_io,
* version.
*/
- gpio_matrix_out(psram_io->flash_cs_io, SPICS0_OUT_IDX, 0, 0);
- gpio_matrix_out(psram_io->psram_cs_io, SPICS1_OUT_IDX, 0, 0);
- gpio_matrix_out(psram_io->psram_spiq_sd0_io, SPIQ_OUT_IDX, 0, 0);
- gpio_matrix_in(psram_io->psram_spiq_sd0_io, SPIQ_IN_IDX, 0);
- gpio_matrix_out(psram_io->psram_spid_sd1_io, SPID_OUT_IDX, 0, 0);
- gpio_matrix_in(psram_io->psram_spid_sd1_io, SPID_IN_IDX, 0);
- gpio_matrix_out(psram_io->psram_spiwp_sd3_io, SPIWP_OUT_IDX, 0, 0);
- gpio_matrix_in(psram_io->psram_spiwp_sd3_io, SPIWP_IN_IDX, 0);
- gpio_matrix_out(psram_io->psram_spihd_sd2_io, SPIHD_OUT_IDX, 0, 0);
- gpio_matrix_in(psram_io->psram_spihd_sd2_io, SPIHD_IN_IDX, 0);
+ esp32_gpio_matrix_out(psram_io->flash_cs_io, SPICS0_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(psram_io->psram_cs_io, SPICS1_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(psram_io->psram_spiq_sd0_io, SPIQ_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(psram_io->psram_spiq_sd0_io, SPIQ_IN_IDX, 0);
+ esp32_gpio_matrix_out(psram_io->psram_spid_sd1_io, SPID_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(psram_io->psram_spid_sd1_io, SPID_IN_IDX, 0);
+ esp32_gpio_matrix_out(psram_io->psram_spiwp_sd3_io, SPIWP_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(psram_io->psram_spiwp_sd3_io, SPIWP_IN_IDX, 0);
+ esp32_gpio_matrix_out(psram_io->psram_spihd_sd2_io, SPIHD_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(psram_io->psram_spihd_sd2_io, SPIHD_IN_IDX, 0);
/* select pin function gpio */
@@ -1419,7 +1417,7 @@ psram_enable(int mode, int vaddrmode) /* psram init */
switch (mode)
{
case PSRAM_CACHE_F80M_S80M:
- gpio_matrix_out(psram_io.psram_clk_io, SPICLK_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(psram_io.psram_clk_io, SPICLK_OUT_IDX, 0, 0);
break;
case PSRAM_CACHE_F80M_S40M:
case PSRAM_CACHE_F40M_S40M:
@@ -1438,16 +1436,22 @@ psram_enable(int mode, int vaddrmode) /* psram init */
*/
minfo("clk_mode == PSRAM_CLK_MODE_DCLK\n");
- gpio_matrix_out(PSRAM_INTERNAL_IO_28, SPICLK_OUT_IDX, 0, 0);
- gpio_matrix_in(PSRAM_INTERNAL_IO_28, SIG_IN_FUNC224_IDX, 0);
- gpio_matrix_out(PSRAM_INTERNAL_IO_29, SIG_IN_FUNC224_IDX, 0, 0);
- gpio_matrix_in(PSRAM_INTERNAL_IO_29, SIG_IN_FUNC225_IDX, 0);
- gpio_matrix_out(psram_io.psram_clk_io, SIG_IN_FUNC225_IDX, 0, 0);
+ esp32_gpio_matrix_out(PSRAM_INTERNAL_IO_28,
+ SPICLK_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_in(PSRAM_INTERNAL_IO_28,
+ SIG_IN_FUNC224_IDX, 0);
+ esp32_gpio_matrix_out(PSRAM_INTERNAL_IO_29,
+ SIG_IN_FUNC224_IDX, 0, 0);
+ esp32_gpio_matrix_in(PSRAM_INTERNAL_IO_29,
+ SIG_IN_FUNC225_IDX, 0);
+ esp32_gpio_matrix_out(psram_io.psram_clk_io,
+ SIG_IN_FUNC225_IDX, 0, 0);
}
else
{
minfo("clk_io == OUT_IDX\n");
- gpio_matrix_out(psram_io.psram_clk_io, SPICLK_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(psram_io.psram_clk_io,
+ SPICLK_OUT_IDX, 0, 0);
}
break;
}
@@ -1489,7 +1493,8 @@ psram_enable(int mode, int vaddrmode) /* psram init */
* ourselves
*/
- gpio_matrix_out(psram_io.psram_clk_io, PSRAM_CLK_SIGNAL, 0, 0);
+ esp32_gpio_matrix_out(psram_io.psram_clk_io,
+ PSRAM_CLK_SIGNAL, 0, 0);
/* use spi3 clock,but use spi1 data/cs wires
* We get a solid 80MHz clock from SPI3 by setting it up, starting
@@ -1519,9 +1524,9 @@ psram_enable(int mode, int vaddrmode) /* psram init */
*/
s_clk_mode = PSRAM_CLK_MODE_NORM;
- gpio_matrix_out(PSRAM_INTERNAL_IO_28, SIG_GPIO_OUT_IDX, 0, 0);
- gpio_matrix_out(PSRAM_INTERNAL_IO_29, SIG_GPIO_OUT_IDX, 0, 0);
- gpio_matrix_out(psram_io.psram_clk_io, SPICLK_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(PSRAM_INTERNAL_IO_28, SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(PSRAM_INTERNAL_IO_29, SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(psram_io.psram_clk_io, SPICLK_OUT_IDX, 0, 0);
}
/* Update cs timing according to psram driving method. */
diff --git a/arch/xtensa/src/esp32/esp32_serial.c b/arch/xtensa/src/esp32/esp32_serial.c
index 80b0acc..67ced05 100644
--- a/arch/xtensa/src/esp32/esp32_serial.c
+++ b/arch/xtensa/src/esp32/esp32_serial.c
@@ -63,7 +63,6 @@
#include "hardware/esp32_iomux.h"
#include "hardware/esp32_gpio_sigmap.h"
#include "hardware/esp32_uart.h"
-#include "rom/esp32_gpio.h"
#include "esp32_config.h"
#include "esp32_gpio.h"
#include "esp32_cpuint.h"
@@ -529,17 +528,17 @@ static int esp32_setup(struct uart_dev_s *dev)
*/
esp32_configgpio(priv->config->txpin, OUTPUT_FUNCTION_3);
- gpio_matrix_out(priv->config->txpin, priv->config->txsig, 0, 0);
+ esp32_gpio_matrix_out(priv->config->txpin, priv->config->txsig, 0, 0);
esp32_configgpio(priv->config->rxpin, INPUT_FUNCTION_3);
- gpio_matrix_in(priv->config->rxpin, priv->config->rxsig, 0);
+ esp32_gpio_matrix_in(priv->config->rxpin, priv->config->rxsig, 0);
#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
esp32_configgpio(priv->config->rtspin, OUTPUT_FUNCTION_3);
- gpio_matrix_out(priv->config->rtspin, priv->config->rtssig, 0, 0);
+ esp32_gpio_matrix_out(priv->config->rtspin, priv->config->rtssig, 0, 0);
esp32_configgpio(priv->config->ctspin, INPUT_FUNCTION_3);
- gpio_matrix_in(priv->config->ctspin, priv->config->ctssig, 0);
+ esp32_gpio_matrix_in(priv->config->ctspin, priv->config->ctssig, 0);
#endif
/* Enable RX and error interrupts. Clear and pending interrtupt */
@@ -596,17 +595,20 @@ static void esp32_shutdown(struct uart_dev_s *dev)
/* Revert pins to inputs and detach UART signals */
esp32_configgpio(priv->config->txpin, INPUT);
- gpio_matrix_out(priv->config->txsig, MATRIX_DETACH_OUT_SIG, true, false);
+ esp32_gpio_matrix_out(priv->config->txsig,
+ MATRIX_DETACH_OUT_SIG, true, false);
esp32_configgpio(priv->config->rxpin, INPUT);
- gpio_matrix_in(priv->config->rxsig, MATRIX_DETACH_IN_LOW_PIN, false);
+ esp32_gpio_matrix_in(priv->config->rxsig, MATRIX_DETACH_IN_LOW_PIN, false);
#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
esp32_configgpio(priv->config->rtspin, INPUT);
- gpio_matrix_out(priv->config->rtssig, MATRIX_DETACH_OUT_SIG, true, false);
+ esp32_gpio_matrix_out(priv->config->rtssig,
+ MATRIX_DETACH_OUT_SIG, true, false);
esp32_configgpio(priv->config->ctspin, INPUT);
- gpio_matrix_in(priv->config->ctssig, MATRIX_DETACH_IN_LOW_PIN, false);
+ esp32_gpio_matrix_in(priv->config->ctssig,
+ MATRIX_DETACH_IN_LOW_PIN, false);
#endif
/* Unconfigure and disable the UART */
diff --git a/arch/xtensa/src/esp32/esp32_spi.c b/arch/xtensa/src/esp32/esp32_spi.c
index 4c26526..9491b03 100644
--- a/arch/xtensa/src/esp32/esp32_spi.c
+++ b/arch/xtensa/src/esp32/esp32_spi.c
@@ -56,7 +56,6 @@
#include "hardware/esp32_spi.h"
#include "hardware/esp32_soc.h"
#include "hardware/esp32_pinmap.h"
-#include "rom/esp32_gpio.h"
/****************************************************************************
* Pre-processor Definitions
@@ -1289,39 +1288,39 @@ static void esp32_spi_init(FAR struct spi_dev_s *dev)
#ifdef CONFIG_ESP32_SPI_SWCS
esp32_configgpio(config->cs_pin, OUTPUT);
- gpio_matrix_out(config->cs_pin, SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(config->cs_pin, SIG_GPIO_OUT_IDX, 0, 0);
#endif
if (esp32_spi_iomux(priv))
{
#ifndef CONFIG_ESP32_SPI_SWCS
esp32_configgpio(config->cs_pin, OUTPUT_FUNCTION_2);
- gpio_matrix_out(config->cs_pin, SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(config->cs_pin, SIG_GPIO_OUT_IDX, 0, 0);
#endif
esp32_configgpio(config->mosi_pin, OUTPUT_FUNCTION_2);
- gpio_matrix_out(config->mosi_pin, SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(config->mosi_pin, SIG_GPIO_OUT_IDX, 0, 0);
esp32_configgpio(config->miso_pin, INPUT_FUNCTION_2 | PULLUP);
- gpio_matrix_out(config->miso_pin, SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(config->miso_pin, SIG_GPIO_OUT_IDX, 0, 0);
esp32_configgpio(config->clk_pin, OUTPUT_FUNCTION_2);
- gpio_matrix_out(config->clk_pin, SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(config->clk_pin, SIG_GPIO_OUT_IDX, 0, 0);
}
else
{
#ifndef CONFIG_ESP32_SPI_SWCS
esp32_configgpio(config->cs_pin, OUTPUT_FUNCTION_3);
- gpio_matrix_out(config->cs_pin, config->cs_outsig, 0, 0);
+ esp32_gpio_matrix_out(config->cs_pin, config->cs_outsig, 0, 0);
#endif
esp32_configgpio(config->mosi_pin, OUTPUT_FUNCTION_3);
- gpio_matrix_out(config->mosi_pin, config->mosi_outsig, 0, 0);
+ esp32_gpio_matrix_out(config->mosi_pin, config->mosi_outsig, 0, 0);
esp32_configgpio(config->miso_pin, INPUT_FUNCTION_3 | PULLUP);
- gpio_matrix_in(config->miso_pin, config->miso_insig, 0);
+ esp32_gpio_matrix_in(config->miso_pin, config->miso_insig, 0);
esp32_configgpio(config->clk_pin, OUTPUT_FUNCTION_3);
- gpio_matrix_out(config->clk_pin, config->clk_outsig, 0, 0);
+ esp32_gpio_matrix_out(config->clk_pin, config->clk_outsig, 0, 0);
}
modifyreg32(DPORT_PERIP_CLK_EN_REG, 0, config->clk_bit);
diff --git a/arch/xtensa/src/esp32/esp32_spi_slave.c b/arch/xtensa/src/esp32/esp32_spi_slave.c
index 6f52521..ae961a5 100644
--- a/arch/xtensa/src/esp32/esp32_spi_slave.c
+++ b/arch/xtensa/src/esp32/esp32_spi_slave.c
@@ -56,7 +56,6 @@
#include "hardware/esp32_spi.h"
#include "hardware/esp32_soc.h"
#include "hardware/esp32_pinmap.h"
-#include "rom/esp32_gpio.h"
/****************************************************************************
* Private Types
@@ -866,20 +865,20 @@ static void esp32_spislv_initialize(FAR struct spi_sctrlr_s *dev)
else
{
esp32_configgpio(config->cs_pin, INPUT_FUNCTION_3 | PULLUP);
- gpio_matrix_out(config->cs_pin, config->cs_outsig, 0, 0);
- gpio_matrix_in(config->cs_pin, config->cs_insig, 0);
+ esp32_gpio_matrix_out(config->cs_pin, config->cs_outsig, 0, 0);
+ esp32_gpio_matrix_in(config->cs_pin, config->cs_insig, 0);
esp32_configgpio(config->mosi_pin, INPUT_FUNCTION_3 | PULLUP);
- gpio_matrix_out(config->mosi_pin, config->mosi_outsig, 0, 0);
- gpio_matrix_in(config->mosi_pin, config->mosi_insig, 0);
+ esp32_gpio_matrix_out(config->mosi_pin, config->mosi_outsig, 0, 0);
+ esp32_gpio_matrix_in(config->mosi_pin, config->mosi_insig, 0);
esp32_configgpio(config->miso_pin, OUTPUT_FUNCTION_3);
- gpio_matrix_out(config->miso_pin, config->miso_outsig, 0, 0);
- gpio_matrix_in(config->miso_pin, config->miso_insig, 0);
+ esp32_gpio_matrix_out(config->miso_pin, config->miso_outsig, 0, 0);
+ esp32_gpio_matrix_in(config->miso_pin, config->miso_insig, 0);
esp32_configgpio(config->clk_pin, INPUT_FUNCTION_3 | PULLUP);
- gpio_matrix_out(config->clk_pin, config->clk_outsig, 0, 0);
- gpio_matrix_in(config->clk_pin, config->clk_insig, 0);
+ esp32_gpio_matrix_out(config->clk_pin, config->clk_outsig, 0, 0);
+ esp32_gpio_matrix_in(config->clk_pin, config->clk_insig, 0);
}
modifyreg32(DPORT_PERIP_CLK_EN_REG, 0, config->clk_bit);
diff --git a/arch/xtensa/src/esp32/hardware/esp32_gpio.h b/arch/xtensa/src/esp32/hardware/esp32_gpio.h
index 238cb3f..f83eec5 100644
--- a/arch/xtensa/src/esp32/hardware/esp32_gpio.h
+++ b/arch/xtensa/src/esp32/hardware/esp32_gpio.h
@@ -37,6 +37,8 @@
* Pre-preprocessor Definitions
****************************************************************************/
+#define GPIO_PIN_COUNT 39
+
#define GPIO_BT_SELECT_REG (DR_REG_GPIO_BASE + 0x0000)
/* GPIO_BT_SEL : R/W ;bitpos:[31:0] ;default: x ; */
diff --git a/arch/xtensa/src/esp32/rom/esp32_gpio.h b/arch/xtensa/src/esp32/rom/esp32_gpio.h
deleted file mode 100644
index 9e2a42b..0000000
--- a/arch/xtensa/src/esp32/rom/esp32_gpio.h
+++ /dev/null
@@ -1,434 +0,0 @@
-/****************************************************************************
- * arch/xtensa/src/esp32/rom/esp32_gpio.h
- *
- * Developed for NuttX by:
- *
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Derives from sample code provided by Espressif Systems:
- *
- * Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
-
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- ****************************************************************************/
-
-#ifndef __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H
-#define __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#include "hardware/esp32_gpio.h"
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-#define MATRIX_DETACH_OUT_SIG 0x100 /* Detach an OUTPUT signal */
-#define MATRIX_DETACH_IN_LOW_PIN 0x30 /* Detach non-inverted INPUT signal */
-#define MATRIX_DETACH_IN_LOW_HIGH 0x38 /* Detach inverted INPUT signal */
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-enum gpio_inttype_e
-{
- GPIO_PIN_INTR_DISABLE = 0,
- GPIO_PIN_INTR_POSEDGE = 1,
- GPIO_PIN_INTR_NEGEDGE = 2,
- GPIO_PIN_INTR_ANYEGDE = 3,
- GPIO_PIN_INTR_LOLEVEL = 4,
- GPIO_PIN_INTR_HILEVEL = 5
-};
-
-typedef enum gpio_inttype_e GPIO_INT_TYPE;
-
-/* GPIO interrupt handler, registered through gpio_intr_handler_register */
-
-typedef void (*gpio_intr_handler_fn_t)(uint32_t intr_mask, bool high,
- void *arg);
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/****************************************************************************
- * Name: gpio_init
- *
- * Description:
- * Initialize GPIO. This includes reading the GPIO Configuration DataSet
- * to initialize "output enables" and pin configurations for each gpio pin.
- * Please do not call this function in SDK.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_init(void);
-
-/****************************************************************************
- * Name: gpio_output_set
- *
- * Description:
- * Change GPIO(0-31) pin output by setting, clearing, or disabling pins,
- * GPIO0<->BIT(0). There is no particular ordering guaranteed; so if the
- * order of writes is significant, calling code should divide a single
- * call into multiple calls.
- *
- * Input Parameters:
- * set_mask - the gpios that need high level.
- * clear_mask - the gpios that need low level.
- * enable_mask - the gpios that need be changed.
- * disable_mask - the gpios that need disable output.
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_output_set(uint32_t set_mask, uint32_t clear_mask,
- uint32_t enable_mask, uint32_t disable_mask);
-
-/****************************************************************************
- * Name: gpio_output_set_high
- *
- * Description:
- * Change GPIO(32-39) pin output by setting, clearing, or disabling pins,
- * GPIO32<->BIT(0). There is no particular ordering guaranteed; so if the
- * order of writes is significant, calling code should divide a single call
- * into multiple calls.
- *
- * Input Parameters:
- * set_mask - the gpios that need high level.
- * clear_mask - the gpios that need low level.
- * enable_mask - the gpios that need be changed.
- * disable_mask - the gpios that need disable output.
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_output_set_high(uint32_t set_mask, uint32_t clear_mask,
- uint32_t enable_mask, uint32_t disable_mask);
-
-/****************************************************************************
- * Name: gpio_input_get
- *
- * Description:
- * Sample the value of GPIO input pins(0-31) and returns a bitmask.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * Bitmask for GPIO input pins, BIT(0) for GPIO0.
- *
- ****************************************************************************/
-
-uint32_t gpio_input_get(void);
-
-/****************************************************************************
- * Name: gpio_input_get_high
- *
- * Description:
- * Sample the value of GPIO input pins(32-39) and returns a bitmask.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * Bitmask for GPIO input pins, BIT(0) for GPIO32.
- *
- ****************************************************************************/
-
-uint32_t gpio_input_get_high(void);
-
-/****************************************************************************
- * Name: gpio_intr_handler_register
- *
- * Description:
- * Register an application-specific interrupt handler for GPIO pin
- * interrupts. Once the interrupt handler is called, it will not be
- * called again until after a call to gpio_intr_ack.
- *
- * Input Parameters:
- * fn - gpio application-specific interrupt handler
- * arg - gpio application-specific interrupt handler argument.
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
-
-/****************************************************************************
- * Name: gpio_intr_pending
- *
- * Description:
- * Get gpio interrupts which happens but not processed.
- *
- * Input Parameters:
- *
- * Returned Value:
- * Bitmask for GPIO pending interrupts, BIT(0) for GPIO0.
- *
- ****************************************************************************/
-
-uint32_t gpio_intr_pending(void);
-
-/****************************************************************************
- * Name: gpio_intr_pending_high
- *
- * Description:
- * Get gpio interrupts which happens but not processed.
- *
- * Input Parameters:
- *
- * Returned Value:
- * Bitmask for GPIO pending interrupts, BIT(0) for GPIO32.
- *
- ****************************************************************************/
-
-uint32_t gpio_intr_pending_high(void);
-
-/****************************************************************************
- * Name: gpio_intr_ack
- *
- * Description:
- * Ack gpio interrupts to process pending interrupts.
- *
- * Input Parameters:
- * ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO0.
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_intr_ack(uint32_t ack_mask);
-
-/****************************************************************************
- * Name: gpio_intr_ack_high
- *
- * Description:
- * Ack gpio interrupts to process pending interrupts.
- *
- * Input Parameters:
- * ack_mask: bitmask for GPIO ack interrupts, BIT(0) for GPIO32.
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_intr_ack_high(uint32_t ack_mask);
-
-/****************************************************************************
- * Name: gpio_pin_wakeup_enable
- *
- * Description:
- * Set GPIO to wakeup the ESP32.
- *
- * Input Parameters:
- * i - gpio number.
- * intr_state - only GPIO_PIN_INTR_LOLEVEL\GPIO_PIN_INTR_HILEVEL can be
- * used
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_pin_wakeup_enable(uint32_t i, GPIO_INT_TYPE intr_state);
-
-/****************************************************************************
- * Name: gpio_pin_wakeup_disable
- *
- * Description:
- * disable GPIOs to wakeup the ESP32.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_pin_wakeup_disable(void);
-
-/****************************************************************************
- * Name: gpio_matrix_in
- *
- * Description:
- * Set gpio input to a signal, one gpio can input to several signals.
- *
- * Input Parameters:
- * gpio - gpio number, 0~0x27
- * gpio == 0x30, input 0 to signal
- * gpio == 0x34, ???
- * gpio == 0x38, input 1 to signal
- *
- * signal_idx - signal index.
- * inv - the signal is inv or not
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_matrix_in(uint32_t gpio, uint32_t signal_idx, bool inv);
-
-/****************************************************************************
- * Name: gpio_matrix_out
- *
- * Description:
- * Set signal output to gpio, one signal can output to several gpios.
- *
- * Input Parameters:
- * gpio - gpio number, 0~0x27
- * signal_idx - signal index.
- * signal_idx == 0x100, cancel output put to the gpio
- * out_inv - the signal output is inv or not
- * oen_inv - the signal output enable is inv or not
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_matrix_out(uint32_t gpio, uint32_t signal_idx, bool out_inv,
- bool oen_inv);
-
-/****************************************************************************
- * Name: gpio_pad_select_gpio
- *
- * Description:
- * Select pad as a gpio function from IOMUX.
- *
- * Input Parameters:
- * gpio_num - gpio number, 0~0x27
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_pad_select_gpio(uint8_t gpio_num);
-
-/****************************************************************************
- * Name: gpio_pad_set_drv
- *
- * Description:
- * Set pad driver capability.
- *
- * Input Parameters:
- * gpio_num - gpio number, 0~0x27
- * drv - 0-3
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_pad_set_drv(uint8_t gpio_num, uint8_t drv);
-
-/****************************************************************************
- * Name: gpio_pad_pullup
- *
- * Description:
- * Pull up the pad from gpio number.
- *
- * Input Parameters:
- * gpio_num - gpio number, 0~0x27
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_pad_pullup(uint8_t gpio_num);
-
-/****************************************************************************
- * Name: gpio_pad_pulldown
- *
- * Description:
- * Pull down the pad from gpio number.
- *
- * Input Parameters:
- * gpio_num - gpio number, 0~0x27
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_pad_pulldown(uint8_t gpio_num);
-
-/****************************************************************************
- * Name: gpio_pad_unhold
- *
- * Description:
- * Unhold the pad from gpio number.
- *
- * Input Parameters:
- * gpio_num - gpio number, 0~0x27
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_pad_unhold(uint8_t gpio_num);
-
-/****************************************************************************
- * Name: gpio_pad_hold
- *
- * Description:
- * Hold the pad from gpio number.
- *
- * Input Parameters:
- * gpio_num - gpio number, 0~0x27
- *
- * Returned Value:
- * None
- *
- ****************************************************************************/
-
-void gpio_pad_hold(uint8_t gpio_num);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __XTENSA_SRC_ESP32_ROM_ESP32_GPIO_H */
diff --git a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c
index 70e1cef..4fa9d95 100644
--- a/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c
+++ b/boards/xtensa/esp32/esp32-wrover-kit/src/esp32_gpio.c
@@ -37,7 +37,6 @@
#include "esp32-wrover-kit.h"
#include "esp32_gpio.h"
-#include "rom/esp32_gpio.h"
#include "hardware/esp32_gpio_sigmap.h"
#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
@@ -290,7 +289,7 @@ int esp32_gpio_init(void)
/* Configure the pins that will be used as output */
- gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0);
+ esp32_gpio_matrix_out(g_gpiooutputs[i], SIG_GPIO_OUT_IDX, 0, 0);
esp32_configgpio(g_gpiooutputs[i], OUTPUT_FUNCTION_3);
esp32_gpiowrite(g_gpiooutputs[i], 0);