You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/04/15 11:38:48 UTC
[incubator-nuttx] branch master updated (82ce1de -> 0ada35f)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 82ce1de stm32/stm32_foc: remove the debug message before the calibration start
new 5e59d37 nucleo-g431rb: fixes for button
new 25240d9 boards/stm32/common: add support for IHM16M1
new 0ada35f nucleo-g431rb: add support for IHM16M1
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
boards/arm/stm32/common/Kconfig | 18 +++++
.../include/{stm32_ihm07m1.h => stm32_ihm16m1.h} | 12 ++--
boards/arm/stm32/common/src/Make.defs | 4 ++
.../src/{stm32_ihm07m1.c => stm32_ihm16m1.c} | 32 +++++----
boards/arm/stm32/nucleo-g431rb/README.txt | 59 ++++++++++++++++
.../configs/ihm16m1_b16}/defconfig | 19 +++---
.../configs/ihm16m1_f32}/defconfig | 19 +++---
boards/arm/stm32/nucleo-g431rb/include/board.h | 45 +++++++++++++
boards/arm/stm32/nucleo-g431rb/src/Make.defs | 10 +++
boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h | 30 +++++++++
boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c | 10 +++
boards/arm/stm32/nucleo-g431rb/src/stm32_buttons.c | 4 +-
.../src/stm32_foc_ihm16m1.c} | 78 +++++++++++-----------
13 files changed, 258 insertions(+), 82 deletions(-)
copy boards/arm/stm32/common/include/{stm32_ihm07m1.h => stm32_ihm16m1.h} (88%)
copy boards/arm/stm32/common/src/{stm32_ihm07m1.c => stm32_ihm16m1.c} (93%)
copy boards/arm/stm32/{nucleo-f302r8/configs/ihm07m1_b16 => nucleo-g431rb/configs/ihm16m1_b16}/defconfig (86%)
copy boards/arm/stm32/{nucleo-f302r8/configs/ihm07m1_f32 => nucleo-g431rb/configs/ihm16m1_f32}/defconfig (86%)
copy boards/arm/stm32/{nucleo-f302r8/src/stm32_foc_ihm07m1.c => nucleo-g431rb/src/stm32_foc_ihm16m1.c} (72%)
[incubator-nuttx] 03/03: nucleo-g431rb: add support for IHM16M1
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 0ada35faeb6e29b1f81e366fa0d60c45cb4dab5c
Author: raiden00pl <ra...@railab.me>
AuthorDate: Wed Apr 14 15:02:01 2021 +0200
nucleo-g431rb: add support for IHM16M1
---
boards/arm/stm32/nucleo-g431rb/README.txt | 59 +++++++
.../nucleo-g431rb/configs/ihm16m1_b16/defconfig | 89 ++++++++++
.../nucleo-g431rb/configs/ihm16m1_f32/defconfig | 89 ++++++++++
boards/arm/stm32/nucleo-g431rb/include/board.h | 45 +++++
boards/arm/stm32/nucleo-g431rb/src/Make.defs | 6 +
boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h | 12 ++
boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c | 10 ++
.../stm32/nucleo-g431rb/src/stm32_foc_ihm16m1.c | 183 +++++++++++++++++++++
8 files changed, 493 insertions(+)
diff --git a/boards/arm/stm32/nucleo-g431rb/README.txt b/boards/arm/stm32/nucleo-g431rb/README.txt
index d706431..c6ec06e 100644
--- a/boards/arm/stm32/nucleo-g431rb/README.txt
+++ b/boards/arm/stm32/nucleo-g431rb/README.txt
@@ -8,3 +8,62 @@ STATUS
======
2020-06-12: The basic NSH configuration is now functional.
+
+Configurations
+==============
+
+ ihm16m1_f32 and ihm16m1_b16:
+ ----------------------------
+
+ These examples are dedicated for the X-NUCLEO-IHM16M1 expansion board
+ based on STSPIN830 driver for three-phase brushless DC motors.
+
+ X-NUCLEO-IHM16M1 must be configured to work with FOC and 3-shunt
+ resistors. See ST documentation for details.
+
+ Pin configuration for the X-NUCLEO-IHM16M1 (TIM1 configuration):
+
+ Board Function Chip Function Chip Pin Number
+ ------------- ---------------- -----------------
+ Phase U high TIM1_CH1 PA8
+ Phase U enable GPIO_PB13 PB13
+ Phase V high TIM1_CH2 PA9
+ Phase V enable GPIO_PB14 PB14
+ Phase W high TIM1_CH3 PA10
+ Phase W enable GPIO_PB15 PB15
+ EN_FAULT GPIO_PB12 PB12
+ Current U GPIO_ADC1_IN2 PA1
+ Current V GPIO_ADC1_IN12 PB1
+ Current W GPIO_ADC1_IN15 PB0
+ Temperature ? PC4
+ VBUS GPIO_ADC1_IN1 PA0
+ BEMF1 (NU)
+ BEMF2 (NU)
+ BEMF3 (NU)
+ LED
+ +3V3 (CN7_16)
+ GND (CN7_20)
+ GPIO_BEMF (NU)
+ ENCO_A/HALL_H1
+ ENCO_B/HALL_H2
+ ENCO_Z/HALL_H3
+ GPIO1 (NU)
+ GPIO2 (NU)
+ GPIO3 (NU)
+ CPOUT (NU)
+ BKIN1 (NU)
+ POT GPIO_ADC1_IN8 PC2
+ CURR_REF (NU)
+ DAC (NU)
+
+ Current shunt resistance = 0.33
+ Current sense gain = -1.53 (inverted current)
+ Vbus sense gain = 9.31k/(9.31k+169k) = 0.0522124390107
+ Vbus min = 7V
+ Vbus max = 45V
+ Iout max = 1.5A RMS
+
+ IPHASE_RATIO = 1/(R_shunt*gain) = -1.98
+ VBUS_RATIO = 1/VBUS_gain = 16
+
+ For now only 3-shunt resistors configuration is supported.
diff --git a/boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_b16/defconfig b/boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_b16/defconfig
new file mode 100644
index 0000000..e69c79c
--- /dev/null
+++ b/boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_b16/defconfig
@@ -0,0 +1,89 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+CONFIG_ADC=y
+CONFIG_ADC_FIFOSIZE=3
+CONFIG_ANALOG=y
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-g431rb"
+CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32G431R=y
+CONFIG_ARCH_INTERRUPTSTACK=1024
+CONFIG_ARCH_IRQBUTTONS=y
+CONFIG_ARMV7M_LIBM=y
+CONFIG_BOARD_LOOPSPERMSEC=8499
+CONFIG_BOARD_STM32_COMMON=y
+CONFIG_BOARD_STM32_IHM16M1=y
+CONFIG_BOARD_STM32_IHM16M1_POT=y
+CONFIG_BOARD_STM32_IHM16M1_VBUS=y
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEFAULT_SMALL=y
+CONFIG_DEFAULT_TASK_STACKSIZE=1024
+CONFIG_EXAMPLES_FOC=y
+CONFIG_EXAMPLES_FOC_ADC_MAX=4095
+CONFIG_EXAMPLES_FOC_ADC_VREF=3300
+CONFIG_EXAMPLES_FOC_CONTROL_STACKSIZE=2048
+CONFIG_EXAMPLES_FOC_FIXED16_INST=1
+CONFIG_EXAMPLES_FOC_HAVE_BUTTON=y
+CONFIG_EXAMPLES_FOC_IPHASE_ADC=-160
+CONFIG_EXAMPLES_FOC_NOTIFIER_FREQ=10000
+CONFIG_EXAMPLES_FOC_PWM_FREQ=20000
+CONFIG_EXAMPLES_FOC_RAMP_ACC=1000000
+CONFIG_EXAMPLES_FOC_RAMP_DEC=1000000
+CONFIG_EXAMPLES_FOC_RAMP_THR=10000
+CONFIG_EXAMPLES_FOC_VBUS_ADC=y
+CONFIG_EXAMPLES_FOC_VBUS_SCALE=16000
+CONFIG_EXAMPLES_FOC_VEL_ADC=y
+CONFIG_INDUSTRY_FOC=y
+CONFIG_INDUSTRY_FOC_FIXED16=y
+CONFIG_INPUT=y
+CONFIG_INPUT_BUTTONS=y
+CONFIG_INPUT_BUTTONS_LOWER=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBM=y
+CONFIG_MAX_TASKS=4
+CONFIG_MOTOR=y
+CONFIG_MOTOR_FOC=y
+CONFIG_MOTOR_FOC_TRACE=y
+CONFIG_MQ_MAXMSGSIZE=5
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=22528
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_START_DAY=14
+CONFIG_START_MONTH=10
+CONFIG_START_YEAR=2014
+CONFIG_STM32_ADC1_ANIOC_TRIGGER=1
+CONFIG_STM32_ADC1_DMA=y
+CONFIG_STM32_ADC1_DMA_CFG=1
+CONFIG_STM32_ADC1_INJECTED_CHAN=3
+CONFIG_STM32_DMA1=y
+CONFIG_STM32_DMA2=y
+CONFIG_STM32_DMAMUX1=y
+CONFIG_STM32_FOC=y
+CONFIG_STM32_FOC_FOC0=y
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_TIM1_CH1MODE=0
+CONFIG_STM32_TIM1_CH2MODE=0
+CONFIG_STM32_TIM1_CH3MODE=0
+CONFIG_STM32_TIM1_MODE=2
+CONFIG_STM32_USART2=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USART2_TXDMA=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_f32/defconfig b/boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_f32/defconfig
new file mode 100644
index 0000000..49584d6
--- /dev/null
+++ b/boards/arm/stm32/nucleo-g431rb/configs/ihm16m1_f32/defconfig
@@ -0,0 +1,89 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+CONFIG_ADC=y
+CONFIG_ADC_FIFOSIZE=3
+CONFIG_ANALOG=y
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-g431rb"
+CONFIG_ARCH_BOARD_NUCLEO_G431RB=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32G431R=y
+CONFIG_ARCH_INTERRUPTSTACK=1024
+CONFIG_ARCH_IRQBUTTONS=y
+CONFIG_ARMV7M_LIBM=y
+CONFIG_BOARD_LOOPSPERMSEC=8499
+CONFIG_BOARD_STM32_COMMON=y
+CONFIG_BOARD_STM32_IHM16M1=y
+CONFIG_BOARD_STM32_IHM16M1_POT=y
+CONFIG_BOARD_STM32_IHM16M1_VBUS=y
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_FULLOPT=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_DEFAULT_SMALL=y
+CONFIG_DEFAULT_TASK_STACKSIZE=1024
+CONFIG_EXAMPLES_FOC=y
+CONFIG_EXAMPLES_FOC_ADC_MAX=4095
+CONFIG_EXAMPLES_FOC_ADC_VREF=3300
+CONFIG_EXAMPLES_FOC_CONTROL_STACKSIZE=2048
+CONFIG_EXAMPLES_FOC_FLOAT_INST=1
+CONFIG_EXAMPLES_FOC_HAVE_BUTTON=y
+CONFIG_EXAMPLES_FOC_IPHASE_ADC=-160
+CONFIG_EXAMPLES_FOC_NOTIFIER_FREQ=10000
+CONFIG_EXAMPLES_FOC_PWM_FREQ=20000
+CONFIG_EXAMPLES_FOC_RAMP_ACC=1000000
+CONFIG_EXAMPLES_FOC_RAMP_DEC=1000000
+CONFIG_EXAMPLES_FOC_RAMP_THR=10000
+CONFIG_EXAMPLES_FOC_VBUS_ADC=y
+CONFIG_EXAMPLES_FOC_VBUS_SCALE=16000
+CONFIG_EXAMPLES_FOC_VEL_ADC=y
+CONFIG_INDUSTRY_FOC=y
+CONFIG_INDUSTRY_FOC_FLOAT=y
+CONFIG_INPUT=y
+CONFIG_INPUT_BUTTONS=y
+CONFIG_INPUT_BUTTONS_LOWER=y
+CONFIG_INTELHEX_BINARY=y
+CONFIG_LIBM=y
+CONFIG_MAX_TASKS=4
+CONFIG_MOTOR=y
+CONFIG_MOTOR_FOC=y
+CONFIG_MOTOR_FOC_TRACE=y
+CONFIG_MQ_MAXMSGSIZE=5
+CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_RAM_SIZE=22528
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_START_DAY=14
+CONFIG_START_MONTH=10
+CONFIG_START_YEAR=2014
+CONFIG_STM32_ADC1_ANIOC_TRIGGER=1
+CONFIG_STM32_ADC1_DMA=y
+CONFIG_STM32_ADC1_DMA_CFG=1
+CONFIG_STM32_ADC1_INJECTED_CHAN=3
+CONFIG_STM32_DMA1=y
+CONFIG_STM32_DMA2=y
+CONFIG_STM32_DMAMUX1=y
+CONFIG_STM32_FOC=y
+CONFIG_STM32_FOC_FOC0=y
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_TIM1_CH1MODE=0
+CONFIG_STM32_TIM1_CH2MODE=0
+CONFIG_STM32_TIM1_CH3MODE=0
+CONFIG_STM32_TIM1_MODE=2
+CONFIG_STM32_USART2=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART2_SERIAL_CONSOLE=y
+CONFIG_USART2_TXDMA=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
diff --git a/boards/arm/stm32/nucleo-g431rb/include/board.h b/boards/arm/stm32/nucleo-g431rb/include/board.h
index d7049a2..030ba13 100644
--- a/boards/arm/stm32/nucleo-g431rb/include/board.h
+++ b/boards/arm/stm32/nucleo-g431rb/include/board.h
@@ -242,4 +242,49 @@
#define ADC1_DMA_CHAN DMAMAP_DMA12_ADC1_0 /* DMA1 */
+/* USART2 */
+
+#define DMACHAN_USART2_TX DMAMAP_DMA12_USART2TX_0 /* DMA1 */
+#define DMACHAN_USART2_RX DMAMAP_DMA12_USART2RX_0 /* DMA1 */
+
+#ifdef CONFIG_BOARD_STM32_IHM16M1
+
+/* Configuration specific for the X-NUCLEO-IHM16M1 expansion board with
+ * the STSPIN830 driver.
+ */
+
+/* TIM1 configuration *******************************************************/
+
+# define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1 /* TIM1 CH1 - PA8 - U high */
+# define GPIO_TIM1_CH2OUT GPIO_TIM1_CH2OUT_1 /* TIM1 CH2 - PA9 - V high */
+# define GPIO_TIM1_CH3OUT GPIO_TIM1_CH3OUT_1 /* TIM1 CH3 - PA10 - W high */
+# define GPIO_TIM1_CH4OUT 0 /* not used as output */
+
+/* UVW ENABLE */
+
+# define GPIO_FOC_EN_U (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
+ GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN13)
+# define GPIO_FOC_EN_V (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
+ GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN14)
+# define GPIO_FOC_EN_W (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
+ GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN15)
+
+/* EN_FAULT */
+
+# define GPIO_FOC_ENFAULT (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz| \
+ GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN12)
+
+/* Debug pins */
+
+# define GPIO_FOC_DEBUG0 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
+ GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN8)
+# define GPIO_FOC_DEBUG1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
+ GPIO_OUTPUT_CLEAR|GPIO_PORTB|GPIO_PIN9)
+# define GPIO_FOC_DEBUG2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
+ GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN6)
+# define GPIO_FOC_DEBUG3 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
+ GPIO_OUTPUT_CLEAR|GPIO_PORTA|GPIO_PIN12)
+
+#endif /* CONFIG_BOARD_STM32_IHM16M1 */
+
#endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_INCLUDE_BOARD_H */
diff --git a/boards/arm/stm32/nucleo-g431rb/src/Make.defs b/boards/arm/stm32/nucleo-g431rb/src/Make.defs
index f55b633..5861195 100644
--- a/boards/arm/stm32/nucleo-g431rb/src/Make.defs
+++ b/boards/arm/stm32/nucleo-g431rb/src/Make.defs
@@ -37,6 +37,7 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
+ifneq ($(CONFIG_STM32_FOC),y)
ifeq ($(CONFIG_PWM),y)
CSRCS += stm32_pwm.c
endif
@@ -44,6 +45,11 @@ endif
ifeq ($(CONFIG_ADC),y)
CSRCS += stm32_adc.c
endif
+endif
+
+ifeq ($(CONFIG_BOARD_STM32_IHM16M1),y)
+CSRCS += stm32_foc_ihm16m1.c
+endif
DEPPATH += --dep-path board
VPATH += :board
diff --git a/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h b/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h
index 557c953..92154be 100644
--- a/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h
+++ b/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h
@@ -131,4 +131,16 @@ int stm32_pwm_setup(void);
int stm32_adc_setup(void);
#endif
+/****************************************************************************
+ * Name: stm32_foc_setup
+ *
+ * Description:
+ * Initialize FOC peripheral for the board.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32_FOC
+int stm32_foc_setup(void);
+#endif
+
#endif /* __BOARDS_ARM_STM32_NUCLEO_G431RB_SRC_NUCLEO_G431RB_H */
diff --git a/boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c b/boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c
index 182ff7f..7e7ad76 100644
--- a/boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c
+++ b/boards/arm/stm32/nucleo-g431rb/src/stm32_bringup.c
@@ -102,6 +102,16 @@ int stm32_bringup(void)
}
#endif
+#ifdef CONFIG_STM32_FOC
+ /* Initialize and register the FOC device - must be before ADC setup */
+
+ ret = stm32_foc_setup();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: stm32_foc_setup failed: %d\n", ret);
+ }
+#endif
+
#ifdef CONFIG_ADC
/* Initialize ADC and register the ADC driver. */
diff --git a/boards/arm/stm32/nucleo-g431rb/src/stm32_foc_ihm16m1.c b/boards/arm/stm32/nucleo-g431rb/src/stm32_foc_ihm16m1.c
new file mode 100644
index 0000000..2d18934
--- /dev/null
+++ b/boards/arm/stm32/nucleo-g431rb/src/stm32_foc_ihm16m1.c
@@ -0,0 +1,183 @@
+/****************************************************************************
+ * boards/arm/stm32/nucleo-g431rb/src/stm32_foc_ihm16m1.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "stm32_ihm16m1.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define CURRENT_SAMPLE_TIME ADC_SMPR_24p5
+#define VBUS_SAMPLE_TIME ADC_SMPR_640p5
+#define POT_SAMPLE_TIME ADC_SMPR_640p5
+
+/* ADC1 channels used in this example */
+
+#define ADC1_INJECTED (CONFIG_MOTOR_FOC_SHUNTS)
+
+#ifdef CONFIG_BOARD_STM32_IHM16M1_VBUS
+# define IHM16M1_VBUS 1
+#else
+# define IHM16M1_VBUS 0
+#endif
+
+#ifdef CONFIG_BOARD_STM32_IHM16M1_POT
+# define IHM16M1_POT 1
+#else
+# define IHM16M1_POT 0
+#endif
+
+#define ADC1_REGULAR (IHM16M1_VBUS + IHM16M1_POT)
+#define ADC1_NCHANNELS (ADC1_INJECTED + ADC1_REGULAR)
+
+/* Check ADC1 configuration */
+
+#if ADC1_INJECTED != CONFIG_STM32_ADC1_INJECTED_CHAN
+# error
+#endif
+
+#if CONFIG_STM32_ADC1_RESOLUTION != 0
+# error
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* FOC ADC configration:
+ * - Current Phase V -> ADC1 INJ1 -> ADC1_IN2 (PA1)
+ * - Current Phase U -> ADC1 INJ2 -> ADC1_IN12 (PB1)
+ * - Current Phase W -> ADC1 INJ3 -> ADC1_IN15 (PB0)
+ * optional:
+ * - VBUS -> ADC1 REG -> ADC1_IN1 (PA0)
+ * - POT -> ADC1 REG -> ADC1_IN8 (PC2)
+ *
+ * TIM1 PWM configuration:
+ * - Phase U high -> TIM1_CH1 (PA8)
+ * - Phase V high -> TIM1_CH2 (PA9)
+ * - Phase W high -> TIM1_CH3 (PA10)
+ *
+ */
+
+static uint8_t g_adc1_chan[] =
+{
+#ifdef CONFIG_BOARD_STM32_IHM16M1_VBUS
+ 1, /* ADC1 REG - VBUS */
+#endif
+#ifdef CONFIG_BOARD_STM32_IHM16M1_POT
+ 8, /* ADC1 REG - POT */
+#endif
+ 2, /* ADC1 INJ1 - PHASE 1 */
+#if CONFIG_MOTOR_FOC_SHUNTS == 3
+ 12, /* ADC1 INJ2 - PHASE 2 */
+ 15, /* ADC1 INJ3 - PHASE 3 */
+#endif
+};
+
+static uint32_t g_adc1_pins[] =
+{
+#ifdef CONFIG_BOARD_STM32_IHM16M1_VBUS
+ GPIO_ADC1_IN1,
+#endif
+#ifdef CONFIG_BOARD_STM32_IHM16M1_POT
+ GPIO_ADC1_IN8,
+#endif
+ GPIO_ADC1_IN2,
+#if CONFIG_MOTOR_FOC_SHUNTS > 1
+ GPIO_ADC1_IN12,
+#endif
+#if CONFIG_MOTOR_FOC_SHUNTS > 2
+ GPIO_ADC1_IN15,
+#endif
+};
+
+/* ADC1 sample time configuration */
+
+static adc_channel_t g_adc1_stime[] =
+{
+#ifdef CONFIG_BOARD_STM32_IHM16M1_VBUS
+ {
+ .channel = 1,
+ .sample_time = VBUS_SAMPLE_TIME
+ },
+#endif
+#ifdef CONFIG_BOARD_STM32_IHM16M1_POT
+ {
+ .channel = 8,
+ .sample_time = POT_SAMPLE_TIME
+ },
+#endif
+ {
+ .channel = 2,
+ .sample_time = CURRENT_SAMPLE_TIME
+ },
+#if CONFIG_MOTOR_FOC_SHUNTS > 1
+ {
+ .channel = 12,
+ .sample_time = CURRENT_SAMPLE_TIME
+ },
+#endif
+#if CONFIG_MOTOR_FOC_SHUNTS > 2
+ {
+ .channel = 15,
+ .sample_time = CURRENT_SAMPLE_TIME
+ },
+#endif
+};
+
+/* Board specific ADC configuration for FOC */
+
+static struct stm32_foc_adc_s g_adc_cfg =
+{
+ .chan = g_adc1_chan,
+ .pins = g_adc1_pins,
+ .stime = g_adc1_stime,
+ .nchan = ADC1_NCHANNELS,
+ .regch = ADC1_REGULAR,
+ .intf = 1
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_foc_setup
+ *
+ * Description:
+ * Initialize FOC driver.
+ *
+ * This function should be call by board_app_initialize().
+ *
+ * Returned Value:
+ * 0 on success, a negated errno value on failure
+ *
+ ****************************************************************************/
+
+int stm32_foc_setup(void)
+{
+ return board_ihm16m1_initialize(&g_adc_cfg);
+}
[incubator-nuttx] 01/03: nucleo-g431rb: fixes for button
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 5e59d3753ab72fafb2339cb64895e4b712960bca
Author: raiden00pl <ra...@railab.me>
AuthorDate: Wed Apr 14 15:08:25 2021 +0200
nucleo-g431rb: fixes for button
---
boards/arm/stm32/nucleo-g431rb/src/Make.defs | 4 ++++
boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h | 18 ++++++++++++++++++
boards/arm/stm32/nucleo-g431rb/src/stm32_buttons.c | 4 ++--
3 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/boards/arm/stm32/nucleo-g431rb/src/Make.defs b/boards/arm/stm32/nucleo-g431rb/src/Make.defs
index 23c2705..f55b633 100644
--- a/boards/arm/stm32/nucleo-g431rb/src/Make.defs
+++ b/boards/arm/stm32/nucleo-g431rb/src/Make.defs
@@ -29,6 +29,10 @@ else
CSRCS += stm32_userleds.c
endif
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += stm32_buttons.c
+endif
+
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
diff --git a/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h b/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h
index 5c51f0a..557c953 100644
--- a/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h
+++ b/boards/arm/stm32/nucleo-g431rb/src/nucleo-g431rb.h
@@ -57,6 +57,24 @@
#define LED_DRIVER_PATH "/dev/userleds"
+/* Button definitions *******************************************************/
+
+/* The Nucleo G431RB supports two buttons; only one button is controllable
+ * by software:
+ *
+ * B1 USER: user button connected to the I/O PC13 of the STM32G431RB.
+ * B2 RESET: push button connected to NRST is used to RESET the
+ * STM32G431R.
+ *
+ * NOTE that EXTI interrupts are configured.
+ */
+
+#define MIN_IRQBUTTON BUTTON_USER
+#define MAX_IRQBUTTON BUTTON_USER
+#define NUM_IRQBUTTONS 1
+
+#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13)
+
/* PWM */
#define NUCLEOG431RB_PWMTIMER 1
diff --git a/boards/arm/stm32/nucleo-g431rb/src/stm32_buttons.c b/boards/arm/stm32/nucleo-g431rb/src/stm32_buttons.c
index 0f5ef87..d166420 100644
--- a/boards/arm/stm32/nucleo-g431rb/src/stm32_buttons.c
+++ b/boards/arm/stm32/nucleo-g431rb/src/stm32_buttons.c
@@ -74,11 +74,11 @@ uint32_t board_button_initialize(void)
uint32_t board_buttons(void)
{
- /* Check the state of the USER button. A LOW value means that the key is
+ /* Check the state of the USER button. A HIGH value means that the key is
* pressed.
*/
- return stm32_gpioread(GPIO_BTN_USER) ? 0 : BUTTON_USER_BIT;
+ return stm32_gpioread(GPIO_BTN_USER) ? BUTTON_USER_BIT : 0;
}
/****************************************************************************
[incubator-nuttx] 02/03: boards/stm32/common: add support for
IHM16M1
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 25240d9114e7edb247a2d32bf3d934a482c599c8
Author: raiden00pl <ra...@railab.me>
AuthorDate: Wed Apr 14 15:01:43 2021 +0200
boards/stm32/common: add support for IHM16M1
---
boards/arm/stm32/common/Kconfig | 18 +
boards/arm/stm32/common/include/stm32_ihm16m1.h | 59 ++++
boards/arm/stm32/common/src/Make.defs | 4 +
boards/arm/stm32/common/src/stm32_ihm16m1.c | 445 ++++++++++++++++++++++++
4 files changed, 526 insertions(+)
diff --git a/boards/arm/stm32/common/Kconfig b/boards/arm/stm32/common/Kconfig
index fa52591..4eef44c 100644
--- a/boards/arm/stm32/common/Kconfig
+++ b/boards/arm/stm32/common/Kconfig
@@ -50,6 +50,24 @@ config BOARD_STM32_IHM08M1_POT
endif # BOARD_STM32_IHM08M1
+menuconfig BOARD_STM32_IHM16M1
+ bool "X-NUCLEO-IHM16M1 board support"
+ default n
+ ---help---
+ Board based on the STSPIN830 three-phase brushless motor driver.
+
+if BOARD_STM32_IHM16M1
+
+config BOARD_STM32_IHM16M1_VBUS
+ bool "X-NUCLEO-IHM16M1 board VBUS sense"
+ default n
+
+config BOARD_STM32_IHM16M1_POT
+ bool "X-NUCLEO-IHM16M1 board POT support"
+ default n
+
+endif # BOARD_STM32_IHM16M1
+
endif # STM32_FOC
endif # BOARD_STM32_COMMON
diff --git a/boards/arm/stm32/common/include/stm32_ihm16m1.h b/boards/arm/stm32/common/include/stm32_ihm16m1.h
new file mode 100644
index 0000000..f96520c
--- /dev/null
+++ b/boards/arm/stm32/common/include/stm32_ihm16m1.h
@@ -0,0 +1,59 @@
+/****************************************************************************
+ * boards/arm/stm32/common/include/stm32_ihm16m1.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __STM32_IHM16M1_H
+#define __STM32_IHM16M1_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "stm32_foc.h"
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_ihm16m1_initialize
+ ****************************************************************************/
+
+int board_ihm16m1_initialize(FAR struct stm32_foc_adc_s *adc_cfg);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif // __STM32_IHM16M1_H
diff --git a/boards/arm/stm32/common/src/Make.defs b/boards/arm/stm32/common/src/Make.defs
index 736279d..45e91b6 100644
--- a/boards/arm/stm32/common/src/Make.defs
+++ b/boards/arm/stm32/common/src/Make.defs
@@ -122,6 +122,10 @@ ifeq ($(CONFIG_BOARD_STM32_IHM08M1),y)
CSRCS += stm32_ihm08m1.c
endif
+ifeq ($(CONFIG_BOARD_STM32_IHM16M1),y)
+ CSRCS += stm32_ihm16m1.c
+endif
+
DEPPATH += --dep-path src
VPATH += :src
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src)
diff --git a/boards/arm/stm32/common/src/stm32_ihm16m1.c b/boards/arm/stm32/common/src/stm32_ihm16m1.c
new file mode 100644
index 0000000..606f9bb
--- /dev/null
+++ b/boards/arm/stm32/common/src/stm32_ihm16m1.c
@@ -0,0 +1,445 @@
+/****************************************************************************
+ * boards/arm/stm32/common/src/stm32_ihm16m1.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <arch/board/board.h>
+
+#include <nuttx/analog/adc.h>
+
+#include "stm32_foc.h"
+#include "stm32_gpio.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if CONFIG_MOTOR_FOC_SHUNTS != 3
+# error For now ony 3-shunts configuration is supported
+#endif
+
+/* Configuration specific for STSPIN830:
+ * 1. PWM enable on high
+ * 2. PWM channels must have positive polarity
+ * 3. EN_FAULT enable on high, configured as open drain output
+ */
+
+#if CONFIG_STM32_TIM1_CH1POL != 0
+# error
+#endif
+#if CONFIG_STM32_TIM1_CH2POL != 0
+# error
+#endif
+#if CONFIG_STM32_TIM1_CH3POL != 0
+# error
+#endif
+
+/* Aux ADC needs DMA enabled */
+
+#ifdef CONFIG_ADC
+# ifndef CONFIG_STM32_ADC1_DMA
+# error
+# endif
+#endif
+
+/* REVISIT: dead-time STSPIN830 */
+
+#define PWM_DEADTIME (20)
+#define PWM_DEADTIME_NS (500)
+
+/* Devpath for FOC driver */
+
+#define FOC_DEVPATH "/dev/foc0"
+
+/* Board parameters:
+ * Current shunt resistance = 0.33
+ * Current sense gain = -1.53 (inverted current)
+ * Vbus sense gain = 0.0522
+ * Vbus min = 7V
+ * Vbus max = 45V
+ * Iout max = 1.5A RMS
+ * IPHASE_RATIO = 1/(R_shunt*gain) = -1.98
+ * ADC_REF_VOLTAGE = 3.3
+ * ADC_VAL_MAX = 4095
+ * ADC_TO_VOLT = ADC_REF_VOLTAGE / ADC_VAL_MAX
+ * IPHASE_ADC = IPHASE_RATIO * ADC_TO_VOLT = -0.00160
+ * VBUS_RATIO = 1/VBUS_gain = 16
+ */
+
+/* Center-aligned PWM duty cycle limits */
+
+#define MAX_DUTY_B16 ftob16(0.95f)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Protototypes
+ ****************************************************************************/
+
+static int board_foc_setup(FAR struct foc_dev_s *dev);
+static int board_foc_shutdown(FAR struct foc_dev_s *dev);
+static int board_foc_calibration(FAR struct foc_dev_s *dev, bool state);
+static int board_foc_fault_clear(FAR struct foc_dev_s *dev);
+static int board_foc_pwm_start(FAR struct foc_dev_s *dev, bool state);
+static int board_foc_current_get(FAR struct foc_dev_s *dev,
+ FAR int16_t *curr_raw,
+ FAR foc_current_t *curr);
+#ifdef CONFIG_MOTOR_FOC_TRACE
+static int board_foc_trace_init(FAR struct foc_dev_s *dev);
+static void board_foc_trace(FAR struct foc_dev_s *dev, int type, bool state);
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Board specific ops */
+
+static struct stm32_foc_board_ops_s g_stm32_foc_board_ops =
+{
+ .setup = board_foc_setup,
+ .shutdown = board_foc_shutdown,
+ .calibration = board_foc_calibration,
+ .fault_clear = board_foc_fault_clear,
+ .pwm_start = board_foc_pwm_start,
+ .current_get = board_foc_current_get,
+#ifdef CONFIG_MOTOR_FOC_TRACE
+ .trace_init = board_foc_trace_init,
+ .trace = board_foc_trace
+#endif
+};
+
+/* Board specific data */
+
+static struct stm32_foc_board_data_s g_stm32_foc_board_data =
+{
+ .adc_cfg = NULL, /* board-specific */
+ .duty_max = (MAX_DUTY_B16),
+ .pwm_dt = (PWM_DEADTIME),
+ .pwm_dt_ns = (PWM_DEADTIME_NS)
+};
+
+/* Board specific configuration */
+
+static struct stm32_foc_board_s g_stm32_foc_board =
+{
+ .data = &g_stm32_foc_board_data,
+ .ops = &g_stm32_foc_board_ops,
+};
+
+/* Global pointer to the upper FOC driver */
+
+static FAR struct foc_dev_s *g_foc_dev = NULL;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_foc_setup
+ ****************************************************************************/
+
+static int board_foc_setup(FAR struct foc_dev_s *dev)
+{
+ DEBUGASSERT(dev);
+
+ UNUSED(dev);
+
+ /* Configure EN_U, EN_V, EN_W, EN_FAULT GPIOs */
+
+ stm32_configgpio(GPIO_FOC_EN_U);
+ stm32_configgpio(GPIO_FOC_EN_V);
+ stm32_configgpio(GPIO_FOC_EN_W);
+
+ stm32_configgpio(GPIO_FOC_ENFAULT);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: board_foc_shutdown
+ ****************************************************************************/
+
+static int board_foc_shutdown(FAR struct foc_dev_s *dev)
+{
+ DEBUGASSERT(dev);
+
+ UNUSED(dev);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: board_foc_calibration
+ ****************************************************************************/
+
+static int board_foc_calibration(FAR struct foc_dev_s *dev, bool state)
+{
+ DEBUGASSERT(dev);
+
+ UNUSED(dev);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: board_foc_fault_clear
+ ****************************************************************************/
+
+static int board_foc_fault_clear(FAR struct foc_dev_s *dev)
+{
+ DEBUGASSERT(dev);
+
+ UNUSED(dev);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: board_foc_pwm_start
+ ****************************************************************************/
+
+static int board_foc_pwm_start(FAR struct foc_dev_s *dev, bool state)
+{
+ DEBUGASSERT(dev);
+
+ UNUSED(dev);
+
+ /* Set/reset ENABLE input */
+
+ stm32_gpiowrite(GPIO_FOC_ENFAULT, state);
+
+ /* Enable/disable UVW output */
+
+ stm32_gpiowrite(GPIO_FOC_EN_U, state);
+ stm32_gpiowrite(GPIO_FOC_EN_V, state);
+ stm32_gpiowrite(GPIO_FOC_EN_W, state);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: board_foc_current_get
+ ****************************************************************************/
+
+static int board_foc_current_get(FAR struct foc_dev_s *dev,
+ FAR int16_t *curr_raw,
+ FAR foc_current_t *curr)
+{
+ DEBUGASSERT(dev);
+ DEBUGASSERT(curr_raw);
+ DEBUGASSERT(curr);
+
+ /* Get currents */
+
+ curr[0] = curr_raw[0];
+ curr[1] = curr_raw[1];
+ curr[2] = curr_raw[2];
+
+ return OK;
+}
+
+#ifdef CONFIG_MOTOR_FOC_TRACE
+/****************************************************************************
+ * Name: board_foc_trace_init
+ ****************************************************************************/
+
+static int board_foc_trace_init(FAR struct foc_dev_s *dev)
+{
+ DEBUGASSERT(dev);
+
+ UNUSED(dev);
+
+ /* Configure debug GPIO */
+
+ stm32_configgpio(GPIO_FOC_DEBUG0);
+ stm32_configgpio(GPIO_FOC_DEBUG1);
+ stm32_configgpio(GPIO_FOC_DEBUG2);
+ stm32_configgpio(GPIO_FOC_DEBUG3);
+
+ return OK;
+}
+
+/****************************************************************************
+ * Name: board_foc_trace
+ ****************************************************************************/
+
+static void board_foc_trace(FAR struct foc_dev_s *dev, int type, bool state)
+{
+ DEBUGASSERT(dev);
+
+ UNUSED(dev);
+
+ switch (type)
+ {
+ case FOC_TRACE_NONE:
+ {
+ break;
+ }
+
+ case FOC_TRACE_PARAMS:
+ {
+ stm32_gpiowrite(GPIO_FOC_DEBUG0, state);
+
+ break;
+ }
+
+ case FOC_TRACE_STATE:
+ {
+ stm32_gpiowrite(GPIO_FOC_DEBUG1, state);
+
+ break;
+ }
+
+ case FOC_TRACE_NOTIFIER:
+ {
+ stm32_gpiowrite(GPIO_FOC_DEBUG2, state);
+
+ break;
+ }
+
+ case FOC_TRACE_LOWER:
+ {
+ stm32_gpiowrite(GPIO_FOC_DEBUG3, state);
+
+ break;
+ }
+
+ default:
+ {
+ mtrerr("board_foc_trace type=%d not supported!\n", type);
+ DEBUGASSERT(0);
+ }
+ }
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_ihm16m1_initialize
+ ****************************************************************************/
+
+int board_ihm16m1_initialize(FAR struct stm32_foc_adc_s *adc_cfg)
+{
+ FAR struct foc_dev_s *foc = NULL;
+ int ret = OK;
+
+ DEBUGASSERT(adc_cfg);
+
+ /* Initialize only once */
+
+ if (g_foc_dev == NULL)
+ {
+ /* Connect ADC configuration */
+
+ g_stm32_foc_board_data.adc_cfg = adc_cfg;
+
+ /* Initialize arch specific FOC lower-half */
+
+ foc = stm32_foc_initialize(0, &g_stm32_foc_board);
+ if (foc == NULL)
+ {
+ ret = -errno;
+ mtrerr("Failed to initialize STM32 FOC: %d\n", ret);
+ goto errout;
+ }
+
+ DEBUGASSERT(foc->lower);
+
+ /* Register FOC device */
+
+ ret = foc_register(FOC_DEVPATH, foc);
+ if (ret < 0)
+ {
+ mtrerr("Failed to register FOC device: %d\n", ret);
+ goto errout;
+ }
+
+ /* Store pointer to driver */
+
+ g_foc_dev = foc;
+ }
+
+errout:
+ return ret;
+}
+
+#ifdef CONFIG_ADC
+/****************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ * Initialize ADC and register the ADC driver.
+ *
+ ****************************************************************************/
+
+int stm32_adc_setup(void)
+{
+ FAR struct adc_dev_s *adc = NULL;
+ int ret = OK;
+ static bool initialized = false;
+
+ /* Initialize only once */
+
+ if (initialized == false)
+ {
+ if (g_foc_dev == NULL)
+ {
+ mtrerr("Failed to get g_foc_dev device\n");
+ ret = -EACCES;
+ goto errout;
+ }
+
+ /* Register regular channel ADC */
+
+ adc = stm32_foc_adcget(g_foc_dev);
+ if (adc == NULL)
+ {
+ mtrerr("Failed to get ADC device: %d\n", ret);
+ goto errout;
+ }
+
+ ret = adc_register("/dev/adc0", adc);
+ if (ret < 0)
+ {
+ mtrerr("adc_register failed: %d\n", ret);
+ goto errout;
+ }
+
+ initialized = true;
+ }
+
+errout:
+ return ret;
+}
+#endif