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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/08/26 03:57:15 UTC

[incubator-nuttx] 03/04: xtensa: Fix allocation of FPU registers in exception context

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit fe2d37aa3395adb24f1d01a23af39a06e089d78a
Author: Gustavo Henrique Nihei <gu...@espressif.com>
AuthorDate: Thu Aug 25 15:36:53 2022 -0300

    xtensa: Fix allocation of FPU registers in exception context
    
    Signed-off-by: Gustavo Henrique Nihei <gu...@espressif.com>
---
 arch/xtensa/include/irq.h               | 12 ++++++++----
 arch/xtensa/src/common/xtensa_coproc.S  |  4 ++--
 arch/xtensa/src/common/xtensa_fpucmp.c  |  2 +-
 arch/xtensa/src/common/xtensa_tcbinfo.c |  2 +-
 4 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h
index d23a07ae25..ad1dc4c686 100644
--- a/arch/xtensa/include/irq.h
+++ b/arch/xtensa/include/irq.h
@@ -144,13 +144,17 @@
 #if XCHAL_CP_NUM > 0
   /* FPU first address must align to CP align size. */
 
-#  define XCPTCONTEXT_REGS  ALIGN_UP(_REG_CP_START, XCHAL_TOTAL_SA_ALIGN / 4)
-#  define XCPTCONTEXT_SIZE  ((4 * XCPTCONTEXT_REGS) + XTENSA_CP_SA_SIZE + 0x20)
+#  define COMMON_CTX_REGS   ALIGN_UP(_REG_CP_START, XCHAL_TOTAL_SA_ALIGN / 4)
+#  define COPROC_CTX_REGS   (XTENSA_CP_SA_SIZE / 4)
+#  define RESERVE_REGS      8
+#  define XCPTCONTEXT_REGS  (COMMON_CTX_REGS + COPROC_CTX_REGS + RESERVE_REGS)
 #else
-#  define XCPTCONTEXT_REGS  _REG_CP_START
-#  define XCPTCONTEXT_SIZE  ((4 * XCPTCONTEXT_REGS) + 0x20)
+#  define RESERVE_REGS      8
+#  define XCPTCONTEXT_REGS  (_REG_CP_START + RESERVE_REGS)
 #endif
 
+#define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/xtensa/src/common/xtensa_coproc.S b/arch/xtensa/src/common/xtensa_coproc.S
index ed5c92dabc..f355267c4c 100644
--- a/arch/xtensa/src/common/xtensa_coproc.S
+++ b/arch/xtensa/src/common/xtensa_coproc.S
@@ -105,7 +105,7 @@ _xtensa_coproc_saoffsets:
 	* ---------------------------------------------------| <- SP
 	*/
 
-	addi		a3, sp, (4 * XCPTCONTEXT_REGS)
+	addi		a3, sp, (4 * COMMON_CTX_REGS)
 
 	/* CPENABLE should show which CPs are enabled. */
 
@@ -216,7 +216,7 @@ Ldone1:
 	* ---------------------------------------------------| <- SP
 	*/
 
-	addi		a3, a2, (4 * XCPTCONTEXT_REGS)
+	addi		a3, a2, (4 * COMMON_CTX_REGS)
 
 	rsr		a8, CPENABLE			/* a8 = which CPs are enabled */
 	beqz		a8, Ldone2			/* Quick exit if none */
diff --git a/arch/xtensa/src/common/xtensa_fpucmp.c b/arch/xtensa/src/common/xtensa_fpucmp.c
index c4aaa09b22..bc32a9f79c 100644
--- a/arch/xtensa/src/common/xtensa_fpucmp.c
+++ b/arch/xtensa/src/common/xtensa_fpucmp.c
@@ -60,7 +60,7 @@ bool up_fpucmp(const void *saveregs1, const void *saveregs2)
   const uint32_t *regs1 = saveregs1;
   const uint32_t *regs2 = saveregs2;
 
-  return memcmp(&regs1[XCPTCONTEXT_REGS], &regs2[XCPTCONTEXT_REGS],
+  return memcmp(&regs1[COMMON_CTX_REGS], &regs2[COMMON_CTX_REGS],
                 XTENSA_CP_SA_SIZE) == 0;
 }
 #endif /* CONFIG_ARCH_FPU */
diff --git a/arch/xtensa/src/common/xtensa_tcbinfo.c b/arch/xtensa/src/common/xtensa_tcbinfo.c
index 836930d5a3..882da9abaa 100644
--- a/arch/xtensa/src/common/xtensa_tcbinfo.c
+++ b/arch/xtensa/src/common/xtensa_tcbinfo.c
@@ -64,7 +64,7 @@ const struct tcbinfo_s g_tcbinfo =
   .pri_off   = TCB_PRI_OFF,
   .name_off  = TCB_NAME_OFF,
   .regs_off  = TCB_REGS_OFF,
-  .basic_num = XCPTCONTEXT_REGS,
+  .basic_num = COMMON_CTX_REGS,
   .total_num = XCPTCONTEXT_REGS,
   {
     .p = g_reg_offs,