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Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2023/01/19 22:12:50 UTC
[GitHub] [nuttx] acassis opened a new pull request, #8198: esp32s2: Add support to efuse
acassis opened a new pull request, #8198:
URL: https://github.com/apache/nuttx/pull/8198
## Summary
Add support to efuse
## Impact
User will be able to use efuse
## Testing
esp32s2-saola-1
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[GitHub] [nuttx] pkarashchenko commented on a diff in pull request #8198: esp32s2: Add support to efuse
Posted by GitBox <gi...@apache.org>.
pkarashchenko commented on code in PR #8198:
URL: https://github.com/apache/nuttx/pull/8198#discussion_r1082244712
##########
arch/xtensa/src/esp32s2/esp32s2_efuse_table.c:
##########
@@ -0,0 +1,1347 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32s2/esp32s2_efuse_table.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <stdint.h>
+#include <stddef.h>
+#include <nuttx/efuse/efuse.h>
+#include "esp32s2_efuse.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+static const efuse_desc_t WR_DIS[] =
Review Comment:
How this table is used? I do not see references to arrays in this PR
##########
arch/xtensa/src/esp32s2/esp32s2_efuse.c:
##########
@@ -0,0 +1,712 @@
+/****************************************************************************
+ * arch/xtensa/src/esp32s2/esp32s2_efuse.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <debug.h>
+#include <errno.h>
+#include <assert.h>
+#include <string.h>
+#include <nuttx/efuse/efuse.h>
+#include <arch/esp32s2/chip.h>
+
+#include "xtensa.h"
+#include "hardware/esp32s2_soc.h"
+#include "hardware/esp32s2_efuse.h"
+
+#include "esp32s2_clockconfig.h"
+#include "esp32s2_efuse.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define EFUSE_CONF_WRITE 0x5a5a /* eFuse_pgm_op_ena, force no rd/wr dis. */
+#define EFUSE_CONF_READ 0x5aa5 /* eFuse_read_op_ena, release force. */
+#define EFUSE_CMD_PGM 0x02 /* Command to program. */
+#define EFUSE_CMD_READ 0x01 /* Command to read. */
+#define EFUSE_MAX_BLK_LEN 256 /* Max length of efuse block. */
+
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static uint32_t g_start_efuse_rdreg[] =
+{
+ EFUSE_RD_WR_DIS_REG,
+ EFUSE_RD_MAC_SPI_SYS_0_REG,
+ EFUSE_RD_SYS_DATA_PART1_0_REG,
+ EFUSE_RD_USR_DATA0_REG,
+ EFUSE_RD_KEY0_DATA0_REG,
+ EFUSE_RD_KEY1_DATA0_REG,
+ EFUSE_RD_KEY2_DATA0_REG,
+ EFUSE_RD_KEY3_DATA0_REG,
+ EFUSE_RD_KEY4_DATA0_REG,
+ EFUSE_RD_KEY5_DATA0_REG,
+ EFUSE_RD_SYS_DATA_PART2_0_REG
+};
+
+static uint32_t g_start_efuse_wrreg[] =
+{
+ EFUSE_PGM_DATA0_REG,
+ EFUSE_PGM_CHECK_VALUE0_REG
+};
+
+/****************************************************************************
+ * Private Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: esp32s2_efuse_set_timing
+ *
+ * Description:
+ * Modify both EFUSE_CLK_REG and EFUSE_DAC_CONF_REG
+ * for match ABP frequency in Hertz.
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success. Otherwise -1 (ERROR).
+ *
+ ****************************************************************************/
+
+static int esp32s2_efuse_set_timing(void)
+{
+ uint32_t apb_freq_mhz = esp_clk_apb_freq() / 1000000;
+ uint32_t clk_sel0;
+ uint32_t clk_sel1;
+ uint32_t dac_clk_div;
+
+ if (apb_freq_mhz <= 26)
+ {
+ clk_sel0 = 250;
+ clk_sel1 = 255;
+ dac_clk_div = 52;
+ }
+ else
+ {
+ if (apb_freq_mhz <= 40)
+ {
+ clk_sel0 = 160;
+ clk_sel1 = 255;
+ dac_clk_div = 80;
+ }
+ else
+ {
+ clk_sel0 = 80;
+ clk_sel1 = 128;
+ dac_clk_div = 100;
+ }
+ }
+
+ modifyreg32(EFUSE_DAC_CONF_REG, EFUSE_DAC_CLK_DIV, dac_clk_div);
+ modifyreg32(EFUSE_CLK_REG, EFUSE_DAC_CLK_DIV, clk_sel0);
+ modifyreg32(EFUSE_CLK_REG, EFUSE_DAC_CLK_DIV, clk_sel1);
+ return OK;
+}
+
+/****************************************************************************
+ * Name: esp32s2_efuse_get_mask
+ *
+ * Description:
+ * Return mask with required the number of ones with shift.
+ *
+ * Input Parameters:
+ * bit_count - The number of bits required
+ * shift - The shift of programmed as, '1' or '0'
+ *
+ * Returned Value:
+ * The mask with required the number of ones with shift.
+ *
+ ****************************************************************************/
+
+static uint32_t esp32s2_efuse_get_mask(uint32_t bit_count, uint32_t shift)
+{
+ uint32_t mask;
+
+ if (bit_count != 32)
+ {
+ mask = (1 << bit_count) - 1;
+ }
+ else
+ {
+ mask = 0xffffffff;
+ }
+
+ return mask << shift;
+}
+
+/****************************************************************************
+ * Name: esp32s2_efuse_get_reg_num
+ *
+ * Description:
+ * Returns the number of bits in the register.
+ *
+ * Input Parameters:
+ * bit_offset - Start bit in block
+ * bit_count - The number of bits required
+ * i_reg - The register number in the block
+ *
+ * Returned Value:
+ * The register number in the array.
+ *
+ ****************************************************************************/
+
+static int esp32s2_efuse_get_reg_num(int bit_offset,
+ int bit_count, int i_reg)
+{
+ uint32_t bit_start = (bit_offset % EFUSE_MAX_BLK_LEN);
+ int num_reg = i_reg + bit_start / 32;
+
+ if (num_reg > (bit_start + bit_count - 1) / 32)
+ {
+ return -1;
+ }
+
+ return num_reg;
+}
+
+/****************************************************************************
+ * Name: esp32s2_efuse_get_count_bits_in_reg
+ *
+ * Description:
+ * Returns the number of bits in the register.
+ *
+ * Input Parameters:
+ * bit_offset - Start bit in block
+ * bit_count - The number of bits required
+ * i_reg - The register number in the block
+ *
+ * Returned Value:
+ * The number of bits in the register.
+ *
+ ****************************************************************************/
+
+static int esp32s2_efuse_get_count_bits_in_reg(int bit_offset,
+ int bit_count, int i_reg)
+{
+ int ret_count = 0;
+ int num_reg = 0;
+ int bit_start = (bit_offset % EFUSE_MAX_BLK_LEN);
+ int last_used_bit = (bit_start + bit_count - 1);
+
+ for (int num_bit = bit_start; num_bit <= last_used_bit; ++num_bit)
+ {
+ ++ret_count;
+ if ((((num_bit + 1) % 32) == 0) || (num_bit == last_used_bit))
+ {
+ if (i_reg == num_reg)
+ {
+ return ret_count;
+ }
+
+ ++num_reg;
+ ret_count = 0;
+ }
+ }
+
+ return 0;
+}
+
+/****************************************************************************
+ * Name: esp32s2_efuse_get_field_size
+ *
+ * Description:
+ * Get the length of the field in bits.
+ *
+ * Input Parameters:
+ * field - Pointer to the structure describing the efuse field
+ *
+ * Returned Value:
+ * The length of the field in bits.
+ *
+ ****************************************************************************/
+
+static int esp32s2_efuse_get_field_size(const efuse_desc_t *field[])
+{
+ int bits_counter = 0;
+
+ if (field != NULL)
+ {
+ int i = 0;
+
+ while (field[i] != NULL)
+ {
+ bits_counter += field[i]->bit_count;
+ ++i;
+ }
+ }
+
+ return bits_counter;
+}
+
+/****************************************************************************
+ * Name: esp32s2_efuse_check_range_of_bits
+ *
+ * Description:
+ * Check range of bits for any coding scheme.
+ *
+ * Input Parameters:
+ * offset_in_bits - The bit offset related to beginning of efuse
+ * size_bits - The length of bit field
+ *
+ * Returned Value:
+ * True is returned if the bits offset matched. Otherwise false.
+ *
+ ****************************************************************************/
+
+static bool esp32s2_efuse_check_range_of_bits(int offset_in_bits,
+ int size_bits)
+{
+ int blk_offset = offset_in_bits % EFUSE_MAX_BLK_LEN;
+ int max_num_bit = blk_offset + size_bits;
+
+ if (max_num_bit > EFUSE_MAX_BLK_LEN)
+ {
+ return false;
+ }
+
+ return true;
Review Comment:
```suggestion
return max_num_bit <= EFUSE_MAX_BLK_LEN;
```
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[GitHub] [nuttx] xiaoxiang781216 merged pull request #8198: esp32s2: Add support to efuse
Posted by GitBox <gi...@apache.org>.
xiaoxiang781216 merged PR #8198:
URL: https://github.com/apache/nuttx/pull/8198
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