[mynewt-nimble] branch master updated: porting/nimble/hal_timer: fix NVIC setup

[ha...@apache.org]

This is an automated email from the ASF dual-hosted git repository.

hauke pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git


The following commit(s) were added to refs/heads/master by this push:
     new f815866  porting/nimble/hal_timer: fix NVIC setup
f815866 is described below

commit f8158661edf50871b298b000aba9fc4c42ef6d85
Author: Hauke Petersen <ha...@fu-berlin.de>
AuthorDate: Tue Feb 23 10:23:11 2021 +0100

    porting/nimble/hal_timer: fix NVIC setup
    
    In commit ab53154 platform specific handling of the NVIC setup
    for the timers priority and vectors were revertet. This leads
    to problems on certain platforms, e.g. interrupt priority
    related hard-faults on RIOT. This commit re-introduces the
    platform specific setup.
---
 porting/nimble/src/hal_timer.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/porting/nimble/src/hal_timer.c b/porting/nimble/src/hal_timer.c
index 568ab0c..aa78bf9 100644
--- a/porting/nimble/src/hal_timer.c
+++ b/porting/nimble/src/hal_timer.c
@@ -538,8 +538,14 @@ hal_timer_init(int timer_num, void *cfg)
 
     /* Disable IRQ, set priority and set vector in table */
     NVIC_DisableIRQ(irq_num);
+#ifndef RIOT_VERSION
     NVIC_SetPriority(irq_num, (1 << __NVIC_PRIO_BITS) - 1);
+#endif
+#if MYNEWT
     NVIC_SetVector(irq_num, (uint32_t)irq_isr);
+#else
+    ble_npl_hw_set_isr(irq_num, irq_isr);
+#endif
 
     return 0;