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Posted to commits@nuttx.apache.org by "pussuw (via GitHub)" <gi...@apache.org> on 2024/04/17 10:21:37 UTC

[PR] imx9_boot.c: Add initialization of pin interrupts [nuttx]

pussuw opened a new pull request, #12170:
URL: https://github.com/apache/nuttx/pull/12170

   ## Summary
   Add initialization of pin interrupt support to generic platform code.
   
   Also, fix a bug in enabling the pin interrupt. The value of pinset.icr should not be shifted, as when it is tested below against e.g. GPIO_INT_LOWLEVEL which is already shifted to the correct position.
   ## Impact
   Pin interrupts are initialized.
   ## Testing
   imx93-evk
   


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Re: [PR] imx9_boot.c: Add initialization of pin interrupts [nuttx]

Posted by "xiaoxiang781216 (via GitHub)" <gi...@apache.org>.
xiaoxiang781216 merged PR #12170:
URL: https://github.com/apache/nuttx/pull/12170


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Re: [PR] imx9_boot.c: Add initialization of pin interrupts [nuttx]

Posted by "pussuw (via GitHub)" <gi...@apache.org>.
pussuw commented on code in PR #12170:
URL: https://github.com/apache/nuttx/pull/12170#discussion_r1568927538


##########
arch/arm64/src/imx9/imx9_gpioirq.c:
##########
@@ -236,8 +236,8 @@ int imx9_gpioirq_enable(gpio_pinset_t pinset)
 {
   uint32_t  port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   uint32_t  pin  = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
-  uint32_t  icr  = (pinset & GPIO_INTCFG_MASK) >> GPIO_INTCFG_SHIFT;
   uint32_t  both = (pinset & GPIO_INTBOTHCFG_MASK) >> GPIO_INTBOTHCFG_SHIFT;
+  uint32_t  icr  = (pinset & GPIO_INTCFG_MASK);

Review Comment:
   It is explained by the commit message.
   
   There is a set of tests below, like:
   
   ```
     if (both)
       {
         regval |= IMX9_GPIO_ICRN_BOTH;
       }
     else if (icr == GPIO_INT_LOWLEVEL)
       {
         regval |= IMX9_GPIO_ICRN_ZERO;
       }
     else if (icr == GPIO_INT_HIGHLEVEL)
       {
         regval |= IMX9_GPIO_ICRN_ONE;
       }
     else if (icr == GPIO_INT_RISINGEDGE)
       {
         regval |= IMX9_GPIO_ICRN_RISING;
       }
     else /* GPIO_INT_FALLINGEDGE */
       {
         regval |= IMX9_GPIO_ICRN_FALLING;
       }
   ```
   
   The values are already shifted left:
   
   ```
   #define GPIO_INTCFG_SHIFT      (9)      /* Bits 9-10: Interrupt edge/level configuration */
   #define GPIO_INTCFG_MASK       (0x3 << GPIO_INTCFG_SHIFT)
   #  define GPIO_INT_LOWLEVEL    (0 << GPIO_INTCFG_SHIFT)
   #  define GPIO_INT_HIGHLEVEL   (1 << GPIO_INTCFG_SHIFT)
   #  define GPIO_INT_RISINGEDGE  (2 << GPIO_INTCFG_SHIFT)
   #  define GPIO_INT_FALLINGEDGE (3 << GPIO_INTCFG_SHIFT)
   ```
   
   So if icr is shifted left `uint32_t icr = (pinset & GPIO_INTCFG_MASK) >> GPIO_INTCFG_SHIFT;`, we are comparing the wrong bits



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Re: [PR] imx9_boot.c: Add initialization of pin interrupts [nuttx]

Posted by "acassis (via GitHub)" <gi...@apache.org>.
acassis commented on code in PR #12170:
URL: https://github.com/apache/nuttx/pull/12170#discussion_r1568918380


##########
arch/arm64/src/imx9/imx9_gpioirq.c:
##########
@@ -236,8 +236,8 @@ int imx9_gpioirq_enable(gpio_pinset_t pinset)
 {
   uint32_t  port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
   uint32_t  pin  = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
-  uint32_t  icr  = (pinset & GPIO_INTCFG_MASK) >> GPIO_INTCFG_SHIFT;
   uint32_t  both = (pinset & GPIO_INTBOTHCFG_MASK) >> GPIO_INTBOTHCFG_SHIFT;
+  uint32_t  icr  = (pinset & GPIO_INTCFG_MASK);

Review Comment:
   Why was GPIO_INTCFG_SHIFT dropped?



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