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Posted to commits@mynewt.apache.org by ad...@apache.org on 2016/06/16 21:41:09 UTC
[01/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Repository: incubator-mynewt-site
Updated Branches:
refs/heads/master e302582dc -> 69f466b51
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/buspirate.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/buspirate.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/buspirate.c
deleted file mode 100755
index 554d3e0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/buspirate.c
+++ /dev/null
@@ -1,1128 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Michal Demin *
- * based on usbprog.c and arm-jtag-ew.c *
- * Several fixes by R. Diez in 2013. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/interface.h>
-#include <jtag/commands.h>
-
-#include <termios.h>
-#include <fcntl.h>
-#include <sys/ioctl.h>
-
-#undef DEBUG_SERIAL
-/*#define DEBUG_SERIAL */
-static int buspirate_execute_queue(void);
-static int buspirate_init(void);
-static int buspirate_quit(void);
-
-static void buspirate_end_state(tap_state_t state);
-static void buspirate_state_move(void);
-static void buspirate_path_move(int num_states, tap_state_t *path);
-static void buspirate_runtest(int num_cycles);
-static void buspirate_scan(bool ir_scan, enum scan_type type,
- uint8_t *buffer, int scan_size, struct scan_command *command);
-static void buspirate_stableclocks(int num_cycles);
-
-#define CMD_UNKNOWN 0x00
-#define CMD_PORT_MODE 0x01
-#define CMD_FEATURE 0x02
-#define CMD_READ_ADCS 0x03
-/*#define CMD_TAP_SHIFT 0x04 // old protocol */
-#define CMD_TAP_SHIFT 0x05
-#define CMD_ENTER_OOCD 0x06
-#define CMD_UART_SPEED 0x07
-#define CMD_JTAG_SPEED 0x08
-
-/* Not all OSes have this speed defined */
-#if !defined(B1000000)
-#define B1000000 0010010
-#endif
-
-enum {
- MODE_HIZ = 0,
- MODE_JTAG = 1, /* push-pull outputs */
- MODE_JTAG_OD = 2, /* open-drain outputs */
-};
-
-enum {
- FEATURE_LED = 0x01,
- FEATURE_VREG = 0x02,
- FEATURE_TRST = 0x04,
- FEATURE_SRST = 0x08,
- FEATURE_PULLUP = 0x10
-};
-
-enum {
- ACTION_DISABLE = 0,
- ACTION_ENABLE = 1
-};
-
-enum {
- SERIAL_NORMAL = 0,
- SERIAL_FAST = 1
-};
-
-static const cc_t SHORT_TIMEOUT = 1; /* Must be at least 1. */
-static const cc_t NORMAL_TIMEOUT = 10;
-
-static int buspirate_fd = -1;
-static int buspirate_pinmode = MODE_JTAG_OD;
-static int buspirate_baudrate = SERIAL_NORMAL;
-static int buspirate_vreg;
-static int buspirate_pullup;
-static char *buspirate_port;
-
-static enum tap_state last_tap_state = TAP_RESET;
-
-
-/* TAP interface */
-static void buspirate_tap_init(void);
-static int buspirate_tap_execute(void);
-static void buspirate_tap_append(int tms, int tdi);
-static void buspirate_tap_append_scan(int length, uint8_t *buffer,
- struct scan_command *command);
-static void buspirate_tap_make_space(int scan, int bits);
-
-static void buspirate_reset(int trst, int srst);
-
-/* low level interface */
-static void buspirate_jtag_reset(int);
-static void buspirate_jtag_enable(int);
-static unsigned char buspirate_jtag_command(int, char *, int);
-static void buspirate_jtag_set_speed(int, char);
-static void buspirate_jtag_set_mode(int, char);
-static void buspirate_jtag_set_feature(int, char, char);
-static void buspirate_jtag_get_adcs(int);
-
-/* low level HW communication interface */
-static int buspirate_serial_open(char *port);
-static int buspirate_serial_setspeed(int fd, char speed, cc_t timeout);
-static int buspirate_serial_write(int fd, char *buf, int size);
-static int buspirate_serial_read(int fd, char *buf, int size);
-static void buspirate_serial_close(int fd);
-static void buspirate_print_buffer(char *buf, int size);
-
-static int buspirate_execute_queue(void)
-{
- /* currently processed command */
- struct jtag_command *cmd = jtag_command_queue;
- int scan_size;
- enum scan_type type;
- uint8_t *buffer;
-
- while (cmd) {
- switch (cmd->type) {
- case JTAG_RUNTEST:
- DEBUG_JTAG_IO("runtest %i cycles, end in %s",
- cmd->cmd.runtest->num_cycles,
- tap_state_name(cmd->cmd.runtest
- ->end_state));
- buspirate_end_state(cmd->cmd.runtest
- ->end_state);
- buspirate_runtest(cmd->cmd.runtest
- ->num_cycles);
- break;
- case JTAG_TLR_RESET:
- DEBUG_JTAG_IO("statemove end in %s",
- tap_state_name(cmd->cmd.statemove
- ->end_state));
- buspirate_end_state(cmd->cmd.statemove
- ->end_state);
- buspirate_state_move();
- break;
- case JTAG_PATHMOVE:
- DEBUG_JTAG_IO("pathmove: %i states, end in %s",
- cmd->cmd.pathmove->num_states,
- tap_state_name(cmd->cmd.pathmove
- ->path[cmd->cmd.pathmove
- ->num_states - 1]));
- buspirate_path_move(cmd->cmd.pathmove
- ->num_states,
- cmd->cmd.pathmove->path);
- break;
- case JTAG_SCAN:
- DEBUG_JTAG_IO("scan end in %s",
- tap_state_name(cmd->cmd.scan
- ->end_state));
-
- buspirate_end_state(cmd->cmd.scan
- ->end_state);
-
- scan_size = jtag_build_buffer(cmd->cmd.scan,
- &buffer);
- type = jtag_scan_type(cmd->cmd.scan);
- buspirate_scan(cmd->cmd.scan->ir_scan, type,
- buffer, scan_size, cmd->cmd.scan);
-
- break;
- case JTAG_RESET:
- DEBUG_JTAG_IO("reset trst: %i srst %i",
- cmd->cmd.reset->trst, cmd->cmd.reset->srst);
-
- /* flush buffers, so we can reset */
- buspirate_tap_execute();
-
- if (cmd->cmd.reset->trst == 1)
- tap_set_state(TAP_RESET);
- buspirate_reset(cmd->cmd.reset->trst,
- cmd->cmd.reset->srst);
- break;
- case JTAG_SLEEP:
- DEBUG_JTAG_IO("sleep %i", cmd->cmd.sleep->us);
- buspirate_tap_execute();
- jtag_sleep(cmd->cmd.sleep->us);
- break;
- case JTAG_STABLECLOCKS:
- DEBUG_JTAG_IO("stable clock %i cycles", cmd->cmd.stableclocks->num_cycles);
- buspirate_stableclocks(cmd->cmd.stableclocks->num_cycles);
- break;
- default:
- LOG_ERROR("BUG: unknown JTAG command type encountered");
- exit(-1);
- }
-
- cmd = cmd->next;
- }
-
- return buspirate_tap_execute();
-}
-
-
-/* Returns true if successful, false if error. */
-
-static bool read_and_discard_all_data(const int fd)
-{
- /* LOG_INFO("Discarding any stale data from a previous connection..."); */
-
- bool was_msg_already_printed = false;
-
- for ( ; ; ) {
- char buffer[1024]; /* Any size will do, it's a trade-off between stack size and performance. */
-
- const ssize_t read_count = read(fd, buffer, sizeof(buffer));
-
- if (read_count == 0) {
- /* This is the "end of file" or "connection closed at the other end" condition. */
- return true;
- }
-
- if (read_count > 0) {
- if (!was_msg_already_printed) {
- LOG_INFO("Some stale data from a previous connection was discarded.");
- was_msg_already_printed = true;
- }
-
- continue;
- }
-
- assert(read_count == -1); /* According to the specification. */
-
- const int errno_code = errno;
-
- if (errno_code == EINTR)
- continue;
-
- if (errno_code == EAGAIN ||
- errno_code == EWOULDBLOCK) {
- /* We know that the file descriptor has been opened with O_NONBLOCK or O_NDELAY,
- and these codes mean that there is no data to read at present. */
- return true;
- }
-
- /* Some other error has occurred. */
- return false;
- }
-}
-
-
-static int buspirate_init(void)
-{
- if (buspirate_port == NULL) {
- LOG_ERROR("You need to specify the serial port!");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- buspirate_fd = buspirate_serial_open(buspirate_port);
- if (buspirate_fd == -1) {
- LOG_ERROR("Could not open serial port");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- /* The Operating System or the device itself may deliver stale data from the last connection,
- so discard all available bytes right after the new connection has been established.
- After all, we are implementing here a master/slave protocol, so the slave should have nothing
- to say until the master sends the first command.
-
- In the past, there was a tcflush() call in buspirate_serial_setspeed(), but that
- was not enough. I guess you must actively read from the serial port to trigger any
- data collection from the device and/or lower USB layers. If you disable the serial port
- read timeout (if you set SHORT_TIMEOUT to 0), then the discarding does not work any more.
-
- Note that we are lowering the serial port timeout for this first read operation,
- otherwise the normal initialisation would be delayed for too long. */
-
- if (-1 == buspirate_serial_setspeed(buspirate_fd, SERIAL_NORMAL, SHORT_TIMEOUT)) {
- LOG_ERROR("Error configuring the serial port.");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- if (!read_and_discard_all_data(buspirate_fd)) {
- LOG_ERROR("Error while attempting to discard any stale data right after establishing the connection.");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- if (-1 == buspirate_serial_setspeed(buspirate_fd, SERIAL_NORMAL, NORMAL_TIMEOUT)) {
- LOG_ERROR("Error configuring the serial port.");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- buspirate_jtag_enable(buspirate_fd);
-
- if (buspirate_baudrate != SERIAL_NORMAL)
- buspirate_jtag_set_speed(buspirate_fd, SERIAL_FAST);
-
- LOG_INFO("Buspirate Interface ready!");
-
- buspirate_tap_init();
- buspirate_jtag_set_mode(buspirate_fd, buspirate_pinmode);
- buspirate_jtag_set_feature(buspirate_fd, FEATURE_VREG,
- (buspirate_vreg == 1) ? ACTION_ENABLE : ACTION_DISABLE);
- buspirate_jtag_set_feature(buspirate_fd, FEATURE_PULLUP,
- (buspirate_pullup == 1) ? ACTION_ENABLE : ACTION_DISABLE);
- buspirate_reset(0, 0);
-
- return ERROR_OK;
-}
-
-static int buspirate_quit(void)
-{
- LOG_INFO("Shutting down buspirate.");
- buspirate_jtag_set_mode(buspirate_fd, MODE_HIZ);
-
- buspirate_jtag_set_speed(buspirate_fd, SERIAL_NORMAL);
- buspirate_jtag_reset(buspirate_fd);
-
- buspirate_serial_close(buspirate_fd);
-
- if (buspirate_port) {
- free(buspirate_port);
- buspirate_port = NULL;
- }
- return ERROR_OK;
-}
-
-/* openocd command interface */
-COMMAND_HANDLER(buspirate_handle_adc_command)
-{
- if (buspirate_fd == -1)
- return ERROR_OK;
-
- /* send the command */
- buspirate_jtag_get_adcs(buspirate_fd);
-
- return ERROR_OK;
-
-}
-
-COMMAND_HANDLER(buspirate_handle_vreg_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (atoi(CMD_ARGV[0]) == 1)
- buspirate_vreg = 1;
- else if (atoi(CMD_ARGV[0]) == 0)
- buspirate_vreg = 0;
- else
- LOG_ERROR("usage: buspirate_vreg <1|0>");
-
- return ERROR_OK;
-
-}
-
-COMMAND_HANDLER(buspirate_handle_pullup_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (atoi(CMD_ARGV[0]) == 1)
- buspirate_pullup = 1;
- else if (atoi(CMD_ARGV[0]) == 0)
- buspirate_pullup = 0;
- else
- LOG_ERROR("usage: buspirate_pullup <1|0>");
-
- return ERROR_OK;
-
-}
-
-COMMAND_HANDLER(buspirate_handle_led_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (atoi(CMD_ARGV[0]) == 1) {
- /* enable led */
- buspirate_jtag_set_feature(buspirate_fd, FEATURE_LED,
- ACTION_ENABLE);
- } else if (atoi(CMD_ARGV[0]) == 0) {
- /* disable led */
- buspirate_jtag_set_feature(buspirate_fd, FEATURE_LED,
- ACTION_DISABLE);
- } else {
- LOG_ERROR("usage: buspirate_led <1|0>");
- }
-
- return ERROR_OK;
-
-}
-
-COMMAND_HANDLER(buspirate_handle_mode_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (CMD_ARGV[0][0] == 'n')
- buspirate_pinmode = MODE_JTAG;
- else if (CMD_ARGV[0][0] == 'o')
- buspirate_pinmode = MODE_JTAG_OD;
- else
- LOG_ERROR("usage: buspirate_mode <normal|open-drain>");
-
- return ERROR_OK;
-
-}
-
-COMMAND_HANDLER(buspirate_handle_speed_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (CMD_ARGV[0][0] == 'n')
- buspirate_baudrate = SERIAL_NORMAL;
- else if (CMD_ARGV[0][0] == 'f')
- buspirate_baudrate = SERIAL_FAST;
- else
- LOG_ERROR("usage: buspirate_speed <normal|fast>");
-
- return ERROR_OK;
-
-}
-
-COMMAND_HANDLER(buspirate_handle_port_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (buspirate_port == NULL)
- buspirate_port = strdup(CMD_ARGV[0]);
-
- return ERROR_OK;
-
-}
-
-static const struct command_registration buspirate_command_handlers[] = {
- {
- .name = "buspirate_adc",
- .handler = &buspirate_handle_adc_command,
- .mode = COMMAND_EXEC,
- .help = "reads voltages on adc pins",
- },
- {
- .name = "buspirate_vreg",
- .usage = "<1|0>",
- .handler = &buspirate_handle_vreg_command,
- .mode = COMMAND_CONFIG,
- .help = "changes the state of voltage regulators",
- },
- {
- .name = "buspirate_pullup",
- .usage = "<1|0>",
- .handler = &buspirate_handle_pullup_command,
- .mode = COMMAND_CONFIG,
- .help = "changes the state of pullup",
- },
- {
- .name = "buspirate_led",
- .usage = "<1|0>",
- .handler = &buspirate_handle_led_command,
- .mode = COMMAND_EXEC,
- .help = "changes the state of led",
- },
- {
- .name = "buspirate_speed",
- .usage = "<normal|fast>",
- .handler = &buspirate_handle_speed_command,
- .mode = COMMAND_CONFIG,
- .help = "speed of the interface",
- },
- {
- .name = "buspirate_mode",
- .usage = "<normal|open-drain>",
- .handler = &buspirate_handle_mode_command,
- .mode = COMMAND_CONFIG,
- .help = "pin mode of the interface",
- },
- {
- .name = "buspirate_port",
- .usage = "/dev/ttyUSB0",
- .handler = &buspirate_handle_port_command,
- .mode = COMMAND_CONFIG,
- .help = "name of the serial port to open",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct jtag_interface buspirate_interface = {
- .name = "buspirate",
- .execute_queue = buspirate_execute_queue,
- .commands = buspirate_command_handlers,
- .init = buspirate_init,
- .quit = buspirate_quit
-};
-
-/*************** jtag execute commands **********************/
-static void buspirate_end_state(tap_state_t state)
-{
- if (tap_is_state_stable(state))
- tap_set_end_state(state);
- else {
- LOG_ERROR("BUG: %i is not a valid end state", state);
- exit(-1);
- }
-}
-
-static void buspirate_state_move(void)
-{
- int i = 0, tms = 0;
- uint8_t tms_scan = tap_get_tms_path(tap_get_state(),
- tap_get_end_state());
- int tms_count = tap_get_tms_path_len(tap_get_state(),
- tap_get_end_state());
-
- for (i = 0; i < tms_count; i++) {
- tms = (tms_scan >> i) & 1;
- buspirate_tap_append(tms, 0);
- }
-
- tap_set_state(tap_get_end_state());
-}
-
-static void buspirate_path_move(int num_states, tap_state_t *path)
-{
- int i;
-
- for (i = 0; i < num_states; i++) {
- if (tap_state_transition(tap_get_state(), false) == path[i]) {
- buspirate_tap_append(0, 0);
- } else if (tap_state_transition(tap_get_state(), true)
- == path[i]) {
- buspirate_tap_append(1, 0);
- } else {
- LOG_ERROR("BUG: %s -> %s isn't a valid "
- "TAP transition",
- tap_state_name(tap_get_state()),
- tap_state_name(path[i]));
- exit(-1);
- }
-
- tap_set_state(path[i]);
- }
-
- tap_set_end_state(tap_get_state());
-}
-
-static void buspirate_runtest(int num_cycles)
-{
- int i;
-
- tap_state_t saved_end_state = tap_get_end_state();
-
- /* only do a state_move when we're not already in IDLE */
- if (tap_get_state() != TAP_IDLE) {
- buspirate_end_state(TAP_IDLE);
- buspirate_state_move();
- }
-
- for (i = 0; i < num_cycles; i++)
- buspirate_tap_append(0, 0);
-
- DEBUG_JTAG_IO("runtest: cur_state %s end_state %s",
- tap_state_name(tap_get_state()),
- tap_state_name(tap_get_end_state()));
-
- /* finish in end_state */
- buspirate_end_state(saved_end_state);
- if (tap_get_state() != tap_get_end_state())
- buspirate_state_move();
-}
-
-static void buspirate_scan(bool ir_scan, enum scan_type type,
- uint8_t *buffer, int scan_size, struct scan_command *command)
-{
- tap_state_t saved_end_state;
-
- buspirate_tap_make_space(1, scan_size+8);
- /* is 8 correct ? (2 moves = 16) */
-
- saved_end_state = tap_get_end_state();
-
- buspirate_end_state(ir_scan ? TAP_IRSHIFT : TAP_DRSHIFT);
-
- /* Only move if we're not already there */
- if (tap_get_state() != tap_get_end_state())
- buspirate_state_move();
-
- buspirate_tap_append_scan(scan_size, buffer, command);
-
- /* move to PAUSE */
- buspirate_tap_append(0, 0);
-
- /* restore the saved state */
- buspirate_end_state(saved_end_state);
- tap_set_state(ir_scan ? TAP_IRPAUSE : TAP_DRPAUSE);
-
- if (tap_get_state() != tap_get_end_state())
- buspirate_state_move();
-}
-
-static void buspirate_stableclocks(int num_cycles)
-{
- int i;
- int tms = (tap_get_state() == TAP_RESET ? 1 : 0);
-
- buspirate_tap_make_space(0, num_cycles);
-
- for (i = 0; i < num_cycles; i++)
- buspirate_tap_append(tms, 0);
-}
-
-/************************* TAP related stuff **********/
-
-/* This buffer size matches the maximum CMD_TAP_SHIFT bit length in the Bus Pirate firmware,
- look for constant 0x2000 in OpenOCD.c . */
-#define BUSPIRATE_BUFFER_SIZE 1024
-
-/* The old value of 32 scans was not enough to achieve near 100% utilisation ratio
- for the current BUSPIRATE_BUFFER_SIZE value of 1024.
- With 128 scans I am getting full USB 2.0 high speed packets (512 bytes long) when
- using the JtagDue firmware on the Arduino Due instead of the Bus Pirate, which
- amounts approximately to a 10% overall speed gain. Bigger packets should also
- benefit the Bus Pirate, but the speed difference is much smaller.
- Unfortunately, each 512-byte packet is followed by a 329-byte one, which is not ideal.
- However, increasing BUSPIRATE_BUFFER_SIZE for the benefit of the JtagDue would
- make it incompatible with the Bus Pirate firmware. */
-#define BUSPIRATE_MAX_PENDING_SCANS 128
-
-static char tms_chain[BUSPIRATE_BUFFER_SIZE]; /* send */
-static char tdi_chain[BUSPIRATE_BUFFER_SIZE]; /* send */
-static int tap_chain_index;
-
-struct pending_scan_result /* this was stolen from arm-jtag-ew */
-{
- int first; /* First bit position in tdo_buffer to read */
- int length; /* Number of bits to read */
- struct scan_command *command; /* Corresponding scan command */
- uint8_t *buffer;
-};
-
-static struct pending_scan_result
-tap_pending_scans[BUSPIRATE_MAX_PENDING_SCANS];
-static int tap_pending_scans_num;
-
-static void buspirate_tap_init(void)
-{
- tap_chain_index = 0;
- tap_pending_scans_num = 0;
-}
-
-static int buspirate_tap_execute(void)
-{
- static const int CMD_TAP_SHIFT_HEADER_LEN = 3;
-
- char tmp[4096];
- uint8_t *in_buf;
- int i;
- int fill_index = 0;
- int ret;
- int bytes_to_send;
-
- if (tap_chain_index <= 0)
- return ERROR_OK;
-
- LOG_DEBUG("executing tap num bits = %i scans = %i",
- tap_chain_index, tap_pending_scans_num);
-
- bytes_to_send = DIV_ROUND_UP(tap_chain_index, 8);
-
- tmp[0] = CMD_TAP_SHIFT; /* this command expects number of bits */
- tmp[1] = (char)(tap_chain_index >> 8); /* high */
- tmp[2] = (char)(tap_chain_index); /* low */
-
- fill_index = CMD_TAP_SHIFT_HEADER_LEN;
- for (i = 0; i < bytes_to_send; i++) {
- tmp[fill_index] = tdi_chain[i];
- fill_index++;
- tmp[fill_index] = tms_chain[i];
- fill_index++;
- }
-
- /* jlink.c calls the routine below, which may be useful for debugging purposes.
- For example, enabling this allows you to compare the log outputs from jlink.c
- and from this module for JTAG development or troubleshooting purposes. */
- if (false) {
- last_tap_state = jtag_debug_state_machine(tms_chain, tdi_chain,
- tap_chain_index, last_tap_state);
- }
-
- ret = buspirate_serial_write(buspirate_fd, tmp, CMD_TAP_SHIFT_HEADER_LEN + bytes_to_send*2);
- if (ret != bytes_to_send*2+CMD_TAP_SHIFT_HEADER_LEN) {
- LOG_ERROR("error writing :(");
- return ERROR_JTAG_DEVICE_ERROR;
- }
-
- ret = buspirate_serial_read(buspirate_fd, tmp, bytes_to_send + CMD_TAP_SHIFT_HEADER_LEN);
- if (ret != bytes_to_send + CMD_TAP_SHIFT_HEADER_LEN) {
- LOG_ERROR("error reading");
- return ERROR_FAIL;
- }
- in_buf = (uint8_t *)(&tmp[CMD_TAP_SHIFT_HEADER_LEN]);
-
- /* parse the scans */
- for (i = 0; i < tap_pending_scans_num; i++) {
- uint8_t *buffer = tap_pending_scans[i].buffer;
- int length = tap_pending_scans[i].length;
- int first = tap_pending_scans[i].first;
- struct scan_command *command = tap_pending_scans[i].command;
-
- /* copy bits from buffer */
- buf_set_buf(in_buf, first, buffer, 0, length);
-
- /* return buffer to higher level */
- if (jtag_read_buffer(buffer, command) != ERROR_OK) {
- buspirate_tap_init();
- return ERROR_JTAG_QUEUE_FAILED;
- }
-
- free(buffer);
- }
- buspirate_tap_init();
- return ERROR_OK;
-}
-
-static void buspirate_tap_make_space(int scans, int bits)
-{
- int have_scans = BUSPIRATE_MAX_PENDING_SCANS - tap_pending_scans_num;
- int have_bits = BUSPIRATE_BUFFER_SIZE * 8 - tap_chain_index;
-
- if ((have_scans < scans) || (have_bits < bits))
- buspirate_tap_execute();
-}
-
-static void buspirate_tap_append(int tms, int tdi)
-{
- int chain_index;
-
- buspirate_tap_make_space(0, 1);
- chain_index = tap_chain_index / 8;
-
- if (chain_index < BUSPIRATE_BUFFER_SIZE) {
- int bit_index = tap_chain_index % 8;
- uint8_t bit = 1 << bit_index;
-
- if (0 == bit_index) {
- /* Let's say that the TAP shift operation wants to shift 9 bits,
- so we will be sending to the Bus Pirate a bit count of 9 but still
- full 16 bits (2 bytes) of shift data.
- If we don't clear all bits at this point, the last 7 bits will contain
- random data from the last buffer contents, which is not pleasant to the eye.
- Besides, the Bus Pirate (or some clone) may want to assert in debug builds
- that, after consuming all significant data bits, the rest of them are zero.
- Therefore, for aesthetic and for assert purposes, we clear all bits below. */
- tms_chain[chain_index] = 0;
- tdi_chain[chain_index] = 0;
- }
-
- if (tms)
- tms_chain[chain_index] |= bit;
- else
- tms_chain[chain_index] &= ~bit;
-
- if (tdi)
- tdi_chain[chain_index] |= bit;
- else
- tdi_chain[chain_index] &= ~bit;
-
- tap_chain_index++;
- } else {
- LOG_ERROR("tap_chain overflow, bad things will happen");
- /* Exit abruptly, like jlink.c does. After a buffer overflow we don't want
- to carry on, as data will be corrupt. Another option would be to return
- some error code at this point. */
- exit(-1);
- }
-}
-
-static void buspirate_tap_append_scan(int length, uint8_t *buffer,
- struct scan_command *command)
-{
- int i;
- tap_pending_scans[tap_pending_scans_num].length = length;
- tap_pending_scans[tap_pending_scans_num].buffer = buffer;
- tap_pending_scans[tap_pending_scans_num].command = command;
- tap_pending_scans[tap_pending_scans_num].first = tap_chain_index;
-
- for (i = 0; i < length; i++) {
- int tms = (i < length-1 ? 0 : 1);
- int tdi = (buffer[i/8] >> (i%8)) & 1;
- buspirate_tap_append(tms, tdi);
- }
- tap_pending_scans_num++;
-}
-
-/*************** jtag wrapper functions *********************/
-
-/* (1) assert or (0) deassert reset lines */
-static void buspirate_reset(int trst, int srst)
-{
- LOG_DEBUG("trst: %i, srst: %i", trst, srst);
-
- if (trst)
- buspirate_jtag_set_feature(buspirate_fd,
- FEATURE_TRST, ACTION_DISABLE);
- else
- buspirate_jtag_set_feature(buspirate_fd,
- FEATURE_TRST, ACTION_ENABLE);
-
- if (srst)
- buspirate_jtag_set_feature(buspirate_fd,
- FEATURE_SRST, ACTION_DISABLE);
- else
- buspirate_jtag_set_feature(buspirate_fd,
- FEATURE_SRST, ACTION_ENABLE);
-}
-
-/*************** jtag lowlevel functions ********************/
-static void buspirate_jtag_enable(int fd)
-{
- int ret;
- char tmp[21] = { [0 ... 20] = 0x00 };
- int done = 0;
- int cmd_sent = 0;
-
- LOG_DEBUG("Entering binary mode");
- buspirate_serial_write(fd, tmp, 20);
- usleep(10000);
-
- /* reads 1 to n "BBIO1"s and one "OCD1" */
- while (!done) {
- ret = buspirate_serial_read(fd, tmp, 4);
- if (ret != 4) {
- LOG_ERROR("Buspirate error. Is binary"
- "/OpenOCD support enabled?");
- exit(-1);
- }
- if (strncmp(tmp, "BBIO", 4) == 0) {
- ret = buspirate_serial_read(fd, tmp, 1);
- if (ret != 1) {
- LOG_ERROR("Buspirate did not answer correctly! "
- "Do you have correct firmware?");
- exit(-1);
- }
- if (tmp[0] != '1') {
- LOG_ERROR("Unsupported binary protocol");
- exit(-1);
- }
- if (cmd_sent == 0) {
- cmd_sent = 1;
- tmp[0] = CMD_ENTER_OOCD;
- ret = buspirate_serial_write(fd, tmp, 1);
- if (ret != 1) {
- LOG_ERROR("error reading");
- exit(-1);
- }
- }
- } else if (strncmp(tmp, "OCD1", 4) == 0)
- done = 1;
- else {
- LOG_ERROR("Buspirate did not answer correctly! "
- "Do you have correct firmware?");
- exit(-1);
- }
- }
-
-}
-
-static void buspirate_jtag_reset(int fd)
-{
- char tmp[5];
-
- tmp[0] = 0x00; /* exit OCD1 mode */
- buspirate_serial_write(fd, tmp, 1);
- usleep(10000);
- /* We ignore the return value here purposly, nothing we can do */
- buspirate_serial_read(fd, tmp, 5);
- if (strncmp(tmp, "BBIO1", 5) == 0) {
- tmp[0] = 0x0F; /* reset BP */
- buspirate_serial_write(fd, tmp, 1);
- } else
- LOG_ERROR("Unable to restart buspirate!");
-}
-
-static void buspirate_jtag_set_speed(int fd, char speed)
-{
- int ret;
- char tmp[2];
- char ack[2];
-
- ack[0] = 0xAA;
- ack[1] = 0x55;
-
- tmp[0] = CMD_UART_SPEED;
- tmp[1] = speed;
- buspirate_jtag_command(fd, tmp, 2);
-
- /* here the adapter changes speed, we need follow */
- if (-1 == buspirate_serial_setspeed(fd, speed, NORMAL_TIMEOUT)) {
- LOG_ERROR("Error configuring the serial port.");
- exit(-1);
- }
-
- buspirate_serial_write(fd, ack, 2);
- ret = buspirate_serial_read(fd, tmp, 2);
- if (ret != 2) {
- LOG_ERROR("Buspirate did not ack speed change");
- exit(-1);
- }
- if ((tmp[0] != CMD_UART_SPEED) || (tmp[1] != speed)) {
- LOG_ERROR("Buspirate did not reply as expected to the speed change command");
- exit(-1);
- }
- LOG_INFO("Buspirate switched to %s mode",
- (speed == SERIAL_NORMAL) ? "normal" : "FAST");
-}
-
-
-static void buspirate_jtag_set_mode(int fd, char mode)
-{
- char tmp[2];
- tmp[0] = CMD_PORT_MODE;
- tmp[1] = mode;
- buspirate_jtag_command(fd, tmp, 2);
-}
-
-static void buspirate_jtag_set_feature(int fd, char feat, char action)
-{
- char tmp[3];
- tmp[0] = CMD_FEATURE;
- tmp[1] = feat; /* what */
- tmp[2] = action; /* action */
- buspirate_jtag_command(fd, tmp, 3);
-}
-
-static void buspirate_jtag_get_adcs(int fd)
-{
- uint8_t tmp[10];
- uint16_t a, b, c, d;
- tmp[0] = CMD_READ_ADCS;
- buspirate_jtag_command(fd, (char *)tmp, 1);
- a = tmp[2] << 8 | tmp[3];
- b = tmp[4] << 8 | tmp[5];
- c = tmp[6] << 8 | tmp[7];
- d = tmp[8] << 8 | tmp[9];
-
- LOG_INFO("ADC: ADC_Pin = %.02f VPullup = %.02f V33 = %.02f "
- "V50 = %.02f",
- ((float)a)/155.1515, ((float)b)/155.1515,
- ((float)c)/155.1515, ((float)d)/155.1515);
-}
-
-static unsigned char buspirate_jtag_command(int fd,
- char *cmd, int cmdlen)
-{
- int res;
- int len = 0;
-
- res = buspirate_serial_write(fd, cmd, cmdlen);
-
- if ((cmd[0] == CMD_UART_SPEED)
- || (cmd[0] == CMD_PORT_MODE)
- || (cmd[0] == CMD_FEATURE)
- || (cmd[0] == CMD_JTAG_SPEED))
- return 1;
-
- if (res == cmdlen) {
- switch (cmd[0]) {
- case CMD_READ_ADCS:
- len = 10; /* 2*sizeof(char)+4*sizeof(uint16_t) */
- break;
- case CMD_TAP_SHIFT:
- len = cmdlen;
- break;
- default:
- LOG_INFO("Wrong !");
- }
- res = buspirate_serial_read(fd, cmd, len);
- if (res > 0)
- return (unsigned char)cmd[1];
- else
- return -1;
- } else
- return -1;
- return 0;
-}
-
-/* low level serial port */
-/* TODO add support for WIN32 and others ! */
-static int buspirate_serial_open(char *port)
-{
- int fd;
- fd = open(buspirate_port, O_RDWR | O_NOCTTY | O_NDELAY);
- return fd;
-}
-
-
-/* Returns -1 on error. */
-
-static int buspirate_serial_setspeed(int fd, char speed, cc_t timeout)
-{
- struct termios t_opt;
- speed_t baud = (speed == SERIAL_FAST) ? B1000000 : B115200;
-
- /* set the serial port parameters */
- fcntl(fd, F_SETFL, 0);
- if (0 != tcgetattr(fd, &t_opt))
- return -1;
-
- if (0 != cfsetispeed(&t_opt, baud))
- return -1;
-
- if (0 != cfsetospeed(&t_opt, baud))
- return -1;
-
- t_opt.c_cflag |= (CLOCAL | CREAD);
- t_opt.c_cflag &= ~PARENB;
- t_opt.c_cflag &= ~CSTOPB;
- t_opt.c_cflag &= ~CSIZE;
- t_opt.c_cflag |= CS8;
- t_opt.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
-
- /* The serial port may have been configured for human interaction with
- the Bus Pirate console, but OpenOCD is going to use a binary protocol,
- so make sure to turn off any CR/LF translation and the like. */
- t_opt.c_iflag &= ~(IXON | IXOFF | IXANY | INLCR | ICRNL);
-
- t_opt.c_oflag &= ~OPOST;
- t_opt.c_cc[VMIN] = 0;
- t_opt.c_cc[VTIME] = timeout;
-
- /* Note that, in the past, TCSANOW was used below instead of TCSADRAIN,
- and CMD_UART_SPEED did not work properly then, at least with
- the Bus Pirate v3.5 (USB). */
- if (0 != tcsetattr(fd, TCSADRAIN, &t_opt)) {
- /* According to the Linux documentation, this is actually not enough
- to detect errors, you need to call tcgetattr() and check that
- all changes have been performed successfully. */
- return -1;
- }
-
- return 0;
-}
-
-static int buspirate_serial_write(int fd, char *buf, int size)
-{
- int ret = 0;
-
- ret = write(fd, buf, size);
-
- LOG_DEBUG("size = %d ret = %d", size, ret);
- buspirate_print_buffer(buf, size);
-
- if (ret != size)
- LOG_ERROR("Error sending data");
-
- return ret;
-}
-
-static int buspirate_serial_read(int fd, char *buf, int size)
-{
- int len = 0;
- int ret = 0;
- int timeout = 0;
-
- while (len < size) {
- ret = read(fd, buf+len, size-len);
- if (ret == -1)
- return -1;
-
- if (ret == 0) {
- timeout++;
-
- if (timeout >= 10)
- break;
-
- continue;
- }
-
- len += ret;
- }
-
- LOG_DEBUG("should have read = %d actual size = %d", size, len);
- buspirate_print_buffer(buf, len);
-
- if (len != size)
- LOG_ERROR("Error reading data");
-
- return len;
-}
-
-static void buspirate_serial_close(int fd)
-{
- close(fd);
-}
-
-#define LINE_SIZE 81
-#define BYTES_PER_LINE 16
-static void buspirate_print_buffer(char *buf, int size)
-{
- char line[LINE_SIZE];
- char tmp[10];
- int offset = 0;
-
- line[0] = 0;
- while (offset < size) {
- snprintf(tmp, 5, "%02x ", (uint8_t)buf[offset]);
- offset++;
-
- strcat(line, tmp);
-
- if (offset % BYTES_PER_LINE == 0) {
- LOG_DEBUG("%s", line);
- line[0] = 0;
- }
- }
-
- if (line[0] != 0)
- LOG_DEBUG("%s", line);
-}
[49/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/README.Windows
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/README.Windows b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/README.Windows
deleted file mode 100755
index 6c616f3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/README.Windows
+++ /dev/null
@@ -1,60 +0,0 @@
-Building OpenOCD for Windows
-----------------------------
-
-You can build OpenOCD for Windows natively with either MinGW-w64/MSYS
-or Cygwin (plain MinGW might work with --disable-werror but is not
-recommended as it doesn't provide enough C99 compatibility).
-Alternatively, one can cross-compile it using MinGW-w64 on a *nix
-host. See README for the generic instructions.
-
-Also, the MSYS2 project provides both ready-made binaries and an easy
-way to self-compile from their software repository out of the box.
-
-Native MinGW-w64/MSYS compilation
------------------------------
-
-As MSYS doesn't come with pkg-config pre-installed, you need to add it
-manually. The easiest way to do that is to download pkg-config-lite
-from:
-
- http://sourceforge.net/projects/pkgconfiglite/
-
-Then simply unzip the archive to the root directory of your MinGW-w64
-installation.
-
-USB adapters
-------------
-
-For the adapters that use a HID-based protocol, e.g. CMSIS-DAP, you do
-not need to perform any additional configuration.
-
-For all the others you usually need to have WinUSB.sys (or
-libusbK.sys) driver installed. Some vendor software (e.g. for
-ST-LINKv2) does it on its own. For the other cases the easiest way to
-assign WinUSB to a device is to use the latest Zadig installer:
-
- http://zadig.akeo.ie
-
-When using a composite USB device, it's often necessary to assign
-WinUSB.sys to the composite parent instead of the specific
-interface. To do that one needs to activate an advanced option in the
-Zadig installer.
-
-For the old drivers that use libusb-0.1 API you might need to link
-against libusb-win32 headers and install the corresponding driver with
-Zadig.
-
-If you need to use the same adapter with other applications that may
-require another driver, a solution for Windows Vista and above is to
-activate the IgnoreHWSerNum registry setting for the USB device.
-
-That setting forces Windows to associate the driver per port instead of
-per serial number, the same behaviour as when the device does not contain
-a serial number. So different drivers can be installed for the adapter on
-different ports and you just need to plug the adapter into the correct
-port depending on which application to use.
-
-For more information, see:
-
- http://msdn.microsoft.com/en-us/library/windows/hardware/jj649944(v=vs.85).aspx
- http://www.ftdichip.com/Support/Knowledgebase/index.html?ignorehardwareserialnumber.htm
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/TODO
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/TODO b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/TODO
deleted file mode 100755
index 8aac157..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/TODO
+++ /dev/null
@@ -1,380 +0,0 @@
-// This file is part of the Doxygen Developer Manual
-/** @page tasks Pending and Open Tasks
-
-This page lists pending and open tasks being considered or worked upon
-by the OpenOCD community.
-
-@section thelist The List
-
-Most items are open for the taking, but please post to the mailing list
-before spending much time working on anything lists here. The community
-may have evolved an idea since it was added here.
-
-Feel free to send patches to add or clarify items on this list, too.
-
-@section thelisttcl TCL
-
-This section provides possible things to improve with OpenOCD's TCL support.
-
-- Fix problem with incorrect line numbers reported for a syntax
- error in a reset init event.
-
-- organize the TCL configurations:
- - provide more directory structure for boards/targets?
- - factor configurations into layers (encapsulation and re-use)
-
-- Fix handling of variables between multiple command line "-c" and "-f"
- parameters. Currently variables assigned through one such parameter
- command/script are unset before the next one is invoked.
-
-- Isolate all TCL command support:
- - Pure C CLI implementations using --disable-builtin-tcl.
- - Allow developers to build new dongles using OpenOCD's JTAG core.
- - At first, provide only low-level JTAG support; target layer and
- above rely heavily on scripting event mechanisms.
- - Allow full TCL support? add --with-tcl=/path/to/installed/tcl
- - Move TCL support out of foo.[ch] and into foo_tcl.[ch] (other ideas?)
- - See src/jtag/core.c and src/jtag/tcl.c for an example.
- - allow some of these TCL command modules to be dynamically loadable?
-
-@section thelistjtag JTAG
-
-This section list issues that need to be resolved in the JTAG layer.
-
-@subsection thelistjtagcore JTAG Core
-
-The following tasks have been suggested for cleaning up the JTAG layer:
-
-- use tap_set_state everywhere to allow logging TAP state transitions
-- Encapsulate cmd_queue_cur_state and related variable handling.
-- add slick 32 bit versions of jtag_add_xxx_scan() that avoids
-buf_set_u32() calls and other evidence of poor impedance match between
-API and calling code. New API should cut down # of lines in calling
-code by 100's and make things clearer. Also potentially be supported
-directly in minidriver API for better embedded host performance.
-
-The following tasks have been suggested for adding new core JTAG support:
-
-- Improve autodetection of TAPs by supporting tcl escape procedures that
- can configure discovered TAPs based on IDCODE value ... they could:
- - Remove guessing for irlen
- - Allow non-default irmask/ircapture values
-- SPI/UART emulation:
- - (ab)use bit-banging JTAG interfaces to emulate SPI/UART
- - allow SPI to program flash, MCUs, etc.
-
-@subsection thelistjtaginterfaces JTAG Interfaces
-
-There are some known bugs to fix in JTAG adapter drivers:
-
-- For JTAG_STATEMOVE to TAP_RESET, all drivers must ignore the current
- recorded state. The tap_get_state() call won't necessarily return
- the correct value, especially at server startup. Fix is easy: in
- that case, always issue five clocks with TMS high.
- - amt_jtagaccel.c
- - arm-jtag-ew.c
- - bitbang.c
- - bitq.c
- - gw16012.c
- - jlink.c
- - usbprog.c
- - vsllink.c
- - rlink/rlink.c
-- bug: USBprog is broken with new tms sequence; it needs 7-clock cycles.
- Fix promised from Peter Denison openwrt at marshadder.org
- Workaround: use "tms_sequence long" @par
- https://lists.berlios.de/pipermail/openocd-development/2009-July/009426.html
-
-The following tasks have been suggested for improving OpenOCD's JTAG
-interface support:
-
-- rework USB communication to be more robust. Two possible options are:
- -# use libusb-1.0.1 with libusb-compat-0.1.1 (non-blocking I/O wrapper)
- -# rewrite implementation to use non-blocking I/O
-- J-Link driver:
- - fix to work with long scan chains, such as R.Doss's svf test.
-- FT2232 (libftdi):
- - make performance comparable to alternatives (on Win32, D2XX is faster)
- - make usability comparable to alternatives
-- Autodetect USB based adapters; this should be easy on Linux. If there's
- more than one, list the options; otherwise, just select that one.
-
-The following tasks have been suggested for adding new JTAG interfaces:
-
-- TCP driver: allow client/server for remote JTAG interface control.
-This requires a client and a server. The server is built into the
-normal OpenOCD and takes commands from the client and executes
-them on the interface returning the result of TCP/IP. The client
-is an OpenOCD which is built with a TCP/IP minidriver. The use
-of a minidriver is required to capture all the jtag_add_xxx()
-fn's at a high enough level and repackage these cmd's as
-TCP/IP packets handled by the server.
-
-@section thelistswd Serial Wire Debug
-
-- implement Serial Wire Debug interface
-
-@section thelistbs Boundary Scan Support
-
-- add STAPL support?
-- add BSDL support?
-
-A few possible options for the above:
- -# Fake a TCL equivalent?
- -# Integrate an existing library?
- -# Write a new C implementation a la Jim?
-
-Once the above are completed:
-- add support for programming flash using boundary scan techniques
-- add integration with a modified gerber view program:
- - provide means to view the PCB and select pins and traces
- - allow use-cases such as the following:
- - @b Stimulus
- -# Double-click on a pin (or trace) with the mouse.
- - @b Effects
- -# The trace starts blinking, and
- -# OpenOCD toggles the pin(s) 0/1.
-
-@section thelisttargets Target Support
-
-- Many common ARM cores could be autodetected using IDCODE
-- general layer cleanup: @par
- https://lists.berlios.de/pipermail/openocd-development/2009-May/006590.html
-- regression: "reset halt" between 729(works) and 788(fails): @par
-https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
-- registers
- - add flush-value operation, call them all on resume/reset
-- mcr/mrc target->type support
- - missing from ARM920t, ARM966e, XScale.
- It's possible that the current syntax is unable to support read-modify-write
- operations(see arm966e).
- - mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been
- tested from: arm926ejs, arm720t, cortex_a8
-- ARM7/9:
- - clean up "arm9tdmi vector_catch". Available for some arm7 cores? @par
-https://lists.berlios.de/pipermail/openocd-development/2009-October/011488.html
-https://lists.berlios.de/pipermail/openocd-development/2009-October/011506.html
- - add reset option to allow programming embedded ice while srst is asserted.
- Some CPUs will gate the JTAG clock when srst is asserted and in this case,
- it is necessary to program embedded ice and then assert srst afterwards.
-- ARM926EJS:
- - reset run/halt/step is not robust; needs testing to map out problems.
-- ARM11 improvements (MB?)
- - add support for asserting srst to reset the core.
- - Single stepping works, but should automatically
- use hardware stepping if available.
- - mdb can return garbage data if read byte operation fails for
- a memory region(16 & 32 byte access modes may be supported). Is this
- a bug in the .MX31 PDK init script? Try on i.MX31 PDK:
- mdw 0xb80005f0 0x8, mdh 0xb80005f0 0x10, mdb 0xb80005f0 0x20. mdb returns
- garabage.
- - implement missing functionality (grep FNC_INFO_NOTIMPLEMENTED ...)
-- Thumb2 single stepping: ARM1156T2 needs simulator support
-- Cortex A8 support (ML)
- - add target implementation (ML)
-- Cortex M3 support
- - when stepping, only write dirtied registers (be faster)
- - when connecting to halted core, fetch registers (startup is quirky)
-- Generic ARM run_algorithm() interface
- - tagged struct wrapping ARM instructions and metadata
- - not revision-specific (current: ARMv4+ARMv5 -or- ARMv6 -or- ARMv7)
- - usable with at least arm_nandwrite() and generic CFI drivers
-- ETM
- - don't show FIFOFULL registers if they're not supported
- - use comparators to get more breakpoints and watchpoints
- - add "etm drivers" command
- - trace driver init() via examine() paths only, not setup()/reset
-- MC1322x support (JW/DE?)
- - integrate and test support from JW (and DE?)
- - get working with a known good interface (i.e. not today's jlink)
-- AT91SAM92xx:
- - improvements for unknown-board-atmel-at91sam9260.cfg (RD)
-- STR9x: (ZW)
- - improvements to str912.cfg to be more general purpose
-- AVR: (SQ)
- - independently verify implementation
- - incrementally improve working prototype in trunk. (SQ)
- - work out how to debug this target
- - AVR debugging protocol.
-- FPGA:
- - Altera Nios Soft-CPU support
-- Coldfire (suggested by NC)
- - can we draw from the BDM project? @par
- http://bdm.sourceforge.net/
-
- or the OSBDM package @par
- http://forums.freescale.com/freescale/board/message?board.id=OSBDM08&thread.id=422
-
-@section thelistsvf SVF/XSVF
-
-- develop SVF unit tests
-- develop XSVF unit tests
-
-@section thelistflash Flash Support
-
-- finish documentation for the following flash drivers:
- - avr
- - pic32mx
- - ocl
- - str9xpec
-
-- Don't expect writing all-ones to be a safe way to write without
- changing bit values. Minimally it loses on flash modules with
- internal ECC, where it may change the ECC.
- - NOR flash_write_unlock() does that between sectors
- - there may be other cases too
-
-- Make sure all commands accept either a bank name or a bank number,
- and be sure both identifiers show up in "flash banks" and "nand list".
- Right now the user-friendly names are pretty much hidden...
-
-@subsection thelistflashcfi CFI
-
-- finish implementing bus width/chip width handling (suggested by NC)
-- factor vendor-specific code into separate source files
- - add new callback interface for vendor-specific code
-- investigate/implement "thin wrapper" to use eCos CFI drivers (�H)
-
-@section thelistdebug Debugger Support
-
-- add support for masks in watchpoints? @par
- https://lists.berlios.de/pipermail/openocd-development/2009-October/011507.html
-- breakpoints can get lost in some circumstances: @par
- https://lists.berlios.de/pipermail/openocd-development/2009-June/008853.html
-- add support for masks in watchpoints. The trick is that GDB does not
- support a breakpoint mask in the remote protocol. One way to work around
- this is to add a separate command "watchpoint_mask add/rem <addr> <mask>", that
- is run to register a list of masks that the gdb_server knows to use with
- a particular watchpoint address.
-- integrate Keil AGDI interface to OpenOCD? (submitted by Dario Vecchio)
-
-@section thelisttesting Testing Suite
-
-This section includes several related groups of ideas:
-- @ref thelistunittests
-- @ref thelistsmoketests
-- @ref thelisttestreports
-- @ref thelisttestgenerichw
-
-@subsection thelistunittests Unit Tests
-
-- add testing skeleton to provide frameworks for adding tests
-- implement server unit tests
-- implement JTAG core unit tests
-- implement JTAG interface unit tests
-- implement flash unit tests
-- implement target unit tests
-
-@subsection thelistsmoketests Smoke Test Tools
-
--# extend 'make check' with a smoketest app
- - checks for OOCD_TEST_CONFIG, etc. in environment (or config file)
- - if properly set, runs the smoke test with specified parameters
- - openocd -f ${OOCD_TEST_CONFIG}
- - implies a modular test suite (see below)
- - should be able to run some minimal tests with dummy interface:
- - compare results of baseline sanity checks with expected results
-
--# builds a more complete test suite:
- - existing testing/examples/ look like a great start
- - all targets should be tested fully and for all capabilities
- - we do NOT want a "lowest common denominator" test suite
- - ... but can we start with one to get going?
- - probably requires one test configuration file per board/target
- - modularization can occur here, just like with targets/boards/chips
- - coverage can increase over time, building up bundles of tests
-
--# add new 'smoketest' Makefile target:
- - calls 'make check' (and the smoketest app)
- - gather inputs and output into a report file
-
-@subsection thelisttestreports Test Feedback Tools
-
-These ideas were first introduced here: @par
- https://lists.berlios.de/pipermail/openocd-development/2009-May/006358.html
-
-- provide report submission scripts for e-mail and web forms
-- add new Makefile targets to post the report:
- - 'checkreportsend' -- send to list via e-mail (via sendmail)
- - 'checkreportpost' -- send web form (via curl or other script)
-
-@subsection thelisttestgenerichw Generic Hardware Tester
-
-- implement VHDL to use for FPGA-based JTAG TAP testing device
-- develop test suite that utilizes this testing device
-
-@section thelistautotools Autotools Build System
-
-- make entire configure process require less user consideration:
- - automatically detect the features that are available, unless
- options were specifically provided to configure
- - provide a report of the drivers that will be build at the end of
- running configure, so the users can verify which drivers will be
- built during 'make' (and their options) .
-- eliminate sources of confusion in @c bootstrap script:
- -# Make @c bootstrap call 'configure --enable-maintainer-mode \<opts\>'?
- -# Add @c buildstrap script to assist with bootstrap and configure steps.
-- automatically build tool-chains required for cross-compiling
- - produce mingw32, arm-elf, others using in-tree scripts
- - build all required target code from sources
-- make JTAG and USB debug output a run-time configuration option
-
-@section thelistarchitecture Architectural Tasks
-
-The following architectural tasks need to be accomplished and should be
-fairly easy to complete:
-
-
-- use dynamic allocations for working memory. Scan & fix code
-for excessive stack allocations. take linux/scripts/checkstack.pl and
-see what the worst offenders are. Dynamic stack allocations are found
-at the bottom of the list below. Example, on amd64:
-
- $ objdump -d | checkstack.pl | head -10
- 0x004311e3 image_open [openocd]: 13464
- 0x00431301 image_open [openocd]: 13464
- 0x004237a4 target_array2mem [openocd]: 4376
- 0x0042382b target_array2mem [openocd]: 4376
- 0x00423e74 target_mem2array [openocd]: 4360
- 0x00423ef9 target_mem2array [openocd]: 4360
- 0x00404aed handle_svf_command [openocd]: 2248
- 0x00404b7e handle_svf_command [openocd]: 2248
- 0x00413581 handle_flash_fill_command [openocd]: 2200
- 0x004135fa handle_flash_fill_command [openocd]: 2200
-- clean-up code to match style guides
-- factor code to eliminate duplicated functionality
-- rewrite code that uses casts to access 16-bit and larger types
- from unaligned memory addresses
-- libopenocd support: @par
- https://lists.berlios.de/pipermail/openocd-development/2009-May/006405.html
-- review and clean up interface/target/flash APIs
-
-The following strategic tasks will require ambition, knowledge, and time
-to complete:
-
-- overhaul use of types to improve 32/64-bit portability
- - types for both host and target word sizes?
- - can we use GDB's CORE_TYPE support?
-- Allow N:M:P mapping of servers, targets, and interfaces
-- loadable module support for interface/target/flash drivers and commands
- - support both static and dynamic modules.
- - should probably use libltdl for dynamic library handing.
-
-@section thelistadmin Documentation Tasks
-
-- Develop milestone and release guidelines, processes, and scripts.
-- Develop "style" guidelines (and scripts) for maintainers:
- - reviewing patches
- - committing to git
-- Review Users' Guide for documentation errors or omissions
- - "capture" and "ocd_find" commands
- - "ocd_" prefix on various stuff
-- Update Developer's Manual (doxygen output)
- - Add documentation describing the architecture of each module
- - Provide more Technical Primers to bootstrap contributor knowledge
-
-*/
-/** @file
-This file contains the @ref thelist page.
-*/
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/bootstrap
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/bootstrap b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/bootstrap
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index 3b60fc6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/bootstrap
+++ /dev/null
@@ -1,43 +0,0 @@
-#!/bin/sh
-# Run the autotools bootstrap sequence to create the configure script
-
-# Abort execution on error
-set -e
-
-if which libtoolize > /dev/null; then
- libtoolize="libtoolize"
-elif which glibtoolize >/dev/null; then
- libtoolize="glibtoolize"
-else
- echo "$0: Error: libtool is required" >&2
- exit 1
-fi
-
-if [ "$1" = "nosubmodule" ]; then
- SKIP_SUBMODULE=1
-elif [ -n "$1" ]; then
- echo "$0: Illegal argument $1"
- echo "USAGE: $0 [nosubmodule]"
- exit 1
-fi
-
-# bootstrap the autotools
-(
-set -x
-aclocal
-${libtoolize} --automake --copy
-autoconf
-autoheader
-automake --gnu --add-missing --copy
-)
-
-if [ -n "$SKIP_SUBMODULE" ]; then
- echo "Skipping submodule setup"
-else
- echo "Setting up submodules"
- git submodule init
- git submodule update
-fi
-
-echo "Bootstrap complete. Quick build instructions:"
-echo "./configure ...."
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/common.mk
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/common.mk b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/common.mk
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index f301c3a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/common.mk
+++ /dev/null
@@ -1,12 +0,0 @@
-
-# common flags used in openocd build
-AM_CPPFLAGS = -I$(top_srcdir)/src \
- -I$(top_builddir)/src \
- -I$(top_srcdir)/src/helper \
- -DPKGDATADIR=\"$(pkgdatadir)\" \
- -DBINDIR=\"$(bindir)\"
-
-if INTERNAL_JIMTCL
-AM_CPPFLAGS += -I$(top_srcdir)/jimtcl \
- -I$(top_builddir)/jimtcl
-endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/config_subdir.m4
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/config_subdir.m4 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/config_subdir.m4
deleted file mode 100755
index 1c79098..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/config_subdir.m4
+++ /dev/null
@@ -1,26 +0,0 @@
-dnl
-dnl If needed, define the m4_ifblank and m4_ifnblank macros from autoconf 2.64
-dnl This allows us to run with earlier Autoconfs as well.
-ifdef([m4_ifblank],[],[
-m4_define([m4_ifblank],
-[m4_if(m4_translit([[$1]], [ ][ ][
-]), [], [$2], [$3])])])
-dnl
-ifdef([m4_ifnblank],[],[
-m4_define([m4_ifnblank],
-[m4_if(m4_translit([[$1]], [ ][ ][
-]), [], [$3], [$2])])])
-dnl
-
-dnl AC_CONFIG_SUBDIRS does not allow configure options to be passed
-dnl to subdirs, this function allows that by creating a configure.gnu
-dnl script that prepends configure options and then calls the real
-dnl configure script
-AC_DEFUN([AX_CONFIG_SUBDIR_OPTION],
-[
-AC_CONFIG_SUBDIRS([$1])
-
-m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu],
-[echo -e '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" $2 "'\$'@"' > "$srcdir/$1/configure.gnu"
-])
-])
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/configure.ac
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/configure.ac b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/configure.ac
deleted file mode 100755
index aed8bce..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/configure.ac
+++ /dev/null
@@ -1,1343 +0,0 @@
-AC_PREREQ(2.64)
-AC_INIT([openocd], [0.10.0-dev],
- [OpenOCD Mailing List <op...@lists.sourceforge.net>])
-AC_CONFIG_SRCDIR([src/openocd.c])
-
-m4_include([config_subdir.m4])dnl
-
-# check for makeinfo before calling AM_INIT_AUTOMAKE
-AC_CHECK_PROG([MAKEINFO], [makeinfo], [makeinfo])
-if test "x$MAKEINFO" = "x"; then
- MAKEINFO='echo makeinfo missing; true'
- AC_MSG_WARN([Info documentation will not be built.])
-fi
-AC_SUBST([MAKEINFO])
-
-AM_INIT_AUTOMAKE([-Wall -Wno-portability dist-bzip2 dist-zip subdir-objects])
-
-AC_CONFIG_HEADERS([config.h])
-AH_BOTTOM([
-#include <helper/system.h>
-#include <helper/types.h>
-#include <helper/replacements.h>
-])
-
-AC_LANG_C
-AC_PROG_CC
-AC_PROG_CC_C99
-AM_PROG_CC_C_O
-AC_PROG_RANLIB
-PKG_PROG_PKG_CONFIG([0.23])
-
-dnl disable checks for C++, Fortran and GNU Java Compiler
-m4_defun([_LT_AC_LANG_CXX_CONFIG], [:])
-m4_defun([_LT_AC_LANG_F77_CONFIG], [:])
-m4_defun([_LT_AC_LANG_GCJ_CONFIG], [:])
-AC_DISABLE_SHARED
-AC_PROG_LIBTOOL
-AC_SUBST([LIBTOOL_DEPS])
-
-dnl configure checks required for Jim files (these are obsolete w/ C99)
-AC_C_CONST
-AC_TYPE_LONG_LONG_INT
-
-AC_SEARCH_LIBS([ioperm], [ioperm])
-AC_SEARCH_LIBS([dlopen], [dl])
-
-AC_CHECK_HEADERS([sys/socket.h])
-AC_CHECK_HEADERS([arpa/inet.h], [], [], [dnl
-#include <stdio.h>
-#ifdef STDC_HEADERS
-# include <stdlib.h>
-# include <stddef.h>
-#else
-# ifdef HAVE_STDLIB_H
-# include <stdlib.h>
-# endif
-#endif
-#ifdef HAVE_SYS_SOCKET_H
-# include <sys/socket.h>
-#endif
-])
-AC_CHECK_HEADERS([elf.h])
-AC_CHECK_HEADERS([dirent.h])
-AC_CHECK_HEADERS([fcntl.h])
-AC_CHECK_HEADERS([ifaddrs.h], [], [], [dnl
-#include <stdio.h>
-#ifdef STDC_HEADERS
-# include <stdlib.h>
-# include <stddef.h>
-#else
-# ifdef HAVE_STDLIB_H
-# include <stdlib.h>
-# endif
-#endif
-#ifdef HAVE_SYS_SOCKET_H
-# include <sys/socket.h>
-#endif
-])
-AC_CHECK_HEADERS([malloc.h])
-AC_CHECK_HEADERS([netdb.h])
-AC_CHECK_HEADERS([netinet/in.h], [], [], [dnl
-#include <stdio.h>
-#ifdef STDC_HEADERS
-# include <stdlib.h>
-# include <stddef.h>
-#else
-# ifdef HAVE_STDLIB_H
-# include <stdlib.h>
-# endif
-#endif
-#ifdef HAVE_SYS_SOCKET_H
-# include <sys/socket.h>
-#endif
-])
-AC_CHECK_HEADERS([netinet/tcp.h], [], [], [dnl
-#include <stdio.h>
-#ifdef STDC_HEADERS
-# include <stdlib.h>
-# include <stddef.h>
-#else
-# ifdef HAVE_STDLIB_H
-# include <stdlib.h>
-# endif
-#endif
-#ifdef HAVE_SYS_SOCKET_H
-# include <sys/socket.h>
-#endif
-])
-AC_CHECK_HEADERS([poll.h])
-AC_CHECK_HEADERS([pthread.h])
-AC_CHECK_HEADERS([strings.h])
-AC_CHECK_HEADERS([sys/ioctl.h])
-AC_CHECK_HEADERS([sys/param.h])
-AC_CHECK_HEADERS([sys/select.h])
-AC_CHECK_HEADERS([sys/stat.h])
-AC_CHECK_HEADERS([sys/time.h])
-AC_CHECK_HEADERS([sys/types.h])
-AC_CHECK_HEADERS([unistd.h])
-AC_CHECK_HEADERS([net/if.h], [], [], [dnl
-#include <stdio.h>
-#ifdef STDC_HEADERS
-# include <stdlib.h>
-# include <stddef.h>
-#else
-# ifdef HAVE_STDLIB_H
-# include <stdlib.h>
-# endif
-#endif
-#ifdef HAVE_SYS_SOCKET_H
-# include <sys/socket.h>
-#endif
-])
-
-AC_HEADER_ASSERT
-AC_HEADER_STDBOOL
-AC_HEADER_TIME
-
-AC_C_BIGENDIAN
-
-AC_CHECK_FUNCS([strndup])
-AC_CHECK_FUNCS([strnlen])
-AC_CHECK_FUNCS([gettimeofday])
-AC_CHECK_FUNCS([usleep])
-AC_CHECK_FUNCS([vasprintf])
-
-build_bitbang=no
-build_bitq=no
-is_cygwin=no
-is_mingw=no
-is_win32=no
-is_darwin=no
-
-# guess-rev.sh only exists in the repository, not in the released archives
-AC_MSG_CHECKING([whether to build a release])
-if test -x $srcdir/guess-rev.sh ; then
- build_release=no
-else
- build_release=yes
-fi
-AC_MSG_RESULT([$build_release])
-
-AC_ARG_WITH(ftd2xx,
- AS_HELP_STRING([--with-ftd2xx=<PATH>],[This option has been removed.]),
- [
-# Option Given.
-cat << __EOF__
-
-The option: --with-ftd2xx=<PATH> has been removed.
-On Linux, the new option is:
-
- --with-ftd2xx-linux-tardir=/path/to/files
-
-Where <path> is the path the the directory where the "tar.gz" file
-from FTDICHIP.COM was unpacked, for example:
-
- --with-ftd2xx-linux-tardir=${HOME}/libftd2xx0.4.16
-
-On Cygwin/MingW32, the new option is:
-
- --with-ftd2xx-win32-zipdir=/path/to/files
-
-Where <path> is the path to the directory where the "zip" file from
-FTDICHIP.COM was unpacked, for example:
-
- --with-ftd2xx-win32-zipdir=${HOME}/ftd2xx.cdm.files
-
-__EOF__
-
- AC_MSG_ERROR([Sorry Cannot continue])
- ], [true])
-
-# Adapter drivers
-# 1st column -- configure option
-# 2nd column -- description
-# 3rd column -- symbol used for both config.h and automake
-m4_define([ADAPTER_ARG], [m4_argn([1], $1)])
-m4_define([ADAPTER_DESC], [m4_argn([2], $1)])
-m4_define([ADAPTER_SYM], [m4_argn([3], $1)])
-m4_define([ADAPTER_VAR], [enable_[]ADAPTER_ARG($1)])
-m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
-
-m4_define([USB1_ADAPTERS],
- [[[ftdi], [MPSSE mode of FTDI based devices], [FTDI]],
- [[jlink], [Segger J-Link JTAG Programmer], [JLINK]],
- [[stlink], [ST-Link JTAG Programmer], [HLADAPTER_STLINK]],
- [[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
- [[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
- [[usb_blaster_2], [Altera USB-Blaster II Compatible], [USB_BLASTER_2]],
- [[vsllink], [Versaloon-Link JTAG Programmer], [VSLLINK]]])
-
-m4_define([USB_ADAPTERS],
- [[[osbdm], [OSBDM (JTAG only) Programmer], [OSBDM]],
- [[opendous], [eStick/opendous JTAG Programmer], [OPENDOUS]],
- [[aice], [Andes JTAG Programmer], [AICE]]])
-
-m4_define([USB0_ADAPTERS],
- [[[usbprog], [USBProg JTAG Programmer], [USBPROG]],
- [[rlink], [Raisonance RLink JTAG Programmer], [RLINK]],
- [[armjtagew], [Olimex ARM-JTAG-EW Programmer], [ARMJTAGEW]]])
-
-m4_define([HIDAPI_ADAPTERS],
- [[[cmsis_dap], [CMSIS-DAP Compliant Debugger], [CMSIS_DAP]]])
-
-#========================================
-# FTD2XXX support comes in 4 forms.
-# (1) win32 - via a zip file
-# (2) linux - via a tar file
-# (3) linux/cygwin/mingw - via libftdi
-# (4) darwin - installed under /usr/local
-#
-# In case (1) and (2) we need to know where the package was unpacked.
-
-AC_ARG_WITH(ftd2xx-win32-zipdir,
- AS_HELP_STRING([--with-ftd2xx-win32-zipdir],[Where (CYGWIN/MINGW) the zip file from ftdichip.com was unpacked (default=search)]),
- [
- # option present
- if test -d $with_ftd2xx_win32_zipdir
- then
- with_ftd2xx_win32_zipdir=`cd $with_ftd2xx_win32_zipdir && pwd`
- AC_MSG_NOTICE([Using: ftdichip.com library: $with_ftd2xx_win32_zipdir])
- else
- AC_MSG_ERROR([Parameter to --with-ftd2xx-win32-zipdir is not a dir: $with_ftd2xx_win32_zipdir])
- fi
- ], [true])
-
-AC_ARG_WITH(ftd2xx-linux-tardir,
- AS_HELP_STRING([--with-ftd2xx-linux-tardir], [Where (Linux/Unix) the tar file from ftdichip.com was unpacked (default=search)]),
- [
- # Option present
- if test $is_win32 = yes ; then
- AC_MSG_ERROR([The option: --with-ftd2xx-linux-tardir is only usable on linux])
- fi
- if test -d $with_ftd2xx_linux_tardir
- then
- with_ftd2xx_linux_tardir=`cd $with_ftd2xx_linux_tardir && pwd`
- AC_MSG_NOTICE([Using: ftdichip.com library: $with_ftd2xx_linux_tardir])
- else
- AC_MSG_ERROR([Parameter to --with-ftd2xx-linux-tardir is not a dir: $with_ftd2xx_linux_tardir])
- fi
- ], [true])
-
-AC_ARG_WITH(ftd2xx-lib,
- AS_HELP_STRING([--with-ftd2xx-lib],
- [Use static or shared ftd2xx libs (default=static)]),
- [
- case "$withval" in
- static)
- with_ftd2xx_lib=$withval
- ;;
- shared)
- with_ftd2xx_lib=$withval
- ;;
- *)
- AC_MSG_ERROR([Option: --with-ftd2xx-lib=static or --with-ftd2xx-lib=shared not, $withval])
- ;;
- esac
- ], [
- # Default is static - it is simpler :-(
- with_ftd2xx_lib=static
- ])
-
-AC_ARG_ENABLE([doxygen-html],
- AS_HELP_STRING([--disable-doxygen-html],
- [Disable building Doxygen manual as HTML.]),
- [doxygen_as_html=$enableval], [doxygen_as_html=yes])
-AC_SUBST([doxygen_as_html])
-AC_MSG_CHECKING([whether to build Doxygen as HTML])
-AC_MSG_RESULT([$doxygen_as_html])
-
-AC_ARG_ENABLE([doxygen-pdf],
- AS_HELP_STRING([--enable-doxygen-pdf],
- [Enable building Doxygen manual as PDF.]),
- [doxygen_as_pdf=$enableval], [doxygen_as_pdf=no])
-AC_SUBST([doxygen_as_pdf])
-AC_MSG_CHECKING([whether to build Doxygen as PDF])
-AC_MSG_RESULT([$doxygen_as_pdf])
-
-AC_ARG_ENABLE([gccwarnings],
- AS_HELP_STRING([--disable-gccwarnings], [Disable compiler warnings]),
- [gcc_warnings=$enableval], [gcc_warnings=yes])
-
-AC_ARG_ENABLE([wextra],
- AS_HELP_STRING([--disable-wextra], [Disable extra compiler warnings]),
- [gcc_wextra=$enableval], [gcc_wextra=$gcc_warnings])
-
-AC_ARG_ENABLE([werror],
- AS_HELP_STRING([--disable-werror], [Do not treat warnings as errors]),
- [gcc_werror=$enableval], [gcc_werror=$gcc_warnings])
-
-# set default verbose options, overridden by following options
-debug_jtag_io=no
-debug_usb_io=no
-debug_usb_comms=no
-
-AC_ARG_ENABLE([verbose],
- AS_HELP_STRING([--enable-verbose],
- [Enable verbose JTAG I/O messages (for debugging).]),
- [
- debug_jtag_io=$enableval
- debug_usb_io=$enableval
- debug_usb_comms=$enableval
- ], [])
-
-AC_ARG_ENABLE([verbose_jtag_io],
- AS_HELP_STRING([--enable-verbose-jtag-io],
- [Enable verbose JTAG I/O messages (for debugging).]),
- [debug_jtag_io=$enableval], [])
-
-AC_ARG_ENABLE([verbose_usb_io],
- AS_HELP_STRING([--enable-verbose-usb-io],
- [Enable verbose USB I/O messages (for debugging)]),
- [debug_usb_io=$enableval], [])
-
-AC_ARG_ENABLE([verbose_usb_comms],
- AS_HELP_STRING([--enable-verbose-usb-comms],
- [Enable verbose USB communication messages (for debugging)]),
- [debug_usb_comms=$enableval], [])
-
-AC_MSG_CHECKING([whether to enable verbose JTAG I/O messages]);
-AC_MSG_RESULT([$debug_jtag_io])
-if test $debug_jtag_io = yes; then
- AC_DEFINE([_DEBUG_JTAG_IO_],[1], [Print verbose JTAG I/O messages])
-fi
-
-AC_MSG_CHECKING([whether to enable verbose USB I/O messages]);
-AC_MSG_RESULT([$debug_usb_io])
-if test $debug_usb_io = yes; then
- AC_DEFINE([_DEBUG_USB_IO_],[1], [Print verbose USB I/O messages])
-fi
-
-AC_MSG_CHECKING([whether to enable verbose USB communication messages]);
-AC_MSG_RESULT([$debug_usb_comms])
-if test $debug_usb_comms = yes; then
- AC_DEFINE([_DEBUG_USB_COMMS_],[1], [Print verbose USB communication messages])
-fi
-
-debug_malloc=no
-AC_ARG_ENABLE([malloc_logging],
- AS_HELP_STRING([--enable-malloc-logging],
- [Include free space in logging messages (requires malloc.h).]),
- [debug_malloc=$enableval], [])
-
-AC_MSG_CHECKING([whether to enable malloc free space logging]);
-AC_MSG_RESULT([$debug_malloc])
-if test $debug_malloc = yes; then
- AC_DEFINE([_DEBUG_FREE_SPACE_],[1], [Include malloc free space in logging])
-fi
-
-AC_ARG_ENABLE([dummy],
- AS_HELP_STRING([--enable-dummy], [Enable building the dummy port driver]),
- [build_dummy=$enableval], [build_dummy=no])
-
-m4_define([AC_ARG_ADAPTERS], [
- m4_foreach([adapter], [$1],
- [AC_ARG_ENABLE(ADAPTER_OPT([adapter]),
- AS_HELP_STRING([--enable-ADAPTER_OPT([adapter])],
- [Enable building support for the ]ADAPTER_DESC([adapter])[ (default is $2)]),
- [], [ADAPTER_VAR([adapter])=$2])
- ])
-])
-
-AC_ARG_ADAPTERS([USB1_ADAPTERS, USB_ADAPTERS, USB0_ADAPTERS, HIDAPI_ADAPTERS], [auto])
-
-AC_ARG_ENABLE([parport],
- AS_HELP_STRING([--enable-parport], [Enable building the pc parallel port driver]),
- [build_parport=$enableval], [build_parport=no])
-
-AC_ARG_ENABLE([parport_ppdev],
- AS_HELP_STRING([--disable-parport-ppdev],
- [Disable use of ppdev (/dev/parportN) for parport (for x86 only)]),
- [parport_use_ppdev=$enableval], [parport_use_ppdev=yes])
-
-AC_ARG_ENABLE([parport_giveio],
- AS_HELP_STRING([--enable-parport-giveio],
- [Enable use of giveio for parport (for CygWin only)]),
- [parport_use_giveio=$enableval], [parport_use_giveio=])
-
-AC_ARG_ENABLE([ft2232_libftdi], [], [
-if test $enableval = yes; then
- AC_MSG_ERROR([The ft2232 driver is deprecated, use --enable-ftdi to build its replacement, or force the old driver with --enable-legacy-ft2232_libftdi])
-fi
-])
-
-AC_ARG_ENABLE([ft2232_ftd2xx], [], [
-if test $enableval = yes; then
- AC_MSG_ERROR([The ft2232 driver is deprecated, use --enable-ftdi to build its replacement, or force the old driver with --enable-legacy-ft2232_ftd2xx])
-fi
-])
-
-AC_ARG_ENABLE([legacy-ft2232_libftdi],
- AS_HELP_STRING([--enable-legacy-ft2232_libftdi], [(DEPRECATED) Enable building support for FT2232 based devices using the libftdi library]),
- [build_ft2232_libftdi=$enableval], [build_ft2232_libftdi=no])
-
-AC_ARG_ENABLE([legacy-ft2232_ftd2xx],
- AS_HELP_STRING([--enable-legacy-ft2232_ftd2xx], [(DEPRECATED) Enable building support for FT2232 based devices using the D2XX library from ftdichip.com]),
- [build_ft2232_ftd2xx=$enableval], [build_ft2232_ftd2xx=no])
-
-AC_ARG_ENABLE([jtag_vpi],
- AS_HELP_STRING([--enable-jtag_vpi], [Enable building support for JTAG VPI]),
- [build_jtag_vpi=$enableval], [build_jtag_vpi=no])
-
-AC_ARG_ENABLE([usb_blaster_libftdi],
- AS_HELP_STRING([--enable-usb_blaster_libftdi], [Enable building support for the Altera USB-Blaster using the libftdi driver, opensource alternate of FTD2XX]),
- [build_usb_blaster_libftdi=$enableval], [build_usb_blaster_libftdi=no])
-
-AC_ARG_ENABLE([usb_blaster_ftd2xx],
- AS_HELP_STRING([--enable-usb_blaster_ftd2xx], [Enable building support for the Altera USB-Blaster using the FTD2XX driver from ftdichip.com]),
- [build_usb_blaster_ftd2xx=$enableval], [build_usb_blaster_ftd2xx=no])
-
-AC_ARG_ENABLE([amtjtagaccel],
- AS_HELP_STRING([--enable-amtjtagaccel], [Enable building the Amontec JTAG-Accelerator driver]),
- [build_amtjtagaccel=$enableval], [build_amtjtagaccel=no])
-
-AC_ARG_ENABLE([zy1000_master],
- AS_HELP_STRING([--enable-zy1000-master], [Use ZY1000 JTAG master registers]),
- [build_zy1000_master=$enableval], [build_zy1000_master=no])
-
-AC_ARG_ENABLE([zy1000],
- AS_HELP_STRING([--enable-zy1000], [Enable ZY1000 interface]),
- [build_zy1000=$enableval], [build_zy1000=no])
-
-AC_ARG_ENABLE([ioutil],
- AS_HELP_STRING([--enable-ioutil], [Enable ioutil functions - useful for standalone OpenOCD implementations]),
- [build_ioutil=$enableval], [build_ioutil=no])
-
-case "${host_cpu}" in
- arm*)
- AC_ARG_ENABLE([ep93xx],
- AS_HELP_STRING([--enable-ep93xx], [Enable building support for EP93xx based SBCs]),
- [build_ep93xx=$enableval], [build_ep93xx=no])
-
- AC_ARG_ENABLE([at91rm9200],
- AS_HELP_STRING([--enable-at91rm9200], [Enable building support for AT91RM9200 based SBCs]),
- [build_at91rm9200=$enableval], [build_at91rm9200=no])
-
- AC_ARG_ENABLE([bcm2835gpio],
- AS_HELP_STRING([--enable-bcm2835gpio], [Enable building support for bitbanging on BCM2835 (as found in Raspberry Pi)]),
- [build_bcm2835gpio=$enableval], [build_bcm2835gpio=no])
- ;;
-
- *)
- build_ep93xx=no
- build_at91rm9200=no
- build_bcm2835gpio=no
- ;;
-esac
-
-AC_ARG_ENABLE([gw16012],
- AS_HELP_STRING([--enable-gw16012], [Enable building support for the Gateworks GW16012 JTAG Programmer]),
- [build_gw16012=$enableval], [build_gw16012=no])
-
-AC_ARG_ENABLE([presto_libftdi],
- AS_HELP_STRING([--enable-presto_libftdi], [Enable building support for ASIX Presto Programmer using the libftdi driver]),
- [build_presto_libftdi=$enableval], [build_presto_libftdi=no])
-
-AC_ARG_ENABLE([presto_ftd2xx],
- AS_HELP_STRING([--enable-presto_ftd2xx], [Enable building support for ASIX Presto Programmer using the FTD2XX driver]),
- [build_presto_ftd2xx=$enableval], [build_presto_ftd2xx=no])
-
-AC_ARG_ENABLE([openjtag_ftd2xx],
- AS_HELP_STRING([--enable-openjtag_ftd2xx], [Enable building support for the OpenJTAG Programmer with ftd2xx driver]),
- [build_openjtag_ftd2xx=$enableval], [build_openjtag_ftd2xx=no])
-
-AC_ARG_ENABLE([openjtag_ftdi],
- AS_HELP_STRING([--enable-openjtag_ftdi], [Enable building support for the OpenJTAG Programmer with ftdi driver]),
- [build_openjtag_ftdi=$enableval], [build_openjtag_ftdi=no])
-
-AC_ARG_ENABLE([oocd_trace],
- AS_HELP_STRING([--enable-oocd_trace],
- [Enable building support for some prototype OpenOCD+trace ETM capture hardware]),
- [build_oocd_trace=$enableval], [build_oocd_trace=no])
-
-AC_ARG_ENABLE([buspirate],
- AS_HELP_STRING([--enable-buspirate], [Enable building support for the Buspirate]),
- [build_buspirate=$enableval], [build_buspirate=no])
-
-AC_ARG_ENABLE([sysfsgpio],
- AS_HELP_STRING([--enable-sysfsgpio], [Enable building support for programming driven via sysfs gpios.]),
- [build_sysfsgpio=$enableval], [build_sysfsgpio=no])
-
-AC_ARG_ENABLE([minidriver_dummy],
- AS_HELP_STRING([--enable-minidriver-dummy], [Enable the dummy minidriver.]),
- [build_minidriver_dummy=$enableval], [build_minidriver_dummy=no])
-
-AC_ARG_ENABLE([internal-jimtcl],
- AS_HELP_STRING([--disable-internal-jimtcl], [Disable building internal jimtcl]),
- [use_internal_jimtcl=$enableval], [use_internal_jimtcl=yes])
-
-AC_ARG_ENABLE([internal-libjaylink],
- AS_HELP_STRING([--disable-internal-libjaylink],
- [Disable building internal libjaylink]),
- [use_internal_libjaylink=$enableval], [use_internal_libjaylink=yes])
-
-build_minidriver=no
-AC_MSG_CHECKING([whether to enable ZY1000 minidriver])
-if test $build_zy1000 = yes; then
- if test $build_minidriver = yes; then
- AC_MSG_ERROR([Multiple minidriver options have been enabled.])
- fi
- AC_DEFINE([HAVE_JTAG_MINIDRIVER_H], [1],
- [Define to 1 if you have the <jtag_minidriver.h> header file.])
- build_minidriver=yes
-fi
-AC_MSG_RESULT([$build_zy1000])
-
-AC_ARG_ENABLE([remote-bitbang],
- AS_HELP_STRING([--enable-remote-bitbang], [Enable building support for the Remote Bitbang jtag driver]),
- [build_remote_bitbang=$enableval], [build_remote_bitbang=no])
-
-AC_MSG_CHECKING([whether to enable dummy minidriver])
-if test $build_minidriver_dummy = yes; then
- if test $build_minidriver = yes; then
- AC_MSG_ERROR([Multiple minidriver options have been enabled.])
- fi
- build_minidriver=yes
- AC_DEFINE([BUILD_MINIDRIVER_DUMMY], [1], [Use the dummy minidriver.])
- AC_DEFINE([HAVE_JTAG_MINIDRIVER_H], [1],
- [Define to 1 if you have the <jtag_minidriver.h> header file.])
-fi
-AC_MSG_RESULT([$build_minidriver_dummy])
-
-AC_MSG_CHECKING([whether standard drivers can be built])
-if test "$build_minidriver" = yes; then
- AC_MSG_RESULT([no])
- AC_MSG_WARN([Using the minidriver disables all other drivers.])
- sleep 2
-else
- AC_MSG_RESULT([yes])
-fi
-
-case "${host_cpu}" in
- i?86|x86*)
- ;;
- *)
- if test x$parport_use_ppdev = xno; then
- AC_MSG_WARN([--disable-parport-ppdev is not supported by the host CPU])
- fi
- parport_use_ppdev=yes
- ;;
-esac
-
-case $host in
- *-cygwin*)
- is_win32=yes
- parport_use_ppdev=no
-
- AC_COMPILE_IFELSE([AC_LANG_PROGRAM([], [[return __MINGW32__;]])],
- [is_mingw=yes],[is_mingw=no])
- if test $is_mingw = yes; then
- AC_DEFINE([IS_MINGW], [1], [1 if building for MinGW.])
- if test x$parport_use_giveio = xno; then
- AC_MSG_WARN([--disable-parport-giveio is not supported by MinGW32 hosts])
- fi
- parport_use_giveio=yes
- is_cygwin=no
- else
- is_cygwin=yes
- AC_DEFINE([IS_CYGWIN], [1], [1 if building for Cygwin.])
- # sys/io.h needed under cygwin for parport access
- if test $build_parport = yes; then
- AC_CHECK_HEADERS([sys/io.h],[],AC_MSG_ERROR([Please install the cygwin ioperm package]))
- fi
- fi
-
- AC_DEFINE([IS_WIN32], [1], [1 if building for Win32.])
- AC_DEFINE([IS_DARWIN], [0], [0 if not building for Darwin.])
- ;;
- *-mingw*)
- is_mingw=yes
- is_win32=yes
- parport_use_ppdev=no
-
- if test x$parport_use_giveio = xno; then
- AC_MSG_WARN([--disable-parport-giveio is not supported by MinGW32 hosts])
- fi
- parport_use_giveio=yes
-
- if test x$build_buspirate = xyes; then
- AC_MSG_ERROR([buspirate currently not supported by MinGW32 hosts])
- fi
-
- CFLAGS="$CFLAGS -D__USE_MINGW_ANSI_STDIO"
-
- AC_DEFINE([IS_MINGW], [1], [1 if building for MinGW.])
- AC_DEFINE([IS_WIN32], [1], [1 if building for Win32.])
- AC_DEFINE([IS_DARWIN], [0], [0 if not building for Darwin.])
- ;;
- *darwin*)
- is_darwin=yes
-
- if test x$parport_use_giveio = xyes; then
- AC_MSG_WARN([--enable-parport-giveio cannot be used by Darwin hosts])
- fi
- parport_use_giveio=no
-
- AC_DEFINE([IS_CYGWIN], [0], [0 if not building for Cygwin.])
- AC_DEFINE([IS_WIN32], [0], [0 if not building for Win32.])
- AC_DEFINE([IS_DARWIN], [1], [1 if building for Darwin.])
- ;;
- *)
- if test x$parport_use_giveio = xyes; then
- AC_MSG_WARN([--enable-parport-giveio cannot be used by ]$host[ hosts])
- fi
- parport_use_giveio=no
- AC_DEFINE([IS_CYGWIN], [0], [0 if not building for Cygwin.])
- AC_DEFINE([IS_WIN32], [0], [0 if not building for Win32.])
- AC_DEFINE([IS_DARWIN], [0], [0 if not building for Darwin.])
- ;;
-esac
-
-if test $is_win32 = yes; then
- AC_DEFINE([WIN32_LEAN_AND_MEAN], [1], [1 to exclude old conflicting definitions when building on Windows])
-fi
-
-if test $build_parport = yes; then
- build_bitbang=yes
- AC_DEFINE([BUILD_PARPORT], [1], [1 if you want parport.])
-else
- AC_DEFINE([BUILD_PARPORT], [0], [0 if you don't want parport.])
-fi
-
-if test $build_dummy = yes; then
- build_bitbang=yes
- AC_DEFINE([BUILD_DUMMY], [1], [1 if you want dummy driver.])
-else
- AC_DEFINE([BUILD_DUMMY], [0], [0 if you don't want dummy driver.])
-fi
-
-if test $build_ep93xx = yes; then
- build_bitbang=yes
- AC_DEFINE([BUILD_EP93XX], [1], [1 if you want ep93xx.])
-else
- AC_DEFINE([BUILD_EP93XX], [0], [0 if you don't want ep93xx.])
-fi
-
-if test $build_zy1000 = yes; then
- AC_DEFINE([BUILD_ZY1000], [1], [1 if you want ZY1000.])
-else
- AC_DEFINE([BUILD_ZY1000], [0], [0 if you don't want ZY1000.])
-fi
-
-if test $build_zy1000_master = yes; then
- AC_DEFINE([BUILD_ZY1000_MASTER], [1], [1 if you want ZY1000 JTAG master registers.])
-else
- AC_DEFINE([BUILD_ZY1000_MASTER], [0], [0 if you don't want ZY1000 JTAG master registers.])
-fi
-
-if test $build_at91rm9200 = yes; then
- build_bitbang=yes
- AC_DEFINE([BUILD_AT91RM9200], [1], [1 if you want at91rm9200.])
-else
- AC_DEFINE([BUILD_AT91RM9200], [0], [0 if you don't want at91rm9200.])
-fi
-
-if test $build_bcm2835gpio = yes; then
- build_bitbang=yes
- AC_DEFINE([BUILD_BCM2835GPIO], [1], [1 if you want bcm2835gpio.])
-else
- AC_DEFINE([BUILD_BCM2835GPIO], [0], [0 if you don't want bcm2835gpio.])
-fi
-
-if test x$parport_use_ppdev = xyes; then
- AC_DEFINE([PARPORT_USE_PPDEV], [1], [1 if you want parport to use ppdev.])
-else
- AC_DEFINE([PARPORT_USE_PPDEV], [0], [0 if you don't want parport to use ppdev.])
-fi
-
-if test x$parport_use_giveio = xyes; then
- AC_DEFINE([PARPORT_USE_GIVEIO], [1], [1 if you want parport to use giveio.])
-else
- AC_DEFINE([PARPORT_USE_GIVEIO], [0], [0 if you don't want parport to use giveio.])
-fi
-
-if test $build_bitbang = yes; then
- AC_DEFINE([BUILD_BITBANG], [1], [1 if you want a bitbang interface.])
-else
- AC_DEFINE([BUILD_BITBANG], [0], [0 if you don't want a bitbang interface.])
-fi
-
-if test $build_ft2232_libftdi = yes; then
- AC_DEFINE([BUILD_FT2232_LIBFTDI], [1], [1 if you want libftdi ft2232.])
-else
- AC_DEFINE([BUILD_FT2232_LIBFTDI], [0], [0 if you don't want libftdi ft2232.])
-fi
-
-if test $build_ft2232_ftd2xx = yes; then
- AC_DEFINE([BUILD_FT2232_FTD2XX], [1], [1 if you want ftd2xx ft2232.])
-else
- AC_DEFINE([BUILD_FT2232_FTD2XX], [0], [0 if you don't want ftd2xx ft2232.])
-fi
-
-if test $build_usb_blaster_libftdi = yes; then
- AC_DEFINE([BUILD_USB_BLASTER_LIBFTDI], [1], [1 if you want libftdi usb_blaster.])
-else
- AC_DEFINE([BUILD_USB_BLASTER_LIBFTDI], [0], [0 if you don't want libftdi usb_blaster.])
-fi
-
-if test $build_jtag_vpi = yes; then
- AC_DEFINE([BUILD_JTAG_VPI], [1], [1 if you want JTAG VPI.])
-else
- AC_DEFINE([BUILD_JTAG_VPI], [0], [0 if you don't want JTAG VPI.])
-fi
-
-if test $build_usb_blaster_ftd2xx = yes; then
- AC_DEFINE([BUILD_USB_BLASTER_FTD2XX], [1], [1 if you want ftd2xx usb_blaster.])
-else
- AC_DEFINE([BUILD_USB_BLASTER_FTD2XX], [0], [0 if you don't want ftd2xx usb_blaster.])
-fi
-
-if test $build_amtjtagaccel = yes; then
- AC_DEFINE([BUILD_AMTJTAGACCEL], [1], [1 if you want the Amontec JTAG-Accelerator driver.])
-else
- AC_DEFINE([BUILD_AMTJTAGACCEL], [0], [0 if you don't want the Amontec JTAG-Accelerator driver.])
-fi
-
-if test $build_gw16012 = yes; then
- AC_DEFINE([BUILD_GW16012], [1], [1 if you want the Gateworks GW16012 driver.])
-else
- AC_DEFINE([BUILD_GW16012], [0], [0 if you don't want the Gateworks GW16012 driver.])
-fi
-
-if test $build_presto_libftdi = yes; then
- build_bitq=yes
- AC_DEFINE([BUILD_PRESTO_LIBFTDI], [1], [1 if you want the ASIX PRESTO driver using libftdi.])
-else
- AC_DEFINE([BUILD_PRESTO_LIBFTDI], [0], [0 if you don't want the ASIX PRESTO driver using libftdi.])
-fi
-
-if test $build_presto_ftd2xx = yes; then
- build_bitq=yes
- AC_DEFINE([BUILD_PRESTO_FTD2XX], [1], [1 if you want the ASIX PRESTO driver using FTD2XX.])
-else
- AC_DEFINE([BUILD_PRESTO_FTD2XX], [0], [0 if you don't want the ASIX PRESTO driver using FTD2XX.])
-fi
-
-if test $build_bitq = yes; then
- AC_DEFINE([BUILD_BITQ], [1], [1 if you want a bitq interface.])
-else
- AC_DEFINE([BUILD_BITQ], [0], [0 if you don't want a bitq interface.])
-fi
-
-AC_DEFINE([BUILD_OPENJTAG], [0], [0 if you don't want the OpenJTAG driver.])
-AC_DEFINE([BUILD_OPENJTAG_FTD2XX], [0], [0 if you don't want the OpenJTAG driver with FTD2XX driver.])
-AC_DEFINE([BUILD_OPENJTAG_LIBFTDI], [0], [0 if you don't want to build OpenJTAG driver with libftdi.])
-
-if test $build_openjtag_ftd2xx = yes; then
- AC_DEFINE([BUILD_OPENJTAG], [1], [1 if you want the OpenJTAG driver.])
- AC_DEFINE([BUILD_OPENJTAG_FTD2XX], [1], [1 if you want the OpenJTAG driver with FTD2XX driver.])
-fi
-if test $build_openjtag_ftdi = yes; then
- AC_DEFINE([BUILD_OPENJTAG], [1], [1 if you want the OpenJTAG drvier.])
- AC_DEFINE([BUILD_OPENJTAG_LIBFTDI], [1], [1 if you want to build OpenJTAG with FTDI driver.])
-fi
-
-if test $build_oocd_trace = yes; then
- AC_DEFINE([BUILD_OOCD_TRACE], [1], [1 if you want the OpenOCD+trace ETM capture driver.])
-else
- AC_DEFINE([BUILD_OOCD_TRACE], [0], [0 if you don't want the OpenOCD+trace ETM capture driver.])
-fi
-
-if test $build_buspirate = yes; then
- AC_DEFINE([BUILD_BUSPIRATE], [1], [1 if you want the Buspirate JTAG driver.])
-else
- AC_DEFINE([BUILD_BUSPIRATE], [0], [0 if you don't want the Buspirate JTAG driver.])
-fi
-
-if test $use_internal_jimtcl = yes; then
- if test -f "$srcdir/jimtcl/configure.ac"; then
- AX_CONFIG_SUBDIR_OPTION([jimtcl], [--disable-install-jim])
- else
- AC_MSG_ERROR([jimtcl not found, run git submodule init and git submodule update.])
- fi
-fi
-
-if test $use_internal_libjaylink = yes; then
- if test -f "$srcdir/src/jtag/drivers/libjaylink/configure.ac"; then
- ( cd $srcdir/src/jtag/drivers/libjaylink/ && ./autogen.sh )
- AX_CONFIG_SUBDIR_OPTION([src/jtag/drivers/libjaylink],
- [--enable-subproject-build])
- else
- AC_MSG_ERROR([Internal libjaylink not found, run either 'git submodule init' and 'git submodule update' or disable internal libjaylink with --disable-internal-libjaylink.])
- fi
-else
- PKG_CHECK_MODULES([libjaylink], [libjaylink >= 0.1],
- [CFLAGS="$CFLAGS $libjaylink_CFLAGS"; LIBS="$LIBS $libjaylink_LIBS"; HAVE_LIBJAYLINK=yes], [HAVE_LIBJAYLINK=no])
-fi
-
-if test $build_remote_bitbang = yes; then
- build_bitbang=yes
- AC_DEFINE([BUILD_REMOTE_BITBANG], [1], [1 if you want the Remote Bitbang JTAG driver.])
-else
- AC_DEFINE([BUILD_REMOTE_BITBANG], [0], [0 if you don't want the Remote Bitbang JTAG driver.])
-fi
-
-if test $build_sysfsgpio = yes; then
- build_bitbang=yes
- AC_DEFINE([BUILD_SYSFSGPIO], [1], [1 if you want the SysfsGPIO driver.])
-else
- AC_DEFINE([BUILD_SYSFSGPIO], [0], [0 if you don't want SysfsGPIO driver.])
-fi
-#-- Deal with MingW/Cygwin FTD2XX issues
-
-if test $is_win32 = yes; then
-if test "${with_ftd2xx_linux_tardir+set}" = set
-then
- AC_MSG_ERROR([The option: with_ftd2xx_linux_tardir is for LINUX only.])
-fi
-
-if test $build_ft2232_ftd2xx = yes -o $build_presto_ftd2xx = yes -o $build_usb_blaster_ftd2xx = yes -o $build_openjtag_ftd2xx = yes; then
- AC_MSG_CHECKING([for ftd2xx.lib exists (win32)])
-
- # if we are given a zipdir...
- if test "${with_ftd2xx_win32_zipdir+set}" = set
- then
- # Set the CFLAGS for "ftd2xx.h"
- f=$with_ftd2xx_win32_zipdir/ftd2xx.h
- if test ! -f $f ; then
- AC_MSG_ERROR([File: $f cannot be found])
- fi
- CFLAGS="$CFLAGS -I$with_ftd2xx_win32_zipdir"
-
- # And calculate the LDFLAGS for the machine
- case "$host_cpu" in
- i?86|x86_32)
- LDFLAGS="$LDFLAGS -L$with_ftd2xx_win32_zipdir/i386"
- LIBS="$LIBS -lftd2xx"
- f=$with_ftd2xx_win32_zipdir/i386/ftd2xx.lib
- ;;
- amd64|x86_64)
- LDFLAGS="$LDFLAGS -L$with_ftd2xx_win32_zipdir/amd64"
- LIBS="$LIBS -lftd2xx"
- f=$with_ftd2xx_win32_zipdir/amd64/ftd2xx.lib
- ;;
- *)
- AC_MSG_ERROR([Unknown Win32 host cpu: $host_cpu])
- ;;
- esac
- if test ! -f $f ; then
- AC_MSG_ERROR([Library: $f not found])
- fi
- else
- LIBS="$LIBS -lftd2xx"
- AC_MSG_WARN([ASSUMPTION: The (win32) FTDICHIP.COM files: ftd2xx.h and ftd2xx.lib are in a proper place])
- fi
-fi
-fi # win32
-
-if test $is_darwin = yes ; then
-if test "${with_ftd2xx_win32_zipdir+set}" = set
-then
- AC_MSG_ERROR([The option: --with-ftd2xx-win32-zipdir is for win32 only])
-fi
-if test "${with_ftd2xx_linux_tardir+set}" = set
-then
- AC_MSG_ERROR([The option: with_ftd2xx_linux_tardir is for LINUX only.])
-fi
-
-if test $build_ft2232_ftd2xx = yes -o $build_presto_ftd2xx = yes -o $build_usb_blaster_ftd2xx = yes ; then
- AC_MSG_CHECKING([for libftd2xx.a (darwin)])
-
- if test ! -f /usr/local/include/ftd2xx.h ; then
- AC_MSG_ERROR([ftd2xx library from FTDICHIP.com seems to be missing, cannot find: /usr/local/include/ftd2xx.h])
- fi
-
- CFLAGS="$CFLAGS -I/usr/local/include"
- LDFLAGS="$LDFLAGS -L/usr/local/lib"
- LIBS="$LIBS -lftd2xx"
- AC_MSG_RESULT([-L/usr/local/lib -lftd2xx])
-fi
-fi # darwin
-
-if test $is_win32 = no && test $is_darwin = no ; then
-
-if test "${with_ftd2xx_win32_zipdir+set}" = set
-then
- AC_MSG_ERROR([The option: --with-ftd2xx-win32-zipdir is for win32 only])
-fi
-
-if test $build_ft2232_ftd2xx = yes -o $build_presto_ftd2xx = yes -o $build_usb_blaster_ftd2xx = yes -o $build_openjtag_ftd2xx = yes; then
- # Must be linux
- if test $host_os != linux-gnu && test $host_os != linux ; then
- AC_MSG_ERROR([The (linux) ftd2xx library from FTDICHIP.com is linux only. Try --enable-ft2232-libftdi instead])
- fi
- # Are we given a TAR directory?
- if test "${with_ftd2xx_linux_tardir+set}" = set
- then
- AC_MSG_CHECKING([uninstalled ftd2xx distribution])
- # The .H file is simple..
- FTD2XX_H=$with_ftd2xx_linux_tardir/ftd2xx.h
- if test ! -f "${FTD2XX_H}"; then
- AC_MSG_ERROR([Option: --with-ftd2xx-linux-tardir appears wrong, cannot find: ${FTD2XX_H}])
- fi
- CFLAGS="$CFLAGS -I$with_ftd2xx_linux_tardir"
- if test $with_ftd2xx_lib = shared; then
- FTD2XX_LDFLAGS="-L$with_ftd2xx_linux_tardir"
- FTD2XX_LIB="-lftd2xx"
- else
- # Test #1 - v1.0.x
- case "$host_cpu" in
- i?86|x86_32)
- dir=build/i386;;
- amd64|x86_64)
- dir=build/x86_64;;
- *)
- dir=none;;
- esac
- if test -f "$with_ftd2xx_linux_tardir/$dir/libftd2xx.a"; then
- FTD2XX_LDFLAGS="-L$with_ftd2xx_linux_tardir/$dir"
- # Also needs -lrt
- FTD2XX_LIB="-lftd2xx -lrt"
- else
- # Test Number2.
- # Grr.. perhaps it exists as a version number?
- FTD2XX_LIB="$with_ftd2xx_linux_tardir/static_lib/libftd2xx.a.*.*.*"
- count=`ls ${FTD2XX_LIB} | wc -l`
- if test $count -gt 1 ; then
- AC_MSG_ERROR([Multiple libftd2xx.a files found in: $with_ftd2xx_linux_tardir/static_lib sorry cannot handle this yet])
- fi
- if test $count -ne 1 ; then
- AC_MSG_ERROR([Not found: $f, option: --with-ftd2xx-linux-tardir appears to be wrong])
- fi
- # Because the "-l" rules do not understand version numbers...
- # we will just stuff the absolute path onto the LIBS variable
- FTD2XX_LIB="`ls ${FTD2XX_LIB}` -lpthread"
- FTD2XX_LDFLAGS=""
- fi
- fi
- LDFLAGS="${LDFLAGS} ${FTD2XX_LDFLAGS}"
- LIBS="${FTD2XX_LIB} ${LIBS}"
- AC_MSG_RESULT([${FTD2XX_LDFLAGS} ${FTD2XX_LIB}])
- else
- AC_CHECK_HEADER([ftd2xx.h],[],[
- AC_MSG_ERROR([You seem to be missing the FTD2xx driver header file.])
- ])
- AC_SEARCH_LIBS([FT_GetLibraryVersion],[ftd2xx],,[
- AC_MSG_ERROR([You appear to be missing the FTD2xx driver library.])
- ],[-lrt -lusb-1.0])
- fi
-fi
-fi # linux
-
-if test $build_ft2232_ftd2xx = yes -o $build_presto_ftd2xx = yes -o $build_usb_blaster_ftd2xx = yes ; then
-
-# Before we go any further - make sure we can *BUILD* and *RUN*
-# a simple app with the "ftd2xx.lib" file - in what ever form we where given
-# We should be able to compile, link and run this test program now
-AC_MSG_CHECKING([whether ftd2xx library works])
-
-#
-# Save the LDFLAGS for later..
-LDFLAGS_SAVE=$LDFLAGS
-CFLAGS_SAVE=$CFLAGS
-_LDFLAGS=`eval echo $LDFLAGS`
-_CFLAGS=`eval echo $CFLAGS`
-LDFLAGS=$_LDFLAGS
-CFLAGS=$_CFLAGS
-
-AC_RUN_IFELSE([AC_LANG_PROGRAM([[
-#include "confdefs.h"
-#if IS_WIN32
-#include "windows.h"
-#endif
-#include <stdio.h>
-#include <ftd2xx.h>
- ]], [[
- DWORD x;
- FT_GetLibraryVersion( &x );
- ]])], [
- AC_MSG_RESULT([Success!])
- ], [
- AC_MSG_ERROR([Cannot build & run test program using ftd2xx.lib])
- ], [
- AC_MSG_RESULT([Skipping as we are cross-compiling])
- ])
-
-AC_MSG_CHECKING([for ftd2xx highspeed device support])
-AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
-#include "confdefs.h"
-#if IS_WIN32
-#include "windows.h"
-#endif
-#include <stdio.h>
-#include <ftd2xx.h>
-
-DWORD x = FT_DEVICE_4232H;
- ]], [])], [
- AC_DEFINE([BUILD_FT2232_HIGHSPEED], [1],
- [Support FT2232H/FT4232HS with FTD2XX or libftdi.])
- build_ft2232_highspeed=yes
- ], [
- build_ft2232_highspeed=no
- ])
- AC_MSG_RESULT([$build_ft2232_highspeed])
-
- if test $build_ft2232_highspeed = no; then
- AC_MSG_WARN([You need a newer FTD2XX driver (version 2.04.16 or later).])
- fi
-
-AC_MSG_CHECKING([for ftd2xx FT232H device support])
-AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
-#include "confdefs.h"
-#if IS_WIN32
-#include "windows.h"
-#endif
-#include <stdio.h>
-#include <ftd2xx.h>
-
-DWORD x = FT_DEVICE_232H;
- ]], [])], [
- AC_DEFINE([HAS_ENUM_FT232H], [1],
- [Support FT232H with FTD2XX or libftdi.])
- has_enum_ft232h=yes
- ], [
- has_enum_ft232h=no
- ])
- AC_MSG_RESULT([$has_enum_ft232h])
-
- if test $has_enum_ft232h = no; then
- AC_MSG_WARN([You need a newer FTD2XX driver (version 2.08.12 or later).])
- fi
-
-LDFLAGS=$LDFLAGS_SAVE
-CFLAGS=$CFLAGS_SAVE
-fi
-
-if test $build_ft2232_libftdi = yes -o $build_usb_blaster_libftdi = yes -o \
- $build_openjtag_ftdi = yes -o $build_presto_libftdi = yes; then
-
- # we can have libftdi or libftdi1, so check it and use the latest one
- PKG_CHECK_MODULES([LIBFTDI], [libftdi1], [use_libftdi=yes], [use_libftdi=no])
- if test $use_libftdi = no; then
- PKG_CHECK_MODULES([LIBFTDI], [libftdi], [use_libftdi=yes], [use_libftdi=no])
- fi
- if test $use_libftdi = no; then
- AC_MSG_ERROR([The libftdi driver is not present on your system.])
- fi
-
- #
- # Try to build a small program.
- AC_MSG_CHECKING([Build & Link with libftdi...])
-
- LDFLAGS_SAVE=$LDFLAGS
- CFLAGS_SAVE=$CFLAGS
- LIBS_SAVE=$LIBS
- _LDFLAGS=`eval echo $LDFLAGS`
- _CFLAGS=`eval echo $CFLAGS`
- _LIBS=`eval echo $LIBS`
- LDFLAGS=$_LDFLAGS
- CFLAGS="$_CFLAGS $LIBFTDI_CFLAGS"
- LIBS="$_LIBS $LIBFTDI_LIBS"
-
- AC_RUN_IFELSE([AC_LANG_PROGRAM([[
-#include <stdio.h>
-#include <ftdi.h>
- ]], [[
- struct ftdi_context *p;
- p = ftdi_new();
- if( p != NULL ){
- return 0;
- } else {
- fprintf( stderr, "calling ftdi_new() failed\n");
- return 1;
- }
- ]])], [
- AC_MSG_RESULT([Success])
- ], [
- AC_MSG_ERROR([Cannot build & run test program using libftdi])
- ], [
- AC_MSG_RESULT([Skipping as we are cross-compiling, trying build only])
- AC_SEARCH_LIBS([ftdi_new], [], [], [AC_MSG_ERROR([Cannot link with libftdi])])
- ])
-
-AC_MSG_CHECKING([for libftdi highspeed device support])
-AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
-#include <stdio.h>
-#include <ftdi.h>
- ]], [[
-enum ftdi_chip_type x = TYPE_2232H;
- ]])], [
- AC_DEFINE([BUILD_FT2232_HIGHSPEED], [1],
- [Support FT2232H/FT4232HS with FTD2XX or libftdi.])
- build_ft2232_highspeed=yes
- ], [
- build_ft2232_highspeed=no
- ])
- AC_MSG_RESULT([$build_ft2232_highspeed])
-
- if test $build_ft2232_highspeed = no; then
- AC_MSG_WARN([You need a newer libftdi version (0.16 or later).])
- fi
-
-AC_MSG_CHECKING([for libftdi FT232H device support])
-AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
-#include <stdio.h>
-#include <ftdi.h>
- ]], [[
-enum ftdi_chip_type x = TYPE_232H;
- ]])], [
- AC_DEFINE([HAS_ENUM_FT232H], [1],
- [Support FT232H with FTD2XX or libftdi.])
- has_enum_ft232h=yes
- ], [
- has_enum_ft232h=no
- ])
- AC_MSG_RESULT([$has_enum_ft232h])
-
- if test $has_enum_ft232h = no; then
- AC_MSG_WARN([You need a newer libftdi version (0.20 or later).])
- fi
-
- # Restore the 'unexpanded ldflags'
- LDFLAGS=$LDFLAGS_SAVE
- CFLAGS=$CFLAGS_SAVE
- LIBS=$LIBS_SAVE
-fi
-
-PKG_CHECK_MODULES([LIBUSB1], [libusb-1.0], [
- use_libusb1=yes
- AC_DEFINE([HAVE_LIBUSB1], [1], [Define if you have libusb-1.x])
- PKG_CHECK_EXISTS([libusb-1.0 >= 1.0.9],
- [AC_DEFINE([HAVE_LIBUSB_ERROR_NAME], [1], [Define if your libusb has libusb_error_name()])],
- [AC_MSG_WARN([libusb-1.x older than 1.0.9 detected, consider updating])])
- LIBUSB1_CFLAGS=`echo $LIBUSB1_CFLAGS | sed 's/-I/-isystem /'`
- AC_MSG_NOTICE([libusb-1.0 header bug workaround: LIBUSB1_CFLAGS changed to "$LIBUSB1_CFLAGS"])
- PKG_CHECK_EXISTS([libusb-1.0 >= 1.0.16],
- [AC_DEFINE([HAVE_LIBUSB_GET_PORT_NUMBERS], [1], [Define if your libusb has libusb_get_port_numbers()])])
- ], [
- use_libusb1=no
- AC_MSG_WARN([libusb-1.x not found, trying legacy libusb-0.1 as a fallback; consider installing libusb-1.x instead])
-])
-
-PKG_CHECK_MODULES([LIBUSB0], [libusb], [use_libusb0=yes], [use_libusb0=no])
-
-for hidapi_lib in hidapi hidapi-hidraw hidapi-libusb; do
- PKG_CHECK_MODULES([HIDAPI],[$hidapi_lib],[
- use_hidapi=yes
- break
- ],[
- use_hidapi=no
- ])
-done
-
-m4_define([PROCESS_ADAPTERS], [
- m4_foreach([adapter], [$1], [
- if test $2; then
- if test $ADAPTER_VAR([adapter]) != no; then
- AC_DEFINE([BUILD_]ADAPTER_SYM([adapter]), [1], [1 if you want the ]ADAPTER_DESC([adapter]).)
- else
- AC_DEFINE([BUILD_]ADAPTER_SYM([adapter]), [0], [0 if you do not want the ]ADAPTER_DESC([adapter]).)
- fi
- else
- if test $ADAPTER_VAR([adapter]) = yes; then
- AC_MSG_ERROR([$3 is required for the ADAPTER_DESC([adapter])])
- fi
- ADAPTER_VAR([adapter])=no
- fi
- AM_CONDITIONAL(ADAPTER_SYM([adapter]), [test $ADAPTER_VAR([adapter]) != no])
- ])
-])
-
-PROCESS_ADAPTERS([USB1_ADAPTERS], [$use_libusb1 = yes], [libusb-1.x])
-PROCESS_ADAPTERS([USB_ADAPTERS], [$use_libusb1 = yes -o $use_libusb0 = yes], [libusb-1.x or libusb-0.1])
-PROCESS_ADAPTERS([USB0_ADAPTERS], [$use_libusb0 = yes], [libusb-0.1])
-PROCESS_ADAPTERS([HIDAPI_ADAPTERS], [$use_hidapi = yes], [hidapi])
-
-if test $enable_stlink != no -o $enable_ti_icdi != no; then
- AC_DEFINE([BUILD_HLADAPTER], [1], [1 if you want the High Level JTAG driver.])
-else
- AC_DEFINE([BUILD_HLADAPTER], [0], [0 if you want the High Level JTAG driver.])
-fi
-AM_CONDITIONAL([HLADAPTER], [test $enable_stlink != no -o $enable_ti_icdi != no])
-
-# Disable J-Link driver if internal libjaylink is disabled and libjaylink was
-# not found by pkg-config.
-if test $enable_jlink != no; then
- if test $use_internal_libjaylink$HAVE_LIBJAYLINK = nono; then
- enable_jlink=no
- fi
-fi
-
-AM_CONDITIONAL([RELEASE], [test $build_release = yes])
-AM_CONDITIONAL([PARPORT], [test $build_parport = yes])
-AM_CONDITIONAL([DUMMY], [test $build_dummy = yes])
-AM_CONDITIONAL([GIVEIO], [test x$parport_use_giveio = xyes])
-AM_CONDITIONAL([EP93XX], [test $build_ep93xx = yes])
-AM_CONDITIONAL([ZY1000], [test $build_zy1000 = yes])
-AM_CONDITIONAL([ZY1000_MASTER], [test $build_zy1000_master = yes])
-AM_CONDITIONAL([IOUTIL], [test $build_ioutil = yes])
-AM_CONDITIONAL([AT91RM9200], [test $build_at91rm9200 = yes])
-AM_CONDITIONAL([BCM2835GPIO], [test $build_bcm2835gpio = yes])
-AM_CONDITIONAL([BITBANG], [test $build_bitbang = yes])
-AM_CONDITIONAL([FT2232_LIBFTDI], [test $build_ft2232_libftdi = yes])
-AM_CONDITIONAL([FT2232_DRIVER], [test $build_ft2232_ftd2xx = yes -o $build_ft2232_libftdi = yes])
-AM_CONDITIONAL([USB_BLASTER_LIBFTDI], [test $build_usb_blaster_libftdi = yes])
-AM_CONDITIONAL([USB_BLASTER_FTD2XX], [test $build_usb_blaster_ftd2xx = yes])
-AM_CONDITIONAL([JTAG_VPI], [test $build_jtag_vpi = yes -o $build_jtag_vpi = yes])
-AM_CONDITIONAL([USB_BLASTER_DRIVER], [test $build_usb_blaster_ftd2xx = yes -o $build_usb_blaster_libftdi = yes -o $enable_usb_blaster_2 != no])
-AM_CONDITIONAL([AMTJTAGACCEL], [test $build_amtjtagaccel = yes])
-AM_CONDITIONAL([GW16012], [test $build_gw16012 = yes])
-AM_CONDITIONAL([PRESTO_LIBFTDI], [test $build_presto_libftdi = yes])
-AM_CONDITIONAL([PRESTO_DRIVER], [test $build_presto_ftd2xx = yes -o $build_presto_libftdi = yes])
-AM_CONDITIONAL([OPENJTAG], [test $build_openjtag_ftd2xx = yes -o $build_openjtag_ftdi = yes])
-AM_CONDITIONAL([OOCD_TRACE], [test $build_oocd_trace = yes])
-AM_CONDITIONAL([REMOTE_BITBANG], [test $build_remote_bitbang = yes])
-AM_CONDITIONAL([BUSPIRATE], [test $build_buspirate = yes])
-AM_CONDITIONAL([SYSFSGPIO], [test $build_sysfsgpio = yes])
-AM_CONDITIONAL([USE_LIBUSB0], [test $use_libusb0 = yes])
-AM_CONDITIONAL([USE_LIBUSB1], [test $use_libusb1 = yes])
-AM_CONDITIONAL([IS_CYGWIN], [test $is_cygwin = yes])
-AM_CONDITIONAL([IS_MINGW], [test $is_mingw = yes])
-AM_CONDITIONAL([IS_WIN32], [test $is_win32 = yes])
-AM_CONDITIONAL([IS_DARWIN], [test $is_darwin = yes])
-AM_CONDITIONAL([BITQ], [test $build_bitq = yes])
-AM_CONDITIONAL([CMSIS_DAP], [test $use_hidapi = yes])
-
-AM_CONDITIONAL([MINIDRIVER], [test $build_minidriver = yes])
-AM_CONDITIONAL([MINIDRIVER_DUMMY], [test $build_minidriver_dummy = yes])
-
-AM_CONDITIONAL([INTERNAL_JIMTCL], [test $use_internal_jimtcl = yes])
-AM_CONDITIONAL([INTERNAL_LIBJAYLINK], [test $use_internal_libjaylink = yes])
-
-# Look for environ alternatives. Possibility #1: is environ in unistd.h or stdlib.h?
-AC_MSG_CHECKING([for environ in unistd.h and stdlib.h])
-AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
-#define _GNU_SOURCE
-#include <unistd.h>
-#include <stdlib.h>
- ]], [[char **ep = environ;]]
- )], [
- AC_MSG_RESULT([yes])
- has_environ=yes
- ], [
- AC_MSG_RESULT([no])
-
- # Possibility #2: can environ be found in an available library?
- AC_MSG_CHECKING([for extern environ])
- AC_LINK_IFELSE([AC_LANG_PROGRAM([[
- extern char **environ;
- ]], [[char **ep = environ;]]
- )], [
- AC_DEFINE(NEED_ENVIRON_EXTERN, [1], [Must declare 'environ' to use it.])
- has_environ=yes
- ], [
- has_environ=no
- ])
- AC_MSG_RESULT([${has_environ}])
- ])
-
-if test "${has_environ}" != "yes" ; then
- AC_MSG_FAILURE([Could not find 'environ' in unistd.h or available libraries.])
-fi
-
-AC_DEFINE([_GNU_SOURCE],[1],[Use GNU C library extensions (e.g. stdndup).])
-
-# set default gcc warnings
-GCC_WARNINGS="-Wall -Wstrict-prototypes -Wformat-security -Wshadow"
-if test "${gcc_wextra}" = yes; then
- GCC_WARNINGS="${GCC_WARNINGS} -Wextra -Wno-unused-parameter"
- GCC_WARNINGS="${GCC_WARNINGS} -Wbad-function-cast"
- GCC_WARNINGS="${GCC_WARNINGS} -Wcast-align"
- GCC_WARNINGS="${GCC_WARNINGS} -Wredundant-decls"
-fi
-if test "${gcc_werror}" = yes; then
- GCC_WARNINGS="${GCC_WARNINGS} -Werror"
-fi
-
-# overide default gcc cflags
-if test $gcc_warnings = yes; then
- CFLAGS="$CFLAGS $GCC_WARNINGS"
-fi
-
-AC_CONFIG_FILES([
- Makefile
- src/Makefile
- src/helper/Makefile
- src/jtag/Makefile
- src/jtag/drivers/Makefile
- src/jtag/drivers/usb_blaster/Makefile
- src/jtag/hla/Makefile
- src/jtag/aice/Makefile
- src/transport/Makefile
- src/target/openrisc/Makefile
- src/xsvf/Makefile
- src/svf/Makefile
- src/target/Makefile
- src/rtos/Makefile
- src/server/Makefile
- src/flash/Makefile
- src/flash/nor/Makefile
- src/flash/nand/Makefile
- src/pld/Makefile
- doc/Makefile
-])
-AC_OUTPUT
-
-echo
-echo
-echo OpenOCD configuration summary
-echo --------------------------------------------------
-m4_foreach([adapter], [USB1_ADAPTERS, USB_ADAPTERS, USB0_ADAPTERS, HIDAPI_ADAPTERS],
- [s=m4_format(["%-40s"], ADAPTER_DESC([adapter]))
- case $ADAPTER_VAR([adapter]) in
- auto)
- echo "$s"yes '(auto)'
- ;;
- yes)
- echo "$s"yes
- ;;
- no)
- echo "$s"no
- ;;
- esac
-])
-echo
-
-if test $build_ft2232_libftdi = yes -o $build_ft2232_ftd2xx = yes; then
- if test $enable_ftdi = no; then
- AC_MSG_WARN([Building the deprecated 'ft2232' adapter driver but not its replacement!])
- AC_MSG_WARN([Please consider using --enable-ftdi instead.])
- else
- AC_MSG_WARN([Building the deprecated 'ft2232' adapter driver.])
- fi
-fi
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/99-openocd.rules
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/99-openocd.rules b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/99-openocd.rules
deleted file mode 100755
index 057c4b7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/99-openocd.rules
+++ /dev/null
@@ -1,134 +0,0 @@
-# Copy this file to /etc/udev/rules.d/
-
-ACTION!="add|change", GOTO="openocd_rules_end"
-SUBSYSTEM!="usb|tty|hidraw", GOTO="openocd_rules_end"
-
-# Please keep this list sorted by VID:PID
-
-# opendous and estick
-ATTRS{idVendor}=="03eb", ATTRS{idProduct}=="204f", MODE="664", GROUP="plugdev"
-
-# Original FT232/FT245 VID:PID
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev"
-
-# Original FT2232 VID:PID
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6010", MODE="664", GROUP="plugdev"
-
-# Original FT4232 VID:PID
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="664", GROUP="plugdev"
-
-# Original FT232H VID:PID
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="664", GROUP="plugdev"
-
-# DISTORTEC JTAG-lock-pick Tiny 2
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="664", GROUP="plugdev"
-
-# TUMPA, TUMPA Lite
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a98", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8a99", MODE="664", GROUP="plugdev"
-
-# XDS100v2
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="a6d0", MODE="664", GROUP="plugdev"
-
-# Xverve Signalyzer Tool (DT-USB-ST), Signalyzer LITE (DT-USB-SLITE)
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca0", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bca1", MODE="664", GROUP="plugdev"
-
-# TI/Luminary Stellaris Evaluation Board FTDI (several)
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcd9", MODE="664", GROUP="plugdev"
-
-# TI/Luminary Stellaris In-Circuit Debug Interface FTDI (ICDI) Board
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bcda", MODE="664", GROUP="plugdev"
-
-# egnite Turtelizer 2
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="bdc8", MODE="664", GROUP="plugdev"
-
-# Section5 ICEbear
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c140", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="c141", MODE="664", GROUP="plugdev"
-
-# Amontec JTAGkey and JTAGkey-tiny
-ATTRS{idVendor}=="0403", ATTRS{idProduct}=="cff8", MODE="664", GROUP="plugdev"
-
-# TI ICDI
-ATTRS{idVendor}=="0451", ATTRS{idProduct}=="c32a", MODE="664", GROUP="plugdev"
-
-# STLink v1
-ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3744", MODE="664", GROUP="plugdev"
-
-# STLink v2
-ATTRS{idVendor}=="0483", ATTRS{idProduct}=="3748", MODE="664", GROUP="plugdev"
-
-# STLink v2-1
-ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374b", MODE="664", GROUP="plugdev"
-
-# Hilscher NXHX Boards
-ATTRS{idVendor}=="0640", ATTRS{idProduct}=="0028", MODE="664", GROUP="plugdev"
-
-# Hitex STR9-comStick
-ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002c", MODE="664", GROUP="plugdev"
-
-# Hitex STM32-PerformanceStick
-ATTRS{idVendor}=="0640", ATTRS{idProduct}=="002d", MODE="664", GROUP="plugdev"
-
-# Altera USB Blaster
-ATTRS{idVendor}=="09fb", ATTRS{idProduct}=="6001", MODE="664", GROUP="plugdev"
-
-# Amontec JTAGkey-HiSpeed
-ATTRS{idVendor}=="0fbb", ATTRS{idProduct}=="1000", MODE="664", GROUP="plugdev"
-
-# SEGGER J-Link
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0101", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0102", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0103", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0104", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0105", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0107", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="0108", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1010", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1011", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1012", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1013", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1014", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1015", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1016", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1017", MODE="664", GROUP="plugdev"
-ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1018", MODE="664", GROUP="plugdev"
-
-# Raisonance RLink
-ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="664", GROUP="plugdev"
-
-# Debug Board for Neo1973
-ATTRS{idVendor}=="1457", ATTRS{idProduct}=="5118", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-USB-OCD
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0003", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-USB-OCD-TINY
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="0004", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-JTAG-EW
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="001e", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-USB-OCD-TINY-H
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002a", MODE="664", GROUP="plugdev"
-
-# Olimex ARM-USB-OCD-H
-ATTRS{idVendor}=="15ba", ATTRS{idProduct}=="002b", MODE="664", GROUP="plugdev"
-
-# USBprog with OpenOCD firmware
-ATTRS{idVendor}=="1781", ATTRS{idProduct}=="0c63", MODE="664", GROUP="plugdev"
-
-# TI/Luminary Stellaris In-Circuit Debug Interface (ICDI) Board
-ATTRS{idVendor}=="1cbe", ATTRS{idProduct}=="00fd", MODE="664", GROUP="plugdev"
-
-# Marvell Sheevaplug
-ATTRS{idVendor}=="9e88", ATTRS{idProduct}=="9e8f", MODE="664", GROUP="plugdev"
-
-# Keil Software, Inc. ULink
-ATTRS{idVendor}=="c251", ATTRS{idProduct}=="2710", MODE="664", GROUP="plugdev"
-
-# CMSIS-DAP compatible adapters
-ATTRS{product}=="*CMSIS-DAP*", MODE="664", GROUP="plugdev"
-
-LABEL="openocd_rules_end"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/coresight-trace.txt
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/coresight-trace.txt b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/coresight-trace.txt
deleted file mode 100755
index c093c20..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/coresight-trace.txt
+++ /dev/null
@@ -1,68 +0,0 @@
-+OpenOCD and CoreSight Tracing
-+
-Many recent ARM chips (Using e..g. Cortex-M3 and
-Cortex-M4 cores) support CoreSight debug/trace.
-This note sketches an approach currently planned for those cores
-with OpenOCD.
-
- This tracing data can help debug and tune ARM software, but not
-all cores support tracing. Some support more extensive tracing
-other cores with trace support +should be able to use the same
-approach and maybe some of the same analysis code.
-
-+the Cortex-M3 is assumed here to be the
-+core in use, for simplicity and to reflect current OpenOCD users.
-
-
-This note summarizes a software model to generate, collect, and
-analyze such trace data . That is not fully implemented as of early
-January 2011, +and thus is not *yet* usable.
-+
-+
-+Some microcontroller cores support a low pin-count Single-wire trace,
-with a mode where +trace data is emitted (usually to a UART. To use
-this mode, +SWD must be in use.
-+At this writing, OpenOCD SWD support is not yet complete either.
-
-(There are also multi-wire trace ports requiring more complex debug
-adapters than OpenOCD currently supports, and offering richer data.
-+
-+
-+* ENABLING involves activating SWD and (single wire) trace.
-+
-+current expectations are that OpenOCD itself will handle enabling;
-activating single wire trace involves a debug adapter interaction, and
-collecting that trace data requires particular (re)wiring.
-+
-+* CONFIGURATION involves setting up ITM and/or ETM modules to emit the
-+desired data from the Cortex core. (This might include dumping
-+event counters printf-style messages; code profiling; and more. Not all
-+cores offer the same trace capabilities.
-+
-+current expectations are that Tcl scripts will be used to configure these
-+modules for the desired tracing, by direct writes to registers. In some
-+cases (as with RTOS event tracking and similar messaging, this might
-+be augmented or replaced by user code running on the ARM core.
-+
-+COLLECTION involves reading that trace data, probably through UART, and
-+saving it in a useful format to analyse For now, deferred analysis modes
-are assumed, not than real-time or interactive ones.
-+
-+
-+current expectations are to to dump data in text using contrib/itmdump.c
-+or derived tools, and to post-process it into reports. Such reports might
-+include program messaging (such as application data streams via ITM, maybe
-+using printf type messaging; code coverage analysis or so forth. Recent
-+versions of CMSIS software reserve some ITM codespace for RTOS event
-tracing and include ITM messaging support.
-Clearly some of that data would be valuable for interactive debugging.
-+
-+Should someone get ambitious, GUI reports should be possible. GNU tools
-+for simpler reports like gprof may be simpler to support at first.
-+In any case, OpenOCD is not currently GUI-oriented. Accordingly, we now
-+expect any such graphics to come from postprocessing.
-
- measurments for RTOS event timings should also be easy to collect.
-+Examples include context and message switch times, as well as times
-for application interactions.
-+
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/cross-build.sh
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/cross-build.sh b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/cross-build.sh
deleted file mode 100755
index 74ab0f4..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/cross-build.sh
+++ /dev/null
@@ -1,119 +0,0 @@
-#!/bin/sh
-
-# This is an example of how to do a cross-build of OpenOCD using pkg-config.
-# Cross-building with pkg-config is deceptively hard and most guides and
-# tutorials are incomplete or give bad advice. Some of the traps that are easy
-# to fall in but handled by this script are:
-#
-# * Polluting search paths and flags with values from the build system.
-# * Faulty pkg-config wrappers shipped with distribution packaged cross-
-# toolchains.
-# * Build failing because pkg-config discards some paths even though they are
-# correctly listed in the .pc file.
-# * Getting successfully built binaries that cannot find runtime data because
-# paths refer to the build file system.
-#
-# This script is probably more useful as a reference than as a complete build
-# tool but for some configurations it may be usable as-is. It only cross-
-# builds libusb-1.0 from source, but the script can be extended to build other
-# prerequisities in a similar manner.
-#
-# Usage:
-# export LIBUSB1_SRC=/path/to/libusb-1.0
-# export HIDAPI_SRC=/path/to/hidapi
-# export OPENOCD_CONFIG="--enable-..."
-# cd /work/dir
-# /path/to/openocd/contrib/cross-build.sh <host-triplet>
-#
-# For static linking, a workaround is to
-# export LIBUSB1_CONFIG="--enable-static --disable-shared"
-#
-# All the paths must not contain any spaces.
-
-set -e -x
-
-WORK_DIR=$PWD
-
-## Source code paths, customize as necessary
-: ${OPENOCD_SRC:="`dirname "$0"`/.."}
-: ${LIBUSB1_SRC:=/path/to/libusb}
-: ${HIDAPI_SRC:=/path/to/hidapi}
-
-OPENOCD_SRC=`readlink -m $OPENOCD_SRC`
-LIBUSB1_SRC=`readlink -m $LIBUSB1_SRC`
-HIDAPI_SRC=`readlink -m $HIDAPI_SRC`
-
-HOST_TRIPLET=$1
-BUILD_DIR=$WORK_DIR/$HOST_TRIPLET-build
-LIBUSB1_BUILD_DIR=$BUILD_DIR/libusb1
-HIDAPI_BUILD_DIR=$BUILD_DIR/hidapi
-OPENOCD_BUILD_DIR=$BUILD_DIR/openocd
-
-## Root of host file tree
-SYSROOT=$WORK_DIR/$HOST_TRIPLET-root
-
-## Install location within host file tree
-: ${PREFIX=/usr}
-
-## OpenOCD-only install dir for packaging
-PACKAGE_DIR=$WORK_DIR/openocd_`git --git-dir=$OPENOCD_SRC/.git describe`_$HOST_TRIPLET
-
-#######
-
-# Create pkg-config wrapper and make sure it's used
-export PKG_CONFIG=$WORK_DIR/$HOST_TRIPLET-pkg-config
-
-cat > $PKG_CONFIG <<EOF
-#!/bin/sh
-
-SYSROOT=$SYSROOT
-
-export PKG_CONFIG_DIR=
-export PKG_CONFIG_LIBDIR=\${SYSROOT}$PREFIX/lib/pkgconfig:\${SYSROOT}$PREFIX/share/pkgconfig
-export PKG_CONFIG_SYSROOT_DIR=\${SYSROOT}
-
-# The following have to be set to avoid pkg-config to strip /usr/include and /usr/lib from paths
-# before they are prepended with the sysroot path. Feels like a pkg-config bug.
-export PKG_CONFIG_ALLOW_SYSTEM_CFLAGS=
-export PKG_CONFIG_ALLOW_SYSTEM_LIBS=
-
-exec pkg-config "\$@"
-EOF
-chmod +x $PKG_CONFIG
-
-# Clear out work dir
-rm -rf $SYSROOT $BUILD_DIR
-mkdir -p $SYSROOT
-
-# libusb-1.0 build & install into sysroot
-mkdir -p $LIBUSB1_BUILD_DIR
-cd $LIBUSB1_BUILD_DIR
-$LIBUSB1_SRC/configure --build=`$LIBUSB1_SRC/config.guess` --host=$HOST_TRIPLET \
---with-sysroot=$SYSROOT --prefix=$PREFIX \
-$LIBUSB1_CONFIG
-make
-make install DESTDIR=$SYSROOT
-
-# hidapi build & install into sysroot
-if [ -d $HIDAPI_SRC ] ; then
- mkdir -p $HIDAPI_BUILD_DIR
- cd $HIDAPI_BUILD_DIR
- $HIDAPI_SRC/configure --build=`$HIDAPI_SRC/config.guess` --host=$HOST_TRIPLET \
- --with-sysroot=$SYSROOT --prefix=$PREFIX \
- $HIDAPI_CONFIG
- make
- make install DESTDIR=$SYSROOT
-fi
-
-# OpenOCD build & install into sysroot
-mkdir -p $OPENOCD_BUILD_DIR
-cd $OPENOCD_BUILD_DIR
-$OPENOCD_SRC/configure --build=`$OPENOCD_SRC/config.guess` --host=$HOST_TRIPLET \
---with-sysroot=$SYSROOT --prefix=$PREFIX \
-$OPENOCD_CONFIG
-make
-make install DESTDIR=$SYSROOT
-
-# Separate OpenOCD install w/o dependencies. OpenOCD will have to be linked
-# statically or have dependencies packaged/installed separately.
-make install DESTDIR=$PACKAGE_DIR
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/gen-stellaris-part-header.pl
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/gen-stellaris-part-header.pl b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/gen-stellaris-part-header.pl
deleted file mode 100755
index 68f2889..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/gen-stellaris-part-header.pl
+++ /dev/null
@@ -1,124 +0,0 @@
-#!/usr/bin/perl
-# Automatically generates the StellarisParts struct in src/flash/nor/stellaris.c
-# Uses the header files from TI/Luminary's StellarisWare complete Firmware Development Package
-# available from: http://www.luminarymicro.com/products/software_updates.html
-
-$comment = "// Autogenerated by contrib/gen-stellaris-part-header.pl
-// From Stellaris Firmware Development Package revision";
-
-$struct_header = "static const struct {
- uint8_t class;
- uint8_t partno;
- const char *partname;
-} StellarisParts[] = {
-";
-
-$struct_footer = "\t{0xFF, 0x00, \"Unknown Part\"}\n};\n";
-
-$#ARGV == 1 || die "Usage: $0 <inc directory> <output file>\n";
--d $ARGV[0] || die $ARGV[0]." is not a directory\n";
-$dir = $ARGV[0];
--f $ARGV[1] || die $ARGV[1]." is not a file\n";
-$file = $ARGV[1];
-print STDERR "Scanning $dir, Updating $file\n";
-
-opendir(DIR, $dir) || die "can't open $dir: $!";
-@files = readdir(DIR);
-closedir(DIR);
-
-@header_files = sort(grep(/lm.+\.h/, @files));
-
-$ver = 0;
-$new_struct = $struct_header;
-process_file(@header_files);
-$new_struct .= $struct_footer;
-
-$dump = "$comment $ver\n$new_struct";
-{
- local($/, *INPUT);
- open(INPUT, $file) || die "can't open $file: $!";
- $contents = <INPUT>;
- close(INPUT);
-}
-
-$old_struct = qr/((^\/\/.*?\n)*)\Q$struct_header\E.*?$struct_footer/sm;
-$contents =~ s/$old_struct/$dump/;
-open(OUTPUT, ">$file") || die "can't open file $file for writing: $!";
-print OUTPUT $contents;
-close(OUTPUT);
-
-sub process_file {
- foreach $h_file (@_) {
- ($base) = ($h_file =~ m/lm..(.{3,7})\.h/ig);
- $base = uc($base);
- local($/, *FILE);
- open(FILE, "$dir/$h_file");
- $content = <FILE>;
- close(FILE);
- $invalid = 0;
- if ($content =~ /This is part of revision (\d+) of/) {
- if ($ver != 0 and $ver != $1) {
- print STDERR "File version mismatch: $ver != $1\n";
- $ver = max($ver, $1);
- } else {
- $ver = $1;
- }
- }
-
- if ($content =~ /SYSCTL_DID0_CLASS_[^M].+?0x(\S+)/s) {
- $class = hex($1) >> 16;
- } else {
- # attempt another way to get class
- if ($content =~ /\s(\S+)-class/) {
- $class = getclass($1);
- if ($class eq 0xFF) {
- print STDERR "$h_file unknown class\n";
- $invalid = 1;
- }
- } else {
- print STDERR "$h_file is missing SYSCTL_DID0_CLASS_\n";
- $class = 0;
- $invalid = 1;
- }
- }
-
- if ($content =~ /SYSCTL_DID1_PRTNO_$base.+0x(\S+)/) {
- $prtno = hex($1);
- $base = "LM3S" . $base;
- } else {
- # LM4F have a changed header
- if ($content =~ /SYSCTL_DID1_PRTNO_LM4F$base.+?0x(\S+)/s) {
- $prtno = hex($1);
- $base = "LM4F" . $base;
- } else {
- print STDERR "$h_file is missing SYSCTL_DID1_PRTNO\n";
- $prtno = 0;
- $invalid = 1;
- }
- }
- $new_member = sprintf "{0x%02X, 0x%02X, \"%s\"},", $class, $prtno >> 16, $base;
- if ($invalid == 1) {
- #$new_struct .= "\t//$new_member\t// Invalid\n";
- } else {
- $new_struct .= "\t$new_member\n";
- }
- }
-}
-
-sub getclass {
- $class = $_[0];
- if ($class =~ /Sandstorm/i) {
- return 0;
- } elsif ($class =~ /Fury/i) {
- return 1;
- } elsif ($class =~ /DustDevil/i) {
- return 3;
- } elsif ($class =~ /Tempest/i) {
- return 4;
- } elsif ($class =~ /Blizzard/i) {
- return 5;
- } elsif ($class =~ /Firestorm/i) {
- return 6;
- }
- return 0xFF;
-}
[37/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mxc.c
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mxc.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mxc.c
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--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mxc.c
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@@ -1,962 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Alexei Babich *
- * Rezonans plc., Chelyabinsk, Russia *
- * impatt@mail.ru *
- * *
- * Copyright (C) 2010 by Gaetan CARLIER *
- * Trump s.a., Belgium *
- * *
- * Copyright (C) 2011 by Erik Ahlen *
- * Avalon Innovation, Sweden *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * Freescale iMX OpenOCD NAND Flash controller support.
- * based on Freescale iMX2* and iMX3* OpenOCD NAND Flash controller support.
- */
-
-/*
- * driver tested with Samsung K9F2G08UXA and Numonyx/ST NAND02G-B2D @mxc
- * tested "nand probe #", "nand erase # 0 #", "nand dump # file 0 #",
- * "nand write # file 0", "nand verify"
- *
- * get_next_halfword_from_sram_buffer() not tested
- * !! all function only tested with 2k page nand device; mxc_write_page
- * writes the 4 MAIN_BUFFER's and is not compatible with < 2k page
- * !! oob must be be used due to NFS bug
- * !! oob must be 64 bytes per 2KiB page
-*/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "mxc.h"
-#include <target/target.h>
-
-#define OOB_SIZE 64
-
-#define nfc_is_v1() (mxc_nf_info->mxc_version == MXC_VERSION_MX27 || \
- mxc_nf_info->mxc_version == MXC_VERSION_MX31)
-#define nfc_is_v2() (mxc_nf_info->mxc_version == MXC_VERSION_MX25 || \
- mxc_nf_info->mxc_version == MXC_VERSION_MX35)
-
-/* This permits to print (in LOG_INFO) how much bytes
- * has been written after a page read or write.
- * This is useful when OpenOCD is used with a graphical
- * front-end to estimate progression of the global read/write
- */
-#undef _MXC_PRINT_STAT
-/* #define _MXC_PRINT_STAT */
-
-static const char target_not_halted_err_msg[] =
- "target must be halted to use mxc NAND flash controller";
-static const char data_block_size_err_msg[] =
- "minimal granularity is one half-word, %" PRId32 " is incorrect";
-static const char sram_buffer_bounds_err_msg[] =
- "trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
-static const char get_status_register_err_msg[] = "can't get NAND status";
-static uint32_t in_sram_address;
-static unsigned char sign_of_sequental_byte_read;
-
-static uint32_t align_address_v2(struct nand_device *nand, uint32_t addr);
-static int initialize_nf_controller(struct nand_device *nand);
-static int get_next_byte_from_sram_buffer(struct nand_device *nand, uint8_t *value);
-static int get_next_halfword_from_sram_buffer(struct nand_device *nand, uint16_t *value);
-static int poll_for_complete_op(struct nand_device *nand, const char *text);
-static int validate_target_state(struct nand_device *nand);
-static int do_data_output(struct nand_device *nand);
-
-static int mxc_command(struct nand_device *nand, uint8_t command);
-static int mxc_address(struct nand_device *nand, uint8_t address);
-
-NAND_DEVICE_COMMAND_HANDLER(mxc_nand_device_command)
-{
- struct mxc_nf_controller *mxc_nf_info;
- int hwecc_needed;
-
- mxc_nf_info = malloc(sizeof(struct mxc_nf_controller));
- if (mxc_nf_info == NULL) {
- LOG_ERROR("no memory for nand controller");
- return ERROR_FAIL;
- }
- nand->controller_priv = mxc_nf_info;
-
- if (CMD_ARGC < 4) {
- LOG_ERROR("use \"nand device mxc target mx25|mx27|mx31|mx35 noecc|hwecc [biswap]\"");
- return ERROR_FAIL;
- }
-
- /*
- * check board type
- */
- if (strcmp(CMD_ARGV[2], "mx25") == 0) {
- mxc_nf_info->mxc_version = MXC_VERSION_MX25;
- mxc_nf_info->mxc_base_addr = 0xBB000000;
- mxc_nf_info->mxc_regs_addr = mxc_nf_info->mxc_base_addr + 0x1E00;
- } else if (strcmp(CMD_ARGV[2], "mx27") == 0) {
- mxc_nf_info->mxc_version = MXC_VERSION_MX27;
- mxc_nf_info->mxc_base_addr = 0xD8000000;
- mxc_nf_info->mxc_regs_addr = mxc_nf_info->mxc_base_addr + 0x0E00;
- } else if (strcmp(CMD_ARGV[2], "mx31") == 0) {
- mxc_nf_info->mxc_version = MXC_VERSION_MX31;
- mxc_nf_info->mxc_base_addr = 0xB8000000;
- mxc_nf_info->mxc_regs_addr = mxc_nf_info->mxc_base_addr + 0x0E00;
- } else if (strcmp(CMD_ARGV[2], "mx35") == 0) {
- mxc_nf_info->mxc_version = MXC_VERSION_MX35;
- mxc_nf_info->mxc_base_addr = 0xBB000000;
- mxc_nf_info->mxc_regs_addr = mxc_nf_info->mxc_base_addr + 0x1E00;
- }
-
- /*
- * check hwecc requirements
- */
- hwecc_needed = strcmp(CMD_ARGV[3], "hwecc");
- if (hwecc_needed == 0)
- mxc_nf_info->flags.hw_ecc_enabled = 1;
- else
- mxc_nf_info->flags.hw_ecc_enabled = 0;
-
- mxc_nf_info->optype = MXC_NF_DATAOUT_PAGE;
- mxc_nf_info->fin = MXC_NF_FIN_NONE;
- mxc_nf_info->flags.target_little_endian =
- (nand->target->endianness == TARGET_LITTLE_ENDIAN);
-
- /*
- * should factory bad block indicator be swaped
- * as a workaround for how the nfc handles pages.
- */
- if (CMD_ARGC > 4 && strcmp(CMD_ARGV[4], "biswap") == 0) {
- LOG_DEBUG("BI-swap enabled");
- mxc_nf_info->flags.biswap_enabled = 1;
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_mxc_biswap_command)
-{
- struct nand_device *nand = NULL;
- struct mxc_nf_controller *mxc_nf_info = NULL;
-
- if (CMD_ARGC < 1 || CMD_ARGC > 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
- if (retval != ERROR_OK) {
- command_print(CMD_CTX, "invalid nand device number or name: %s", CMD_ARGV[0]);
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
-
- mxc_nf_info = nand->controller_priv;
- if (CMD_ARGC == 2) {
- if (strcmp(CMD_ARGV[1], "enable") == 0)
- mxc_nf_info->flags.biswap_enabled = true;
- else
- mxc_nf_info->flags.biswap_enabled = false;
- }
- if (mxc_nf_info->flags.biswap_enabled)
- command_print(CMD_CTX, "BI-swapping enabled on %s", nand->name);
- else
- command_print(CMD_CTX, "BI-swapping disabled on %s", nand->name);
-
- return ERROR_OK;
-}
-
-static const struct command_registration mxc_sub_command_handlers[] = {
- {
- .name = "biswap",
- .handler = handle_mxc_biswap_command,
- .help = "Turns on/off bad block information swaping from main area, "
- "without parameter query status.",
- .usage = "bank_id ['enable'|'disable']",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration mxc_nand_command_handler[] = {
- {
- .name = "mxc",
- .mode = COMMAND_ANY,
- .help = "MXC NAND flash controller commands",
- .chain = mxc_sub_command_handlers
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static int mxc_init(struct nand_device *nand)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
-
- int validate_target_result;
- uint16_t buffsize_register_content;
- uint32_t sreg_content;
- uint32_t SREG = MX2_FMCR;
- uint32_t SEL_16BIT = MX2_FMCR_NF_16BIT_SEL;
- uint32_t SEL_FMS = MX2_FMCR_NF_FMS;
- int retval;
- uint16_t nand_status_content;
- /*
- * validate target state
- */
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
-
- if (nfc_is_v1()) {
- target_read_u16(target, MXC_NF_BUFSIZ, &buffsize_register_content);
- mxc_nf_info->flags.one_kb_sram = !(buffsize_register_content & 0x000f);
- } else
- mxc_nf_info->flags.one_kb_sram = 0;
-
- if (mxc_nf_info->mxc_version == MXC_VERSION_MX31) {
- SREG = MX3_PCSR;
- SEL_16BIT = MX3_PCSR_NF_16BIT_SEL;
- SEL_FMS = MX3_PCSR_NF_FMS;
- } else if (mxc_nf_info->mxc_version == MXC_VERSION_MX25) {
- SREG = MX25_RCSR;
- SEL_16BIT = MX25_RCSR_NF_16BIT_SEL;
- SEL_FMS = MX25_RCSR_NF_FMS;
- } else if (mxc_nf_info->mxc_version == MXC_VERSION_MX35) {
- SREG = MX35_RCSR;
- SEL_16BIT = MX35_RCSR_NF_16BIT_SEL;
- SEL_FMS = MX35_RCSR_NF_FMS;
- }
-
- target_read_u32(target, SREG, &sreg_content);
- if (!nand->bus_width) {
- /* bus_width not yet defined. Read it from MXC_FMCR */
- nand->bus_width = (sreg_content & SEL_16BIT) ? 16 : 8;
- } else {
- /* bus_width forced in soft. Sync it to MXC_FMCR */
- sreg_content |= ((nand->bus_width == 16) ? SEL_16BIT : 0x00000000);
- target_write_u32(target, SREG, sreg_content);
- }
- if (nand->bus_width == 16)
- LOG_DEBUG("MXC_NF : bus is 16-bit width");
- else
- LOG_DEBUG("MXC_NF : bus is 8-bit width");
-
- if (!nand->page_size)
- nand->page_size = (sreg_content & SEL_FMS) ? 2048 : 512;
- else {
- sreg_content |= ((nand->page_size == 2048) ? SEL_FMS : 0x00000000);
- target_write_u32(target, SREG, sreg_content);
- }
- if (mxc_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) {
- LOG_ERROR("NAND controller have only 1 kb SRAM, so "
- "pagesize 2048 is incompatible with it");
- } else
- LOG_DEBUG("MXC_NF : NAND controller can handle pagesize of 2048");
-
- if (nfc_is_v2() && sreg_content & MX35_RCSR_NF_4K)
- LOG_ERROR("MXC driver does not have support for 4k pagesize.");
-
- initialize_nf_controller(nand);
-
- retval = ERROR_OK;
- retval |= mxc_command(nand, NAND_CMD_STATUS);
- retval |= mxc_address(nand, 0x00);
- retval |= do_data_output(nand);
- if (retval != ERROR_OK) {
- LOG_ERROR(get_status_register_err_msg);
- return ERROR_FAIL;
- }
- target_read_u16(target, MXC_NF_MAIN_BUFFER0, &nand_status_content);
- if (!(nand_status_content & 0x0080)) {
- LOG_INFO("NAND read-only");
- mxc_nf_info->flags.nand_readonly = 1;
- } else
- mxc_nf_info->flags.nand_readonly = 0;
- return ERROR_OK;
-}
-
-static int mxc_read_data(struct nand_device *nand, void *data)
-{
- int validate_target_result;
- int try_data_output_from_nand_chip;
- /*
- * validate target state
- */
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
-
- /*
- * get data from nand chip
- */
- try_data_output_from_nand_chip = do_data_output(nand);
- if (try_data_output_from_nand_chip != ERROR_OK) {
- LOG_ERROR("mxc_read_data : read data failed : '%x'",
- try_data_output_from_nand_chip);
- return try_data_output_from_nand_chip;
- }
-
- if (nand->bus_width == 16)
- get_next_halfword_from_sram_buffer(nand, data);
- else
- get_next_byte_from_sram_buffer(nand, data);
-
- return ERROR_OK;
-}
-
-static int mxc_write_data(struct nand_device *nand, uint16_t data)
-{
- LOG_ERROR("write_data() not implemented");
- return ERROR_NAND_OPERATION_FAILED;
-}
-
-static int mxc_reset(struct nand_device *nand)
-{
- /*
- * validate target state
- */
- int validate_target_result;
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
- initialize_nf_controller(nand);
- return ERROR_OK;
-}
-
-static int mxc_command(struct nand_device *nand, uint8_t command)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- int validate_target_result;
- int poll_result;
- /*
- * validate target state
- */
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
-
- switch (command) {
- case NAND_CMD_READOOB:
- command = NAND_CMD_READ0;
- /* set read point for data_read() and read_block_data() to
- * spare area in SRAM buffer
- */
- if (nfc_is_v1())
- in_sram_address = MXC_NF_V1_SPARE_BUFFER0;
- else
- in_sram_address = MXC_NF_V2_SPARE_BUFFER0;
- break;
- case NAND_CMD_READ1:
- command = NAND_CMD_READ0;
- /*
- * offset == one half of page size
- */
- in_sram_address = MXC_NF_MAIN_BUFFER0 + (nand->page_size >> 1);
- break;
- default:
- in_sram_address = MXC_NF_MAIN_BUFFER0;
- break;
- }
-
- target_write_u16(target, MXC_NF_FCMD, command);
- /*
- * start command input operation (set MXC_NF_BIT_OP_DONE==0)
- */
- target_write_u16(target, MXC_NF_CFG2, MXC_NF_BIT_OP_FCI);
- poll_result = poll_for_complete_op(nand, "command");
- if (poll_result != ERROR_OK)
- return poll_result;
- /*
- * reset cursor to begin of the buffer
- */
- sign_of_sequental_byte_read = 0;
- /* Handle special read command and adjust NF_CFG2(FDO) */
- switch (command) {
- case NAND_CMD_READID:
- mxc_nf_info->optype = MXC_NF_DATAOUT_NANDID;
- mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
- break;
- case NAND_CMD_STATUS:
- mxc_nf_info->optype = MXC_NF_DATAOUT_NANDSTATUS;
- mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
- target_write_u16 (target, MXC_NF_BUFADDR, 0);
- in_sram_address = 0;
- break;
- case NAND_CMD_READ0:
- mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
- mxc_nf_info->optype = MXC_NF_DATAOUT_PAGE;
- break;
- default:
- /* Ohter command use the default 'One page data out' FDO */
- mxc_nf_info->optype = MXC_NF_DATAOUT_PAGE;
- break;
- }
- return ERROR_OK;
-}
-
-static int mxc_address(struct nand_device *nand, uint8_t address)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- int validate_target_result;
- int poll_result;
- /*
- * validate target state
- */
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
-
- target_write_u16(target, MXC_NF_FADDR, address);
- /*
- * start address input operation (set MXC_NF_BIT_OP_DONE==0)
- */
- target_write_u16(target, MXC_NF_CFG2, MXC_NF_BIT_OP_FAI);
- poll_result = poll_for_complete_op(nand, "address");
- if (poll_result != ERROR_OK)
- return poll_result;
-
- return ERROR_OK;
-}
-
-static int mxc_nand_ready(struct nand_device *nand, int tout)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- uint16_t poll_complete_status;
- int validate_target_result;
-
- /*
- * validate target state
- */
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
-
- do {
- target_read_u16(target, MXC_NF_CFG2, &poll_complete_status);
- if (poll_complete_status & MXC_NF_BIT_OP_DONE)
- return tout;
-
- alive_sleep(1);
- } while (tout-- > 0);
- return tout;
-}
-
-static int mxc_write_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
- uint16_t nand_status_content;
- uint16_t swap1, swap2, new_swap1;
- uint8_t bufs;
- int poll_result;
-
- if (data_size % 2) {
- LOG_ERROR(data_block_size_err_msg, data_size);
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (oob_size % 2) {
- LOG_ERROR(data_block_size_err_msg, oob_size);
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (!data) {
- LOG_ERROR("nothing to program");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /*
- * validate target state
- */
- retval = validate_target_state(nand);
- if (retval != ERROR_OK)
- return retval;
-
- in_sram_address = MXC_NF_MAIN_BUFFER0;
- sign_of_sequental_byte_read = 0;
- retval = ERROR_OK;
- retval |= mxc_command(nand, NAND_CMD_SEQIN);
- retval |= mxc_address(nand, 0); /* col */
- retval |= mxc_address(nand, 0); /* col */
- retval |= mxc_address(nand, page & 0xff); /* page address */
- retval |= mxc_address(nand, (page >> 8) & 0xff);/* page address */
- retval |= mxc_address(nand, (page >> 16) & 0xff); /* page address */
-
- target_write_buffer(target, MXC_NF_MAIN_BUFFER0, data_size, data);
- if (oob) {
- if (mxc_nf_info->flags.hw_ecc_enabled) {
- /*
- * part of spare block will be overrided by hardware
- * ECC generator
- */
- LOG_DEBUG("part of spare block will be overrided "
- "by hardware ECC generator");
- }
- if (nfc_is_v1())
- target_write_buffer(target, MXC_NF_V1_SPARE_BUFFER0, oob_size, oob);
- else {
- uint32_t addr = MXC_NF_V2_SPARE_BUFFER0;
- while (oob_size > 0) {
- uint8_t len = MIN(oob_size, MXC_NF_SPARE_BUFFER_LEN);
- target_write_buffer(target, addr, len, oob);
- addr = align_address_v2(nand, addr + len);
- oob += len;
- oob_size -= len;
- }
- }
- }
-
- if (nand->page_size > 512 && mxc_nf_info->flags.biswap_enabled) {
- /* BI-swap - work-around of i.MX NFC for NAND device with page == 2kb*/
- target_read_u16(target, MXC_NF_MAIN_BUFFER3 + 464, &swap1);
- if (oob) {
- LOG_ERROR("Due to NFC Bug, oob is not correctly implemented in mxc driver");
- return ERROR_NAND_OPERATION_FAILED;
- }
- swap2 = 0xffff; /* Spare buffer unused forced to 0xffff */
- new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
- swap2 = (swap1 << 8) | (swap2 & 0xFF);
- target_write_u16(target, MXC_NF_MAIN_BUFFER3 + 464, new_swap1);
- if (nfc_is_v1())
- target_write_u16(target, MXC_NF_V1_SPARE_BUFFER3 + 4, swap2);
- else
- target_write_u16(target, MXC_NF_V2_SPARE_BUFFER3, swap2);
- }
-
- /*
- * start data input operation (set MXC_NF_BIT_OP_DONE==0)
- */
- if (nfc_is_v1() && nand->page_size > 512)
- bufs = 4;
- else
- bufs = 1;
-
- for (uint8_t i = 0; i < bufs; ++i) {
- target_write_u16(target, MXC_NF_BUFADDR, i);
- target_write_u16(target, MXC_NF_CFG2, MXC_NF_BIT_OP_FDI);
- poll_result = poll_for_complete_op(nand, "data input");
- if (poll_result != ERROR_OK)
- return poll_result;
- }
-
- retval |= mxc_command(nand, NAND_CMD_PAGEPROG);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * check status register
- */
- retval = ERROR_OK;
- retval |= mxc_command(nand, NAND_CMD_STATUS);
- target_write_u16 (target, MXC_NF_BUFADDR, 0);
- mxc_nf_info->optype = MXC_NF_DATAOUT_NANDSTATUS;
- mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
- retval |= do_data_output(nand);
- if (retval != ERROR_OK) {
- LOG_ERROR(get_status_register_err_msg);
- return retval;
- }
- target_read_u16(target, MXC_NF_MAIN_BUFFER0, &nand_status_content);
- if (nand_status_content & 0x0001) {
- /*
- * page not correctly written
- */
- return ERROR_NAND_OPERATION_FAILED;
- }
-#ifdef _MXC_PRINT_STAT
- LOG_INFO("%d bytes newly written", data_size);
-#endif
- return ERROR_OK;
-}
-
-static int mxc_read_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
- uint8_t bufs;
- uint16_t swap1, swap2, new_swap1;
-
- if (data_size % 2) {
- LOG_ERROR(data_block_size_err_msg, data_size);
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (oob_size % 2) {
- LOG_ERROR(data_block_size_err_msg, oob_size);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /*
- * validate target state
- */
- retval = validate_target_state(nand);
- if (retval != ERROR_OK)
- return retval;
- /* Reset address_cycles before mxc_command ?? */
- retval = mxc_command(nand, NAND_CMD_READ0);
- if (retval != ERROR_OK)
- return retval;
- retval = mxc_address(nand, 0); /* col */
- if (retval != ERROR_OK)
- return retval;
- retval = mxc_address(nand, 0); /* col */
- if (retval != ERROR_OK)
- return retval;
- retval = mxc_address(nand, page & 0xff);/* page address */
- if (retval != ERROR_OK)
- return retval;
- retval = mxc_address(nand, (page >> 8) & 0xff); /* page address */
- if (retval != ERROR_OK)
- return retval;
- retval = mxc_address(nand, (page >> 16) & 0xff);/* page address */
- if (retval != ERROR_OK)
- return retval;
- retval = mxc_command(nand, NAND_CMD_READSTART);
- if (retval != ERROR_OK)
- return retval;
-
- if (nfc_is_v1() && nand->page_size > 512)
- bufs = 4;
- else
- bufs = 1;
-
- for (uint8_t i = 0; i < bufs; ++i) {
- target_write_u16(target, MXC_NF_BUFADDR, i);
- mxc_nf_info->fin = MXC_NF_FIN_DATAOUT;
- retval = do_data_output(nand);
- if (retval != ERROR_OK) {
- LOG_ERROR("MXC_NF : Error reading page %d", i);
- return retval;
- }
- }
-
- if (nand->page_size > 512 && mxc_nf_info->flags.biswap_enabled) {
- uint32_t SPARE_BUFFER3;
- /* BI-swap - work-around of mxc NFC for NAND device with page == 2k */
- target_read_u16(target, MXC_NF_MAIN_BUFFER3 + 464, &swap1);
- if (nfc_is_v1())
- SPARE_BUFFER3 = MXC_NF_V1_SPARE_BUFFER3 + 4;
- else
- SPARE_BUFFER3 = MXC_NF_V2_SPARE_BUFFER3;
- target_read_u16(target, SPARE_BUFFER3, &swap2);
- new_swap1 = (swap1 & 0xFF00) | (swap2 >> 8);
- swap2 = (swap1 << 8) | (swap2 & 0xFF);
- target_write_u16(target, MXC_NF_MAIN_BUFFER3 + 464, new_swap1);
- target_write_u16(target, SPARE_BUFFER3, swap2);
- }
-
- if (data)
- target_read_buffer(target, MXC_NF_MAIN_BUFFER0, data_size, data);
- if (oob) {
- if (nfc_is_v1())
- target_read_buffer(target, MXC_NF_V1_SPARE_BUFFER0, oob_size, oob);
- else {
- uint32_t addr = MXC_NF_V2_SPARE_BUFFER0;
- while (oob_size > 0) {
- uint8_t len = MIN(oob_size, MXC_NF_SPARE_BUFFER_LEN);
- target_read_buffer(target, addr, len, oob);
- addr = align_address_v2(nand, addr + len);
- oob += len;
- oob_size -= len;
- }
- }
- }
-
-#ifdef _MXC_PRINT_STAT
- if (data_size > 0) {
- /* When Operation Status is read (when page is erased),
- * this function is used but data_size is null.
- */
- LOG_INFO("%d bytes newly read", data_size);
- }
-#endif
- return ERROR_OK;
-}
-
-static uint32_t align_address_v2(struct nand_device *nand, uint32_t addr)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- uint32_t ret = addr;
- if (addr > MXC_NF_V2_SPARE_BUFFER0 &&
- (addr & 0x1F) == MXC_NF_SPARE_BUFFER_LEN)
- ret += MXC_NF_SPARE_BUFFER_MAX - MXC_NF_SPARE_BUFFER_LEN;
- else if (addr >= (mxc_nf_info->mxc_base_addr + (uint32_t)nand->page_size))
- ret = MXC_NF_V2_SPARE_BUFFER0;
- return ret;
-}
-
-static int initialize_nf_controller(struct nand_device *nand)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- uint16_t work_mode = 0;
- uint16_t temp;
- /*
- * resets NAND flash controller in zero time ? I dont know.
- */
- target_write_u16(target, MXC_NF_CFG1, MXC_NF_BIT_RESET_EN);
- if (mxc_nf_info->mxc_version == MXC_VERSION_MX27)
- work_mode = MXC_NF_BIT_INT_DIS; /* disable interrupt */
-
- if (target->endianness == TARGET_BIG_ENDIAN) {
- LOG_DEBUG("MXC_NF : work in Big Endian mode");
- work_mode |= MXC_NF_BIT_BE_EN;
- } else
- LOG_DEBUG("MXC_NF : work in Little Endian mode");
- if (mxc_nf_info->flags.hw_ecc_enabled) {
- LOG_DEBUG("MXC_NF : work with ECC mode");
- work_mode |= MXC_NF_BIT_ECC_EN;
- } else
- LOG_DEBUG("MXC_NF : work without ECC mode");
- if (nfc_is_v2()) {
- target_write_u16(target, MXC_NF_V2_SPAS, OOB_SIZE / 2);
- if (nand->page_size) {
- uint16_t pages_per_block = nand->erase_size / nand->page_size;
- work_mode |= MXC_NF_V2_CFG1_PPB(ffs(pages_per_block) - 6);
- }
- work_mode |= MXC_NF_BIT_ECC_4BIT;
- }
- target_write_u16(target, MXC_NF_CFG1, work_mode);
-
- /*
- * unlock SRAM buffer for write; 2 mean "Unlock", other values means "Lock"
- */
- target_write_u16(target, MXC_NF_BUFCFG, 2);
- target_read_u16(target, MXC_NF_FWP, &temp);
- if ((temp & 0x0007) == 1) {
- LOG_ERROR("NAND flash is tight-locked, reset needed");
- return ERROR_FAIL;
- }
-
- /*
- * unlock NAND flash for write
- */
- if (nfc_is_v1()) {
- target_write_u16(target, MXC_NF_V1_UNLOCKSTART, 0x0000);
- target_write_u16(target, MXC_NF_V1_UNLOCKEND, 0xFFFF);
- } else {
- target_write_u16(target, MXC_NF_V2_UNLOCKSTART0, 0x0000);
- target_write_u16(target, MXC_NF_V2_UNLOCKSTART1, 0x0000);
- target_write_u16(target, MXC_NF_V2_UNLOCKSTART2, 0x0000);
- target_write_u16(target, MXC_NF_V2_UNLOCKSTART3, 0x0000);
- target_write_u16(target, MXC_NF_V2_UNLOCKEND0, 0xFFFF);
- target_write_u16(target, MXC_NF_V2_UNLOCKEND1, 0xFFFF);
- target_write_u16(target, MXC_NF_V2_UNLOCKEND2, 0xFFFF);
- target_write_u16(target, MXC_NF_V2_UNLOCKEND3, 0xFFFF);
- }
- target_write_u16(target, MXC_NF_FWP, 4);
-
- /*
- * 0x0000 means that first SRAM buffer @base_addr will be used
- */
- target_write_u16(target, MXC_NF_BUFADDR, 0x0000);
- /*
- * address of SRAM buffer
- */
- in_sram_address = MXC_NF_MAIN_BUFFER0;
- sign_of_sequental_byte_read = 0;
- return ERROR_OK;
-}
-
-static int get_next_byte_from_sram_buffer(struct nand_device *nand, uint8_t *value)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- static uint8_t even_byte;
- uint16_t temp;
- /*
- * host-big_endian ??
- */
- if (sign_of_sequental_byte_read == 0)
- even_byte = 0;
-
- if (in_sram_address > (nfc_is_v1() ? MXC_NF_V1_LAST_BUFFADDR : MXC_NF_V2_LAST_BUFFADDR)) {
- LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
- *value = 0;
- sign_of_sequental_byte_read = 0;
- even_byte = 0;
- return ERROR_NAND_OPERATION_FAILED;
- } else {
- if (nfc_is_v2())
- in_sram_address = align_address_v2(nand, in_sram_address);
-
- target_read_u16(target, in_sram_address, &temp);
- if (even_byte) {
- *value = temp >> 8;
- even_byte = 0;
- in_sram_address += 2;
- } else {
- *value = temp & 0xff;
- even_byte = 1;
- }
- }
- sign_of_sequental_byte_read = 1;
- return ERROR_OK;
-}
-
-static int get_next_halfword_from_sram_buffer(struct nand_device *nand, uint16_t *value)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (in_sram_address > (nfc_is_v1() ? MXC_NF_V1_LAST_BUFFADDR : MXC_NF_V2_LAST_BUFFADDR)) {
- LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
- *value = 0;
- return ERROR_NAND_OPERATION_FAILED;
- } else {
- if (nfc_is_v2())
- in_sram_address = align_address_v2(nand, in_sram_address);
-
- target_read_u16(target, in_sram_address, value);
- in_sram_address += 2;
- }
- return ERROR_OK;
-}
-
-static int poll_for_complete_op(struct nand_device *nand, const char *text)
-{
- if (mxc_nand_ready(nand, 1000) == -1) {
- LOG_ERROR("%s sending timeout", text);
- return ERROR_NAND_OPERATION_FAILED;
- }
- return ERROR_OK;
-}
-
-static int validate_target_state(struct nand_device *nand)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR(target_not_halted_err_msg);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (mxc_nf_info->flags.target_little_endian !=
- (target->endianness == TARGET_LITTLE_ENDIAN)) {
- /*
- * endianness changed after NAND controller probed
- */
- return ERROR_NAND_OPERATION_FAILED;
- }
- return ERROR_OK;
-}
-
-int ecc_status_v1(struct nand_device *nand)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- uint16_t ecc_status;
-
- target_read_u16(target, MXC_NF_ECCSTATUS, &ecc_status);
- switch (ecc_status & 0x000c) {
- case 1 << 2:
- LOG_INFO("main area read with 1 (correctable) error");
- break;
- case 2 << 2:
- LOG_INFO("main area read with more than 1 (incorrectable) error");
- return ERROR_NAND_OPERATION_FAILED;
- break;
- }
- switch (ecc_status & 0x0003) {
- case 1:
- LOG_INFO("spare area read with 1 (correctable) error");
- break;
- case 2:
- LOG_INFO("main area read with more than 1 (incorrectable) error");
- return ERROR_NAND_OPERATION_FAILED;
- break;
- }
- return ERROR_OK;
-}
-
-int ecc_status_v2(struct nand_device *nand)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- uint16_t ecc_status;
- uint8_t no_subpages;
- uint8_t err;
-
- no_subpages = nand->page_size >> 9;
-
- target_read_u16(target, MXC_NF_ECCSTATUS, &ecc_status);
- do {
- err = ecc_status & 0xF;
- if (err > 4) {
- LOG_INFO("UnCorrectable RS-ECC Error");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (err > 0)
- LOG_INFO("%d Symbol Correctable RS-ECC Error", err);
- ecc_status >>= 4;
- } while (--no_subpages);
- return ERROR_OK;
-}
-
-static int do_data_output(struct nand_device *nand)
-{
- struct mxc_nf_controller *mxc_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- int poll_result;
- switch (mxc_nf_info->fin) {
- case MXC_NF_FIN_DATAOUT:
- /*
- * start data output operation (set MXC_NF_BIT_OP_DONE==0)
- */
- target_write_u16(target, MXC_NF_CFG2, MXC_NF_BIT_DATAOUT_TYPE(mxc_nf_info->optype));
- poll_result = poll_for_complete_op(nand, "data output");
- if (poll_result != ERROR_OK)
- return poll_result;
-
- mxc_nf_info->fin = MXC_NF_FIN_NONE;
- /*
- * ECC stuff
- */
- if (mxc_nf_info->optype == MXC_NF_DATAOUT_PAGE && mxc_nf_info->flags.hw_ecc_enabled) {
- int ecc_status;
- if (nfc_is_v1())
- ecc_status = ecc_status_v1(nand);
- else
- ecc_status = ecc_status_v2(nand);
- if (ecc_status != ERROR_OK)
- return ecc_status;
- }
- break;
- case MXC_NF_FIN_NONE:
- break;
- }
- return ERROR_OK;
-}
-
-struct nand_flash_controller mxc_nand_flash_controller = {
- .name = "mxc",
- .nand_device_command = &mxc_nand_device_command,
- .commands = mxc_nand_command_handler,
- .init = &mxc_init,
- .reset = &mxc_reset,
- .command = &mxc_command,
- .address = &mxc_address,
- .write_data = &mxc_write_data,
- .read_data = &mxc_read_data,
- .write_page = &mxc_write_page,
- .read_page = &mxc_read_page,
- .nand_ready = &mxc_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mxc.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mxc.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mxc.h
deleted file mode 100755
index 866e0e3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mxc.h
+++ /dev/null
@@ -1,166 +0,0 @@
-
-/***************************************************************************
- * Copyright (C) 2009 by Alexei Babich *
- * Rezonans plc., Chelyabinsk, Russia *
- * impatt@mail.ru *
- * *
- * Copyright (C) 2011 by Erik Ahlen *
- * Avalon Innovation, Sweden *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * Freescale iMX OpenOCD NAND Flash controller support.
- * based on Freescale iMX2* and iMX3* OpenOCD NAND Flash controller support.
- *
- * Many thanks to Ben Dooks for writing s3c24xx driver.
- */
-
-#define MXC_NF_BUFSIZ (mxc_nf_info->mxc_regs_addr + 0x00)
-#define MXC_NF_BUFADDR (mxc_nf_info->mxc_regs_addr + 0x04)
-#define MXC_NF_FADDR (mxc_nf_info->mxc_regs_addr + 0x06)
-#define MXC_NF_FCMD (mxc_nf_info->mxc_regs_addr + 0x08)
-#define MXC_NF_BUFCFG (mxc_nf_info->mxc_regs_addr + 0x0a)
-#define MXC_NF_ECCSTATUS (mxc_nf_info->mxc_regs_addr + 0x0c)
-#define MXC_NF_ECCMAINPOS (mxc_nf_info->mxc_regs_addr + 0x0e)
-#define MXC_NF_V1_ECCSPAREPOS (mxc_nf_info->mxc_regs_addr + 0x10)
-#define MXC_NF_V2_SPAS (mxc_nf_info->mxc_regs_addr + 0x10)
-#define MXC_NF_FWP (mxc_nf_info->mxc_regs_addr + 0x12)
-#define MXC_NF_V1_UNLOCKSTART (mxc_nf_info->mxc_regs_addr + 0x14)
-#define MXC_NF_V1_UNLOCKEND (mxc_nf_info->mxc_regs_addr + 0x16)
-#define MXC_NF_V2_UNLOCKSTART0 (mxc_nf_info->mxc_regs_addr + 0x20)
-#define MXC_NF_V2_UNLOCKSTART1 (mxc_nf_info->mxc_regs_addr + 0x24)
-#define MXC_NF_V2_UNLOCKSTART2 (mxc_nf_info->mxc_regs_addr + 0x28)
-#define MXC_NF_V2_UNLOCKSTART3 (mxc_nf_info->mxc_regs_addr + 0x2c)
-#define MXC_NF_V2_UNLOCKEND0 (mxc_nf_info->mxc_regs_addr + 0x22)
-#define MXC_NF_V2_UNLOCKEND1 (mxc_nf_info->mxc_regs_addr + 0x26)
-#define MXC_NF_V2_UNLOCKEND2 (mxc_nf_info->mxc_regs_addr + 0x2a)
-#define MXC_NF_V2_UNLOCKEND3 (mxc_nf_info->mxc_regs_addr + 0x2e)
-#define MXC_NF_FWPSTATUS (mxc_nf_info->mxc_regs_addr + 0x18)
- /*
- * all bits not marked as self-clearing bit
- */
-#define MXC_NF_CFG1 (mxc_nf_info->mxc_regs_addr + 0x1a)
-#define MXC_NF_CFG2 (mxc_nf_info->mxc_regs_addr + 0x1c)
-
-#define MXC_NF_MAIN_BUFFER0 (mxc_nf_info->mxc_base_addr + 0x0000)
-#define MXC_NF_MAIN_BUFFER1 (mxc_nf_info->mxc_base_addr + 0x0200)
-#define MXC_NF_MAIN_BUFFER2 (mxc_nf_info->mxc_base_addr + 0x0400)
-#define MXC_NF_MAIN_BUFFER3 (mxc_nf_info->mxc_base_addr + 0x0600)
-#define MXC_NF_V1_SPARE_BUFFER0 (mxc_nf_info->mxc_base_addr + 0x0800)
-#define MXC_NF_V1_SPARE_BUFFER1 (mxc_nf_info->mxc_base_addr + 0x0810)
-#define MXC_NF_V1_SPARE_BUFFER2 (mxc_nf_info->mxc_base_addr + 0x0820)
-#define MXC_NF_V1_SPARE_BUFFER3 (mxc_nf_info->mxc_base_addr + 0x0830)
-#define MXC_NF_V2_MAIN_BUFFER4 (mxc_nf_info->mxc_base_addr + 0x0800)
-#define MXC_NF_V2_MAIN_BUFFER5 (mxc_nf_info->mxc_base_addr + 0x0a00)
-#define MXC_NF_V2_MAIN_BUFFER6 (mxc_nf_info->mxc_base_addr + 0x0c00)
-#define MXC_NF_V2_MAIN_BUFFER7 (mxc_nf_info->mxc_base_addr + 0x0e00)
-#define MXC_NF_V2_SPARE_BUFFER0 (mxc_nf_info->mxc_base_addr + 0x1000)
-#define MXC_NF_V2_SPARE_BUFFER1 (mxc_nf_info->mxc_base_addr + 0x1040)
-#define MXC_NF_V2_SPARE_BUFFER2 (mxc_nf_info->mxc_base_addr + 0x1080)
-#define MXC_NF_V2_SPARE_BUFFER3 (mxc_nf_info->mxc_base_addr + 0x10c0)
-#define MXC_NF_V2_SPARE_BUFFER4 (mxc_nf_info->mxc_base_addr + 0x1100)
-#define MXC_NF_V2_SPARE_BUFFER5 (mxc_nf_info->mxc_base_addr + 0x1140)
-#define MXC_NF_V2_SPARE_BUFFER6 (mxc_nf_info->mxc_base_addr + 0x1180)
-#define MXC_NF_V2_SPARE_BUFFER7 (mxc_nf_info->mxc_base_addr + 0x11c0)
-#define MXC_NF_MAIN_BUFFER_LEN 512
-#define MXC_NF_SPARE_BUFFER_LEN 16
-#define MXC_NF_SPARE_BUFFER_MAX 64
-#define MXC_NF_V1_LAST_BUFFADDR ((MXC_NF_V1_SPARE_BUFFER3) + \
- MXC_NF_SPARE_BUFFER_LEN - 2)
-#define MXC_NF_V2_LAST_BUFFADDR ((MXC_NF_V2_SPARE_BUFFER7) + \
- MXC_NF_SPARE_BUFFER_LEN - 2)
-
-/* bits in MXC_NF_CFG1 register */
-#define MXC_NF_BIT_ECC_4BIT (1<<0)
-#define MXC_NF_BIT_SPARE_ONLY_EN (1<<2)
-#define MXC_NF_BIT_ECC_EN (1<<3)
-#define MXC_NF_BIT_INT_DIS (1<<4)
-#define MXC_NF_BIT_BE_EN (1<<5)
-#define MXC_NF_BIT_RESET_EN (1<<6)
-#define MXC_NF_BIT_FORCE_CE (1<<7)
-#define MXC_NF_V2_CFG1_PPB(x) (((x) & 0x3) << 9)
-
-/* bits in MXC_NF_CFG2 register */
-
-/*Flash Command Input*/
-#define MXC_NF_BIT_OP_FCI (1<<0)
- /*
- * Flash Address Input
- */
-#define MXC_NF_BIT_OP_FAI (1<<1)
- /*
- * Flash Data Input
- */
-#define MXC_NF_BIT_OP_FDI (1<<2)
-
-/* see "enum mx_dataout_type" below */
-#define MXC_NF_BIT_DATAOUT_TYPE(x) ((x)<<3)
-#define MXC_NF_BIT_OP_DONE (1<<15)
-
-#define MXC_CCM_CGR2 0x53f80028
-#define MXC_GPR 0x43fac008
-#define MX2_FMCR 0x10027814
-#define MX2_FMCR_NF_16BIT_SEL (1<<4)
-#define MX2_FMCR_NF_FMS (1<<5)
-#define MX25_RCSR 0x53f80018
-#define MX25_RCSR_NF_16BIT_SEL (1<<14)
-#define MX25_RCSR_NF_FMS (1<<8)
-#define MX25_RCSR_NF_4K (1<<9)
-#define MX3_PCSR 0x53f8000c
-#define MX3_PCSR_NF_16BIT_SEL (1<<31)
-#define MX3_PCSR_NF_FMS (1<<30)
-#define MX35_RCSR 0x53f80018
-#define MX35_RCSR_NF_16BIT_SEL (1<<14)
-#define MX35_RCSR_NF_FMS (1<<8)
-#define MX35_RCSR_NF_4K (1<<9)
-
-enum mxc_version {
- MXC_VERSION_UKWN = 0,
- MXC_VERSION_MX25 = 1,
- MXC_VERSION_MX27 = 2,
- MXC_VERSION_MX31 = 3,
- MXC_VERSION_MX35 = 4
-};
-
-enum mxc_dataout_type {
- MXC_NF_DATAOUT_PAGE = 1,
- MXC_NF_DATAOUT_NANDID = 2,
- MXC_NF_DATAOUT_NANDSTATUS = 4,
-};
-
-enum mxc_nf_finalize_action {
- MXC_NF_FIN_NONE,
- MXC_NF_FIN_DATAOUT,
-};
-
-struct mxc_nf_flags {
- unsigned target_little_endian:1;
- unsigned nand_readonly:1;
- unsigned one_kb_sram:1;
- unsigned hw_ecc_enabled:1;
- unsigned biswap_enabled:1;
-};
-
-struct mxc_nf_controller {
- enum mxc_version mxc_version;
- uint32_t mxc_base_addr;
- uint32_t mxc_regs_addr;
- enum mxc_dataout_type optype;
- enum mxc_nf_finalize_action fin;
- struct mxc_nf_flags flags;
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nonce.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nonce.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nonce.c
deleted file mode 100755
index 6b3dbad..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nonce.c
+++ /dev/null
@@ -1,75 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "hello.h"
-
-static int nonce_nand_command(struct nand_device *nand, uint8_t command)
-{
- return ERROR_OK;
-}
-static int nonce_nand_address(struct nand_device *nand, uint8_t address)
-{
- return ERROR_OK;
-}
-static int nonce_nand_read(struct nand_device *nand, void *data)
-{
- return ERROR_OK;
-}
-static int nonce_nand_write(struct nand_device *nand, uint16_t data)
-{
- return ERROR_OK;
-}
-static int nonce_nand_fast_block_write(struct nand_device *nand,
- uint8_t *data, int size)
-{
- return ERROR_OK;
-}
-
-static int nonce_nand_reset(struct nand_device *nand)
-{
- return nonce_nand_command(nand, NAND_CMD_RESET);
-}
-
-NAND_DEVICE_COMMAND_HANDLER(nonce_nand_device_command)
-{
- return ERROR_OK;
-}
-
-static int nonce_nand_init(struct nand_device *nand)
-{
- return ERROR_OK;
-}
-
-struct nand_flash_controller nonce_nand_controller = {
- .name = "nonce",
- .commands = hello_command_handlers,
- .nand_device_command = &nonce_nand_device_command,
- .init = &nonce_nand_init,
- .reset = &nonce_nand_reset,
- .command = &nonce_nand_command,
- .address = &nonce_nand_address,
- .read_data = &nonce_nand_read,
- .write_data = &nonce_nand_write,
- .write_block_data = &nonce_nand_fast_block_write,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nuc910.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nuc910.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nuc910.c
deleted file mode 100755
index 832eeae..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nuc910.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * NAND controller interface for Nuvoton NUC910
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "nuc910.h"
-#include "arm_io.h"
-#include <target/arm.h>
-
-struct nuc910_nand_controller {
- struct arm_nand_data io;
-};
-
-static int validate_target_state(struct nand_device *nand)
-{
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int nuc910_nand_command(struct nand_device *nand, uint8_t command)
-{
- struct target *target = nand->target;
- int result;
-
- result = validate_target_state(nand);
- if (result != ERROR_OK)
- return result;
-
- target_write_u8(target, NUC910_SMCMD, command);
- return ERROR_OK;
-}
-
-static int nuc910_nand_address(struct nand_device *nand, uint8_t address)
-{
- struct target *target = nand->target;
- int result;
-
- result = validate_target_state(nand);
- if (result != ERROR_OK)
- return result;
-
- target_write_u32(target, NUC910_SMADDR, ((address & 0xff) | NUC910_SMADDR_EOA));
- return ERROR_OK;
-}
-
-static int nuc910_nand_read(struct nand_device *nand, void *data)
-{
- struct target *target = nand->target;
- int result;
-
- result = validate_target_state(nand);
- if (result != ERROR_OK)
- return result;
-
- target_read_u8(target, NUC910_SMDATA, data);
- return ERROR_OK;
-}
-
-static int nuc910_nand_write(struct nand_device *nand, uint16_t data)
-{
- struct target *target = nand->target;
- int result;
-
- result = validate_target_state(nand);
- if (result != ERROR_OK)
- return result;
-
- target_write_u8(target, NUC910_SMDATA, data);
- return ERROR_OK;
-}
-
-static int nuc910_nand_read_block_data(struct nand_device *nand,
- uint8_t *data, int data_size)
-{
- struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
- int result;
-
- result = validate_target_state(nand);
- if (result != ERROR_OK)
- return result;
-
- nuc910_nand->io.chunk_size = nand->page_size;
-
- /* try the fast way first */
- result = arm_nandread(&nuc910_nand->io, data, data_size);
- if (result != ERROR_NAND_NO_BUFFER)
- return result;
-
- /* else do it slowly */
- while (data_size--)
- nuc910_nand_read(nand, data++);
-
- return ERROR_OK;
-}
-
-static int nuc910_nand_write_block_data(struct nand_device *nand,
- uint8_t *data, int data_size)
-{
- struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
- int result;
-
- result = validate_target_state(nand);
- if (result != ERROR_OK)
- return result;
-
- nuc910_nand->io.chunk_size = nand->page_size;
-
- /* try the fast way first */
- result = arm_nandwrite(&nuc910_nand->io, data, data_size);
- if (result != ERROR_NAND_NO_BUFFER)
- return result;
-
- /* else do it slowly */
- while (data_size--)
- nuc910_nand_write(nand, *data++);
-
- return ERROR_OK;
-}
-
-static int nuc910_nand_reset(struct nand_device *nand)
-{
- return nuc910_nand_command(nand, NAND_CMD_RESET);
-}
-
-static int nuc910_nand_ready(struct nand_device *nand, int timeout)
-{
- struct target *target = nand->target;
- uint32_t status;
-
- do {
- target_read_u32(target, NUC910_SMISR, &status);
- if (status & NUC910_SMISR_RB_)
- return 1;
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-NAND_DEVICE_COMMAND_HANDLER(nuc910_nand_device_command)
-{
- struct nuc910_nand_controller *nuc910_nand;
-
- nuc910_nand = calloc(1, sizeof(struct nuc910_nand_controller));
- if (!nuc910_nand) {
- LOG_ERROR("no memory for nand controller");
- return ERROR_NAND_DEVICE_INVALID;
- }
-
- nand->controller_priv = nuc910_nand;
- return ERROR_OK;
-}
-
-static int nuc910_nand_init(struct nand_device *nand)
-{
- struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
- struct target *target = nand->target;
- int bus_width = nand->bus_width ? : 8;
- int result;
-
- result = validate_target_state(nand);
- if (result != ERROR_OK)
- return result;
-
- /* nuc910 only supports 8bit */
- if (bus_width != 8) {
- LOG_ERROR("nuc910 only supports 8 bit bus width, not %i", bus_width);
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- /* inform calling code about selected bus width */
- nand->bus_width = bus_width;
-
- nuc910_nand->io.target = target;
- nuc910_nand->io.data = NUC910_SMDATA;
- nuc910_nand->io.op = ARM_NAND_NONE;
-
- /* configure nand controller */
- target_write_u32(target, NUC910_FMICSR, NUC910_FMICSR_SM_EN);
- target_write_u32(target, NUC910_SMCSR, 0x010000a8); /* 2048 page size */
- target_write_u32(target, NUC910_SMTCR, 0x00010204);
- target_write_u32(target, NUC910_SMIER, 0x00000000);
-
- return ERROR_OK;
-}
-
-struct nand_flash_controller nuc910_nand_controller = {
- .name = "nuc910",
- .command = nuc910_nand_command,
- .address = nuc910_nand_address,
- .read_data = nuc910_nand_read,
- .write_data = nuc910_nand_write,
- .write_block_data = nuc910_nand_write_block_data,
- .read_block_data = nuc910_nand_read_block_data,
- .nand_ready = nuc910_nand_ready,
- .reset = nuc910_nand_reset,
- .nand_device_command = nuc910_nand_device_command,
- .init = nuc910_nand_init,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nuc910.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nuc910.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nuc910.h
deleted file mode 100755
index e0e458f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/nuc910.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * NAND controller interface for Nuvoton NUC910
- */
-
-#ifndef NUC910_H
-#define NUC910_H
-
-#define NUC910_FMICSR 0xB000D000
-#define NUC910_SMCSR 0xB000D0A0
-#define NUC910_SMTCR 0xB000D0A4
-#define NUC910_SMIER 0xB000D0A8
-#define NUC910_SMISR 0xB000D0AC
-#define NUC910_SMCMD 0xB000D0B0
-#define NUC910_SMADDR 0xB000D0B4
-#define NUC910_SMDATA 0xB000D0B8
-
-#define NUC910_SMECC0 0xB000D0BC
-#define NUC910_SMECC1 0xB000D0C0
-#define NUC910_SMECC2 0xB000D0C4
-#define NUC910_SMECC3 0xB000D0C8
-#define NUC910_ECC4ST 0xB000D114
-
-/* Global Control and Status Register (FMICSR) */
-#define NUC910_FMICSR_SM_EN (1<<3)
-
-/* NAND Flash Address Port Register (SMADDR) */
-#define NUC910_SMADDR_EOA (1<<31)
-
-/* NAND Flash Control and Status Register (SMCSR) */
-#define NUC910_SMCSR_PSIZE (1<<3)
-#define NUC910_SMCSR_DBW (1<<4)
-
-/* NAND Flash Interrupt Status Register (SMISR) */
-#define NUC910_SMISR_ECC_IF (1<<2)
-#define NUC910_SMISR_RB_ (1<<18)
-
-/* ECC4 Correction Status (ECC4ST) */
-
-#endif /* NUC910_H */
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/orion.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/orion.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/orion.c
deleted file mode 100755
index 71f847b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/orion.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Marvell Semiconductors, Inc. *
- * Written by Nicolas Pitre <nico at marvell.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * NAND controller interface for Marvell Orion/Kirkwood SoCs.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "arm_io.h"
-#include <target/arm.h>
-
-struct orion_nand_controller {
- struct arm_nand_data io;
-
- uint32_t cmd;
- uint32_t addr;
- uint32_t data;
-};
-
-#define CHECK_HALTED \
- do { \
- if (target->state != TARGET_HALTED) { \
- LOG_ERROR("NAND flash access requires halted target"); \
- return ERROR_NAND_OPERATION_FAILED; \
- } \
- } while (0)
-
-static int orion_nand_command(struct nand_device *nand, uint8_t command)
-{
- struct orion_nand_controller *hw = nand->controller_priv;
- struct target *target = nand->target;
-
- CHECK_HALTED;
- target_write_u8(target, hw->cmd, command);
- return ERROR_OK;
-}
-
-static int orion_nand_address(struct nand_device *nand, uint8_t address)
-{
- struct orion_nand_controller *hw = nand->controller_priv;
- struct target *target = nand->target;
-
- CHECK_HALTED;
- target_write_u8(target, hw->addr, address);
- return ERROR_OK;
-}
-
-static int orion_nand_read(struct nand_device *nand, void *data)
-{
- struct orion_nand_controller *hw = nand->controller_priv;
- struct target *target = nand->target;
-
- CHECK_HALTED;
- target_read_u8(target, hw->data, data);
- return ERROR_OK;
-}
-
-static int orion_nand_write(struct nand_device *nand, uint16_t data)
-{
- struct orion_nand_controller *hw = nand->controller_priv;
- struct target *target = nand->target;
-
- CHECK_HALTED;
- target_write_u8(target, hw->data, data);
- return ERROR_OK;
-}
-
-static int orion_nand_slow_block_write(struct nand_device *nand, uint8_t *data, int size)
-{
- while (size--)
- orion_nand_write(nand, *data++);
- return ERROR_OK;
-}
-
-static int orion_nand_fast_block_write(struct nand_device *nand, uint8_t *data, int size)
-{
- struct orion_nand_controller *hw = nand->controller_priv;
- int retval;
-
- hw->io.chunk_size = nand->page_size;
-
- retval = arm_nandwrite(&hw->io, data, size);
- if (retval == ERROR_NAND_NO_BUFFER)
- retval = orion_nand_slow_block_write(nand, data, size);
-
- return retval;
-}
-
-static int orion_nand_reset(struct nand_device *nand)
-{
- return orion_nand_command(nand, NAND_CMD_RESET);
-}
-
-NAND_DEVICE_COMMAND_HANDLER(orion_nand_device_command)
-{
- struct orion_nand_controller *hw;
- uint32_t base;
- uint8_t ale, cle;
-
- if (CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- hw = calloc(1, sizeof(*hw));
- if (!hw) {
- LOG_ERROR("no memory for nand controller");
- return ERROR_NAND_DEVICE_INVALID;
- }
-
- nand->controller_priv = hw;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], base);
- cle = 0;
- ale = 1;
-
- hw->data = base;
- hw->cmd = base + (1 << cle);
- hw->addr = base + (1 << ale);
-
- hw->io.target = nand->target;
- hw->io.data = hw->data;
- hw->io.op = ARM_NAND_NONE;
-
- return ERROR_OK;
-}
-
-static int orion_nand_init(struct nand_device *nand)
-{
- return ERROR_OK;
-}
-
-struct nand_flash_controller orion_nand_controller = {
- .name = "orion",
- .usage = "<target_id> <NAND_address>",
- .command = orion_nand_command,
- .address = orion_nand_address,
- .read_data = orion_nand_read,
- .write_data = orion_nand_write,
- .write_block_data = orion_nand_fast_block_write,
- .reset = orion_nand_reset,
- .nand_device_command = orion_nand_device_command,
- .init = orion_nand_init,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2410.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2410.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2410.c
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index 2aff7a8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2410.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007, 2008 by Ben Dooks *
- * ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * S3C2410 OpenOCD NAND Flash controller support.
- *
- * Many thanks to Simtec Electronics for sponsoring this work.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "s3c24xx.h"
-
-NAND_DEVICE_COMMAND_HANDLER(s3c2410_nand_device_command)
-{
- struct s3c24xx_nand_controller *info;
- CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
-
- /* fill in the address fields for the core device */
- info->cmd = S3C2410_NFCMD;
- info->addr = S3C2410_NFADDR;
- info->data = S3C2410_NFDATA;
- info->nfstat = S3C2410_NFSTAT;
-
- return ERROR_OK;
-}
-
-static int s3c2410_init(struct nand_device *nand)
-{
- struct target *target = nand->target;
-
- target_write_u32(target, S3C2410_NFCONF,
- S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
- S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
-
- return ERROR_OK;
-}
-
-static int s3c2410_write_data(struct nand_device *nand, uint16_t data)
-{
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_write_u32(target, S3C2410_NFDATA, data);
- return ERROR_OK;
-}
-
-static int s3c2410_read_data(struct nand_device *nand, void *data)
-{
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_read_u8(target, S3C2410_NFDATA, data);
- return ERROR_OK;
-}
-
-static int s3c2410_nand_ready(struct nand_device *nand, int timeout)
-{
- struct target *target = nand->target;
- uint8_t status;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- do {
- target_read_u8(target, S3C2410_NFSTAT, &status);
-
- if (status & S3C2410_NFSTAT_BUSY)
- return 1;
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-struct nand_flash_controller s3c2410_nand_controller = {
- .name = "s3c2410",
- .nand_device_command = &s3c2410_nand_device_command,
- .init = &s3c2410_init,
- .reset = &s3c24xx_reset,
- .command = &s3c24xx_command,
- .address = &s3c24xx_address,
- .write_data = &s3c2410_write_data,
- .read_data = &s3c2410_read_data,
- .write_page = s3c24xx_write_page,
- .read_page = s3c24xx_read_page,
- .nand_ready = &s3c2410_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2412.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2412.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2412.c
deleted file mode 100755
index 6cbdc6c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2412.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007, 2008 by Ben Dooks *
- * ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * S3C2412 OpenOCD NAND Flash controller support.
- *
- * Many thanks to Simtec Electronics for sponsoring this work.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "s3c24xx.h"
-
-NAND_DEVICE_COMMAND_HANDLER(s3c2412_nand_device_command)
-{
- struct s3c24xx_nand_controller *info;
- CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
-
- /* fill in the address fields for the core device */
- info->cmd = S3C2440_NFCMD;
- info->addr = S3C2440_NFADDR;
- info->data = S3C2440_NFDATA;
- info->nfstat = S3C2412_NFSTAT;
-
- return ERROR_OK;
-}
-
-static int s3c2412_init(struct nand_device *nand)
-{
- struct target *target = nand->target;
-
- target_write_u32(target, S3C2410_NFCONF,
- S3C2440_NFCONF_TACLS(3) |
- S3C2440_NFCONF_TWRPH0(7) |
- S3C2440_NFCONF_TWRPH1(7));
-
- target_write_u32(target, S3C2440_NFCONT,
- S3C2412_NFCONT_INIT_MAIN_ECC |
- S3C2440_NFCONT_ENABLE);
-
- return ERROR_OK;
-}
-
-struct nand_flash_controller s3c2412_nand_controller = {
- .name = "s3c2412",
- .nand_device_command = &s3c2412_nand_device_command,
- .init = &s3c2412_init,
- .reset = &s3c24xx_reset,
- .command = &s3c24xx_command,
- .address = &s3c24xx_address,
- .write_data = &s3c24xx_write_data,
- .read_data = &s3c24xx_read_data,
- .write_page = s3c24xx_write_page,
- .read_page = s3c24xx_read_page,
- .write_block_data = &s3c2440_write_block_data,
- .read_block_data = &s3c2440_read_block_data,
- .nand_ready = &s3c2440_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2440.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2440.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2440.c
deleted file mode 100755
index b794fab..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2440.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007, 2008 by Ben Dooks *
- * ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * S3C2440 OpenOCD NAND Flash controller support.
- *
- * Many thanks to Simtec Electronics for sponsoring this work.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "s3c24xx.h"
-
-NAND_DEVICE_COMMAND_HANDLER(s3c2440_nand_device_command)
-{
- struct s3c24xx_nand_controller *info;
- CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
-
- /* fill in the address fields for the core device */
- info->cmd = S3C2440_NFCMD;
- info->addr = S3C2440_NFADDR;
- info->data = S3C2440_NFDATA;
- info->nfstat = S3C2440_NFSTAT;
-
- return ERROR_OK;
-}
-
-static int s3c2440_init(struct nand_device *nand)
-{
- struct target *target = nand->target;
-
- target_write_u32(target, S3C2410_NFCONF,
- S3C2440_NFCONF_TACLS(3) |
- S3C2440_NFCONF_TWRPH0(7) |
- S3C2440_NFCONF_TWRPH1(7));
-
- target_write_u32(target, S3C2440_NFCONT,
- S3C2440_NFCONT_INITECC | S3C2440_NFCONT_ENABLE);
-
- return ERROR_OK;
-}
-
-int s3c2440_nand_ready(struct nand_device *nand, int timeout)
-{
- struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- struct target *target = nand->target;
- uint8_t status;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- do {
- target_read_u8(target, s3c24xx_info->nfstat, &status);
-
- if (status & S3C2440_NFSTAT_READY)
- return 1;
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
-
- return 0;
-}
-
-/* use the fact we can read/write 4 bytes in one go via a single 32bit op */
-
-int s3c2440_read_block_data(struct nand_device *nand, uint8_t *data, int data_size)
-{
- struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t nfdata = s3c24xx_info->data;
- uint32_t tmp;
-
- LOG_INFO("%s: reading data: %p, %p, %d", __func__, nand, data, data_size);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- while (data_size >= 4) {
- target_read_u32(target, nfdata, &tmp);
-
- data[0] = tmp;
- data[1] = tmp >> 8;
- data[2] = tmp >> 16;
- data[3] = tmp >> 24;
-
- data_size -= 4;
- data += 4;
- }
-
- while (data_size > 0) {
- target_read_u8(target, nfdata, data);
-
- data_size -= 1;
- data += 1;
- }
-
- return ERROR_OK;
-}
-
-int s3c2440_write_block_data(struct nand_device *nand, uint8_t *data, int data_size)
-{
- struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t nfdata = s3c24xx_info->data;
- uint32_t tmp;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- while (data_size >= 4) {
- tmp = le_to_h_u32(data);
- target_write_u32(target, nfdata, tmp);
-
- data_size -= 4;
- data += 4;
- }
-
- while (data_size > 0) {
- target_write_u8(target, nfdata, *data);
-
- data_size -= 1;
- data += 1;
- }
-
- return ERROR_OK;
-}
-
-struct nand_flash_controller s3c2440_nand_controller = {
- .name = "s3c2440",
- .nand_device_command = &s3c2440_nand_device_command,
- .init = &s3c2440_init,
- .reset = &s3c24xx_reset,
- .command = &s3c24xx_command,
- .address = &s3c24xx_address,
- .write_data = &s3c24xx_write_data,
- .read_data = &s3c24xx_read_data,
- .write_page = s3c24xx_write_page,
- .read_page = s3c24xx_read_page,
- .write_block_data = &s3c2440_write_block_data,
- .read_block_data = &s3c2440_read_block_data,
- .nand_ready = &s3c2440_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2443.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2443.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2443.c
deleted file mode 100755
index 8cd3213..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c2443.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007, 2008 by Ben Dooks *
- * ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * S3C2443 OpenOCD NAND Flash controller support.
- *
- * Many thanks to Simtec Electronics for sponsoring this work.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "s3c24xx.h"
-
-NAND_DEVICE_COMMAND_HANDLER(s3c2443_nand_device_command)
-{
- struct s3c24xx_nand_controller *info;
- CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
-
- /* fill in the address fields for the core device */
- info->cmd = S3C2440_NFCMD;
- info->addr = S3C2440_NFADDR;
- info->data = S3C2440_NFDATA;
- info->nfstat = S3C2412_NFSTAT;
-
- return ERROR_OK;
-}
-
-static int s3c2443_init(struct nand_device *nand)
-{
- struct target *target = nand->target;
-
- target_write_u32(target, S3C2410_NFCONF,
- S3C2440_NFCONF_TACLS(3) |
- S3C2440_NFCONF_TWRPH0(7) |
- S3C2440_NFCONF_TWRPH1(7));
-
- target_write_u32(target, S3C2440_NFCONT,
- S3C2412_NFCONT_INIT_MAIN_ECC |
- S3C2440_NFCONT_ENABLE);
-
- return ERROR_OK;
-}
-
-struct nand_flash_controller s3c2443_nand_controller = {
- .name = "s3c2443",
- .nand_device_command = &s3c2443_nand_device_command,
- .init = &s3c2443_init,
- .reset = &s3c24xx_reset,
- .command = &s3c24xx_command,
- .address = &s3c24xx_address,
- .write_data = &s3c24xx_write_data,
- .read_data = &s3c24xx_read_data,
- .write_page = s3c24xx_write_page,
- .read_page = s3c24xx_read_page,
- .write_block_data = &s3c2440_write_block_data,
- .read_block_data = &s3c2440_read_block_data,
- .nand_ready = &s3c2440_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx.c
deleted file mode 100755
index b4c15ce..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007, 2008 by Ben Dooks *
- * ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * S3C24XX Series OpenOCD NAND Flash controller support.
- *
- * Many thanks to Simtec Electronics for sponsoring this work.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "s3c24xx.h"
-
-S3C24XX_DEVICE_COMMAND()
-{
- *info = NULL;
-
- struct s3c24xx_nand_controller *s3c24xx_info;
- s3c24xx_info = malloc(sizeof(struct s3c24xx_nand_controller));
- if (s3c24xx_info == NULL) {
- LOG_ERROR("no memory for nand controller");
- return -ENOMEM;
- }
-
- nand->controller_priv = s3c24xx_info;
- *info = s3c24xx_info;
-
- return ERROR_OK;
-}
-
-int s3c24xx_reset(struct nand_device *nand)
-{
- struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_write_u32(target, s3c24xx_info->cmd, 0xff);
-
- return ERROR_OK;
-}
-
-int s3c24xx_command(struct nand_device *nand, uint8_t command)
-{
- struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_write_u16(target, s3c24xx_info->cmd, command);
- return ERROR_OK;
-}
-
-int s3c24xx_address(struct nand_device *nand, uint8_t address)
-{
- struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_write_u16(target, s3c24xx_info->addr, address);
- return ERROR_OK;
-}
-
-int s3c24xx_write_data(struct nand_device *nand, uint16_t data)
-{
- struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_write_u8(target, s3c24xx_info->data, data);
- return ERROR_OK;
-}
-
-int s3c24xx_read_data(struct nand_device *nand, void *data)
-{
- struct s3c24xx_nand_controller *s3c24xx_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_read_u8(target, s3c24xx_info->data, data);
- return ERROR_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx.h
deleted file mode 100755
index c69de2e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007, 2008 by Ben Dooks *
- * ben@fluff.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef S3C24xx_NAND_H
-#define S3C24xx_NAND_H
-
-/*
- * S3C24XX Series OpenOCD NAND Flash controller support.
- *
- * Many thanks to Simtec Electronics for sponsoring this work.
- */
-
-#include "imp.h"
-#include "s3c24xx_regs.h"
-#include <target/target.h>
-
-struct s3c24xx_nand_controller {
- /* register addresses */
- uint32_t cmd;
- uint32_t addr;
- uint32_t data;
- uint32_t nfstat;
-};
-
-/* Default to using the un-translated NAND register based address */
-#undef S3C2410_NFREG
-#define S3C2410_NFREG(x) ((x) + 0x4e000000)
-
-#define S3C24XX_DEVICE_COMMAND() \
- COMMAND_HELPER(s3c24xx_nand_device_command, \
- struct nand_device *nand, \
- struct s3c24xx_nand_controller **info)
-
-S3C24XX_DEVICE_COMMAND();
-
-#define CALL_S3C24XX_DEVICE_COMMAND(d, i) \
- do { \
- int retval = CALL_COMMAND_HANDLER(s3c24xx_nand_device_command, d, i); \
- if (ERROR_OK != retval) \
- return retval; \
- } while (0)
-
-int s3c24xx_reset(struct nand_device *nand);
-
-int s3c24xx_command(struct nand_device *nand, uint8_t command);
-int s3c24xx_address(struct nand_device *nand, uint8_t address);
-
-int s3c24xx_write_data(struct nand_device *nand, uint16_t data);
-int s3c24xx_read_data(struct nand_device *nand, void *data);
-
-#define s3c24xx_write_page NULL
-#define s3c24xx_read_page NULL
-
-/* code shared between different controllers */
-
-int s3c2440_nand_ready(struct nand_device *nand, int timeout);
-
-int s3c2440_read_block_data(struct nand_device *nand,
- uint8_t *data, int data_size);
-int s3c2440_write_block_data(struct nand_device *nand,
- uint8_t *data, int data_size);
-
-#endif /* S3C24xx_NAND_H */
[47/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/dcc.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/dcc.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/dcc.c
deleted file mode 100755
index 6ab2417..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/dcc.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#include "dcc.h"
-
-
-/* debug channel read (debugger->MCU) */
-uint32 dcc_rd(void)
-{
- volatile uint32 dcc_reg;
-
- do {
- asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) :);
- } while ((dcc_reg&1) == 0);
-
- asm volatile ("mrc p14, 0, %0, C1, C0" : "=r" (dcc_reg) :);
- return dcc_reg;
-}
-
-
-/* debug channel write (MCU->debugger) */
-int dcc_wr(uint32 data)
-{
- volatile uint32 dcc_reg;
-
- do {
- asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) :);
- /* operation controled by master, cancel operation
- upon reception of data for immediate response */
- if (dcc_reg&1) return -1;
- } while (dcc_reg&2);
-
- asm volatile ("mcr p14, 0, %0, C1, C0" : : "r" (data));
- return 0;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/dcc.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/dcc.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/dcc.h
deleted file mode 100755
index a3c1393..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/dcc.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef dccH
-#define dccH
-
-#include "platform.h"
-
-/* debug channel read (debugger->MCU) */
-uint32 dcc_rd(void);
-
-/* debug channel write (MCU->debugger) */
-int dcc_wr(uint32 data);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/main.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/main.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/main.c
deleted file mode 100755
index c4b4dcf..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/main.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#include "platform.h"
-
-#include <flash/nor/ocl.h>
-#include "dcc.h"
-#include "samflash.h"
-
-
-#define BUFSIZE 1024 /* words, i.e. 4 KiB */
-uint32 buffer[1024];
-
-void cmd_flash(uint32 cmd)
-{
- unsigned int len;
- uint32 adr;
- uint32 chksum;
- unsigned int bi; /* buffer index */
- unsigned int bi_start; /* receive start mark */
- unsigned int bi_end; /* receive end mark */
- unsigned int ofs;
- int pagenum;
- int result;
-
- adr = dcc_rd();
- len = cmd&0xffff;
- ofs = adr%flash_page_size;
- bi_start = ofs/4;
- bi_end = (ofs + len + 3)/4;
-
- if (bi_end > BUFSIZE) {
- dcc_wr(OCL_BUFF_OVER);
- return;
- }
-
- chksum = OCL_CHKS_INIT;
- for (bi = 0; bi < bi_end; bi++) chksum^=buffer[bi]=dcc_rd();
-
- if (dcc_rd() != chksum) {
- dcc_wr(OCL_CHKS_FAIL);
- return;
- }
-
- /* fill in unused positions with unprogrammed values */
- for (bi = 0; bi < bi_start; bi++) buffer[bi]=0xffffffff;
- for (bi = bi_end; bi%flash_page_size; bi++) buffer[bi]=0xffffffff;
-
- result = 0;
- pagenum = adr/flash_page_size;
- for (bi = 0; bi < bi_end; bi += flash_page_size/4) {
- result = flash_page_program(buffer + bi, pagenum++);
- if (result) break;
- }
-
- /* verify written data */
- if (!result) result = flash_verify(adr, len, ((uint8 *)buffer) + ofs);
-
- dcc_wr(OCL_CMD_DONE | result);
-}
-
-
-int main (void)
-{
- uint32 cmd;
-
- for (;;) {
- cmd = dcc_rd();
- switch (cmd&OCL_CMD_MASK) {
- case OCL_PROBE:
- dcc_wr(OCL_CMD_DONE | flash_init());
- dcc_wr(0x100000); /* base */
- dcc_wr(flash_page_count*flash_page_size); /* size */
- dcc_wr(1); /* num_sectors */
- dcc_wr(4096 | ((unsigned long) flash_page_size << 16)); /* buflen and bufalign */
- break;
- case OCL_ERASE_ALL:
- dcc_wr(OCL_CMD_DONE | flash_erase_all());
- break;
- case OCL_FLASH_BLOCK:
- cmd_flash(cmd);
- break;
- default:
- /* unknown command */
- dcc_wr(OCL_CMD_ERR);
- break;
- }
- }
-
- return(0); /* we shall never get here, just to supress compiler warning */
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/ocl.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/ocl.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/ocl.h
deleted file mode 100755
index 1fe4596..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/ocl.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef OCL_H
-#define OCL_H
-
-/* command/response mask */
-#define OCL_CMD_MASK 0xFFFF0000L
-
-/* commads */
-#define OCL_FLASH_BLOCK 0x0CFB0000L
-#define OCL_ERASE_BLOCK 0x0CEB0000L
-#define OCL_ERASE_ALL 0x0CEA0000L
-#define OCL_PROBE 0x0CBE0000L
-
-/* responses */
-#define OCL_CMD_DONE 0x0ACD0000L
-#define OCL_CMD_ERR 0x0ACE0000L
-#define OCL_CHKS_FAIL 0x0ACF0000L
-#define OCL_BUFF_OVER 0x0AB00000L
-
-#define OCL_CHKS_INIT 0xC100CD0CL
-
-#endif /* OCL_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/platform.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/platform.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/platform.h
deleted file mode 100755
index 2b26e4b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/platform.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef platformH
-#define platformH
-
-#include "samregs.h"
-
-
-#define outb(_reg, _val) (*((volatile unsigned char *)(_reg)) = (_val))
-#define outw(_reg, _val) (*((volatile unsigned short *)(_reg)) = (_val))
-#define outr(_reg, _val) (*((volatile unsigned int *)(_reg)) = (_val))
-
-#define inb(_reg) (*((volatile unsigned char *)(_reg)))
-#define inw(_reg) (*((volatile unsigned short *)(_reg)))
-#define inr(_reg) (*((volatile unsigned int *)(_reg)))
-
-#define _BV(bit) (1 << (bit))
-
-
-typedef signed char int8;
-typedef unsigned char uint8;
-
-typedef signed short int16;
-typedef unsigned short uint16;
-
-typedef signed int int32;
-typedef unsigned int uint32;
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samflash.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samflash.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samflash.c
deleted file mode 100755
index 49c84c8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samflash.c
+++ /dev/null
@@ -1,196 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#include "samflash.h"
-
-
-unsigned int flash_page_count = 1024;
-unsigned int flash_page_size = 256;
-
-/* pages per lock bit */
-unsigned int flash_lock_pages = 1024/16;
-
-
-/* detect chip and set loader parameters */
-int flash_init(void)
-{
- unsigned int nvpsiz;
-
- nvpsiz = (inr(DBGU_CIDR) >> 8)&0xf;
-
- switch (nvpsiz) {
- case 3:
- /* AT91SAM7x32 */
- flash_page_count = 256;
- flash_page_size = 128;
- flash_lock_pages = 256/8;
- break;
- case 5:
- /* AT91SAM7x64 */
- flash_page_count = 512;
- flash_page_size = 128;
- flash_lock_pages = 512/16;
- break;
- case 7:
- /* AT91SAM7x128*/
- flash_page_count = 512;
- flash_page_size = 256;
- flash_lock_pages = 512/8;
- break;
- case 9:
- /* AT91SAM7x256 */
- flash_page_count = 1024;
- flash_page_size = 256;
- flash_lock_pages = 1024/16;
- break;
- case 10:
- /* AT91SAM7x512 */
- flash_page_count = 2048;
- flash_page_size = 256;
- flash_lock_pages = 2048/32;
- break;
- default:
- return FLASH_STAT_INITE;
- }
- return FLASH_STAT_OK;
-}
-
-
-/* program single flash page */
-int flash_page_program(uint32 *data, int page_num)
-{
- int i;
- int efc_ofs;
-
- uint32 *flash_ptr;
- uint32 *data_ptr;
-
- /* select proper controller */
- if (page_num >= 1024) efc_ofs = 0x10;
- else efc_ofs = 0;
-
- /* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
-
- /* calculate page address, only lower 8 bits are used to address the latch,
- but the upper part of address is needed for writing to proper EFC */
- flash_ptr = (uint32 *)(FLASH_AREA_ADDR + (page_num*flash_page_size));
- data_ptr = data;
-
- /* copy data to latch */
- for (i = flash_page_size/4; i; i--) {
- /* we do not use memcpy to be sure that only 32 bit access is used */
- *(flash_ptr++)=*(data_ptr++);
- }
-
- /* page number and page write command to FCR */
- outr(MC_FCR + efc_ofs, ((page_num&0x3ff) << 8) | MC_KEY | MC_FCMD_WP);
-
- /* wait until it's done */
- while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
-
- /* check for errors */
- if ((inr(MC_FSR + efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
- if ((inr(MC_FSR + efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
-
-#if 0
- /* verify written data */
- flash_ptr = (uint32 *)(FLASH_AREA_ADDR + (page_num*flash_page_size));
- data_ptr = data;
-
- for (i = flash_page_size/4; i; i--) {
- if (*(flash_ptr++)!=*(data_ptr++)) return FLASH_STAT_VERIFE;
- }
-#endif
-
- return FLASH_STAT_OK;
-}
-
-
-int flash_erase_plane(int efc_ofs)
-{
- unsigned int lockbits;
- int page_num;
-
- page_num = 0;
- lockbits = inr(MC_FSR + efc_ofs) >> 16;
- while (lockbits) {
- if (lockbits&1) {
-
- /* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
-
- outr(MC_FCR + efc_ofs, ((page_num&0x3ff) << 8) | 0x5a000004);
-
- /* wait until it's done */
- while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
-
- /* check for errors */
- if ((inr(MC_FSR + efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
- if ((inr(MC_FSR + efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
-
- }
- if ((page_num += flash_lock_pages) > flash_page_count) break;
- lockbits>>=1;
- }
-
- /* wait until FLASH is ready, just for sure */
- while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
-
- /* erase all command to FCR */
- outr(MC_FCR + efc_ofs, 0x5a000008);
-
- /* wait until it's done */
- while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
-
- /* check for errors */
- if ((inr(MC_FSR + efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
- if ((inr(MC_FSR + efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
-
- /* set no erase before programming */
- outr(MC_FMR + efc_ofs, inr(MC_FMR + efc_ofs) | 0x80);
-
- return FLASH_STAT_OK;
-}
-
-
-/* erase whole chip */
-int flash_erase_all(void)
-{
- int result;
-
- if ((result = flash_erase_plane(0)) != FLASH_STAT_OK) return result;
-
- /* the second flash controller, if any */
- if (flash_page_count > 1024) result = flash_erase_plane(0x10);
-
- return result;
-}
-
-
-int flash_verify(uint32 adr, unsigned int len, uint8 *src)
-{
- unsigned char *flash_ptr;
-
- flash_ptr = (uint8 *)FLASH_AREA_ADDR + adr;
- for (;len; len--) {
- if (*(flash_ptr++)!=*(src++)) return FLASH_STAT_VERIFE;
- }
- return FLASH_STAT_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samflash.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samflash.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samflash.h
deleted file mode 100755
index 1de02ae..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samflash.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef samflashH
-#define samflashH
-
-#include "platform.h"
-
-#define FLASH_AREA_ADDR 0x100000
-
-#define FLASH_STAT_OK 0
-#define FLASH_STAT_PROGE 1
-#define FLASH_STAT_LOCKE 2
-#define FLASH_STAT_VERIFE 3
-#define FLASH_STAT_INITE 4
-
-extern unsigned int flash_page_count;
-extern unsigned int flash_page_size; /* words */
-
-/* detect chip and set loader parameters */
-int flash_init(void);
-
-/* program single flash page */
-int flash_page_program(uint32 *data, int page_num);
-
-/* erase whole chip */
-int flash_erase_all(void);
-
-/* verify written data */
-int flash_verify(uint32 adr, unsigned int len, uint8 *src);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samregs.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samregs.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samregs.h
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index b206fd2..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/samregs.h
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the copyright holders nor the names of
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE
- * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
- * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * For additional information see http://www.ethernut.de/
- */
-
-
-#ifndef samregsH
-#define samregsH
-
-
-/*
- * Register definitions below copied from NutOS
- */
-
-#define DBGU_BASE 0xFFFFF200 /*!< \brief DBGU base address. */
-
-#define DBGU_CIDR_OFF 0x00000040 /*!< \brief DBGU chip ID register offset. */
-#define DBGU_CIDR (DBGU_BASE + DBGU_CIDR_OFF) /*!< \brief DBGU chip ID register. */
-
-
-#define MC_BASE 0xFFFFFF00 /*!< \brief Memory controller base. */
-
-#define MC_FMR_OFF 0x00000060 /*!< \brief MC flash mode register offset. */
-#define MC_FMR (MC_BASE + MC_FMR_OFF) /*!< \brief MC flash mode register address. */
-#define MC_FRDY 0x00000001 /*!< \brief Flash ready. */
-#define MC_LOCKE 0x00000004 /*!< \brief Lock error. */
-#define MC_PROGE 0x00000008 /*!< \brief Programming error. */
-#define MC_NEBP 0x00000080 /*!< \brief No erase before programming. */
-#define MC_FWS_MASK 0x00000300 /*!< \brief Flash wait state mask. */
-#define MC_FWS_1R2W 0x00000000 /*!< \brief 1 cycle for read, 2 for write operations. */
-#define MC_FWS_2R3W 0x00000100 /*!< \brief 2 cycles for read, 3 for write operations. */
-#define MC_FWS_3R4W 0x00000200 /*!< \brief 3 cycles for read, 4 for write operations. */
-#define MC_FWS_4R4W 0x00000300 /*!< \brief 4 cycles for read and write operations. */
-#define MC_FMCN_MASK 0x00FF0000 /*!< \brief Flash microsecond cycle number mask. */
-
-#define MC_FCR_OFF 0x00000064 /*!< \brief MC flash command register offset. */
-#define MC_FCR (MC_BASE + MC_FCR_OFF) /*!< \brief MC flash command register address. */
-#define MC_FCMD_MASK 0x0000000F /*!< \brief Flash command mask. */
-#define MC_FCMD_NOP 0x00000000 /*!< \brief No command. */
-#define MC_FCMD_WP 0x00000001 /*!< \brief Write page. */
-#define MC_FCMD_SLB 0x00000002 /*!< \brief Set lock bit. */
-#define MC_FCMD_WPL 0x00000003 /*!< \brief Write page and lock. */
-#define MC_FCMD_CLB 0x00000004 /*!< \brief Clear lock bit. */
-#define MC_FCMD_EA 0x00000008 /*!< \brief Erase all. */
-#define MC_FCMD_SGPB 0x0000000B /*!< \brief Set general purpose NVM bit. */
-#define MC_FCMD_CGPB 0x0000000D /*!< \brief Clear general purpose NVM bit. */
-#define MC_FCMD_SSB 0x0000000F /*!< \brief Set security bit. */
-#define MC_PAGEN_MASK 0x0003FF00 /*!< \brief Page number mask. */
-#define MC_KEY 0x5A000000 /*!< \brief Writing protect key. */
-
-#define MC_FSR_OFF 0x00000068 /*!< \brief MC flash status register offset. */
-#define MC_FSR (MC_BASE + MC_FSR_OFF) /*!< \brief MC flash status register address. */
-#define MC_SECURITY 0x00000010 /*!< \brief Security bit status. */
-
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/cortex-m0.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/cortex-m0.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/cortex-m0.S
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index a905a36..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/cortex-m0.S
+++ /dev/null
@@ -1,72 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2014 by Angus Gratton *
- * Derived from stm32f1x.S:
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * Copyright (C) 2013 by Roman Dmitrienko *
- * me@iamroman.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. If not, see <http://www.gnu.org/licenses/>. *
- ***************************************************************************/
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
- .thumb_func
-
-/* Written for NRF51822 (src/flash/nor/nrf51.c) however the NRF NVMC is
- * very generic (CPU blocks during flash writes), so this is actually
- * just a generic word-oriented copy routine for cortex-m0 (also
- * suitable for cortex m0plus/m3/m4.)
- *
- * To assemble:
- * arm-none-eabi-gcc -c cortex-m0.S
- *
- * To disassemble:
- * arm-none-eabi-objdump -o cortex-m0.o
- *
- * Thanks to Jens Bauer for providing advice on some of the tweaks.
- */
-
- /* Params:
- * r0 - byte count (in)
- * r1 - workarea start
- * r2 - workarea end
- * r3 - target address
- * Clobbered:
- * r4 - rp
- * r5 - wp, tmp
- */
-
-wait_fifo:
- ldr r5, [r1, #0] /* read wp */
- cmp r5, #0 /* abort if wp == 0 */
- beq exit
- ldr r4, [r1, #4] /* read rp */
- cmp r4, r5 /* wait until rp != wp */
- beq wait_fifo
-
- ldmia r4!, {r5} /* "*target_address++ = *rp++" */
- stmia r3!, {r5}
-
- cmp r4, r2 /* wrap rp at end of work area buffer */
- bcc no_wrap
- mov r4, r1
- adds r4, #8 /* skip rp,wp at start of work area */
-no_wrap:
- str r4, [r1, #4] /* write back rp */
- subs r0, #4 /* decrement byte count */
- bne wait_fifo /* loop if not done */
-exit:
- bkpt #0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/efm32.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/efm32.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/efm32.S
deleted file mode 100755
index 25d6301..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/efm32.S
+++ /dev/null
@@ -1,114 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * Copyright (C) 2013 by Roman Dmitrienko *
- * me@iamroman.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
- .thumb_func
-
- /* Params:
- * r0 - flash base (in), status (out)
- * r1 - count (word-32bit)
- * r2 - workarea start
- * r3 - workarea end
- * r4 - target address
- * Clobbered:
- * r5 - rp
- * r6 - wp, tmp
- * r7 - tmp
- */
-
-/* offsets of registers from flash reg base */
-#define EFM32_MSC_WRITECTRL_OFFSET 0x008
-#define EFM32_MSC_WRITECMD_OFFSET 0x00c
-#define EFM32_MSC_ADDRB_OFFSET 0x010
-#define EFM32_MSC_WDATA_OFFSET 0x018
-#define EFM32_MSC_STATUS_OFFSET 0x01c
-#define EFM32_MSC_LOCK_OFFSET 0x03c
-
- /* unlock MSC */
- ldr r6, =#0x1b71
- str r6, [r0, #EFM32_MSC_LOCK_OFFSET]
- /* set WREN to 1 */
- movs r6, #1
- str r6, [r0, #EFM32_MSC_WRITECTRL_OFFSET]
-
-wait_fifo:
- ldr r6, [r2, #0] /* read wp */
- cmp r6, #0 /* abort if wp == 0 */
- beq exit
- ldr r5, [r2, #4] /* read rp */
- cmp r5, r6 /* wait until rp != wp */
- beq wait_fifo
-
- /* store address in MSC_ADDRB */
- str r4, [r0, #EFM32_MSC_ADDRB_OFFSET]
- /* set LADDRIM bit */
- movs r6, #1
- str r6, [r0, #EFM32_MSC_WRITECMD_OFFSET]
- /* check status for INVADDR and/or LOCKED */
- ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET]
- movs r7, #6
- tst r6, r7
- bne error
-
- /* wait for WDATAREADY */
-wait_wdataready:
- ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET]
- movs r7, #8
- tst r6, r7
- beq wait_wdataready
-
- /* load data to WDATA */
- ldr r6, [r5]
- str r6, [r0, #EFM32_MSC_WDATA_OFFSET]
- /* set WRITEONCE bit */
- movs r6, #8
- str r6, [r0, #EFM32_MSC_WRITECMD_OFFSET]
-
- adds r5, #4 /* rp++ */
- adds r4, #4 /* target_address++ */
-
- /* wait until BUSY flag is reset */
-busy:
- ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET]
- movs r7, #1
- tst r6, r7
- bne busy
-
- cmp r5, r3 /* wrap rp at end of buffer */
- bcc no_wrap
- mov r5, r2
- adds r5, #8
-no_wrap:
- str r5, [r2, #4] /* store rp */
- subs r1, r1, #1 /* decrement word count */
- cmp r1, #0
- beq exit /* loop if not done */
- b wait_fifo
-error:
- movs r0, #0
- str r0, [r2, #4] /* set rp = 0 on error */
-exit:
- mov r0, r6 /* return status in r0 */
- bkpt #0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/erase.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/erase.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/erase.S
deleted file mode 100755
index 6fdf81d..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/erase.S
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * Spansion FM4 flash sector erase algorithm
- *
- * Copyright (c) 2015 Andreas F�rber
- *
- * Based on S6E2CC_MN709-00007 for S6E2CC/C5/C4/C3/C2/C1 series
- */
-
-#include "fm4.h"
-
-#define RESULT_OKAY 0
-#define RESULT_NONE 1
-#define RESULT_TIMEOUT 2
-
- .macro busy_wait, res, addr, tmp1, tmp2, tmp3
-
- ldrb \tmp1, [\addr] /* ignore */
-1001:
- ldrb \tmp1, [\addr]
- ldrb \tmp2, [\addr]
-
- and \tmp3, \tmp1, #FLASH_TOGG
- and \tmp2, \tmp2, #FLASH_TOGG
- cmp \tmp3, \tmp2
- beq 1010f
-
- and \tmp2, \tmp1, #FLASH_TLOV
- cmp \tmp2, #0
- beq 1001b
-
- ldrb \tmp1, [\addr]
- ldrb \tmp2, [\addr]
-
- and \tmp3, \tmp1, #FLASH_TOGG
- and \tmp2, \tmp2, #FLASH_TOGG
- cmp \tmp3, \tmp2
- beq 1010f
-
- mov \res, #RESULT_TIMEOUT
- bkpt #0
-1010:
- mov \res, #RESULT_OKAY
-
- .endm
-
-
- .macro erase, cmdseqaddr1, cmdseqaddr2, sa, res, tmp1, tmp2, tmp3
-
- mov \res, #RESULT_NONE
-
- mov \tmp1, #0xAA
- strh \tmp1, [\cmdseqaddr1]
- mov \tmp2, #0x55
- strh \tmp2, [\cmdseqaddr2]
- mov \tmp3, #0x80
- strh \tmp3, [\cmdseqaddr1]
- strh \tmp1, [\cmdseqaddr1]
- strh \tmp2, [\cmdseqaddr2]
- mov \tmp3, #0x30
- strh \tmp3, [\sa]
-
- busy_wait \res, \sa, \tmp1, \tmp2, \tmp3
-
- .endm
-
-
- /* r0 = 0xAA8
- * r1 = 0x554
- * r2 = SA
- * r3 = result
- */
-erase:
- erase r0, r1, r2, r3, r4, r5, r6
-
- bkpt #0
-
-data:
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/erase.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/erase.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/erase.inc
deleted file mode 100755
index 9f38067..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/erase.inc
+++ /dev/null
@@ -1,7 +0,0 @@
-/* Autogenerated with ../../../../src/helper/bin2char.sh */
-0x4f,0xf0,0x01,0x03,0x4f,0xf0,0xaa,0x04,0x04,0x80,0x4f,0xf0,0x55,0x05,0x0d,0x80,
-0x4f,0xf0,0x80,0x06,0x06,0x80,0x04,0x80,0x0d,0x80,0x4f,0xf0,0x30,0x06,0x16,0x80,
-0x14,0x78,0x14,0x78,0x15,0x78,0x04,0xf0,0x40,0x06,0x05,0xf0,0x40,0x05,0xae,0x42,
-0x0e,0xd0,0x04,0xf0,0x20,0x05,0x00,0x2d,0xf3,0xd0,0x14,0x78,0x15,0x78,0x04,0xf0,
-0x40,0x06,0x05,0xf0,0x40,0x05,0xae,0x42,0x02,0xd0,0x4f,0xf0,0x02,0x03,0x00,0xbe,
-0x4f,0xf0,0x00,0x03,0x00,0xbe,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/fm4.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/fm4.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/fm4.h
deleted file mode 100755
index 603aac8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/fm4.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Spansion FM4 flash macros
- *
- * Copyright (c) 2015 Andreas F�rber
- *
- * Based on S6E2CC_MN709-00007 for S6E2CC/C5/C4/C3/C2/C1 series
- */
-
- .text
- .syntax unified
- .cpu cortex-m4
- .thumb
- .thumb_func
-
-
-#define FLASH_DPOL (1 << 7)
-#define FLASH_TOGG (1 << 6)
-#define FLASH_TLOV (1 << 5)
-#define FLASH_TOGG2 (1 << 2)
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/write.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/write.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/write.S
deleted file mode 100755
index a8d01cd..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/write.S
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- * Spansion FM4 flash write algorithm
- *
- * Copyright (c) 2015 Andreas F�rber
- *
- * Based on S6E2CC_MN709-00007 for S6E2CC/C5/C4/C3/C2/C1 series
- */
-
-#include "fm4.h"
-
-#define RESULT_OKAY 0
-#define RESULT_NONE 1
-#define RESULT_TIMEOUT 2
-
- .macro busy_wait, res, addr, data, tmp1, tmp2, tmp3
-
- ldrb \tmp1, [\addr] /* ignore */
- and \tmp2, \data, #FLASH_DPOL
-1001:
- ldrb \tmp1, [\addr]
- and \tmp3, \tmp1, #FLASH_DPOL
- cmp \tmp3, \tmp2
- beq 1010f
-
- and \tmp3, \tmp1, #FLASH_TLOV
- cmp \tmp3, #0
- beq 1001b
-
- ldrb \tmp1, [\addr]
- and \tmp3, \tmp1, #FLASH_DPOL
- cmp \tmp3, \tmp2
- beq 1010f
-
- mov \res, #RESULT_TIMEOUT
- bkpt #0
-1010:
- .endm
-
-
- .macro write_one, res, cmdseqaddr1, cmdseqaddr2, pa, pd, tmp1, tmp2, tmp3
-
- mov \tmp1, #0xAA
- strh \tmp1, [\cmdseqaddr1]
- mov \tmp1, #0x55
- strh \tmp1, [\cmdseqaddr2]
- mov \tmp1, #0xA0
- strh \tmp1, [\cmdseqaddr1]
- strh \pd, [\pa]
-
- busy_wait \res, \pa, \pd, \tmp1, \tmp2, \tmp3
-
- .endm
-
-
- .macro write, cmdseqaddr1, cmdseqaddr2, dest, src, cnt, res, tmp1, tmp2, tmp3, tmp4
-
- mov \res, #RESULT_NONE
-2001:
- cbz \cnt, 2010f
-
- ldrh \tmp1, [\src]
- write_one \res, \cmdseqaddr1, \cmdseqaddr2, \dest, \tmp1, \tmp2, \tmp3, \tmp4
-
- sub \cnt, \cnt, #1
- add \dest, \dest, #2
- add \src, \src, #2
- b 2001b
-2010:
- mov \res, #RESULT_OKAY
- .endm
-
-
- /* r0 = 0xAA8
- * r1 = 0x554
- * r2 = dest
- * r3 = src
- * r4 = cnt
- * r5 = result
- */
-write:
- write r0, r1, r2, r3, r4, r5, r6, r7, r8, r9
-
- bkpt #0
-
-data:
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/write.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/write.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/write.inc
deleted file mode 100755
index 3d8472b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fm4/write.inc
+++ /dev/null
@@ -1,7 +0,0 @@
-/* Autogenerated with ../../../../src/helper/bin2char.sh */
-0x4f,0xf0,0x01,0x05,0x34,0xb3,0x1e,0x88,0x4f,0xf0,0xaa,0x07,0x07,0x80,0x4f,0xf0,
-0x55,0x07,0x0f,0x80,0x4f,0xf0,0xa0,0x07,0x07,0x80,0x16,0x80,0x17,0x78,0x06,0xf0,
-0x80,0x08,0x17,0x78,0x07,0xf0,0x80,0x09,0xc1,0x45,0x0c,0xd0,0x07,0xf0,0x20,0x09,
-0xb9,0xf1,0x00,0x0f,0xf5,0xd0,0x17,0x78,0x07,0xf0,0x80,0x09,0xc1,0x45,0x02,0xd0,
-0x4f,0xf0,0x02,0x05,0x00,0xbe,0xa4,0xf1,0x01,0x04,0x02,0xf1,0x02,0x02,0x03,0xf1,
-0x02,0x03,0xd7,0xe7,0x4f,0xf0,0x00,0x05,0x00,0xbe,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fpga/xilinx_bscan_spi.py
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fpga/xilinx_bscan_spi.py b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fpga/xilinx_bscan_spi.py
deleted file mode 100755
index a107a6a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/fpga/xilinx_bscan_spi.py
+++ /dev/null
@@ -1,317 +0,0 @@
-#!/usr/bin/python3
-#
-# Copyright (C) 2015 Robert Jordens <jo...@gmail.com>
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-
-from migen.fhdl.std import *
-from mibuild.generic_platform import *
-from mibuild.xilinx import XilinxPlatform
-from mibuild.xilinx.vivado import XilinxVivadoToolchain
-from mibuild.xilinx.ise import XilinxISEToolchain
-
-
-"""
-This migen script produces proxy bitstreams to allow programming SPI flashes
-behind FPGAs. JTAG signalling is connected directly to SPI signalling. CS_N is
-asserted when the JTAG IR contains the USER1 instruction and the state is
-SHIFT-DR.
-
-Xilinx bscan cells sample TDO on falling TCK and forward it.
-MISO requires sampling on rising CLK and leads to one cycle of latency.
-
-https://github.com/m-labs/migen
-"""
-
-
-class Spartan3(Module):
- macro = "BSCAN_SPARTAN3"
-
- def __init__(self, platform):
- self.clock_domains.cd_jtag = ClockDomain(reset_less=True)
- spi = platform.request("spiflash")
- shift = Signal()
- tdo = Signal()
- sel1 = Signal()
- self.comb += [
- self.cd_jtag.clk.eq(spi.clk),
- spi.cs_n.eq(~shift | ~sel1),
- ]
- self.sync.jtag += tdo.eq(spi.miso)
- self.specials += Instance(self.macro,
- o_DRCK1=spi.clk, o_SHIFT=shift,
- o_TDI=spi.mosi, i_TDO1=tdo, i_TDO2=0,
- o_SEL1=sel1)
-
-
-class Spartan3A(Spartan3):
- macro = "BSCAN_SPARTAN3A"
-
-
-class Spartan6(Module):
- def __init__(self, platform):
- self.clock_domains.cd_jtag = ClockDomain(reset_less=True)
- spi = platform.request("spiflash")
- shift = Signal()
- tdo = Signal()
- sel = Signal()
- self.comb += self.cd_jtag.clk.eq(spi.clk), spi.cs_n.eq(~shift | ~sel)
- self.sync.jtag += tdo.eq(spi.miso)
- self.specials += Instance("BSCAN_SPARTAN6", p_JTAG_CHAIN=1,
- o_TCK=spi.clk, o_SHIFT=shift, o_SEL=sel,
- o_TDI=spi.mosi, i_TDO=tdo)
-
-
-class Series7(Module):
- def __init__(self, platform):
- self.clock_domains.cd_jtag = ClockDomain(reset_less=True)
- spi = platform.request("spiflash")
- clk = Signal()
- shift = Signal()
- tdo = Signal()
- sel = Signal()
- self.comb += self.cd_jtag.clk.eq(clk), spi.cs_n.eq(~shift | ~sel)
- self.sync.jtag += tdo.eq(spi.miso)
- self.specials += Instance("BSCANE2", p_JTAG_CHAIN=1,
- o_SHIFT=shift, o_TCK=clk, o_SEL=sel,
- o_TDI=spi.mosi, i_TDO=tdo)
- self.specials += Instance("STARTUPE2", i_CLK=0, i_GSR=0, i_GTS=0,
- i_KEYCLEARB=0, i_PACK=1, i_USRCCLKO=clk,
- i_USRCCLKTS=0, i_USRDONEO=1, i_USRDONETS=1)
-
-
-class XilinxBscanSpi(XilinxPlatform):
- pinouts = {
- # bitstreams are named by die, package does not matter, speed grade
- # should not matter.
- # cs_n, clk, mosi, miso, *pullups
- "xc3s100e": ("cp132",
- ["M2", "N12", "N2", "N8"],
- "LVCMOS33", Spartan3),
- "xc3s1200e": ("fg320",
- ["U3", "U16", "T4", "N10"],
- "LVCMOS33", Spartan3),
- "xc3s1400a": ("fg484",
- ["Y4", "AA20", "AB14", "AB20"],
- "LVCMOS33", Spartan3A),
- "xc3s1400an": ("fgg484",
- ["Y4", "AA20", "AB14", "AB20"],
- "LVCMOS33", Spartan3A),
- "xc3s1600e": ("fg320",
- ["U3", "U16", "T4", "N10"],
- "LVCMOS33", Spartan3),
- "xc3s200a": ("fg320",
- ["V3", "U16", "T11", "V16"],
- "LVCMOS33", Spartan3A),
- "xc3s200an": ("ftg256",
- ["T2", "R14", "P10", "T14"],
- "LVCMOS33", Spartan3A),
- "xc3s250e": ("cp132",
- ["M2", "N12", "N2", "N8"],
- "LVCMOS33", Spartan3),
- "xc3s400a": ("fg320",
- ["V3", "U16", "T11", "V16"],
- "LVCMOS33", Spartan3A),
- "xc3s400an": ("fgg400",
- ["Y2", "Y19", "W12", "W18"],
- "LVCMOS33", Spartan3A),
- "xc3s500e": ("cp132",
- ["M2", "N12", "N2", "N8"],
- "LVCMOS33", Spartan3),
- "xc3s50a": ("ft256",
- ["T2", "R14", "P10", "T14"],
- "LVCMOS33", Spartan3A),
- "xc3s50an": ("ftg256",
- ["T2", "R14", "P10", "T14"],
- "LVCMOS33", Spartan3A),
- "xc3s700a": ("fg400",
- ["Y2", "Y19", "W12", "W18"],
- "LVCMOS33", Spartan3A),
- "xc3s700an": ("fgg484",
- ["Y4", "AA20", "AB14", "AB20"],
- "LVCMOS33", Spartan3A),
- "xc3sd1800a": ("cs484",
- ["U7", "V17", "V13", "W17"],
- "LVCMOS33", Spartan3A),
- "xc3sd3400a": ("cs484",
- ["U7", "V17", "V13", "W17"],
- "LVCMOS33", Spartan3A),
-
- "xc6slx100": ("csg484-2",
- ["AB5", "W17", "AB17", "Y17", "V13", "W13"],
- "LVCMOS33", Spartan6),
- "xc6slx100t": ("csg484-2",
- ["AB5", "W17", "AB17", "Y17", "V13", "W13"],
- "LVCMOS33", Spartan6),
- "xc6slx150": ("csg484-2",
- ["AB5", "W17", "AB17", "Y17", "V13", "W13"],
- "LVCMOS33", Spartan6),
- "xc6slx150t": ("csg484-2",
- ["AB5", "W17", "AB17", "Y17", "V13", "W13"],
- "LVCMOS33", Spartan6),
- "xc6slx16": ("cpg196-2",
- ["P2", "N13", "P11", "N11", "N10", "P10"],
- "LVCMOS33", Spartan6),
- "xc6slx25": ("csg324-2",
- ["V3", "R15", "T13", "R13", "T14", "V14"],
- "LVCMOS33", Spartan6),
- "xc6slx25t": ("csg324-2",
- ["V3", "R15", "T13", "R13", "T14", "V14"],
- "LVCMOS33", Spartan6),
- "xc6slx45": ("csg324-2",
- ["V3", "R15", "T13", "R13", "T14", "V14"],
- "LVCMOS33", Spartan6),
- "xc6slx45t": ("csg324-2",
- ["V3", "R15", "T13", "R13", "T14", "V14"],
- "LVCMOS33", Spartan6),
- "xc6slx4": ("cpg196-2",
- ["P2", "N13", "P11", "N11", "N10", "P10"],
- "LVCMOS33", Spartan6),
- "xc6slx4t": ("qg144-2",
- ["P38", "P70", "P64", "P65", "P62", "P61"],
- "LVCMOS33", Spartan6),
- "xc6slx75": ("csg484-2",
- ["AB5", "W17", "AB17", "Y17", "V13", "W13"],
- "LVCMOS33", Spartan6),
- "xc6slx75t": ("csg484-2",
- ["AB5", "W17", "AB17", "Y17", "V13", "W13"],
- "LVCMOS33", Spartan6),
- "xc6slx9": ("cpg196-2",
- ["P2", "N13", "P11", "N11", "N10", "P10"],
- "LVCMOS33", Spartan6),
- "xc6slx9t": ("qg144-2",
- ["P38", "P70", "P64", "P65", "P62", "P61"],
- "LVCMOS33", Spartan6),
-
- "xc7a100t": ("csg324-1",
- ["L13", None, "K17", "K18", "L14", "M14"],
- "LVCMOS25", Series7),
- "xc7a15t": ("cpg236-1",
- ["K19", None, "D18", "D19", "G18", "F18"],
- "LVCMOS25", Series7),
- "xc7a200t": ("fbg484-1",
- ["T19", None, "P22", "R22", "P21", "R21"],
- "LVCMOS25", Series7),
- "xc7a35t": ("cpg236-1",
- ["K19", None, "D18", "D19", "G18", "F18"],
- "LVCMOS25", Series7),
- "xc7a50t": ("cpg236-1",
- ["K19", None, "D18", "D19", "G18", "F18"],
- "LVCMOS25", Series7),
- "xc7a75t": ("csg324-1",
- ["L13", None, "K17", "K18", "L14", "M14"],
- "LVCMOS25", Series7),
- "xc7k160t": ("fbg484-1",
- ["L16", None, "H18", "H19", "G18", "F19"],
- "LVCMOS25", Series7),
- "xc7k325t": ("fbg676-1",
- ["C23", None, "B24", "A25", "B22", "A22"],
- "LVCMOS25", Series7),
- "xc7k355t": ("ffg901-1",
- ["V26", None, "R30", "T30", "R28", "T28"],
- "LVCMOS25", Series7),
- "xc7k410t": ("fbg676-1",
- ["C23", None, "B24", "A25", "B22", "A22"],
- "LVCMOS25", Series7),
- "xc7k420t": ("ffg1156-1",
- ["V30", None, "AA33", "AA34", "Y33", "Y34"],
- "LVCMOS25", Series7),
- "xc7k480t": ("ffg1156-1",
- ["V30", None, "AA33", "AA34", "Y33", "Y34"],
- "LVCMOS25", Series7),
- "xc7k70t": ("fbg484-1",
- ["L16", None, "H18", "H19", "G18", "F19"],
- "LVCMOS25", Series7),
- "xc7v2000t": ("fhg1761-1",
- ["AL36", None, "AM36", "AN36", "AJ36", "AJ37"],
- "LVCMOS18", Series7),
- "xc7v585t": ("ffg1157-1",
- ["AL33", None, "AN33", "AN34", "AK34", "AL34"],
- "LVCMOS18", Series7),
- "xc7vh580t": ("flg1155-1",
- ["AL28", None, "AE28", "AF28", "AJ29", "AJ30"],
- "LVCMOS18", Series7),
- "xc7vh870t": ("flg1932-1",
- ["V32", None, "T33", "R33", "U31", "T31"],
- "LVCMOS18", Series7),
- "xc7vx1140t": ("flg1926-1",
- ["AK33", None, "AN34", "AN35", "AJ34", "AK34"],
- "LVCMOS18", Series7),
- "xc7vx330t": ("ffg1157-1",
- ["AL33", None, "AN33", "AN34", "AK34", "AL34"],
- "LVCMOS18", Series7),
- "xc7vx415t": ("ffg1157-1",
- ["AL33", None, "AN33", "AN34", "AK34", "AL34"],
- "LVCMOS18", Series7),
- "xc7vx485t": ("ffg1157-1",
- ["AL33", None, "AN33", "AN34", "AK34", "AL34"],
- "LVCMOS18", Series7),
- "xc7vx550t": ("ffg1158-1",
- ["C24", None, "A23", "A24", "B26", "A26"],
- "LVCMOS18", Series7),
- "xc7vx690t": ("ffg1157-1",
- ["AL33", None, "AN33", "AN34", "AK34", "AL34"],
- "LVCMOS18", Series7),
- "xc7vx980t": ("ffg1926-1",
- ["AK33", None, "AN34", "AN35", "AJ34", "AK34"],
- "LVCMOS18", Series7),
- }
-
- def __init__(self, device, pins, std):
- cs_n, clk, mosi, miso = pins[:4]
- io = ["spiflash", 0,
- Subsignal("cs_n", Pins(cs_n)),
- Subsignal("mosi", Pins(mosi)),
- Subsignal("miso", Pins(miso), Misc("PULLUP")),
- IOStandard(std),
- ]
- if clk:
- io.append(Subsignal("clk", Pins(clk)))
- for i, p in enumerate(pins[4:]):
- io.append(Subsignal("pullup{}".format(i), Pins(p), Misc("PULLUP")))
-
- XilinxPlatform.__init__(self, device, [io])
- if isinstance(self.toolchain, XilinxVivadoToolchain):
- self.toolchain.bitstream_commands.append(
- "set_property BITSTREAM.GENERAL.COMPRESS True [current_design]"
- )
- elif isinstance(self.toolchain, XilinxISEToolchain):
- self.toolchain.bitgen_opt += " -g compress"
-
- @classmethod
- def make(cls, device, errors=False):
- pkg, pins, std, Top = cls.pinouts[device]
- platform = cls("{}-{}".format(device, pkg), pins, std)
- top = Top(platform)
- name = "bscan_spi_{}".format(device)
- dir = "build_{}".format(device)
- try:
- platform.build(top, build_name=name, build_dir=dir)
- except Exception as e:
- print("ERROR: build failed for {}: {}".format(device, e))
- if errors:
- raise
-
-
-if __name__ == "__main__":
- import argparse
- import multiprocessing
- p = argparse.ArgumentParser(description="build bscan_spi bitstreams "
- "for openocd jtagspi flash driver")
- p.add_argument("device", nargs="*",
- default=sorted(list(XilinxBscanSpi.pinouts)),
- help="build for these devices (default: %(default)s)")
- p.add_argument("-p", "--parallel", default=1, type=int,
- help="number of parallel builds (default: %(default)s)")
- args = p.parse_args()
- pool = multiprocessing.Pool(args.parallel)
- pool.map(XilinxBscanSpi.make, args.device, chunksize=1)
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/k1921vk01t.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/k1921vk01t.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/k1921vk01t.S
deleted file mode 100755
index b8f0b53..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/k1921vk01t.S
+++ /dev/null
@@ -1,112 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 by Bogdan Kolbov *
- * kolbov@niiet.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m4
- .thumb
- .thumb_func
-
-/* K1921VK01T has 128-bitwidth flash, so it`s able to load 4x32-bit words at the time.
- * And only after all words loaded we can start write
- */
-
-/* Registers addresses */
-#define FLASH_FMA 0x00 /* Address reg */
-#define FLASH_FMD1 0x04 /* Data1 reg */
-#define FLASH_FMC 0x08 /* Command reg */
-#define FLASH_FCIS 0x0C /* Operation Status reg */
-#define FLASH_FCIC 0x14 /* Operation Status Clear reg */
-#define FLASH_FMD2 0x50 /* Data2 reg */
-#define FLASH_FMD3 0x54 /* Data3 reg */
-#define FLASH_FMD4 0x58 /* Data4 reg*/
-
- /* Params:
- * r0 - write cmd (in), status (out)
- * r1 - count
- * r2 - workarea start
- * r3 - workarea end
- * r4 - target address
- * Clobbered:
- * r5 - rp
- * r6 - wp, tmp
- * r7 - flash base
- */
-
-ldr r7, =#0xA001C000 /* Flash reg base*/
-
-wait_fifo:
- ldr r6, [r2, #0] /* read wp */
- cmp r6, #0 /* abort if wp == 0 */
- beq exit
- ldr r5, [r2, #4] /* read rp */
- cmp r5, r6 /* wait until rp != wp */
- beq wait_fifo
-
-
-load_data:
- ldr r6, [r5] /* read data1 */
- str r6, [r7, #FLASH_FMD1]
- adds r5, #4
-
- ldr r6, [r5] /* read data2 */
- str r6, [r7, #FLASH_FMD2]
- adds r5, #4
-
- ldr r6, [r5] /* read data3 */
- str r6, [r7, #FLASH_FMD3]
- adds r5, #4
-
- ldr r6, [r5] /* read data4 */
- str r6, [r7, #FLASH_FMD4]
- adds r5, #4
-
-start_write:
- str r4, [r7, #FLASH_FMA] /* set addr */
- adds r4, #16
- str r0, [r7, #FLASH_FMC] /* write cmd */
-
-busy:
- ldr r6, [r7, #FLASH_FCIS] /* wait until flag set */
- cmp r6, #0x0
- beq busy
-
- cmp r6, #2 /* check the error bit */
- beq error
-
- movs r6, #1 /* clear flags */
- str r6, [r7, #FLASH_FCIC]
-
- cmp r5, r3 /* wrap rp at end of buffer */
- bcc no_wrap
- mov r5, r2
- adds r5, #8
-no_wrap:
- str r5, [r2, #4] /* store rp */
- subs r1, r1, #1 /* decrement 16-byte block count */
- cmp r1, #0
- beq exit /* loop if not done */
- b wait_fifo
-
-error:
- movs r0, #0
- str r0, [r2, #4] /* set rp = 0 on error */
-exit:
- mov r0, r6 /* return status in r0 */
- bkpt #0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.inc
deleted file mode 100755
index 9bb0fa8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.inc
+++ /dev/null
@@ -1,15 +0,0 @@
-/* Autogenerated with ../../../../src/helper/bin2char.sh */
-0x16,0x68,0x00,0x2e,0xfe,0xd0,0x55,0x68,0xb5,0x42,0xf9,0xd0,0x2f,0x4e,0x30,0x27,
-0x37,0x70,0x2f,0x4e,0x00,0x27,0x37,0x70,0x2e,0x4e,0x06,0x27,0x37,0x70,0x07,0x0c,
-0x2d,0x4e,0x37,0x70,0x2a,0x4e,0x01,0x27,0x37,0x70,0xc7,0xb2,0x2a,0x4e,0x37,0x70,
-0x07,0x0a,0x28,0x4e,0x37,0x70,0x26,0x4e,0x02,0x27,0x37,0x70,0x6f,0x78,0x25,0x4e,
-0x37,0x70,0x2f,0x78,0x24,0x4e,0x37,0x70,0x21,0x4e,0x03,0x27,0x37,0x70,0xef,0x78,
-0x20,0x4e,0x37,0x70,0xaf,0x78,0x20,0x4e,0x37,0x70,0x01,0x39,0x04,0x30,0x04,0x35,
-0x9d,0x42,0x01,0xd3,0x15,0x1c,0x08,0x35,0x00,0x29,0x1b,0xd0,0x16,0x68,0xae,0x42,
-0x18,0xd0,0x17,0x4e,0x04,0x27,0x37,0x70,0x6f,0x78,0x16,0x4e,0x37,0x70,0x2f,0x78,
-0x15,0x4e,0x37,0x70,0x12,0x4e,0x05,0x27,0x37,0x70,0xef,0x78,0x11,0x4e,0x37,0x70,
-0xaf,0x78,0x11,0x4e,0x37,0x70,0x01,0x39,0x04,0x30,0x04,0x35,0x9d,0x42,0x01,0xd3,
-0x15,0x1c,0x08,0x35,0x09,0x4e,0x80,0x27,0x37,0x70,0x08,0x4e,0x36,0x78,0x3e,0x42,
-0xfb,0xd0,0x30,0x27,0x3e,0x42,0x04,0xd1,0x00,0x26,0x55,0x60,0x00,0x29,0x02,0xd0,
-0x9e,0xe7,0x00,0x20,0x50,0x60,0x30,0x1c,0x00,0xbe,0xc0,0x46,0x00,0x00,0x00,0x00,
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.s
deleted file mode 100755
index 1fa7613..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.s
+++ /dev/null
@@ -1,184 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 by Ivan Meleca *
- * ivan@artekit.eu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
- /* Params:
- * r0 = flash destination address, status
- * r1 = longword count
- * r2 = workarea start address
- * r3 = workarea end address
- */
-
- .text
- .cpu cortex-m0plus
- .code 16
- .thumb_func
-
- .align 2
-
- /* r5 = rp
- * r6 = wp, tmp
- * r7 = tmp
- */
-
-wait_fifo:
- ldr r6, [r2, #0] /* read wp */
- cmp r6, #0 /* abort if wp == 0 */
- beq exit
- ldr r5, [r2, #4] /* read rp */
- cmp r5, r6 /* wait until rp != wp */
- beq wait_fifo
-
- ldr r6, fstat /* Clear error flags */
- mov r7, #48
- strb r7, [r6]
-
- ldr r6, fccobix /* FCCOBIX = 0 */
- mov r7, #0
- strb r7, [r6]
-
- ldr r6, fccobhi /* Program FLASH command */
- mov r7, #6 /* FCCOBHI = 6 */
- strb r7, [r6]
-
- lsr r7, r0, #16 /* FCCOBLO = flash destination address >> 16 */
- ldr r6, fccoblo
- strb r7, [r6]
-
- ldr r6, fccobix /* Index for lower byte address bits[15:0] */
- mov r7, #1
- strb r7, [r6] /* FCCOBIX = 1*/
-
- uxtb r7, r0 /* Memory address bits[15:0] */
- ldr r6, fccoblo
- strb r7, [r6] /* FCCOBLO = flash destination address */
-
- lsr r7, r0, #8
- ldr r6, fccobhi
- strb r7, [r6] /* FCCOBHI = flash destination address >> 8 */
-
- ldr r6, fccobix /* FCCOBIX = 2 */
- mov r7, #2
- strb r7, [r6]
-
- ldrb r7, [r5, #1] /* FCCOBHI = rp >> 8 */
- ldr r6, fccobhi
- strb r7, [r6]
-
- ldrb r7, [r5] /* FCCOBLO = rp */
- ldr r6, fccoblo
- strb r7, [r6]
-
- ldr r6, fccobix /* FCCOBIX = 3 */
- mov r7, #3
- strb r7, [r6]
-
- ldrb r7, [r5, #3] /* FCCOBHI = rp >> 24 */
- ldr r6, fccobhi
- strb r7, [r6]
-
- ldrb r7, [r5, #2] /* FCCOBLO = rp >> 16 */
- ldr r6, fccoblo
- strb r7, [r6]
-
- sub r1, r1, #1 /* Two words (4 bytes) queued, decrement counter */
- add r0, r0, #4 /* flash address += 4 */
- add r5, r5, #4 /* rp += 4 */
-
- cmp r5, r3 /* Wrap? */
- bcc no_wrap
- mov r5, r2
- add r5, r5, #8
-
-no_wrap:
- cmp r1, #0 /* Done? */
- beq execute
-
- ldr r6, [r2, #0] /* read wp */
- cmp r6, r5
- beq execute /* execute if rp == wp */
-
- ldr r6, fccobix /* FCCOBIX = 4 */
- mov r7, #4
- strb r7, [r6]
-
- ldrb r7, [r5, #1] /* FCCOBHI = rp >> 8 */
- ldr r6, fccobhi
- strb r7, [r6]
-
- ldrb r7, [r5] /* FCCOBLO = rp */
- ldr r6, fccoblo
- strb r7, [r6]
-
- ldr r6, fccobix /* FCCOBIX = 5 */
- mov r7, #5
- strb r7, [r6]
-
- ldrb r7, [r5, #3] /* FCCOBHI = rp >> 24 */
- ldr r6, fccobhi
- strb r7, [r6]
-
- ldrb r7, [r5, #2] /* FCCOBLO = rp >> 16 */
- ldr r6, fccoblo
- strb r7, [r6]
-
- sub r1, r1, #1 /* Two words (4 bytes) queued, decrement counter */
- add r0, r0, #4 /* flash address += 4 */
- add r5, r5, #4 /* rp += 4 */
-
- cmp r5, r3 /* Wrap? */
- bcc execute
- mov r5, r2
- add r5, r5, #8
-
-execute:
- ldr r6, fstat /* Launch the command */
- mov r7, #128
- strb r7, [r6]
-
-wait_busy:
- ldr r6, fstat
- ldrb r6, [r6] /* Wait until finished */
- tst r6, r7
- beq wait_busy
-
- mov r7, #48 /* Check error */
- tst r6, r7
- bne error
-
- mov r6, #0 /* Clear error */
-
- str r5, [r2, #4] /* Store rp */
-
- cmp r1, #0 /* Done? */
- beq done
- b wait_fifo
-
-error:
- mov r0, #0
- str r0, [r2, #4] /* set rp = 0 on error */
-
-done:
- mov r0, r6 /* Set result code */
- bkpt #0
-
- .align 2
-fstat:
- .word 0
-fccobix:
- .word 0
-fccobhi:
- .word 0
-fccoblo:
- .word 0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.inc
deleted file mode 100755
index 44a9d5e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.inc
+++ /dev/null
@@ -1,4 +0,0 @@
-/* Autogenerated with ../../../../src/helper/bin2char.sh */
-0x07,0x4b,0x7f,0x22,0x1d,0x78,0x5c,0x78,0x2a,0x40,0x06,0x4d,0x98,0x88,0xd9,0x88,
-0x5d,0x80,0x05,0x4d,0x5d,0x80,0x5c,0x70,0x98,0x80,0xd9,0x80,0x1a,0x70,0x00,0xbe,
-0x00,0x20,0x05,0x40,0xc5,0x20,0x00,0x00,0xd9,0x28,0x00,0x00,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.s
deleted file mode 100755
index 289662d..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.s
+++ /dev/null
@@ -1,47 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 by Ivan Meleca *
- * ivan@artekit.eu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
- .text
- .cpu cortex-m0plus
- .code 16
- .thumb_func
-
- .align 2
-
- ldr r3, wdog_cs1
- mov r2, #127
- ldrb r5, [r3]
- ldrb r4, [r3, #1]
- and r2, r5
- ldr r5, unlock1
- ldrh r0, [r3, #4]
- ldrh r1, [r3, #6]
- strh r5, [r3, #2]
- ldr r5, unlock2
- strh r5, [r3, #2]
- strb r4, [r3, #1]
- strh r0, [r3, #4]
- strh r1, [r3, #6]
- strb r2, [r3]
- bkpt #0
-
- .align 2
-
-wdog_cs1:
- .word 0x40052000 // Watchdog Control and Status Register 1
-unlock1:
- .word 0x20C5 // 1st unlock word
-unlock2:
- .word 0x28D9 // 2nd unlock word
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_erase.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_erase.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_erase.S
deleted file mode 100755
index 350aa93..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_erase.S
+++ /dev/null
@@ -1,176 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2012 by George Harris *
- * george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m3
- .thumb
- .thumb_func
-
-/*
- * Params :
- * r0 = start address, status (out)
- * r1 = count
- * r2 = erase command
- * r3 = block size
- */
-
-#define SSP_BASE_HIGH 0x4008
-#define SSP_BASE_LOW 0x3000
-#define SSP_CR0_OFFSET 0x00
-#define SSP_CR1_OFFSET 0x04
-#define SSP_DATA_OFFSET 0x08
-#define SSP_CPSR_OFFSET 0x10
-#define SSP_SR_OFFSET 0x0c
-
-#define SSP_CLOCK_BASE_HIGH 0x4005
-#define SSP_CLOCK_BASE_LOW 0x0000
-#define SSP_BRANCH_CLOCK_BASE_HIGH 0x4005
-#define SSP_BRANCH_CLOCK_BASE_LOW 0x2000
-#define SSP_BASE_CLOCK_OFFSET 0x94
-#define SSP_BRANCH_CLOCK_OFFSET 0x700
-
-#define IOCONFIG_BASE_HIGH 0x4008
-#define IOCONFIG_BASE_LOW 0x6000
-#define IOCONFIG_SCK_OFFSET 0x18c
-#define IOCONFIG_HOLD_OFFSET 0x190
-#define IOCONFIG_WP_OFFSET 0x194
-#define IOCONFIG_MISO_OFFSET 0x198
-#define IOCONFIG_MOSI_OFFSET 0x19c
-#define IOCONFIG_CS_OFFSET 0x1a0
-
-#define IO_BASE_HIGH 0x400f
-#define IO_BASE_LOW 0x4000
-#define IO_CS_OFFSET 0xab
-#define IODIR_BASE_HIGH 0x400f
-#define IODIR_BASE_LOW 0x6000
-#define IO_CS_DIR_OFFSET 0x14
-
-
-setup: /* Initialize SSP pins and module */
- mov.w r10, #IOCONFIG_BASE_LOW
- movt r10, #IOCONFIG_BASE_HIGH
- mov.w r8, #0xea
- str.w r8, [r10, #IOCONFIG_SCK_OFFSET] /* Configure SCK pin function */
- mov.w r8, #0x40
- str.w r8, [r10, #IOCONFIG_HOLD_OFFSET] /* Configure /HOLD pin function */
- mov.w r8, #0x40
- str.w r8, [r10, #IOCONFIG_WP_OFFSET] /* Configure /WP pin function */
- mov.w r8, #0xed
- str.w r8, [r10, #IOCONFIG_MISO_OFFSET] /* Configure MISO pin function */
- mov.w r8, #0xed
- str.w r8, [r10, #IOCONFIG_MOSI_OFFSET] /* Configure MOSI pin function */
- mov.w r8, #0x44
- str.w r8, [r10, #IOCONFIG_CS_OFFSET] /* Configure CS pin function */
-
- mov.w r10, #IODIR_BASE_LOW
- movt r10, #IODIR_BASE_HIGH
- mov.w r8, #0x800
- str r8, [r10, #IO_CS_DIR_OFFSET] /* Set CS as output */
- mov.w r10, #IO_BASE_LOW
- movt r10, #IO_BASE_HIGH
- mov.w r8, #0xff
- str.w r8, [r10, #IO_CS_OFFSET] /* Set CS high */
-
- mov.w r10, #SSP_CLOCK_BASE_LOW
- movt r10, #SSP_CLOCK_BASE_HIGH
- mov.w r8, #0x0000
- movt r8, #0x0100
- str.w r8, [r10, #SSP_BASE_CLOCK_OFFSET] /* Configure SSP0 base clock (use 12 MHz IRC) */
-
- mov.w r10, #SSP_BRANCH_CLOCK_BASE_LOW
- movt r10, #SSP_BRANCH_CLOCK_BASE_HIGH
- mov.w r8, #0x01
- str.w r8, [r10, #SSP_BRANCH_CLOCK_OFFSET] /* Configure (enable) SSP0 branch clock */
-
- mov.w r10, #SSP_BASE_LOW
- movt r10, #SSP_BASE_HIGH
- mov.w r8, #0x07
- str.w r8, [r10, #SSP_CR0_OFFSET] /* Set clock postscale */
- mov.w r8, #0x02
- str.w r8, [r10, #SSP_CPSR_OFFSET] /* Set clock prescale */
- str.w r8, [r10, #SSP_CR1_OFFSET] /* Enable SSP in SPI mode */
-write_enable:
- bl cs_down
- mov.w r9, #0x06 /* Send the write enable command */
- bl write_data
- bl cs_up
-
- bl cs_down
- mov.w r9, #0x05 /* Get status register */
- bl write_data
- mov.w r9, #0x00 /* Dummy data to clock in status */
- bl write_data
- bl cs_up
-
- tst r9, #0x02 /* If the WE bit isn't set, we have a problem. */
- beq error
-erase:
- bl cs_down
- mov.w r9, r2 /* Send the erase command */
- bl write_data
-write_address:
- lsr r9, r0, #16 /* Send the current 24-bit write address, MSB first */
- bl write_data
- lsr r9, r0, #8
- bl write_data
- mov.w r9, r0
- bl write_data
- bl cs_up
-wait_flash_busy: /* Wait for the flash to finish the previous erase */
- bl cs_down
- mov.w r9, #0x05 /* Get status register */
- bl write_data
- mov.w r9, #0x00 /* Dummy data to clock in status */
- bl write_data
- bl cs_up
- tst r9, #0x01 /* If it isn't done, keep waiting */
- bne wait_flash_busy
-
- subs r1, r1, #1 /* decrement count */
- cbz r1, exit /* Exit if we have written everything */
- add r0, r3 /* Move the address up by the block size */
- b write_enable /* Start a new block erase */
-write_data: /* Send/receive 1 byte of data over SSP */
- mov.w r10, #SSP_BASE_LOW
- movt r10, #SSP_BASE_HIGH
- str.w r9, [r10, #SSP_DATA_OFFSET] /* Write supplied data to the SSP data reg */
-wait_transmit:
- ldr r9, [r10, #SSP_SR_OFFSET] /* Check SSP status */
- tst r9, #0x0010 /* Check if BSY bit is set */
- bne wait_transmit /* If still transmitting, keep waiting */
- ldr r9, [r10, #SSP_DATA_OFFSET] /* Load received data */
- bx lr /* Exit subroutine */
-cs_up:
- mov.w r8, #0xff
- b cs_write
-cs_down:
- mov.w r8, #0x0000
-cs_write:
- mov.w r10, #IO_BASE_LOW
- movt r10, #IO_BASE_HIGH
- str.w r8, [r10, #IO_CS_OFFSET]
- bx lr
-error:
- movs r0, #0
-exit:
- bkpt #0x00
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_init.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_init.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_init.S
deleted file mode 100755
index 9872892..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_init.S
+++ /dev/null
@@ -1,102 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2012 by George Harris *
- * george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/***************************************************************************
-* This is an algorithm for the LPC43xx family (and probably the LPC18xx *
-* family as well, though they have not been tested) that will initialize *
-* memory-mapped SPI flash accesses. Unfortunately NXP has published *
-* neither the ROM source code that performs this initialization nor the *
-* register descriptions necessary to do so, so this code is necessary to *
-* call into the ROM SPIFI API. *
-***************************************************************************/
-
- .text
- .syntax unified
- .arch armv7-m
- .thumb
- .thumb_func
-
- .align 2
-
-/*
- * Params :
- * r0 = spifi clock speed
- */
-
-#define IOCONFIG_BASE_HIGH 0x4008
-#define IOCONFIG_BASE_LOW 0x6000
-#define IOCONFIG_SCK_OFFSET 0x18c
-#define IOCONFIG_HOLD_OFFSET 0x190
-#define IOCONFIG_WP_OFFSET 0x194
-#define IOCONFIG_MISO_OFFSET 0x198
-#define IOCONFIG_MOSI_OFFSET 0x19c
-#define IOCONFIG_CS_OFFSET 0x1a0
-
-#define SPIFI_ROM_TABLE_BASE_HIGH 0x1040
-#define SPIFI_ROM_TABLE_BASE_LOW 0x0118
-
-code:
- mov.w r8, r0
- sub sp, #0x84
- add r7, sp, #0x0
- /* Initialize SPIFI pins */
- mov.w r3, #IOCONFIG_BASE_LOW
- movt r3, #IOCONFIG_BASE_HIGH
- mov.w r2, #0xf3
- str.w r2, [r3, #IOCONFIG_SCK_OFFSET]
- mov.w r3, #IOCONFIG_BASE_LOW
- movt r3, #IOCONFIG_BASE_HIGH
- mov.w r2, #IOCONFIG_BASE_LOW
- movt r2, #IOCONFIG_BASE_HIGH
- mov.w r1, #IOCONFIG_BASE_LOW
- movt r1, #IOCONFIG_BASE_HIGH
- mov.w r0, #IOCONFIG_BASE_LOW
- movt r0, #IOCONFIG_BASE_HIGH
- mov.w r4, #0xd3
- str.w r4, [r0, #IOCONFIG_MOSI_OFFSET]
- mov r0, r4
- str.w r0, [r1, #IOCONFIG_MISO_OFFSET]
- mov r1, r0
- str.w r1, [r2, #IOCONFIG_WP_OFFSET]
- str.w r1, [r3, #IOCONFIG_HOLD_OFFSET]
- mov.w r3, #IOCONFIG_BASE_LOW
- movt r3, #IOCONFIG_BASE_HIGH
- mov.w r2, #0x13
- str.w r2, [r3, #IOCONFIG_CS_OFFSET]
-
- /* Perform SPIFI init. See spifi_rom_api.h (in NXP lpc43xx driver package) for details */
- /* on initialization arguments. */
- movw r3, #SPIFI_ROM_TABLE_BASE_LOW /* The ROM API table is located @ 0x10400118, and */
- movt r3, #SPIFI_ROM_TABLE_BASE_HIGH /* the first pointer in the struct is to the init function. */
- ldr r3, [r3, #0x0]
- ldr r4, [r3, #0x0] /* Grab the init function pointer from the table */
- /* Set up function arguments */
- movw r0, #0x3b4
- movt r0, #0x1000 /* Pointer to a SPIFI data struct that we don't care about */
- mov.w r1, #0x3 /* "csHigh". Not 100% sure what this does. */
- mov.w r2, #0xc0 /* The configuration word: S_RCVCLOCK | S_FULLCLK */
- mov.w r3, r8 /* SPIFI clock speed (12MHz) */
- blx r4 /* Call the init function */
- b done
-
-done:
- bkpt #0
-
- .end
[31/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91samd.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91samd.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91samd.c
deleted file mode 100755
index 62b3542..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91samd.c
+++ /dev/null
@@ -1,1116 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andrey Yurovsky *
- * Andrey Yurovsky <yu...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "helper/binarybuffer.h"
-
-#include <target/cortex_m.h>
-
-#define SAMD_NUM_SECTORS 16
-#define SAMD_PAGE_SIZE_MAX 1024
-
-#define SAMD_FLASH ((uint32_t)0x00000000) /* physical Flash memory */
-#define SAMD_USER_ROW ((uint32_t)0x00804000) /* User Row of Flash */
-#define SAMD_PAC1 0x41000000 /* Peripheral Access Control 1 */
-#define SAMD_DSU 0x41002000 /* Device Service Unit */
-#define SAMD_NVMCTRL 0x41004000 /* Non-volatile memory controller */
-
-#define SAMD_DSU_STATUSA 1 /* DSU status register */
-#define SAMD_DSU_DID 0x18 /* Device ID register */
-
-#define SAMD_NVMCTRL_CTRLA 0x00 /* NVM control A register */
-#define SAMD_NVMCTRL_CTRLB 0x04 /* NVM control B register */
-#define SAMD_NVMCTRL_PARAM 0x08 /* NVM parameters register */
-#define SAMD_NVMCTRL_INTFLAG 0x18 /* NVM Interupt Flag Status & Clear */
-#define SAMD_NVMCTRL_STATUS 0x18 /* NVM status register */
-#define SAMD_NVMCTRL_ADDR 0x1C /* NVM address register */
-#define SAMD_NVMCTRL_LOCK 0x20 /* NVM Lock section register */
-
-#define SAMD_CMDEX_KEY 0xA5UL
-#define SAMD_NVM_CMD(n) ((SAMD_CMDEX_KEY << 8) | (n & 0x7F))
-
-/* NVMCTRL commands. See Table 20-4 in 42129F\u2013SAM\u201310/2013 */
-#define SAMD_NVM_CMD_ER 0x02 /* Erase Row */
-#define SAMD_NVM_CMD_WP 0x04 /* Write Page */
-#define SAMD_NVM_CMD_EAR 0x05 /* Erase Auxilary Row */
-#define SAMD_NVM_CMD_WAP 0x06 /* Write Auxilary Page */
-#define SAMD_NVM_CMD_LR 0x40 /* Lock Region */
-#define SAMD_NVM_CMD_UR 0x41 /* Unlock Region */
-#define SAMD_NVM_CMD_SPRM 0x42 /* Set Power Reduction Mode */
-#define SAMD_NVM_CMD_CPRM 0x43 /* Clear Power Reduction Mode */
-#define SAMD_NVM_CMD_PBC 0x44 /* Page Buffer Clear */
-#define SAMD_NVM_CMD_SSB 0x45 /* Set Security Bit */
-#define SAMD_NVM_CMD_INVALL 0x46 /* Invalidate all caches */
-
-/* NVMCTRL bits */
-#define SAMD_NVM_CTRLB_MANW 0x80
-
-/* Known identifiers */
-#define SAMD_PROCESSOR_M0 0x01
-#define SAMD_FAMILY_D 0x00
-#define SAMD_FAMILY_L 0x01
-#define SAMD_FAMILY_C 0x02
-#define SAMD_SERIES_20 0x00
-#define SAMD_SERIES_21 0x01
-#define SAMD_SERIES_22 0x02
-#define SAMD_SERIES_10 0x02
-#define SAMD_SERIES_11 0x03
-
-/* Device ID macros */
-#define SAMD_GET_PROCESSOR(id) (id >> 28)
-#define SAMD_GET_FAMILY(id) (((id >> 23) & 0x1F))
-#define SAMD_GET_SERIES(id) (((id >> 16) & 0x3F))
-#define SAMD_GET_DEVSEL(id) (id & 0xFF)
-
-struct samd_part {
- uint8_t id;
- const char *name;
- uint32_t flash_kb;
- uint32_t ram_kb;
-};
-
-/* Known SAMD10 parts */
-static const struct samd_part samd10_parts[] = {
- { 0x0, "SAMD10D14AMU", 16, 4 },
- { 0x1, "SAMD10D13AMU", 8, 4 },
- { 0x2, "SAMD10D12AMU", 4, 4 },
- { 0x3, "SAMD10D14ASU", 16, 4 },
- { 0x4, "SAMD10D13ASU", 8, 4 },
- { 0x5, "SAMD10D12ASU", 4, 4 },
- { 0x6, "SAMD10C14A", 16, 4 },
- { 0x7, "SAMD10C13A", 8, 4 },
- { 0x8, "SAMD10C12A", 4, 4 },
-};
-
-/* Known SAMD11 parts */
-static const struct samd_part samd11_parts[] = {
- { 0x0, "SAMD11D14AMU", 16, 4 },
- { 0x1, "SAMD11D13AMU", 8, 4 },
- { 0x2, "SAMD11D12AMU", 4, 4 },
- { 0x3, "SAMD11D14ASU", 16, 4 },
- { 0x4, "SAMD11D13ASU", 8, 4 },
- { 0x5, "SAMD11D12ASU", 4, 4 },
- { 0x6, "SAMD11C14A", 16, 4 },
- { 0x7, "SAMD11C13A", 8, 4 },
- { 0x8, "SAMD11C12A", 4, 4 },
-};
-
-/* Known SAMD20 parts. See Table 12-8 in 42129F\u2013SAM\u201310/2013 */
-static const struct samd_part samd20_parts[] = {
- { 0x0, "SAMD20J18A", 256, 32 },
- { 0x1, "SAMD20J17A", 128, 16 },
- { 0x2, "SAMD20J16A", 64, 8 },
- { 0x3, "SAMD20J15A", 32, 4 },
- { 0x4, "SAMD20J14A", 16, 2 },
- { 0x5, "SAMD20G18A", 256, 32 },
- { 0x6, "SAMD20G17A", 128, 16 },
- { 0x7, "SAMD20G16A", 64, 8 },
- { 0x8, "SAMD20G15A", 32, 4 },
- { 0x9, "SAMD20G14A", 16, 2 },
- { 0xA, "SAMD20E18A", 256, 32 },
- { 0xB, "SAMD20E17A", 128, 16 },
- { 0xC, "SAMD20E16A", 64, 8 },
- { 0xD, "SAMD20E15A", 32, 4 },
- { 0xE, "SAMD20E14A", 16, 2 },
-};
-
-/* Known SAMD21 parts. */
-static const struct samd_part samd21_parts[] = {
- { 0x0, "SAMD21J18A", 256, 32 },
- { 0x1, "SAMD21J17A", 128, 16 },
- { 0x2, "SAMD21J16A", 64, 8 },
- { 0x3, "SAMD21J15A", 32, 4 },
- { 0x4, "SAMD21J14A", 16, 2 },
- { 0x5, "SAMD21G18A", 256, 32 },
- { 0x6, "SAMD21G17A", 128, 16 },
- { 0x7, "SAMD21G16A", 64, 8 },
- { 0x8, "SAMD21G15A", 32, 4 },
- { 0x9, "SAMD21G14A", 16, 2 },
- { 0xA, "SAMD21E18A", 256, 32 },
- { 0xB, "SAMD21E17A", 128, 16 },
- { 0xC, "SAMD21E16A", 64, 8 },
- { 0xD, "SAMD21E15A", 32, 4 },
- { 0xE, "SAMD21E14A", 16, 2 },
- /* Below are B Variants (Table 3-7 from rev I of datasheet) */
- { 0x20, "SAMD21J16B", 64, 8 },
- { 0x21, "SAMD21J15B", 32, 4 },
- { 0x23, "SAMD21G16B", 64, 8 },
- { 0x24, "SAMD21G15B", 32, 4 },
- { 0x26, "SAMD21E16B", 64, 8 },
- { 0x27, "SAMD21E15B", 32, 4 },
-};
-
-/* Known SAMR21 parts. */
-static const struct samd_part samr21_parts[] = {
- { 0x19, "SAMR21G18A", 256, 32 },
- { 0x1A, "SAMR21G17A", 128, 32 },
- { 0x1B, "SAMR21G16A", 64, 32 },
- { 0x1C, "SAMR21E18A", 256, 32 },
- { 0x1D, "SAMR21E17A", 128, 32 },
- { 0x1E, "SAMR21E16A", 64, 32 },
-};
-
-/* Known SAML21 parts. */
-static const struct samd_part saml21_parts[] = {
- { 0x00, "SAML21J18A", 256, 32 },
- { 0x01, "SAML21J17A", 128, 16 },
- { 0x02, "SAML21J16A", 64, 8 },
- { 0x05, "SAML21G18A", 256, 32 },
- { 0x06, "SAML21G17A", 128, 16 },
- { 0x07, "SAML21G16A", 64, 8 },
- { 0x0A, "SAML21E18A", 256, 32 },
- { 0x0B, "SAML21E17A", 128, 16 },
- { 0x0C, "SAML21E16A", 64, 8 },
- { 0x0D, "SAML21E15A", 32, 4 },
- { 0x0F, "SAML21J18B", 256, 32 },
- { 0x10, "SAML21J17B", 128, 16 },
- { 0x11, "SAML21J16B", 64, 8 },
- { 0x14, "SAML21G18B", 256, 32 },
- { 0x15, "SAML21G17B", 128, 16 },
- { 0x16, "SAML21G16B", 64, 8 },
- { 0x19, "SAML21E18B", 256, 32 },
- { 0x1A, "SAML21E17B", 128, 16 },
- { 0x1B, "SAML21E16B", 64, 8 },
- { 0x1C, "SAML21E15B", 32, 4 },
-};
-
-/* Known SAML22 parts. */
-static const struct samd_part saml22_parts[] = {
- { 0x00, "SAML22N18A", 256, 32 },
- { 0x01, "SAML22N17A", 128, 16 },
- { 0x02, "SAML22N16A", 64, 8 },
- { 0x05, "SAML22J18A", 256, 32 },
- { 0x06, "SAML22J17A", 128, 16 },
- { 0x07, "SAML22J16A", 64, 8 },
- { 0x0A, "SAML22G18A", 256, 32 },
- { 0x0B, "SAML22G17A", 128, 16 },
- { 0x0C, "SAML22G16A", 64, 8 },
-};
-
-/* Known SAMC20 parts. */
-static const struct samd_part samc20_parts[] = {
- { 0x00, "SAMC20J18A", 256, 32 },
- { 0x01, "SAMC20J17A", 128, 16 },
- { 0x02, "SAMC20J16A", 64, 8 },
- { 0x03, "SAMC20J15A", 32, 4 },
- { 0x05, "SAMC20G18A", 256, 32 },
- { 0x06, "SAMC20G17A", 128, 16 },
- { 0x07, "SAMC20G16A", 64, 8 },
- { 0x08, "SAMC20G15A", 32, 4 },
- { 0x0A, "SAMC20E18A", 256, 32 },
- { 0x0B, "SAMC20E17A", 128, 16 },
- { 0x0C, "SAMC20E16A", 64, 8 },
- { 0x0D, "SAMC20E15A", 32, 4 },
-};
-
-/* Known SAMC21 parts. */
-static const struct samd_part samc21_parts[] = {
- { 0x00, "SAMC21J18A", 256, 32 },
- { 0x01, "SAMC21J17A", 128, 16 },
- { 0x02, "SAMC21J16A", 64, 8 },
- { 0x03, "SAMC21J15A", 32, 4 },
- { 0x05, "SAMC21G18A", 256, 32 },
- { 0x06, "SAMC21G17A", 128, 16 },
- { 0x07, "SAMC21G16A", 64, 8 },
- { 0x08, "SAMC21G15A", 32, 4 },
- { 0x0A, "SAMC21E18A", 256, 32 },
- { 0x0B, "SAMC21E17A", 128, 16 },
- { 0x0C, "SAMC21E16A", 64, 8 },
- { 0x0D, "SAMC21E15A", 32, 4 },
-};
-
-/* Each family of parts contains a parts table in the DEVSEL field of DID. The
- * processor ID, family ID, and series ID are used to determine which exact
- * family this is and then we can use the corresponding table. */
-struct samd_family {
- uint8_t processor;
- uint8_t family;
- uint8_t series;
- const struct samd_part *parts;
- size_t num_parts;
-};
-
-/* Known SAMD families */
-static const struct samd_family samd_families[] = {
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_20,
- samd20_parts, ARRAY_SIZE(samd20_parts) },
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_21,
- samd21_parts, ARRAY_SIZE(samd21_parts) },
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_21,
- samr21_parts, ARRAY_SIZE(samr21_parts) },
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_10,
- samd10_parts, ARRAY_SIZE(samd10_parts) },
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_D, SAMD_SERIES_11,
- samd11_parts, ARRAY_SIZE(samd11_parts) },
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_L, SAMD_SERIES_21,
- saml21_parts, ARRAY_SIZE(saml21_parts) },
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_L, SAMD_SERIES_22,
- saml22_parts, ARRAY_SIZE(saml22_parts) },
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_C, SAMD_SERIES_20,
- samc20_parts, ARRAY_SIZE(samc20_parts) },
- { SAMD_PROCESSOR_M0, SAMD_FAMILY_C, SAMD_SERIES_21,
- samc21_parts, ARRAY_SIZE(samc21_parts) },
-};
-
-struct samd_info {
- uint32_t page_size;
- int num_pages;
- int sector_size;
-
- bool probed;
- struct target *target;
- struct samd_info *next;
-};
-
-static struct samd_info *samd_chips;
-
-
-
-static const struct samd_part *samd_find_part(uint32_t id)
-{
- uint8_t processor = SAMD_GET_PROCESSOR(id);
- uint8_t family = SAMD_GET_FAMILY(id);
- uint8_t series = SAMD_GET_SERIES(id);
- uint8_t devsel = SAMD_GET_DEVSEL(id);
-
- for (unsigned i = 0; i < ARRAY_SIZE(samd_families); i++) {
- if (samd_families[i].processor == processor &&
- samd_families[i].series == series &&
- samd_families[i].family == family) {
- for (unsigned j = 0; j < samd_families[i].num_parts; j++) {
- if (samd_families[i].parts[j].id == devsel)
- return &samd_families[i].parts[j];
- }
- }
- }
-
- return NULL;
-}
-
-static int samd_protect_check(struct flash_bank *bank)
-{
- int res;
- uint16_t lock;
-
- res = target_read_u16(bank->target,
- SAMD_NVMCTRL + SAMD_NVMCTRL_LOCK, &lock);
- if (res != ERROR_OK)
- return res;
-
- /* Lock bits are active-low */
- for (int i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_protected = !(lock & (1<<i));
-
- return ERROR_OK;
-}
-
-static int samd_get_flash_page_info(struct target *target,
- uint32_t *sizep, int *nump)
-{
- int res;
- uint32_t param;
-
- res = target_read_u32(target, SAMD_NVMCTRL + SAMD_NVMCTRL_PARAM, ¶m);
- if (res == ERROR_OK) {
- /* The PSZ field (bits 18:16) indicate the page size bytes as 2^(3+n)
- * so 0 is 8KB and 7 is 1024KB. */
- if (sizep)
- *sizep = (8 << ((param >> 16) & 0x7));
- /* The NVMP field (bits 15:0) indicates the total number of pages */
- if (nump)
- *nump = param & 0xFFFF;
- } else {
- LOG_ERROR("Couldn't read NVM Parameters register");
- }
-
- return res;
-}
-
-static int samd_probe(struct flash_bank *bank)
-{
- uint32_t id;
- int res;
- struct samd_info *chip = (struct samd_info *)bank->driver_priv;
- const struct samd_part *part;
-
- if (chip->probed)
- return ERROR_OK;
-
- res = target_read_u32(bank->target, SAMD_DSU + SAMD_DSU_DID, &id);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read Device ID register");
- return res;
- }
-
- part = samd_find_part(id);
- if (part == NULL) {
- LOG_ERROR("Couldn't find part corresponding to DID %08" PRIx32, id);
- return ERROR_FAIL;
- }
-
- bank->size = part->flash_kb * 1024;
-
- chip->sector_size = bank->size / SAMD_NUM_SECTORS;
-
- res = samd_get_flash_page_info(bank->target, &chip->page_size,
- &chip->num_pages);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't determine Flash page size");
- return res;
- }
-
- /* Sanity check: the total flash size in the DSU should match the page size
- * multiplied by the number of pages. */
- if (bank->size != chip->num_pages * chip->page_size) {
- LOG_WARNING("SAMD: bank size doesn't match NVM parameters. "
- "Identified %" PRIu32 "KB Flash but NVMCTRL reports %u %" PRIu32 "B pages",
- part->flash_kb, chip->num_pages, chip->page_size);
- }
-
- /* Allocate the sector table */
- bank->num_sectors = SAMD_NUM_SECTORS;
- bank->sectors = calloc(bank->num_sectors, sizeof((bank->sectors)[0]));
- if (!bank->sectors)
- return ERROR_FAIL;
-
- /* Fill out the sector information: all SAMD sectors are the same size and
- * there is always a fixed number of them. */
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].size = chip->sector_size;
- bank->sectors[i].offset = i * chip->sector_size;
- /* mark as unknown */
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- samd_protect_check(bank);
-
- /* Done */
- chip->probed = true;
-
- LOG_INFO("SAMD MCU: %s (%" PRIu32 "KB Flash, %" PRIu32 "KB RAM)", part->name,
- part->flash_kb, part->ram_kb);
-
- return ERROR_OK;
-}
-
-static bool samd_check_error(struct target *target)
-{
- int ret;
- bool error;
- uint16_t status;
-
- ret = target_read_u16(target,
- SAMD_NVMCTRL + SAMD_NVMCTRL_STATUS, &status);
- if (ret != ERROR_OK) {
- LOG_ERROR("Can't read NVM status");
- return true;
- }
-
- if (status & 0x001C) {
- if (status & (1 << 4)) /* NVME */
- LOG_ERROR("SAMD: NVM Error");
- if (status & (1 << 3)) /* LOCKE */
- LOG_ERROR("SAMD: NVM lock error");
- if (status & (1 << 2)) /* PROGE */
- LOG_ERROR("SAMD: NVM programming error");
-
- error = true;
- } else {
- error = false;
- }
-
- /* Clear the error conditions by writing a one to them */
- ret = target_write_u16(target,
- SAMD_NVMCTRL + SAMD_NVMCTRL_STATUS, status);
- if (ret != ERROR_OK)
- LOG_ERROR("Can't clear NVM error conditions");
-
- return error;
-}
-
-static int samd_issue_nvmctrl_command(struct target *target, uint16_t cmd)
-{
- int res;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Issue the NVM command */
- res = target_write_u16(target,
- SAMD_NVMCTRL + SAMD_NVMCTRL_CTRLA, SAMD_NVM_CMD(cmd));
- if (res != ERROR_OK)
- return res;
-
- /* Check to see if the NVM command resulted in an error condition. */
- if (samd_check_error(target))
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-static int samd_erase_row(struct target *target, uint32_t address)
-{
- int res;
-
- /* Set an address contained in the row to be erased */
- res = target_write_u32(target,
- SAMD_NVMCTRL + SAMD_NVMCTRL_ADDR, address >> 1);
-
- /* Issue the Erase Row command to erase that row. */
- if (res == ERROR_OK)
- res = samd_issue_nvmctrl_command(target,
- address == SAMD_USER_ROW ? SAMD_NVM_CMD_EAR : SAMD_NVM_CMD_ER);
-
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to erase row containing %08" PRIx32, address);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static bool is_user_row_reserved_bit(uint8_t bit)
-{
- /* See Table 9-3 in the SAMD20 datasheet for more information. */
- switch (bit) {
- /* Reserved bits */
- case 3:
- case 7:
- /* Voltage regulator internal configuration with default value of 0x70,
- * may not be changed. */
- case 17 ... 24:
- /* 41 is voltage regulator internal configuration and must not be
- * changed. 42 through 47 are reserved. */
- case 41 ... 47:
- return true;
- default:
- break;
- }
-
- return false;
-}
-
-/* Modify the contents of the User Row in Flash. These are described in Table
- * 9-3 of the SAMD20 datasheet. The User Row itself has a size of one page
- * and contains a combination of "fuses" and calibration data in bits 24:17.
- * We therefore try not to erase the row's contents unless we absolutely have
- * to and we don't permit modifying reserved bits. */
-static int samd_modify_user_row(struct target *target, uint32_t value,
- uint8_t startb, uint8_t endb)
-{
- int res;
-
- if (is_user_row_reserved_bit(startb) || is_user_row_reserved_bit(endb)) {
- LOG_ERROR("Can't modify bits in the requested range");
- return ERROR_FAIL;
- }
-
- /* Retrieve the MCU's page size, in bytes. This is also the size of the
- * entire User Row. */
- uint32_t page_size;
- res = samd_get_flash_page_info(target, &page_size, NULL);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't determine Flash page size");
- return res;
- }
-
- /* Make sure the size is sane before we allocate. */
- assert(page_size > 0 && page_size <= SAMD_PAGE_SIZE_MAX);
-
- /* Make sure we're within the single page that comprises the User Row. */
- if (startb >= (page_size * 8) || endb >= (page_size * 8)) {
- LOG_ERROR("Can't modify bits outside the User Row page range");
- return ERROR_FAIL;
- }
-
- uint8_t *buf = malloc(page_size);
- if (!buf)
- return ERROR_FAIL;
-
- /* Read the user row (comprising one page) by half-words. */
- res = target_read_memory(target, SAMD_USER_ROW, 2, page_size / 2, buf);
- if (res != ERROR_OK)
- goto out_user_row;
-
- /* We will need to erase before writing if the new value needs a '1' in any
- * position for which the current value had a '0'. Otherwise we can avoid
- * erasing. */
- uint32_t cur = buf_get_u32(buf, startb, endb - startb + 1);
- if ((~cur) & value) {
- res = samd_erase_row(target, SAMD_USER_ROW);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't erase user row");
- goto out_user_row;
- }
- }
-
- /* Modify */
- buf_set_u32(buf, startb, endb - startb + 1, value);
-
- /* Write the page buffer back out to the target. A Flash write will be
- * triggered automatically. */
- res = target_write_memory(target, SAMD_USER_ROW, 4, page_size / 4, buf);
- if (res != ERROR_OK)
- goto out_user_row;
-
- if (samd_check_error(target)) {
- res = ERROR_FAIL;
- goto out_user_row;
- }
-
- /* Success */
- res = ERROR_OK;
-
-out_user_row:
- free(buf);
-
- return res;
-}
-
-static int samd_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct samd_info *chip = (struct samd_info *)bank->driver_priv;
-
- /* We can issue lock/unlock region commands with the target running but
- * the settings won't persist unless we're able to modify the LOCK regions
- * and that requires the target to be halted. */
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int res = ERROR_OK;
-
- for (int s = first; s <= last; s++) {
- if (set != bank->sectors[s].is_protected) {
- /* Load an address that is within this sector (we use offset 0) */
- res = target_write_u32(bank->target,
- SAMD_NVMCTRL + SAMD_NVMCTRL_ADDR,
- ((s * chip->sector_size) >> 1));
- if (res != ERROR_OK)
- goto exit;
-
- /* Tell the controller to lock that sector */
- res = samd_issue_nvmctrl_command(bank->target,
- set ? SAMD_NVM_CMD_LR : SAMD_NVM_CMD_UR);
- if (res != ERROR_OK)
- goto exit;
- }
- }
-
- /* We've now applied our changes, however they will be undone by the next
- * reset unless we also apply them to the LOCK bits in the User Page. The
- * LOCK bits start at bit 48, corresponding to Sector 0 and end with bit 63,
- * corresponding to Sector 15. A '1' means unlocked and a '0' means
- * locked. See Table 9-3 in the SAMD20 datasheet for more details. */
-
- res = samd_modify_user_row(bank->target, set ? 0x0000 : 0xFFFF,
- 48 + first, 48 + last);
- if (res != ERROR_OK)
- LOG_WARNING("SAMD: protect settings were not made persistent!");
-
- res = ERROR_OK;
-
-exit:
- samd_protect_check(bank);
-
- return res;
-}
-
-static int samd_erase(struct flash_bank *bank, int first, int last)
-{
- int res;
- int rows_in_sector;
- struct samd_info *chip = (struct samd_info *)bank->driver_priv;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
-
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!chip->probed) {
- if (samd_probe(bank) != ERROR_OK)
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- /* The SAMD NVM has row erase granularity. There are four pages in a row
- * and the number of rows in a sector depends on the sector size, which in
- * turn depends on the Flash capacity as there is a fixed number of
- * sectors. */
- rows_in_sector = chip->sector_size / (chip->page_size * 4);
-
- /* For each sector to be erased */
- for (int s = first; s <= last; s++) {
- if (bank->sectors[s].is_protected) {
- LOG_ERROR("SAMD: failed to erase sector %d. That sector is write-protected", s);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* For each row in that sector */
- for (int r = s * rows_in_sector; r < (s + 1) * rows_in_sector; r++) {
- res = samd_erase_row(bank->target, r * chip->page_size * 4);
- if (res != ERROR_OK) {
- LOG_ERROR("SAMD: failed to erase sector %d", s);
- return res;
- }
- }
- }
-
- return ERROR_OK;
-}
-
-
-static int samd_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- int res;
- uint32_t nvm_ctrlb;
- uint32_t address;
- uint32_t pg_offset;
- uint32_t nb;
- uint32_t nw;
- struct samd_info *chip = (struct samd_info *)bank->driver_priv;
- uint8_t *pb = NULL;
- bool manual_wp;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!chip->probed) {
- if (samd_probe(bank) != ERROR_OK)
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- /* Check if we need to do manual page write commands */
- res = target_read_u32(bank->target, SAMD_NVMCTRL + SAMD_NVMCTRL_CTRLB, &nvm_ctrlb);
-
- if (res != ERROR_OK)
- return res;
-
- if (nvm_ctrlb & SAMD_NVM_CTRLB_MANW)
- manual_wp = true;
- else
- manual_wp = false;
-
- res = samd_issue_nvmctrl_command(bank->target, SAMD_NVM_CMD_PBC);
- if (res != ERROR_OK) {
- LOG_ERROR("%s: %d", __func__, __LINE__);
- return res;
- }
-
- while (count) {
- nb = chip->page_size - offset % chip->page_size;
- if (count < nb)
- nb = count;
-
- address = bank->base + offset;
- pg_offset = offset % chip->page_size;
-
- if (offset % 4 || (offset + nb) % 4) {
- /* Either start or end of write is not word aligned */
- if (!pb) {
- pb = malloc(chip->page_size);
- if (!pb)
- return ERROR_FAIL;
- }
-
- /* Set temporary page buffer to 0xff and overwrite the relevant part */
- memset(pb, 0xff, chip->page_size);
- memcpy(pb + pg_offset, buffer, nb);
-
- /* Align start address to a word boundary */
- address -= offset % 4;
- pg_offset -= offset % 4;
- assert(pg_offset % 4 == 0);
-
- /* Extend length to whole words */
- nw = (nb + offset % 4 + 3) / 4;
- assert(pg_offset + 4 * nw <= chip->page_size);
-
- /* Now we have original data extended by 0xff bytes
- * to the nearest word boundary on both start and end */
- res = target_write_memory(bank->target, address, 4, nw, pb + pg_offset);
- } else {
- assert(nb % 4 == 0);
- nw = nb / 4;
- assert(pg_offset + 4 * nw <= chip->page_size);
-
- /* Word aligned data, use direct write from buffer */
- res = target_write_memory(bank->target, address, 4, nw, buffer);
- }
- if (res != ERROR_OK) {
- LOG_ERROR("%s: %d", __func__, __LINE__);
- goto free_pb;
- }
-
- /* Devices with errata 13134 have automatic page write enabled by default
- * For other devices issue a write page CMD to the NVM
- * If the page has not been written up to the last word
- * then issue CMD_WP always */
- if (manual_wp || pg_offset + 4 * nw < chip->page_size) {
- res = samd_issue_nvmctrl_command(bank->target, SAMD_NVM_CMD_WP);
- if (res != ERROR_OK) {
- LOG_ERROR("%s: %d", __func__, __LINE__);
- goto free_pb;
- }
- }
-
- /* Access through AHB is stalled while flash is being programmed */
- usleep(200);
-
- if (samd_check_error(bank->target)) {
- LOG_ERROR("%s: write failed at address 0x%08" PRIx32, __func__, address);
- res = ERROR_FAIL;
- goto free_pb;
- }
-
- /* We're done with the page contents */
- count -= nb;
- offset += nb;
- buffer += nb;
- }
-
-free_pb:
- if (pb)
- free(pb);
-
- return res;
-}
-
-FLASH_BANK_COMMAND_HANDLER(samd_flash_bank_command)
-{
- struct samd_info *chip = samd_chips;
-
- while (chip) {
- if (chip->target == bank->target)
- break;
- chip = chip->next;
- }
-
- if (!chip) {
- /* Create a new chip */
- chip = calloc(1, sizeof(*chip));
- if (!chip)
- return ERROR_FAIL;
-
- chip->target = bank->target;
- chip->probed = false;
-
- bank->driver_priv = chip;
-
- /* Insert it into the chips list (at head) */
- chip->next = samd_chips;
- samd_chips = chip;
- }
-
- if (bank->base != SAMD_FLASH) {
- LOG_ERROR("Address 0x%08" PRIx32 " invalid bank address (try 0x%08" PRIx32
- "[at91samd series] )",
- bank->base, SAMD_FLASH);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(samd_handle_info_command)
-{
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(samd_handle_chip_erase_command)
-{
- struct target *target = get_current_target(CMD_CTX);
-
- if (target) {
- /* Enable access to the DSU by disabling the write protect bit */
- target_write_u32(target, SAMD_PAC1, (1<<1));
- /* Tell the DSU to perform a full chip erase. It takes about 240ms to
- * perform the erase. */
- target_write_u8(target, SAMD_DSU, (1<<4));
-
- command_print(CMD_CTX, "chip erased");
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(samd_handle_set_security_command)
-{
- int res = ERROR_OK;
- struct target *target = get_current_target(CMD_CTX);
-
- if (CMD_ARGC < 1 || (CMD_ARGC >= 1 && (strcmp(CMD_ARGV[0], "enable")))) {
- command_print(CMD_CTX, "supply the \"enable\" argument to proceed.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (target) {
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- res = samd_issue_nvmctrl_command(target, SAMD_NVM_CMD_SSB);
-
- /* Check (and clear) error conditions */
- if (res == ERROR_OK)
- command_print(CMD_CTX, "chip secured on next power-cycle");
- else
- command_print(CMD_CTX, "failed to secure chip");
- }
-
- return res;
-}
-
-COMMAND_HANDLER(samd_handle_eeprom_command)
-{
- int res = ERROR_OK;
- struct target *target = get_current_target(CMD_CTX);
-
- if (target) {
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (CMD_ARGC >= 1) {
- int val = atoi(CMD_ARGV[0]);
- uint32_t code;
-
- if (val == 0)
- code = 7;
- else {
- /* Try to match size in bytes with corresponding size code */
- for (code = 0; code <= 6; code++) {
- if (val == (2 << (13 - code)))
- break;
- }
-
- if (code > 6) {
- command_print(CMD_CTX, "Invalid EEPROM size. Please see "
- "datasheet for a list valid sizes.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- }
-
- res = samd_modify_user_row(target, code, 4, 6);
- } else {
- uint16_t val;
- res = target_read_u16(target, SAMD_USER_ROW, &val);
- if (res == ERROR_OK) {
- uint32_t size = ((val >> 4) & 0x7); /* grab size code */
-
- if (size == 0x7)
- command_print(CMD_CTX, "EEPROM is disabled");
- else {
- /* Otherwise, 6 is 256B, 0 is 16KB */
- command_print(CMD_CTX, "EEPROM size is %u bytes",
- (2 << (13 - size)));
- }
- }
- }
- }
-
- return res;
-}
-
-COMMAND_HANDLER(samd_handle_bootloader_command)
-{
- int res = ERROR_OK;
- struct target *target = get_current_target(CMD_CTX);
-
- if (target) {
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Retrieve the MCU's page size, in bytes. */
- uint32_t page_size;
- res = samd_get_flash_page_info(target, &page_size, NULL);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't determine Flash page size");
- return res;
- }
-
- if (CMD_ARGC >= 1) {
- int val = atoi(CMD_ARGV[0]);
- uint32_t code;
-
- if (val == 0)
- code = 7;
- else {
- /* Try to match size in bytes with corresponding size code */
- for (code = 0; code <= 6; code++) {
- if ((unsigned int)val == (2UL << (8UL - code)) * page_size)
- break;
- }
-
- if (code > 6) {
- command_print(CMD_CTX, "Invalid bootloader size. Please "
- "see datasheet for a list valid sizes.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- }
-
- res = samd_modify_user_row(target, code, 0, 2);
- } else {
- uint16_t val;
- res = target_read_u16(target, SAMD_USER_ROW, &val);
- if (res == ERROR_OK) {
- uint32_t size = (val & 0x7); /* grab size code */
- uint32_t nb;
-
- if (size == 0x7)
- nb = 0;
- else
- nb = (2 << (8 - size)) * page_size;
-
- /* There are 4 pages per row */
- command_print(CMD_CTX, "Bootloader size is %" PRIu32 " bytes (%" PRIu32 " rows)",
- nb, (uint32_t)(nb / (page_size * 4)));
- }
- }
- }
-
- return res;
-}
-
-
-
-COMMAND_HANDLER(samd_handle_reset_deassert)
-{
- struct target *target = get_current_target(CMD_CTX);
- struct armv7m_common *armv7m = target_to_armv7m(target);
- int retval = ERROR_OK;
- enum reset_types jtag_reset_config = jtag_get_reset_config();
-
- /* In case of sysresetreq, debug retains state set in cortex_m_assert_reset()
- * so we just release reset held by DSU
- *
- * n_RESET (srst) clears the DP, so reenable debug and set vector catch here
- *
- * After vectreset DSU release is not needed however makes no harm
- */
- if (target->reset_halt && (jtag_reset_config & RESET_HAS_SRST)) {
- retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
- if (retval == ERROR_OK)
- retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DEMCR,
- TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
- /* do not return on error here, releasing DSU reset is more important */
- }
-
- /* clear CPU Reset Phase Extension bit */
- int retval2 = target_write_u8(target, SAMD_DSU + SAMD_DSU_STATUSA, (1<<1));
- if (retval2 != ERROR_OK)
- return retval2;
-
- return retval;
-}
-
-static const struct command_registration at91samd_exec_command_handlers[] = {
- {
- .name = "dsu_reset_deassert",
- .handler = samd_handle_reset_deassert,
- .mode = COMMAND_EXEC,
- .help = "deasert internal reset held by DSU"
- },
- {
- .name = "info",
- .handler = samd_handle_info_command,
- .mode = COMMAND_EXEC,
- .help = "Print information about the current at91samd chip"
- "and its flash configuration.",
- },
- {
- .name = "chip-erase",
- .handler = samd_handle_chip_erase_command,
- .mode = COMMAND_EXEC,
- .help = "Erase the entire Flash by using the Chip"
- "Erase feature in the Device Service Unit (DSU).",
- },
- {
- .name = "set-security",
- .handler = samd_handle_set_security_command,
- .mode = COMMAND_EXEC,
- .help = "Secure the chip's Flash by setting the Security Bit."
- "This makes it impossible to read the Flash contents."
- "The only way to undo this is to issue the chip-erase"
- "command.",
- },
- {
- .name = "eeprom",
- .usage = "[size_in_bytes]",
- .handler = samd_handle_eeprom_command,
- .mode = COMMAND_EXEC,
- .help = "Show or set the EEPROM size setting, stored in the User Row."
- "Please see Table 20-3 of the SAMD20 datasheet for allowed values."
- "Changes are stored immediately but take affect after the MCU is"
- "reset.",
- },
- {
- .name = "bootloader",
- .usage = "[size_in_bytes]",
- .handler = samd_handle_bootloader_command,
- .mode = COMMAND_EXEC,
- .help = "Show or set the bootloader size, stored in the User Row."
- "Please see Table 20-2 of the SAMD20 datasheet for allowed values."
- "Changes are stored immediately but take affect after the MCU is"
- "reset.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration at91samd_command_handlers[] = {
- {
- .name = "at91samd",
- .mode = COMMAND_ANY,
- .help = "at91samd flash command group",
- .usage = "",
- .chain = at91samd_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver at91samd_flash = {
- .name = "at91samd",
- .commands = at91samd_command_handlers,
- .flash_bank_command = samd_flash_bank_command,
- .erase = samd_erase,
- .protect = samd_protect,
- .write = samd_write,
- .read = default_flash_read,
- .probe = samd_probe,
- .auto_probe = samd_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = samd_protect_check,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/atsamv.c
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/atsamv.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/atsamv.c
deleted file mode 100755
index 08f8bb8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/atsamv.c
+++ /dev/null
@@ -1,737 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Duane Ellis *
- * openocd@duaneellis.com *
- * *
- * Copyright (C) 2010 by Olaf L�ke (at91sam3s* support) *
- * olaf@uni-paderborn.de *
- * *
- * Copyright (C) 2011 by Olivier Schonken, Jim Norris *
- * (at91sam3x* & at91sam4 support)* *
- * *
- * Copyright (C) 2015 Morgan Quigley *
- * (atsamv, atsams, and atsame support) *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the *
- * GNU General public License for more details. *
- * *
- ***************************************************************************/
-
-/* Some of the the lower level code was based on code supplied by
- * ATMEL under this copyright. */
-
-/* BEGIN ATMEL COPYRIGHT */
-/* ----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support
- * ----------------------------------------------------------------------------
- * Copyright (c) 2009, Atmel Corporation
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaimer below.
- *
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
- */
-/* END ATMEL COPYRIGHT */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/time_support.h>
-
-#define REG_NAME_WIDTH (12)
-
-#define SAMV_EFC_FCMD_GETD (0x0) /* (EFC) Get Flash Descriptor */
-#define SAMV_EFC_FCMD_WP (0x1) /* (EFC) Write Page */
-#define SAMV_EFC_FCMD_WPL (0x2) /* (EFC) Write Page and Lock */
-#define SAMV_EFC_FCMD_EWP (0x3) /* (EFC) Erase Page and Write Page */
-#define SAMV_EFC_FCMD_EWPL (0x4) /* (EFC) Erase Page, Write Page then Lock*/
-#define SAMV_EFC_FCMD_EA (0x5) /* (EFC) Erase All */
-#define SAMV_EFC_FCMD_EPA (0x7) /* (EFC) Erase pages */
-#define SAMV_EFC_FCMD_SLB (0x8) /* (EFC) Set Lock Bit */
-#define SAMV_EFC_FCMD_CLB (0x9) /* (EFC) Clear Lock Bit */
-#define SAMV_EFC_FCMD_GLB (0xA) /* (EFC) Get Lock Bit */
-#define SAMV_EFC_FCMD_SFB (0xB) /* (EFC) Set Fuse Bit */
-#define SAMV_EFC_FCMD_CFB (0xC) /* (EFC) Clear Fuse Bit */
-#define SAMV_EFC_FCMD_GFB (0xD) /* (EFC) Get Fuse Bit */
-
-#define OFFSET_EFC_FMR 0
-#define OFFSET_EFC_FCR 4
-#define OFFSET_EFC_FSR 8
-#define OFFSET_EFC_FRR 12
-
-#define SAMV_CHIPID_CIDR (0x400E0940)
-#define SAMV_NUM_GPNVM_BITS 9
-#define SAMV_CONTROLLER_ADDR (0x400e0c00)
-#define SAMV_SECTOR_SIZE 16384
-#define SAMV_PAGE_SIZE 512
-#define SAMV_FLASH_BASE 0x00400000
-
-extern struct flash_driver atsamv_flash;
-
-struct samv_flash_bank {
- int probed;
- unsigned size_bytes;
- unsigned gpnvm[SAMV_NUM_GPNVM_BITS];
-};
-
-/* The actual sector size of the SAMV7 flash memory is 128K bytes.
- * 16 sectors for a 2048KB device. The lock regions are 16KB per lock
- * region, with a 2048KB device having 128 lock regions.
- * For the best results, num_sectors is thus set to the number of lock
- * regions, and the sector_size set to the lock region size. Page
- * erases are used to erase 16KB sections when programming */
-
-static int samv_efc_get_status(struct target *target, uint32_t *v)
-{
- int r = target_read_u32(target, SAMV_CONTROLLER_ADDR + OFFSET_EFC_FSR, v);
- return r;
-}
-
-static int samv_efc_get_result(struct target *target, uint32_t *v)
-{
- uint32_t rv;
- int r = target_read_u32(target, SAMV_CONTROLLER_ADDR + OFFSET_EFC_FRR, &rv);
- if (v)
- *v = rv;
- return r;
-}
-
-static int samv_efc_start_command(struct target *target,
- unsigned command, unsigned argument)
-{
- uint32_t v;
- samv_efc_get_status(target, &v);
- if (!(v & 1)) {
- LOG_ERROR("flash controller is not ready");
- return ERROR_FAIL;
- }
-
- v = (0x5A << 24) | (argument << 8) | command;
- LOG_DEBUG("starting flash command: 0x%08x", (unsigned int)(v));
- int r = target_write_u32(target, SAMV_CONTROLLER_ADDR + OFFSET_EFC_FCR, v);
- if (r != ERROR_OK)
- LOG_DEBUG("write failed");
- return r;
-}
-
-static int samv_efc_perform_command(struct target *target,
- unsigned command, unsigned argument, uint32_t *status)
-{
- int r;
- uint32_t v;
- long long ms_now, ms_end;
-
- if (status)
- *status = 0;
-
- r = samv_efc_start_command(target, command, argument);
- if (r != ERROR_OK)
- return r;
-
- ms_end = 10000 + timeval_ms();
-
- do {
- r = samv_efc_get_status(target, &v);
- if (r != ERROR_OK)
- return r;
- ms_now = timeval_ms();
- if (ms_now > ms_end) {
- /* error */
- LOG_ERROR("Command timeout");
- return ERROR_FAIL;
- }
- } while ((v & 1) == 0);
-
- /* if requested, copy the flash controller error bits back to the caller */
- if (status)
- *status = (v & 0x6);
- return ERROR_OK;
-}
-
-static int samv_erase_pages(struct target *target,
- int first_page, int num_pages, uint32_t *status)
-{
- uint8_t erase_pages;
- switch (num_pages) {
- case 4:
- erase_pages = 0x00;
- break;
- case 8:
- erase_pages = 0x01;
- break;
- case 16:
- erase_pages = 0x02;
- break;
- case 32:
- erase_pages = 0x03;
- break;
- default:
- erase_pages = 0x00;
- break;
- }
-
- /* SAMV_EFC_FCMD_EPA
- * According to the datasheet FARG[15:2] defines the page from which
- * the erase will start.This page must be modulo 4, 8, 16 or 32
- * according to the number of pages to erase. FARG[1:0] defines the
- * number of pages to be erased. Previously (firstpage << 2) was used
- * to conform to this, seems it should not be shifted...
- */
- return samv_efc_perform_command(target, SAMV_EFC_FCMD_EPA,
- first_page | erase_pages, status);
-}
-
-static int samv_get_gpnvm(struct target *target, unsigned gpnvm, unsigned *out)
-{
- uint32_t v;
- int r;
-
- if (gpnvm >= SAMV_NUM_GPNVM_BITS) {
- LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
- return ERROR_FAIL;
- }
-
- r = samv_efc_perform_command(target, SAMV_EFC_FCMD_GFB, 0, NULL);
- if (r != ERROR_OK) {
- LOG_ERROR("samv_get_gpnvm failed");
- return r;
- }
-
- r = samv_efc_get_result(target, &v);
-
- if (out)
- *out = (v >> gpnvm) & 1;
-
- return r;
-}
-
-static int samv_clear_gpnvm(struct target *target, unsigned gpnvm)
-{
- int r;
- unsigned v;
-
- if (gpnvm >= SAMV_NUM_GPNVM_BITS) {
- LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
- return ERROR_FAIL;
- }
- r = samv_get_gpnvm(target, gpnvm, &v);
- if (r != ERROR_OK) {
- LOG_DEBUG("get gpnvm failed: %d", r);
- return r;
- }
- r = samv_efc_perform_command(target, SAMV_EFC_FCMD_CFB, gpnvm, NULL);
- LOG_DEBUG("clear gpnvm result: %d", r);
- return r;
-}
-
-static int samv_set_gpnvm(struct target *target, unsigned gpnvm)
-{
- int r;
- unsigned v;
- if (gpnvm >= SAMV_NUM_GPNVM_BITS) {
- LOG_ERROR("invalid gpnvm %d, max: %d", gpnvm, SAMV_NUM_GPNVM_BITS);
- return ERROR_FAIL;
- }
-
- r = samv_get_gpnvm(target, gpnvm, &v);
- if (r != ERROR_OK)
- return r;
- if (v) {
- r = ERROR_OK; /* the gpnvm bit is already set */
- } else {
- /* we need to set it */
- r = samv_efc_perform_command(target, SAMV_EFC_FCMD_SFB, gpnvm, NULL);
- }
- return r;
-}
-
-static int samv_flash_unlock(struct target *target,
- unsigned start_sector, unsigned end_sector)
-{
- int r;
- uint32_t status;
- uint32_t pg;
- uint32_t pages_per_sector;
-
- /* todo: look into this... i think this should be done on lock regions */
- pages_per_sector = SAMV_SECTOR_SIZE / SAMV_PAGE_SIZE;
- while (start_sector <= end_sector) {
- pg = start_sector * pages_per_sector;
- r = samv_efc_perform_command(target, SAMV_EFC_FCMD_CLB, pg, &status);
- if (r != ERROR_OK)
- return r;
- start_sector++;
- }
- return ERROR_OK;
-}
-
-static int samv_flash_lock(struct target *target,
- unsigned start_sector, unsigned end_sector)
-{
- uint32_t status;
- uint32_t pg;
- uint32_t pages_per_sector;
- int r;
-
- /* todo: look into this... i think this should be done on lock regions */
- pages_per_sector = SAMV_SECTOR_SIZE / SAMV_PAGE_SIZE;
- while (start_sector <= end_sector) {
- pg = start_sector * pages_per_sector;
- r = samv_efc_perform_command(target, SAMV_EFC_FCMD_SLB, pg, &status);
- if (r != ERROR_OK)
- return r;
- start_sector++;
- }
- return ERROR_OK;
-}
-
-static int samv_protect_check(struct flash_bank *bank)
-{
- int r;
- uint32_t v[4] = {0};
-
- r = samv_efc_perform_command(bank->target, SAMV_EFC_FCMD_GLB, 0, NULL);
- if (r == ERROR_OK) {
- samv_efc_get_result(bank->target, &v[0]);
- samv_efc_get_result(bank->target, &v[1]);
- samv_efc_get_result(bank->target, &v[2]);
- r = samv_efc_get_result(bank->target, &v[3]);
- }
- if (r != ERROR_OK)
- return r;
-
- for (int x = 0; x < bank->num_sectors; x++)
- bank->sectors[x].is_protected = (!!(v[x >> 5] & (1 << (x % 32))));
- return ERROR_OK;
-}
-
-FLASH_BANK_COMMAND_HANDLER(samv_flash_bank_command)
-{
- LOG_INFO("flash bank command");
- struct samv_flash_bank *samv_info;
- samv_info = calloc(1, sizeof(struct samv_flash_bank));
- bank->driver_priv = samv_info;
- return ERROR_OK;
-}
-
-static int samv_get_device_id(struct flash_bank *bank, uint32_t *device_id)
-{
- return target_read_u32(bank->target, SAMV_CHIPID_CIDR, device_id);
-}
-
-static int samv_probe(struct flash_bank *bank)
-{
- uint32_t device_id;
- int r = samv_get_device_id(bank, &device_id);
- if (r != ERROR_OK)
- return r;
- LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
-
- uint8_t eproc = (device_id >> 5) & 0x7;
- if (eproc != 0) {
- LOG_ERROR("unexpected eproc code: %d was expecting 0 (cortex-m7)", eproc);
- return ERROR_FAIL;
- }
-
- uint8_t nvm_size_code = (device_id >> 8) & 0xf;
- switch (nvm_size_code) {
- case 12:
- bank->size = 1024 * 1024;
- break;
- case 14:
- bank->size = 2048 * 1024;
- break;
- default:
- LOG_ERROR("unrecognized flash size code: %d", nvm_size_code);
- return ERROR_FAIL;
- break;
- }
-
- struct samv_flash_bank *samv_info = bank->driver_priv;
- samv_info->size_bytes = bank->size;
- samv_info->probed = 1;
-
- bank->base = SAMV_FLASH_BASE;
- bank->num_sectors = bank->size / SAMV_SECTOR_SIZE;
- bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector));
- for (int s = 0; s < (int)bank->num_sectors; s++) {
- bank->sectors[s].size = SAMV_SECTOR_SIZE;
- bank->sectors[s].offset = s * SAMV_SECTOR_SIZE;
- bank->sectors[s].is_erased = -1;
- bank->sectors[s].is_protected = -1;
- }
-
- r = samv_protect_check(bank);
- if (r != ERROR_OK)
- return r;
-
- return ERROR_OK;
-}
-
-static int samv_auto_probe(struct flash_bank *bank)
-{
- struct samv_flash_bank *samv_info = bank->driver_priv;
- if (samv_info->probed)
- return ERROR_OK;
- return samv_probe(bank);
-}
-
-static int samv_erase(struct flash_bank *bank, int first, int last)
-{
- const int page_count = 32; /* 32 pages equals 16 KB lock region */
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int r = samv_auto_probe(bank);
- if (r != ERROR_OK)
- return r;
-
- /* easy case: we've been requested to erase the entire flash */
- if ((first == 0) && ((last + 1) == (int)(bank->num_sectors)))
- return samv_efc_perform_command(bank->target, SAMV_EFC_FCMD_EA, 0, NULL);
-
- LOG_INFO("erasing lock regions %d-%d...", first, last);
-
- for (int i = first; i <= last; i++) {
- uint32_t status;
- r = samv_erase_pages(bank->target, (i * page_count), page_count, &status);
- LOG_INFO("erasing lock region %d", i);
- if (r != ERROR_OK)
- LOG_ERROR("error performing erase page @ lock region number %d",
- (unsigned int)(i));
- if (status & (1 << 2)) {
- LOG_ERROR("lock region %d is locked", (unsigned int)(i));
- return ERROR_FAIL;
- }
- if (status & (1 << 1)) {
- LOG_ERROR("flash command error @lock region %d", (unsigned int)(i));
- return ERROR_FAIL;
- }
- }
- return ERROR_OK;
-}
-
-static int samv_protect(struct flash_bank *bank, int set, int first, int last)
-{
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int r;
- if (set)
- r = samv_flash_lock(bank->target, (unsigned)(first), (unsigned)(last));
- else
- r = samv_flash_unlock(bank->target, (unsigned)(first), (unsigned)(last));
-
- return r;
-}
-
-static int samv_page_read(struct target *target,
- unsigned page_num, uint8_t *buf)
-{
- uint32_t addr = SAMV_FLASH_BASE + page_num * SAMV_PAGE_SIZE;
- int r = target_read_memory(target, addr, 4, SAMV_PAGE_SIZE / 4, buf);
- if (r != ERROR_OK)
- LOG_ERROR("flash program failed to read page @ 0x%08x",
- (unsigned int)(addr));
- return r;
-}
-
-static int samv_page_write(struct target *target,
- unsigned pagenum, const uint8_t *buf)
-{
- uint32_t status;
- const uint32_t addr = SAMV_FLASH_BASE + pagenum * SAMV_PAGE_SIZE;
- int r;
-
- LOG_DEBUG("write page %u at address 0x%08x", pagenum, (unsigned int)addr);
- r = target_write_memory(target, addr, 4, SAMV_PAGE_SIZE / 4, buf);
- if (r != ERROR_OK) {
- LOG_ERROR("failed to buffer page at 0x%08x", (unsigned int)addr);
- return r;
- }
-
- r = samv_efc_perform_command(target, SAMV_EFC_FCMD_WP, pagenum, &status);
- if (r != ERROR_OK)
- LOG_ERROR("error performing write page at 0x%08x", (unsigned int)addr);
- if (status & (1 << 2)) {
- LOG_ERROR("page at 0x%08x is locked", (unsigned int)addr);
- return ERROR_FAIL;
- }
- if (status & (1 << 1)) {
- LOG_ERROR("flash command error at 0x%08x", (unsigned int)addr);
- return ERROR_FAIL;
- }
- return ERROR_OK;
-}
-
-static int samv_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (count == 0)
- return ERROR_OK;
-
- if ((offset + count) > bank->size) {
- LOG_ERROR("flash write error - past end of bank");
- LOG_ERROR(" offset: 0x%08x, count 0x%08x, bank end: 0x%08x",
- (unsigned int)(offset),
- (unsigned int)(count),
- (unsigned int)(bank->size));
- return ERROR_FAIL;
- }
-
- uint8_t pagebuffer[SAMV_PAGE_SIZE] = {0};
- uint32_t page_cur = offset / SAMV_PAGE_SIZE;
- uint32_t page_end = (offset + count - 1) / SAMV_PAGE_SIZE;
-
- LOG_DEBUG("offset: 0x%08x, count: 0x%08x",
- (unsigned int)(offset), (unsigned int)(count));
- LOG_DEBUG("page start: %d, page end: %d", (int)(page_cur), (int)(page_end));
-
- /* Special case: all one page */
- /* Otherwise: */
- /* (1) non-aligned start */
- /* (2) body pages */
- /* (3) non-aligned end. */
-
- int r;
- uint32_t page_offset;
-
- /* handle special case - all one page. */
- if (page_cur == page_end) {
- LOG_DEBUG("special case, all in one page");
- r = samv_page_read(bank->target, page_cur, pagebuffer);
- if (r != ERROR_OK)
- return r;
-
- page_offset = offset & (SAMV_PAGE_SIZE-1);
- memcpy(pagebuffer + page_offset, buffer, count);
-
- r = samv_page_write(bank->target, page_cur, pagebuffer);
- if (r != ERROR_OK)
- return r;
- return ERROR_OK;
- }
-
- /* step 1) handle the non-aligned starting address */
- page_offset = offset & (SAMV_PAGE_SIZE - 1);
- if (page_offset) {
- LOG_DEBUG("non-aligned start");
- /* read the partial page */
- r = samv_page_read(bank->target, page_cur, pagebuffer);
- if (r != ERROR_OK)
- return r;
-
- /* over-write with new data */
- uint32_t n = SAMV_PAGE_SIZE - page_offset;
- memcpy(pagebuffer + page_offset, buffer, n);
-
- r = samv_page_write(bank->target, page_cur, pagebuffer);
- if (r != ERROR_OK)
- return r;
-
- count -= n;
- offset += n;
- buffer += n;
- page_cur++;
- }
-
- /* By checking that offset is correct here, we also fix a clang warning */
- assert(offset % SAMV_PAGE_SIZE == 0);
-
- /* step 2) handle the full pages */
- LOG_DEBUG("full page loop: cur=%d, end=%d, count = 0x%08x",
- (int)page_cur, (int)page_end, (unsigned int)(count));
-
- while ((page_cur < page_end) && (count >= SAMV_PAGE_SIZE)) {
- r = samv_page_write(bank->target, page_cur, buffer);
- if (r != ERROR_OK)
- return r;
- count -= SAMV_PAGE_SIZE;
- buffer += SAMV_PAGE_SIZE;
- page_cur += 1;
- }
-
- /* step 3) write final page, if it's partial (otherwise it's already done) */
- if (count) {
- LOG_DEBUG("final partial page, count = 0x%08x", (unsigned int)(count));
- /* we have a partial page */
- r = samv_page_read(bank->target, page_cur, pagebuffer);
- if (r != ERROR_OK)
- return r;
- memcpy(pagebuffer, buffer, count); /* data goes at start of page */
- r = samv_page_write(bank->target, page_cur, pagebuffer);
- if (r != ERROR_OK)
- return r;
- }
- return ERROR_OK;
-}
-
-static int samv_get_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct samv_flash_bank *samv_info = bank->driver_priv;
- if (!samv_info->probed) {
- int r = samv_probe(bank);
- if (ERROR_OK != r)
- return r;
- }
- snprintf(buf, buf_size, "Cortex-M7 detected with %d kB flash",
- bank->size / 1024);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(samv_handle_gpnvm_command)
-{
- struct flash_bank *bank = get_flash_bank_by_num_noprobe(0);
- if (!bank)
- return ERROR_FAIL;
- struct samv_flash_bank *samv_info = bank->driver_priv;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int r;
- if (!samv_info->probed) {
- r = samv_auto_probe(bank);
- if (r != ERROR_OK)
- return r;
- }
-
- int who = 0;
-
- switch (CMD_ARGC) {
- case 0:
- goto showall;
- break;
- case 1:
- who = -1;
- break;
- case 2:
- if (!strcmp(CMD_ARGV[0], "show") && !strcmp(CMD_ARGV[1], "all"))
- who = -1;
- else {
- uint32_t v32;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], v32);
- who = v32;
- }
- break;
- default:
- return ERROR_COMMAND_SYNTAX_ERROR;
- break;
- }
-
- uint32_t v;
- if (!strcmp("show", CMD_ARGV[0])) {
- if (who == -1) {
-showall:
- r = ERROR_OK;
- for (int x = 0; x < SAMV_NUM_GPNVM_BITS; x++) {
- r = samv_get_gpnvm(target, x, &v);
- if (r != ERROR_OK)
- break;
- command_print(CMD_CTX, "samv-gpnvm%u: %u", x, v);
- }
- return r;
- }
- if ((who >= 0) && (((unsigned)who) < SAMV_NUM_GPNVM_BITS)) {
- r = samv_get_gpnvm(target, who, &v);
- command_print(CMD_CTX, "samv-gpnvm%u: %u", who, v);
- return r;
- } else {
- command_print(CMD_CTX, "invalid gpnvm: %u", who);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- }
-
- if (who == -1) {
- command_print(CMD_CTX, "missing gpnvm number");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (!strcmp("set", CMD_ARGV[0]))
- r = samv_set_gpnvm(target, who);
- else if (!strcmp("clr", CMD_ARGV[0]) || !strcmp("clear", CMD_ARGV[0]))
- r = samv_clear_gpnvm(target, who);
- else {
- command_print(CMD_CTX, "unknown command: %s", CMD_ARGV[0]);
- r = ERROR_COMMAND_SYNTAX_ERROR;
- }
- return r;
-}
-
-static const struct command_registration atsamv_exec_command_handlers[] = {
- {
- .name = "gpnvm",
- .handler = samv_handle_gpnvm_command,
- .mode = COMMAND_EXEC,
- .usage = "[('clr'|'set'|'show') bitnum]",
- .help = "Without arguments, shows all bits in the gpnvm "
- "register. Otherwise, clears, sets, or shows one "
- "General Purpose Non-Volatile Memory (gpnvm) bit.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration atsamv_command_handlers[] = {
- {
- .name = "atsamv",
- .mode = COMMAND_ANY,
- .help = "atsamv flash command group",
- .usage = "",
- .chain = atsamv_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver atsamv_flash = {
- .name = "atsamv",
- .commands = atsamv_command_handlers,
- .flash_bank_command = samv_flash_bank_command,
- .erase = samv_erase,
- .protect = samv_protect,
- .write = samv_write,
- .read = default_flash_read,
- .probe = samv_probe,
- .auto_probe = samv_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = samv_protect_check,
- .info = samv_get_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/avrf.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/avrf.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/avrf.c
deleted file mode 100755
index 1984c9e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/avrf.c
+++ /dev/null
@@ -1,491 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Simon Qian *
- * SimonQian@SimonQian.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <target/avrt.h>
-
-/* AVR_JTAG_Instructions */
-#define AVR_JTAG_INS_LEN 4
-/* Public Instructions: */
-#define AVR_JTAG_INS_EXTEST 0x00
-#define AVR_JTAG_INS_IDCODE 0x01
-#define AVR_JTAG_INS_SAMPLE_PRELOAD 0x02
-#define AVR_JTAG_INS_BYPASS 0x0F
-/* AVR Specified Public Instructions: */
-#define AVR_JTAG_INS_AVR_RESET 0x0C
-#define AVR_JTAG_INS_PROG_ENABLE 0x04
-#define AVR_JTAG_INS_PROG_COMMANDS 0x05
-#define AVR_JTAG_INS_PROG_PAGELOAD 0x06
-#define AVR_JTAG_INS_PROG_PAGEREAD 0x07
-
-/* Data Registers: */
-#define AVR_JTAG_REG_Bypass_Len 1
-#define AVR_JTAG_REG_DeviceID_Len 32
-
-#define AVR_JTAG_REG_Reset_Len 1
-#define AVR_JTAG_REG_JTAGID_Len 32
-#define AVR_JTAG_REG_ProgrammingEnable_Len 16
-#define AVR_JTAG_REG_ProgrammingCommand_Len 15
-#define AVR_JTAG_REG_FlashDataByte_Len 16
-
-struct avrf_type {
- char name[15];
- uint16_t chip_id;
- int flash_page_size;
- int flash_page_num;
- int eeprom_page_size;
- int eeprom_page_num;
-};
-
-struct avrf_flash_bank {
- int ppage_size;
- int probed;
-};
-
-static const struct avrf_type avft_chips_info[] = {
-/* name, chip_id, flash_page_size, flash_page_num,
- * eeprom_page_size, eeprom_page_num
- */
- {"atmega128", 0x9702, 256, 512, 8, 512},
- {"at90can128", 0x9781, 256, 512, 8, 512},
- {"at90usb128", 0x9782, 256, 512, 8, 512},
- {"atmega164p", 0x940a, 128, 128, 4, 128},
- {"atmega324p", 0x9508, 128, 256, 4, 256},
- {"atmega324pa", 0x9511, 128, 256, 4, 256},
- {"atmega644p", 0x960a, 256, 256, 8, 256},
- {"atmega1284p", 0x9705, 256, 512, 8, 512},
-};
-
-/* avr program functions */
-static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
-{
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_Reset_Len);
-
- return ERROR_OK;
-}
-
-static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
-{
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
- avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_Len);
-
- return ERROR_OK;
-}
-
-static int avr_jtagprg_enterprogmode(struct avr_common *avr)
-{
- avr_jtag_reset(avr, 1);
-
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_ProgrammingEnable_Len);
-
- return ERROR_OK;
-}
-
-static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
-{
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_ProgrammingCommand_Len);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_ProgrammingCommand_Len);
-
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_ProgrammingEnable_Len);
-
- avr_jtag_reset(avr, 0);
-
- return ERROR_OK;
-}
-
-static int avr_jtagprg_chiperase(struct avr_common *avr)
-{
- uint32_t poll_value;
-
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_ProgrammingCommand_Len);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_ProgrammingCommand_Len);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_ProgrammingCommand_Len);
-
- do {
- poll_value = 0;
- avr_jtag_senddat(avr->jtag_info.tap,
- &poll_value,
- 0x3380,
- AVR_JTAG_REG_ProgrammingCommand_Len);
- if (ERROR_OK != mcu_execute_queue())
- return ERROR_FAIL;
- LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
- } while (!(poll_value & 0x0200));
-
- return ERROR_OK;
-}
-
-static int avr_jtagprg_writeflashpage(struct avr_common *avr,
- const uint8_t *page_buf,
- uint32_t buf_size,
- uint32_t addr,
- uint32_t page_size)
-{
- uint32_t i, poll_value;
-
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_ProgrammingCommand_Len);
-
- /* load addr high byte */
- avr_jtag_senddat(avr->jtag_info.tap,
- NULL,
- 0x0700 | ((addr >> 9) & 0xFF),
- AVR_JTAG_REG_ProgrammingCommand_Len);
-
- /* load addr low byte */
- avr_jtag_senddat(avr->jtag_info.tap,
- NULL,
- 0x0300 | ((addr >> 1) & 0xFF),
- AVR_JTAG_REG_ProgrammingCommand_Len);
-
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
-
- for (i = 0; i < page_size; i++) {
- if (i < buf_size)
- avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
- else
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
- }
-
- avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
-
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_ProgrammingCommand_Len);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
- avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_ProgrammingCommand_Len);
-
- do {
- poll_value = 0;
- avr_jtag_senddat(avr->jtag_info.tap,
- &poll_value,
- 0x3700,
- AVR_JTAG_REG_ProgrammingCommand_Len);
- if (ERROR_OK != mcu_execute_queue())
- return ERROR_FAIL;
- LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
- } while (!(poll_value & 0x0200));
-
- return ERROR_OK;
-}
-
-FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
-{
- struct avrf_flash_bank *avrf_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- avrf_info = malloc(sizeof(struct avrf_flash_bank));
- bank->driver_priv = avrf_info;
-
- avrf_info->probed = 0;
-
- return ERROR_OK;
-}
-
-static int avrf_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- struct avr_common *avr = target->arch_info;
- int status;
-
- LOG_DEBUG("%s", __func__);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- status = avr_jtagprg_enterprogmode(avr);
- if (status != ERROR_OK)
- return status;
-
- status = avr_jtagprg_chiperase(avr);
- if (status != ERROR_OK)
- return status;
-
- return avr_jtagprg_leaveprogmode(avr);
-}
-
-static int avrf_protect(struct flash_bank *bank, int set, int first, int last)
-{
- LOG_INFO("%s", __func__);
- return ERROR_OK;
-}
-
-static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct avr_common *avr = target->arch_info;
- uint32_t cur_size, cur_buffer_size, page_size;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- page_size = bank->sectors[0].size;
- if ((offset % page_size) != 0) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
- offset,
- page_size);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
- LOG_DEBUG("count is %" PRId32 "", count);
-
- if (ERROR_OK != avr_jtagprg_enterprogmode(avr))
- return ERROR_FAIL;
-
- cur_size = 0;
- while (count > 0) {
- if (count > page_size)
- cur_buffer_size = page_size;
- else
- cur_buffer_size = count;
- avr_jtagprg_writeflashpage(avr,
- buffer + cur_size,
- cur_buffer_size,
- offset + cur_size,
- page_size);
- count -= cur_buffer_size;
- cur_size += cur_buffer_size;
-
- keep_alive();
- }
-
- return avr_jtagprg_leaveprogmode(avr);
-}
-
-#define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
-#define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
-#define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
-
-static int avrf_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct avrf_flash_bank *avrf_info = bank->driver_priv;
- struct avr_common *avr = target->arch_info;
- const struct avrf_type *avr_info = NULL;
- int i;
- uint32_t device_id;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- avrf_info->probed = 0;
-
- avr_jtag_read_jtagid(avr, &device_id);
- if (ERROR_OK != mcu_execute_queue())
- return ERROR_FAIL;
-
- LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
- if (EXTRACT_MFG(device_id) != 0x1F)
- LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
- EXTRACT_MFG(device_id),
- 0x1F);
-
- for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
- if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
- avr_info = &avft_chips_info[i];
- LOG_INFO("target device is %s", avr_info->name);
- break;
- }
- }
-
- if (avr_info != NULL) {
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- /* chip found */
- bank->base = 0x00000000;
- bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
- bank->num_sectors = avr_info->flash_page_num;
- bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
-
- for (i = 0; i < avr_info->flash_page_num; i++) {
- bank->sectors[i].offset = i * avr_info->flash_page_size;
- bank->sectors[i].size = avr_info->flash_page_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- avrf_info->probed = 1;
- return ERROR_OK;
- } else {
- /* chip not supported */
- LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
-
- avrf_info->probed = 1;
- return ERROR_FAIL;
- }
-}
-
-static int avrf_auto_probe(struct flash_bank *bank)
-{
- struct avrf_flash_bank *avrf_info = bank->driver_priv;
- if (avrf_info->probed)
- return ERROR_OK;
- return avrf_probe(bank);
-}
-
-static int avrf_protect_check(struct flash_bank *bank)
-{
- LOG_INFO("%s", __func__);
- return ERROR_OK;
-}
-
-static int avrf_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct target *target = bank->target;
- struct avr_common *avr = target->arch_info;
- const struct avrf_type *avr_info = NULL;
- int i;
- uint32_t device_id;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- avr_jtag_read_jtagid(avr, &device_id);
- if (ERROR_OK != mcu_execute_queue())
- return ERROR_FAIL;
-
- LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
- if (EXTRACT_MFG(device_id) != 0x1F)
- LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
- EXTRACT_MFG(device_id),
- 0x1F);
-
- for (i = 0; i < (int)ARRAY_SIZE(avft_chips_info); i++) {
- if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
- avr_info = &avft_chips_info[i];
- LOG_INFO("target device is %s", avr_info->name);
-
- break;
- }
- }
-
- if (avr_info != NULL) {
- /* chip found */
- snprintf(buf, buf_size, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
- EXTRACT_VER(device_id));
- return ERROR_OK;
- } else {
- /* chip not supported */
- snprintf(buf, buf_size, "Cannot identify target as a avr\n");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-}
-
-static int avrf_mass_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct avr_common *avr = target->arch_info;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((ERROR_OK != avr_jtagprg_enterprogmode(avr))
- || (ERROR_OK != avr_jtagprg_chiperase(avr))
- || (ERROR_OK != avr_jtagprg_leaveprogmode(avr)))
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(avrf_handle_mass_erase_command)
-{
- int i;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (avrf_mass_erase(bank) == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "avr mass erase complete");
- } else
- command_print(CMD_CTX, "avr mass erase failed");
-
- LOG_DEBUG("%s", __func__);
- return ERROR_OK;
-}
-
-static const struct command_registration avrf_exec_command_handlers[] = {
- {
- .name = "mass_erase",
- .usage = "<bank>",
- .handler = avrf_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .help = "erase entire device",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration avrf_command_handlers[] = {
- {
- .name = "avrf",
- .mode = COMMAND_ANY,
- .help = "AVR flash command group",
- .usage = "",
- .chain = avrf_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver avr_flash = {
- .name = "avr",
- .commands = avrf_command_handlers,
- .flash_bank_command = avrf_flash_bank_command,
- .erase = avrf_erase,
- .protect = avrf_protect,
- .write = avrf_write,
- .read = default_flash_read,
- .probe = avrf_probe,
- .auto_probe = avrf_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = avrf_protect_check,
- .info = avrf_info,
-};
[06/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_usb.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_usb.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_usb.c
deleted file mode 100755
index 50b3b9a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_usb.c
+++ /dev/null
@@ -1,4125 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/drivers/libusb_common.h>
-#include <helper/log.h>
-#include <helper/time_support.h>
-#include <target/target.h>
-#include <jtag/jtag.h>
-#include <target/nds32_insn.h>
-#include <target/nds32_reg.h>
-#include "aice_usb.h"
-
-
-/* Global USB buffers */
-static uint8_t usb_in_buffer[AICE_IN_BUFFER_SIZE];
-static uint8_t usb_out_buffer[AICE_OUT_BUFFER_SIZE];
-static uint32_t jtag_clock;
-static struct aice_usb_handler_s aice_handler;
-/* AICE max retry times. If AICE command timeout, retry it. */
-static int aice_max_retry_times = 50;
-/* Default endian is little endian. */
-static enum aice_target_endian data_endian;
-
-/* Constants for AICE command format length */
-static const int32_t AICE_FORMAT_HTDA = 3;
-static const int32_t AICE_FORMAT_HTDC = 7;
-static const int32_t AICE_FORMAT_HTDMA = 4;
-static const int32_t AICE_FORMAT_HTDMB = 8;
-static const int32_t AICE_FORMAT_HTDMC = 8;
-static const int32_t AICE_FORMAT_HTDMD = 12;
-static const int32_t AICE_FORMAT_DTHA = 6;
-static const int32_t AICE_FORMAT_DTHB = 2;
-static const int32_t AICE_FORMAT_DTHMA = 8;
-static const int32_t AICE_FORMAT_DTHMB = 4;
-
-/* Constants for AICE command */
-static const uint8_t AICE_CMD_SCAN_CHAIN = 0x00;
-static const uint8_t AICE_CMD_T_READ_MISC = 0x20;
-static const uint8_t AICE_CMD_T_READ_EDMSR = 0x21;
-static const uint8_t AICE_CMD_T_READ_DTR = 0x22;
-static const uint8_t AICE_CMD_T_READ_MEM_B = 0x24;
-static const uint8_t AICE_CMD_T_READ_MEM_H = 0x25;
-static const uint8_t AICE_CMD_T_READ_MEM = 0x26;
-static const uint8_t AICE_CMD_T_FASTREAD_MEM = 0x27;
-static const uint8_t AICE_CMD_T_WRITE_MISC = 0x28;
-static const uint8_t AICE_CMD_T_WRITE_EDMSR = 0x29;
-static const uint8_t AICE_CMD_T_WRITE_DTR = 0x2A;
-static const uint8_t AICE_CMD_T_WRITE_DIM = 0x2B;
-static const uint8_t AICE_CMD_T_WRITE_MEM_B = 0x2C;
-static const uint8_t AICE_CMD_T_WRITE_MEM_H = 0x2D;
-static const uint8_t AICE_CMD_T_WRITE_MEM = 0x2E;
-static const uint8_t AICE_CMD_T_FASTWRITE_MEM = 0x2F;
-static const uint8_t AICE_CMD_T_EXECUTE = 0x3E;
-static const uint8_t AICE_CMD_READ_CTRL = 0x50;
-static const uint8_t AICE_CMD_WRITE_CTRL = 0x51;
-static const uint8_t AICE_CMD_BATCH_BUFFER_READ = 0x60;
-static const uint8_t AICE_CMD_READ_DTR_TO_BUFFER = 0x61;
-static const uint8_t AICE_CMD_BATCH_BUFFER_WRITE = 0x68;
-static const uint8_t AICE_CMD_WRITE_DTR_FROM_BUFFER = 0x69;
-
-/***************************************************************************/
-/* AICE commands' pack/unpack functions */
-static void aice_pack_htda(uint8_t cmd_code, uint8_t extra_word_length,
- uint32_t address)
-{
- usb_out_buffer[0] = cmd_code;
- usb_out_buffer[1] = extra_word_length;
- usb_out_buffer[2] = (uint8_t)(address & 0xFF);
-}
-
-static void aice_pack_htdc(uint8_t cmd_code, uint8_t extra_word_length,
- uint32_t address, uint32_t word, enum aice_target_endian access_endian)
-{
- usb_out_buffer[0] = cmd_code;
- usb_out_buffer[1] = extra_word_length;
- usb_out_buffer[2] = (uint8_t)(address & 0xFF);
- if (access_endian == AICE_BIG_ENDIAN) {
- usb_out_buffer[6] = (uint8_t)((word >> 24) & 0xFF);
- usb_out_buffer[5] = (uint8_t)((word >> 16) & 0xFF);
- usb_out_buffer[4] = (uint8_t)((word >> 8) & 0xFF);
- usb_out_buffer[3] = (uint8_t)(word & 0xFF);
- } else {
- usb_out_buffer[3] = (uint8_t)((word >> 24) & 0xFF);
- usb_out_buffer[4] = (uint8_t)((word >> 16) & 0xFF);
- usb_out_buffer[5] = (uint8_t)((word >> 8) & 0xFF);
- usb_out_buffer[6] = (uint8_t)(word & 0xFF);
- }
-}
-
-static void aice_pack_htdma(uint8_t cmd_code, uint8_t target_id,
- uint8_t extra_word_length, uint32_t address)
-{
- usb_out_buffer[0] = cmd_code;
- usb_out_buffer[1] = target_id;
- usb_out_buffer[2] = extra_word_length;
- usb_out_buffer[3] = (uint8_t)(address & 0xFF);
-}
-
-static void aice_pack_htdmb(uint8_t cmd_code, uint8_t target_id,
- uint8_t extra_word_length, uint32_t address)
-{
- usb_out_buffer[0] = cmd_code;
- usb_out_buffer[1] = target_id;
- usb_out_buffer[2] = extra_word_length;
- usb_out_buffer[3] = 0;
- usb_out_buffer[4] = (uint8_t)((address >> 24) & 0xFF);
- usb_out_buffer[5] = (uint8_t)((address >> 16) & 0xFF);
- usb_out_buffer[6] = (uint8_t)((address >> 8) & 0xFF);
- usb_out_buffer[7] = (uint8_t)(address & 0xFF);
-}
-
-static void aice_pack_htdmc(uint8_t cmd_code, uint8_t target_id,
- uint8_t extra_word_length, uint32_t address, uint32_t word,
- enum aice_target_endian access_endian)
-{
- usb_out_buffer[0] = cmd_code;
- usb_out_buffer[1] = target_id;
- usb_out_buffer[2] = extra_word_length;
- usb_out_buffer[3] = (uint8_t)(address & 0xFF);
- if (access_endian == AICE_BIG_ENDIAN) {
- usb_out_buffer[7] = (uint8_t)((word >> 24) & 0xFF);
- usb_out_buffer[6] = (uint8_t)((word >> 16) & 0xFF);
- usb_out_buffer[5] = (uint8_t)((word >> 8) & 0xFF);
- usb_out_buffer[4] = (uint8_t)(word & 0xFF);
- } else {
- usb_out_buffer[4] = (uint8_t)((word >> 24) & 0xFF);
- usb_out_buffer[5] = (uint8_t)((word >> 16) & 0xFF);
- usb_out_buffer[6] = (uint8_t)((word >> 8) & 0xFF);
- usb_out_buffer[7] = (uint8_t)(word & 0xFF);
- }
-}
-
-static void aice_pack_htdmc_multiple_data(uint8_t cmd_code, uint8_t target_id,
- uint8_t extra_word_length, uint32_t address, uint32_t *word,
- uint8_t num_of_words, enum aice_target_endian access_endian)
-{
- usb_out_buffer[0] = cmd_code;
- usb_out_buffer[1] = target_id;
- usb_out_buffer[2] = extra_word_length;
- usb_out_buffer[3] = (uint8_t)(address & 0xFF);
-
- uint8_t i;
- for (i = 0 ; i < num_of_words ; i++, word++) {
- if (access_endian == AICE_BIG_ENDIAN) {
- usb_out_buffer[7 + i * 4] = (uint8_t)((*word >> 24) & 0xFF);
- usb_out_buffer[6 + i * 4] = (uint8_t)((*word >> 16) & 0xFF);
- usb_out_buffer[5 + i * 4] = (uint8_t)((*word >> 8) & 0xFF);
- usb_out_buffer[4 + i * 4] = (uint8_t)(*word & 0xFF);
- } else {
- usb_out_buffer[4 + i * 4] = (uint8_t)((*word >> 24) & 0xFF);
- usb_out_buffer[5 + i * 4] = (uint8_t)((*word >> 16) & 0xFF);
- usb_out_buffer[6 + i * 4] = (uint8_t)((*word >> 8) & 0xFF);
- usb_out_buffer[7 + i * 4] = (uint8_t)(*word & 0xFF);
- }
- }
-}
-
-static void aice_pack_htdmd(uint8_t cmd_code, uint8_t target_id,
- uint8_t extra_word_length, uint32_t address, uint32_t word,
- enum aice_target_endian access_endian)
-{
- usb_out_buffer[0] = cmd_code;
- usb_out_buffer[1] = target_id;
- usb_out_buffer[2] = extra_word_length;
- usb_out_buffer[3] = 0;
- usb_out_buffer[4] = (uint8_t)((address >> 24) & 0xFF);
- usb_out_buffer[5] = (uint8_t)((address >> 16) & 0xFF);
- usb_out_buffer[6] = (uint8_t)((address >> 8) & 0xFF);
- usb_out_buffer[7] = (uint8_t)(address & 0xFF);
- if (access_endian == AICE_BIG_ENDIAN) {
- usb_out_buffer[11] = (uint8_t)((word >> 24) & 0xFF);
- usb_out_buffer[10] = (uint8_t)((word >> 16) & 0xFF);
- usb_out_buffer[9] = (uint8_t)((word >> 8) & 0xFF);
- usb_out_buffer[8] = (uint8_t)(word & 0xFF);
- } else {
- usb_out_buffer[8] = (uint8_t)((word >> 24) & 0xFF);
- usb_out_buffer[9] = (uint8_t)((word >> 16) & 0xFF);
- usb_out_buffer[10] = (uint8_t)((word >> 8) & 0xFF);
- usb_out_buffer[11] = (uint8_t)(word & 0xFF);
- }
-}
-
-static void aice_pack_htdmd_multiple_data(uint8_t cmd_code, uint8_t target_id,
- uint8_t extra_word_length, uint32_t address, const uint8_t *word,
- enum aice_target_endian access_endian)
-{
- usb_out_buffer[0] = cmd_code;
- usb_out_buffer[1] = target_id;
- usb_out_buffer[2] = extra_word_length;
- usb_out_buffer[3] = 0;
- usb_out_buffer[4] = (uint8_t)((address >> 24) & 0xFF);
- usb_out_buffer[5] = (uint8_t)((address >> 16) & 0xFF);
- usb_out_buffer[6] = (uint8_t)((address >> 8) & 0xFF);
- usb_out_buffer[7] = (uint8_t)(address & 0xFF);
-
- uint32_t i;
- /* num_of_words may be over 0xFF, so use uint32_t */
- uint32_t num_of_words = extra_word_length + 1;
-
- for (i = 0 ; i < num_of_words ; i++, word += 4) {
- if (access_endian == AICE_BIG_ENDIAN) {
- usb_out_buffer[11 + i * 4] = word[3];
- usb_out_buffer[10 + i * 4] = word[2];
- usb_out_buffer[9 + i * 4] = word[1];
- usb_out_buffer[8 + i * 4] = word[0];
- } else {
- usb_out_buffer[8 + i * 4] = word[3];
- usb_out_buffer[9 + i * 4] = word[2];
- usb_out_buffer[10 + i * 4] = word[1];
- usb_out_buffer[11 + i * 4] = word[0];
- }
- }
-}
-
-static void aice_unpack_dtha(uint8_t *cmd_ack_code, uint8_t *extra_word_length,
- uint32_t *word, enum aice_target_endian access_endian)
-{
- *cmd_ack_code = usb_in_buffer[0];
- *extra_word_length = usb_in_buffer[1];
-
- if (access_endian == AICE_BIG_ENDIAN) {
- *word = (usb_in_buffer[5] << 24) |
- (usb_in_buffer[4] << 16) |
- (usb_in_buffer[3] << 8) |
- (usb_in_buffer[2]);
- } else {
- *word = (usb_in_buffer[2] << 24) |
- (usb_in_buffer[3] << 16) |
- (usb_in_buffer[4] << 8) |
- (usb_in_buffer[5]);
- }
-}
-
-static void aice_unpack_dtha_multiple_data(uint8_t *cmd_ack_code,
- uint8_t *extra_word_length, uint32_t *word, uint8_t num_of_words,
- enum aice_target_endian access_endian)
-{
- *cmd_ack_code = usb_in_buffer[0];
- *extra_word_length = usb_in_buffer[1];
-
- uint8_t i;
- for (i = 0 ; i < num_of_words ; i++, word++) {
- if (access_endian == AICE_BIG_ENDIAN) {
- *word = (usb_in_buffer[5 + i * 4] << 24) |
- (usb_in_buffer[4 + i * 4] << 16) |
- (usb_in_buffer[3 + i * 4] << 8) |
- (usb_in_buffer[2 + i * 4]);
- } else {
- *word = (usb_in_buffer[2 + i * 4] << 24) |
- (usb_in_buffer[3 + i * 4] << 16) |
- (usb_in_buffer[4 + i * 4] << 8) |
- (usb_in_buffer[5 + i * 4]);
- }
- }
-}
-
-static void aice_unpack_dthb(uint8_t *cmd_ack_code, uint8_t *extra_word_length)
-{
- *cmd_ack_code = usb_in_buffer[0];
- *extra_word_length = usb_in_buffer[1];
-}
-
-static void aice_unpack_dthma(uint8_t *cmd_ack_code, uint8_t *target_id,
- uint8_t *extra_word_length, uint32_t *word,
- enum aice_target_endian access_endian)
-{
- *cmd_ack_code = usb_in_buffer[0];
- *target_id = usb_in_buffer[1];
- *extra_word_length = usb_in_buffer[2];
- if (access_endian == AICE_BIG_ENDIAN) {
- *word = (usb_in_buffer[7] << 24) |
- (usb_in_buffer[6] << 16) |
- (usb_in_buffer[5] << 8) |
- (usb_in_buffer[4]);
- } else {
- *word = (usb_in_buffer[4] << 24) |
- (usb_in_buffer[5] << 16) |
- (usb_in_buffer[6] << 8) |
- (usb_in_buffer[7]);
- }
-}
-
-static void aice_unpack_dthma_multiple_data(uint8_t *cmd_ack_code,
- uint8_t *target_id, uint8_t *extra_word_length, uint8_t *word,
- enum aice_target_endian access_endian)
-{
- *cmd_ack_code = usb_in_buffer[0];
- *target_id = usb_in_buffer[1];
- *extra_word_length = usb_in_buffer[2];
- if (access_endian == AICE_BIG_ENDIAN) {
- word[0] = usb_in_buffer[4];
- word[1] = usb_in_buffer[5];
- word[2] = usb_in_buffer[6];
- word[3] = usb_in_buffer[7];
- } else {
- word[0] = usb_in_buffer[7];
- word[1] = usb_in_buffer[6];
- word[2] = usb_in_buffer[5];
- word[3] = usb_in_buffer[4];
- }
- word += 4;
-
- uint8_t i;
- for (i = 0; i < *extra_word_length; i++) {
- if (access_endian == AICE_BIG_ENDIAN) {
- word[0] = usb_in_buffer[8 + i * 4];
- word[1] = usb_in_buffer[9 + i * 4];
- word[2] = usb_in_buffer[10 + i * 4];
- word[3] = usb_in_buffer[11 + i * 4];
- } else {
- word[0] = usb_in_buffer[11 + i * 4];
- word[1] = usb_in_buffer[10 + i * 4];
- word[2] = usb_in_buffer[9 + i * 4];
- word[3] = usb_in_buffer[8 + i * 4];
- }
- word += 4;
- }
-}
-
-static void aice_unpack_dthmb(uint8_t *cmd_ack_code, uint8_t *target_id,
- uint8_t *extra_word_length)
-{
- *cmd_ack_code = usb_in_buffer[0];
- *target_id = usb_in_buffer[1];
- *extra_word_length = usb_in_buffer[2];
-}
-
-/***************************************************************************/
-/* End of AICE commands' pack/unpack functions */
-
-/* calls the given usb_bulk_* function, allowing for the data to
- * trickle in with some timeouts */
-static int usb_bulk_with_retries(
- int (*f)(jtag_libusb_device_handle *, int, char *, int, int),
- jtag_libusb_device_handle *dev, int ep,
- char *bytes, int size, int timeout)
-{
- int tries = 3, count = 0;
-
- while (tries && (count < size)) {
- int result = f(dev, ep, bytes + count, size - count, timeout);
- if (result > 0)
- count += result;
- else if ((-ETIMEDOUT != result) || !--tries)
- return result;
- }
- return count;
-}
-
-static int wrap_usb_bulk_write(jtag_libusb_device_handle *dev, int ep,
- char *buff, int size, int timeout)
-{
- /* usb_bulk_write() takes const char *buff */
- return jtag_libusb_bulk_write(dev, ep, buff, size, timeout);
-}
-
-static inline int usb_bulk_write_ex(jtag_libusb_device_handle *dev, int ep,
- char *bytes, int size, int timeout)
-{
- return usb_bulk_with_retries(&wrap_usb_bulk_write,
- dev, ep, bytes, size, timeout);
-}
-
-static inline int usb_bulk_read_ex(jtag_libusb_device_handle *dev, int ep,
- char *bytes, int size, int timeout)
-{
- return usb_bulk_with_retries(&jtag_libusb_bulk_read,
- dev, ep, bytes, size, timeout);
-}
-
-/* Write data from out_buffer to USB. */
-static int aice_usb_write(uint8_t *out_buffer, int out_length)
-{
- int result;
-
- if (out_length > AICE_OUT_BUFFER_SIZE) {
- LOG_ERROR("aice_write illegal out_length=%i (max=%i)",
- out_length, AICE_OUT_BUFFER_SIZE);
- return -1;
- }
-
- result = usb_bulk_write_ex(aice_handler.usb_handle, aice_handler.usb_write_ep,
- (char *)out_buffer, out_length, AICE_USB_TIMEOUT);
-
- DEBUG_JTAG_IO("aice_usb_write, out_length = %i, result = %i",
- out_length, result);
-
- return result;
-}
-
-/* Read data from USB into in_buffer. */
-static int aice_usb_read(uint8_t *in_buffer, int expected_size)
-{
- int32_t result = usb_bulk_read_ex(aice_handler.usb_handle, aice_handler.usb_read_ep,
- (char *)in_buffer, expected_size, AICE_USB_TIMEOUT);
-
- DEBUG_JTAG_IO("aice_usb_read, result = %" PRId32, result);
-
- return result;
-}
-
-static uint8_t usb_out_packets_buffer[AICE_OUT_PACKETS_BUFFER_SIZE];
-static uint8_t usb_in_packets_buffer[AICE_IN_PACKETS_BUFFER_SIZE];
-static uint32_t usb_out_packets_buffer_length;
-static uint32_t usb_in_packets_buffer_length;
-static enum aice_command_mode aice_command_mode;
-
-static int aice_batch_buffer_write(uint8_t buf_index, const uint8_t *word,
- uint32_t num_of_words);
-
-static int aice_usb_packet_flush(void)
-{
- if (usb_out_packets_buffer_length == 0)
- return 0;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- LOG_DEBUG("Flush usb packets (AICE_COMMAND_MODE_PACK)");
-
- if (aice_usb_write(usb_out_packets_buffer,
- usb_out_packets_buffer_length) < 0)
- return ERROR_FAIL;
-
- if (aice_usb_read(usb_in_packets_buffer,
- usb_in_packets_buffer_length) < 0)
- return ERROR_FAIL;
-
- usb_out_packets_buffer_length = 0;
- usb_in_packets_buffer_length = 0;
-
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- LOG_DEBUG("Flush usb packets (AICE_COMMAND_MODE_BATCH)");
-
- /* use BATCH_BUFFER_WRITE to fill command-batch-buffer */
- if (aice_batch_buffer_write(AICE_BATCH_COMMAND_BUFFER_0,
- usb_out_packets_buffer,
- (usb_out_packets_buffer_length + 3) / 4) != ERROR_OK)
- return ERROR_FAIL;
-
- usb_out_packets_buffer_length = 0;
- usb_in_packets_buffer_length = 0;
-
- /* enable BATCH command */
- aice_command_mode = AICE_COMMAND_MODE_NORMAL;
- if (aice_write_ctrl(AICE_WRITE_CTRL_BATCH_CTRL, 0x80000000) != ERROR_OK)
- return ERROR_FAIL;
- aice_command_mode = AICE_COMMAND_MODE_BATCH;
-
- /* wait 1 second (AICE bug, workaround) */
- alive_sleep(1000);
-
- /* check status */
- uint32_t i;
- uint32_t batch_status;
-
- i = 0;
- while (1) {
- aice_read_ctrl(AICE_READ_CTRL_BATCH_STATUS, &batch_status);
-
- if (batch_status & 0x1)
- return ERROR_OK;
- else if (batch_status & 0xE)
- return ERROR_FAIL;
-
- if ((i % 30) == 0)
- keep_alive();
-
- i++;
- }
- }
-
- return ERROR_OK;
-}
-
-static int aice_usb_packet_append(uint8_t *out_buffer, int out_length, int in_length)
-{
- uint32_t max_packet_size = AICE_OUT_PACKETS_BUFFER_SIZE;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- max_packet_size = AICE_OUT_PACK_COMMAND_SIZE;
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- max_packet_size = AICE_OUT_BATCH_COMMAND_SIZE;
- } else {
- /* AICE_COMMAND_MODE_NORMAL */
- if (aice_usb_packet_flush() != ERROR_OK)
- return ERROR_FAIL;
- }
-
- if (usb_out_packets_buffer_length + out_length > max_packet_size)
- if (aice_usb_packet_flush() != ERROR_OK) {
- LOG_DEBUG("Flush usb packets failed");
- return ERROR_FAIL;
- }
-
- LOG_DEBUG("Append usb packets 0x%02x", out_buffer[0]);
-
- memcpy(usb_out_packets_buffer + usb_out_packets_buffer_length, out_buffer, out_length);
- usb_out_packets_buffer_length += out_length;
- usb_in_packets_buffer_length += in_length;
-
- return ERROR_OK;
-}
-
-/***************************************************************************/
-/* AICE commands */
-static int aice_reset_box(void)
-{
- if (aice_write_ctrl(AICE_WRITE_CTRL_CLEAR_TIMEOUT_STATUS, 0x1) != ERROR_OK)
- return ERROR_FAIL;
-
- /* turn off FASTMODE */
- uint32_t pin_status;
- if (aice_read_ctrl(AICE_READ_CTRL_GET_JTAG_PIN_STATUS, &pin_status)
- != ERROR_OK)
- return ERROR_FAIL;
-
- if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_STATUS, pin_status & (~0x2))
- != ERROR_OK)
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-static int aice_scan_chain(uint32_t *id_codes, uint8_t *num_of_ids)
-{
- int32_t result;
- int retry_times = 0;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- do {
- aice_pack_htda(AICE_CMD_SCAN_CHAIN, 0x0F, 0x0);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDA);
-
- LOG_DEBUG("SCAN_CHAIN, length: 0x0F");
-
- /** TODO: modify receive length */
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHA);
- if (AICE_FORMAT_DTHA != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRIu32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHA, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- aice_unpack_dtha_multiple_data(&cmd_ack_code, num_of_ids, id_codes,
- 0x10, AICE_LITTLE_ENDIAN);
-
- if (cmd_ack_code != AICE_CMD_SCAN_CHAIN) {
-
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_SCAN_CHAIN, cmd_ack_code);
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- continue;
- }
-
- LOG_DEBUG("SCAN_CHAIN response, # of IDs: %" PRIu8, *num_of_ids);
-
- if (*num_of_ids == 0xFF) {
- LOG_ERROR("No target connected");
- return ERROR_FAIL;
- } else if (*num_of_ids == AICE_MAX_NUM_CORE) {
- LOG_INFO("The ice chain over 16 targets");
- } else {
- (*num_of_ids)++;
- }
- break;
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_read_ctrl(uint32_t address, uint32_t *data)
-{
- int32_t result;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- aice_pack_htda(AICE_CMD_READ_CTRL, 0, address);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDA);
-
- LOG_DEBUG("READ_CTRL, address: 0x%" PRIx32, address);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHA);
- if (AICE_FORMAT_DTHA != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRIu32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHA, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- aice_unpack_dtha(&cmd_ack_code, &extra_length, data, AICE_LITTLE_ENDIAN);
-
- LOG_DEBUG("READ_CTRL response, data: 0x%" PRIx32, *data);
-
- if (cmd_ack_code != AICE_CMD_READ_CTRL) {
- LOG_ERROR("aice command error (command=0x%" PRIx32 ", response=0x%" PRIx8 ")",
- (uint32_t)AICE_CMD_READ_CTRL, cmd_ack_code);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-int aice_write_ctrl(uint32_t address, uint32_t data)
-{
- int32_t result;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdc(AICE_CMD_WRITE_CTRL, 0, address, data, AICE_LITTLE_ENDIAN);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDC,
- AICE_FORMAT_DTHB);
- }
-
- aice_pack_htdc(AICE_CMD_WRITE_CTRL, 0, address, data, AICE_LITTLE_ENDIAN);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDC);
-
- LOG_DEBUG("WRITE_CTRL, address: 0x%" PRIx32 ", data: 0x%" PRIx32, address, data);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHB);
- if (AICE_FORMAT_DTHB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRIu32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- aice_unpack_dthb(&cmd_ack_code, &extra_length);
-
- LOG_DEBUG("WRITE_CTRL response");
-
- if (cmd_ack_code != AICE_CMD_WRITE_CTRL) {
- LOG_ERROR("aice command error (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_WRITE_CTRL, cmd_ack_code);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-int aice_read_dtr(uint8_t target_id, uint32_t *data)
-{
- int32_t result;
- int retry_times = 0;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- do {
- aice_pack_htdma(AICE_CMD_T_READ_DTR, target_id, 0, 0);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMA);
-
- LOG_DEBUG("READ_DTR, COREID: %" PRIu8, target_id);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA);
- if (AICE_FORMAT_DTHMA != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMA, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthma(&cmd_ack_code, &res_target_id, &extra_length,
- data, AICE_LITTLE_ENDIAN);
-
- if (cmd_ack_code == AICE_CMD_T_READ_DTR) {
- LOG_DEBUG("READ_DTR response, data: 0x%" PRIx32, *data);
- break;
- } else {
-
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_READ_DTR, cmd_ack_code);
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_read_dtr_to_buffer(uint8_t target_id, uint32_t buffer_idx)
-{
- int32_t result;
- int retry_times = 0;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdma(AICE_CMD_READ_DTR_TO_BUFFER, target_id, 0, buffer_idx);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMA,
- AICE_FORMAT_DTHMB);
- }
-
- do {
- aice_pack_htdma(AICE_CMD_READ_DTR_TO_BUFFER, target_id, 0, buffer_idx);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMA);
-
- LOG_DEBUG("READ_DTR_TO_BUFFER, COREID: %" PRIu8, target_id);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_READ_DTR_TO_BUFFER) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_READ_DTR_TO_BUFFER, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_write_dtr(uint8_t target_id, uint32_t data)
-{
- int32_t result;
- int retry_times = 0;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdmc(AICE_CMD_T_WRITE_DTR, target_id, 0, 0, data, AICE_LITTLE_ENDIAN);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMC,
- AICE_FORMAT_DTHMB);
- }
-
- do {
- aice_pack_htdmc(AICE_CMD_T_WRITE_DTR, target_id, 0, 0, data, AICE_LITTLE_ENDIAN);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMC);
-
- LOG_DEBUG("WRITE_DTR, COREID: %" PRIu8 ", data: 0x%" PRIx32, target_id, data);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_T_WRITE_DTR) {
- LOG_DEBUG("WRITE_DTR response");
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_WRITE_DTR, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_write_dtr_from_buffer(uint8_t target_id, uint32_t buffer_idx)
-{
- int32_t result;
- int retry_times = 0;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdma(AICE_CMD_WRITE_DTR_FROM_BUFFER, target_id, 0, buffer_idx);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMA,
- AICE_FORMAT_DTHMB);
- }
-
- do {
- aice_pack_htdma(AICE_CMD_WRITE_DTR_FROM_BUFFER, target_id, 0, buffer_idx);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMA);
-
- LOG_DEBUG("WRITE_DTR_FROM_BUFFER, COREID: %" PRIu8 "", target_id);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_WRITE_DTR_FROM_BUFFER) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_WRITE_DTR_FROM_BUFFER, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_read_misc(uint8_t target_id, uint32_t address, uint32_t *data)
-{
- int32_t result;
- int retry_times = 0;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- do {
- aice_pack_htdma(AICE_CMD_T_READ_MISC, target_id, 0, address);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMA);
-
- LOG_DEBUG("READ_MISC, COREID: %" PRIu8 ", address: 0x%" PRIx32, target_id, address);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA);
- if (AICE_FORMAT_DTHMA != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMA, result);
- return ERROR_AICE_DISCONNECT;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthma(&cmd_ack_code, &res_target_id, &extra_length,
- data, AICE_LITTLE_ENDIAN);
-
- if (cmd_ack_code == AICE_CMD_T_READ_MISC) {
- LOG_DEBUG("READ_MISC response, data: 0x%" PRIx32, *data);
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_READ_MISC, cmd_ack_code);
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_write_misc(uint8_t target_id, uint32_t address, uint32_t data)
-{
- int32_t result;
- int retry_times = 0;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdmc(AICE_CMD_T_WRITE_MISC, target_id, 0, address, data,
- AICE_LITTLE_ENDIAN);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMC,
- AICE_FORMAT_DTHMB);
- }
-
- do {
- aice_pack_htdmc(AICE_CMD_T_WRITE_MISC, target_id, 0, address,
- data, AICE_LITTLE_ENDIAN);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMC);
-
- LOG_DEBUG("WRITE_MISC, COREID: %" PRIu8 ", address: 0x%" PRIx32 ", data: 0x%" PRIx32,
- target_id, address, data);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_T_WRITE_MISC) {
- LOG_DEBUG("WRITE_MISC response");
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_WRITE_MISC, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_read_edmsr(uint8_t target_id, uint32_t address, uint32_t *data)
-{
- int32_t result;
- int retry_times = 0;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- do {
- aice_pack_htdma(AICE_CMD_T_READ_EDMSR, target_id, 0, address);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMA);
-
- LOG_DEBUG("READ_EDMSR, COREID: %" PRIu8 ", address: 0x%" PRIx32, target_id, address);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA);
- if (AICE_FORMAT_DTHMA != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMA, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthma(&cmd_ack_code, &res_target_id, &extra_length,
- data, AICE_LITTLE_ENDIAN);
-
- if (cmd_ack_code == AICE_CMD_T_READ_EDMSR) {
- LOG_DEBUG("READ_EDMSR response, data: 0x%" PRIx32, *data);
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_READ_EDMSR, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_write_edmsr(uint8_t target_id, uint32_t address, uint32_t data)
-{
- int32_t result;
- int retry_times = 0;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdmc(AICE_CMD_T_WRITE_EDMSR, target_id, 0, address, data,
- AICE_LITTLE_ENDIAN);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMC,
- AICE_FORMAT_DTHMB);
- }
-
- do {
- aice_pack_htdmc(AICE_CMD_T_WRITE_EDMSR, target_id, 0, address,
- data, AICE_LITTLE_ENDIAN);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMC);
-
- LOG_DEBUG("WRITE_EDMSR, COREID: %" PRIu8 ", address: 0x%" PRIx32 ", data: 0x%" PRIx32,
- target_id, address, data);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_T_WRITE_EDMSR) {
- LOG_DEBUG("WRITE_EDMSR response");
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_WRITE_EDMSR, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-static int aice_switch_to_big_endian(uint32_t *word, uint8_t num_of_words)
-{
- uint32_t tmp;
-
- for (uint8_t i = 0 ; i < num_of_words ; i++) {
- tmp = ((word[i] >> 24) & 0x000000FF) |
- ((word[i] >> 8) & 0x0000FF00) |
- ((word[i] << 8) & 0x00FF0000) |
- ((word[i] << 24) & 0xFF000000);
- word[i] = tmp;
- }
-
- return ERROR_OK;
-}
-
-static int aice_write_dim(uint8_t target_id, uint32_t *word, uint8_t num_of_words)
-{
- int32_t result;
- uint32_t big_endian_word[4];
- int retry_times = 0;
-
- /** instruction is big-endian */
- memcpy(big_endian_word, word, sizeof(big_endian_word));
- aice_switch_to_big_endian(big_endian_word, num_of_words);
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdmc_multiple_data(AICE_CMD_T_WRITE_DIM, target_id,
- num_of_words - 1, 0, big_endian_word, num_of_words,
- AICE_LITTLE_ENDIAN);
- return aice_usb_packet_append(usb_out_buffer,
- AICE_FORMAT_HTDMC + (num_of_words - 1) * 4,
- AICE_FORMAT_DTHMB);
- }
-
- do {
- aice_pack_htdmc_multiple_data(AICE_CMD_T_WRITE_DIM, target_id, num_of_words - 1, 0,
- big_endian_word, num_of_words, AICE_LITTLE_ENDIAN);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMC + (num_of_words - 1) * 4);
-
- LOG_DEBUG("WRITE_DIM, COREID: %" PRIu8
- ", data: 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32,
- target_id,
- big_endian_word[0],
- big_endian_word[1],
- big_endian_word[2],
- big_endian_word[3]);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
-
- if (cmd_ack_code == AICE_CMD_T_WRITE_DIM) {
- LOG_DEBUG("WRITE_DIM response");
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8
- ", response=0x%" PRIx8 ")",
- AICE_CMD_T_WRITE_DIM, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-static int aice_do_execute(uint8_t target_id)
-{
- int32_t result;
- int retry_times = 0;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdmc(AICE_CMD_T_EXECUTE, target_id, 0, 0, 0, AICE_LITTLE_ENDIAN);
- return aice_usb_packet_append(usb_out_buffer,
- AICE_FORMAT_HTDMC,
- AICE_FORMAT_DTHMB);
- }
-
- do {
- aice_pack_htdmc(AICE_CMD_T_EXECUTE, target_id, 0, 0, 0, AICE_LITTLE_ENDIAN);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMC);
-
- LOG_DEBUG("EXECUTE, COREID: %" PRIu8 "", target_id);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_T_EXECUTE) {
- LOG_DEBUG("EXECUTE response");
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_EXECUTE, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_write_mem_b(uint8_t target_id, uint32_t address, uint32_t data)
-{
- int32_t result;
- int retry_times = 0;
-
- LOG_DEBUG("WRITE_MEM_B, COREID: %" PRIu8 ", ADDRESS %08" PRIx32 " VALUE %08" PRIx32,
- target_id,
- address,
- data);
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode)) {
- aice_pack_htdmd(AICE_CMD_T_WRITE_MEM_B, target_id, 0, address,
- data & 0x000000FF, data_endian);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMD,
- AICE_FORMAT_DTHMB);
- } else {
- do {
- aice_pack_htdmd(AICE_CMD_T_WRITE_MEM_B, target_id, 0,
- address, data & 0x000000FF, data_endian);
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32
- ", result=%" PRId32 ")", AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_T_WRITE_MEM_B) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_WRITE_MEM_B, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
- }
-
- return ERROR_OK;
-}
-
-int aice_write_mem_h(uint8_t target_id, uint32_t address, uint32_t data)
-{
- int32_t result;
- int retry_times = 0;
-
- LOG_DEBUG("WRITE_MEM_H, COREID: %" PRIu8 ", ADDRESS %08" PRIx32 " VALUE %08" PRIx32,
- target_id,
- address,
- data);
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode)) {
- aice_pack_htdmd(AICE_CMD_T_WRITE_MEM_H, target_id, 0,
- (address >> 1) & 0x7FFFFFFF, data & 0x0000FFFF, data_endian);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMD,
- AICE_FORMAT_DTHMB);
- } else {
- do {
- aice_pack_htdmd(AICE_CMD_T_WRITE_MEM_H, target_id, 0,
- (address >> 1) & 0x7FFFFFFF, data & 0x0000FFFF, data_endian);
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_T_WRITE_MEM_H) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_WRITE_MEM_H, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
- }
-
- return ERROR_OK;
-}
-
-int aice_write_mem(uint8_t target_id, uint32_t address, uint32_t data)
-{
- int32_t result;
- int retry_times = 0;
-
- LOG_DEBUG("WRITE_MEM, COREID: %" PRIu8 ", ADDRESS %08" PRIx32 " VALUE %08" PRIx32,
- target_id,
- address,
- data);
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode)) {
- aice_pack_htdmd(AICE_CMD_T_WRITE_MEM, target_id, 0,
- (address >> 2) & 0x3FFFFFFF, data, data_endian);
- return aice_usb_packet_append(usb_out_buffer, AICE_FORMAT_HTDMD,
- AICE_FORMAT_DTHMB);
- } else {
- do {
- aice_pack_htdmd(AICE_CMD_T_WRITE_MEM, target_id, 0,
- (address >> 2) & 0x3FFFFFFF, data, data_endian);
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_T_WRITE_MEM) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_WRITE_MEM, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
- }
-
- return ERROR_OK;
-}
-
-int aice_fastread_mem(uint8_t target_id, uint8_t *word, uint32_t num_of_words)
-{
- int32_t result;
- int retry_times = 0;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- do {
- aice_pack_htdmb(AICE_CMD_T_FASTREAD_MEM, target_id, num_of_words - 1, 0);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMB);
-
- LOG_DEBUG("FASTREAD_MEM, COREID: %" PRIu8 ", # of DATA %08" PRIx32,
- target_id, num_of_words);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA + (num_of_words - 1) * 4);
- if (result < 0) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMA + (num_of_words - 1) * 4, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthma_multiple_data(&cmd_ack_code, &res_target_id,
- &extra_length, word, data_endian);
-
- if (cmd_ack_code == AICE_CMD_T_FASTREAD_MEM) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_FASTREAD_MEM, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_fastwrite_mem(uint8_t target_id, const uint8_t *word, uint32_t num_of_words)
-{
- int32_t result;
- int retry_times = 0;
-
- if (AICE_COMMAND_MODE_PACK == aice_command_mode) {
- aice_usb_packet_flush();
- } else if (AICE_COMMAND_MODE_BATCH == aice_command_mode) {
- aice_pack_htdmd_multiple_data(AICE_CMD_T_FASTWRITE_MEM, target_id,
- num_of_words - 1, 0, word, data_endian);
- return aice_usb_packet_append(usb_out_buffer,
- AICE_FORMAT_HTDMD + (num_of_words - 1) * 4,
- AICE_FORMAT_DTHMB);
- }
-
- do {
- aice_pack_htdmd_multiple_data(AICE_CMD_T_FASTWRITE_MEM, target_id,
- num_of_words - 1, 0, word, data_endian);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMD + (num_of_words - 1) * 4);
-
- LOG_DEBUG("FASTWRITE_MEM, COREID: %" PRIu8 ", # of DATA %08" PRIx32,
- target_id, num_of_words);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_T_FASTWRITE_MEM) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_FASTWRITE_MEM, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_read_mem_b(uint8_t target_id, uint32_t address, uint32_t *data)
-{
- int32_t result;
- int retry_times = 0;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- do {
- aice_pack_htdmb(AICE_CMD_T_READ_MEM_B, target_id, 0, address);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMB);
-
- LOG_DEBUG("READ_MEM_B, COREID: %" PRIu8 "", target_id);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA);
- if (AICE_FORMAT_DTHMA != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMA, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthma(&cmd_ack_code, &res_target_id, &extra_length,
- data, data_endian);
-
- if (cmd_ack_code == AICE_CMD_T_READ_MEM_B) {
- LOG_DEBUG("READ_MEM_B response, data: 0x%02" PRIx32, *data);
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_READ_MEM_B, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_read_mem_h(uint8_t target_id, uint32_t address, uint32_t *data)
-{
- int32_t result;
- int retry_times = 0;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- do {
- aice_pack_htdmb(AICE_CMD_T_READ_MEM_H, target_id, 0, (address >> 1) & 0x7FFFFFFF);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMB);
-
- LOG_DEBUG("READ_MEM_H, CORE_ID: %" PRIu8 "", target_id);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA);
- if (AICE_FORMAT_DTHMA != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMA, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthma(&cmd_ack_code, &res_target_id, &extra_length,
- data, data_endian);
-
- if (cmd_ack_code == AICE_CMD_T_READ_MEM_H) {
- LOG_DEBUG("READ_MEM_H response, data: 0x%" PRIx32, *data);
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_READ_MEM_H, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_read_mem(uint8_t target_id, uint32_t address, uint32_t *data)
-{
- int32_t result;
- int retry_times = 0;
-
- if ((AICE_COMMAND_MODE_PACK == aice_command_mode) ||
- (AICE_COMMAND_MODE_BATCH == aice_command_mode))
- aice_usb_packet_flush();
-
- do {
- aice_pack_htdmb(AICE_CMD_T_READ_MEM, target_id, 0,
- (address >> 2) & 0x3FFFFFFF);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMB);
-
- LOG_DEBUG("READ_MEM, COREID: %" PRIu8 "", target_id);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA);
- if (AICE_FORMAT_DTHMA != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMA, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthma(&cmd_ack_code, &res_target_id, &extra_length,
- data, data_endian);
-
- if (cmd_ack_code == AICE_CMD_T_READ_MEM) {
- LOG_DEBUG("READ_MEM response, data: 0x%" PRIx32, *data);
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_T_READ_MEM, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_batch_buffer_read(uint8_t buf_index, uint32_t *word, uint32_t num_of_words)
-{
- int32_t result;
- int retry_times = 0;
-
- do {
- aice_pack_htdma(AICE_CMD_BATCH_BUFFER_READ, 0, num_of_words - 1, buf_index);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMA);
-
- LOG_DEBUG("BATCH_BUFFER_READ, # of DATA %08" PRIx32, num_of_words);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMA + (num_of_words - 1) * 4);
- if (result < 0) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMA + (num_of_words - 1) * 4, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthma_multiple_data(&cmd_ack_code, &res_target_id,
- &extra_length, (uint8_t *)word, data_endian);
-
- if (cmd_ack_code == AICE_CMD_BATCH_BUFFER_READ) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_BATCH_BUFFER_READ, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-int aice_batch_buffer_write(uint8_t buf_index, const uint8_t *word, uint32_t num_of_words)
-{
- int32_t result;
- int retry_times = 0;
-
- if (num_of_words == 0)
- return ERROR_OK;
-
- do {
- /* only pack AICE_CMD_BATCH_BUFFER_WRITE command header */
- aice_pack_htdmc(AICE_CMD_BATCH_BUFFER_WRITE, 0, num_of_words - 1, buf_index,
- 0, data_endian);
-
- /* use append instead of pack */
- memcpy(usb_out_buffer + 4, word, num_of_words * 4);
-
- aice_usb_write(usb_out_buffer, AICE_FORMAT_HTDMC + (num_of_words - 1) * 4);
-
- LOG_DEBUG("BATCH_BUFFER_WRITE, # of DATA %08" PRIx32, num_of_words);
-
- result = aice_usb_read(usb_in_buffer, AICE_FORMAT_DTHMB);
- if (AICE_FORMAT_DTHMB != result) {
- LOG_ERROR("aice_usb_read failed (requested=%" PRId32 ", result=%" PRId32 ")",
- AICE_FORMAT_DTHMB, result);
- return ERROR_FAIL;
- }
-
- uint8_t cmd_ack_code;
- uint8_t extra_length;
- uint8_t res_target_id;
- aice_unpack_dthmb(&cmd_ack_code, &res_target_id, &extra_length);
-
- if (cmd_ack_code == AICE_CMD_BATCH_BUFFER_WRITE) {
- break;
- } else {
- if (retry_times > aice_max_retry_times) {
- LOG_ERROR("aice command timeout (command=0x%" PRIx8 ", response=0x%" PRIx8 ")",
- AICE_CMD_BATCH_BUFFER_WRITE, cmd_ack_code);
-
- return ERROR_FAIL;
- }
-
- /* clear timeout and retry */
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- retry_times++;
- }
- } while (1);
-
- return ERROR_OK;
-}
-
-/***************************************************************************/
-/* End of AICE commands */
-
-typedef int (*read_mem_func_t)(uint32_t coreid, uint32_t address, uint32_t *data);
-typedef int (*write_mem_func_t)(uint32_t coreid, uint32_t address, uint32_t data);
-
-struct aice_nds32_info core_info[AICE_MAX_NUM_CORE];
-static uint8_t total_num_of_core;
-
-static char *custom_srst_script;
-static char *custom_trst_script;
-static char *custom_restart_script;
-static uint32_t aice_count_to_check_dbger = 30;
-
-static int aice_read_reg(uint32_t coreid, uint32_t num, uint32_t *val);
-static int aice_write_reg(uint32_t coreid, uint32_t num, uint32_t val);
-
-static int check_suppressed_exception(uint32_t coreid, uint32_t dbger_value)
-{
- uint32_t ir4_value;
- uint32_t ir6_value;
- /* the default value of handling_suppressed_exception is false */
- static bool handling_suppressed_exception;
-
- if (handling_suppressed_exception)
- return ERROR_OK;
-
- if ((dbger_value & NDS_DBGER_ALL_SUPRS_EX) == NDS_DBGER_ALL_SUPRS_EX) {
- LOG_ERROR("<-- TARGET WARNING! Exception is detected and suppressed. -->");
- handling_suppressed_exception = true;
-
- aice_read_reg(coreid, IR4, &ir4_value);
- /* Clear IR6.SUPRS_EXC, IR6.IMP_EXC */
- aice_read_reg(coreid, IR6, &ir6_value);
- /*
- * For MCU version(MSC_CFG.MCU == 1) like V3m
- * | SWID[30:16] | Reserved[15:10] | SUPRS_EXC[9] | IMP_EXC[8]
- * |VECTOR[7:5] | INST[4] | Exc Type[3:0] |
- *
- * For non-MCU version(MSC_CFG.MCU == 0) like V3
- * | SWID[30:16] | Reserved[15:14] | SUPRS_EXC[13] | IMP_EXC[12]
- * | VECTOR[11:5] | INST[4] | Exc Type[3:0] |
- */
- LOG_INFO("EVA: 0x%08" PRIx32, ir4_value);
- LOG_INFO("ITYPE: 0x%08" PRIx32, ir6_value);
-
- ir6_value = ir6_value & (~0x300); /* for MCU */
- ir6_value = ir6_value & (~0x3000); /* for non-MCU */
- aice_write_reg(coreid, IR6, ir6_value);
-
- handling_suppressed_exception = false;
- }
-
- return ERROR_OK;
-}
-
-static int check_privilege(uint32_t coreid, uint32_t dbger_value)
-{
- if ((dbger_value & NDS_DBGER_ILL_SEC_ACC) == NDS_DBGER_ILL_SEC_ACC) {
- LOG_ERROR("<-- TARGET ERROR! Insufficient security privilege "
- "to execute the debug operations. -->");
-
- /* Clear DBGER.ILL_SEC_ACC */
- if (aice_write_misc(coreid, NDS_EDM_MISC_DBGER,
- NDS_DBGER_ILL_SEC_ACC) != ERROR_OK)
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int aice_check_dbger(uint32_t coreid, uint32_t expect_status)
-{
- uint32_t i = 0;
- uint32_t value_dbger;
-
- while (1) {
- aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &value_dbger);
-
- if ((value_dbger & expect_status) == expect_status) {
- if (ERROR_OK != check_suppressed_exception(coreid, value_dbger))
- return ERROR_FAIL;
- if (ERROR_OK != check_privilege(coreid, value_dbger))
- return ERROR_FAIL;
- return ERROR_OK;
- }
-
- if ((i % 30) == 0)
- keep_alive();
-
- long long then = 0;
- if (i == aice_count_to_check_dbger)
- then = timeval_ms();
- if (i >= aice_count_to_check_dbger) {
- if ((timeval_ms() - then) > 1000) {
- LOG_ERROR("Timeout (1000ms) waiting for $DBGER status "
- "being 0x%08" PRIx32, expect_status);
- return ERROR_FAIL;
- }
- }
- i++;
- }
-
- return ERROR_FAIL;
-}
-
-static int aice_execute_dim(uint32_t coreid, uint32_t *insts, uint8_t n_inst)
-{
- /** fill DIM */
- if (aice_write_dim(coreid, insts, n_inst) != ERROR_OK)
- return ERROR_FAIL;
-
- /** clear DBGER.DPED */
- if (aice_write_misc(coreid, NDS_EDM_MISC_DBGER, NDS_DBGER_DPED) != ERROR_OK)
- return ERROR_FAIL;
-
- /** execute DIM */
- if (aice_do_execute(coreid) != ERROR_OK)
- return ERROR_FAIL;
-
- /** read DBGER.DPED */
- if (aice_check_dbger(coreid, NDS_DBGER_DPED) != ERROR_OK) {
- LOG_ERROR("<-- TARGET ERROR! Debug operations do not finish properly: "
- "0x%08" PRIx32 "0x%08" PRIx32 "0x%08" PRIx32 "0x%08" PRIx32 ". -->",
- insts[0],
- insts[1],
- insts[2],
- insts[3]);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int aice_read_reg(uint32_t coreid, uint32_t num, uint32_t *val)
-{
- LOG_DEBUG("aice_read_reg, reg_no: 0x%08" PRIx32, num);
-
- uint32_t instructions[4]; /** execute instructions in DIM */
-
- if (NDS32_REG_TYPE_GPR == nds32_reg_type(num)) { /* general registers */
- instructions[0] = MTSR_DTR(num);
- instructions[1] = DSB;
- instructions[2] = NOP;
- instructions[3] = BEQ_MINUS_12;
- } else if (NDS32_REG_TYPE_SPR == nds32_reg_type(num)) { /* user special registers */
- instructions[0] = MFUSR_G0(0, nds32_reg_sr_index(num));
- instructions[1] = MTSR_DTR(0);
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else if (NDS32_REG_TYPE_AUMR == nds32_reg_type(num)) { /* audio registers */
- if ((CB_CTL <= num) && (num <= CBE3)) {
- instructions[0] = AMFAR2(0, nds32_reg_sr_index(num));
- instructions[1] = MTSR_DTR(0);
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else {
- instructions[0] = AMFAR(0, nds32_reg_sr_index(num));
- instructions[1] = MTSR_DTR(0);
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- }
- } else if (NDS32_REG_TYPE_FPU == nds32_reg_type(num)) { /* fpu registers */
- if (FPCSR == num) {
- instructions[0] = FMFCSR;
- instructions[1] = MTSR_DTR(0);
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else if (FPCFG == num) {
- instructions[0] = FMFCFG;
- instructions[1] = MTSR_DTR(0);
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else {
- if (FS0 <= num && num <= FS31) { /* single precision */
- instructions[0] = FMFSR(0, nds32_reg_sr_index(num));
- instructions[1] = MTSR_DTR(0);
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else if (FD0 <= num && num <= FD31) { /* double precision */
- instructions[0] = FMFDR(0, nds32_reg_sr_index(num));
- instructions[1] = MTSR_DTR(0);
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- }
- }
- } else { /* system registers */
- instructions[0] = MFSR(0, nds32_reg_sr_index(num));
- instructions[1] = MTSR_DTR(0);
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- }
-
- aice_execute_dim(coreid, instructions, 4);
-
- uint32_t value_edmsw;
- aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw);
- if (value_edmsw & NDS_EDMSW_WDV)
- aice_read_dtr(coreid, val);
- else {
- LOG_ERROR("<-- TARGET ERROR! The debug target failed to update "
- "the DTR register. -->");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int aice_usb_read_reg(uint32_t coreid, uint32_t num, uint32_t *val)
-{
- LOG_DEBUG("aice_usb_read_reg");
-
- if (num == R0) {
- *val = core_info[coreid].r0_backup;
- } else if (num == R1) {
- *val = core_info[coreid].r1_backup;
- } else if (num == DR41) {
- /* As target is halted, OpenOCD will backup DR41/DR42/DR43.
- * As user wants to read these registers, OpenOCD should return
- * the backup values, instead of reading the real values.
- * As user wants to write these registers, OpenOCD should write
- * to the backup values, instead of writing to real registers. */
- *val = core_info[coreid].edmsw_backup;
- } else if (num == DR42) {
- *val = core_info[coreid].edm_ctl_backup;
- } else if ((core_info[coreid].target_dtr_valid == true) && (num == DR43)) {
- *val = core_info[coreid].target_dtr_backup;
- } else {
- if (ERROR_OK != aice_read_reg(coreid, num, val))
- *val = 0xBBADBEEF;
- }
-
- return ERROR_OK;
-}
-
-static int aice_write_reg(uint32_t coreid, uint32_t num, uint32_t val)
-{
- LOG_DEBUG("aice_write_reg, reg_no: 0x%08" PRIx32 ", value: 0x%08" PRIx32, num, val);
-
- uint32_t instructions[4]; /** execute instructions in DIM */
- uint32_t value_edmsw;
-
- aice_write_dtr(coreid, val);
- aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw);
- if (0 == (value_edmsw & NDS_EDMSW_RDV)) {
- LOG_ERROR("<-- TARGET ERROR! AICE failed to write to the DTR register. -->");
- return ERROR_FAIL;
- }
-
- if (NDS32_REG_TYPE_GPR == nds32_reg_type(num)) { /* general registers */
- instructions[0] = MFSR_DTR(num);
- instructions[1] = DSB;
- instructions[2] = NOP;
- instructions[3] = BEQ_MINUS_12;
- } else if (NDS32_REG_TYPE_SPR == nds32_reg_type(num)) { /* user special registers */
- instructions[0] = MFSR_DTR(0);
- instructions[1] = MTUSR_G0(0, nds32_reg_sr_index(num));
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else if (NDS32_REG_TYPE_AUMR == nds32_reg_type(num)) { /* audio registers */
- if ((CB_CTL <= num) && (num <= CBE3)) {
- instructions[0] = MFSR_DTR(0);
- instructions[1] = AMTAR2(0, nds32_reg_sr_index(num));
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else {
- instructions[0] = MFSR_DTR(0);
- instructions[1] = AMTAR(0, nds32_reg_sr_index(num));
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- }
- } else if (NDS32_REG_TYPE_FPU == nds32_reg_type(num)) { /* fpu registers */
- if (FPCSR == num) {
- instructions[0] = MFSR_DTR(0);
- instructions[1] = FMTCSR;
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else if (FPCFG == num) {
- /* FPCFG is readonly */
- } else {
- if (FS0 <= num && num <= FS31) { /* single precision */
- instructions[0] = MFSR_DTR(0);
- instructions[1] = FMTSR(0, nds32_reg_sr_index(num));
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- } else if (FD0 <= num && num <= FD31) { /* double precision */
- instructions[0] = MFSR_DTR(0);
- instructions[1] = FMTDR(0, nds32_reg_sr_index(num));
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- }
- }
- } else {
- instructions[0] = MFSR_DTR(0);
- instructions[1] = MTSR(0, nds32_reg_sr_index(num));
- instructions[2] = DSB;
- instructions[3] = BEQ_MINUS_12;
- }
-
- return aice_execute_dim(coreid, instructions, 4);
-}
-
-static int aice_usb_write_reg(uint32_t coreid, uint32_t num, uint32_t val)
-{
- LOG_DEBUG("aice_usb_write_reg");
-
- if (num == R0)
- core_info[coreid].r0_backup = val;
- else if (num == R1)
- core_info[coreid].r1_backup = val;
- else if (num == DR42)
- /* As target is halted, OpenOCD will backup DR41/DR42/DR43.
- * As user wants to read these registers, OpenOCD should return
- * the backup values, instead of reading the real values.
- * As user wants to write these registers, OpenOCD should write
- * to the backup values, instead of writing to real registers. */
- core_info[coreid].edm_ctl_backup = val;
- else if ((core_info[coreid].target_dtr_valid == true) && (num == DR43))
- core_info[coreid].target_dtr_backup = val;
- else
- return aice_write_reg(coreid, num, val);
-
- return ERROR_OK;
-}
-
-static int aice_usb_open(struct aice_port_param_s *param)
-{
- const uint16_t vids[] = { param->vid, 0 };
- const uint16_t pids[] = { param->pid, 0 };
- struct jtag_libusb_device_handle *devh;
-
- if (jtag_libusb_open(vids, pids, NULL, &devh) != ERROR_OK)
- return ERROR_FAIL;
-
- /* BE ***VERY CAREFUL*** ABOUT MAKING CHANGES IN THIS
- * AREA!!!!!!!!!!! The behavior of libusb is not completely
- * consistent across Windows, Linux, and Mac OS X platforms.
- * The actions taken in the following compiler conditionals may
- * not agree with published documentation for libusb, but were
- * found to be necessary through trials and tribulations. Even
- * little tweaks can break one or more platforms, so if you do
- * make changes test them carefully on all platforms before
- * committing them!
- */
-
-#if IS_WIN32 == 0
-
- jtag_libusb_reset_device(devh);
-
-#if IS_DARWIN == 0
-
- int timeout = 5;
- /* reopen jlink after usb_reset
- * on win32 this may take a second or two to re-enumerate */
- int retval;
- while ((retval = jtag_libusb_open(vids, pids, NULL, &devh)) != ERROR_OK) {
- usleep(1000);
- timeout--;
- if (!timeout)
- break;
- }
- if (ERROR_OK != retval)
- return ERROR_FAIL;
-#endif
-
-#endif
-
- /* usb_set_configuration required under win32 */
- jtag_libusb_set_configuration(devh, 0);
-
- unsigned int aice_read_ep;
- unsigned int aice_write_ep;
- jtag_libusb_choose_interface(devh, &aice_read_ep, &aice_write_ep, -1, -1, -1);
-
- aice_handler.usb_read_ep = aice_read_ep;
- aice_handler.usb_write_ep = aice_write_ep;
- aice_handler.usb_handle = devh;
-
- return ERROR_OK;
-}
-
-static int aice_usb_read_reg_64(uint32_t coreid, uint32_t num, uint64_t *val)
-{
- LOG_DEBUG("aice_usb_read_reg_64, %s", nds32_reg_simple_name(num));
-
- uint32_t value;
- uint32_t high_value;
-
- if (ERROR_OK != aice_read_reg(coreid, num, &value))
- value = 0xBBADBEEF;
-
- aice_read_reg(coreid, R1, &high_value);
-
- LOG_DEBUG("low: 0x%08" PRIx32 ", high: 0x%08" PRIx32 "\n", value, high_value);
-
- if (data_endian == AICE_BIG_ENDIAN)
- *val = (((uint64_t)high_value) << 32) | value;
- else
- *val = (((uint64_t)value) << 32) | high_value;
-
- return ERROR_OK;
-}
-
-static int aice_usb_write_reg_64(uint32_t coreid, uint32_t num, uint64_t val)
-{
- uint32_t value;
- uint32_t high_value;
-
- if (data_endian == AICE_BIG_ENDIAN) {
- value = val & 0xFFFFFFFF;
- high_value = (val >> 32) & 0xFFFFFFFF;
- } else {
- high_value = val & 0xFFFFFFFF;
- value = (val >> 32) & 0xFFFFFFFF;
- }
-
- LOG_DEBUG("aice_usb_write_reg_64, %s, low: 0x%08" PRIx32 ", high: 0x%08" PRIx32 "\n",
- nds32_reg_simple_name(num), value, high_value);
-
- aice_write_reg(coreid, R1, high_value);
- return aice_write_reg(coreid, num, value);
-}
-
-static int aice_get_version_info(void)
-{
- uint32_t hardware_version;
- uint32_t firmware_version;
- uint32_t fpga_version;
-
- if (aice_read_ctrl(AICE_READ_CTRL_GET_HARDWARE_VERSION, &hardware_version) != ERROR_OK)
- return ERROR_FAIL;
-
- if (aice_read_ctrl(AICE_READ_CTRL_GET_FIRMWARE_VERSION, &firmware_version) != ERROR_OK)
- return ERROR_FAIL;
-
- if (aice_read_ctrl(AICE_READ_CTRL_GET_FPGA_VERSION, &fpga_version) != ERROR_OK)
- return ERROR_FAIL;
-
- LOG_INFO("AICE version: hw_ver = 0x%" PRIx32 ", fw_ver = 0x%" PRIx32 ", fpga_ver = 0x%" PRIx32,
- hardware_version, firmware_version, fpga_version);
-
- return ERROR_OK;
-}
-
-#define LINE_BUFFER_SIZE 1024
-
-static int aice_execute_custom_script(const char *script)
-{
- FILE *script_fd;
- char line_buffer[LINE_BUFFER_SIZE];
- char *op_str;
- char *reset_str;
- uint32_t delay;
- uint32_t write_ctrl_value;
- bool set_op;
-
- script_fd = fopen(script, "r");
- if (script_fd == NULL) {
- return ERROR_FAIL;
- } else {
- while (fgets(line_buffer, LINE_BUFFER_SIZE, script_fd) != NULL) {
- /* execute operations */
- set_op = false;
- op_str = strstr(line_buffer, "set");
- if (op_str != NULL) {
- set_op = true;
- goto get_reset_type;
- }
-
- op_str = strstr(line_buffer, "clear");
- if (op_str == NULL)
- continue;
-get_reset_type:
- reset_str = strstr(op_str, "srst");
- if (reset_str != NULL) {
- if (set_op)
- write_ctrl_value = AICE_CUSTOM_DELAY_SET_SRST;
- else
- write_ctrl_value = AICE_CUSTOM_DELAY_CLEAN_SRST;
- goto get_delay;
- }
- reset_str = strstr(op_str, "dbgi");
- if (reset_str != NULL) {
- if (set_op)
- write_ctrl_value = AICE_CUSTOM_DELAY_SET_DBGI;
- else
- write_ctrl_value = AICE_CUSTOM_DELAY_CLEAN_DBGI;
- goto get_delay;
- }
- reset_str = strstr(op_str, "trst");
- if (reset_str != NULL) {
- if (set_op)
- write_ctrl_value = AICE_CUSTOM_DELAY_SET_TRST;
- else
- write_ctrl_value = AICE_CUSTOM_DELAY_CLEAN_TRST;
- goto get_delay;
- }
- continue;
-get_delay:
- /* get delay */
- delay = strtoul(reset_str + 4, NULL, 0);
- write_ctrl_value |= (delay << 16);
-
- if (aice_write_ctrl(AICE_WRITE_CTRL_CUSTOM_DELAY,
- write_ctrl_value) != ERROR_OK) {
- fclose(script_fd);
- return ERROR_FAIL;
- }
- }
- fclose(script_fd);
- }
-
- return ERROR_OK;
-}
-
-static int aice_usb_set_clock(int set_clock)
-{
- if (aice_write_ctrl(AICE_WRITE_CTRL_TCK_CONTROL,
- AICE_TCK_CONTROL_TCK_SCAN) != ERROR_OK)
- return ERROR_FAIL;
-
- /* Read out TCK_SCAN clock value */
- uint32_t scan_clock;
- if (aice_read_ctrl(AICE_READ_CTRL_GET_ICE_STATE, &scan_clock) != ERROR_OK)
- return ERROR_FAIL;
-
- scan_clock &= 0x0F;
-
- uint32_t scan_base_freq;
- if (scan_clock & 0x8)
- scan_base_freq = 48000; /* 48 MHz */
- else
- scan_base_freq = 30000; /* 30 MHz */
-
- uint32_t set_base_freq;
- if (set_clock & 0x8)
- set_base_freq = 48000;
- else
- set_base_freq = 30000;
-
- uint32_t set_freq;
- uint32_t scan_freq;
- set_freq = set_base_freq >> (set_clock & 0x7);
- scan_freq = scan_base_freq >> (scan_clock & 0x7);
-
- if (scan_freq < set_freq) {
- LOG_ERROR("User specifies higher jtag clock than TCK_SCAN clock");
- return ERROR_FAIL;
- }
-
- if (aice_write_ctrl(AICE_WRITE_CTRL_TCK_CONTROL, set_clock) != ERROR_OK)
- return ERROR_FAIL;
-
- uint32_t check_speed;
- if (aice_read_ctrl(AICE_READ_CTRL_GET_ICE_STATE, &check_speed) != ERROR_OK)
- return ERROR_FAIL;
-
- if (((int)check_speed & 0x0F) != set_clock) {
- LOG_ERROR("Set jtag clock failed");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int aice_edm_init(uint32_t coreid)
-{
- aice_write_edmsr(coreid, NDS_EDM_SR_DIMBR, 0xFFFF0000);
- aice_write_misc(coreid, NDS_EDM_MISC_DIMIR, 0);
-
- /* unconditionally try to turn on V3_EDM_MODE */
- uint32_t edm_ctl_value;
- aice_read_edmsr(coreid, NDS_EDM_SR_EDM_CTL, &edm_ctl_value);
- aice_write_edmsr(coreid, NDS_EDM_SR_EDM_CTL, edm_ctl_value | 0x00000040);
-
- /* clear DBGER */
- aice_write_misc(coreid, NDS_EDM_MISC_DBGER,
- NDS_DBGER_DPED | NDS_DBGER_CRST | NDS_DBGER_AT_MAX);
-
- /* get EDM version */
- uint32_t value_edmcfg;
- aice_read_edmsr(coreid, NDS_EDM_SR_EDM_CFG, &value_edmcfg);
- core_info[coreid].edm_version = (value_edmcfg >> 16) & 0xFFFF;
-
- return ERROR_OK;
-}
-
-static bool is_v2_edm(uint32_t coreid)
-{
- if ((core_info[coreid].edm_version & 0x1000) == 0)
- return true;
- else
- return false;
-}
-
-static int aice_init_edm_registers(uint32_t coreid, bool clear_dex_use_psw)
-{
- /* enable DEH_SEL & MAX_STOP & V3_EDM_MODE & DBGI_MASK */
- uint32_t host_edm_ctl = core_info[coreid].edm_ctl_backup | 0xA000004F;
- if (clear_dex_use_psw)
- /* After entering debug mode, OpenOCD may set
- * DEX_USE_PSW accidentally through backup value
- * of target EDM_CTL.
- * So, clear DEX_USE_PSW by force. */
- host_edm_ctl &= ~(0x40000000);
-
- LOG_DEBUG("aice_init_edm_registers - EDM_CTL: 0x%08" PRIx32, host_edm_ctl);
-
- int result = aice_write_edmsr(coreid, NDS_EDM_SR_EDM_CTL, host_edm_ctl);
-
- return result;
-}
-
-/**
- * EDM_CTL will be modified by OpenOCD as debugging. OpenOCD has the
- * responsibility to keep EDM_CTL untouched after debugging.
- *
- * There are two scenarios to consider:
- * 1. single step/running as debugging (running under debug session)
- * 2. detached from gdb (exit debug session)
- *
- * So, we need to bakcup EDM_CTL before halted and restore it after
- * running. The difference of these two scenarios is EDM_CTL.DEH_SEL
- * is on for scenario 1, and off for scenario 2.
- */
-static int aice_backup_edm_registers(uint32_t coreid)
-{
- int result = aice_read_edmsr(coreid, NDS_EDM_SR_EDM_CTL,
- &core_info[coreid].edm_ctl_backup);
-
- /* To call aice_backup_edm_registers() after DEX on, DEX_USE_PSW
- * may be not correct. (For example, hit breakpoint, then backup
- * EDM_CTL. EDM_CTL.DEX_USE_PSW will be cleared.) Because debug
- * interrupt will clear DEX_USE_PSW, DEX_USE_PSW is always off after
- * DEX is on. It only backups correct value before OpenOCD issues DBGI.
- * (Backup EDM_CTL, then issue DBGI actively (refer aice_usb_halt())) */
- if (core_info[coreid].edm_ctl_backup & 0x40000000)
- core_info[coreid].dex_use_psw_on = true;
- else
- core_info[coreid].dex_use_psw_on = false;
-
- LOG_DEBUG("aice_backup_edm_registers - EDM_CTL: 0x%08" PRIx32 ", DEX_USE_PSW: %s",
- core_info[coreid].edm_ctl_backup,
- core_info[coreid].dex_use_psw_on ? "on" : "off");
-
- return result;
-}
-
-static int aice_restore_edm_registers(uint32_t coreid)
-{
- LOG_DEBUG("aice_restore_edm_registers -");
-
- /* set DEH_SEL, because target still under EDM control */
- int result = aice_write_edmsr(coreid, NDS_EDM_SR_EDM_CTL,
- core_info[coreid].edm_ctl_backup | 0x80000000);
-
- return result;
-}
-
-static int aice_backup_tmp_registers(uint32_t coreid)
-{
- LOG_DEBUG("backup_tmp_registers -");
-
- /* backup target DTR first(if the target DTR is valid) */
- uint32_t value_edmsw;
- aice_read_edmsr(coreid, NDS_EDM_SR_EDMSW, &value_edmsw);
- core_info[coreid].edmsw_backup = value_edmsw;
- if (value_edmsw & 0x1) { /* EDMSW.WDV == 1 */
- aice_read_dtr(coreid, &core_info[coreid].target_dtr_backup);
- core_info[coreid].target_dtr_valid = true;
-
- LOG_DEBUG("Backup target DTR: 0x%08" PRIx32, core_info[coreid].target_dtr_backup);
- } else {
- core_info[coreid].target_dtr_valid = false;
- }
-
- /* Target DTR has been backup, then backup $R0 and $R1 */
- aice_read_reg(coreid, R0, &core_info[coreid].r0_backup);
- aice_read_reg(coreid, R1, &core_info[coreid].r1_backup);
-
- /* backup host DTR(if the host DTR is valid) */
- if (value_edmsw & 0x2) { /* EDMSW.RDV == 1*/
- /* read out host DTR and write into target DTR, then use aice_read_edmsr to
- * read out */
- uint32_t instructions[4] = {
- MFSR_DTR(R0), /* R0 has already been backup */
- DSB,
- MTSR_DTR(R0),
- BEQ_MINUS_12
- };
- aice_execute_dim(coreid, instructions, 4);
-
- aice_read_dtr(coreid, &core_info[coreid].host_dtr_backup);
- core_info[coreid].host_dtr_valid = true;
-
- LOG_DEBUG("Backup host DTR: 0x%08" PRIx32, core_info[coreid].host_dtr_backup);
- } else {
- core_info[coreid].host_dtr_valid = false;
- }
-
- LOG_DEBUG("r0: 0x%08" PRIx32 ", r1: 0x%08" PRIx32,
- core_info[coreid].r0_backup, core_info[coreid].r1_backup);
-
- return ERROR_OK;
-}
-
-static int aice_restore_tmp_registers(uint32_t coreid)
-{
- LOG_DEBUG("restore_tmp_registers - r0: 0x%08" PRIx32 ", r1: 0x%08" PRIx32,
- core_info[coreid].r0_backup, core_info[coreid].r1_backup);
-
- if (core_info[coreid].target_dtr_valid) {
- uint32_t instructions[4] = {
- SETHI(R0, core_info[coreid].target_dtr_backup >> 12),
- ORI(R0, R0, core_info[coreid].target_dtr_backup & 0x00000FFF),
- NOP,
- BEQ_MINUS_12
- };
- aice_execute_dim(coreid, instructions, 4);
-
- instructions[0] = MTSR_DTR(R0);
- instructions[1] = DSB;
- instructions[2] = NOP;
- instructions[3] = BEQ_MINUS_12;
- aice_execute_dim(coreid, instructions, 4);
-
- LOG_DEBUG("Restore target DTR: 0x%08" PRIx32, core_info[coreid].target_dtr_backup);
- }
-
- aice_write_reg(coreid, R0, core_info[coreid].r0_backup);
- aice_write_reg(coreid, R1, core_info[coreid].r1_backup);
-
- if (core_info[coreid].host_dtr_valid) {
- aice_write_dtr(coreid, core_info[coreid].host_dtr_backup);
-
- LOG_DEBUG("Restore host DTR: 0x%08" PRIx32, core_info[coreid].host_dtr_backup);
- }
-
- return ERROR_OK;
-}
-
-static int aice_open_device(struct aice_port_param_s *param)
-{
- if (ERROR_OK != aice_usb_open(param))
- return ERROR_FAIL;
-
- if (ERROR_FAIL == aice_get_version_info()) {
- LOG_ERROR("Cannot get AICE version!");
- return ERROR_FAIL;
- }
-
- LOG_INFO("AICE initialization started");
-
- /* attempt to reset Andes EDM */
- if (ERROR_FAIL == aice_reset_box()) {
- LOG_ERROR("Cannot initial AICE box!");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int aice_usb_set_jtag_clock(uint32_t a_clock)
-{
- jtag_clock = a_clock;
-
- if (ERROR_OK != aice_usb_set_clock(a_clock)) {
- LOG_ERROR("Cannot set AICE JTAG clock!");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int aice_usb_close(void)
-{
- jtag_libusb_close(aice_handler.usb_handle);
-
- if (custom_srst_script)
- free(custom_srst_script);
-
- if (custom_trst_script)
- free(custom_trst_script);
-
- if (custom_restart_script)
- free(custom_restart_script);
-
- return ERROR_OK;
-}
-
-static int aice_core_init(uint32_t coreid)
-{
- core_info[coreid].access_channel = NDS_MEMORY_ACC_CPU;
- core_info[coreid].memory_select = NDS_MEMORY_SELECT_AUTO;
- core_info[coreid].core_state = AICE_TARGET_UNKNOWN;
-
- return ERROR_OK;
-}
-
-static int aice_usb_idcode(uint32_t *idcode, uint8_t *num_of_idcode)
-{
- int retval;
-
- retval = aice_scan_chain(idcode, num_of_idcode);
- if (ERROR_OK == retval) {
- for (int i = 0; i < *num_of_idcode; i++) {
- aice_core_init(i);
- aice_edm_init(i);
- }
- total_num_of_core = *num_of_idcode;
- }
-
- return retval;
-}
-
-static int aice_usb_halt(uint32_t coreid)
-{
- if (core_info[coreid].core_state == AICE_TARGET_HALTED) {
- LOG_DEBUG("aice_usb_halt check halted");
- return ERROR_OK;
- }
-
- LOG_DEBUG("aice_usb_halt");
-
- /** backup EDM registers */
- aice_backup_edm_registers(coreid);
- /** init EDM for host debugging */
- /** no need to clear dex_use_psw, because dbgi will clear it */
- aice_init_edm_registers(coreid, false);
-
- /** Clear EDM_CTL.DBGIM & EDM_CTL.DBGACKM */
- uint32_t edm_ctl_value;
- aice_read_edmsr(coreid, NDS_EDM_SR_EDM_CTL, &edm_ctl_value);
- if (edm_ctl_value & 0x3)
- aice_write_edmsr(coreid, NDS_EDM_SR_EDM_CTL, edm_ctl_value & ~(0x3));
-
- uint32_t dbger;
- uint32_t acc_ctl_value;
-
- core_info[coreid].debug_under_dex_on = false;
- aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &dbger);
-
- if (dbger & NDS_DBGER_AT_MAX)
- LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level. -->");
-
- if (dbger & NDS_DBGER_DEX) {
- if (is_v2_edm(coreid) == false) {
- /** debug 'debug mode'. use force_debug to issue dbgi */
- aice_read_misc(coreid, NDS_EDM_MISC_ACC_CTL, &acc_ctl_value);
- acc_ctl_value |= 0x8;
- aice_write_misc(coreid, NDS_EDM_MISC_ACC_CTL, acc_ctl_value);
- core_info[coreid].debug_under_dex_on = true;
-
- aice_write_misc(coreid, NDS_EDM_MISC_EDM_CMDR, 0);
- /* If CPU stalled due to AT_MAX, clear AT_MAX status. */
- if (dbger & NDS_DBGER_AT_MAX)
- aice_write_misc(coreid, NDS_EDM_MISC_DBGER, NDS_DBGER_AT_MAX);
- }
- } else {
- /** Issue DBGI normally */
- aice_write_misc(coreid, NDS_EDM_MISC_EDM_CMDR, 0);
- /* If CPU stalled due to AT_MAX, clear AT_MAX status. */
- if (dbger & NDS_DBGER_AT_MAX)
- aice_write_misc(coreid, NDS_EDM_MISC_DBGER, NDS_DBGER_AT_MAX);
- }
-
- if (aice_check_dbger(coreid, NDS_DBGER_DEX) != ERROR_OK) {
- LOG_ERROR("<-- TARGET ERROR! Unable to stop the debug target through DBGI. -->");
- return ERROR_FAIL;
- }
-
- if (core_info[coreid].debug_under_dex_on) {
- if (core_info[coreid].dex_use_psw_on == false) {
- /* under debug 'debug mode', force $psw to 'debug mode' bahavior */
- /* !!!NOTICE!!! this is workaround for debug 'debug mode'.
- * it is only for debugging 'debug exception handler' purpose.
- * after openocd detaches from target, target behavior is
- * undefined. */
- uint32_t ir0_value;
- uint32_t debug_mode_ir0_value;
- aice_read_reg(coreid, IR0, &ir0_value);
- debug_mode_ir0_value = ir0_value | 0x408; /* turn on DEX, set POM = 1 */
- debug_mode_ir0_value &= ~(0x000000C1); /* turn off DT/IT/GIE */
- aice_write_reg(coreid, IR0, debug_mode_ir0_value);
- }
- }
-
- /** set EDM_CTL.DBGIM & EDM_CTL.DBGACKM after halt */
- if (edm_ctl_value & 0x3)
- aice_write_edmsr(coreid, NDS_EDM_SR_EDM_CTL, edm_ctl_value);
-
- /* backup r0 & r1 */
- aice_backup_tmp_registers(coreid);
- core_info[coreid].core_state = AICE_TARGET_HALTED;
-
- return ERROR_OK;
-}
-
-static int aice_usb_state(uint32_t coreid, enum aice_target_state_s *state)
-{
- uint32_t dbger_value;
- uint32_t ice_state;
-
- int result = aice_read_misc(coreid, NDS_EDM_MISC_DBGER, &dbger_value);
-
- if (ERROR_AICE_TIMEOUT == result) {
- if (aice_read_ctrl(AICE_READ_CTRL_GET_ICE_STATE, &ice_state) != ERROR_OK) {
- LOG_ERROR("<-- AICE ERROR! AICE is unplugged. -->");
- return ERROR_FAIL;
- }
-
- if ((ice_state & 0x20) == 0) {
- LOG_ERROR("<-- TARGET ERROR! Target is disconnected with AICE. -->");
- return ERROR_FAIL;
- } else {
- return ERROR_FAIL;
- }
- } else if (ERROR_AICE_DISCONNECT == result) {
- LOG_ERROR("<-- AICE ERROR! AICE is unplugged. -->");
- return ERROR_FAIL;
- }
-
- if ((dbger_value & NDS_DBGER_ILL_SEC_ACC) == NDS_DBGER_ILL_SEC_ACC) {
- LOG_ERROR("<-- TARGET ERROR! Insufficient security privilege. -->");
-
- /* Clear ILL_SEC_ACC */
- aice_write_misc(coreid, NDS_EDM_MISC_DBGER, NDS_DBGER_ILL_SEC_ACC);
-
- *state = AICE_TARGET_RUNNING;
- core_info[coreid].core_state = AICE_TARGET_RUNNING;
- } else if ((dbger_value & NDS_DBGER_AT_MAX) == NDS_DBGER_AT_MAX) {
- /* Issue DBGI to exit cpu stall */
- aice_usb_halt(coreid);
-
- /* Read OIPC to find out the trigger point */
- uint32_t ir11_value;
- aice_read_reg(coreid, IR11, &ir11_value);
-
- LOG_ERROR("<-- TARGET ERROR! Reaching the max interrupt stack level; "
- "CPU is stalled at 0x%08" PRIx32 " for debugging. -->", ir11_value);
-
- *state = AICE_TARGET_HALTED;
- } else if ((dbger_value & NDS_DBGER_CRST) == NDS_DBGER_CRST) {
- LOG_DEBUG("DBGER.CRST is on.");
-
- *state = AICE_TARGET_RESET;
- core_info[coreid].core_state = AICE_TARGET_RUNNING;
-
- /* Clear CRST */
- aice_write_misc(coreid, NDS_EDM_MISC_DBGER, NDS_DBGER_CRST);
- } else if ((dbger_value & NDS_DBGER_DEX) == NDS_DBGER_DEX) {
- if (AICE_TARGET_RUNNING == core_info[coreid].core_state) {
- /* enter debug mode, init EDM registers */
- /* backup EDM registers */
- aice_backup_edm_registers(coreid);
- /* init EDM for host debugging */
- aice_init_edm_registers(coreid, true);
- aice_backup_tmp_registers(coreid);
- core_info[coreid].core_state = AICE_TARGET_HALTED;
- } else if (AICE_TARGET_UNKNOWN == core_info[coreid].core_state) {
- /* debug 'debug mode', use force debug to halt core */
- aice_usb_halt(coreid);
- }
- *state = AICE_TARGET_HALTED;
- } else {
- *state = AICE_TARGET_RUNNING;
- core_info[coreid].core_state = AICE_TARGET_RUNNING;
- }
-
- return ERROR_OK;
-}
-
-static int aice_usb_reset(void)
-{
- if (aice_reset_box() != ERROR_OK)
- return ERROR_FAIL;
-
- /* issue TRST */
- if (custom_trst_script == NULL) {
- if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_CONTROL,
- AICE_JTAG_PIN_CONTROL_TRST) != ERROR_OK)
- return ERROR_FAIL;
- } else {
- /* custom trst operations */
- if (aice_execute_custom_script(custom_trst_script) != ERROR_OK)
- return ERROR_FAIL;
- }
-
- if (aice_usb_set_clock(jtag_clock) != ERROR_OK)
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-static int aice_issue_srst(uint32_t coreid)
-{
- LOG_DEBUG("aice_issue_srst");
-
- /* After issuing srst, target will be running. So we need to restore EDM_CTL. */
- aice_restore_edm_registers(coreid);
-
- if (custom_srst_script == NULL) {
- if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_CONTROL,
- AICE_JTAG_PIN_CONTROL_SRST) != ERROR_OK)
- return ERROR_FAIL;
- } else {
- /* custom srst operations */
- if (aice_execute_custom_script(custom_srst_script) != ERROR_OK)
- return ERROR_FAIL;
- }
-
- /* wait CRST infinitely */
- uint32_t dbger_value;
- int i = 0;
- while (1) {
- if (aice_read_misc(coreid,
- NDS_EDM_MISC_DBGER, &dbger_value) != ERROR_OK)
- return ERROR_FAIL;
-
- if (dbger_value & NDS_DBGER_CRST)
- break;
-
- if ((i % 30) == 0)
- keep_alive();
- i++;
- }
-
- core_info[coreid].host_dtr_valid = false;
- core_info[coreid].target_dtr_valid = false;
-
- core_info[coreid].core_state = AICE_TARGET_RUNNING;
- return ERROR_OK;
-}
-
-static int aice_issue_reset_hold(uint32_t coreid)
-{
- LOG_DEBUG("aice_issue_reset_hold");
-
- /* set no_dbgi_pin to 0 */
- uint32_t pin_status;
- aice_read_ctrl(AICE_READ_CTRL_GET_JTAG_PIN_STATUS, &pin_status);
- if (pin_status | 0x4)
- aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_STATUS, pin_status & (~0x4));
-
- /* issue restart */
- if (custom_restart_script == NULL) {
- if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_CONTROL,
- AICE_JTAG_PIN_CONTROL_RESTART) != ERROR_OK)
- return ERROR_FAIL;
- } else {
- /* custom restart operations */
- if (aice_execute_custom_script(custom_restart_script) != ERROR_OK)
- return ERROR_FAIL;
- }
-
- if (aice_check_dbger(coreid, NDS_DBGER_CRST | NDS_DBGER_DEX) == ERROR_OK) {
- aice_backup_tmp_registers(coreid);
- core_info[coreid].core_state = AICE_TARGET_HALTED;
-
- return ERROR_OK;
- } else {
- /* set no_dbgi_pin to 1 */
- aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_STATUS, pin_status | 0x4);
-
- /* issue restart again */
- if (custom_restart_script == NULL) {
- if (aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_CONTROL,
- AICE_JTAG_PIN_CONTROL_RESTART) != ERROR_OK)
- return ERROR_FAIL;
- } else {
- /* custom restart operations */
- if (aice_execute_custom_script(custom_restart_script) != ERROR_OK)
- return ERROR_FAIL;
- }
-
- if (aice_check_dbger(coreid, NDS_DBGER_CRST | NDS_DBGER_DEX) == ERROR_OK) {
- aice_backup_tmp_registers(coreid);
- core_info[coreid].core_state = AICE_TARGET_HALTED;
-
- return ERROR_OK;
- }
-
- /* do software reset-and-hold */
- aice_issue_srst(coreid);
- aice_usb_halt(coreid);
-
- uint32_t value_ir3;
- aice_read_reg(coreid, IR3, &value_ir3);
- aice_write_reg(coreid, PC, value_ir3 & 0xFFFF0000);
- }
-
- return ERROR_FAIL;
-}
-
-static int aice_issue_reset_hold_multi(void)
-{
- uint32_t write_ctrl_value = 0;
-
- /* set SRST */
- write_ctrl_value = AICE_CUSTOM_DELAY_SET_SRST;
- write_ctrl_value |= (0x200 << 16);
- if (aice_write_ctrl(AICE_WRITE_CTRL_CUSTOM_DELAY,
- write_ctrl_value) != ERROR_OK)
- return ERROR_FAIL;
-
- for (uint8_t i = 0 ; i < total_num_of_core ; i++)
- aice_write_misc(i, NDS_EDM_MISC_EDM_CMDR, 0);
-
- /* clear SRST */
- write_ctrl_value = AICE_CUSTOM_DELAY_CLEAN_SRST;
- write_ctrl_value |= (0x200 << 16);
- if (aice_write_ctrl(AICE_WRITE_CTRL_CUSTOM_DELAY,
- write_ctrl_value) != ERROR_OK)
- return ERROR_FAIL;
-
- for (uint8_t i = 0; i < total_num_of_core; i++)
- aice_edm_init(i);
-
- return ERROR_FAIL;
-}
-
-static int aice_usb_assert_srst(uint32_t coreid, enum aice_srst_type_s srst)
-{
- if ((AICE_SRST != srst) && (AICE_RESET_HOLD != srst))
- return ERROR_FAIL;
-
- /* clear DBGER */
- if (aice_write_misc(coreid, NDS_EDM_MISC_DBGER,
- NDS_DBGER_CLEAR_ALL) != ERROR_OK)
- return ERROR_FAIL;
-
- int result = ERROR_OK;
- if (AICE_SRST == srst)
- result = aice_issue_srst(coreid);
- else {
- if (1 == total_num_of_core)
- result = aice_issue_reset_hold(coreid);
- else
- result = aice_issue_reset_hold_multi();
- }
-
- /* Clear DBGER.CRST after reset to avoid 'core-reset checking' errors.
- * assert_srst is user-intentional reset behavior, so we could
- * clear DBGER.CRST safely.
- */
- if (aice_write_misc(coreid,
- NDS_EDM_MISC_DBGER, NDS_DBGER_CRST) != ERROR_OK)
- return ERROR_FAIL;
-
- return result;
-}
-
-static int aice_usb_run(uint32_t coreid)
-{
- LOG_DEBUG("aice_usb_run");
-
- uint32_t dbger_value;
- if (aice_read_misc(coreid,
- NDS_EDM_MISC_DBGER, &dbger_value) != ERROR_OK)
- return ERROR_FAIL;
-
- if ((dbger_value & NDS_DBGER_DEX) != NDS_DBGER_DEX) {
- LOG_WARNING("<-- TARGET WARNING! The debug target exited "
- "the debug mode unexpectedly. -->");
- return ERROR_FAIL;
- }
-
- /* restore r0 & r1 before free run */
- aice_restore_tmp_registers(coreid);
- core_info[coreid].core_state = AICE_TARGET_RUNNING;
-
- /* clear DBGER */
- aice_write_misc(coreid, NDS_EDM_MISC_DBGER,
- NDS_DBGER_CLEAR_ALL);
-
- /** restore EDM registers */
- /** OpenOCD should restore EDM_CTL **before** to exit debug state.
- * Otherwise, following instruction will read wrong EDM_CTL value.
- *
- * pc -> mfsr $p0, EDM_CTL (single step)
- * slli $p0, $p0, 1
- * slri $p0, $p0, 31
- */
- aice_restore_edm_registers(coreid);
-
- /** execute instructions in DIM */
- uint32_t instructions[4] = {
- NOP,
- NOP,
- NOP,
- IRET
- };
- int result = aice_execute_dim(coreid, instructions, 4);
-
- return result;
-}
-
-static int aice_usb_step(uint32_t coreid)
<TRUNCATED>
[05/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_usb.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_usb.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_usb.h
deleted file mode 100755
index adb027e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_usb.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef __AICE_USB_H__
-#define __AICE_USB_H__
-
-#include "aice_port.h"
-
-/* AICE USB timeout value */
-#define AICE_USB_TIMEOUT 5000
-
-/* AICE USB buffer size */
-#define AICE_IN_BUFFER_SIZE 2048
-#define AICE_OUT_BUFFER_SIZE 2048
-#define AICE_IN_PACKETS_BUFFER_SIZE 2048
-#define AICE_OUT_PACKETS_BUFFER_SIZE 2048
-#define AICE_IN_BATCH_COMMAND_SIZE 512
-#define AICE_OUT_BATCH_COMMAND_SIZE 512
-#define AICE_IN_PACK_COMMAND_SIZE 2048
-#define AICE_OUT_PACK_COMMAND_SIZE 2048
-
-/* Constants for AICE command READ_CTRL */
-#define AICE_READ_CTRL_GET_ICE_STATE 0x00
-#define AICE_READ_CTRL_GET_HARDWARE_VERSION 0x01
-#define AICE_READ_CTRL_GET_FPGA_VERSION 0x02
-#define AICE_READ_CTRL_GET_FIRMWARE_VERSION 0x03
-#define AICE_READ_CTRL_GET_JTAG_PIN_STATUS 0x04
-#define AICE_READ_CTRL_BATCH_BUF_INFO 0x22
-#define AICE_READ_CTRL_BATCH_STATUS 0x23
-#define AICE_READ_CTRL_BATCH_BUF0_STATE 0x31
-#define AICE_READ_CTRL_BATCH_BUF4_STATE 0x39
-#define AICE_READ_CTRL_BATCH_BUF5_STATE 0x3b
-
-/* Constants for AICE command WRITE_CTRL */
-#define AICE_WRITE_CTRL_TCK_CONTROL 0x00
-#define AICE_WRITE_CTRL_JTAG_PIN_CONTROL 0x01
-#define AICE_WRITE_CTRL_CLEAR_TIMEOUT_STATUS 0x02
-#define AICE_WRITE_CTRL_RESERVED 0x03
-#define AICE_WRITE_CTRL_JTAG_PIN_STATUS 0x04
-#define AICE_WRITE_CTRL_CUSTOM_DELAY 0x0d
-#define AICE_WRITE_CTRL_BATCH_CTRL 0x20
-#define AICE_WRITE_CTRL_BATCH_ITERATION 0x21
-#define AICE_WRITE_CTRL_BATCH_DIM_SIZE 0x22
-#define AICE_WRITE_CTRL_BATCH_CMD_BUF0_CTRL 0x30
-#define AICE_WRITE_CTRL_BATCH_DATA_BUF0_CTRL 0x38
-#define AICE_WRITE_CTRL_BATCH_DATA_BUF1_CTRL 0x3a
-
-#define AICE_BATCH_COMMAND_BUFFER_0 0x0
-#define AICE_BATCH_COMMAND_BUFFER_1 0x1
-#define AICE_BATCH_COMMAND_BUFFER_2 0x2
-#define AICE_BATCH_COMMAND_BUFFER_3 0x3
-#define AICE_BATCH_DATA_BUFFER_0 0x4
-#define AICE_BATCH_DATA_BUFFER_1 0x5
-#define AICE_BATCH_DATA_BUFFER_2 0x6
-#define AICE_BATCH_DATA_BUFFER_3 0x7
-
-/* Constants for AICE command WRITE_CTRL:TCK_CONTROL */
-#define AICE_TCK_CONTROL_TCK3048 0x08
-
-/* Constants for AICE command WRITE_CTRL:JTAG_PIN_CONTROL */
-#define AICE_JTAG_PIN_CONTROL_SRST 0x01
-#define AICE_JTAG_PIN_CONTROL_TRST 0x02
-#define AICE_JTAG_PIN_CONTROL_STOP 0x04
-#define AICE_JTAG_PIN_CONTROL_RESTART 0x08
-
-/* Constants for AICE command WRITE_CTRL:TCK_CONTROL */
-#define AICE_TCK_CONTROL_TCK_SCAN 0x10
-
-/* Custom SRST/DBGI/TRST */
-#define AICE_CUSTOM_DELAY_SET_SRST 0x01
-#define AICE_CUSTOM_DELAY_CLEAN_SRST 0x02
-#define AICE_CUSTOM_DELAY_SET_DBGI 0x04
-#define AICE_CUSTOM_DELAY_CLEAN_DBGI 0x08
-#define AICE_CUSTOM_DELAY_SET_TRST 0x10
-#define AICE_CUSTOM_DELAY_CLEAN_TRST 0x20
-
-struct aice_usb_handler_s {
- unsigned int usb_read_ep;
- unsigned int usb_write_ep;
- struct jtag_libusb_device_handle *usb_handle;
-};
-
-struct cache_info {
- uint32_t set;
- uint32_t way;
- uint32_t line_size;
-
- uint32_t log2_set;
- uint32_t log2_line_size;
-};
-
-struct aice_nds32_info {
- uint32_t edm_version;
- uint32_t r0_backup;
- uint32_t r1_backup;
- uint32_t host_dtr_backup;
- uint32_t target_dtr_backup;
- uint32_t edmsw_backup;
- uint32_t edm_ctl_backup;
- bool debug_under_dex_on;
- bool dex_use_psw_on;
- bool host_dtr_valid;
- bool target_dtr_valid;
- enum nds_memory_access access_channel;
- enum nds_memory_select memory_select;
- enum aice_target_state_s core_state;
- bool cache_init;
- struct cache_info icache;
- struct cache_info dcache;
-};
-
-extern struct aice_port_api_s aice_usb_api;
-
-int aice_read_ctrl(uint32_t address, uint32_t *data);
-int aice_write_ctrl(uint32_t address, uint32_t data);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/commands.c
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/commands.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/commands.c
deleted file mode 100755
index 750ebab..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/commands.c
+++ /dev/null
@@ -1,255 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2009 SoftPLC Corporation *
- * http://softplc.com *
- * dick@softplc.com *
- * *
- * Copyright (C) 2009 Zachary T Welch *
- * zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/jtag.h>
-#include "commands.h"
-
-struct cmd_queue_page {
- struct cmd_queue_page *next;
- void *address;
- size_t used;
-};
-
-#define CMD_QUEUE_PAGE_SIZE (1024 * 1024)
-static struct cmd_queue_page *cmd_queue_pages;
-static struct cmd_queue_page *cmd_queue_pages_tail;
-
-struct jtag_command *jtag_command_queue;
-static struct jtag_command **next_command_pointer = &jtag_command_queue;
-
-void jtag_queue_command(struct jtag_command *cmd)
-{
- /* this command goes on the end, so ensure the queue terminates */
- cmd->next = NULL;
-
- struct jtag_command **last_cmd = next_command_pointer;
- assert(NULL != last_cmd);
- assert(NULL == *last_cmd);
- *last_cmd = cmd;
-
- /* store location where the next command pointer will be stored */
- next_command_pointer = &cmd->next;
-}
-
-void *cmd_queue_alloc(size_t size)
-{
- struct cmd_queue_page **p_page = &cmd_queue_pages;
- int offset;
- uint8_t *t;
-
- /*
- * WARNING:
- * We align/round the *SIZE* per below
- * so that all pointers returned by
- * this function are reasonably well
- * aligned.
- *
- * If we did not, then an "odd-length" request would cause the
- * *next* allocation to be at an *odd* address, and because
- * this function has the same type of api as malloc() - we
- * must also return pointers that have the same type of
- * alignment.
- *
- * What I do not/have is a reasonable portable means
- * to align by...
- *
- * The solution here, is based on these suggestions.
- * http://gcc.gnu.org/ml/gcc-help/2008-12/msg00041.html
- *
- */
- union worse_case_align {
- int i;
- long l;
- float f;
- void *v;
- };
-#define ALIGN_SIZE (sizeof(union worse_case_align))
-
- /* The alignment process. */
- size = (size + ALIGN_SIZE - 1) & (~(ALIGN_SIZE - 1));
- /* Done... */
-
- if (*p_page) {
- p_page = &cmd_queue_pages_tail;
- if (CMD_QUEUE_PAGE_SIZE - (*p_page)->used < size)
- p_page = &((*p_page)->next);
- }
-
- if (!*p_page) {
- *p_page = malloc(sizeof(struct cmd_queue_page));
- (*p_page)->used = 0;
- size_t alloc_size = (size < CMD_QUEUE_PAGE_SIZE) ?
- CMD_QUEUE_PAGE_SIZE : size;
- (*p_page)->address = malloc(alloc_size);
- (*p_page)->next = NULL;
- cmd_queue_pages_tail = *p_page;
- }
-
- offset = (*p_page)->used;
- (*p_page)->used += size;
-
- t = (*p_page)->address;
- return t + offset;
-}
-
-static void cmd_queue_free(void)
-{
- struct cmd_queue_page *page = cmd_queue_pages;
-
- while (page) {
- struct cmd_queue_page *last = page;
- free(page->address);
- page = page->next;
- free(last);
- }
-
- cmd_queue_pages = NULL;
- cmd_queue_pages_tail = NULL;
-}
-
-void jtag_command_queue_reset(void)
-{
- cmd_queue_free();
-
- jtag_command_queue = NULL;
- next_command_pointer = &jtag_command_queue;
-}
-
-enum scan_type jtag_scan_type(const struct scan_command *cmd)
-{
- int i;
- int type = 0;
-
- for (i = 0; i < cmd->num_fields; i++) {
- if (cmd->fields[i].in_value)
- type |= SCAN_IN;
- if (cmd->fields[i].out_value)
- type |= SCAN_OUT;
- }
-
- return type;
-}
-
-int jtag_scan_size(const struct scan_command *cmd)
-{
- int bit_count = 0;
- int i;
-
- /* count bits in scan command */
- for (i = 0; i < cmd->num_fields; i++)
- bit_count += cmd->fields[i].num_bits;
-
- return bit_count;
-}
-
-int jtag_build_buffer(const struct scan_command *cmd, uint8_t **buffer)
-{
- int bit_count = 0;
- int i;
-
- bit_count = jtag_scan_size(cmd);
- *buffer = calloc(1, DIV_ROUND_UP(bit_count, 8));
-
- bit_count = 0;
-
- DEBUG_JTAG_IO("%s num_fields: %i",
- cmd->ir_scan ? "IRSCAN" : "DRSCAN",
- cmd->num_fields);
-
- for (i = 0; i < cmd->num_fields; i++) {
- if (cmd->fields[i].out_value) {
-#ifdef _DEBUG_JTAG_IO_
- char *char_buf = buf_to_str(cmd->fields[i].out_value,
- (cmd->fields[i].num_bits > DEBUG_JTAG_IOZ)
- ? DEBUG_JTAG_IOZ
- : cmd->fields[i].num_bits, 16);
-
- LOG_DEBUG("fields[%i].out_value[%i]: 0x%s", i,
- cmd->fields[i].num_bits, char_buf);
- free(char_buf);
-#endif
- buf_set_buf(cmd->fields[i].out_value, 0, *buffer,
- bit_count, cmd->fields[i].num_bits);
- } else {
- DEBUG_JTAG_IO("fields[%i].out_value[%i]: NULL",
- i, cmd->fields[i].num_bits);
- }
-
- bit_count += cmd->fields[i].num_bits;
- }
-
- /*DEBUG_JTAG_IO("bit_count totalling: %i", bit_count); */
-
- return bit_count;
-}
-
-int jtag_read_buffer(uint8_t *buffer, const struct scan_command *cmd)
-{
- int i;
- int bit_count = 0;
- int retval;
-
- /* we return ERROR_OK, unless a check fails, or a handler reports a problem */
- retval = ERROR_OK;
-
- for (i = 0; i < cmd->num_fields; i++) {
- /* if neither in_value nor in_handler
- * are specified we don't have to examine this field
- */
- if (cmd->fields[i].in_value) {
- int num_bits = cmd->fields[i].num_bits;
- uint8_t *captured = buf_set_buf(buffer, bit_count,
- malloc(DIV_ROUND_UP(num_bits, 8)), 0, num_bits);
-
-#ifdef _DEBUG_JTAG_IO_
- char *char_buf = buf_to_str(captured,
- (num_bits > DEBUG_JTAG_IOZ)
- ? DEBUG_JTAG_IOZ
- : num_bits, 16);
-
- LOG_DEBUG("fields[%i].in_value[%i]: 0x%s",
- i, num_bits, char_buf);
- free(char_buf);
-#endif
-
- if (cmd->fields[i].in_value)
- buf_cpy(captured, cmd->fields[i].in_value, num_bits);
-
- free(captured);
- }
- bit_count += cmd->fields[i].num_bits;
- }
-
- return retval;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/commands.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/commands.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/commands.h
deleted file mode 100755
index 06ec248..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/commands.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2009 Zachary T Welch *
- * zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef JTAG_COMMANDS_H
-#define JTAG_COMMANDS_H
-
-/**
- * The inferred type of a scan_command_s structure, indicating whether
- * the command has the host scan in from the device, the host scan out
- * to the device, or both.
- */
-enum scan_type {
- /** From device to host, */
- SCAN_IN = 1,
- /** From host to device, */
- SCAN_OUT = 2,
- /** Full-duplex scan. */
- SCAN_IO = 3
-};
-
-/**
- * The scan_command provide a means of encapsulating a set of scan_field_s
- * structures that should be scanned in/out to the device.
- */
-struct scan_command {
- /** instruction/not data scan */
- bool ir_scan;
- /** number of fields in *fields array */
- int num_fields;
- /** pointer to an array of data scan fields */
- struct scan_field *fields;
- /** state in which JTAG commands should finish */
- tap_state_t end_state;
-};
-
-struct statemove_command {
- /** state in which JTAG commands should finish */
- tap_state_t end_state;
-};
-
-struct pathmove_command {
- /** number of states in *path */
- int num_states;
- /** states that have to be passed */
- tap_state_t *path;
-};
-
-struct runtest_command {
- /** number of cycles to spend in Run-Test/Idle state */
- int num_cycles;
- /** state in which JTAG commands should finish */
- tap_state_t end_state;
-};
-
-
-struct stableclocks_command {
- /** number of clock cycles that should be sent */
- int num_cycles;
-};
-
-
-struct reset_command {
- /** Set TRST output: 0 = deassert, 1 = assert, -1 = no change */
- int trst;
- /** Set SRST output: 0 = deassert, 1 = assert, -1 = no change */
- int srst;
-};
-
-struct end_state_command {
- /** state in which JTAG commands should finish */
- tap_state_t end_state;
-};
-
-struct sleep_command {
- /** number of microseconds to sleep */
- uint32_t us;
-};
-
-/**
- * Encapsulates a series of bits to be clocked out, affecting state
- * and mode of the interface.
- *
- * In JTAG mode these are clocked out on TMS, using TCK. They may be
- * used for link resets, transitioning between JTAG and SWD modes, or
- * to implement JTAG state machine transitions (implementing pathmove
- * or statemove operations).
- *
- * In SWD mode these are clocked out on SWDIO, using SWCLK, and are
- * used for link resets and transitioning between SWD and JTAG modes.
- */
-struct tms_command {
- /** How many bits should be clocked out. */
- unsigned num_bits;
- /** The bits to clock out; the LSB is bit 0 of bits[0]. */
- const uint8_t *bits;
-};
-
-/**
- * Defines a container type that hold a pointer to a JTAG command
- * structure of any defined type.
- */
-union jtag_command_container {
- struct scan_command *scan;
- struct statemove_command *statemove;
- struct pathmove_command *pathmove;
- struct runtest_command *runtest;
- struct stableclocks_command *stableclocks;
- struct reset_command *reset;
- struct end_state_command *end_state;
- struct sleep_command *sleep;
- struct tms_command *tms;
-};
-
-/**
- * The type of the @c jtag_command_container contained by a
- * @c jtag_command_s structure.
- */
-enum jtag_command_type {
- JTAG_SCAN = 1,
- /* JTAG_TLR_RESET's non-minidriver implementation is a
- * vestige from a statemove cmd. The statemove command
- * is obsolete and replaced by pathmove.
- *
- * pathmove does not support reset as one of it's states,
- * hence the need for an explicit statemove command.
- */
- JTAG_TLR_RESET = 2,
- JTAG_RUNTEST = 3,
- JTAG_RESET = 4,
- JTAG_PATHMOVE = 6,
- JTAG_SLEEP = 7,
- JTAG_STABLECLOCKS = 8,
- JTAG_TMS = 9,
-};
-
-struct jtag_command {
- union jtag_command_container cmd;
- enum jtag_command_type type;
- struct jtag_command *next;
-};
-
-/** The current queue of jtag_command_s structures. */
-extern struct jtag_command *jtag_command_queue;
-
-void *cmd_queue_alloc(size_t size);
-
-void jtag_queue_command(struct jtag_command *cmd);
-void jtag_command_queue_reset(void);
-
-enum scan_type jtag_scan_type(const struct scan_command *cmd);
-int jtag_scan_size(const struct scan_command *cmd);
-int jtag_read_buffer(uint8_t *buffer, const struct scan_command *cmd);
-int jtag_build_buffer(const struct scan_command *cmd, uint8_t **buffer);
-
-#endif /* JTAG_COMMANDS_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/core.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/core.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/core.c
deleted file mode 100755
index fd4370f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/core.c
+++ /dev/null
@@ -1,1854 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch *
- * zw@superlucidity.net *
- * *
- * Copyright (C) 2007,2008,2009 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2009 SoftPLC Corporation *
- * http://softplc.com *
- * dick@softplc.com *
- * *
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "jtag.h"
-#include "swd.h"
-#include "interface.h"
-#include <transport/transport.h>
-#include <helper/jep106.h>
-
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-
-/* SVF and XSVF are higher level JTAG command sets (for boundary scan) */
-#include "svf/svf.h"
-#include "xsvf/xsvf.h"
-
-/** The number of JTAG queue flushes (for profiling and debugging purposes). */
-static int jtag_flush_queue_count;
-
-/* Sleep this # of ms after flushing the queue */
-static int jtag_flush_queue_sleep;
-
-static void jtag_add_scan_check(struct jtag_tap *active,
- void (*jtag_add_scan)(struct jtag_tap *active,
- int in_num_fields,
- const struct scan_field *in_fields,
- tap_state_t state),
- int in_num_fields, struct scan_field *in_fields, tap_state_t state);
-
-/**
- * The jtag_error variable is set when an error occurs while executing
- * the queue. Application code may set this using jtag_set_error(),
- * when an error occurs during processing that should be reported during
- * jtag_execute_queue().
- *
- * The value is set and cleared, but never read by normal application code.
- *
- * This value is returned (and cleared) by jtag_execute_queue().
- */
-static int jtag_error = ERROR_OK;
-
-static const char *jtag_event_strings[] = {
- [JTAG_TRST_ASSERTED] = "TAP reset",
- [JTAG_TAP_EVENT_SETUP] = "TAP setup",
- [JTAG_TAP_EVENT_ENABLE] = "TAP enabled",
- [JTAG_TAP_EVENT_DISABLE] = "TAP disabled",
-};
-
-/*
- * JTAG adapters must initialize with TRST and SRST de-asserted
- * (they're negative logic, so that means *high*). But some
- * hardware doesn't necessarily work that way ... so set things
- * up so that jtag_init() always forces that state.
- */
-static int jtag_trst = -1;
-static int jtag_srst = -1;
-
-/**
- * List all TAPs that have been created.
- */
-static struct jtag_tap *__jtag_all_taps;
-
-static enum reset_types jtag_reset_config = RESET_NONE;
-tap_state_t cmd_queue_cur_state = TAP_RESET;
-
-static bool jtag_verify_capture_ir = true;
-static int jtag_verify = 1;
-
-/* how long the OpenOCD should wait before attempting JTAG communication after reset lines
- *deasserted (in ms) */
-static int adapter_nsrst_delay; /* default to no nSRST delay */
-static int jtag_ntrst_delay;/* default to no nTRST delay */
-static int adapter_nsrst_assert_width; /* width of assertion */
-static int jtag_ntrst_assert_width; /* width of assertion */
-
-/**
- * Contains a single callback along with a pointer that will be passed
- * when an event occurs.
- */
-struct jtag_event_callback {
- /** a event callback */
- jtag_event_handler_t callback;
- /** the private data to pass to the callback */
- void *priv;
- /** the next callback */
- struct jtag_event_callback *next;
-};
-
-/* callbacks to inform high-level handlers about JTAG state changes */
-static struct jtag_event_callback *jtag_event_callbacks;
-
-/* speed in kHz*/
-static int speed_khz;
-/* speed to fallback to when RCLK is requested but not supported */
-static int rclk_fallback_speed_khz;
-static enum {CLOCK_MODE_UNSELECTED, CLOCK_MODE_KHZ, CLOCK_MODE_RCLK} clock_mode;
-static int jtag_speed;
-
-static struct jtag_interface *jtag;
-
-/* configuration */
-struct jtag_interface *jtag_interface;
-
-void jtag_set_flush_queue_sleep(int ms)
-{
- jtag_flush_queue_sleep = ms;
-}
-
-void jtag_set_error(int error)
-{
- if ((error == ERROR_OK) || (jtag_error != ERROR_OK))
- return;
- jtag_error = error;
-}
-
-int jtag_error_clear(void)
-{
- int temp = jtag_error;
- jtag_error = ERROR_OK;
- return temp;
-}
-
-/************/
-
-static bool jtag_poll = 1;
-
-bool is_jtag_poll_safe(void)
-{
- /* Polling can be disabled explicitly with set_enabled(false).
- * It is also implicitly disabled while TRST is active and
- * while SRST is gating the JTAG clock.
- */
- if (!transport_is_jtag())
- return jtag_poll;
-
- if (!jtag_poll || jtag_trst != 0)
- return false;
- return jtag_srst == 0 || (jtag_reset_config & RESET_SRST_NO_GATING);
-}
-
-bool jtag_poll_get_enabled(void)
-{
- return jtag_poll;
-}
-
-void jtag_poll_set_enabled(bool value)
-{
- jtag_poll = value;
-}
-
-/************/
-
-struct jtag_tap *jtag_all_taps(void)
-{
- return __jtag_all_taps;
-};
-
-unsigned jtag_tap_count(void)
-{
- struct jtag_tap *t = jtag_all_taps();
- unsigned n = 0;
- while (t) {
- n++;
- t = t->next_tap;
- }
- return n;
-}
-
-unsigned jtag_tap_count_enabled(void)
-{
- struct jtag_tap *t = jtag_all_taps();
- unsigned n = 0;
- while (t) {
- if (t->enabled)
- n++;
- t = t->next_tap;
- }
- return n;
-}
-
-/** Append a new TAP to the chain of all taps. */
-void jtag_tap_add(struct jtag_tap *t)
-{
- unsigned jtag_num_taps = 0;
-
- struct jtag_tap **tap = &__jtag_all_taps;
- while (*tap != NULL) {
- jtag_num_taps++;
- tap = &(*tap)->next_tap;
- }
- *tap = t;
- t->abs_chain_position = jtag_num_taps;
-}
-
-/* returns a pointer to the n-th device in the scan chain */
-struct jtag_tap *jtag_tap_by_position(unsigned n)
-{
- struct jtag_tap *t = jtag_all_taps();
-
- while (t && n-- > 0)
- t = t->next_tap;
-
- return t;
-}
-
-struct jtag_tap *jtag_tap_by_string(const char *s)
-{
- /* try by name first */
- struct jtag_tap *t = jtag_all_taps();
-
- while (t) {
- if (0 == strcmp(t->dotted_name, s))
- return t;
- t = t->next_tap;
- }
-
- /* no tap found by name, so try to parse the name as a number */
- unsigned n;
- if (parse_uint(s, &n) != ERROR_OK)
- return NULL;
-
- /* FIXME remove this numeric fallback code late June 2010, along
- * with all info in the User's Guide that TAPs have numeric IDs.
- * Also update "scan_chain" output to not display the numbers.
- */
- t = jtag_tap_by_position(n);
- if (t)
- LOG_WARNING("Specify TAP '%s' by name, not number %u",
- t->dotted_name, n);
-
- return t;
-}
-
-struct jtag_tap *jtag_tap_next_enabled(struct jtag_tap *p)
-{
- p = p ? p->next_tap : jtag_all_taps();
- while (p) {
- if (p->enabled)
- return p;
- p = p->next_tap;
- }
- return NULL;
-}
-
-const char *jtag_tap_name(const struct jtag_tap *tap)
-{
- return (tap == NULL) ? "(unknown)" : tap->dotted_name;
-}
-
-
-int jtag_register_event_callback(jtag_event_handler_t callback, void *priv)
-{
- struct jtag_event_callback **callbacks_p = &jtag_event_callbacks;
-
- if (callback == NULL)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (*callbacks_p) {
- while ((*callbacks_p)->next)
- callbacks_p = &((*callbacks_p)->next);
- callbacks_p = &((*callbacks_p)->next);
- }
-
- (*callbacks_p) = malloc(sizeof(struct jtag_event_callback));
- (*callbacks_p)->callback = callback;
- (*callbacks_p)->priv = priv;
- (*callbacks_p)->next = NULL;
-
- return ERROR_OK;
-}
-
-int jtag_unregister_event_callback(jtag_event_handler_t callback, void *priv)
-{
- struct jtag_event_callback **p = &jtag_event_callbacks, *temp;
-
- if (callback == NULL)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- while (*p) {
- if (((*p)->priv != priv) || ((*p)->callback != callback)) {
- p = &(*p)->next;
- continue;
- }
-
- temp = *p;
- *p = (*p)->next;
- free(temp);
- }
-
- return ERROR_OK;
-}
-
-int jtag_call_event_callbacks(enum jtag_event event)
-{
- struct jtag_event_callback *callback = jtag_event_callbacks;
-
- LOG_DEBUG("jtag event: %s", jtag_event_strings[event]);
-
- while (callback) {
- struct jtag_event_callback *next;
-
- /* callback may remove itself */
- next = callback->next;
- callback->callback(event, callback->priv);
- callback = next;
- }
-
- return ERROR_OK;
-}
-
-static void jtag_checks(void)
-{
- assert(jtag_trst == 0);
-}
-
-static void jtag_prelude(tap_state_t state)
-{
- jtag_checks();
-
- assert(state != TAP_INVALID);
-
- cmd_queue_cur_state = state;
-}
-
-void jtag_add_ir_scan_noverify(struct jtag_tap *active, const struct scan_field *in_fields,
- tap_state_t state)
-{
- jtag_prelude(state);
-
- int retval = interface_jtag_add_ir_scan(active, in_fields, state);
- jtag_set_error(retval);
-}
-
-static void jtag_add_ir_scan_noverify_callback(struct jtag_tap *active,
- int dummy,
- const struct scan_field *in_fields,
- tap_state_t state)
-{
- jtag_add_ir_scan_noverify(active, in_fields, state);
-}
-
-/* If fields->in_value is filled out, then the captured IR value will be checked */
-void jtag_add_ir_scan(struct jtag_tap *active, struct scan_field *in_fields, tap_state_t state)
-{
- assert(state != TAP_RESET);
-
- if (jtag_verify && jtag_verify_capture_ir) {
- /* 8 x 32 bit id's is enough for all invocations */
-
- /* if we are to run a verification of the ir scan, we need to get the input back.
- * We may have to allocate space if the caller didn't ask for the input back.
- */
- in_fields->check_value = active->expected;
- in_fields->check_mask = active->expected_mask;
- jtag_add_scan_check(active, jtag_add_ir_scan_noverify_callback, 1, in_fields,
- state);
- } else
- jtag_add_ir_scan_noverify(active, in_fields, state);
-}
-
-void jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits,
- tap_state_t state)
-{
- assert(out_bits != NULL);
- assert(state != TAP_RESET);
-
- jtag_prelude(state);
-
- int retval = interface_jtag_add_plain_ir_scan(
- num_bits, out_bits, in_bits, state);
- jtag_set_error(retval);
-}
-
-static int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value,
- uint8_t *in_check_mask, int num_bits);
-
-static int jtag_check_value_mask_callback(jtag_callback_data_t data0,
- jtag_callback_data_t data1,
- jtag_callback_data_t data2,
- jtag_callback_data_t data3)
-{
- return jtag_check_value_inner((uint8_t *)data0,
- (uint8_t *)data1,
- (uint8_t *)data2,
- (int)data3);
-}
-
-static void jtag_add_scan_check(struct jtag_tap *active, void (*jtag_add_scan)(
- struct jtag_tap *active,
- int in_num_fields,
- const struct scan_field *in_fields,
- tap_state_t state),
- int in_num_fields, struct scan_field *in_fields, tap_state_t state)
-{
- jtag_add_scan(active, in_num_fields, in_fields, state);
-
- for (int i = 0; i < in_num_fields; i++) {
- if ((in_fields[i].check_value != NULL) && (in_fields[i].in_value != NULL)) {
- /* this is synchronous for a minidriver */
- jtag_add_callback4(jtag_check_value_mask_callback,
- (jtag_callback_data_t)in_fields[i].in_value,
- (jtag_callback_data_t)in_fields[i].check_value,
- (jtag_callback_data_t)in_fields[i].check_mask,
- (jtag_callback_data_t)in_fields[i].num_bits);
- }
- }
-}
-
-void jtag_add_dr_scan_check(struct jtag_tap *active,
- int in_num_fields,
- struct scan_field *in_fields,
- tap_state_t state)
-{
- if (jtag_verify)
- jtag_add_scan_check(active, jtag_add_dr_scan, in_num_fields, in_fields, state);
- else
- jtag_add_dr_scan(active, in_num_fields, in_fields, state);
-}
-
-
-void jtag_add_dr_scan(struct jtag_tap *active,
- int in_num_fields,
- const struct scan_field *in_fields,
- tap_state_t state)
-{
- assert(state != TAP_RESET);
-
- jtag_prelude(state);
-
- int retval;
- retval = interface_jtag_add_dr_scan(active, in_num_fields, in_fields, state);
- jtag_set_error(retval);
-}
-
-void jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits,
- tap_state_t state)
-{
- assert(out_bits != NULL);
- assert(state != TAP_RESET);
-
- jtag_prelude(state);
-
- int retval;
- retval = interface_jtag_add_plain_dr_scan(num_bits, out_bits, in_bits, state);
- jtag_set_error(retval);
-}
-
-void jtag_add_tlr(void)
-{
- jtag_prelude(TAP_RESET);
- jtag_set_error(interface_jtag_add_tlr());
-
- /* NOTE: order here matches TRST path in jtag_add_reset() */
- jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
- jtag_notify_event(JTAG_TRST_ASSERTED);
-}
-
-/**
- * If supported by the underlying adapter, this clocks a raw bit sequence
- * onto TMS for switching betwen JTAG and SWD modes.
- *
- * DO NOT use this to bypass the integrity checks and logging provided
- * by the jtag_add_pathmove() and jtag_add_statemove() calls.
- *
- * @param nbits How many bits to clock out.
- * @param seq The bit sequence. The LSB is bit 0 of seq[0].
- * @param state The JTAG tap state to record on completion. Use
- * TAP_INVALID to represent being in in SWD mode.
- *
- * @todo Update naming conventions to stop assuming everything is JTAG.
- */
-int jtag_add_tms_seq(unsigned nbits, const uint8_t *seq, enum tap_state state)
-{
- int retval;
-
- if (!(jtag->supported & DEBUG_CAP_TMS_SEQ))
- return ERROR_JTAG_NOT_IMPLEMENTED;
-
- jtag_checks();
- cmd_queue_cur_state = state;
-
- retval = interface_add_tms_seq(nbits, seq, state);
- jtag_set_error(retval);
- return retval;
-}
-
-void jtag_add_pathmove(int num_states, const tap_state_t *path)
-{
- tap_state_t cur_state = cmd_queue_cur_state;
-
- /* the last state has to be a stable state */
- if (!tap_is_state_stable(path[num_states - 1])) {
- LOG_ERROR("BUG: TAP path doesn't finish in a stable state");
- jtag_set_error(ERROR_JTAG_NOT_STABLE_STATE);
- return;
- }
-
- for (int i = 0; i < num_states; i++) {
- if (path[i] == TAP_RESET) {
- LOG_ERROR("BUG: TAP_RESET is not a valid state for pathmove sequences");
- jtag_set_error(ERROR_JTAG_STATE_INVALID);
- return;
- }
-
- if (tap_state_transition(cur_state, true) != path[i] &&
- tap_state_transition(cur_state, false) != path[i]) {
- LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
- tap_state_name(cur_state), tap_state_name(path[i]));
- jtag_set_error(ERROR_JTAG_TRANSITION_INVALID);
- return;
- }
- cur_state = path[i];
- }
-
- jtag_checks();
-
- jtag_set_error(interface_jtag_add_pathmove(num_states, path));
- cmd_queue_cur_state = path[num_states - 1];
-}
-
-int jtag_add_statemove(tap_state_t goal_state)
-{
- tap_state_t cur_state = cmd_queue_cur_state;
-
- if (goal_state != cur_state) {
- LOG_DEBUG("cur_state=%s goal_state=%s",
- tap_state_name(cur_state),
- tap_state_name(goal_state));
- }
-
- /* If goal is RESET, be paranoid and force that that transition
- * (e.g. five TCK cycles, TMS high). Else trust "cur_state".
- */
- if (goal_state == TAP_RESET)
- jtag_add_tlr();
- else if (goal_state == cur_state)
- /* nothing to do */;
-
- else if (tap_is_state_stable(cur_state) && tap_is_state_stable(goal_state)) {
- unsigned tms_bits = tap_get_tms_path(cur_state, goal_state);
- unsigned tms_count = tap_get_tms_path_len(cur_state, goal_state);
- tap_state_t moves[8];
- assert(tms_count < ARRAY_SIZE(moves));
-
- for (unsigned i = 0; i < tms_count; i++, tms_bits >>= 1) {
- bool bit = tms_bits & 1;
-
- cur_state = tap_state_transition(cur_state, bit);
- moves[i] = cur_state;
- }
-
- jtag_add_pathmove(tms_count, moves);
- } else if (tap_state_transition(cur_state, true) == goal_state
- || tap_state_transition(cur_state, false) == goal_state)
- jtag_add_pathmove(1, &goal_state);
- else
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-void jtag_add_runtest(int num_cycles, tap_state_t state)
-{
- jtag_prelude(state);
- jtag_set_error(interface_jtag_add_runtest(num_cycles, state));
-}
-
-
-void jtag_add_clocks(int num_cycles)
-{
- if (!tap_is_state_stable(cmd_queue_cur_state)) {
- LOG_ERROR("jtag_add_clocks() called with TAP in unstable state \"%s\"",
- tap_state_name(cmd_queue_cur_state));
- jtag_set_error(ERROR_JTAG_NOT_STABLE_STATE);
- return;
- }
-
- if (num_cycles > 0) {
- jtag_checks();
- jtag_set_error(interface_jtag_add_clocks(num_cycles));
- }
-}
-
-void swd_add_reset(int req_srst)
-{
- if (req_srst) {
- if (!(jtag_reset_config & RESET_HAS_SRST)) {
- LOG_ERROR("BUG: can't assert SRST");
- jtag_set_error(ERROR_FAIL);
- return;
- }
- req_srst = 1;
- }
-
- /* Maybe change SRST signal state */
- if (jtag_srst != req_srst) {
- int retval;
-
- retval = interface_jtag_add_reset(0, req_srst);
- if (retval != ERROR_OK)
- jtag_set_error(retval);
- else
- retval = jtag_execute_queue();
-
- if (retval != ERROR_OK) {
- LOG_ERROR("TRST/SRST error");
- return;
- }
-
- /* SRST resets everything hooked up to that signal */
- jtag_srst = req_srst;
- if (jtag_srst) {
- LOG_DEBUG("SRST line asserted");
- if (adapter_nsrst_assert_width)
- jtag_add_sleep(adapter_nsrst_assert_width * 1000);
- } else {
- LOG_DEBUG("SRST line released");
- if (adapter_nsrst_delay)
- jtag_add_sleep(adapter_nsrst_delay * 1000);
- }
-
- retval = jtag_execute_queue();
- if (retval != ERROR_OK) {
- LOG_ERROR("SRST timings error");
- return;
- }
- }
-}
-
-void jtag_add_reset(int req_tlr_or_trst, int req_srst)
-{
- int trst_with_tlr = 0;
- int new_srst = 0;
- int new_trst = 0;
-
- /* Without SRST, we must use target-specific JTAG operations
- * on each target; callers should not be requesting SRST when
- * that signal doesn't exist.
- *
- * RESET_SRST_PULLS_TRST is a board or chip level quirk, which
- * can kick in even if the JTAG adapter can't drive TRST.
- */
- if (req_srst) {
- if (!(jtag_reset_config & RESET_HAS_SRST)) {
- LOG_ERROR("BUG: can't assert SRST");
- jtag_set_error(ERROR_FAIL);
- return;
- }
- if ((jtag_reset_config & RESET_SRST_PULLS_TRST) != 0
- && !req_tlr_or_trst) {
- LOG_ERROR("BUG: can't assert only SRST");
- jtag_set_error(ERROR_FAIL);
- return;
- }
- new_srst = 1;
- }
-
- /* JTAG reset (entry to TAP_RESET state) can always be achieved
- * using TCK and TMS; that may go through a TAP_{IR,DR}UPDATE
- * state first. TRST accelerates it, and bypasses those states.
- *
- * RESET_TRST_PULLS_SRST is a board or chip level quirk, which
- * can kick in even if the JTAG adapter can't drive SRST.
- */
- if (req_tlr_or_trst) {
- if (!(jtag_reset_config & RESET_HAS_TRST))
- trst_with_tlr = 1;
- else if ((jtag_reset_config & RESET_TRST_PULLS_SRST) != 0
- && !req_srst)
- trst_with_tlr = 1;
- else
- new_trst = 1;
- }
-
- /* Maybe change TRST and/or SRST signal state */
- if (jtag_srst != new_srst || jtag_trst != new_trst) {
- int retval;
-
- retval = interface_jtag_add_reset(new_trst, new_srst);
- if (retval != ERROR_OK)
- jtag_set_error(retval);
- else
- retval = jtag_execute_queue();
-
- if (retval != ERROR_OK) {
- LOG_ERROR("TRST/SRST error");
- return;
- }
- }
-
- /* SRST resets everything hooked up to that signal */
- if (jtag_srst != new_srst) {
- jtag_srst = new_srst;
- if (jtag_srst) {
- LOG_DEBUG("SRST line asserted");
- if (adapter_nsrst_assert_width)
- jtag_add_sleep(adapter_nsrst_assert_width * 1000);
- } else {
- LOG_DEBUG("SRST line released");
- if (adapter_nsrst_delay)
- jtag_add_sleep(adapter_nsrst_delay * 1000);
- }
- }
-
- /* Maybe enter the JTAG TAP_RESET state ...
- * - using only TMS, TCK, and the JTAG state machine
- * - or else more directly, using TRST
- *
- * TAP_RESET should be invisible to non-debug parts of the system.
- */
- if (trst_with_tlr) {
- LOG_DEBUG("JTAG reset with TLR instead of TRST");
- jtag_add_tlr();
-
- } else if (jtag_trst != new_trst) {
- jtag_trst = new_trst;
- if (jtag_trst) {
- LOG_DEBUG("TRST line asserted");
- tap_set_state(TAP_RESET);
- if (jtag_ntrst_assert_width)
- jtag_add_sleep(jtag_ntrst_assert_width * 1000);
- } else {
- LOG_DEBUG("TRST line released");
- if (jtag_ntrst_delay)
- jtag_add_sleep(jtag_ntrst_delay * 1000);
-
- /* We just asserted nTRST, so we're now in TAP_RESET.
- * Inform possible listeners about this, now that
- * JTAG instructions and data can be shifted. This
- * sequence must match jtag_add_tlr().
- */
- jtag_call_event_callbacks(JTAG_TRST_ASSERTED);
- jtag_notify_event(JTAG_TRST_ASSERTED);
- }
- }
-}
-
-void jtag_add_sleep(uint32_t us)
-{
- /** @todo Here, keep_alive() appears to be a layering violation!!! */
- keep_alive();
- jtag_set_error(interface_jtag_add_sleep(us));
-}
-
-static int jtag_check_value_inner(uint8_t *captured, uint8_t *in_check_value,
- uint8_t *in_check_mask, int num_bits)
-{
- int retval = ERROR_OK;
- int compare_failed;
-
- if (in_check_mask)
- compare_failed = buf_cmp_mask(captured, in_check_value, in_check_mask, num_bits);
- else
- compare_failed = buf_cmp(captured, in_check_value, num_bits);
-
- if (compare_failed) {
- char *captured_str, *in_check_value_str;
- int bits = (num_bits > DEBUG_JTAG_IOZ) ? DEBUG_JTAG_IOZ : num_bits;
-
- /* NOTE: we've lost diagnostic context here -- 'which tap' */
-
- captured_str = buf_to_str(captured, bits, 16);
- in_check_value_str = buf_to_str(in_check_value, bits, 16);
-
- LOG_WARNING("Bad value '%s' captured during DR or IR scan:",
- captured_str);
- LOG_WARNING(" check_value: 0x%s", in_check_value_str);
-
- free(captured_str);
- free(in_check_value_str);
-
- if (in_check_mask) {
- char *in_check_mask_str;
-
- in_check_mask_str = buf_to_str(in_check_mask, bits, 16);
- LOG_WARNING(" check_mask: 0x%s", in_check_mask_str);
- free(in_check_mask_str);
- }
-
- retval = ERROR_JTAG_QUEUE_FAILED;
- }
- return retval;
-}
-
-void jtag_check_value_mask(struct scan_field *field, uint8_t *value, uint8_t *mask)
-{
- assert(field->in_value != NULL);
-
- if (value == NULL) {
- /* no checking to do */
- return;
- }
-
- jtag_execute_queue_noclear();
-
- int retval = jtag_check_value_inner(field->in_value, value, mask, field->num_bits);
- jtag_set_error(retval);
-}
-
-int default_interface_jtag_execute_queue(void)
-{
- if (NULL == jtag) {
- LOG_ERROR("No JTAG interface configured yet. "
- "Issue 'init' command in startup scripts "
- "before communicating with targets.");
- return ERROR_FAIL;
- }
-
- return jtag->execute_queue();
-}
-
-void jtag_execute_queue_noclear(void)
-{
- jtag_flush_queue_count++;
- jtag_set_error(interface_jtag_execute_queue());
-
- if (jtag_flush_queue_sleep > 0) {
- /* For debug purposes it can be useful to test performance
- * or behavior when delaying after flushing the queue,
- * e.g. to simulate long roundtrip times.
- */
- usleep(jtag_flush_queue_sleep * 1000);
- }
-}
-
-int jtag_get_flush_queue_count(void)
-{
- return jtag_flush_queue_count;
-}
-
-int jtag_execute_queue(void)
-{
- jtag_execute_queue_noclear();
- return jtag_error_clear();
-}
-
-static int jtag_reset_callback(enum jtag_event event, void *priv)
-{
- struct jtag_tap *tap = priv;
-
- if (event == JTAG_TRST_ASSERTED) {
- tap->enabled = !tap->disabled_after_reset;
-
- /* current instruction is either BYPASS or IDCODE */
- buf_set_ones(tap->cur_instr, tap->ir_length);
- tap->bypass = 1;
- }
-
- return ERROR_OK;
-}
-
-/* sleep at least us microseconds. When we sleep more than 1000ms we
- * do an alive sleep, i.e. keep GDB alive. Note that we could starve
- * GDB if we slept for <1000ms many times.
- */
-void jtag_sleep(uint32_t us)
-{
- if (us < 1000)
- usleep(us);
- else
- alive_sleep((us+999)/1000);
-}
-
-#define JTAG_MAX_AUTO_TAPS 20
-
-#define EXTRACT_JEP106_BANK(X) (((X) & 0xf00) >> 8)
-#define EXTRACT_JEP106_ID(X) (((X) & 0xfe) >> 1)
-#define EXTRACT_MFG(X) (((X) & 0xffe) >> 1)
-#define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
-#define EXTRACT_VER(X) (((X) & 0xf0000000) >> 28)
-
-/* A reserved manufacturer ID is used in END_OF_CHAIN_FLAG, so we
- * know that no valid TAP will have it as an IDCODE value.
- */
-#define END_OF_CHAIN_FLAG 0xffffffff
-
-/* a larger IR length than we ever expect to autoprobe */
-#define JTAG_IRLEN_MAX 60
-
-static int jtag_examine_chain_execute(uint8_t *idcode_buffer, unsigned num_idcode)
-{
- struct scan_field field = {
- .num_bits = num_idcode * 32,
- .out_value = idcode_buffer,
- .in_value = idcode_buffer,
- };
-
- /* initialize to the end of chain ID value */
- for (unsigned i = 0; i < num_idcode; i++)
- buf_set_u32(idcode_buffer, i * 32, 32, END_OF_CHAIN_FLAG);
-
- jtag_add_plain_dr_scan(field.num_bits, field.out_value, field.in_value, TAP_DRPAUSE);
- jtag_add_tlr();
- return jtag_execute_queue();
-}
-
-static bool jtag_examine_chain_check(uint8_t *idcodes, unsigned count)
-{
- uint8_t zero_check = 0x0;
- uint8_t one_check = 0xff;
-
- for (unsigned i = 0; i < count * 4; i++) {
- zero_check |= idcodes[i];
- one_check &= idcodes[i];
- }
-
- /* if there wasn't a single non-zero bit or if all bits were one,
- * the scan is not valid. We wrote a mix of both values; either
- *
- * - There's a hardware issue (almost certainly):
- * + all-zeroes can mean a target stuck in JTAG reset
- * + all-ones tends to mean no target
- * - The scan chain is WAY longer than we can handle, *AND* either
- * + there are several hundreds of TAPs in bypass, or
- * + at least a few dozen TAPs all have an all-ones IDCODE
- */
- if (zero_check == 0x00 || one_check == 0xff) {
- LOG_ERROR("JTAG scan chain interrogation failed: all %s",
- (zero_check == 0x00) ? "zeroes" : "ones");
- LOG_ERROR("Check JTAG interface, timings, target power, etc.");
- return false;
- }
- return true;
-}
-
-static void jtag_examine_chain_display(enum log_levels level, const char *msg,
- const char *name, uint32_t idcode)
-{
- log_printf_lf(level, __FILE__, __LINE__, __func__,
- "JTAG tap: %s %16.16s: 0x%08x "
- "(mfg: 0x%3.3x (%s), part: 0x%4.4x, ver: 0x%1.1x)",
- name, msg,
- (unsigned int)idcode,
- (unsigned int)EXTRACT_MFG(idcode),
- jep106_manufacturer(EXTRACT_JEP106_BANK(idcode), EXTRACT_JEP106_ID(idcode)),
- (unsigned int)EXTRACT_PART(idcode),
- (unsigned int)EXTRACT_VER(idcode));
-}
-
-static bool jtag_idcode_is_final(uint32_t idcode)
-{
- /*
- * Some devices, such as AVR8, will output all 1's instead
- * of TDI input value at end of chain. Allow those values
- * instead of failing.
- */
- return idcode == END_OF_CHAIN_FLAG;
-}
-
-/**
- * This helper checks that remaining bits in the examined chain data are
- * all as expected, but a single JTAG device requires only 64 bits to be
- * read back correctly. This can help identify and diagnose problems
- * with the JTAG chain earlier, gives more helpful/explicit error messages.
- * Returns TRUE iff garbage was found.
- */
-static bool jtag_examine_chain_end(uint8_t *idcodes, unsigned count, unsigned max)
-{
- bool triggered = false;
- for (; count < max - 31; count += 32) {
- uint32_t idcode = buf_get_u32(idcodes, count, 32);
-
- /* do not trigger the warning if the data looks good */
- if (jtag_idcode_is_final(idcode))
- continue;
- LOG_WARNING("Unexpected idcode after end of chain: %d 0x%08x",
- count, (unsigned int)idcode);
- triggered = true;
- }
- return triggered;
-}
-
-static bool jtag_examine_chain_match_tap(const struct jtag_tap *tap)
-{
-
- if (tap->expected_ids_cnt == 0 || !tap->hasidcode)
- return true;
-
- /* optionally ignore the JTAG version field - bits 28-31 of IDCODE */
- uint32_t mask = tap->ignore_version ? ~(0xf << 28) : ~0;
- uint32_t idcode = tap->idcode & mask;
-
- /* Loop over the expected identification codes and test for a match */
- for (unsigned ii = 0; ii < tap->expected_ids_cnt; ii++) {
- uint32_t expected = tap->expected_ids[ii] & mask;
-
- if (idcode == expected)
- return true;
-
- /* treat "-expected-id 0" as a "don't-warn" wildcard */
- if (0 == tap->expected_ids[ii])
- return true;
- }
-
- /* If none of the expected ids matched, warn */
- jtag_examine_chain_display(LOG_LVL_WARNING, "UNEXPECTED",
- tap->dotted_name, tap->idcode);
- for (unsigned ii = 0; ii < tap->expected_ids_cnt; ii++) {
- char msg[32];
-
- snprintf(msg, sizeof(msg), "expected %u of %u", ii + 1, tap->expected_ids_cnt);
- jtag_examine_chain_display(LOG_LVL_ERROR, msg,
- tap->dotted_name, tap->expected_ids[ii]);
- }
- return false;
-}
-
-/* Try to examine chain layout according to IEEE 1149.1 �12
- * This is called a "blind interrogation" of the scan chain.
- */
-static int jtag_examine_chain(void)
-{
- int retval;
- unsigned max_taps = jtag_tap_count();
-
- /* Autoprobe up to this many. */
- if (max_taps < JTAG_MAX_AUTO_TAPS)
- max_taps = JTAG_MAX_AUTO_TAPS;
-
- /* Add room for end-of-chain marker. */
- max_taps++;
-
- uint8_t *idcode_buffer = malloc(max_taps * 4);
- if (idcode_buffer == NULL)
- return ERROR_JTAG_INIT_FAILED;
-
- /* DR scan to collect BYPASS or IDCODE register contents.
- * Then make sure the scan data has both ones and zeroes.
- */
- LOG_DEBUG("DR scan interrogation for IDCODE/BYPASS");
- retval = jtag_examine_chain_execute(idcode_buffer, max_taps);
- if (retval != ERROR_OK)
- goto out;
- if (!jtag_examine_chain_check(idcode_buffer, max_taps)) {
- retval = ERROR_JTAG_INIT_FAILED;
- goto out;
- }
-
- /* Point at the 1st predefined tap, if any */
- struct jtag_tap *tap = jtag_tap_next_enabled(NULL);
-
- unsigned bit_count = 0;
- unsigned autocount = 0;
- for (unsigned i = 0; i < max_taps; i++) {
- assert(bit_count < max_taps * 32);
- uint32_t idcode = buf_get_u32(idcode_buffer, bit_count, 32);
-
- /* No predefined TAP? Auto-probe. */
- if (tap == NULL) {
- /* Is there another TAP? */
- if (jtag_idcode_is_final(idcode))
- break;
-
- /* Default everything in this TAP except IR length.
- *
- * REVISIT create a jtag_alloc(chip, tap) routine, and
- * share it with jim_newtap_cmd().
- */
- tap = calloc(1, sizeof *tap);
- if (!tap) {
- retval = ERROR_FAIL;
- goto out;
- }
-
- tap->chip = alloc_printf("auto%u", autocount++);
- tap->tapname = strdup("tap");
- tap->dotted_name = alloc_printf("%s.%s", tap->chip, tap->tapname);
-
- tap->ir_length = 0; /* ... signifying irlen autoprobe */
- tap->ir_capture_mask = 0x03;
- tap->ir_capture_value = 0x01;
-
- tap->enabled = true;
-
- jtag_tap_init(tap);
- }
-
- if ((idcode & 1) == 0) {
- /* Zero for LSB indicates a device in bypass */
- LOG_INFO("TAP %s does not have IDCODE", tap->dotted_name);
- tap->hasidcode = false;
- tap->idcode = 0;
-
- bit_count += 1;
- } else {
- /* Friendly devices support IDCODE */
- tap->hasidcode = true;
- tap->idcode = idcode;
- jtag_examine_chain_display(LOG_LVL_INFO, "tap/device found", tap->dotted_name, idcode);
-
- bit_count += 32;
- }
-
- /* ensure the TAP ID matches what was expected */
- if (!jtag_examine_chain_match_tap(tap))
- retval = ERROR_JTAG_INIT_SOFT_FAIL;
-
- tap = jtag_tap_next_enabled(tap);
- }
-
- /* After those IDCODE or BYPASS register values should be
- * only the data we fed into the scan chain.
- */
- if (jtag_examine_chain_end(idcode_buffer, bit_count, max_taps * 32)) {
- LOG_ERROR("double-check your JTAG setup (interface, speed, ...)");
- retval = ERROR_JTAG_INIT_FAILED;
- goto out;
- }
-
- /* Return success or, for backwards compatibility if only
- * some IDCODE values mismatched, a soft/continuable fault.
- */
-out:
- free(idcode_buffer);
- return retval;
-}
-
-/*
- * Validate the date loaded by entry to the Capture-IR state, to help
- * find errors related to scan chain configuration (wrong IR lengths)
- * or communication.
- *
- * Entry state can be anything. On non-error exit, all TAPs are in
- * bypass mode. On error exits, the scan chain is reset.
- */
-static int jtag_validate_ircapture(void)
-{
- struct jtag_tap *tap;
- int total_ir_length = 0;
- uint8_t *ir_test = NULL;
- struct scan_field field;
- uint64_t val;
- int chain_pos = 0;
- int retval;
-
- /* when autoprobing, accomodate huge IR lengths */
- for (tap = NULL, total_ir_length = 0;
- (tap = jtag_tap_next_enabled(tap)) != NULL;
- total_ir_length += tap->ir_length) {
- if (tap->ir_length == 0)
- total_ir_length += JTAG_IRLEN_MAX;
- }
-
- /* increase length to add 2 bit sentinel after scan */
- total_ir_length += 2;
-
- ir_test = malloc(DIV_ROUND_UP(total_ir_length, 8));
- if (ir_test == NULL)
- return ERROR_FAIL;
-
- /* after this scan, all TAPs will capture BYPASS instructions */
- buf_set_ones(ir_test, total_ir_length);
-
- field.num_bits = total_ir_length;
- field.out_value = ir_test;
- field.in_value = ir_test;
-
- jtag_add_plain_ir_scan(field.num_bits, field.out_value, field.in_value, TAP_IDLE);
-
- LOG_DEBUG("IR capture validation scan");
- retval = jtag_execute_queue();
- if (retval != ERROR_OK)
- goto done;
-
- tap = NULL;
- chain_pos = 0;
-
- for (;; ) {
- tap = jtag_tap_next_enabled(tap);
- if (tap == NULL)
- break;
-
- /* If we're autoprobing, guess IR lengths. They must be at
- * least two bits. Guessing will fail if (a) any TAP does
- * not conform to the JTAG spec; or (b) when the upper bits
- * captured from some conforming TAP are nonzero. Or if
- * (c) an IR length is longer than JTAG_IRLEN_MAX bits,
- * an implementation limit, which could someday be raised.
- *
- * REVISIT optimization: if there's a *single* TAP we can
- * lift restrictions (a) and (b) by scanning a recognizable
- * pattern before the all-ones BYPASS. Check for where the
- * pattern starts in the result, instead of an 0...01 value.
- *
- * REVISIT alternative approach: escape to some tcl code
- * which could provide more knowledge, based on IDCODE; and
- * only guess when that has no success.
- */
- if (tap->ir_length == 0) {
- tap->ir_length = 2;
- while ((val = buf_get_u64(ir_test, chain_pos, tap->ir_length + 1)) == 1
- && tap->ir_length < JTAG_IRLEN_MAX) {
- tap->ir_length++;
- }
- LOG_WARNING("AUTO %s - use \"jtag newtap " "%s %s -irlen %d "
- "-expected-id 0x%08" PRIx32 "\"",
- tap->dotted_name, tap->chip, tap->tapname, tap->ir_length, tap->idcode);
- }
-
- /* Validate the two LSBs, which must be 01 per JTAG spec.
- *
- * Or ... more bits could be provided by TAP declaration.
- * Plus, some taps (notably in i.MX series chips) violate
- * this part of the JTAG spec, so their capture mask/value
- * attributes might disable this test.
- */
- val = buf_get_u64(ir_test, chain_pos, tap->ir_length);
- if ((val & tap->ir_capture_mask) != tap->ir_capture_value) {
- LOG_ERROR("%s: IR capture error; saw 0x%0*" PRIx64 " not 0x%0*" PRIx32,
- jtag_tap_name(tap),
- (tap->ir_length + 7) / tap->ir_length, val,
- (tap->ir_length + 7) / tap->ir_length, tap->ir_capture_value);
-
- retval = ERROR_JTAG_INIT_FAILED;
- goto done;
- }
- LOG_DEBUG("%s: IR capture 0x%0*" PRIx64, jtag_tap_name(tap),
- (tap->ir_length + 7) / tap->ir_length, val);
- chain_pos += tap->ir_length;
- }
-
- /* verify the '11' sentinel we wrote is returned at the end */
- val = buf_get_u64(ir_test, chain_pos, 2);
- if (val != 0x3) {
- char *cbuf = buf_to_str(ir_test, total_ir_length, 16);
-
- LOG_ERROR("IR capture error at bit %d, saw 0x%s not 0x...3",
- chain_pos, cbuf);
- free(cbuf);
- retval = ERROR_JTAG_INIT_FAILED;
- }
-
-done:
- free(ir_test);
- if (retval != ERROR_OK) {
- jtag_add_tlr();
- jtag_execute_queue();
- }
- return retval;
-}
-
-void jtag_tap_init(struct jtag_tap *tap)
-{
- unsigned ir_len_bits;
- unsigned ir_len_bytes;
-
- /* if we're autoprobing, cope with potentially huge ir_length */
- ir_len_bits = tap->ir_length ? : JTAG_IRLEN_MAX;
- ir_len_bytes = DIV_ROUND_UP(ir_len_bits, 8);
-
- tap->expected = calloc(1, ir_len_bytes);
- tap->expected_mask = calloc(1, ir_len_bytes);
- tap->cur_instr = malloc(ir_len_bytes);
-
- /** @todo cope better with ir_length bigger than 32 bits */
- if (ir_len_bits > 32)
- ir_len_bits = 32;
-
- buf_set_u32(tap->expected, 0, ir_len_bits, tap->ir_capture_value);
- buf_set_u32(tap->expected_mask, 0, ir_len_bits, tap->ir_capture_mask);
-
- /* TAP will be in bypass mode after jtag_validate_ircapture() */
- tap->bypass = 1;
- buf_set_ones(tap->cur_instr, tap->ir_length);
-
- /* register the reset callback for the TAP */
- jtag_register_event_callback(&jtag_reset_callback, tap);
- jtag_tap_add(tap);
-
- LOG_DEBUG("Created Tap: %s @ abs position %d, "
- "irlen %d, capture: 0x%x mask: 0x%x", tap->dotted_name,
- tap->abs_chain_position, tap->ir_length,
- (unsigned) tap->ir_capture_value,
- (unsigned) tap->ir_capture_mask);
-}
-
-void jtag_tap_free(struct jtag_tap *tap)
-{
- jtag_unregister_event_callback(&jtag_reset_callback, tap);
-
- free(tap->expected);
- free(tap->expected_mask);
- free(tap->expected_ids);
- free(tap->cur_instr);
- free(tap->chip);
- free(tap->tapname);
- free(tap->dotted_name);
- free(tap);
-}
-
-/**
- * Do low-level setup like initializing registers, output signals,
- * and clocking.
- */
-int adapter_init(struct command_context *cmd_ctx)
-{
- if (jtag)
- return ERROR_OK;
-
- if (!jtag_interface) {
- /* nothing was previously specified by "interface" command */
- LOG_ERROR("Debug Adapter has to be specified, "
- "see \"interface\" command");
- return ERROR_JTAG_INVALID_INTERFACE;
- }
-
- int retval;
- retval = jtag_interface->init();
- if (retval != ERROR_OK)
- return retval;
- jtag = jtag_interface;
-
- /* LEGACY SUPPORT ... adapter drivers must declare what
- * transports they allow. Until they all do so, assume
- * the legacy drivers are JTAG-only
- */
- if (!transports_are_declared()) {
- LOG_ERROR("Adapter driver '%s' did not declare "
- "which transports it allows; assuming "
- "JTAG-only", jtag->name);
- retval = allow_transports(cmd_ctx, jtag_only);
- if (retval != ERROR_OK)
- return retval;
- }
-
- if (jtag->speed == NULL) {
- LOG_INFO("This adapter doesn't support configurable speed");
- return ERROR_OK;
- }
-
- if (CLOCK_MODE_UNSELECTED == clock_mode) {
- LOG_ERROR("An adapter speed is not selected in the init script."
- " Insert a call to adapter_khz or jtag_rclk to proceed.");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- int requested_khz = jtag_get_speed_khz();
- int actual_khz = requested_khz;
- int jtag_speed_var = 0;
- retval = jtag_get_speed(&jtag_speed_var);
- if (retval != ERROR_OK)
- return retval;
- retval = jtag->speed(jtag_speed_var);
- if (retval != ERROR_OK)
- return retval;
- retval = jtag_get_speed_readable(&actual_khz);
- if (ERROR_OK != retval)
- LOG_INFO("adapter-specific clock speed value %d", jtag_speed_var);
- else if (actual_khz) {
- /* Adaptive clocking -- JTAG-specific */
- if ((CLOCK_MODE_RCLK == clock_mode)
- || ((CLOCK_MODE_KHZ == clock_mode) && !requested_khz)) {
- LOG_INFO("RCLK (adaptive clock speed) not supported - fallback to %d kHz"
- , actual_khz);
- } else
- LOG_INFO("clock speed %d kHz", actual_khz);
- } else
- LOG_INFO("RCLK (adaptive clock speed)");
-
- return ERROR_OK;
-}
-
-int jtag_init_inner(struct command_context *cmd_ctx)
-{
- struct jtag_tap *tap;
- int retval;
- bool issue_setup = true;
-
- LOG_DEBUG("Init JTAG chain");
-
- tap = jtag_tap_next_enabled(NULL);
- if (tap == NULL) {
- /* Once JTAG itself is properly set up, and the scan chain
- * isn't absurdly large, IDCODE autoprobe should work fine.
- *
- * But ... IRLEN autoprobe can fail even on systems which
- * are fully conformant to JTAG. Also, JTAG setup can be
- * quite finicky on some systems.
- *
- * REVISIT: if TAP autoprobe works OK, then in many cases
- * we could escape to tcl code and set up targets based on
- * the TAP's IDCODE values.
- */
- LOG_WARNING("There are no enabled taps. "
- "AUTO PROBING MIGHT NOT WORK!!");
-
- /* REVISIT default clock will often be too fast ... */
- }
-
- jtag_add_tlr();
- retval = jtag_execute_queue();
- if (retval != ERROR_OK)
- return retval;
-
- /* Examine DR values first. This discovers problems which will
- * prevent communication ... hardware issues like TDO stuck, or
- * configuring the wrong number of (enabled) TAPs.
- */
- retval = jtag_examine_chain();
- switch (retval) {
- case ERROR_OK:
- /* complete success */
- break;
- default:
- /* For backward compatibility reasons, try coping with
- * configuration errors involving only ID mismatches.
- * We might be able to talk to the devices.
- *
- * Also the device might be powered down during startup.
- *
- * After OpenOCD starts, we can try to power on the device
- * and run a reset.
- */
- LOG_ERROR("Trying to use configured scan chain anyway...");
- issue_setup = false;
- break;
- }
-
- /* Now look at IR values. Problems here will prevent real
- * communication. They mostly mean that the IR length is
- * wrong ... or that the IR capture value is wrong. (The
- * latter is uncommon, but easily worked around: provide
- * ircapture/irmask values during TAP setup.)
- */
- retval = jtag_validate_ircapture();
- if (retval != ERROR_OK) {
- /* The target might be powered down. The user
- * can power it up and reset it after firing
- * up OpenOCD.
- */
- issue_setup = false;
- }
-
- if (issue_setup)
- jtag_notify_event(JTAG_TAP_EVENT_SETUP);
- else
- LOG_WARNING("Bypassing JTAG setup events due to errors");
-
-
- return ERROR_OK;
-}
-
-int adapter_quit(void)
-{
- if (!jtag || !jtag->quit)
- return ERROR_OK;
-
- /* close the JTAG interface */
- int result = jtag->quit();
- if (ERROR_OK != result)
- LOG_ERROR("failed: %d", result);
-
- return ERROR_OK;
-}
-
-int swd_init_reset(struct command_context *cmd_ctx)
-{
- int retval = adapter_init(cmd_ctx);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("Initializing with hard SRST reset");
-
- if (jtag_reset_config & RESET_HAS_SRST)
- swd_add_reset(1);
- swd_add_reset(0);
- retval = jtag_execute_queue();
- return retval;
-}
-
-int jtag_init_reset(struct command_context *cmd_ctx)
-{
- int retval = adapter_init(cmd_ctx);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("Initializing with hard TRST+SRST reset");
-
- /*
- * This procedure is used by default when OpenOCD triggers a reset.
- * It's now done through an overridable Tcl "init_reset" wrapper.
- *
- * This started out as a more powerful "get JTAG working" reset than
- * jtag_init_inner(), applying TRST because some chips won't activate
- * JTAG without a TRST cycle (presumed to be async, though some of
- * those chips synchronize JTAG activation using TCK).
- *
- * But some chips only activate JTAG as part of an SRST cycle; SRST
- * got mixed in. So it became a hard reset routine, which got used
- * in more places, and which coped with JTAG reset being forced as
- * part of SRST (srst_pulls_trst).
- *
- * And even more corner cases started to surface: TRST and/or SRST
- * assertion timings matter; some chips need other JTAG operations;
- * TRST/SRST sequences can need to be different from these, etc.
- *
- * Systems should override that wrapper to support system-specific
- * requirements that this not-fully-generic code doesn't handle.
- *
- * REVISIT once Tcl code can read the reset_config modes, this won't
- * need to be a C routine at all...
- */
- if (jtag_reset_config & RESET_HAS_SRST) {
- jtag_add_reset(1, 1);
- if ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0)
- jtag_add_reset(0, 1);
- } else {
- jtag_add_reset(1, 0); /* TAP_RESET, using TMS+TCK or TRST */
- }
-
- /* some targets enable us to connect with srst asserted */
- if (jtag_reset_config & RESET_CNCT_UNDER_SRST) {
- if (jtag_reset_config & RESET_SRST_NO_GATING)
- jtag_add_reset(0, 1);
- else {
- LOG_WARNING("\'srst_nogate\' reset_config option is required");
- jtag_add_reset(0, 0);
- }
- } else
- jtag_add_reset(0, 0);
- retval = jtag_execute_queue();
- if (retval != ERROR_OK)
- return retval;
-
- /* Check that we can communication on the JTAG chain + eventually we want to
- * be able to perform enumeration only after OpenOCD has started
- * telnet and GDB server
- *
- * That would allow users to more easily perform any magic they need to before
- * reset happens.
- */
- return jtag_init_inner(cmd_ctx);
-}
-
-int jtag_init(struct command_context *cmd_ctx)
-{
- int retval = adapter_init(cmd_ctx);
- if (retval != ERROR_OK)
- return retval;
-
- /* guard against oddball hardware: force resets to be inactive */
- jtag_add_reset(0, 0);
-
- /* some targets enable us to connect with srst asserted */
- if (jtag_reset_config & RESET_CNCT_UNDER_SRST) {
- if (jtag_reset_config & RESET_SRST_NO_GATING)
- jtag_add_reset(0, 1);
- else
- LOG_WARNING("\'srst_nogate\' reset_config option is required");
- }
- retval = jtag_execute_queue();
- if (retval != ERROR_OK)
- return retval;
-
- if (Jim_Eval_Named(cmd_ctx->interp, "jtag_init", __FILE__, __LINE__) != JIM_OK)
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-unsigned jtag_get_speed_khz(void)
-{
- return speed_khz;
-}
-
-static int adapter_khz_to_speed(unsigned khz, int *speed)
-{
- LOG_DEBUG("convert khz to interface specific speed value");
- speed_khz = khz;
- if (jtag != NULL) {
- LOG_DEBUG("have interface set up");
- int speed_div1;
- int retval = jtag->khz(jtag_get_speed_khz(), &speed_div1);
- if (ERROR_OK != retval)
- return retval;
- *speed = speed_div1;
- }
- return ERROR_OK;
-}
-
-static int jtag_rclk_to_speed(unsigned fallback_speed_khz, int *speed)
-{
- int retval = adapter_khz_to_speed(0, speed);
- if ((ERROR_OK != retval) && fallback_speed_khz) {
- LOG_DEBUG("trying fallback speed...");
- retval = adapter_khz_to_speed(fallback_speed_khz, speed);
- }
- return retval;
-}
-
-static int jtag_set_speed(int speed)
-{
- jtag_speed = speed;
- /* this command can be called during CONFIG,
- * in which case jtag isn't initialized */
- return jtag ? jtag->speed(speed) : ERROR_OK;
-}
-
-int jtag_config_khz(unsigned khz)
-{
- LOG_DEBUG("handle jtag khz");
- clock_mode = CLOCK_MODE_KHZ;
- int speed = 0;
- int retval = adapter_khz_to_speed(khz, &speed);
- return (ERROR_OK != retval) ? retval : jtag_set_speed(speed);
-}
-
-int jtag_config_rclk(unsigned fallback_speed_khz)
-{
- LOG_DEBUG("handle jtag rclk");
- clock_mode = CLOCK_MODE_RCLK;
- rclk_fallback_speed_khz = fallback_speed_khz;
- int speed = 0;
- int retval = jtag_rclk_to_speed(fallback_speed_khz, &speed);
- return (ERROR_OK != retval) ? retval : jtag_set_speed(speed);
-}
-
-int jtag_get_speed(int *speed)
-{
- switch (clock_mode) {
- case CLOCK_MODE_KHZ:
- adapter_khz_to_speed(jtag_get_speed_khz(), speed);
- break;
- case CLOCK_MODE_RCLK:
- jtag_rclk_to_speed(rclk_fallback_speed_khz, speed);
- break;
- default:
- LOG_ERROR("BUG: unknown jtag clock mode");
- return ERROR_FAIL;
- }
- return ERROR_OK;
-}
-
-int jtag_get_speed_readable(int *khz)
-{
- int jtag_speed_var = 0;
- int retval = jtag_get_speed(&jtag_speed_var);
- if (retval != ERROR_OK)
- return retval;
- return jtag ? jtag->speed_div(jtag_speed_var, khz) : ERROR_OK;
-}
-
-void jtag_set_verify(bool enable)
-{
- jtag_verify = enable;
-}
-
-bool jtag_will_verify()
-{
- return jtag_verify;
-}
-
-void jtag_set_verify_capture_ir(bool enable)
-{
- jtag_verify_capture_ir = enable;
-}
-
-bool jtag_will_verify_capture_ir()
-{
- return jtag_verify_capture_ir;
-}
-
-int jtag_power_dropout(int *dropout)
-{
- if (jtag == NULL) {
- /* TODO: as the jtag interface is not valid all
- * we can do at the moment is exit OpenOCD */
- LOG_ERROR("No Valid JTAG Interface Configured.");
- exit(-1);
- }
- return jtag->power_dropout(dropout);
-}
-
-int jtag_srst_asserted(int *srst_asserted)
-{
- return jtag->srst_asserted(srst_asserted);
-}
-
-enum reset_types jtag_get_reset_config(void)
-{
- return jtag_reset_config;
-}
-void jtag_set_reset_config(enum reset_types type)
-{
- jtag_reset_config = type;
-}
-
-int jtag_get_trst(void)
-{
- return jtag_trst;
-}
-int jtag_get_srst(void)
-{
- return jtag_srst;
-}
-
-void jtag_set_nsrst_delay(unsigned delay)
-{
- adapter_nsrst_delay = delay;
-}
-unsigned jtag_get_nsrst_delay(void)
-{
- return adapter_nsrst_delay;
-}
-void jtag_set_ntrst_delay(unsigned delay)
-{
- jtag_ntrst_delay = delay;
-}
-unsigned jtag_get_ntrst_delay(void)
-{
- return jtag_ntrst_delay;
-}
-
-
-void jtag_set_nsrst_assert_width(unsigned delay)
-{
- adapter_nsrst_assert_width = delay;
-}
-unsigned jtag_get_nsrst_assert_width(void)
-{
- return adapter_nsrst_assert_width;
-}
-void jtag_set_ntrst_assert_width(unsigned delay)
-{
- jtag_ntrst_assert_width = delay;
-}
-unsigned jtag_get_ntrst_assert_width(void)
-{
- return jtag_ntrst_assert_width;
-}
-
-static int jtag_select(struct command_context *ctx)
-{
- int retval;
-
- /* NOTE: interface init must already have been done.
- * That works with only C code ... no Tcl glue required.
- */
-
- retval = jtag_register_commands(ctx);
-
- if (retval != ERROR_OK)
- return retval;
-
- retval = svf_register_commands(ctx);
-
- if (retval != ERROR_OK)
- return retval;
-
- return xsvf_register_commands(ctx);
-}
-
-static struct transport jtag_transport = {
- .name = "jtag",
- .select = jtag_select,
- .init = jtag_init,
-};
-
-static void jtag_constructor(void) __attribute__((constructor));
-static void jtag_constructor(void)
-{
- transport_register(&jtag_transport);
-}
-
-/** Returns true if the current debug session
- * is using JTAG as its transport.
- */
-bool transport_is_jtag(void)
-{
- return get_current_transport() == &jtag_transport;
-}
-
-void adapter_assert_reset(void)
-{
- if (transport_is_jtag()) {
- if (jtag_reset_config & RESET_SRST_PULLS_TRST)
- jtag_add_reset(1, 1);
- else
- jtag_add_reset(0, 1);
- } else if (transport_is_swd())
- swd_add_reset(1);
- else if (get_current_transport() != NULL)
- LOG_ERROR("reset is not supported on %s",
- get_current_transport()->name);
- else
- LOG_ERROR("transport is not selected");
-}
-
-void adapter_deassert_reset(void)
-{
- if (transport_is_jtag())
- jtag_add_reset(0, 0);
- else if (transport_is_swd())
- swd_add_reset(0);
- else if (get_current_transport() != NULL)
- LOG_ERROR("reset is not supported on %s",
- get_current_transport()->name);
- else
- LOG_ERROR("transport is not selected");
-}
-
-int adapter_config_trace(bool enabled, enum tpio_pin_protocol pin_protocol,
- uint32_t port_size, unsigned int *trace_freq)
-{
- if (jtag->config_trace)
- return jtag->config_trace(enabled, pin_protocol, port_size,
- trace_freq);
- else if (enabled) {
- LOG_ERROR("The selected interface does not support tracing");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-int adapter_poll_trace(uint8_t *buf, size_t *size)
-{
- if (jtag->poll_trace)
- return jtag->poll_trace(buf, size);
-
- return ERROR_FAIL;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/driver.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/driver.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/driver.h
deleted file mode 100755
index 5a7b4ed..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/driver.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef JTAG_DRIVER_H
-#define JTAG_DRIVER_H
-
-struct command_context;
-
-int interface_register_commands(struct command_context *ctx);
-
-#endif /* JTAG_DRIVER_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/Makefile.am
deleted file mode 100755
index 2aaf8fd..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/Makefile.am
+++ /dev/null
@@ -1,173 +0,0 @@
-include $(top_srcdir)/common.mk
-
-noinst_LTLIBRARIES = libocdjtagdrivers.la
-libocdjtagdrivers_la_LIBADD =
-
-libocdjtagdrivers_la_SOURCES = \
- $(DRIVERFILES)
-
-libocdjtagdrivers_la_CPPFLAGS = $(AM_CPPFLAGS) $(LIBUSB1_CFLAGS) \
- $(LIBUSB0_CFLAGS) $(HIDAPI_CFLAGS) $(LIBFTDI_CFLAGS)
-
-ULINK_FIRMWARE = $(srcdir)/OpenULINK
-
-EXTRA_DIST = $(ULINK_FIRMWARE) \
- usb_blaster/README.CheapClone \
- Makefile.rlink \
- rlink_call.m4 \
- rlink_init.m4
-
-DRIVERFILES =
-SUBDIRS=
-
-if JLINK
-if INTERNAL_LIBJAYLINK
-SUBDIRS += libjaylink
-
-libjaylink_internal_la_SOURCES = jlink.c
-libjaylink_internal_la_LIBADD = libjaylink/libjaylink/libjaylink.la
-libjaylink_internal_la_CPPFLAGS = -I$(builddir)/libjaylink/libjaylink \
- -I$(srcdir)/libjaylink $(AM_CPPFLAGS)
-
-noinst_LTLIBRARIES += libjaylink_internal.la
-libocdjtagdrivers_la_LIBADD += libjaylink_internal.la
-else
-DRIVERFILES += jlink.c
-endif
-endif
-
-# Standard Driver: common files
-DRIVERFILES += driver.c
-
-if USE_LIBUSB1
-DRIVERFILES += libusb1_common.c
-endif
-
-if USE_LIBUSB0
-DRIVERFILES += usb_common.c
-if !USE_LIBUSB1
-DRIVERFILES += libusb0_common.c
-endif
-endif
-
-if BITBANG
-DRIVERFILES += bitbang.c
-endif
-if PARPORT
-DRIVERFILES += parport.c
-endif
-if DUMMY
-DRIVERFILES += dummy.c
-endif
-if FT2232_DRIVER
-DRIVERFILES += ft2232.c
-endif
-if FTDI
-DRIVERFILES += ftdi.c mpsse.c
-endif
-if JTAG_VPI
-DRIVERFILES += jtag_vpi.c
-endif
-if USB_BLASTER_DRIVER
-SUBDIRS += usb_blaster
-libocdjtagdrivers_la_LIBADD += $(top_builddir)/src/jtag/drivers/usb_blaster/libocdusbblaster.la
-endif
-if AMTJTAGACCEL
-DRIVERFILES += amt_jtagaccel.c
-endif
-if EP93XX
-DRIVERFILES += ep93xx.c
-endif
-if AT91RM9200
-DRIVERFILES += at91rm9200.c
-endif
-if GW16012
-DRIVERFILES += gw16012.c
-endif
-if BITQ
-DRIVERFILES += bitq.c
-endif
-if PRESTO_DRIVER
-DRIVERFILES += presto.c
-endif
-if USBPROG
-DRIVERFILES += usbprog.c
-endif
-if RLINK
-DRIVERFILES += rlink.c rlink_speed_table.c
-endif
-if ULINK
-DRIVERFILES += ulink.c
-ulinkdir = $(pkgdatadir)/OpenULINK
-dist_ulink_DATA = $(ULINK_FIRMWARE)/ulink_firmware.hex
-endif
-if VSLLINK
-DRIVERFILES += versaloon/usbtoxxx/usbtogpio.c
-DRIVERFILES += versaloon/usbtoxxx/usbtojtagraw.c
-DRIVERFILES += versaloon/usbtoxxx/usbtoswd.c
-DRIVERFILES += versaloon/usbtoxxx/usbtopwr.c
-DRIVERFILES += versaloon/usbtoxxx/usbtoxxx.c
-DRIVERFILES += versaloon/versaloon.c
-DRIVERFILES += vsllink.c
-endif
-if ARMJTAGEW
-DRIVERFILES += arm-jtag-ew.c
-endif
-if BUSPIRATE
-DRIVERFILES += buspirate.c
-endif
-if REMOTE_BITBANG
-DRIVERFILES += remote_bitbang.c
-endif
-if HLADAPTER
-DRIVERFILES += stlink_usb.c
-DRIVERFILES += ti_icdi_usb.c
-endif
-if OSBDM
-DRIVERFILES += osbdm.c
-endif
-if OPENDOUS
-DRIVERFILES += opendous.c
-endif
-if SYSFSGPIO
-DRIVERFILES += sysfsgpio.c
-endif
-if BCM2835GPIO
-DRIVERFILES += bcm2835gpio.c
-endif
-
-if OPENJTAG
-DRIVERFILES += openjtag.c
-endif
-
-if CMSIS_DAP
-DRIVERFILES += cmsis_dap_usb.c
-endif
-
-noinst_HEADERS = \
- bitbang.h \
- bitq.h \
- ftd2xx_common.h \
- libusb0_common.h \
- libusb1_common.h \
- libusb_common.h \
- minidriver_imp.h \
- mpsse.h \
- rlink.h \
- rlink_dtc_cmd.h \
- rlink_ep1_cmd.h \
- rlink_st7.h \
- usb_common.h \
- versaloon/usbtoxxx/usbtoxxx.h \
- versaloon/usbtoxxx/usbtoxxx_internal.h \
- versaloon/versaloon.h \
- versaloon/versaloon_include.h \
- versaloon/versaloon_internal.h
-
-DIST_SUBDIRS = usb_blaster
-
-if INTERNAL_LIBJAYLINK
-DIST_SUBDIRS += libjaylink
-endif
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/Makefile.rlink
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/Makefile.rlink b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/Makefile.rlink
deleted file mode 100755
index 6a7638e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/Makefile.rlink
+++ /dev/null
@@ -1,73 +0,0 @@
-#***************************************************************************
-#* Copyright (C) 2008 Lou Deluxe *
-#* lou.openocd012@fixit.nospammail.net *
-#* *
-#* This program is free software; you can redistribute it and/or modify *
-#* it under the terms of the GNU General Public License as published by *
-#* the Free Software Foundation; either version 2 of the License, or *
-#* (at your option) any later version. *
-#* *
-#* This program is distributed in the hope that it will be useful, *
-#* but WITHOUT ANY WARRANTY; without even the implied warranty of *
-#* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-#* GNU General Public License for more details. *
-#* *
-#* You should have received a copy of the GNU General Public License *
-#* along with this program; if not, write to the *
-#* Free Software Foundation, Inc., *
-#* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
-#***************************************************************************
-
-TOP = ../../..
-INTERFACE_NAME = rlink
-
-PERL = perl
-M4 = m4
-
-TARGETDIR = ${TOP}/src/target
-TOOLSDIR = ${TOP}/tools
-
-MAKE_SPEED_TABLE = ${TOOLSDIR}/rlink_make_speed_table/rlink_make_speed_table
-ST7_DTC_AS = ${TOOLSDIR}/st7_dtc_as/st7_dtc_as
-
-OPENOCD = ${TOP}/src/openocd
-OPENOCD_CONFIG = -s ${TARGETDIR}
-OPENOCD_CONFIG += -f interface/rlink.cfg
-OPENOCD_CONFIG += -f board/stm32f10x_128k_eval.cfg
-
-PATCHFILE = /tmp/openocd_${INTERFACE_NAME}.diff.gz
-
-# relative to ${TOP}
-SVNADDFILES =
-SVNADDFILES += src/target/interface/rlink.cfg
-SVNADDFILES += src/jtag/${INTERFACE_NAME}.c
-SVNADDFILES += src/jtag/${INTERFACE_NAME}
-
-PRESCALERS = 64 11 8 2
-
-DTCFILES =
-DTCFILES += $(addsuffix _init.dtc, ${PRESCALERS})
-DTCFILES += $(addsuffix _call.dtc, ${PRESCALERS})
-
-default: rlink_speed_table.c clean
-
-%_init.fsm: rlink_init.m4
- ${M4} -P -DSHIFTER_PRESCALER=`echo "$@" | sed -e's/_.*//'` $< > $@
-
-%_call.fsm: rlink_call.m4
- ${M4} -P -DSHIFTER_PRESCALER=`echo "$@" | sed -e's/_.*//'` $< > $@
-
-%.dtc: %.fsm
- ${ST7_DTC_AS} -b -o $@ -i $< > /dev/null
-
-rlink_speed_table.c: ${DTCFILES}
- ${MAKE_SPEED_TABLE} ${PRESCALERS} > $@ || rm $@
-
-clean:
- -rm *.dtc *.fsm
-
-distclean: clean
-
-test: default
- (cd ${TOP} && (rm src/jtag/${INTERFACE_NAME}.o; ${MAKE}))
- ${OPENOCD} -d0 ${OPENOCD_CONFIG} -c init -c 'poll off'
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/README
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/README b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/README
deleted file mode 100755
index 445d770..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/README
+++ /dev/null
@@ -1,34 +0,0 @@
-This is the OpenULINK firmware for the Keil ULINK JTAG adapter.
-
-The main components of the Keil ULINK adapter are:
-- Cypress EZ-USB microcontroller: enhanced 8051 CPU + USB core (1.1 Full-Speed)
-- SRAM memory chip
-- Level shifters to support different JTAG signal voltage levels
-- Pin headers for various JTAG pin assignments
-
-This firmware can only be run on the ORIGINAL Keil ULINK adapter, not on the
-newer ULINK2, ULINK-ME or ULINK-PRO, as these adapters are based on different
-hardware.
-
-To compile the firmware, the SDCC compiler package is required. Most Linux
-distributions include SDCC in their official package repositories. The SDCC
-source code can be found at http://sdcc.sourceforge.net/
-Simply type "make hex" in the OpenULINK directory to compile the firmware.
-"make clean" will remove all generated files except the Intel HEX file required
-for downloading the firmware to the ULINK adapter.
-
-Note that the EZ-USB microcontroller does not have on-chip flash, nor does the
-Keil ULINK include on-board memory to store the firmware program of the EZ-USB.
-Instead, upon initial connection of the ULINK adapter to the host PC via USB,
-the EZ-USB core has enough intelligence to act as a stand-alone USB device,
-responding to USB control requests and allowing firmware download via a special
-VENDOR-type control request. Then, the EZ-USB microcontroller simulates a
-disconnect and re-connect to the USB bus. It may take up to two seconds for the
-host to recognize the newly connected device before OpenOCD can proceed to
-execute JTAG commands. This delay is only visible when OpenOCD first uses a
-blank (unconfigured) ULINK device.
-
-Once the user disconnects the ULINK adapter, all its memory contents are lost
-and the firmware download process has to be executed again. This also maintains
-compatibility with the original Keil uVision IDE, which will happily download
-its own firmware image to a blank ULINK adapter.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/common.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/common.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/common.h
deleted file mode 100755
index b4f6df9..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/common.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef __COMMON_H
-#define __COMMON_H
-
-#define DIV_ROUND_UP(m, n) (((m) + (n) - 1) / (n))
-
-#endif
[10/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil.c
deleted file mode 100755
index e186724..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil.c
+++ /dev/null
@@ -1,536 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007-2010 by �yvind Harboe *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/* this file contains various functionality useful to standalone systems */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "log.h"
-#include "time_support.h"
-
-#ifdef HAVE_ARPA_INET_H
-#include <arpa/inet.h>
-#endif
-#ifdef HAVE_DIRENT_H
-#include <dirent.h>
-#endif
-#ifdef HAVE_NETDB_H
-#include <netdb.h>
-#endif
-#ifdef HAVE_NET_IF_H
-#include <net/if.h>
-#endif
-#ifdef HAVE_SYS_IOCTL_H
-#include <sys/ioctl.h>
-#endif
-#ifdef HAVE_SYS_STAT_H
-#include <sys/stat.h>
-#endif
-#ifdef HAVE_IFADDRS_H
-#include <ifaddrs.h>
-#endif
-#ifdef HAVE_MALLOC_H
-#include <malloc.h>
-#endif
-
-/* loads a file and returns a pointer to it in memory. The file contains
- * a 0 byte(sentinel) after len bytes - the length of the file. */
-static int load_file(const char *fileName, char **data, size_t *len)
-{
- /* ensure returned length is always sane */
- *len = 0;
-
- FILE *pFile;
- pFile = fopen(fileName, "rb");
- if (pFile == NULL) {
- LOG_ERROR("Can't open %s", fileName);
- return ERROR_FAIL;
- }
- if (fseek(pFile, 0, SEEK_END) != 0) {
- LOG_ERROR("Can't open %s", fileName);
- fclose(pFile);
- return ERROR_FAIL;
- }
- long fsize = ftell(pFile);
- if (fsize == -1) {
- LOG_ERROR("Can't open %s", fileName);
- fclose(pFile);
- return ERROR_FAIL;
- }
- *len = fsize;
-
- if (fseek(pFile, 0, SEEK_SET) != 0) {
- LOG_ERROR("Can't open %s", fileName);
- fclose(pFile);
- return ERROR_FAIL;
- }
- *data = malloc(*len + 1);
- if (*data == NULL) {
- LOG_ERROR("Can't open %s", fileName);
- fclose(pFile);
- return ERROR_FAIL;
- }
-
- if (fread(*data, 1, *len, pFile) != *len) {
- fclose(pFile);
- free(*data);
- LOG_ERROR("Can't open %s", fileName);
- return ERROR_FAIL;
- }
- fclose(pFile);
-
- /* 0-byte after buffer (not included in *len) serves as a sentinel */
- (*data)[*len] = 0;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_cat_command)
-{
- if (CMD_ARGC != 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* NOTE!!! we only have line printing capability so we print the entire file as a single
- * line. */
- char *data;
- size_t len;
-
- int retval = load_file(CMD_ARGV[0], &data, &len);
- if (retval == ERROR_OK) {
- command_print(CMD_CTX, "%s", data);
- free(data);
- } else
- command_print(CMD_CTX, "%s not found", CMD_ARGV[0]);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_trunc_command)
-{
- if (CMD_ARGC != 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- FILE *config_file = NULL;
- config_file = fopen(CMD_ARGV[0], "w");
- if (config_file != NULL)
- fclose(config_file);
-
- return ERROR_OK;
-}
-
-#ifdef HAVE_MALLOC_H
-COMMAND_HANDLER(handle_meminfo_command)
-{
- static int prev;
- struct mallinfo info;
-
- if (CMD_ARGC != 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- info = mallinfo();
-
- if (prev > 0)
- command_print(CMD_CTX, "Diff: %d", prev - info.fordblks);
- prev = info.fordblks;
-
- command_print(CMD_CTX, "Available ram: %d", info.fordblks);
-
- return ERROR_OK;
-}
-#endif
-
-COMMAND_HANDLER(handle_append_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- int retval = ERROR_FAIL;
- FILE *config_file = NULL;
-
- config_file = fopen(CMD_ARGV[0], "a");
- if (config_file != NULL) {
- fseek(config_file, 0, SEEK_END);
-
- unsigned i;
- for (i = 1; i < CMD_ARGC; i++) {
- if (fwrite(CMD_ARGV[i], 1, strlen(CMD_ARGV[i]),
- config_file) != strlen(CMD_ARGV[i]))
- break;
- if (i != CMD_ARGC - 1) {
- if (fwrite(" ", 1, 1, config_file) != 1)
- break;
- }
- }
- if ((i == CMD_ARGC) && (fwrite("\n", 1, 1, config_file) == 1))
- retval = ERROR_OK;
-
- fclose(config_file);
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_cp_command)
-{
- if (CMD_ARGC != 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* NOTE!!! we only have line printing capability so we print the entire file as a single
- * line. */
- char *data;
- size_t len;
-
- int retval = load_file(CMD_ARGV[0], &data, &len);
- if (retval != ERROR_OK)
- return retval;
-
- FILE *f = fopen(CMD_ARGV[1], "wb");
- if (f == NULL)
- retval = ERROR_COMMAND_SYNTAX_ERROR;
-
- size_t pos = 0;
- for (;; ) {
- size_t chunk = len - pos;
- static const size_t maxChunk = 512 * 1024; /* ~1/sec */
- if (chunk > maxChunk)
- chunk = maxChunk;
-
- if ((retval == ERROR_OK) && (fwrite(data + pos, 1, chunk, f) != chunk))
- retval = ERROR_COMMAND_SYNTAX_ERROR;
-
- if (retval != ERROR_OK)
- break;
-
- command_print(CMD_CTX, "%zu", len - pos);
-
- pos += chunk;
-
- if (pos == len)
- break;
- }
-
- if (retval == ERROR_OK)
- command_print(CMD_CTX, "Copied %s to %s", CMD_ARGV[0], CMD_ARGV[1]);
- else
- command_print(CMD_CTX, "copy failed");
-
- if (data != NULL)
- free(data);
- if (f != NULL)
- fclose(f);
-
- if (retval != ERROR_OK)
- unlink(CMD_ARGV[1]);
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_rm_command)
-{
- if (CMD_ARGC != 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- bool del = false;
- if (rmdir(CMD_ARGV[0]) == 0)
- del = true;
- else if (unlink(CMD_ARGV[0]) == 0)
- del = true;
-
- return del ? ERROR_OK : ERROR_FAIL;
-}
-
-static int ioutil_Jim_Command_ls(Jim_Interp *interp,
- int argc,
- Jim_Obj * const *argv)
-{
- if (argc != 2) {
- Jim_WrongNumArgs(interp, 1, argv, "ls ?dir?");
- return JIM_ERR;
- }
-
- const char *name = Jim_GetString(argv[1], NULL);
-
- DIR *dirp = NULL;
- dirp = opendir(name);
- if (dirp == NULL)
- return JIM_ERR;
- Jim_Obj *objPtr = Jim_NewListObj(interp, NULL, 0);
-
- for (;; ) {
- struct dirent *entry = NULL;
- entry = readdir(dirp);
- if (entry == NULL)
- break;
-
- if ((strcmp(".", entry->d_name) == 0) || (strcmp("..", entry->d_name) == 0))
- continue;
-
- Jim_ListAppendElement(interp, objPtr,
- Jim_NewStringObj(interp, entry->d_name, strlen(entry->d_name)));
- }
- closedir(dirp);
-
- Jim_SetResult(interp, objPtr);
-
- return JIM_OK;
-}
-
-static int ioutil_Jim_Command_peek(Jim_Interp *interp,
- int argc,
- Jim_Obj *const *argv)
-{
- if (argc != 2) {
- Jim_WrongNumArgs(interp, 1, argv, "peek ?address?");
- return JIM_ERR;
- }
-
- long address;
- if (Jim_GetLong(interp, argv[1], &address) != JIM_OK)
- return JIM_ERR;
-
- int value = *((volatile int *) address);
-
- Jim_SetResult(interp, Jim_NewIntObj(interp, value));
-
- return JIM_OK;
-}
-
-static int ioutil_Jim_Command_poke(Jim_Interp *interp,
- int argc,
- Jim_Obj *const *argv)
-{
- if (argc != 3) {
- Jim_WrongNumArgs(interp, 1, argv, "poke ?address? ?value?");
- return JIM_ERR;
- }
-
- long address;
- if (Jim_GetLong(interp, argv[1], &address) != JIM_OK)
- return JIM_ERR;
- long value;
- if (Jim_GetLong(interp, argv[2], &value) != JIM_OK)
- return JIM_ERR;
-
- *((volatile int *) address) = value;
-
- return JIM_OK;
-}
-
-/* not so pretty code to fish out ip number*/
-static int ioutil_Jim_Command_ip(Jim_Interp *interp, int argc,
- Jim_Obj *const *argv)
-{
-#if !defined(__CYGWIN__)
- Jim_Obj *tclOutput = Jim_NewStringObj(interp, "", 0);
-
- struct ifaddrs *ifa = NULL, *ifp = NULL;
-
- if (getifaddrs(&ifp) < 0)
- return JIM_ERR;
-
- for (ifa = ifp; ifa; ifa = ifa->ifa_next) {
- char ip[200];
- socklen_t salen;
-
- if (ifa->ifa_addr->sa_family == AF_INET)
- salen = sizeof(struct sockaddr_in);
- else if (ifa->ifa_addr->sa_family == AF_INET6)
- salen = sizeof(struct sockaddr_in6);
- else
- continue;
-
- if (getnameinfo(ifa->ifa_addr, salen, ip, sizeof(ip), NULL, 0,
- NI_NUMERICHOST) < 0)
- continue;
-
- Jim_AppendString(interp, tclOutput, ip, strlen(ip));
- break;
-
- }
-
- freeifaddrs(ifp);
-#else
- Jim_Obj *tclOutput = Jim_NewStringObj(interp, "fixme!!!", 0);
- LOG_ERROR("NOT IMPLEMENTED!!!");
-#endif
- Jim_SetResult(interp, tclOutput);
-
- return JIM_OK;
-}
-
-#ifdef HAVE_SYS_IOCTL_H
-#ifdef SIOCGIFHWADDR
-/* not so pretty code to fish out eth0 mac address */
-static int ioutil_Jim_Command_mac(Jim_Interp *interp, int argc,
- Jim_Obj *const *argv)
-{
- struct ifreq *ifr, *ifend;
- struct ifreq ifreq;
- struct ifconf ifc;
- struct ifreq ifs[5];
- int SockFD;
-
- SockFD = socket(AF_INET, SOCK_DGRAM, 0);
- if (SockFD < 0)
- return JIM_ERR;
-
- ifc.ifc_len = sizeof(ifs);
- ifc.ifc_req = ifs;
- if (ioctl(SockFD, SIOCGIFCONF, &ifc) < 0) {
- close(SockFD);
- return JIM_ERR;
- }
-
- ifend = ifs + (ifc.ifc_len / sizeof(struct ifreq));
- for (ifr = ifc.ifc_req; ifr < ifend; ifr++) {
- /* if (ifr->ifr_addr.sa_family == AF_INET) */
- {
- if (strcmp("eth0", ifr->ifr_name) != 0)
- continue;
- strncpy(ifreq.ifr_name, ifr->ifr_name, sizeof(ifreq.ifr_name));
- if (ioctl(SockFD, SIOCGIFHWADDR, &ifreq) < 0) {
- close(SockFD);
- return JIM_ERR;
- }
-
- close(SockFD);
-
- Jim_Obj *tclOutput = Jim_NewStringObj(interp, "", 0);
-
- char buffer[256];
- sprintf(buffer, "%02x-%02x-%02x-%02x-%02x-%02x",
- ifreq.ifr_hwaddr.sa_data[0]&0xff,
- ifreq.ifr_hwaddr.sa_data[1]&0xff,
- ifreq.ifr_hwaddr.sa_data[2]&0xff,
- ifreq.ifr_hwaddr.sa_data[3]&0xff,
- ifreq.ifr_hwaddr.sa_data[4]&0xff,
- ifreq.ifr_hwaddr.sa_data[5]&0xff);
-
- Jim_AppendString(interp, tclOutput, buffer, strlen(buffer));
-
- Jim_SetResult(interp, tclOutput);
-
- return JIM_OK;
- }
- }
- close(SockFD);
-
- return JIM_ERR;
-
-}
-#endif
-#endif
-
-static const struct command_registration ioutil_command_handlers[] = {
- {
- .name = "cat",
- .handler = handle_cat_command,
- .mode = COMMAND_ANY,
- .help = "display text file content",
- .usage = "file_name",
- },
- {
- .name = "trunc",
- .handler = handle_trunc_command,
- .mode = COMMAND_ANY,
- .help = "truncate a file to zero length",
- .usage = "file_name",
- },
- {
- .name = "cp",
- .handler = handle_cp_command,
- .mode = COMMAND_ANY,
- .help = "copy a file",
- .usage = "src_file_name dst_file_name",
- },
- {
- .name = "append_file",
- .handler = handle_append_command,
- .mode = COMMAND_ANY,
- .help = "append a variable number of strings to a file",
- .usage = "file_name [<string1>, [<string2>, ...]]",
- },
-#ifdef HAVE_MALLOC_H
- {
- .name = "meminfo",
- .handler = handle_meminfo_command,
- .mode = COMMAND_ANY,
- .help = "display free heap space",
- },
-#endif
- {
- .name = "rm",
- .mode = COMMAND_ANY,
- .handler = handle_rm_command,
- .help = "remove a directory or file",
- .usage = "file_name",
- },
-
- /*
- * Peek and poke are security holes -- they manipulate
- * server-internal addresses.
- */
-
- /* jim handlers */
- {
- .name = "peek",
- .mode = COMMAND_ANY,
- .jim_handler = ioutil_Jim_Command_peek,
- .help = "peek at a memory address",
- .usage = "address",
- },
- {
- .name = "poke",
- .mode = COMMAND_ANY,
- .jim_handler = ioutil_Jim_Command_poke,
- .help = "poke at a memory address",
- .usage = "address value",
- },
- {
- .name = "ls",
- .mode = COMMAND_ANY,
- .jim_handler = ioutil_Jim_Command_ls,
- .help = "show a listing of files",
- .usage = "dirname",
- },
-#ifdef HAVE_SYS_IOCTL_H
-#ifdef SIOCGIFHWADDR
- {
- .name = "mac",
- .mode = COMMAND_ANY,
- .jim_handler = ioutil_Jim_Command_mac,
- .help = "show MAC address",
- },
-#endif
-#endif
- {
- .name = "ip",
- .jim_handler = ioutil_Jim_Command_ip,
- .mode = COMMAND_ANY,
- .help = "show IP address",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-int ioutil_init(struct command_context *cmd_ctx)
-{
- return register_commands(cmd_ctx, NULL, ioutil_command_handlers);
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil.h
deleted file mode 100755
index 8cd9157..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef HELPER_IOUTILS_H
-#define HELPER_IOUTILS_H
-
-struct command_context;
-
-int ioutil_init(struct command_context *cmd_ctx);
-
-#endif /* HELPER_IOUTILS_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil_stubs.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil_stubs.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil_stubs.c
deleted file mode 100755
index a87f1b6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/ioutil_stubs.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-#include "ioutil.h"
-#include "log.h"
-
-int ioutil_init(struct command_context *cmd_ctx)
-{
- LOG_DEBUG("libocdhelper was built without I/O utility support");
- return ERROR_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.c
deleted file mode 100755
index 67c4a9a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "jep106.h"
-#include "log.h"
-
-static const char * const jep106[][126] = {
-#include "jep106.inc"
-};
-
-const char *jep106_manufacturer(unsigned bank, unsigned id)
-{
- if (id < 1 || id > 126) {
- LOG_DEBUG("BUG: Caller passed out-of-range JEP106 ID!");
- return "<invalid>";
- }
-
- /* index is zero based */
- id--;
-
- if (bank >= ARRAY_SIZE(jep106) || jep106[bank][id] == 0)
- return "<unknown>";
-
- return jep106[bank][id];
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.h
deleted file mode 100755
index b43409a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
-#ifndef JEP106_H
-#define JEP106_H
-
-/**
- * Get the manufacturer name associated with a JEP106 ID.
- * @param bank The bank (number of continuation codes) of the manufacturer ID.
- * @param id The 7-bit manufacturer ID (i.e. with parity stripped).
- * @return A pointer to static const storage containing the name of the
- * manufacturer associated with bank and id, or one of the strings
- * "<invalid>" and "<unknown>".
- */
-const char *jep106_manufacturer(unsigned bank, unsigned id);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.inc
deleted file mode 100755
index 1895005..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jep106.inc
+++ /dev/null
@@ -1,1119 +0,0 @@
-/* Autogenerated with update_jep106.pl*/
-[0][0x01 - 1] = "AMD",
-[0][0x02 - 1] = "AMI",
-[0][0x03 - 1] = "Fairchild",
-[0][0x04 - 1] = "Fujitsu",
-[0][0x05 - 1] = "GTE",
-[0][0x06 - 1] = "Harris",
-[0][0x07 - 1] = "Hitachi",
-[0][0x08 - 1] = "Inmos",
-[0][0x09 - 1] = "Intel",
-[0][0x0a - 1] = "I.T.T.",
-[0][0x0b - 1] = "Intersil",
-[0][0x0c - 1] = "Monolithic Memories",
-[0][0x0d - 1] = "Mostek",
-[0][0x0e - 1] = "Freescale (Motorola)",
-[0][0x0f - 1] = "National",
-[0][0x10 - 1] = "NEC",
-[0][0x11 - 1] = "RCA",
-[0][0x12 - 1] = "Raytheon",
-[0][0x13 - 1] = "Conexant (Rockwell)",
-[0][0x14 - 1] = "Seeq",
-[0][0x15 - 1] = "NXP (Philips)",
-[0][0x16 - 1] = "Synertek",
-[0][0x17 - 1] = "Texas Instruments",
-[0][0x18 - 1] = "Toshiba",
-[0][0x19 - 1] = "Xicor",
-[0][0x1a - 1] = "Zilog",
-[0][0x1b - 1] = "Eurotechnique",
-[0][0x1c - 1] = "Mitsubishi",
-[0][0x1d - 1] = "Lucent (AT&T)",
-[0][0x1e - 1] = "Exel",
-[0][0x1f - 1] = "Atmel",
-[0][0x20 - 1] = "STMicroelectronics",
-[0][0x21 - 1] = "Lattice Semi.",
-[0][0x22 - 1] = "NCR",
-[0][0x23 - 1] = "Wafer Scale Integration",
-[0][0x24 - 1] = "IBM",
-[0][0x25 - 1] = "Tristar",
-[0][0x26 - 1] = "Visic",
-[0][0x27 - 1] = "Intl. CMOS Technology",
-[0][0x28 - 1] = "SSSI",
-[0][0x29 - 1] = "MicrochipTechnology",
-[0][0x2a - 1] = "Ricoh Ltd.",
-[0][0x2b - 1] = "VLSI",
-[0][0x2c - 1] = "Micron Technology",
-[0][0x2d - 1] = "SK Hynix",
-[0][0x2e - 1] = "OKI Semiconductor",
-[0][0x2f - 1] = "ACTEL",
-[0][0x30 - 1] = "Sharp",
-[0][0x31 - 1] = "Catalyst",
-[0][0x32 - 1] = "Panasonic",
-[0][0x33 - 1] = "IDT",
-[0][0x34 - 1] = "Cypress",
-[0][0x35 - 1] = "DEC",
-[0][0x36 - 1] = "LSI Logic",
-[0][0x37 - 1] = "Zarlink (Plessey)",
-[0][0x38 - 1] = "UTMC",
-[0][0x39 - 1] = "Thinking Machine",
-[0][0x3a - 1] = "Thomson CSF",
-[0][0x3b - 1] = "Integrated CMOS (Vertex)",
-[0][0x3c - 1] = "Honeywell",
-[0][0x3d - 1] = "Tektronix",
-[0][0x3e - 1] = "Oracle Corporation",
-[0][0x3f - 1] = "Silicon Storage Technology",
-[0][0x40 - 1] = "ProMos/Mosel Vitelic",
-[0][0x41 - 1] = "Infineon (Siemens)",
-[0][0x42 - 1] = "Macronix",
-[0][0x43 - 1] = "Xerox",
-[0][0x44 - 1] = "Plus Logic",
-[0][0x45 - 1] = "SanDisk Corporation",
-[0][0x46 - 1] = "Elan Circuit Tech.",
-[0][0x47 - 1] = "European Silicon Str.",
-[0][0x48 - 1] = "Apple Computer",
-[0][0x49 - 1] = "Xilinx",
-[0][0x4a - 1] = "Compaq",
-[0][0x4b - 1] = "Protocol Engines",
-[0][0x4c - 1] = "SCI",
-[0][0x4d - 1] = "Seiko Instruments",
-[0][0x4e - 1] = "Samsung",
-[0][0x4f - 1] = "I3 Design System",
-[0][0x50 - 1] = "Klic",
-[0][0x51 - 1] = "Crosspoint Solutions",
-[0][0x52 - 1] = "Alliance Semiconductor",
-[0][0x53 - 1] = "Tandem",
-[0][0x54 - 1] = "Hewlett-Packard",
-[0][0x55 - 1] = "Integrated Silicon Solutions",
-[0][0x56 - 1] = "Brooktree",
-[0][0x57 - 1] = "New Media",
-[0][0x58 - 1] = "MHS Electronic",
-[0][0x59 - 1] = "Performance Semi.",
-[0][0x5a - 1] = "Winbond Electronic",
-[0][0x5b - 1] = "Kawasaki Steel",
-[0][0x5c - 1] = "Bright Micro",
-[0][0x5d - 1] = "TECMAR",
-[0][0x5e - 1] = "Exar",
-[0][0x5f - 1] = "PCMCIA",
-[0][0x60 - 1] = "LG Semi (Goldstar)",
-[0][0x61 - 1] = "Northern Telecom",
-[0][0x62 - 1] = "Sanyo",
-[0][0x63 - 1] = "Array Microsystems",
-[0][0x64 - 1] = "Crystal Semiconductor",
-[0][0x65 - 1] = "Analog Devices",
-[0][0x66 - 1] = "PMC-Sierra",
-[0][0x67 - 1] = "Asparix",
-[0][0x68 - 1] = "Convex Computer",
-[0][0x69 - 1] = "Quality Semiconductor",
-[0][0x6a - 1] = "Nimbus Technology",
-[0][0x6b - 1] = "Transwitch",
-[0][0x6c - 1] = "Micronas (ITT Intermetall)",
-[0][0x6d - 1] = "Cannon",
-[0][0x6e - 1] = "Altera",
-[0][0x6f - 1] = "NEXCOM",
-[0][0x70 - 1] = "Qualcomm",
-[0][0x71 - 1] = "Sony",
-[0][0x72 - 1] = "Cray Research",
-[0][0x73 - 1] = "AMS(Austria Micro)",
-[0][0x74 - 1] = "Vitesse",
-[0][0x75 - 1] = "Aster Electronics",
-[0][0x76 - 1] = "Bay Networks (Synoptic)",
-[0][0x77 - 1] = "Zentrum/ZMD",
-[0][0x78 - 1] = "TRW",
-[0][0x79 - 1] = "Thesys",
-[0][0x7a - 1] = "Solbourne Computer",
-[0][0x7b - 1] = "Allied-Signal",
-[0][0x7c - 1] = "Dialog Semiconductor",
-[0][0x7d - 1] = "Media Vision",
-[0][0x7e - 1] = "Numonyx Corporation",
-[1][0x01 - 1] = "Cirrus Logic",
-[1][0x02 - 1] = "National Instruments",
-[1][0x03 - 1] = "ILC Data Device",
-[1][0x04 - 1] = "Alcatel Mietec",
-[1][0x05 - 1] = "Micro Linear",
-[1][0x06 - 1] = "Univ. of NC",
-[1][0x07 - 1] = "JTAG Technologies",
-[1][0x08 - 1] = "BAE Systems (Loral)",
-[1][0x09 - 1] = "Nchip",
-[1][0x0a - 1] = "Galileo Tech",
-[1][0x0b - 1] = "Bestlink Systems",
-[1][0x0c - 1] = "Graychip",
-[1][0x0d - 1] = "GENNUM",
-[1][0x0e - 1] = "VideoLogic",
-[1][0x0f - 1] = "Robert Bosch",
-[1][0x10 - 1] = "Chip Express",
-[1][0x11 - 1] = "DATARAM",
-[1][0x12 - 1] = "United Microelectronics Corp.",
-[1][0x13 - 1] = "TCSI",
-[1][0x14 - 1] = "Smart Modular",
-[1][0x15 - 1] = "Hughes Aircraft",
-[1][0x16 - 1] = "Lanstar Semiconductor",
-[1][0x17 - 1] = "Qlogic",
-[1][0x18 - 1] = "Kingston",
-[1][0x19 - 1] = "Music Semi",
-[1][0x1a - 1] = "Ericsson Components",
-[1][0x1b - 1] = "SpaSE",
-[1][0x1c - 1] = "Eon Silicon Devices",
-[1][0x1d - 1] = "Integrated Silicon Solution (ISSI)",
-[1][0x1e - 1] = "DoD",
-[1][0x1f - 1] = "Integ. Memories Tech.",
-[1][0x20 - 1] = "Corollary Inc.",
-[1][0x21 - 1] = "Dallas Semiconductor",
-[1][0x22 - 1] = "Omnivision",
-[1][0x23 - 1] = "EIV(Switzerland)",
-[1][0x24 - 1] = "Novatel Wireless",
-[1][0x25 - 1] = "Zarlink (Mitel)",
-[1][0x26 - 1] = "Clearpoint",
-[1][0x27 - 1] = "Cabletron",
-[1][0x28 - 1] = "STEC (Silicon Tech)",
-[1][0x29 - 1] = "Vanguard",
-[1][0x2a - 1] = "Hagiwara Sys-Com",
-[1][0x2b - 1] = "Vantis",
-[1][0x2c - 1] = "Celestica",
-[1][0x2d - 1] = "Century",
-[1][0x2e - 1] = "Hal Computers",
-[1][0x2f - 1] = "Rohm Company Ltd.",
-[1][0x30 - 1] = "Juniper Networks",
-[1][0x31 - 1] = "Libit Signal Processing",
-[1][0x32 - 1] = "Mushkin Enhanced Memory",
-[1][0x33 - 1] = "Tundra Semiconductor",
-[1][0x34 - 1] = "Adaptec Inc.",
-[1][0x35 - 1] = "LightSpeed Semi.",
-[1][0x36 - 1] = "ZSP Corp.",
-[1][0x37 - 1] = "AMIC Technology",
-[1][0x38 - 1] = "Adobe Systems",
-[1][0x39 - 1] = "Dynachip",
-[1][0x3a - 1] = "PNY Technologies, Inc.",
-[1][0x3b - 1] = "Newport Digital",
-[1][0x3c - 1] = "MMC Networks",
-[1][0x3d - 1] = "T Square",
-[1][0x3e - 1] = "Seiko Epson",
-[1][0x3f - 1] = "Broadcom",
-[1][0x40 - 1] = "Viking Components",
-[1][0x41 - 1] = "V3 Semiconductor",
-[1][0x42 - 1] = "Flextronics (Orbit Semiconductor)",
-[1][0x43 - 1] = "Suwa Electronics",
-[1][0x44 - 1] = "Transmeta",
-[1][0x45 - 1] = "Micron CMS",
-[1][0x46 - 1] = "American Computer & Digital",
-[1][0x47 - 1] = "Enhance 3000 Inc.",
-[1][0x48 - 1] = "Tower Semiconductor",
-[1][0x49 - 1] = "CPU Design",
-[1][0x4a - 1] = "Price Point",
-[1][0x4b - 1] = "Maxim Integrated Product",
-[1][0x4c - 1] = "Tellabs",
-[1][0x4d - 1] = "Centaur Technology",
-[1][0x4e - 1] = "Unigen Corporation",
-[1][0x4f - 1] = "Transcend Information",
-[1][0x50 - 1] = "Memory Card Technology",
-[1][0x51 - 1] = "CKD Corporation Ltd.",
-[1][0x52 - 1] = "Capital Instruments, Inc.",
-[1][0x53 - 1] = "Aica Kogyo, Ltd.",
-[1][0x54 - 1] = "Linvex Technology",
-[1][0x55 - 1] = "MSC Vertriebs GmbH",
-[1][0x56 - 1] = "AKM Company, Ltd.",
-[1][0x57 - 1] = "Dynamem, Inc.",
-[1][0x58 - 1] = "NERA ASA",
-[1][0x59 - 1] = "GSI Technology",
-[1][0x5a - 1] = "Dane-Elec (C Memory)",
-[1][0x5b - 1] = "Acorn Computers",
-[1][0x5c - 1] = "Lara Technology",
-[1][0x5d - 1] = "Oak Technology, Inc.",
-[1][0x5e - 1] = "Itec Memory",
-[1][0x5f - 1] = "Tanisys Technology",
-[1][0x60 - 1] = "Truevision",
-[1][0x61 - 1] = "Wintec Industries",
-[1][0x62 - 1] = "Super PC Memory",
-[1][0x63 - 1] = "MGV Memory",
-[1][0x64 - 1] = "Galvantech",
-[1][0x65 - 1] = "Gadzoox Networks",
-[1][0x66 - 1] = "Multi Dimensional Cons.",
-[1][0x67 - 1] = "GateField",
-[1][0x68 - 1] = "Integrated Memory System",
-[1][0x69 - 1] = "Triscend",
-[1][0x6a - 1] = "XaQti",
-[1][0x6b - 1] = "Goldenram",
-[1][0x6c - 1] = "Clear Logic",
-[1][0x6d - 1] = "Cimaron Communications",
-[1][0x6e - 1] = "Nippon Steel Semi. Corp.",
-[1][0x6f - 1] = "Advantage Memory",
-[1][0x70 - 1] = "AMCC",
-[1][0x71 - 1] = "LeCroy",
-[1][0x72 - 1] = "Yamaha Corporation",
-[1][0x73 - 1] = "Digital Microwave",
-[1][0x74 - 1] = "NetLogic Microsystems",
-[1][0x75 - 1] = "MIMOS Semiconductor",
-[1][0x76 - 1] = "Advanced Fibre",
-[1][0x77 - 1] = "BF Goodrich Data.",
-[1][0x78 - 1] = "Epigram",
-[1][0x79 - 1] = "Acbel Polytech Inc.",
-[1][0x7a - 1] = "Apacer Technology",
-[1][0x7b - 1] = "Admor Memory",
-[1][0x7c - 1] = "FOXCONN",
-[1][0x7d - 1] = "Quadratics Superconductor",
-[1][0x7e - 1] = "3COM",
-[2][0x01 - 1] = "Camintonn Corporation",
-[2][0x02 - 1] = "ISOA Incorporated",
-[2][0x03 - 1] = "Agate Semiconductor",
-[2][0x04 - 1] = "ADMtek Incorporated",
-[2][0x05 - 1] = "HYPERTEC",
-[2][0x06 - 1] = "Adhoc Technologies",
-[2][0x07 - 1] = "MOSAID Technologies",
-[2][0x08 - 1] = "Ardent Technologies",
-[2][0x09 - 1] = "Switchcore",
-[2][0x0a - 1] = "Cisco Systems, Inc.",
-[2][0x0b - 1] = "Allayer Technologies",
-[2][0x0c - 1] = "WorkX AG (Wichman)",
-[2][0x0d - 1] = "Oasis Semiconductor",
-[2][0x0e - 1] = "Novanet Semiconductor",
-[2][0x0f - 1] = "E-M Solutions",
-[2][0x10 - 1] = "Power General",
-[2][0x11 - 1] = "Advanced Hardware Arch.",
-[2][0x12 - 1] = "Inova Semiconductors GmbH",
-[2][0x13 - 1] = "Telocity",
-[2][0x14 - 1] = "Delkin Devices",
-[2][0x15 - 1] = "Symagery Microsystems",
-[2][0x16 - 1] = "C-Port Corporation",
-[2][0x17 - 1] = "SiberCore Technologies",
-[2][0x18 - 1] = "Southland Microsystems",
-[2][0x19 - 1] = "Malleable Technologies",
-[2][0x1a - 1] = "Kendin Communications",
-[2][0x1b - 1] = "Great Technology Microcomputer",
-[2][0x1c - 1] = "Sanmina Corporation",
-[2][0x1d - 1] = "HADCO Corporation",
-[2][0x1e - 1] = "Corsair",
-[2][0x1f - 1] = "Actrans System Inc.",
-[2][0x20 - 1] = "ALPHA Technologies",
-[2][0x21 - 1] = "Silicon Laboratories, Inc. (Cygnal)",
-[2][0x22 - 1] = "Artesyn Technologies",
-[2][0x23 - 1] = "Align Manufacturing",
-[2][0x24 - 1] = "Peregrine Semiconductor",
-[2][0x25 - 1] = "Chameleon Systems",
-[2][0x26 - 1] = "Aplus Flash Technology",
-[2][0x27 - 1] = "MIPS Technologies",
-[2][0x28 - 1] = "Chrysalis ITS",
-[2][0x29 - 1] = "ADTEC Corporation",
-[2][0x2a - 1] = "Kentron Technologies",
-[2][0x2b - 1] = "Win Technologies",
-[2][0x2c - 1] = "Tezzaron Semiconductor",
-[2][0x2d - 1] = "Extreme Packet Devices",
-[2][0x2e - 1] = "RF Micro Devices",
-[2][0x2f - 1] = "Siemens AG",
-[2][0x30 - 1] = "Sarnoff Corporation",
-[2][0x31 - 1] = "Itautec SA",
-[2][0x32 - 1] = "Radiata Inc.",
-[2][0x33 - 1] = "Benchmark Elect. (AVEX)",
-[2][0x34 - 1] = "Legend",
-[2][0x35 - 1] = "SpecTek Incorporated",
-[2][0x36 - 1] = "Hi/fn",
-[2][0x37 - 1] = "Enikia Incorporated",
-[2][0x38 - 1] = "SwitchOn Networks",
-[2][0x39 - 1] = "AANetcom Incorporated",
-[2][0x3a - 1] = "Micro Memory Bank",
-[2][0x3b - 1] = "ESS Technology",
-[2][0x3c - 1] = "Virata Corporation",
-[2][0x3d - 1] = "Excess Bandwidth",
-[2][0x3e - 1] = "West Bay Semiconductor",
-[2][0x3f - 1] = "DSP Group",
-[2][0x40 - 1] = "Newport Communications",
-[2][0x41 - 1] = "Chip2Chip Incorporated",
-[2][0x42 - 1] = "Phobos Corporation",
-[2][0x43 - 1] = "Intellitech Corporation",
-[2][0x44 - 1] = "Nordic VLSI ASA",
-[2][0x45 - 1] = "Ishoni Networks",
-[2][0x46 - 1] = "Silicon Spice",
-[2][0x47 - 1] = "Alchemy Semiconductor",
-[2][0x48 - 1] = "Agilent Technologies",
-[2][0x49 - 1] = "Centillium Communications",
-[2][0x4a - 1] = "W.L. Gore",
-[2][0x4b - 1] = "HanBit Electronics",
-[2][0x4c - 1] = "GlobeSpan",
-[2][0x4d - 1] = "Element 14",
-[2][0x4e - 1] = "Pycon",
-[2][0x4f - 1] = "Saifun Semiconductors",
-[2][0x50 - 1] = "Sibyte, Incorporated",
-[2][0x51 - 1] = "MetaLink Technologies",
-[2][0x52 - 1] = "Feiya Technology",
-[2][0x53 - 1] = "I & C Technology",
-[2][0x54 - 1] = "Shikatronics",
-[2][0x55 - 1] = "Elektrobit",
-[2][0x56 - 1] = "Megic",
-[2][0x57 - 1] = "Com-Tier",
-[2][0x58 - 1] = "Malaysia Micro Solutions",
-[2][0x59 - 1] = "Hyperchip",
-[2][0x5a - 1] = "Gemstone Communications",
-[2][0x5b - 1] = "Anadigm (Anadyne)",
-[2][0x5c - 1] = "3ParData",
-[2][0x5d - 1] = "Mellanox Technologies",
-[2][0x5e - 1] = "Tenx Technologies",
-[2][0x5f - 1] = "Helix AG",
-[2][0x60 - 1] = "Domosys",
-[2][0x61 - 1] = "Skyup Technology",
-[2][0x62 - 1] = "HiNT Corporation",
-[2][0x63 - 1] = "Chiaro",
-[2][0x64 - 1] = "MDT Technologies GmbH",
-[2][0x65 - 1] = "Exbit Technology A/S",
-[2][0x66 - 1] = "Integrated Technology Express",
-[2][0x67 - 1] = "AVED Memory",
-[2][0x68 - 1] = "Legerity",
-[2][0x69 - 1] = "Jasmine Networks",
-[2][0x6a - 1] = "Caspian Networks",
-[2][0x6b - 1] = "nCUBE",
-[2][0x6c - 1] = "Silicon Access Networks",
-[2][0x6d - 1] = "FDK Corporation",
-[2][0x6e - 1] = "High Bandwidth Access",
-[2][0x6f - 1] = "MultiLink Technology",
-[2][0x70 - 1] = "BRECIS",
-[2][0x71 - 1] = "World Wide Packets",
-[2][0x72 - 1] = "APW",
-[2][0x73 - 1] = "Chicory Systems",
-[2][0x74 - 1] = "Xstream Logic",
-[2][0x75 - 1] = "Fast-Chip",
-[2][0x76 - 1] = "Zucotto Wireless",
-[2][0x77 - 1] = "Realchip",
-[2][0x78 - 1] = "Galaxy Power",
-[2][0x79 - 1] = "eSilicon",
-[2][0x7a - 1] = "Morphics Technology",
-[2][0x7b - 1] = "Accelerant Networks",
-[2][0x7c - 1] = "Silicon Wave",
-[2][0x7d - 1] = "SandCraft",
-[2][0x7e - 1] = "Elpida",
-[3][0x01 - 1] = "Solectron",
-[3][0x02 - 1] = "Optosys Technologies",
-[3][0x03 - 1] = "Buffalo (Formerly Melco)",
-[3][0x04 - 1] = "TriMedia Technologies",
-[3][0x05 - 1] = "Cyan Technologies",
-[3][0x06 - 1] = "Global Locate",
-[3][0x07 - 1] = "Optillion",
-[3][0x08 - 1] = "Terago Communications",
-[3][0x09 - 1] = "Ikanos Communications",
-[3][0x0a - 1] = "Princeton Technology",
-[3][0x0b - 1] = "Nanya Technology",
-[3][0x0c - 1] = "Elite Flash Storage",
-[3][0x0d - 1] = "Mysticom",
-[3][0x0e - 1] = "LightSand Communications",
-[3][0x0f - 1] = "ATI Technologies",
-[3][0x10 - 1] = "Agere Systems",
-[3][0x11 - 1] = "NeoMagic",
-[3][0x12 - 1] = "AuroraNetics",
-[3][0x13 - 1] = "Golden Empire",
-[3][0x14 - 1] = "Mushkin",
-[3][0x15 - 1] = "Tioga Technologies",
-[3][0x16 - 1] = "Netlist",
-[3][0x17 - 1] = "TeraLogic",
-[3][0x18 - 1] = "Cicada Semiconductor",
-[3][0x19 - 1] = "Centon Electronics",
-[3][0x1a - 1] = "Tyco Electronics",
-[3][0x1b - 1] = "Magis Works",
-[3][0x1c - 1] = "Zettacom",
-[3][0x1d - 1] = "Cogency Semiconductor",
-[3][0x1e - 1] = "Chipcon AS",
-[3][0x1f - 1] = "Aspex Technology",
-[3][0x20 - 1] = "F5 Networks",
-[3][0x21 - 1] = "Programmable Silicon Solutions",
-[3][0x22 - 1] = "ChipWrights",
-[3][0x23 - 1] = "Acorn Networks",
-[3][0x24 - 1] = "Quicklogic",
-[3][0x25 - 1] = "Kingmax Semiconductor",
-[3][0x26 - 1] = "BOPS",
-[3][0x27 - 1] = "Flasys",
-[3][0x28 - 1] = "BitBlitz Communications",
-[3][0x29 - 1] = "eMemory Technology",
-[3][0x2a - 1] = "Procket Networks",
-[3][0x2b - 1] = "Purple Ray",
-[3][0x2c - 1] = "Trebia Networks",
-[3][0x2d - 1] = "Delta Electronics",
-[3][0x2e - 1] = "Onex Communications",
-[3][0x2f - 1] = "Ample Communications",
-[3][0x30 - 1] = "Memory Experts Intl",
-[3][0x31 - 1] = "Astute Networks",
-[3][0x32 - 1] = "Azanda Network Devices",
-[3][0x33 - 1] = "Dibcom",
-[3][0x34 - 1] = "Tekmos",
-[3][0x35 - 1] = "API NetWorks",
-[3][0x36 - 1] = "Bay Microsystems",
-[3][0x37 - 1] = "Firecron Ltd",
-[3][0x38 - 1] = "Resonext Communications",
-[3][0x39 - 1] = "Tachys Technologies",
-[3][0x3a - 1] = "Equator Technology",
-[3][0x3b - 1] = "Concept Computer",
-[3][0x3c - 1] = "SILCOM",
-[3][0x3d - 1] = "3Dlabs",
-[3][0x3e - 1] = "c\u2019t Magazine",
-[3][0x3f - 1] = "Sanera Systems",
-[3][0x40 - 1] = "Silicon Packets",
-[3][0x41 - 1] = "Viasystems Group",
-[3][0x42 - 1] = "Simtek",
-[3][0x43 - 1] = "Semicon Devices Singapore",
-[3][0x44 - 1] = "Satron Handelsges",
-[3][0x45 - 1] = "Improv Systems",
-[3][0x46 - 1] = "INDUSYS GmbH",
-[3][0x47 - 1] = "Corrent",
-[3][0x48 - 1] = "Infrant Technologies",
-[3][0x49 - 1] = "Ritek Corp",
-[3][0x4a - 1] = "empowerTel Networks",
-[3][0x4b - 1] = "Hypertec",
-[3][0x4c - 1] = "Cavium Networks",
-[3][0x4d - 1] = "PLX Technology",
-[3][0x4e - 1] = "Massana Design",
-[3][0x4f - 1] = "Intrinsity",
-[3][0x50 - 1] = "Valence Semiconductor",
-[3][0x51 - 1] = "Terawave Communications",
-[3][0x52 - 1] = "IceFyre Semiconductor",
-[3][0x53 - 1] = "Primarion",
-[3][0x54 - 1] = "Picochip Designs Ltd",
-[3][0x55 - 1] = "Silverback Systems",
-[3][0x56 - 1] = "Jade Star Technologies",
-[3][0x57 - 1] = "Pijnenburg Securealink",
-[3][0x58 - 1] = "takeMS - Ultron AG",
-[3][0x59 - 1] = "Cambridge Silicon Radio",
-[3][0x5a - 1] = "Swissbit",
-[3][0x5b - 1] = "Nazomi Communications",
-[3][0x5c - 1] = "eWave System",
-[3][0x5d - 1] = "Rockwell Collins",
-[3][0x5e - 1] = "Picocel Co. Ltd. (Paion)",
-[3][0x5f - 1] = "Alphamosaic Ltd",
-[3][0x60 - 1] = "Sandburst",
-[3][0x61 - 1] = "SiCon Video",
-[3][0x62 - 1] = "NanoAmp Solutions",
-[3][0x63 - 1] = "Ericsson Technology",
-[3][0x64 - 1] = "PrairieComm",
-[3][0x65 - 1] = "Mitac International",
-[3][0x66 - 1] = "Layer N Networks",
-[3][0x67 - 1] = "MtekVision (Atsana)",
-[3][0x68 - 1] = "Allegro Networks",
-[3][0x69 - 1] = "Marvell Semiconductors",
-[3][0x6a - 1] = "Netergy Microelectronic",
-[3][0x6b - 1] = "NVIDIA",
-[3][0x6c - 1] = "Internet Machines",
-[3][0x6d - 1] = "Memorysolution GmbH",
-[3][0x6e - 1] = "Litchfield Communication",
-[3][0x6f - 1] = "Accton Technology",
-[3][0x70 - 1] = "Teradiant Networks",
-[3][0x71 - 1] = "Scaleo Chip",
-[3][0x72 - 1] = "Cortina Systems",
-[3][0x73 - 1] = "RAM Components",
-[3][0x74 - 1] = "Raqia Networks",
-[3][0x75 - 1] = "ClearSpeed",
-[3][0x76 - 1] = "Matsushita Battery",
-[3][0x77 - 1] = "Xelerated",
-[3][0x78 - 1] = "SimpleTech",
-[3][0x79 - 1] = "Utron Technology",
-[3][0x7a - 1] = "Astec International",
-[3][0x7b - 1] = "AVM gmbH",
-[3][0x7c - 1] = "Redux Communications",
-[3][0x7d - 1] = "Dot Hill Systems",
-[3][0x7e - 1] = "TeraChip",
-[4][0x01 - 1] = "T-RAM Incorporated",
-[4][0x02 - 1] = "Innovics Wireless",
-[4][0x03 - 1] = "Teknovus",
-[4][0x04 - 1] = "KeyEye Communications",
-[4][0x05 - 1] = "Runcom Technologies",
-[4][0x06 - 1] = "RedSwitch",
-[4][0x07 - 1] = "Dotcast",
-[4][0x08 - 1] = "Silicon Mountain Memory",
-[4][0x09 - 1] = "Signia Technologies",
-[4][0x0a - 1] = "Pixim",
-[4][0x0b - 1] = "Galazar Networks",
-[4][0x0c - 1] = "White Electronic Designs",
-[4][0x0d - 1] = "Patriot Scientific",
-[4][0x0e - 1] = "Neoaxiom Corporation",
-[4][0x0f - 1] = "3Y Power Technology",
-[4][0x10 - 1] = "Scaleo Chip",
-[4][0x11 - 1] = "Potentia Power Systems",
-[4][0x12 - 1] = "C-guys Incorporated",
-[4][0x13 - 1] = "Digital Communications Technology",
-[4][0x14 - 1] = "Silicon-Based Technology",
-[4][0x15 - 1] = "Fulcrum Microsystems",
-[4][0x16 - 1] = "Positivo Informatica Ltd",
-[4][0x17 - 1] = "XIOtech Corporation",
-[4][0x18 - 1] = "PortalPlayer",
-[4][0x19 - 1] = "Zhiying Software",
-[4][0x1a - 1] = "ParkerVision, Inc.",
-[4][0x1b - 1] = "Phonex Broadband",
-[4][0x1c - 1] = "Skyworks Solutions",
-[4][0x1d - 1] = "Entropic Communications",
-[4][0x1e - 1] = "I\u2019M Intelligent Memory Ltd.",
-[4][0x1f - 1] = "Zensys A/S",
-[4][0x20 - 1] = "Legend Silicon Corp.",
-[4][0x21 - 1] = "Sci-worx GmbH",
-[4][0x22 - 1] = "SMSC (Standard Microsystems)",
-[4][0x23 - 1] = "Renesas Electronics",
-[4][0x24 - 1] = "Raza Microelectronics",
-[4][0x25 - 1] = "Phyworks",
-[4][0x26 - 1] = "MediaTek",
-[4][0x27 - 1] = "Non-cents Productions",
-[4][0x28 - 1] = "US Modular",
-[4][0x29 - 1] = "Wintegra Ltd.",
-[4][0x2a - 1] = "Mathstar",
-[4][0x2b - 1] = "StarCore",
-[4][0x2c - 1] = "Oplus Technologies",
-[4][0x2d - 1] = "Mindspeed",
-[4][0x2e - 1] = "Just Young Computer",
-[4][0x2f - 1] = "Radia Communications",
-[4][0x30 - 1] = "OCZ",
-[4][0x31 - 1] = "Emuzed",
-[4][0x32 - 1] = "LOGIC Devices",
-[4][0x33 - 1] = "Inphi Corporation",
-[4][0x34 - 1] = "Quake Technologies",
-[4][0x35 - 1] = "Vixel",
-[4][0x36 - 1] = "SolusTek",
-[4][0x37 - 1] = "Kongsberg Maritime",
-[4][0x38 - 1] = "Faraday Technology",
-[4][0x39 - 1] = "Altium Ltd.",
-[4][0x3a - 1] = "Insyte",
-[4][0x3b - 1] = "ARM Ltd.",
-[4][0x3c - 1] = "DigiVision",
-[4][0x3d - 1] = "Vativ Technologies",
-[4][0x3e - 1] = "Endicott Interconnect Technologies",
-[4][0x3f - 1] = "Pericom",
-[4][0x40 - 1] = "Bandspeed",
-[4][0x41 - 1] = "LeWiz Communications",
-[4][0x42 - 1] = "CPU Technology",
-[4][0x43 - 1] = "Ramaxel Technology",
-[4][0x44 - 1] = "DSP Group",
-[4][0x45 - 1] = "Axis Communications",
-[4][0x46 - 1] = "Legacy Electronics",
-[4][0x47 - 1] = "Chrontel",
-[4][0x48 - 1] = "Powerchip Semiconductor",
-[4][0x49 - 1] = "MobilEye Technologies",
-[4][0x4a - 1] = "Excel Semiconductor",
-[4][0x4b - 1] = "A-DATA Technology",
-[4][0x4c - 1] = "VirtualDigm",
-[4][0x4d - 1] = "G Skill Intl",
-[4][0x4e - 1] = "Quanta Computer",
-[4][0x4f - 1] = "Yield Microelectronics",
-[4][0x50 - 1] = "Afa Technologies",
-[4][0x51 - 1] = "KINGBOX Technology Co. Ltd.",
-[4][0x52 - 1] = "Ceva",
-[4][0x53 - 1] = "iStor Networks",
-[4][0x54 - 1] = "Advance Modules",
-[4][0x55 - 1] = "Microsoft",
-[4][0x56 - 1] = "Open-Silicon",
-[4][0x57 - 1] = "Goal Semiconductor",
-[4][0x58 - 1] = "ARC International",
-[4][0x59 - 1] = "Simmtec",
-[4][0x5a - 1] = "Metanoia",
-[4][0x5b - 1] = "Key Stream",
-[4][0x5c - 1] = "Lowrance Electronics",
-[4][0x5d - 1] = "Adimos",
-[4][0x5e - 1] = "SiGe Semiconductor",
-[4][0x5f - 1] = "Fodus Communications",
-[4][0x60 - 1] = "Credence Systems Corp.",
-[4][0x61 - 1] = "Genesis Microchip Inc.",
-[4][0x62 - 1] = "Vihana, Inc.",
-[4][0x63 - 1] = "WIS Technologies",
-[4][0x64 - 1] = "GateChange Technologies",
-[4][0x65 - 1] = "High Density Devices AS",
-[4][0x66 - 1] = "Synopsys",
-[4][0x67 - 1] = "Gigaram",
-[4][0x68 - 1] = "Enigma Semiconductor Inc.",
-[4][0x69 - 1] = "Century Micro Inc.",
-[4][0x6a - 1] = "Icera Semiconductor",
-[4][0x6b - 1] = "Mediaworks Integrated Systems",
-[4][0x6c - 1] = "O\u2019Neil Product Development",
-[4][0x6d - 1] = "Supreme Top Technology Ltd.",
-[4][0x6e - 1] = "MicroDisplay Corporation",
-[4][0x6f - 1] = "Team Group Inc.",
-[4][0x70 - 1] = "Sinett Corporation",
-[4][0x71 - 1] = "Toshiba Corporation",
-[4][0x72 - 1] = "Tensilica",
-[4][0x73 - 1] = "SiRF Technology",
-[4][0x74 - 1] = "Bacoc Inc.",
-[4][0x75 - 1] = "SMaL Camera Technologies",
-[4][0x76 - 1] = "Thomson SC",
-[4][0x77 - 1] = "Airgo Networks",
-[4][0x78 - 1] = "Wisair Ltd.",
-[4][0x79 - 1] = "SigmaTel",
-[4][0x7a - 1] = "Arkados",
-[4][0x7b - 1] = "Compete IT gmbH Co. KG",
-[4][0x7c - 1] = "Eudar Technology Inc.",
-[4][0x7d - 1] = "Focus Enhancements",
-[4][0x7e - 1] = "Xyratex",
-[5][0x01 - 1] = "Specular Networks",
-[5][0x02 - 1] = "Patriot Memory (PDP Systems)",
-[5][0x03 - 1] = "U-Chip Technology Corp.",
-[5][0x04 - 1] = "Silicon Optix",
-[5][0x05 - 1] = "Greenfield Networks",
-[5][0x06 - 1] = "CompuRAM GmbH",
-[5][0x07 - 1] = "Stargen, Inc.",
-[5][0x08 - 1] = "NetCell Corporation",
-[5][0x09 - 1] = "Excalibrus Technologies Ltd",
-[5][0x0a - 1] = "SCM Microsystems",
-[5][0x0b - 1] = "Xsigo Systems, Inc.",
-[5][0x0c - 1] = "CHIPS & Systems Inc",
-[5][0x0d - 1] = "Tier 1 Multichip Solutions",
-[5][0x0e - 1] = "CWRL Labs",
-[5][0x0f - 1] = "Teradici",
-[5][0x10 - 1] = "Gigaram, Inc.",
-[5][0x11 - 1] = "g2 Microsystems",
-[5][0x12 - 1] = "PowerFlash Semiconductor",
-[5][0x13 - 1] = "P.A. Semi, Inc.",
-[5][0x14 - 1] = "NovaTech Solutions, S.A.",
-[5][0x15 - 1] = "c2 Microsystems, Inc.",
-[5][0x16 - 1] = "Level5 Networks",
-[5][0x17 - 1] = "COS Memory AG",
-[5][0x18 - 1] = "Innovasic Semiconductor",
-[5][0x19 - 1] = "02IC Co. Ltd",
-[5][0x1a - 1] = "Tabula, Inc.",
-[5][0x1b - 1] = "Crucial Technology",
-[5][0x1c - 1] = "Chelsio Communications",
-[5][0x1d - 1] = "Solarflare Communications",
-[5][0x1e - 1] = "Xambala Inc.",
-[5][0x1f - 1] = "EADS Astrium",
-[5][0x20 - 1] = "Terra Semiconductor, Inc.",
-[5][0x21 - 1] = "Imaging Works, Inc.",
-[5][0x22 - 1] = "Astute Networks, Inc.",
-[5][0x23 - 1] = "Tzero",
-[5][0x24 - 1] = "Emulex",
-[5][0x25 - 1] = "Power-One",
-[5][0x26 - 1] = "Pulse~LINK Inc.",
-[5][0x27 - 1] = "Hon Hai Precision Industry",
-[5][0x28 - 1] = "White Rock Networks Inc.",
-[5][0x29 - 1] = "Telegent Systems USA, Inc.",
-[5][0x2a - 1] = "Atrua Technologies, Inc.",
-[5][0x2b - 1] = "Acbel Polytech Inc.",
-[5][0x2c - 1] = "eRide Inc.",
-[5][0x2d - 1] = "ULi Electronics Inc.",
-[5][0x2e - 1] = "Magnum Semiconductor Inc.",
-[5][0x2f - 1] = "neoOne Technology, Inc.",
-[5][0x30 - 1] = "Connex Technology, Inc.",
-[5][0x31 - 1] = "Stream Processors, Inc.",
-[5][0x32 - 1] = "Focus Enhancements",
-[5][0x33 - 1] = "Telecis Wireless, Inc.",
-[5][0x34 - 1] = "uNav Microelectronics",
-[5][0x35 - 1] = "Tarari, Inc.",
-[5][0x36 - 1] = "Ambric, Inc.",
-[5][0x37 - 1] = "Newport Media, Inc.",
-[5][0x38 - 1] = "VMTS",
-[5][0x39 - 1] = "Enuclia Semiconductor, Inc.",
-[5][0x3a - 1] = "Virtium Technology Inc.",
-[5][0x3b - 1] = "Solid State System Co., Ltd.",
-[5][0x3c - 1] = "Kian Tech LLC",
-[5][0x3d - 1] = "Artimi",
-[5][0x3e - 1] = "Power Quotient International",
-[5][0x3f - 1] = "Avago Technologies",
-[5][0x40 - 1] = "ADTechnology",
-[5][0x41 - 1] = "Sigma Designs",
-[5][0x42 - 1] = "SiCortex, Inc.",
-[5][0x43 - 1] = "Ventura Technology Group",
-[5][0x44 - 1] = "eASIC",
-[5][0x45 - 1] = "M.H.S. SAS",
-[5][0x46 - 1] = "Micro Star International",
-[5][0x47 - 1] = "Rapport Inc.",
-[5][0x48 - 1] = "Makway International",
-[5][0x49 - 1] = "Broad Reach Engineering Co.",
-[5][0x4a - 1] = "Semiconductor Mfg Intl Corp",
-[5][0x4b - 1] = "SiConnect",
-[5][0x4c - 1] = "FCI USA Inc.",
-[5][0x4d - 1] = "Validity Sensors",
-[5][0x4e - 1] = "Coney Technology Co. Ltd.",
-[5][0x4f - 1] = "Spans Logic",
-[5][0x50 - 1] = "Neterion Inc.",
-[5][0x51 - 1] = "Qimonda",
-[5][0x52 - 1] = "New Japan Radio Co. Ltd.",
-[5][0x53 - 1] = "Velogix",
-[5][0x54 - 1] = "Montalvo Systems",
-[5][0x55 - 1] = "iVivity Inc.",
-[5][0x56 - 1] = "Walton Chaintech",
-[5][0x57 - 1] = "AENEON",
-[5][0x58 - 1] = "Lorom Industrial Co. Ltd.",
-[5][0x59 - 1] = "Radiospire Networks",
-[5][0x5a - 1] = "Sensio Technologies, Inc.",
-[5][0x5b - 1] = "Nethra Imaging",
-[5][0x5c - 1] = "Hexon Technology Pte Ltd",
-[5][0x5d - 1] = "CompuStocx (CSX)",
-[5][0x5e - 1] = "Methode Electronics, Inc.",
-[5][0x5f - 1] = "Connect One Ltd.",
-[5][0x60 - 1] = "Opulan Technologies",
-[5][0x61 - 1] = "Septentrio NV",
-[5][0x62 - 1] = "Goldenmars Technology Inc.",
-[5][0x63 - 1] = "Kreton Corporation",
-[5][0x64 - 1] = "Cochlear Ltd.",
-[5][0x65 - 1] = "Altair Semiconductor",
-[5][0x66 - 1] = "NetEffect, Inc.",
-[5][0x67 - 1] = "Spansion, Inc.",
-[5][0x68 - 1] = "Taiwan Semiconductor Mfg",
-[5][0x69 - 1] = "Emphany Systems Inc.",
-[5][0x6a - 1] = "ApaceWave Technologies",
-[5][0x6b - 1] = "Mobilygen Corporation",
-[5][0x6c - 1] = "Tego",
-[5][0x6d - 1] = "Cswitch Corporation",
-[5][0x6e - 1] = "Haier (Beijing) IC Design Co.",
-[5][0x6f - 1] = "MetaRAM",
-[5][0x70 - 1] = "Axel Electronics Co. Ltd.",
-[5][0x71 - 1] = "Tilera Corporation",
-[5][0x72 - 1] = "Aquantia",
-[5][0x73 - 1] = "Vivace Semiconductor",
-[5][0x74 - 1] = "Redpine Signals",
-[5][0x75 - 1] = "Octalica",
-[5][0x76 - 1] = "InterDigital Communications",
-[5][0x77 - 1] = "Avant Technology",
-[5][0x78 - 1] = "Asrock, Inc.",
-[5][0x79 - 1] = "Availink",
-[5][0x7a - 1] = "Quartics, Inc.",
-[5][0x7b - 1] = "Element CXI",
-[5][0x7c - 1] = "Innovaciones Microelectronicas",
-[5][0x7d - 1] = "VeriSilicon Microelectronics",
-[5][0x7e - 1] = "W5 Networks",
-[6][0x01 - 1] = "MOVEKING",
-[6][0x02 - 1] = "Mavrix Technology, Inc.",
-[6][0x03 - 1] = "CellGuide Ltd.",
-[6][0x04 - 1] = "Faraday Technology",
-[6][0x05 - 1] = "Diablo Technologies, Inc.",
-[6][0x06 - 1] = "Jennic",
-[6][0x07 - 1] = "Octasic",
-[6][0x08 - 1] = "Molex Incorporated",
-[6][0x09 - 1] = "3Leaf Networks",
-[6][0x0a - 1] = "Bright Micron Technology",
-[6][0x0b - 1] = "Netxen",
-[6][0x0c - 1] = "NextWave Broadband Inc.",
-[6][0x0d - 1] = "DisplayLink",
-[6][0x0e - 1] = "ZMOS Technology",
-[6][0x0f - 1] = "Tec-Hill",
-[6][0x10 - 1] = "Multigig, Inc.",
-[6][0x11 - 1] = "Amimon",
-[6][0x12 - 1] = "Euphonic Technologies, Inc.",
-[6][0x13 - 1] = "BRN Phoenix",
-[6][0x14 - 1] = "InSilica",
-[6][0x15 - 1] = "Ember Corporation",
-[6][0x16 - 1] = "Avexir Technologies Corporation",
-[6][0x17 - 1] = "Echelon Corporation",
-[6][0x18 - 1] = "Edgewater Computer Systems",
-[6][0x19 - 1] = "XMOS Semiconductor Ltd.",
-[6][0x1a - 1] = "GENUSION, Inc.",
-[6][0x1b - 1] = "Memory Corp NV",
-[6][0x1c - 1] = "SiliconBlue Technologies",
-[6][0x1d - 1] = "Rambus Inc.",
-[6][0x1e - 1] = "Andes Technology Corporation",
-[6][0x1f - 1] = "Coronis Systems",
-[6][0x20 - 1] = "Achronix Semiconductor",
-[6][0x21 - 1] = "Siano Mobile Silicon Ltd.",
-[6][0x22 - 1] = "Semtech Corporation",
-[6][0x23 - 1] = "Pixelworks Inc.",
-[6][0x24 - 1] = "Gaisler Research AB",
-[6][0x25 - 1] = "Teranetics",
-[6][0x26 - 1] = "Toppan Printing Co. Ltd.",
-[6][0x27 - 1] = "Kingxcon",
-[6][0x28 - 1] = "Silicon Integrated Systems",
-[6][0x29 - 1] = "I-O Data Device, Inc.",
-[6][0x2a - 1] = "NDS Americas Inc.",
-[6][0x2b - 1] = "Solomon Systech Limited",
-[6][0x2c - 1] = "On Demand Microelectronics",
-[6][0x2d - 1] = "Amicus Wireless Inc.",
-[6][0x2e - 1] = "SMARDTV SNC",
-[6][0x2f - 1] = "Comsys Communication Ltd.",
-[6][0x30 - 1] = "Movidia Ltd.",
-[6][0x31 - 1] = "Javad GNSS, Inc.",
-[6][0x32 - 1] = "Montage Technology Group",
-[6][0x33 - 1] = "Trident Microsystems",
-[6][0x34 - 1] = "Super Talent",
-[6][0x35 - 1] = "Optichron, Inc.",
-[6][0x36 - 1] = "Future Waves UK Ltd.",
-[6][0x37 - 1] = "SiBEAM, Inc.",
-[6][0x38 - 1] = "Inicore,Inc.",
-[6][0x39 - 1] = "Virident Systems",
-[6][0x3a - 1] = "M2000, Inc.",
-[6][0x3b - 1] = "ZeroG Wireless, Inc.",
-[6][0x3c - 1] = "Gingle Technology Co. Ltd.",
-[6][0x3d - 1] = "Space Micro Inc.",
-[6][0x3e - 1] = "Wilocity",
-[6][0x3f - 1] = "Novafora, Inc.",
-[6][0x40 - 1] = "iKoa Corporation",
-[6][0x41 - 1] = "ASint Technology",
-[6][0x42 - 1] = "Ramtron",
-[6][0x43 - 1] = "Plato Networks Inc.",
-[6][0x44 - 1] = "IPtronics AS",
-[6][0x45 - 1] = "Infinite-Memories",
-[6][0x46 - 1] = "Parade Technologies Inc.",
-[6][0x47 - 1] = "Dune Networks",
-[6][0x48 - 1] = "GigaDevice Semiconductor",
-[6][0x49 - 1] = "Modu Ltd.",
-[6][0x4a - 1] = "CEITEC",
-[6][0x4b - 1] = "Northrop Grumman",
-[6][0x4c - 1] = "XRONET Corporation",
-[6][0x4d - 1] = "Sicon Semiconductor AB",
-[6][0x4e - 1] = "Atla Electronics Co. Ltd.",
-[6][0x4f - 1] = "TOPRAM Technology",
-[6][0x50 - 1] = "Silego Technology Inc.",
-[6][0x51 - 1] = "Kinglife",
-[6][0x52 - 1] = "Ability Industries Ltd.",
-[6][0x53 - 1] = "Silicon Power Computer &",
-[6][0x54 - 1] = "Augusta Technology, Inc.",
-[6][0x55 - 1] = "Nantronics Semiconductors",
-[6][0x56 - 1] = "Hilscher Gesellschaft",
-[6][0x57 - 1] = "Quixant Ltd.",
-[6][0x58 - 1] = "Percello Ltd.",
-[6][0x59 - 1] = "NextIO Inc.",
-[6][0x5a - 1] = "Scanimetrics Inc.",
-[6][0x5b - 1] = "FS-Semi Company Ltd.",
-[6][0x5c - 1] = "Infinera Corporation",
-[6][0x5d - 1] = "SandForce Inc.",
-[6][0x5e - 1] = "Lexar Media",
-[6][0x5f - 1] = "Teradyne Inc.",
-[6][0x60 - 1] = "Memory Exchange Corp.",
-[6][0x61 - 1] = "Suzhou Smartek Electronics",
-[6][0x62 - 1] = "Avantium Corporation",
-[6][0x63 - 1] = "ATP Electronics Inc.",
-[6][0x64 - 1] = "Valens Semiconductor Ltd",
-[6][0x65 - 1] = "Agate Logic, Inc.",
-[6][0x66 - 1] = "Netronome",
-[6][0x67 - 1] = "Zenverge, Inc.",
-[6][0x68 - 1] = "N-trig Ltd",
-[6][0x69 - 1] = "SanMax Technologies Inc.",
-[6][0x6a - 1] = "Contour Semiconductor Inc.",
-[6][0x6b - 1] = "TwinMOS",
-[6][0x6c - 1] = "Silicon Systems, Inc.",
-[6][0x6d - 1] = "V-Color Technology Inc.",
-[6][0x6e - 1] = "Certicom Corporation",
-[6][0x6f - 1] = "JSC ICC Milandr",
-[6][0x70 - 1] = "PhotoFast Global Inc.",
-[6][0x71 - 1] = "InnoDisk Corporation",
-[6][0x72 - 1] = "Muscle Power",
-[6][0x73 - 1] = "Energy Micro",
-[6][0x74 - 1] = "Innofidei",
-[6][0x75 - 1] = "CopperGate Communications",
-[6][0x76 - 1] = "Holtek Semiconductor Inc.",
-[6][0x77 - 1] = "Myson Century, Inc.",
-[6][0x78 - 1] = "FIDELIX",
-[6][0x79 - 1] = "Red Digital Cinema",
-[6][0x7a - 1] = "Densbits Technology",
-[6][0x7b - 1] = "Zempro",
-[6][0x7c - 1] = "MoSys",
-[6][0x7d - 1] = "Provigent",
-[6][0x7e - 1] = "Triad Semiconductor, Inc.",
-[7][0x01 - 1] = "Siklu Communication Ltd.",
-[7][0x02 - 1] = "A Force Manufacturing Ltd.",
-[7][0x03 - 1] = "Strontium",
-[7][0x04 - 1] = "Abilis Systems",
-[7][0x05 - 1] = "Siglead, Inc.",
-[7][0x06 - 1] = "Ubicom, Inc.",
-[7][0x07 - 1] = "Unifosa Corporation",
-[7][0x08 - 1] = "Stretch, Inc.",
-[7][0x09 - 1] = "Lantiq Deutschland GmbH",
-[7][0x0a - 1] = "Visipro.",
-[7][0x0b - 1] = "EKMemory",
-[7][0x0c - 1] = "Microelectronics Institute ZTE",
-[7][0x0d - 1] = "Cognovo Ltd.",
-[7][0x0e - 1] = "Carry Technology Co. Ltd.",
-[7][0x0f - 1] = "Nokia",
-[7][0x10 - 1] = "King Tiger Technology",
-[7][0x11 - 1] = "Sierra Wireless",
-[7][0x12 - 1] = "HT Micron",
-[7][0x13 - 1] = "Albatron Technology Co. Ltd.",
-[7][0x14 - 1] = "Leica Geosystems AG",
-[7][0x15 - 1] = "BroadLight",
-[7][0x16 - 1] = "AEXEA",
-[7][0x17 - 1] = "ClariPhy Communications, Inc.",
-[7][0x18 - 1] = "Green Plug",
-[7][0x19 - 1] = "Design Art Networks",
-[7][0x1a - 1] = "Mach Xtreme Technology Ltd.",
-[7][0x1b - 1] = "ATO Solutions Co. Ltd.",
-[7][0x1c - 1] = "Ramsta",
-[7][0x1d - 1] = "Greenliant Systems, Ltd.",
-[7][0x1e - 1] = "Teikon",
-[7][0x1f - 1] = "Antec Hadron",
-[7][0x20 - 1] = "NavCom Technology, Inc.",
-[7][0x21 - 1] = "Shanghai Fudan Microelectronics",
-[7][0x22 - 1] = "Calxeda, Inc.",
-[7][0x23 - 1] = "JSC EDC Electronics",
-[7][0x24 - 1] = "Kandit Technology Co. Ltd.",
-[7][0x25 - 1] = "Ramos Technology",
-[7][0x26 - 1] = "Goldenmars Technology",
-[7][0x27 - 1] = "XeL Technology Inc.",
-[7][0x28 - 1] = "Newzone Corporation",
-[7][0x29 - 1] = "ShenZhen MercyPower Tech",
-[7][0x2a - 1] = "Nanjing Yihuo Technology",
-[7][0x2b - 1] = "Nethra Imaging Inc.",
-[7][0x2c - 1] = "SiTel Semiconductor BV",
-[7][0x2d - 1] = "SolidGear Corporation",
-[7][0x2e - 1] = "Topower Computer Ind Co Ltd.",
-[7][0x2f - 1] = "Wilocity",
-[7][0x30 - 1] = "Profichip GmbH",
-[7][0x31 - 1] = "Gerad Technologies",
-[7][0x32 - 1] = "Ritek Corporation",
-[7][0x33 - 1] = "Gomos Technology Limited",
-[7][0x34 - 1] = "Memoright Corporation",
-[7][0x35 - 1] = "D-Broad, Inc.",
-[7][0x36 - 1] = "HiSilicon Technologies",
-[7][0x37 - 1] = "Syndiant Inc..",
-[7][0x38 - 1] = "Enverv Inc.",
-[7][0x39 - 1] = "Cognex",
-[7][0x3a - 1] = "Xinnova Technology Inc.",
-[7][0x3b - 1] = "Ultron AG",
-[7][0x3c - 1] = "Concord Idea Corporation",
-[7][0x3d - 1] = "AIM Corporation",
-[7][0x3e - 1] = "Lifetime Memory Products",
-[7][0x3f - 1] = "Ramsway",
-[7][0x40 - 1] = "Recore Systems B.V.",
-[7][0x41 - 1] = "Haotian Jinshibo Science Tech",
-[7][0x42 - 1] = "Being Advanced Memory",
-[7][0x43 - 1] = "Adesto Technologies",
-[7][0x44 - 1] = "Giantec Semiconductor, Inc.",
-[7][0x45 - 1] = "HMD Electronics AG",
-[7][0x46 - 1] = "Gloway International (HK)",
-[7][0x47 - 1] = "Kingcore",
-[7][0x48 - 1] = "Anucell Technology Holding",
-[7][0x49 - 1] = "Accord Software & Systems Pvt. Ltd.",
-[7][0x4a - 1] = "Active-Semi Inc.",
-[7][0x4b - 1] = "Denso Corporation",
-[7][0x4c - 1] = "TLSI Inc.",
-[7][0x4d - 1] = "Qidan",
-[7][0x4e - 1] = "Mustang",
-[7][0x4f - 1] = "Orca Systems",
-[7][0x50 - 1] = "Passif Semiconductor",
-[7][0x51 - 1] = "GigaDevice Semiconductor (Beijing)",
-[7][0x52 - 1] = "Memphis Electronic",
-[7][0x53 - 1] = "Beckhoff Automation GmbH",
-[7][0x54 - 1] = "Harmony Semiconductor Corp",
-[7][0x55 - 1] = "Air Computers SRL",
-[7][0x56 - 1] = "TMT Memory",
-[7][0x57 - 1] = "Eorex Corporation",
-[7][0x58 - 1] = "Xingtera",
-[7][0x59 - 1] = "Netsol",
-[7][0x5a - 1] = "Bestdon Technology Co. Ltd.",
-[7][0x5b - 1] = "Baysand Inc.",
-[7][0x5c - 1] = "Uroad Technology Co. Ltd.",
-[7][0x5d - 1] = "Wilk Elektronik S.A.",
-[7][0x5e - 1] = "AAI",
-[7][0x5f - 1] = "Harman",
-[7][0x60 - 1] = "Berg Microelectronics Inc.",
-[7][0x61 - 1] = "ASSIA, Inc.",
-[7][0x62 - 1] = "Visiontek Products LLC",
-[7][0x63 - 1] = "OCMEMORY",
-[7][0x64 - 1] = "Welink Solution Inc.",
-[7][0x65 - 1] = "Shark Gaming",
-[7][0x66 - 1] = "Avalanche Technology",
-[7][0x67 - 1] = "R&D Center ELVEES OJSC",
-[7][0x68 - 1] = "KingboMars Technology Co. Ltd.",
-[7][0x69 - 1] = "High Bridge Solutions Industria",
-[7][0x6a - 1] = "Transcend Technology Co. Ltd.",
-[7][0x6b - 1] = "Everspin Technologies",
-[7][0x6c - 1] = "Hon-Hai Precision",
-[7][0x6d - 1] = "Smart Storage Systems",
-[7][0x6e - 1] = "Toumaz Group",
-[7][0x6f - 1] = "Zentel Electronics Corporation",
-[7][0x70 - 1] = "Panram International Corporation",
-[7][0x71 - 1] = "Silicon Space Technology",
-[7][0x72 - 1] = "LITE-ON IT Corporation",
-[7][0x73 - 1] = "Inuitive",
-[7][0x74 - 1] = "HMicro",
-[7][0x75 - 1] = "BittWare, Inc.",
-[7][0x76 - 1] = "GLOBALFOUNDRIES",
-[7][0x77 - 1] = "ACPI Digital Co. Ltd.",
-[7][0x78 - 1] = "Annapurna Labs",
-[7][0x79 - 1] = "AcSiP Technology Corporation",
-[7][0x7a - 1] = "Idea! Electronic Systems",
-[7][0x7b - 1] = "Gowe Technology Co. Ltd.",
-[7][0x7c - 1] = "Hermes Testing Solutions, Inc.",
-[7][0x7d - 1] = "Positivo BGH",
-[7][0x7e - 1] = "Intelligence Silicon Technology",
-[8][0x01 - 1] = "3D PLUS",
-[8][0x02 - 1] = "Diehl Aerospace",
-[8][0x03 - 1] = "Fairchild",
-[8][0x04 - 1] = "Mercury Systems",
-[8][0x05 - 1] = "Sonics, Inc.",
-[8][0x06 - 1] = "GE Intelligent Platforms GmbH & Co.",
-[8][0x07 - 1] = "Shenzhen Jinge Information Co. Ltd.",
-[8][0x08 - 1] = "SCWW",
-[8][0x09 - 1] = "Silicon Motion Inc.",
-[8][0x0a - 1] = "Anurag",
-[8][0x0b - 1] = "King Kong",
-[8][0x0c - 1] = "FROM30 Co. Ltd.",
-[8][0x0d - 1] = "Gowin Semiconductor Corp",
-[8][0x0e - 1] = "Fremont Micro Devices Ltd.",
-[8][0x0f - 1] = "Ericsson Modems",
-[8][0x10 - 1] = "Exelis",
-[8][0x11 - 1] = "Satixfy Ltd.",
-[8][0x12 - 1] = "Galaxy Microsystems Ltd.",
-[8][0x13 - 1] = "Gloway International Co. Ltd.",
-[8][0x14 - 1] = "Lab",
-[8][0x15 - 1] = "Smart Energy Instruments",
-[8][0x16 - 1] = "Approved Memory Corporation",
-[8][0x17 - 1] = "Axell Corporation",
-[8][0x18 - 1] = "Essencore Limited",
-[8][0x19 - 1] = "Phytium",
-[8][0x1a - 1] = "Xi\u2019an SinoChip Semiconductor",
-[8][0x1b - 1] = "Ambiq Micro",
-[8][0x1c - 1] = "eveRAM Technology, Inc.",
-[8][0x1d - 1] = "Infomax",
-[8][0x1e - 1] = "Butterfly Network, Inc.",
-[8][0x1f - 1] = "Shenzhen City Gcai Electronics",
-[8][0x20 - 1] = "Stack Devices Corporation",
-[8][0x21 - 1] = "ADK Media Group",
-[8][0x22 - 1] = "TSP Global Co., Ltd.",
-[8][0x23 - 1] = "HighX",
-[8][0x24 - 1] = "Shenzhen Elicks Technology",
-[8][0x25 - 1] = "ISSI/Chingis",
-[8][0x26 - 1] = "Google, Inc.",
-[8][0x27 - 1] = "Dasima International Development",
-[8][0x28 - 1] = "Leahkinn Technology Limited",
-[8][0x29 - 1] = "HIMA Paul Hildebrandt GmbH Co KG",
-[8][0x2a - 1] = "Keysight Technologies",
-[8][0x2b - 1] = "Techcomp International (Fastable)",
-[8][0x2c - 1] = "Ancore Technology Corporation",
-[8][0x2d - 1] = "Nuvoton",
-[8][0x2e - 1] = "Korea Uhbele International Group Ltd.",
-[8][0x2f - 1] = "Ikegami Tsushinki Co Ltd.",
-[8][0x30 - 1] = "RelChip, Inc.",
-[8][0x31 - 1] = "Baikal Electronics",
-[8][0x32 - 1] = "Nemostech Inc.",
-[8][0x33 - 1] = "Memorysolution GmbH",
-[8][0x34 - 1] = "Silicon Integrated Systems Corporation",
-[8][0x35 - 1] = "Xiede",
-[8][0x36 - 1] = "Multilaser Components",
-[8][0x37 - 1] = "Flash Chi",
-[8][0x38 - 1] = "Jone",
-[8][0x39 - 1] = "GCT Semiconductor Inc.",
-[8][0x3a - 1] = "Hong Kong Zetta Device Technology",
-[8][0x3b - 1] = "Unimemory Technology(s) Pte Ltd.",
-[8][0x3c - 1] = "Cuso",
-[8][0x3d - 1] = "Kuso",
-[8][0x3e - 1] = "Uniquify Inc.",
-[8][0x3f - 1] = "Skymedi Corporation",
-[8][0x40 - 1] = "Core Chance Co. Ltd.",
-[8][0x41 - 1] = "Tekism Co. Ltd.",
-[8][0x42 - 1] = "Seagate Technology PLC",
-[8][0x43 - 1] = "Hong Kong Gaia Group Co. Limited",
-[8][0x44 - 1] = "Gigacom Semiconductor LLC",
-[8][0x45 - 1] = "V2 Technologies",
-[8][0x46 - 1] = "TLi",
-[8][0x47 - 1] = "Neotion",
-[8][0x48 - 1] = "Lenovo",
-[8][0x49 - 1] = "Shenzhen Zhongteng Electronic Corp. Ltd.",
-[8][0x4a - 1] = "Compound Photonics",
-[8][0x4b - 1] = "in2H2 inc",
-[8][0x4c - 1] = "Shenzhen Pango Microsystems Co. Ltd",
-[8][0x4d - 1] = "Vasekey",
-[8][0x4e - 1] = "Cal-Comp Industria de Semicondutores",
-[8][0x4f - 1] = "Eyenix Co., Ltd.",
-[8][0x50 - 1] = "Heoriady",
-[8][0x51 - 1] = "Accelerated Memory Production Inc.",
-[8][0x52 - 1] = "INVECAS, Inc.",
-[8][0x53 - 1] = "AP Memory",
-[8][0x54 - 1] = "Douqi Technology",
-[8][0x55 - 1] = "Etron Technology, Inc.",
-[8][0x56 - 1] = "Indie Semiconductor",
-[8][0x57 - 1] = "Socionext Inc.",
-[8][0x58 - 1] = "HGST",
-[8][0x59 - 1] = "EVGA",
-[8][0x5a - 1] = "Audience Inc.",
-[8][0x5b - 1] = "EpicGear",
-[8][0x5c - 1] = "Vitesse Enterprise Co.",
-[8][0x5d - 1] = "Foxtronn International Corporation",
-[8][0x5e - 1] = "Bretelon Inc.",
-[8][0x5f - 1] = "Zbit Semiconductor, Inc.",
-[8][0x60 - 1] = "Eoplex Inc",
-[8][0x61 - 1] = "MaxLinear, Inc.",
-[8][0x62 - 1] = "ETA Devices",
-[8][0x63 - 1] = "LOKI",
-[8][0x64 - 1] = "IMS Semiconductor Co., Ltd",
-[8][0x65 - 1] = "Dosilicon Co., Ltd.",
-[8][0x66 - 1] = "Dolphin Integration",
-[8][0x67 - 1] = "Shenzhen Mic Electronics Technology",
-[8][0x68 - 1] = "Boya Microelectronics Inc.",
-[8][0x69 - 1] = "Geniachip (Roche)",
-[8][0x6a - 1] = "Axign",
-[8][0x6b - 1] = "Kingred Electronic Technology Ltd.",
-[8][0x6c - 1] = "Chao Yue Zhuo Computer Business Dept.",
-[8][0x6d - 1] = "Guangzhou Si Nuo Electronic Technology.",
-/* EOF */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jim-nvp.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jim-nvp.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jim-nvp.c
deleted file mode 100755
index d13bdfb..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jim-nvp.c
+++ /dev/null
@@ -1,341 +0,0 @@
-/* Jim - A small embeddable Tcl interpreter
- *
- * Copyright 2005 Salvatore Sanfilippo <an...@invece.org>
- * Copyright 2005 Clemens Hintze <c....@gmx.net>
- * Copyright 2005 patthoyts - Pat Thoyts <pa...@users.sf.net>
- * Copyright 2008 oharboe - �yvind Harboe - oyvind.harboe@zylin.com
- * Copyright 2008 Andrew Lunn <an...@lunn.ch>
- * Copyright 2008 Duane Ellis <op...@duaneellis.com>
- * Copyright 2008 Uwe Klein <uk...@klein-messgeraete.de>
- * Copyright 2008 Steve Bennett <st...@workware.net.au>
- * Copyright 2009 Nico Coesel <nc...@dealogic.nl>
- * Copyright 2009 Zachary T Welch zw@superlucidity.net
- * Copyright 2009 David Brownell
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials
- * provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE JIM TCL PROJECT ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * JIM TCL PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * The views and conclusions contained in the software and documentation
- * are those of the authors and should not be interpreted as representing
- * official policies, either expressed or implied, of the Jim Tcl Project.
- */
-
-#include <string.h>
-#include <jim-nvp.h>
-
-int Jim_GetNvp(Jim_Interp *interp,
- Jim_Obj *objPtr, const Jim_Nvp *nvp_table, const Jim_Nvp **result)
-{
- Jim_Nvp *n;
- int e;
-
- e = Jim_Nvp_name2value_obj(interp, nvp_table, objPtr, &n);
- if (e == JIM_ERR)
- return e;
-
- /* Success? found? */
- if (n->name) {
- /* remove const */
- *result = (Jim_Nvp *) n;
- return JIM_OK;
- } else
- return JIM_ERR;
-}
-
-Jim_Nvp *Jim_Nvp_name2value_simple(const Jim_Nvp *p, const char *name)
-{
- while (p->name) {
- if (0 == strcmp(name, p->name))
- break;
- p++;
- }
- return (Jim_Nvp *) (p);
-}
-
-Jim_Nvp *Jim_Nvp_name2value_nocase_simple(const Jim_Nvp *p, const char *name)
-{
- while (p->name) {
- if (0 == strcasecmp(name, p->name))
- break;
- p++;
- }
- return (Jim_Nvp *) (p);
-}
-
-int Jim_Nvp_name2value_obj(Jim_Interp *interp, const Jim_Nvp *p, Jim_Obj *o, Jim_Nvp **result)
-{
- return Jim_Nvp_name2value(interp, p, Jim_String(o), result);
-}
-
-int Jim_Nvp_name2value(Jim_Interp *interp, const Jim_Nvp *_p, const char *name, Jim_Nvp **result)
-{
- const Jim_Nvp *p;
-
- p = Jim_Nvp_name2value_simple(_p, name);
-
- /* result */
- if (result)
- *result = (Jim_Nvp *) (p);
-
- /* found? */
- if (p->name)
- return JIM_OK;
- else
- return JIM_ERR;
-}
-
-int Jim_Nvp_name2value_obj_nocase(Jim_Interp *interp,
- const Jim_Nvp *p,
- Jim_Obj *o,
- Jim_Nvp **puthere)
-{
- return Jim_Nvp_name2value_nocase(interp, p, Jim_String(o), puthere);
-}
-
-int Jim_Nvp_name2value_nocase(Jim_Interp *interp, const Jim_Nvp *_p, const char *name,
- Jim_Nvp **puthere)
-{
- const Jim_Nvp *p;
-
- p = Jim_Nvp_name2value_nocase_simple(_p, name);
-
- if (puthere)
- *puthere = (Jim_Nvp *) (p);
- /* found */
- if (p->name)
- return JIM_OK;
- else
- return JIM_ERR;
-}
-
-int Jim_Nvp_value2name_obj(Jim_Interp *interp, const Jim_Nvp *p, Jim_Obj *o, Jim_Nvp **result)
-{
- int e;
- jim_wide w;
-
- e = Jim_GetWide(interp, o, &w);
- if (e != JIM_OK)
- return e;
-
- return Jim_Nvp_value2name(interp, p, w, result);
-}
-
-Jim_Nvp *Jim_Nvp_value2name_simple(const Jim_Nvp *p, int value)
-{
- while (p->name) {
- if (value == p->value)
- break;
- p++;
- }
- return (Jim_Nvp *) (p);
-}
-
-int Jim_Nvp_value2name(Jim_Interp *interp, const Jim_Nvp *_p, int value, Jim_Nvp **result)
-{
- const Jim_Nvp *p;
-
- p = Jim_Nvp_value2name_simple(_p, value);
-
- if (result)
- *result = (Jim_Nvp *) (p);
-
- if (p->name)
- return JIM_OK;
- else
- return JIM_ERR;
-}
-
-int Jim_GetOpt_Setup(Jim_GetOptInfo *p, Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- memset(p, 0, sizeof(*p));
- p->interp = interp;
- p->argc = argc;
- p->argv = argv;
-
- return JIM_OK;
-}
-
-void Jim_GetOpt_Debug(Jim_GetOptInfo *p)
-{
- int x;
-
- fprintf(stderr, "---args---\n");
- for (x = 0; x < p->argc; x++)
- fprintf(stderr, "%2d) %s\n", x, Jim_String(p->argv[x]));
- fprintf(stderr, "-------\n");
-}
-
-int Jim_GetOpt_Obj(Jim_GetOptInfo *goi, Jim_Obj **puthere)
-{
- Jim_Obj *o;
-
- o = NULL; /* failure */
- if (goi->argc) {
- /* success */
- o = goi->argv[0];
- goi->argc -= 1;
- goi->argv += 1;
- }
- if (puthere)
- *puthere = o;
- if (o != NULL)
- return JIM_OK;
- else
- return JIM_ERR;
-}
-
-int Jim_GetOpt_String(Jim_GetOptInfo *goi, const char **puthere, int *len)
-{
- int r;
- Jim_Obj *o;
- const char *cp;
-
- r = Jim_GetOpt_Obj(goi, &o);
- if (r == JIM_OK) {
- cp = Jim_GetString(o, len);
- if (puthere) {
- *puthere = cp;
- }
- }
- return r;
-}
-
-int Jim_GetOpt_Double(Jim_GetOptInfo *goi, double *puthere)
-{
- int r;
- Jim_Obj *o;
- double _safe;
-
- if (puthere == NULL)
- puthere = &_safe;
-
- r = Jim_GetOpt_Obj(goi, &o);
- if (r == JIM_OK) {
- r = Jim_GetDouble(goi->interp, o, puthere);
- if (r != JIM_OK)
- Jim_SetResultFormatted(goi->interp, "not a number: %#s", o);
- }
- return r;
-}
-
-int Jim_GetOpt_Wide(Jim_GetOptInfo *goi, jim_wide *puthere)
-{
- int r;
- Jim_Obj *o;
- jim_wide _safe;
-
- if (puthere == NULL)
- puthere = &_safe;
-
- r = Jim_GetOpt_Obj(goi, &o);
- if (r == JIM_OK)
- r = Jim_GetWide(goi->interp, o, puthere);
- return r;
-}
-
-int Jim_GetOpt_Nvp(Jim_GetOptInfo *goi, const Jim_Nvp *nvp, Jim_Nvp **puthere)
-{
- Jim_Nvp *_safe;
- Jim_Obj *o;
- int e;
-
- if (puthere == NULL)
- puthere = &_safe;
-
- e = Jim_GetOpt_Obj(goi, &o);
- if (e == JIM_OK)
- e = Jim_Nvp_name2value_obj(goi->interp, nvp, o, puthere);
-
- return e;
-}
-
-void Jim_GetOpt_NvpUnknown(Jim_GetOptInfo *goi, const Jim_Nvp *nvptable, int hadprefix)
-{
- if (hadprefix)
- Jim_SetResult_NvpUnknown(goi->interp, goi->argv[-2], goi->argv[-1], nvptable);
- else
- Jim_SetResult_NvpUnknown(goi->interp, NULL, goi->argv[-1], nvptable);
-}
-
-int Jim_GetOpt_Enum(Jim_GetOptInfo *goi, const char *const *lookup, int *puthere)
-{
- int _safe;
- Jim_Obj *o;
- int e;
-
- if (puthere == NULL)
- puthere = &_safe;
- e = Jim_GetOpt_Obj(goi, &o);
- if (e == JIM_OK)
- e = Jim_GetEnum(goi->interp, o, lookup, puthere, "option", JIM_ERRMSG);
- return e;
-}
-
-void Jim_SetResult_NvpUnknown(Jim_Interp *interp,
- Jim_Obj *param_name, Jim_Obj *param_value, const Jim_Nvp *nvp)
-{
- if (param_name)
- Jim_SetResultFormatted(interp,
- "%#s: Unknown: %#s, try one of: ",
- param_name,
- param_value);
- else
- Jim_SetResultFormatted(interp, "Unknown param: %#s, try one of: ", param_value);
- while (nvp->name) {
- const char *a;
- const char *b;
-
- if ((nvp + 1)->name) {
- a = nvp->name;
- b = ", ";
- } else {
- a = "or ";
- b = nvp->name;
- }
- Jim_AppendStrings(interp, Jim_GetResult(interp), a, b, NULL);
- nvp++;
- }
-}
-
-const char *Jim_Debug_ArgvString(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- static Jim_Obj *debug_string_obj;
-
- int x;
-
- if (debug_string_obj)
- Jim_FreeObj(interp, debug_string_obj);
-
- debug_string_obj = Jim_NewEmptyStringObj(interp);
- for (x = 0; x < argc; x++)
- Jim_AppendStrings(interp, debug_string_obj, Jim_String(argv[x]), " ", NULL);
-
- return Jim_String(debug_string_obj);
-}
-
-int Jim_nvpInit(Jim_Interp *interp)
-{
- /* This is really a helper library, not an extension, but this is the easy way */
- return JIM_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jim-nvp.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jim-nvp.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jim-nvp.h
deleted file mode 100755
index ca382dd..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/jim-nvp.h
+++ /dev/null
@@ -1,329 +0,0 @@
-/* Jim - A small embeddable Tcl interpreter
- *
- * Copyright 2005 Salvatore Sanfilippo <an...@invece.org>
- * Copyright 2005 Clemens Hintze <c....@gmx.net>
- * Copyright 2005 patthoyts - Pat Thoyts <pa...@users.sf.net>
- * Copyright 2008 oharboe - �yvind Harboe - oyvind.harboe@zylin.com
- * Copyright 2008 Andrew Lunn <an...@lunn.ch>
- * Copyright 2008 Duane Ellis <op...@duaneellis.com>
- * Copyright 2008 Uwe Klein <uk...@klein-messgeraete.de>
- * Copyright 2008 Steve Bennett <st...@workware.net.au>
- * Copyright 2009 Nico Coesel <nc...@dealogic.nl>
- * Copyright 2009 Zachary T Welch zw@superlucidity.net
- * Copyright 2009 David Brownell
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials
- * provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE JIM TCL PROJECT ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
- * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
- * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * JIM TCL PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
- * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * The views and conclusions contained in the software and documentation
- * are those of the authors and should not be interpreted as representing
- * official policies, either expressed or implied, of the Jim Tcl Project.
- */
-
-#ifndef JIM_NVP_H
-#define JIM_NVP_H
-
-#include <jim.h>
-
-/** Name Value Pairs, aka: NVP
- * - Given a string - return the associated int.
- * - Given a number - return the associated string.
- * .
- *
- * Very useful when the number is not a simple index into an array of
- * known string, or there may be multiple strings (aliases) that mean then same
- * thing.
- *
- * An NVP Table is terminated with ".name = NULL".
- *
- * During the 'name2value' operation, if no matching string is found
- * the pointer to the terminal element (with p->name == NULL) is returned.
- *
- * Example:
- * \code
- * const Jim_Nvp yn[] = {
- * { "yes", 1 },
- * { "no" , 0 },
- * { "yep", 1 },
- * { "nope", 0 },
- * { NULL, -1 },
- * };
- *
- * Jim_Nvp *result
- * e = Jim_Nvp_name2value(interp, yn, "y", &result);
- * returns &yn[0];
- * e = Jim_Nvp_name2value(interp, yn, "n", &result);
- * returns &yn[1];
- * e = Jim_Nvp_name2value(interp, yn, "Blah", &result);
- * returns &yn[4];
- * \endcode
- *
- * During the number2name operation, the first matching value is returned.
- */
-typedef struct {
- const char *name;
- int value;
-} Jim_Nvp;
-
-int Jim_GetNvp(Jim_Interp *interp,
- Jim_Obj *objPtr,
- const Jim_Nvp *nvp_table,
- const Jim_Nvp **result);
-
-/* Name Value Pairs Operations */
-Jim_Nvp *Jim_Nvp_name2value_simple(const Jim_Nvp *nvp_table, const char *name);
-Jim_Nvp *Jim_Nvp_name2value_nocase_simple(const Jim_Nvp *nvp_table, const char *name);
-Jim_Nvp *Jim_Nvp_value2name_simple(const Jim_Nvp *nvp_table, int v);
-
-int Jim_Nvp_name2value(Jim_Interp *interp,
- const Jim_Nvp *nvp_table,
- const char *name,
- Jim_Nvp **result);
-int Jim_Nvp_name2value_nocase(Jim_Interp *interp,
- const Jim_Nvp *nvp_table,
- const char *name,
- Jim_Nvp **result);
-int Jim_Nvp_value2name(Jim_Interp *interp, const Jim_Nvp *nvp_table, int value, Jim_Nvp **result);
-
-int Jim_Nvp_name2value_obj(Jim_Interp *interp,
- const Jim_Nvp *nvp_table,
- Jim_Obj *name_obj,
- Jim_Nvp **result);
-int Jim_Nvp_name2value_obj_nocase(Jim_Interp *interp,
- const Jim_Nvp *nvp_table,
- Jim_Obj *name_obj,
- Jim_Nvp **result);
-int Jim_Nvp_value2name_obj(Jim_Interp *interp,
- const Jim_Nvp *nvp_table,
- Jim_Obj *value_obj,
- Jim_Nvp **result);
-
-/** prints a nice 'unknown' parameter error message to the 'result' */
-void Jim_SetResult_NvpUnknown(Jim_Interp *interp,
- Jim_Obj *param_name,
- Jim_Obj *param_value,
- const Jim_Nvp *nvp_table);
-
-/** Debug: convert argc/argv into a printable string for printf() debug
- *
- * \param interp - the interpeter
- * \param argc - arg count
- * \param argv - the objects
- *
- * \returns string pointer holding the text.
- *
- * Note, next call to this function will free the old (last) string.
- *
- * For example might want do this:
- * \code
- * fp = fopen("some.file.log", "a");
- * fprintf(fp, "PARAMS are: %s\n", Jim_DebugArgvString(interp, argc, argv));
- * fclose(fp);
- * \endcode
- */
-const char *Jim_Debug_ArgvString(Jim_Interp *interp, int argc, Jim_Obj *const *argv);
-
-
-/** A TCL -ish GetOpt like code.
- *
- * Some TCL objects have various "configuration" values.
- * For example - in Tcl/Tk the "buttons" have many options.
- *
- * Usefull when dealing with command options.
- * that may come in any order...
- *
- * Does not support "-foo = 123" type options.
- * Only supports tcl type options, like "-foo 123"
- */
-
-typedef struct jim_getopt {
- Jim_Interp *interp;
- int argc;
- Jim_Obj *const *argv;
- int isconfigure; /* non-zero if configure */
-} Jim_GetOptInfo;
-
-/** GetOpt - how to.
- *
- * Example (short and incomplete):
- * \code
- * Jim_GetOptInfo goi;
- *
- * Jim_GetOpt_Setup(&goi, interp, argc, argv);
- *
- * while (goi.argc) {
- * e = Jim_GetOpt_Nvp(&goi, nvp_options, &n);
- * if (e != JIM_OK) {
- * Jim_GetOpt_NvpUnknown(&goi, nvp_options, 0);
- * return e;
- * }
- *
- * switch (n->value) {
- * case ALIVE:
- * printf("Option ALIVE specified\n");
- * break;
- * case FIRST:
- * if (goi.argc < 1) {
- * .. not enough args error ..
- * }
- * Jim_GetOpt_String(&goi, &cp, NULL);
- * printf("FIRSTNAME: %s\n", cp);
- * case AGE:
- * Jim_GetOpt_Wide(&goi, &w);
- * printf("AGE: %d\n", (int)(w));
- * break;
- * case POLITICS:
- * e = Jim_GetOpt_Nvp(&goi, nvp_politics, &n);
- * if (e != JIM_OK) {
- * Jim_GetOpt_NvpUnknown(&goi, nvp_politics, 1);
- * return e;
- * }
- * }
- * }
- *
- * \endcode
- *
- */
-
-/** Setup GETOPT
- *
- * \param goi - get opt info to be initialized
- * \param interp - jim interp
- * \param argc - argc count.
- * \param argv - argv (will be copied)
- *
- * \code
- * Jim_GetOptInfo goi;
- *
- * Jim_GetOptSetup(&goi, interp, argc, argv);
- * \endcode
- */
-
-int Jim_GetOpt_Setup(Jim_GetOptInfo *goi,
- Jim_Interp *interp,
- int argc,
- Jim_Obj *const *argv);
-
-
-/** Debug - Dump parameters to stderr
- * \param goi - current parameters
- */
-void Jim_GetOpt_Debug(Jim_GetOptInfo *goi);
-
-/** Remove argv[0] from the list.
- *
- * \param goi - get opt info
- * \param puthere - where param is put
- *
- */
-int Jim_GetOpt_Obj(Jim_GetOptInfo *goi, Jim_Obj **puthere);
-
-/** Remove argv[0] as string.
- *
- * \param goi - get opt info
- * \param puthere - where param is put
- * \param len - return its length
- */
-int Jim_GetOpt_String(Jim_GetOptInfo *goi, const char **puthere, int *len);
-
-/** Remove argv[0] as double.
- *
- * \param goi - get opt info
- * \param puthere - where param is put.
- *
- */
-int Jim_GetOpt_Double(Jim_GetOptInfo *goi, double *puthere);
-
-/** Remove argv[0] as wide.
- *
- * \param goi - get opt info
- * \param puthere - where param is put.
- */
-int Jim_GetOpt_Wide(Jim_GetOptInfo *goi, jim_wide *puthere);
-
-/** Remove argv[0] as NVP.
- *
- * \param goi - get opt info
- * \param lookup - nvp lookup table
- * \param puthere - where param is put.
- *
- */
-int Jim_GetOpt_Nvp(Jim_GetOptInfo *goi, const Jim_Nvp *lookup, Jim_Nvp **puthere);
-
-/** Create an appropriate error message for an NVP.
- *
- * \param goi - options info
- * \param lookup - the NVP table that was used.
- * \param hadprefix - 0 or 1 if the option had a prefix.
- *
- * This function will set the "interp->result" to a human readable
- * error message listing the available options.
- *
- * This function assumes the previous option argv[-1] is the unknown string.
- *
- * If this option had some prefix, then pass "hadprefix = 1" else pass "hadprefix = 0"
- *
- * Example:
- * \code
- *
- * while (goi.argc) {
- * // Get the next option
- * e = Jim_GetOpt_Nvp(&goi, cmd_options, &n);
- * if (e != JIM_OK) {
- * // option was not recognized
- * // pass 'hadprefix = 0' because there is no prefix
- * Jim_GetOpt_NvpUnknown(&goi, cmd_options, 0);
- * return e;
- * }
- *
- * switch (n->value) {
- * case OPT_SEX:
- * // handle: --sex male | female | lots | needmore
- * e = Jim_GetOpt_Nvp(&goi, &nvp_sex, &n);
- * if (e != JIM_OK) {
- * Jim_GetOpt_NvpUnknown(&ogi, nvp_sex, 1);
- * return e;
- * }
- * printf("Code: (%d) is %s\n", n->value, n->name);
- * break;
- * case ...:
- * [snip]
- * }
- * }
- * \endcode
- *
- */
-void Jim_GetOpt_NvpUnknown(Jim_GetOptInfo *goi, const Jim_Nvp *lookup, int hadprefix);
-
-
-/** Remove argv[0] as Enum
- *
- * \param goi - get opt info
- * \param lookup - lookup table.
- * \param puthere - where param is put.
- *
- */
-int Jim_GetOpt_Enum(Jim_GetOptInfo *goi, const char *const *lookup, int *puthere);
-
-#endif
[02/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/arm-jtag-ew.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/arm-jtag-ew.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/arm-jtag-ew.c
deleted file mode 100755
index 4c4cc6d..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/arm-jtag-ew.c
+++ /dev/null
@@ -1,795 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Dimitar Dimitrov <di...@gmail.com> *
- * based on Dominic Rath's and Benedikt Sauter's usbprog.c *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/interface.h>
-#include <jtag/commands.h>
-#include <usb.h>
-#include "usb_common.h"
-
-#define USB_VID 0x15ba
-#define USB_PID 0x001e
-
-#define ARMJTAGEW_EPT_BULK_OUT 0x01u
-#define ARMJTAGEW_EPT_BULK_IN 0x82u
-
-#define ARMJTAGEW_USB_TIMEOUT 2000
-
-#define ARMJTAGEW_IN_BUFFER_SIZE (4*1024)
-#define ARMJTAGEW_OUT_BUFFER_SIZE (4*1024)
-
-/* USB command request codes. */
-#define CMD_GET_VERSION 0x00
-#define CMD_SELECT_DPIMPL 0x10
-#define CMD_SET_TCK_FREQUENCY 0x11
-#define CMD_GET_TCK_FREQUENCY 0x12
-#define CMD_MEASURE_MAX_TCK_FREQ 0x15
-#define CMD_MEASURE_RTCK_RESPONSE 0x16
-#define CMD_TAP_SHIFT 0x17
-#define CMD_SET_TAPHW_STATE 0x20
-#define CMD_GET_TAPHW_STATE 0x21
-#define CMD_TGPWR_SETUP 0x22
-
-/* Global USB buffers */
-static uint8_t usb_in_buffer[ARMJTAGEW_IN_BUFFER_SIZE];
-static uint8_t usb_out_buffer[ARMJTAGEW_OUT_BUFFER_SIZE];
-
-/* Queue command functions */
-static void armjtagew_end_state(tap_state_t state);
-static void armjtagew_state_move(void);
-static void armjtagew_path_move(int num_states, tap_state_t *path);
-static void armjtagew_runtest(int num_cycles);
-static void armjtagew_scan(bool ir_scan,
- enum scan_type type,
- uint8_t *buffer,
- int scan_size,
- struct scan_command *command);
-static void armjtagew_reset(int trst, int srst);
-/* static void armjtagew_simple_command(uint8_t command); */
-static int armjtagew_get_status(void);
-
-/* tap buffer functions */
-static void armjtagew_tap_init(void);
-static int armjtagew_tap_execute(void);
-static void armjtagew_tap_ensure_space(int scans, int bits);
-static void armjtagew_tap_append_step(int tms, int tdi);
-static void armjtagew_tap_append_scan(int length, uint8_t *buffer, struct scan_command *command);
-
-/* ARM-JTAG-EW lowlevel functions */
-struct armjtagew {
- struct usb_dev_handle *usb_handle;
-};
-
-static struct armjtagew *armjtagew_usb_open(void);
-static void armjtagew_usb_close(struct armjtagew *armjtagew);
-static int armjtagew_usb_message(struct armjtagew *armjtagew, int out_length, int in_length);
-static int armjtagew_usb_write(struct armjtagew *armjtagew, int out_length);
-static int armjtagew_usb_read(struct armjtagew *armjtagew, int exp_in_length);
-
-/* helper functions */
-static int armjtagew_get_version_info(void);
-
-#ifdef _DEBUG_USB_COMMS_
-static void armjtagew_debug_buffer(uint8_t *buffer, int length);
-#endif
-
-static struct armjtagew *armjtagew_handle;
-
-/**************************************************************************
- * External interface implementation */
-
-static int armjtagew_execute_queue(void)
-{
- struct jtag_command *cmd = jtag_command_queue;
- int scan_size;
- enum scan_type type;
- uint8_t *buffer;
-
- while (cmd != NULL) {
- switch (cmd->type) {
- case JTAG_RUNTEST:
- DEBUG_JTAG_IO("runtest %i cycles, end in %i",
- cmd->cmd.runtest->num_cycles, \
- cmd->cmd.runtest->end_state);
-
- armjtagew_end_state(cmd->cmd.runtest->end_state);
- armjtagew_runtest(cmd->cmd.runtest->num_cycles);
- break;
-
- case JTAG_TLR_RESET:
- DEBUG_JTAG_IO("statemove end in %i", cmd->cmd.statemove->end_state);
-
- armjtagew_end_state(cmd->cmd.statemove->end_state);
- armjtagew_state_move();
- break;
-
- case JTAG_PATHMOVE:
- DEBUG_JTAG_IO("pathmove: %i states, end in %i", \
- cmd->cmd.pathmove->num_states, \
- cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
-
- armjtagew_path_move(cmd->cmd.pathmove->num_states,
- cmd->cmd.pathmove->path);
- break;
-
- case JTAG_SCAN:
- DEBUG_JTAG_IO("scan end in %i", cmd->cmd.scan->end_state);
-
- armjtagew_end_state(cmd->cmd.scan->end_state);
-
- scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
- DEBUG_JTAG_IO("scan input, length = %d", scan_size);
-
-#ifdef _DEBUG_USB_COMMS_
- armjtagew_debug_buffer(buffer, (scan_size + 7) / 8);
-#endif
- type = jtag_scan_type(cmd->cmd.scan);
- armjtagew_scan(cmd->cmd.scan->ir_scan,
- type, buffer,
- scan_size, cmd->cmd.scan);
- break;
-
- case JTAG_RESET:
- DEBUG_JTAG_IO("reset trst: %i srst %i",
- cmd->cmd.reset->trst,
- cmd->cmd.reset->srst);
-
- armjtagew_tap_execute();
-
- if (cmd->cmd.reset->trst == 1)
- tap_set_state(TAP_RESET);
- armjtagew_reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
- break;
-
- case JTAG_SLEEP:
- DEBUG_JTAG_IO("sleep %i", cmd->cmd.sleep->us);
- armjtagew_tap_execute();
- jtag_sleep(cmd->cmd.sleep->us);
- break;
-
- default:
- LOG_ERROR("BUG: unknown JTAG command type encountered");
- exit(-1);
- }
- cmd = cmd->next;
- }
-
- return armjtagew_tap_execute();
-}
-
-/* Sets speed in kHz. */
-static int armjtagew_speed(int speed)
-{
- int result;
- int speed_real;
-
-
- usb_out_buffer[0] = CMD_SET_TCK_FREQUENCY;
- buf_set_u32(usb_out_buffer + 1, 0, 32, speed*1000);
-
- result = armjtagew_usb_message(armjtagew_handle, 5, 4);
-
- if (result < 0) {
- LOG_ERROR("ARM-JTAG-EW setting speed failed (%d)", result);
- return ERROR_JTAG_DEVICE_ERROR;
- }
-
- usb_out_buffer[0] = CMD_GET_TCK_FREQUENCY;
- result = armjtagew_usb_message(armjtagew_handle, 1, 4);
- speed_real = (int)buf_get_u32(usb_in_buffer, 0, 32) / 1000;
- if (result < 0) {
- LOG_ERROR("ARM-JTAG-EW getting speed failed (%d)", result);
- return ERROR_JTAG_DEVICE_ERROR;
- } else
- LOG_INFO("Requested speed %dkHz, emulator reported %dkHz.", speed, speed_real);
-
- return ERROR_OK;
-}
-
-static int armjtagew_khz(int khz, int *jtag_speed)
-{
- *jtag_speed = khz;
-
- return ERROR_OK;
-}
-
-static int armjtagew_speed_div(int speed, int *khz)
-{
- *khz = speed;
-
- return ERROR_OK;
-}
-
-static int armjtagew_init(void)
-{
- int check_cnt;
-
- armjtagew_handle = armjtagew_usb_open();
-
- if (armjtagew_handle == 0) {
- LOG_ERROR(
- "Cannot find ARM-JTAG-EW Interface! Please check connection and permissions.");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- check_cnt = 0;
- while (check_cnt < 3) {
- if (armjtagew_get_version_info() == ERROR_OK) {
- /* attempt to get status */
- armjtagew_get_status();
- break;
- }
-
- check_cnt++;
- }
-
- if (check_cnt == 3)
- LOG_INFO("ARM-JTAG-EW initial read failed, don't worry");
-
- /* Initial JTAG speed (for reset and initialization): 32 kHz */
- armjtagew_speed(32);
-
- LOG_INFO("ARM-JTAG-EW JTAG Interface ready");
-
- armjtagew_reset(0, 0);
- armjtagew_tap_init();
-
- return ERROR_OK;
-}
-
-static int armjtagew_quit(void)
-{
- armjtagew_usb_close(armjtagew_handle);
- return ERROR_OK;
-}
-
-/**************************************************************************
- * Queue command implementations */
-
-static void armjtagew_end_state(tap_state_t state)
-{
- if (tap_is_state_stable(state))
- tap_set_end_state(state);
- else {
- LOG_ERROR("BUG: %i is not a valid end state", state);
- exit(-1);
- }
-}
-
-/* Goes to the end state. */
-static void armjtagew_state_move(void)
-{
- int i;
- int tms = 0;
- uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
- int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
-
- for (i = 0; i < tms_count; i++) {
- tms = (tms_scan >> i) & 1;
- armjtagew_tap_append_step(tms, 0);
- }
-
- tap_set_state(tap_get_end_state());
-}
-
-static void armjtagew_path_move(int num_states, tap_state_t *path)
-{
- int i;
-
- for (i = 0; i < num_states; i++) {
- /*
- * TODO: The ARM-JTAG-EW hardware delays TDI with 3 TCK cycles when in RTCK mode.
- * Either handle that here, or update the documentation with examples
- * how to fix that in the configuration files.
- */
- if (path[i] == tap_state_transition(tap_get_state(), false))
- armjtagew_tap_append_step(0, 0);
- else if (path[i] == tap_state_transition(tap_get_state(), true))
- armjtagew_tap_append_step(1, 0);
- else {
- LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
- tap_state_name(tap_get_state()), tap_state_name(path[i]));
- exit(-1);
- }
-
- tap_set_state(path[i]);
- }
-
- tap_set_end_state(tap_get_state());
-}
-
-static void armjtagew_runtest(int num_cycles)
-{
- int i;
-
- tap_state_t saved_end_state = tap_get_end_state();
-
- /* only do a state_move when we're not already in IDLE */
- if (tap_get_state() != TAP_IDLE) {
- armjtagew_end_state(TAP_IDLE);
- armjtagew_state_move();
- }
-
- /* execute num_cycles */
- for (i = 0; i < num_cycles; i++)
- armjtagew_tap_append_step(0, 0);
-
- /* finish in end_state */
- armjtagew_end_state(saved_end_state);
- if (tap_get_state() != tap_get_end_state())
- armjtagew_state_move();
-}
-
-static void armjtagew_scan(bool ir_scan,
- enum scan_type type,
- uint8_t *buffer,
- int scan_size,
- struct scan_command *command)
-{
- tap_state_t saved_end_state;
-
- armjtagew_tap_ensure_space(1, scan_size + 8);
-
- saved_end_state = tap_get_end_state();
-
- /* Move to appropriate scan state */
- armjtagew_end_state(ir_scan ? TAP_IRSHIFT : TAP_DRSHIFT);
-
- /* Only move if we're not already there */
- if (tap_get_state() != tap_get_end_state())
- armjtagew_state_move();
-
- armjtagew_end_state(saved_end_state);
-
- /* Scan */
- armjtagew_tap_append_scan(scan_size, buffer, command);
-
- /* We are in Exit1, go to Pause */
- armjtagew_tap_append_step(0, 0);
-
- tap_set_state(ir_scan ? TAP_IRPAUSE : TAP_DRPAUSE);
-
- if (tap_get_state() != tap_get_end_state())
- armjtagew_state_move();
-}
-
-static void armjtagew_reset(int trst, int srst)
-{
- const uint8_t trst_mask = (1u << 5);
- const uint8_t srst_mask = (1u << 6);
- uint8_t val = 0;
- uint8_t outp_en = 0;
- uint8_t change_mask = 0;
- int result;
-
- LOG_DEBUG("trst: %i, srst: %i", trst, srst);
-
- if (srst == 0) {
- val |= srst_mask;
- outp_en &= ~srst_mask; /* tristate */
- change_mask |= srst_mask;
- } else if (srst == 1) {
- val &= ~srst_mask;
- outp_en |= srst_mask;
- change_mask |= srst_mask;
- }
-
- if (trst == 0) {
- val |= trst_mask;
- outp_en &= ~trst_mask; /* tristate */
- change_mask |= trst_mask;
- } else if (trst == 1) {
- val &= ~trst_mask;
- outp_en |= trst_mask;
- change_mask |= trst_mask;
- }
-
- usb_out_buffer[0] = CMD_SET_TAPHW_STATE;
- usb_out_buffer[1] = val;
- usb_out_buffer[2] = outp_en;
- usb_out_buffer[3] = change_mask;
- result = armjtagew_usb_write(armjtagew_handle, 4);
- if (result != 4)
- LOG_ERROR("ARM-JTAG-EW TRST/SRST pin set failed failed (%d)", result);
-}
-
-static int armjtagew_get_status(void)
-{
- int result;
-
- usb_out_buffer[0] = CMD_GET_TAPHW_STATE;
- result = armjtagew_usb_message(armjtagew_handle, 1, 12);
-
- if (result == 0) {
- unsigned int u_tg = buf_get_u32(usb_in_buffer, 0, 16);
- LOG_INFO(
- "U_tg = %d mV, U_aux = %d mV, U_tgpwr = %d mV, I_tgpwr = %d mA, D1 = %d, Target power %s %s",
- (int)(buf_get_u32(usb_in_buffer + 0, 0, 16)),
- (int)(buf_get_u32(usb_in_buffer + 2, 0, 16)),
- (int)(buf_get_u32(usb_in_buffer + 4, 0, 16)),
- (int)(buf_get_u32(usb_in_buffer + 6, 0, 16)),
- usb_in_buffer[9],
- usb_in_buffer[11] ? "OVERCURRENT" : "OK",
- usb_in_buffer[10] ? "enabled" : "disabled");
-
- if (u_tg < 1500)
- LOG_ERROR("Vref too low. Check Target Power");
- } else
- LOG_ERROR("ARM-JTAG-EW command CMD_GET_TAPHW_STATE failed (%d)", result);
-
- return ERROR_OK;
-}
-
-static int armjtagew_get_version_info(void)
-{
- int result;
- char sn[16];
- char auxinfo[257];
-
- /* query hardware version */
- usb_out_buffer[0] = CMD_GET_VERSION;
- result = armjtagew_usb_message(armjtagew_handle, 1, 4 + 15 + 256);
-
- if (result != 0) {
- LOG_ERROR("ARM-JTAG-EW command CMD_GET_VERSION failed (%d)", result);
- return ERROR_JTAG_DEVICE_ERROR;
- }
-
- memcpy(sn, usb_in_buffer + 4, 15);
- sn[15] = '\0';
- memcpy(auxinfo, usb_in_buffer + 4+15, 256);
- auxinfo[256] = '\0';
-
- LOG_INFO(
- "ARM-JTAG-EW firmware version %d.%d, hardware revision %c, SN=%s, Additional info: %s", \
- usb_in_buffer[1],
- usb_in_buffer[0], \
- isgraph(usb_in_buffer[2]) ? usb_in_buffer[2] : 'X', \
- sn,
- auxinfo);
-
- if (1 != usb_in_buffer[1] || 6 != usb_in_buffer[0])
- LOG_WARNING(
- "ARM-JTAG-EW firmware version %d.%d is untested with this version of OpenOCD. You might experience unexpected behavior.",
- usb_in_buffer[1],
- usb_in_buffer[0]);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(armjtagew_handle_armjtagew_info_command)
-{
- if (armjtagew_get_version_info() == ERROR_OK) {
- /* attempt to get status */
- armjtagew_get_status();
- }
-
- return ERROR_OK;
-}
-
-static const struct command_registration armjtagew_command_handlers[] = {
- {
- .name = "armjtagew_info",
- .handler = &armjtagew_handle_armjtagew_info_command,
- .mode = COMMAND_EXEC,
- .help = "query armjtagew info",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct jtag_interface armjtagew_interface = {
- .name = "arm-jtag-ew",
- .commands = armjtagew_command_handlers,
- .transports = jtag_only,
- .execute_queue = armjtagew_execute_queue,
- .speed = armjtagew_speed,
- .speed_div = armjtagew_speed_div,
- .khz = armjtagew_khz,
- .init = armjtagew_init,
- .quit = armjtagew_quit,
-};
-
-/**************************************************************************
- * ARM-JTAG-EW tap functions */
-
-/* 2048 is the max value we can use here */
-#define ARMJTAGEW_TAP_BUFFER_SIZE 2048
-
-static int tap_length;
-static uint8_t tms_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
-static uint8_t tdi_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
-static uint8_t tdo_buffer[ARMJTAGEW_TAP_BUFFER_SIZE];
-
-struct pending_scan_result {
- int first; /* First bit position in tdo_buffer to read */
- int length; /* Number of bits to read */
- struct scan_command *command; /* Corresponding scan command */
- uint8_t *buffer;
-};
-
-#define MAX_PENDING_SCAN_RESULTS 256
-
-static int pending_scan_results_length;
-static struct pending_scan_result pending_scan_results_buffer[MAX_PENDING_SCAN_RESULTS];
-
-static int last_tms;
-
-static void armjtagew_tap_init(void)
-{
- tap_length = 0;
- pending_scan_results_length = 0;
-}
-
-static void armjtagew_tap_ensure_space(int scans, int bits)
-{
- int available_scans = MAX_PENDING_SCAN_RESULTS - pending_scan_results_length;
- int available_bits = ARMJTAGEW_TAP_BUFFER_SIZE * 8 - tap_length;
-
- if (scans > available_scans || bits > available_bits)
- armjtagew_tap_execute();
-}
-
-static void armjtagew_tap_append_step(int tms, int tdi)
-{
- last_tms = tms;
- int index_local = tap_length / 8;
-
- if (index_local < ARMJTAGEW_TAP_BUFFER_SIZE) {
- int bit_index = tap_length % 8;
- uint8_t bit = 1 << bit_index;
-
- if (tms)
- tms_buffer[index_local] |= bit;
- else
- tms_buffer[index_local] &= ~bit;
-
- if (tdi)
- tdi_buffer[index_local] |= bit;
- else
- tdi_buffer[index_local] &= ~bit;
-
- tap_length++;
- } else
- LOG_ERROR("armjtagew_tap_append_step, overflow");
-}
-
-void armjtagew_tap_append_scan(int length, uint8_t *buffer, struct scan_command *command)
-{
- struct pending_scan_result *pending_scan_result =
- &pending_scan_results_buffer[pending_scan_results_length];
- int i;
-
- pending_scan_result->first = tap_length;
- pending_scan_result->length = length;
- pending_scan_result->command = command;
- pending_scan_result->buffer = buffer;
-
- for (i = 0; i < length; i++)
- armjtagew_tap_append_step((i < length-1 ? 0 : 1), (buffer[i/8] >> (i%8)) & 1);
- pending_scan_results_length++;
-}
-
-/* Pad and send a tap sequence to the device, and receive the answer.
- * For the purpose of padding we assume that we are in idle or pause state. */
-static int armjtagew_tap_execute(void)
-{
- int byte_length;
- int tms_offset;
- int tdi_offset;
- int i;
- int result;
-
- if (tap_length > 0) {
- /* Pad last byte so that tap_length is divisible by 8 */
- while (tap_length % 8 != 0) {
- /* More of the last TMS value keeps us in the same state,
- * analogous to free-running JTAG interfaces. */
- armjtagew_tap_append_step(last_tms, 0);
- }
-
- byte_length = tap_length / 8;
-
- usb_out_buffer[0] = CMD_TAP_SHIFT;
- buf_set_u32(usb_out_buffer + 1, 0, 16, byte_length);
-
- tms_offset = 3;
- for (i = 0; i < byte_length; i++)
- usb_out_buffer[tms_offset + i] = flip_u32(tms_buffer[i], 8);
-
- tdi_offset = tms_offset + byte_length;
- for (i = 0; i < byte_length; i++)
- usb_out_buffer[tdi_offset + i] = flip_u32(tdi_buffer[i], 8);
-
- result = armjtagew_usb_message(armjtagew_handle,
- 3 + 2 * byte_length,
- byte_length + 4);
-
- if (result == 0) {
- int stat_local;
-
- stat_local = (int)buf_get_u32(usb_in_buffer + byte_length, 0, 32);
- if (stat_local) {
- LOG_ERROR(
- "armjtagew_tap_execute, emulator returned error code %d for a CMD_TAP_SHIFT command",
- stat_local);
- return ERROR_JTAG_QUEUE_FAILED;
- }
-
- for (i = 0; i < byte_length; i++)
- tdo_buffer[i] = flip_u32(usb_in_buffer[i], 8);
-
- for (i = 0; i < pending_scan_results_length; i++) {
- struct pending_scan_result *pending_scan_result =
- &pending_scan_results_buffer[i];
- uint8_t *buffer = pending_scan_result->buffer;
- int length = pending_scan_result->length;
- int first = pending_scan_result->first;
- struct scan_command *command = pending_scan_result->command;
-
- /* Copy to buffer */
- buf_set_buf(tdo_buffer, first, buffer, 0, length);
-
- DEBUG_JTAG_IO("pending scan result, length = %d", length);
-
-#ifdef _DEBUG_USB_COMMS_
- armjtagew_debug_buffer(buffer, byte_length);
-#endif
-
- if (jtag_read_buffer(buffer, command) != ERROR_OK) {
- armjtagew_tap_init();
- return ERROR_JTAG_QUEUE_FAILED;
- }
-
- if (pending_scan_result->buffer != NULL)
- free(pending_scan_result->buffer);
- }
- } else {
- LOG_ERROR("armjtagew_tap_execute, wrong result %d, expected %d",
- result,
- byte_length);
- return ERROR_JTAG_QUEUE_FAILED;
- }
-
- armjtagew_tap_init();
- }
-
- return ERROR_OK;
-}
-
-/****************************************************************************
- * JLink USB low-level functions */
-
-static struct armjtagew *armjtagew_usb_open()
-{
- usb_init();
-
- const uint16_t vids[] = { USB_VID, 0 };
- const uint16_t pids[] = { USB_PID, 0 };
- struct usb_dev_handle *dev;
- if (jtag_usb_open(vids, pids, &dev) != ERROR_OK)
- return NULL;
-
- struct armjtagew *result = malloc(sizeof(struct armjtagew));
- result->usb_handle = dev;
-
-#if 0
- /* usb_set_configuration required under win32 */
- usb_set_configuration(dev, dev->config[0].bConfigurationValue);
-#endif
- usb_claim_interface(dev, 0);
-#if 0
- /*
- * This makes problems under Mac OS X. And is not needed
- * under Windows. Hopefully this will not break a linux build
- */
- usb_set_altinterface(dev, 0);
-#endif
- return result;
-}
-
-static void armjtagew_usb_close(struct armjtagew *armjtagew)
-{
- usb_close(armjtagew->usb_handle);
- free(armjtagew);
-}
-
-/* Send a message and receive the reply. */
-static int armjtagew_usb_message(struct armjtagew *armjtagew, int out_length, int in_length)
-{
- int result;
-
- result = armjtagew_usb_write(armjtagew, out_length);
- if (result == out_length) {
- result = armjtagew_usb_read(armjtagew, in_length);
- if (result != in_length) {
- LOG_ERROR("usb_bulk_read failed (requested=%d, result=%d)",
- in_length,
- result);
- return -1;
- }
- } else {
- LOG_ERROR("usb_bulk_write failed (requested=%d, result=%d)", out_length, result);
- return -1;
- }
- return 0;
-}
-
-/* Write data from out_buffer to USB. */
-static int armjtagew_usb_write(struct armjtagew *armjtagew, int out_length)
-{
- int result;
-
- if (out_length > ARMJTAGEW_OUT_BUFFER_SIZE) {
- LOG_ERROR("armjtagew_write illegal out_length=%d (max=%d)",
- out_length,
- ARMJTAGEW_OUT_BUFFER_SIZE);
- return -1;
- }
-
- result = usb_bulk_write(armjtagew->usb_handle, ARMJTAGEW_EPT_BULK_OUT, \
- (char *)usb_out_buffer, out_length, ARMJTAGEW_USB_TIMEOUT);
-
- DEBUG_JTAG_IO("armjtagew_usb_write, out_length = %d, result = %d", out_length, result);
-
-#ifdef _DEBUG_USB_COMMS_
- armjtagew_debug_buffer(usb_out_buffer, out_length);
-#endif
- return result;
-}
-
-/* Read data from USB into in_buffer. */
-static int armjtagew_usb_read(struct armjtagew *armjtagew, int exp_in_length)
-{
- int result = usb_bulk_read(armjtagew->usb_handle, ARMJTAGEW_EPT_BULK_IN, \
- (char *)usb_in_buffer, exp_in_length, ARMJTAGEW_USB_TIMEOUT);
-
- DEBUG_JTAG_IO("armjtagew_usb_read, result = %d", result);
-
-#ifdef _DEBUG_USB_COMMS_
- armjtagew_debug_buffer(usb_in_buffer, result);
-#endif
- return result;
-}
-
-#ifdef _DEBUG_USB_COMMS_
-#define BYTES_PER_LINE 16
-
-static void armjtagew_debug_buffer(uint8_t *buffer, int length)
-{
- char line[81];
- char s[4];
- int i;
- int j;
-
- for (i = 0; i < length; i += BYTES_PER_LINE) {
- snprintf(line, 5, "%04x", i);
- for (j = i; j < i + BYTES_PER_LINE && j < length; j++) {
- snprintf(s, 4, " %02x", buffer[j]);
- strcat(line, s);
- }
- LOG_DEBUG("%s", line);
-
- /* Prevent GDB timeout (writing to log might take some time) */
- keep_alive();
- }
-}
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/at91rm9200.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/at91rm9200.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/at91rm9200.c
deleted file mode 100755
index d7e11df..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/at91rm9200.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Anders Larsen *
- * al@alarsen.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/interface.h>
-#include "bitbang.h"
-
-#include <sys/mman.h>
-
-/* AT91RM9200 */
-#define AT91C_BASE_SYS (0xfffff000)
-
-/* GPIO assignment */
-#define PIOA (0 << 7)
-#define PIOB (1 << 7)
-#define PIOC (2 << 7)
-#define PIOD (3 << 7)
-
-#define PIO_PER (0) /* PIO enable */
-#define PIO_OER (4) /* output enable */
-#define PIO_ODR (5) /* output disable */
-#define PIO_SODR (12) /* set output data */
-#define PIO_CODR (13) /* clear output data */
-#define PIO_PDSR (15) /* pin data status */
-#define PIO_PPUER (25) /* pull-up enable */
-
-#define NC (0) /* not connected */
-#define P0 (1 << 0)
-#define P1 (1 << 1)
-#define P2 (1 << 2)
-#define P3 (1 << 3)
-#define P4 (1 << 4)
-#define P5 (1 << 5)
-#define P6 (1 << 6)
-#define P7 (1 << 7)
-#define P8 (1 << 8)
-#define P9 (1 << 9)
-#define P10 (1 << 10)
-#define P11 (1 << 11)
-#define P12 (1 << 12)
-#define P13 (1 << 13)
-#define P14 (1 << 14)
-#define P15 (1 << 15)
-#define P16 (1 << 16)
-#define P17 (1 << 17)
-#define P18 (1 << 18)
-#define P19 (1 << 19)
-#define P20 (1 << 20)
-#define P21 (1 << 21)
-#define P22 (1 << 22)
-#define P23 (1 << 23)
-#define P24 (1 << 24)
-#define P25 (1 << 25)
-#define P26 (1 << 26)
-#define P27 (1 << 27)
-#define P28 (1 << 28)
-#define P29 (1 << 29)
-#define P30 (1 << 30)
-#define P31 (1 << 31)
-
-struct device_t {
- const char *name;
- int TDO_PIO; /* PIO holding TDO */
- uint32_t TDO_MASK; /* TDO bitmask */
- int TRST_PIO; /* PIO holding TRST */
- uint32_t TRST_MASK; /* TRST bitmask */
- int TMS_PIO; /* PIO holding TMS */
- uint32_t TMS_MASK; /* TMS bitmask */
- int TCK_PIO; /* PIO holding TCK */
- uint32_t TCK_MASK; /* TCK bitmask */
- int TDI_PIO; /* PIO holding TDI */
- uint32_t TDI_MASK; /* TDI bitmask */
- int SRST_PIO; /* PIO holding SRST */
- uint32_t SRST_MASK; /* SRST bitmask */
-};
-
-static const struct device_t devices[] = {
- { "rea_ecr", PIOD, P27, PIOA, NC, PIOD, P23, PIOD, P24, PIOD, P26, PIOC, P5 },
- { .name = NULL },
-};
-
-/* configuration */
-static char *at91rm9200_device;
-
-/* interface variables
- */
-static const struct device_t *device;
-static int dev_mem_fd;
-static void *sys_controller;
-static uint32_t *pio_base;
-
-/* low level command set
- */
-static int at91rm9200_read(void);
-static void at91rm9200_write(int tck, int tms, int tdi);
-static void at91rm9200_reset(int trst, int srst);
-
-static int at91rm9200_init(void);
-static int at91rm9200_quit(void);
-
-static struct bitbang_interface at91rm9200_bitbang = {
- .read = at91rm9200_read,
- .write = at91rm9200_write,
- .reset = at91rm9200_reset,
- .blink = 0
-};
-
-static int at91rm9200_read(void)
-{
- return (pio_base[device->TDO_PIO + PIO_PDSR] & device->TDO_MASK) != 0;
-}
-
-static void at91rm9200_write(int tck, int tms, int tdi)
-{
- if (tck)
- pio_base[device->TCK_PIO + PIO_SODR] = device->TCK_MASK;
- else
- pio_base[device->TCK_PIO + PIO_CODR] = device->TCK_MASK;
-
- if (tms)
- pio_base[device->TMS_PIO + PIO_SODR] = device->TMS_MASK;
- else
- pio_base[device->TMS_PIO + PIO_CODR] = device->TMS_MASK;
-
- if (tdi)
- pio_base[device->TDI_PIO + PIO_SODR] = device->TDI_MASK;
- else
- pio_base[device->TDI_PIO + PIO_CODR] = device->TDI_MASK;
-}
-
-/* (1) assert or (0) deassert reset lines */
-static void at91rm9200_reset(int trst, int srst)
-{
- if (trst == 0)
- pio_base[device->TRST_PIO + PIO_SODR] = device->TRST_MASK;
- else if (trst == 1)
- pio_base[device->TRST_PIO + PIO_CODR] = device->TRST_MASK;
-
- if (srst == 0)
- pio_base[device->SRST_PIO + PIO_SODR] = device->SRST_MASK;
- else if (srst == 1)
- pio_base[device->SRST_PIO + PIO_CODR] = device->SRST_MASK;
-}
-
-COMMAND_HANDLER(at91rm9200_handle_device_command)
-{
- if (CMD_ARGC == 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* only if the device name wasn't overwritten by cmdline */
- if (at91rm9200_device == 0) {
- at91rm9200_device = malloc(strlen(CMD_ARGV[0]) + sizeof(char));
- strcpy(at91rm9200_device, CMD_ARGV[0]);
- }
-
- return ERROR_OK;
-}
-
-static const struct command_registration at91rm9200_command_handlers[] = {
- {
- .name = "at91rm9200_device",
- .handler = &at91rm9200_handle_device_command,
- .mode = COMMAND_CONFIG,
- .help = "query armjtagew info",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct jtag_interface at91rm9200_interface = {
- .name = "at91rm9200",
- .execute_queue = bitbang_execute_queue,
- .commands = at91rm9200_command_handlers,
- .init = at91rm9200_init,
- .quit = at91rm9200_quit,
-};
-
-static int at91rm9200_init(void)
-{
- const struct device_t *cur_device;
-
- cur_device = devices;
-
- if (at91rm9200_device == NULL || at91rm9200_device[0] == 0) {
- at91rm9200_device = "rea_ecr";
- LOG_WARNING("No at91rm9200 device specified, using default 'rea_ecr'");
- }
-
- while (cur_device->name) {
- if (strcmp(cur_device->name, at91rm9200_device) == 0) {
- device = cur_device;
- break;
- }
- cur_device++;
- }
-
- if (!device) {
- LOG_ERROR("No matching device found for %s", at91rm9200_device);
- return ERROR_JTAG_INIT_FAILED;
- }
-
- bitbang_interface = &at91rm9200_bitbang;
-
- dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
- if (dev_mem_fd < 0) {
- perror("open");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- sys_controller = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
- MAP_SHARED, dev_mem_fd, AT91C_BASE_SYS);
- if (sys_controller == MAP_FAILED) {
- perror("mmap");
- close(dev_mem_fd);
- return ERROR_JTAG_INIT_FAILED;
- }
- pio_base = (uint32_t *)sys_controller + 0x100;
-
- /*
- * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
- * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
- */
- pio_base[device->TDI_PIO + PIO_CODR] = device->TDI_MASK;
- pio_base[device->TDI_PIO + PIO_OER] = device->TDI_MASK;
- pio_base[device->TDI_PIO + PIO_PER] = device->TDI_MASK;
- pio_base[device->TCK_PIO + PIO_CODR] = device->TCK_MASK;
- pio_base[device->TCK_PIO + PIO_OER] = device->TCK_MASK;
- pio_base[device->TCK_PIO + PIO_PER] = device->TCK_MASK;
- pio_base[device->TMS_PIO + PIO_SODR] = device->TMS_MASK;
- pio_base[device->TMS_PIO + PIO_OER] = device->TMS_MASK;
- pio_base[device->TMS_PIO + PIO_PER] = device->TMS_MASK;
- pio_base[device->TRST_PIO + PIO_SODR] = device->TRST_MASK;
- pio_base[device->TRST_PIO + PIO_OER] = device->TRST_MASK;
- pio_base[device->TRST_PIO + PIO_PER] = device->TRST_MASK;
- pio_base[device->SRST_PIO + PIO_SODR] = device->SRST_MASK;
- pio_base[device->SRST_PIO + PIO_OER] = device->SRST_MASK;
- pio_base[device->SRST_PIO + PIO_PER] = device->SRST_MASK;
- pio_base[device->TDO_PIO + PIO_ODR] = device->TDO_MASK;
- pio_base[device->TDO_PIO + PIO_PPUER] = device->TDO_MASK;
- pio_base[device->TDO_PIO + PIO_PER] = device->TDO_MASK;
-
- return ERROR_OK;
-}
-
-static int at91rm9200_quit(void)
-{
-
- return ERROR_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bcm2835gpio.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bcm2835gpio.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bcm2835gpio.c
deleted file mode 100755
index e1cc56c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bcm2835gpio.c
+++ /dev/null
@@ -1,533 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Paul Fertser, fercerpav@gmail.com *
- * *
- * Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
- * Based on at91rm9200.c (c) Anders Larsen *
- * and RPi GPIO examples by Gert van Loo & Dom *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/interface.h>
-#include "bitbang.h"
-
-#include <sys/mman.h>
-
-uint32_t bcm2835_peri_base = 0x20000000;
-#define BCM2835_GPIO_BASE (bcm2835_peri_base + 0x200000) /* GPIO controller */
-
-#define BCM2835_PADS_GPIO_0_27 (bcm2835_peri_base + 0x100000)
-#define BCM2835_PADS_GPIO_0_27_OFFSET (0x2c / 4)
-
-/* GPIO setup macros */
-#define MODE_GPIO(g) (*(pio_base+((g)/10))>>(((g)%10)*3) & 7)
-#define INP_GPIO(g) do { *(pio_base+((g)/10)) &= ~(7<<(((g)%10)*3)); } while (0)
-#define SET_MODE_GPIO(g, m) do { /* clear the mode bits first, then set as necessary */ \
- INP_GPIO(g); \
- *(pio_base+((g)/10)) |= ((m)<<(((g)%10)*3)); } while (0)
-#define OUT_GPIO(g) SET_MODE_GPIO(g, 1)
-
-#define GPIO_SET (*(pio_base+7)) /* sets bits which are 1, ignores bits which are 0 */
-#define GPIO_CLR (*(pio_base+10)) /* clears bits which are 1, ignores bits which are 0 */
-#define GPIO_LEV (*(pio_base+13)) /* current level of the pin */
-
-static int dev_mem_fd;
-static volatile uint32_t *pio_base;
-
-static int bcm2835gpio_read(void);
-static void bcm2835gpio_write(int tck, int tms, int tdi);
-static void bcm2835gpio_reset(int trst, int srst);
-
-static int bcm2835_swdio_read(void);
-static void bcm2835_swdio_drive(bool is_output);
-
-static int bcm2835gpio_init(void);
-static int bcm2835gpio_quit(void);
-
-static struct bitbang_interface bcm2835gpio_bitbang = {
- .read = bcm2835gpio_read,
- .write = bcm2835gpio_write,
- .reset = bcm2835gpio_reset,
- .swdio_read = bcm2835_swdio_read,
- .swdio_drive = bcm2835_swdio_drive,
- .blink = NULL
-};
-
-/* GPIO numbers for each signal. Negative values are invalid */
-static int tck_gpio = -1;
-static int tck_gpio_mode;
-static int tms_gpio = -1;
-static int tms_gpio_mode;
-static int tdi_gpio = -1;
-static int tdi_gpio_mode;
-static int tdo_gpio = -1;
-static int tdo_gpio_mode;
-static int trst_gpio = -1;
-static int trst_gpio_mode;
-static int srst_gpio = -1;
-static int srst_gpio_mode;
-static int swclk_gpio = -1;
-static int swclk_gpio_mode;
-static int swdio_gpio = -1;
-static int swdio_gpio_mode;
-
-/* Transition delay coefficients */
-static int speed_coeff = 113714;
-static int speed_offset = 28;
-static unsigned int jtag_delay;
-
-static int bcm2835gpio_read(void)
-{
- return !!(GPIO_LEV & 1<<tdo_gpio);
-}
-
-static void bcm2835gpio_write(int tck, int tms, int tdi)
-{
- uint32_t set = tck<<tck_gpio | tms<<tms_gpio | tdi<<tdi_gpio;
- uint32_t clear = !tck<<tck_gpio | !tms<<tms_gpio | !tdi<<tdi_gpio;
-
- GPIO_SET = set;
- GPIO_CLR = clear;
-
- for (unsigned int i = 0; i < jtag_delay; i++)
- asm volatile ("");
-}
-
-static void bcm2835gpio_swd_write(int tck, int tms, int tdi)
-{
- uint32_t set = tck<<swclk_gpio | tdi<<swdio_gpio;
- uint32_t clear = !tck<<swclk_gpio | !tdi<<swdio_gpio;
-
- GPIO_SET = set;
- GPIO_CLR = clear;
-
- for (unsigned int i = 0; i < jtag_delay; i++)
- asm volatile ("");
-}
-
-/* (1) assert or (0) deassert reset lines */
-static void bcm2835gpio_reset(int trst, int srst)
-{
- uint32_t set = 0;
- uint32_t clear = 0;
-
- if (trst_gpio > 0) {
- set |= !trst<<trst_gpio;
- clear |= trst<<trst_gpio;
- }
-
- if (srst_gpio > 0) {
- set |= !srst<<srst_gpio;
- clear |= srst<<srst_gpio;
- }
-
- GPIO_SET = set;
- GPIO_CLR = clear;
-}
-
-static void bcm2835_swdio_drive(bool is_output)
-{
- if (is_output)
- OUT_GPIO(swdio_gpio);
- else
- INP_GPIO(swdio_gpio);
-}
-
-static int bcm2835_swdio_read(void)
-{
- return !!(GPIO_LEV & 1 << swdio_gpio);
-}
-
-static int bcm2835gpio_khz(int khz, int *jtag_speed)
-{
- if (!khz) {
- LOG_DEBUG("RCLK not supported");
- return ERROR_FAIL;
- }
- *jtag_speed = speed_coeff/khz - speed_offset;
- if (*jtag_speed < 0)
- *jtag_speed = 0;
- return ERROR_OK;
-}
-
-static int bcm2835gpio_speed_div(int speed, int *khz)
-{
- *khz = speed_coeff/(speed + speed_offset);
- return ERROR_OK;
-}
-
-static int bcm2835gpio_speed(int speed)
-{
- jtag_delay = speed;
- return ERROR_OK;
-}
-
-static int is_gpio_valid(int gpio)
-{
- return gpio >= 0 && gpio <= 53;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionums)
-{
- if (CMD_ARGC == 4) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], tms_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], tdi_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], tdo_gpio);
- } else if (CMD_ARGC != 0) {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD_CTX,
- "BCM2835 GPIO config: tck = %d, tms = %d, tdi = %d, tdo = %d",
- tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tck)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tck_gpio);
-
- command_print(CMD_CTX, "BCM2835 GPIO config: tck = %d", tck_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tms)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tms_gpio);
-
- command_print(CMD_CTX, "BCM2835 GPIO config: tms = %d", tms_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tdo)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdo_gpio);
-
- command_print(CMD_CTX, "BCM2835 GPIO config: tdo = %d", tdo_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_tdi)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], tdi_gpio);
-
- command_print(CMD_CTX, "BCM2835 GPIO config: tdi = %d", tdi_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_srst)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], srst_gpio);
-
- command_print(CMD_CTX, "BCM2835 GPIO config: srst = %d", srst_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_jtag_gpionum_trst)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], trst_gpio);
-
- command_print(CMD_CTX, "BCM2835 GPIO config: trst = %d", trst_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionums)
-{
- if (CMD_ARGC == 2) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], swdio_gpio);
- } else if (CMD_ARGC != 0) {
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD_CTX,
- "BCM2835 GPIO nums: swclk = %d, swdio = %d",
- swclk_gpio, swdio_gpio);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swclk)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swclk_gpio);
-
- command_print(CMD_CTX, "BCM2835 num: swclk = %d", swclk_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_swd_gpionum_swdio)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], swdio_gpio);
-
- command_print(CMD_CTX, "BCM2835 num: swdio = %d", swdio_gpio);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_speed_coeffs)
-{
- if (CMD_ARGC == 2) {
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], speed_coeff);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], speed_offset);
- }
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(bcm2835gpio_handle_peripheral_base)
-{
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], bcm2835_peri_base);
- return ERROR_OK;
-}
-
-static const struct command_registration bcm2835gpio_command_handlers[] = {
- {
- .name = "bcm2835gpio_jtag_nums",
- .handler = &bcm2835gpio_handle_jtag_gpionums,
- .mode = COMMAND_CONFIG,
- .help = "gpio numbers for tck, tms, tdi, tdo. (in that order)",
- .usage = "(tck tms tdi tdo)* ",
- },
- {
- .name = "bcm2835gpio_tck_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_tck,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tck.",
- },
- {
- .name = "bcm2835gpio_tms_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_tms,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tms.",
- },
- {
- .name = "bcm2835gpio_tdo_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_tdo,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tdo.",
- },
- {
- .name = "bcm2835gpio_tdi_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_tdi,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for tdi.",
- },
- {
- .name = "bcm2835gpio_swd_nums",
- .handler = &bcm2835gpio_handle_swd_gpionums,
- .mode = COMMAND_CONFIG,
- .help = "gpio numbers for swclk, swdio. (in that order)",
- .usage = "(swclk swdio)* ",
- },
- {
- .name = "bcm2835gpio_swclk_num",
- .handler = &bcm2835gpio_handle_swd_gpionum_swclk,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for swclk.",
- },
- {
- .name = "bcm2835gpio_swdio_num",
- .handler = &bcm2835gpio_handle_swd_gpionum_swdio,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for swdio.",
- },
- {
- .name = "bcm2835gpio_srst_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_srst,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for srst.",
- },
- {
- .name = "bcm2835gpio_trst_num",
- .handler = &bcm2835gpio_handle_jtag_gpionum_trst,
- .mode = COMMAND_CONFIG,
- .help = "gpio number for trst.",
- },
- {
- .name = "bcm2835gpio_speed_coeffs",
- .handler = &bcm2835gpio_handle_speed_coeffs,
- .mode = COMMAND_CONFIG,
- .help = "SPEED_COEFF and SPEED_OFFSET for delay calculations.",
- },
- {
- .name = "bcm2835gpio_peripheral_base",
- .handler = &bcm2835gpio_handle_peripheral_base,
- .mode = COMMAND_CONFIG,
- .help = "peripheral base to access GPIOs (RPi1 0x20000000, RPi2 0x3F000000).",
- },
-
- COMMAND_REGISTRATION_DONE
-};
-
-static const char * const bcm2835_transports[] = { "jtag", "swd", NULL };
-
-struct jtag_interface bcm2835gpio_interface = {
- .name = "bcm2835gpio",
- .supported = DEBUG_CAP_TMS_SEQ,
- .execute_queue = bitbang_execute_queue,
- .transports = bcm2835_transports,
- .swd = &bitbang_swd,
- .speed = bcm2835gpio_speed,
- .khz = bcm2835gpio_khz,
- .speed_div = bcm2835gpio_speed_div,
- .commands = bcm2835gpio_command_handlers,
- .init = bcm2835gpio_init,
- .quit = bcm2835gpio_quit,
-};
-
-static bool bcm2835gpio_jtag_mode_possible(void)
-{
- if (!is_gpio_valid(tck_gpio))
- return 0;
- if (!is_gpio_valid(tms_gpio))
- return 0;
- if (!is_gpio_valid(tdi_gpio))
- return 0;
- if (!is_gpio_valid(tdo_gpio))
- return 0;
- return 1;
-}
-
-static bool bcm2835gpio_swd_mode_possible(void)
-{
- if (!is_gpio_valid(swclk_gpio))
- return 0;
- if (!is_gpio_valid(swdio_gpio))
- return 0;
- return 1;
-}
-
-static int bcm2835gpio_init(void)
-{
- bitbang_interface = &bcm2835gpio_bitbang;
-
- LOG_INFO("BCM2835 GPIO JTAG/SWD bitbang driver");
-
- if (bcm2835gpio_jtag_mode_possible()) {
- if (bcm2835gpio_swd_mode_possible())
- LOG_INFO("JTAG and SWD modes enabled");
- else
- LOG_INFO("JTAG only mode enabled (specify swclk and swdio gpio to add SWD mode)");
- if (!is_gpio_valid(trst_gpio) && !is_gpio_valid(srst_gpio)) {
- LOG_ERROR("Require at least one of trst or srst gpios to be specified");
- return ERROR_JTAG_INIT_FAILED;
- }
- } else if (bcm2835gpio_swd_mode_possible()) {
- LOG_INFO("SWD only mode enabled (specify tck, tms, tdi and tdo gpios to add JTAG mode)");
- } else {
- LOG_ERROR("Require tck, tms, tdi and tdo gpios for JTAG mode and/or swclk and swdio gpio for SWD mode");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- dev_mem_fd = open("/dev/mem", O_RDWR | O_SYNC);
- if (dev_mem_fd < 0) {
- perror("open");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- pio_base = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
- MAP_SHARED, dev_mem_fd, BCM2835_GPIO_BASE);
-
- if (pio_base == MAP_FAILED) {
- perror("mmap");
- close(dev_mem_fd);
- return ERROR_JTAG_INIT_FAILED;
- }
-
- static volatile uint32_t *pads_base;
- pads_base = mmap(NULL, sysconf(_SC_PAGE_SIZE), PROT_READ | PROT_WRITE,
- MAP_SHARED, dev_mem_fd, BCM2835_PADS_GPIO_0_27);
-
- if (pads_base == MAP_FAILED) {
- perror("mmap");
- close(dev_mem_fd);
- return ERROR_JTAG_INIT_FAILED;
- }
-
- /* set 16mA drive strength */
- pads_base[BCM2835_PADS_GPIO_0_27_OFFSET] = 0x5a000018 + 7;
-
- tdo_gpio_mode = MODE_GPIO(tdo_gpio);
- tdi_gpio_mode = MODE_GPIO(tdi_gpio);
- tck_gpio_mode = MODE_GPIO(tck_gpio);
- tms_gpio_mode = MODE_GPIO(tms_gpio);
- swclk_gpio_mode = MODE_GPIO(swclk_gpio);
- swdio_gpio_mode = MODE_GPIO(swdio_gpio);
- /*
- * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
- * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
- */
- INP_GPIO(tdo_gpio);
-
- GPIO_CLR = 1<<tdi_gpio | 1<<tck_gpio | 1<<swdio_gpio | 1<<swclk_gpio;
- GPIO_SET = 1<<tms_gpio;
-
- OUT_GPIO(tdi_gpio);
- OUT_GPIO(tck_gpio);
- OUT_GPIO(tms_gpio);
- OUT_GPIO(swclk_gpio);
- OUT_GPIO(swdio_gpio);
- if (trst_gpio != -1) {
- trst_gpio_mode = MODE_GPIO(trst_gpio);
- GPIO_SET = 1 << trst_gpio;
- OUT_GPIO(trst_gpio);
- }
- if (srst_gpio != -1) {
- srst_gpio_mode = MODE_GPIO(srst_gpio);
- GPIO_SET = 1 << srst_gpio;
- OUT_GPIO(srst_gpio);
- }
-
- LOG_DEBUG("saved pinmux settings: tck %d tms %d tdi %d "
- "tdo %d trst %d srst %d", tck_gpio_mode, tms_gpio_mode,
- tdi_gpio_mode, tdo_gpio_mode, trst_gpio_mode, srst_gpio_mode);
-
- if (swd_mode) {
- bcm2835gpio_bitbang.write = bcm2835gpio_swd_write;
- bitbang_switch_to_swd();
- }
-
- return ERROR_OK;
-}
-
-static int bcm2835gpio_quit(void)
-{
- SET_MODE_GPIO(tdo_gpio, tdo_gpio_mode);
- SET_MODE_GPIO(tdi_gpio, tdi_gpio_mode);
- SET_MODE_GPIO(tck_gpio, tck_gpio_mode);
- SET_MODE_GPIO(tms_gpio, tms_gpio_mode);
- SET_MODE_GPIO(swclk_gpio, swclk_gpio_mode);
- SET_MODE_GPIO(swdio_gpio, swdio_gpio_mode);
- if (trst_gpio != -1)
- SET_MODE_GPIO(trst_gpio, trst_gpio_mode);
- if (srst_gpio != -1)
- SET_MODE_GPIO(srst_gpio, srst_gpio_mode);
-
- return ERROR_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitbang.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitbang.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitbang.c
deleted file mode 100755
index 1a0fa1c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitbang.c
+++ /dev/null
@@ -1,550 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/* 2014-12: Addition of the SWD protocol support is based on the initial work
- * by Paul Fertser and modifications by Jean-Christian de Rivaz. */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "bitbang.h"
-#include <jtag/interface.h>
-#include <jtag/commands.h>
-
-/* YUK! - but this is currently a global.... */
-extern struct jtag_interface *jtag_interface;
-
-/**
- * Function bitbang_stableclocks
- * issues a number of clock cycles while staying in a stable state.
- * Because the TMS value required to stay in the RESET state is a 1, whereas
- * the TMS value required to stay in any of the other stable states is a 0,
- * this function checks the current stable state to decide on the value of TMS
- * to use.
- */
-static void bitbang_stableclocks(int num_cycles);
-
-static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk);
-
-struct bitbang_interface *bitbang_interface;
-
-/* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
- *
- * Set this to 1 and str912 reset halt will fail.
- *
- * If someone can submit a patch with an explanation it will be greatly
- * appreciated, but as far as I can tell (�H) DCLK is generated upon
- * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
- * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
- * state". With hardware there is no such thing as *while* in a state. There
- * are only edges. So clk => 0 is in fact a very subtle state transition that
- * happens *while* in the TAP_IDLE state. "#&�"#�&"#&"#&
- *
- * For "reset halt" the last thing that happens before srst is asserted
- * is that the breakpoint is set up. If DCLK is not wiggled one last
- * time before the reset, then the breakpoint is not set up and
- * "reset halt" will fail to halt.
- *
- */
-#define CLOCK_IDLE() 0
-
-/* The bitbang driver leaves the TCK 0 when in idle */
-static void bitbang_end_state(tap_state_t state)
-{
- if (tap_is_state_stable(state))
- tap_set_end_state(state);
- else {
- LOG_ERROR("BUG: %i is not a valid end state", state);
- exit(-1);
- }
-}
-
-static void bitbang_state_move(int skip)
-{
- int i = 0, tms = 0;
- uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
- int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
-
- for (i = skip; i < tms_count; i++) {
- tms = (tms_scan >> i) & 1;
- bitbang_interface->write(0, tms, 0);
- bitbang_interface->write(1, tms, 0);
- }
- bitbang_interface->write(CLOCK_IDLE(), tms, 0);
-
- tap_set_state(tap_get_end_state());
-}
-
-/**
- * Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
- * (or SWD) state machine.
- */
-static int bitbang_execute_tms(struct jtag_command *cmd)
-{
- unsigned num_bits = cmd->cmd.tms->num_bits;
- const uint8_t *bits = cmd->cmd.tms->bits;
-
- DEBUG_JTAG_IO("TMS: %d bits", num_bits);
-
- int tms = 0;
- for (unsigned i = 0; i < num_bits; i++) {
- tms = ((bits[i/8] >> (i % 8)) & 1);
- bitbang_interface->write(0, tms, 0);
- bitbang_interface->write(1, tms, 0);
- }
- bitbang_interface->write(CLOCK_IDLE(), tms, 0);
-
- return ERROR_OK;
-}
-
-static void bitbang_path_move(struct pathmove_command *cmd)
-{
- int num_states = cmd->num_states;
- int state_count;
- int tms = 0;
-
- state_count = 0;
- while (num_states) {
- if (tap_state_transition(tap_get_state(), false) == cmd->path[state_count])
- tms = 0;
- else if (tap_state_transition(tap_get_state(), true) == cmd->path[state_count])
- tms = 1;
- else {
- LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
- tap_state_name(tap_get_state()),
- tap_state_name(cmd->path[state_count]));
- exit(-1);
- }
-
- bitbang_interface->write(0, tms, 0);
- bitbang_interface->write(1, tms, 0);
-
- tap_set_state(cmd->path[state_count]);
- state_count++;
- num_states--;
- }
-
- bitbang_interface->write(CLOCK_IDLE(), tms, 0);
-
- tap_set_end_state(tap_get_state());
-}
-
-static void bitbang_runtest(int num_cycles)
-{
- int i;
-
- tap_state_t saved_end_state = tap_get_end_state();
-
- /* only do a state_move when we're not already in IDLE */
- if (tap_get_state() != TAP_IDLE) {
- bitbang_end_state(TAP_IDLE);
- bitbang_state_move(0);
- }
-
- /* execute num_cycles */
- for (i = 0; i < num_cycles; i++) {
- bitbang_interface->write(0, 0, 0);
- bitbang_interface->write(1, 0, 0);
- }
- bitbang_interface->write(CLOCK_IDLE(), 0, 0);
-
- /* finish in end_state */
- bitbang_end_state(saved_end_state);
- if (tap_get_state() != tap_get_end_state())
- bitbang_state_move(0);
-}
-
-static void bitbang_stableclocks(int num_cycles)
-{
- int tms = (tap_get_state() == TAP_RESET ? 1 : 0);
- int i;
-
- /* send num_cycles clocks onto the cable */
- for (i = 0; i < num_cycles; i++) {
- bitbang_interface->write(1, tms, 0);
- bitbang_interface->write(0, tms, 0);
- }
-}
-
-static void bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size)
-{
- tap_state_t saved_end_state = tap_get_end_state();
- int bit_cnt;
-
- if (!((!ir_scan &&
- (tap_get_state() == TAP_DRSHIFT)) ||
- (ir_scan && (tap_get_state() == TAP_IRSHIFT)))) {
- if (ir_scan)
- bitbang_end_state(TAP_IRSHIFT);
- else
- bitbang_end_state(TAP_DRSHIFT);
-
- bitbang_state_move(0);
- bitbang_end_state(saved_end_state);
- }
-
- for (bit_cnt = 0; bit_cnt < scan_size; bit_cnt++) {
- int val = 0;
- int tms = (bit_cnt == scan_size-1) ? 1 : 0;
- int tdi;
- int bytec = bit_cnt/8;
- int bcval = 1 << (bit_cnt % 8);
-
- /* if we're just reading the scan, but don't care about the output
- * default to outputting 'low', this also makes valgrind traces more readable,
- * as it removes the dependency on an uninitialised value
- */
- tdi = 0;
- if ((type != SCAN_IN) && (buffer[bytec] & bcval))
- tdi = 1;
-
- bitbang_interface->write(0, tms, tdi);
-
- if (type != SCAN_OUT)
- val = bitbang_interface->read();
-
- bitbang_interface->write(1, tms, tdi);
-
- if (type != SCAN_OUT) {
- if (val)
- buffer[bytec] |= bcval;
- else
- buffer[bytec] &= ~bcval;
- }
- }
-
- if (tap_get_state() != tap_get_end_state()) {
- /* we *KNOW* the above loop transitioned out of
- * the shift state, so we skip the first state
- * and move directly to the end state.
- */
- bitbang_state_move(1);
- }
-}
-
-int bitbang_execute_queue(void)
-{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
- int scan_size;
- enum scan_type type;
- uint8_t *buffer;
- int retval;
-
- if (!bitbang_interface) {
- LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
- exit(-1);
- }
-
- /* return ERROR_OK, unless a jtag_read_buffer returns a failed check
- * that wasn't handled by a caller-provided error handler
- */
- retval = ERROR_OK;
-
- if (bitbang_interface->blink)
- bitbang_interface->blink(1);
-
- while (cmd) {
- switch (cmd->type) {
- case JTAG_RESET:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("reset trst: %i srst %i",
- cmd->cmd.reset->trst,
- cmd->cmd.reset->srst);
-#endif
- if ((cmd->cmd.reset->trst == 1) ||
- (cmd->cmd.reset->srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
- tap_set_state(TAP_RESET);
- bitbang_interface->reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
- break;
- case JTAG_RUNTEST:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("runtest %i cycles, end in %s",
- cmd->cmd.runtest->num_cycles,
- tap_state_name(cmd->cmd.runtest->end_state));
-#endif
- bitbang_end_state(cmd->cmd.runtest->end_state);
- bitbang_runtest(cmd->cmd.runtest->num_cycles);
- break;
-
- case JTAG_STABLECLOCKS:
- /* this is only allowed while in a stable state. A check for a stable
- * state was done in jtag_add_clocks()
- */
- bitbang_stableclocks(cmd->cmd.stableclocks->num_cycles);
- break;
-
- case JTAG_TLR_RESET:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("statemove end in %s",
- tap_state_name(cmd->cmd.statemove->end_state));
-#endif
- bitbang_end_state(cmd->cmd.statemove->end_state);
- bitbang_state_move(0);
- break;
- case JTAG_PATHMOVE:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("pathmove: %i states, end in %s",
- cmd->cmd.pathmove->num_states,
- tap_state_name(cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]));
-#endif
- bitbang_path_move(cmd->cmd.pathmove);
- break;
- case JTAG_SCAN:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("%s scan end in %s",
- (cmd->cmd.scan->ir_scan) ? "IR" : "DR",
- tap_state_name(cmd->cmd.scan->end_state));
-#endif
- bitbang_end_state(cmd->cmd.scan->end_state);
- scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
- type = jtag_scan_type(cmd->cmd.scan);
- bitbang_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size);
- if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK)
- retval = ERROR_JTAG_QUEUE_FAILED;
- if (buffer)
- free(buffer);
- break;
- case JTAG_SLEEP:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("sleep %" PRIi32, cmd->cmd.sleep->us);
-#endif
- jtag_sleep(cmd->cmd.sleep->us);
- break;
- case JTAG_TMS:
- retval = bitbang_execute_tms(cmd);
- break;
- default:
- LOG_ERROR("BUG: unknown JTAG command type encountered");
- exit(-1);
- }
- cmd = cmd->next;
- }
- if (bitbang_interface->blink)
- bitbang_interface->blink(0);
-
- return retval;
-}
-
-
-bool swd_mode;
-static int queued_retval;
-
-static int bitbang_swd_init(void)
-{
- LOG_DEBUG("bitbang_swd_init");
- swd_mode = true;
- return ERROR_OK;
-}
-
-static void bitbang_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsigned int bit_cnt)
-{
- LOG_DEBUG("bitbang_exchange");
- int tdi;
-
- for (unsigned int i = offset; i < bit_cnt + offset; i++) {
- int bytec = i/8;
- int bcval = 1 << (i % 8);
- tdi = !rnw && (buf[bytec] & bcval);
-
- bitbang_interface->write(0, 0, tdi);
-
- if (rnw && buf) {
- if (bitbang_interface->swdio_read())
- buf[bytec] |= bcval;
- else
- buf[bytec] &= ~bcval;
- }
-
- bitbang_interface->write(1, 0, tdi);
- }
-}
-
-int bitbang_swd_switch_seq(enum swd_special_seq seq)
-{
- LOG_DEBUG("bitbang_swd_switch_seq");
-
- switch (seq) {
- case LINE_RESET:
- LOG_DEBUG("SWD line reset");
- bitbang_exchange(false, (uint8_t *)swd_seq_line_reset, 0, swd_seq_line_reset_len);
- break;
- case JTAG_TO_SWD:
- LOG_DEBUG("JTAG-to-SWD");
- bitbang_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len);
- break;
- case SWD_TO_JTAG:
- LOG_DEBUG("SWD-to-JTAG");
- bitbang_exchange(false, (uint8_t *)swd_seq_swd_to_jtag, 0, swd_seq_swd_to_jtag_len);
- break;
- default:
- LOG_ERROR("Sequence %d not supported", seq);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-void bitbang_switch_to_swd(void)
-{
- LOG_DEBUG("bitbang_switch_to_swd");
- bitbang_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len);
-}
-
-static void swd_clear_sticky_errors(void)
-{
- bitbang_swd_write_reg(swd_cmd(false, false, DP_ABORT),
- STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR, 0);
-}
-
-static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
-{
- LOG_DEBUG("bitbang_swd_read_reg");
- assert(cmd & SWD_CMD_RnW);
-
- if (queued_retval != ERROR_OK) {
- LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval);
- return;
- }
-
- for (;;) {
- uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
-
- cmd |= SWD_CMD_START | (1 << 7);
- bitbang_exchange(false, &cmd, 0, 8);
-
- bitbang_interface->swdio_drive(false);
- bitbang_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 32 + 1 + 1);
- bitbang_interface->swdio_drive(true);
-
- int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
- uint32_t data = buf_get_u32(trn_ack_data_parity_trn, 1 + 3, 32);
- int parity = buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 32, 1);
-
- LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
- ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
- cmd & SWD_CMD_APnDP ? "AP" : "DP",
- cmd & SWD_CMD_RnW ? "read" : "write",
- (cmd & SWD_CMD_A32) >> 1,
- data);
-
- switch (ack) {
- case SWD_ACK_OK:
- if (parity != parity_u32(data)) {
- LOG_DEBUG("Wrong parity detected");
- queued_retval = ERROR_FAIL;
- return;
- }
- if (value)
- *value = data;
- if (cmd & SWD_CMD_APnDP)
- bitbang_exchange(true, NULL, 0, ap_delay_clk);
- return;
- case SWD_ACK_WAIT:
- LOG_DEBUG("SWD_ACK_WAIT");
- swd_clear_sticky_errors();
- break;
- case SWD_ACK_FAULT:
- LOG_DEBUG("SWD_ACK_FAULT");
- queued_retval = ack;
- return;
- default:
- LOG_DEBUG("No valid acknowledge: ack=%d", ack);
- queued_retval = ack;
- return;
- }
- }
-}
-
-static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
-{
- LOG_DEBUG("bitbang_swd_write_reg");
- assert(!(cmd & SWD_CMD_RnW));
-
- if (queued_retval != ERROR_OK) {
- LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval);
- return;
- }
-
- for (;;) {
- uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
- buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32, value);
- buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1 + 32, 1, parity_u32(value));
-
- cmd |= SWD_CMD_START | (1 << 7);
- bitbang_exchange(false, &cmd, 0, 8);
-
- bitbang_interface->swdio_drive(false);
- bitbang_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 1);
- bitbang_interface->swdio_drive(true);
- bitbang_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1);
-
- int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
- LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
- ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
- cmd & SWD_CMD_APnDP ? "AP" : "DP",
- cmd & SWD_CMD_RnW ? "read" : "write",
- (cmd & SWD_CMD_A32) >> 1,
- buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32));
-
- switch (ack) {
- case SWD_ACK_OK:
- if (cmd & SWD_CMD_APnDP)
- bitbang_exchange(true, NULL, 0, ap_delay_clk);
- return;
- case SWD_ACK_WAIT:
- LOG_DEBUG("SWD_ACK_WAIT");
- swd_clear_sticky_errors();
- break;
- case SWD_ACK_FAULT:
- LOG_DEBUG("SWD_ACK_FAULT");
- queued_retval = ack;
- return;
- default:
- LOG_DEBUG("No valid acknowledge: ack=%d", ack);
- queued_retval = ack;
- return;
- }
- }
-}
-
-static int bitbang_swd_run_queue(void)
-{
- LOG_DEBUG("bitbang_swd_run_queue");
- /* A transaction must be followed by another transaction or at least 8 idle cycles to
- * ensure that data is clocked through the AP. */
- bitbang_exchange(true, NULL, 0, 8);
-
- int retval = queued_retval;
- queued_retval = ERROR_OK;
- LOG_DEBUG("SWD queue return value: %02x", retval);
- return retval;
-}
-
-const struct swd_driver bitbang_swd = {
- .init = bitbang_swd_init,
- .switch_seq = bitbang_swd_switch_seq,
- .read_reg = bitbang_swd_read_reg,
- .write_reg = bitbang_swd_write_reg,
- .run = bitbang_swd_run_queue,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitbang.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitbang.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitbang.h
deleted file mode 100755
index 1bdb8f5..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitbang.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef BITBANG_H
-#define BITBANG_H
-
-#include <jtag/swd.h>
-
-struct bitbang_interface {
- /* low level callbacks (for bitbang)
- */
- int (*read)(void);
- void (*write)(int tck, int tms, int tdi);
- void (*reset)(int trst, int srst);
- void (*blink)(int on);
- int (*swdio_read)(void);
- void (*swdio_drive)(bool on);
-};
-
-const struct swd_driver bitbang_swd;
-
-extern bool swd_mode;
-
-int bitbang_execute_queue(void);
-
-extern struct bitbang_interface *bitbang_interface;
-void bitbang_switch_to_swd(void);
-int bitbang_swd_switch_seq(enum swd_special_seq seq);
-
-#endif /* BITBANG_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitq.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitq.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitq.c
deleted file mode 100755
index 1d0ff09..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitq.c
+++ /dev/null
@@ -1,317 +0,0 @@
-/***************************************************************************
-* Copyright (C) 2007 by Pavel Chromy *
-* chromy@asix.cz *
-* *
-* This program is free software; you can redistribute it and/or modify *
-* it under the terms of the GNU General Public License as published by *
-* the Free Software Foundation; either version 2 of the License, or *
-* (at your option) any later version. *
-* *
-* This program is distributed in the hope that it will be useful, *
-* but WITHOUT ANY WARRANTY; without even the implied warranty of *
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-* GNU General Public License for more details. *
-* *
-* You should have received a copy of the GNU General Public License *
-* along with this program; if not, write to the *
-* Free Software Foundation, Inc., *
-* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
-***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/jtag.h>
-#include "bitq.h"
-#include <jtag/interface.h>
-
-struct bitq_interface *bitq_interface; /* low level bit queue interface */
-
-/* state of input queue */
-struct bitq_state {
- struct jtag_command *cmd; /* command currently processed */
- int field_idx; /* index of field currently being processed */
- int bit_pos; /* position of bit currently being processed */
- int status; /* processing status */
-};
-static struct bitq_state bitq_in_state;
-
-/*
- * input queue processing does not use jtag_read_buffer() to avoid unnecessary overhead
- * no parameters, makes use of stored state information
- */
-static void bitq_in_proc(void)
-{
- /* loop through the queue */
- while (bitq_in_state.cmd) {
- /* only JTAG_SCAN command may return data */
- if (bitq_in_state.cmd->type == JTAG_SCAN) {
- /* loop through the fields */
- while (bitq_in_state.field_idx < bitq_in_state.cmd->cmd.scan->num_fields) {
- struct scan_field *field;
- field = &bitq_in_state.cmd->cmd.scan->fields[bitq_in_state.field_idx];
- if (field->in_value) {
- /* field scanning */
- while (bitq_in_state.bit_pos < field->num_bits) {
- /* index of byte being scanned */
- int in_idx = bitq_in_state.bit_pos / 8;
- /* mask of next bit to be scanned */
- uint8_t in_mask = 1 << (bitq_in_state.bit_pos % 8);
-
- int tdo = bitq_interface->in();
- if (tdo < 0) {
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("bitq in EOF");
-#endif
- return;
- }
- if (in_mask == 0x01)
- field->in_value[in_idx] = 0;
- if (tdo)
- field->in_value[in_idx] |= in_mask;
- bitq_in_state.bit_pos++;
- }
- }
-
- bitq_in_state.field_idx++; /* advance to next field */
- bitq_in_state.bit_pos = 0; /* start next field from the first bit */
- }
- }
- bitq_in_state.cmd = bitq_in_state.cmd->next; /* advance to next command */
- bitq_in_state.field_idx = 0; /* preselect first field */
- }
-}
-
-static void bitq_io(int tms, int tdi, int tdo_req)
-{
- bitq_interface->out(tms, tdi, tdo_req);
- /* check and process the input queue */
- if (bitq_interface->in_rdy())
- bitq_in_proc();
-}
-
-static void bitq_end_state(tap_state_t state)
-{
- if (!tap_is_state_stable(state)) {
- LOG_ERROR("BUG: %i is not a valid end state", state);
- exit(-1);
- }
- tap_set_end_state(state);
-}
-
-static void bitq_state_move(tap_state_t new_state)
-{
- int i = 0;
- uint8_t tms_scan;
-
- if (!tap_is_state_stable(tap_get_state()) || !tap_is_state_stable(new_state)) {
- LOG_ERROR("TAP move from or to unstable state");
- exit(-1);
- }
-
- tms_scan = tap_get_tms_path(tap_get_state(), new_state);
- int tms_count = tap_get_tms_path_len(tap_get_state(), new_state);
-
- for (i = 0; i < tms_count; i++) {
- bitq_io(tms_scan & 1, 0, 0);
- tms_scan >>= 1;
- }
-
- tap_set_state(new_state);
-}
-
-static void bitq_path_move(struct pathmove_command *cmd)
-{
- int i;
-
- for (i = 0; i <= cmd->num_states; i++) {
- if (tap_state_transition(tap_get_state(), false) == cmd->path[i])
- bitq_io(0, 0, 0);
- else if (tap_state_transition(tap_get_state(), true) == cmd->path[i])
- bitq_io(1, 0, 0);
- else {
- LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(
- tap_get_state()), tap_state_name(cmd->path[i]));
- exit(-1);
- }
-
- tap_set_state(cmd->path[i]);
- }
-
- tap_set_end_state(tap_get_state());
-}
-
-static void bitq_runtest(int num_cycles)
-{
- int i;
-
- /* only do a state_move when we're not already in IDLE */
- if (tap_get_state() != TAP_IDLE)
- bitq_state_move(TAP_IDLE);
-
- /* execute num_cycles */
- for (i = 0; i < num_cycles; i++)
- bitq_io(0, 0, 0);
-
- /* finish in end_state */
- if (tap_get_state() != tap_get_end_state())
- bitq_state_move(tap_get_end_state());
-}
-
-static void bitq_scan_field(struct scan_field *field, int do_pause)
-{
- int bit_cnt;
- int tdo_req;
-
- const uint8_t *out_ptr;
- uint8_t out_mask;
-
- if (field->in_value)
- tdo_req = 1;
- else
- tdo_req = 0;
-
- if (field->out_value == NULL) {
- /* just send zeros and request data from TDO */
- for (bit_cnt = field->num_bits; bit_cnt > 1; bit_cnt--)
- bitq_io(0, 0, tdo_req);
-
- bitq_io(do_pause, 0, tdo_req);
- } else {
- /* send data, and optionally request TDO */
- out_mask = 0x01;
- out_ptr = field->out_value;
- for (bit_cnt = field->num_bits; bit_cnt > 1; bit_cnt--) {
- bitq_io(0, ((*out_ptr) & out_mask) != 0, tdo_req);
- if (out_mask == 0x80) {
- out_mask = 0x01;
- out_ptr++;
- } else
- out_mask <<= 1;
- }
-
- bitq_io(do_pause, ((*out_ptr) & out_mask) != 0, tdo_req);
- }
-
- if (do_pause) {
- bitq_io(0, 0, 0);
- if (tap_get_state() == TAP_IRSHIFT)
- tap_set_state(TAP_IRPAUSE);
- else if (tap_get_state() == TAP_DRSHIFT)
- tap_set_state(TAP_DRPAUSE);
- }
-}
-
-static void bitq_scan(struct scan_command *cmd)
-{
- int i;
-
- if (cmd->ir_scan)
- bitq_state_move(TAP_IRSHIFT);
- else
- bitq_state_move(TAP_DRSHIFT);
-
- for (i = 0; i < cmd->num_fields - 1; i++)
- bitq_scan_field(&cmd->fields[i], 0);
-
- bitq_scan_field(&cmd->fields[i], 1);
-}
-
-int bitq_execute_queue(void)
-{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
-
- bitq_in_state.cmd = jtag_command_queue;
- bitq_in_state.field_idx = 0;
- bitq_in_state.bit_pos = 0;
- bitq_in_state.status = ERROR_OK;
-
- while (cmd) {
- switch (cmd->type) {
- case JTAG_RESET:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
-#endif
- if ((cmd->cmd.reset->trst == 1) ||
- (cmd->cmd.reset->srst &&
- (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
- tap_set_state(TAP_RESET);
- bitq_interface->reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
- if (bitq_interface->in_rdy())
- bitq_in_proc();
- break;
-
- case JTAG_RUNTEST:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("runtest %i cycles, end in %i", cmd->cmd.runtest->num_cycles, cmd->cmd.runtest->end_state);
-#endif
- bitq_end_state(cmd->cmd.runtest->end_state);
- bitq_runtest(cmd->cmd.runtest->num_cycles);
- break;
-
- case JTAG_TLR_RESET:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
-#endif
- bitq_end_state(cmd->cmd.statemove->end_state);
- bitq_state_move(tap_get_end_state()); /* uncoditional TAP move */
- break;
-
- case JTAG_PATHMOVE:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("pathmove: %i states, end in %i", cmd->cmd.pathmove->num_states,
- cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]);
-#endif
- bitq_path_move(cmd->cmd.pathmove);
- break;
-
- case JTAG_SCAN:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("scan end in %i", cmd->cmd.scan->end_state);
- if (cmd->cmd.scan->ir_scan)
- LOG_DEBUG("scan ir");
- else
- LOG_DEBUG("scan dr");
-#endif
- bitq_end_state(cmd->cmd.scan->end_state);
- bitq_scan(cmd->cmd.scan);
- if (tap_get_state() != tap_get_end_state())
- bitq_state_move(tap_get_end_state());
- break;
-
- case JTAG_SLEEP:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
-#endif
- bitq_interface->sleep(cmd->cmd.sleep->us);
- if (bitq_interface->in_rdy())
- bitq_in_proc();
- break;
-
- default:
- LOG_ERROR("BUG: unknown JTAG command type encountered");
- exit(-1);
- }
-
- cmd = cmd->next;
- }
-
- bitq_interface->flush();
- bitq_in_proc();
-
- if (bitq_in_state.cmd) {
- LOG_ERROR("missing data from bitq interface");
- return ERROR_JTAG_QUEUE_FAILED;
- }
- if (bitq_interface->in() >= 0) {
- LOG_ERROR("extra data from bitq interface");
- return ERROR_JTAG_QUEUE_FAILED;
- }
-
- return bitq_in_state.status;
-}
-
-void bitq_cleanup(void)
-{
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitq.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitq.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitq.h
deleted file mode 100755
index f54de95..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/bitq.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef BITQ_H
-#define BITQ_H
-
-#include <jtag/commands.h>
-
-struct bitq_interface {
- /* function to enqueueing low level IO requests */
- int (*out)(int tms, int tdi, int tdo_req);
- int (*flush)(void);
-
- int (*sleep)(unsigned long us);
- int (*reset)(int trst, int srst);
-
- /* delayed read of requested TDO data,
- * the input shall be checked after call to any enqueuing function
- */
- int (*in_rdy)(void);
- int (*in)(void);
-};
-
-extern struct bitq_interface *bitq_interface;
-
-int bitq_execute_queue(void);
-
-void bitq_cleanup(void);
-
-#endif /* BITQ_H */
[35/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ambiqmicro.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ambiqmicro.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ambiqmicro.c
deleted file mode 100755
index b2c30e6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ambiqmicro.c
+++ /dev/null
@@ -1,904 +0,0 @@
-/******************************************************************************
- *
- * @file ambiqmicro.c
- *
- * @brief Ambiq Micro flash driver.
- *
- *****************************************************************************/
-
-/******************************************************************************
- * Copyright (c) 2015, David Racine <dracine at ambiqmicro.com>
- *
- * Copyright (c) 2016, Rick Foos <rfoos at solengtech.com>
- *
- * Copyright (c) 2015-2016, Ambiq Micro, Inc.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * 3. Neither the name of the copyright holder nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- *****************************************************************************/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "jtag/interface.h"
-#include "imp.h"
-#include "target/algorithm.h"
-#include "target/armv7m.h"
-#include "target/cortex_m.h"
-
-/** Check error, log error. */
-#define CHECK_STATUS(rc, msg) { \
- if (rc != ERROR_OK) { \
- LOG_ERROR("status(%d):%s\n", rc, msg); } }
-
-/*
- * Address and Key defines.
- */
-#define PROGRAM_KEY (0x12344321)
-#define OTP_PROGRAM_KEY (0x87655678)
-
-#define FLASH_PROGRAM_MAIN_FROM_SRAM 0x0800005d
-#define FLASH_PROGRAM_OTP_FROM_SRAM 0x08000061
-#define FLASH_ERASE_LIST_MAIN_PAGES_FROM_SRAM 0x08000065
-#define FLASH_MASS_ERASE_MAIN_PAGES_FROM_SRAM 0x08000069
-
-
-static const uint32_t apollo_flash_size[] = {
- 1 << 15,
- 1 << 16,
- 1 << 17,
- 1 << 18,
- 1 << 19,
- 1 << 20,
- 1 << 21
-};
-
-static const uint32_t apollo_sram_size[] = {
- 1 << 15,
- 1 << 16,
- 1 << 17,
- 1 << 18,
- 1 << 19,
- 1 << 20,
- 1 << 21
-};
-
-struct ambiqmicro_flash_bank {
- /* chip id register */
-
- uint32_t probed;
-
- const char *target_name;
- uint8_t target_class;
-
- uint32_t sramsiz;
- uint32_t flshsiz;
-
- /* flash geometry */
- uint32_t num_pages;
- uint32_t pagesize;
- uint32_t pages_in_lockregion;
-
- /* nv memory bits */
- uint16_t num_lockbits;
-
- /* main clock status */
- uint32_t rcc;
- uint32_t rcc2;
- uint8_t mck_valid;
- uint8_t xtal_mask;
- uint32_t iosc_freq;
- uint32_t mck_freq;
- const char *iosc_desc;
- const char *mck_desc;
-};
-
-static struct {
- uint8_t class;
- uint8_t partno;
- const char *partname;
-} ambiqmicroParts[6] = {
- {0xFF, 0x00, "Unknown"},
- {0x01, 0x00, "Apollo"},
- {0x02, 0x00, "Apollo2"},
- {0x03, 0x00, "Unknown"},
- {0x04, 0x00, "Unknown"},
- {0x05, 0x00, "Apollo"},
-};
-
-static char *ambiqmicroClassname[6] = {
- "Unknown", "Apollo", "Apollo2", "Unknown", "Unknown", "Apollo"
-};
-
-/***************************************************************************
-* openocd command interface *
-***************************************************************************/
-
-/* flash_bank ambiqmicro <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(ambiqmicro_flash_bank_command)
-{
- struct ambiqmicro_flash_bank *ambiqmicro_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- ambiqmicro_info = calloc(sizeof(struct ambiqmicro_flash_bank), 1);
-
- bank->driver_priv = ambiqmicro_info;
-
- ambiqmicro_info->target_name = "Unknown target";
-
- /* part wasn't probed yet */
- ambiqmicro_info->probed = 0;
-
- return ERROR_OK;
-}
-
-static int get_ambiqmicro_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
- int printed;
- char *classname;
-
- if (ambiqmicro_info->probed == 0) {
- LOG_ERROR("Target not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- /* Check class name in range. */
- if (ambiqmicro_info->target_class < sizeof(ambiqmicroClassname))
- classname = ambiqmicroClassname[ambiqmicro_info->target_class];
- else
- classname = ambiqmicroClassname[0];
-
- printed = snprintf(buf,
- buf_size,
- "\nAmbiq Micro information: Chip is "
- "class %d (%s) %s\n",
- ambiqmicro_info->target_class,
- classname,
- ambiqmicro_info->target_name);
-
- if ((printed < 0))
- return ERROR_BUF_TOO_SMALL;
- return ERROR_OK;
-}
-
-/***************************************************************************
-* chip identification and status *
-***************************************************************************/
-
-/* Fill in driver info structure */
-static int ambiqmicro_read_part_info(struct flash_bank *bank)
-{
- struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t PartNum = 0;
- int retval;
-
- /*
- * Read Part Number.
- */
- retval = target_read_u32(target, 0x40020000, &PartNum);
- if (retval != ERROR_OK) {
- LOG_ERROR("status(0x%x):Could not read PartNum.\n", retval);
- /* Set PartNum to default device */
- PartNum = 0;
- }
- LOG_DEBUG("Part number: 0x%x", PartNum);
-
- /*
- * Determine device class.
- */
- ambiqmicro_info->target_class = (PartNum & 0xFF000000) >> 24;
-
- switch (ambiqmicro_info->target_class) {
- case 1: /* 1 - Apollo */
- case 5: /* 5 - Apollo Bootloader */
- bank->base = bank->bank_number * 0x40000;
- ambiqmicro_info->pagesize = 2048;
- ambiqmicro_info->flshsiz =
- apollo_flash_size[(PartNum & 0x00F00000) >> 20];
- ambiqmicro_info->sramsiz =
- apollo_sram_size[(PartNum & 0x000F0000) >> 16];
- ambiqmicro_info->num_pages = ambiqmicro_info->flshsiz /
- ambiqmicro_info->pagesize;
- if (ambiqmicro_info->num_pages > 128) {
- ambiqmicro_info->num_pages = 128;
- ambiqmicro_info->flshsiz = 1024 * 256;
- }
- break;
-
- default:
- LOG_INFO("Unknown Class. Using Apollo-64 as default.");
-
- bank->base = bank->bank_number * 0x40000;
- ambiqmicro_info->pagesize = 2048;
- ambiqmicro_info->flshsiz = apollo_flash_size[1];
- ambiqmicro_info->sramsiz = apollo_sram_size[0];
- ambiqmicro_info->num_pages = ambiqmicro_info->flshsiz /
- ambiqmicro_info->pagesize;
- if (ambiqmicro_info->num_pages > 128) {
- ambiqmicro_info->num_pages = 128;
- ambiqmicro_info->flshsiz = 1024 * 256;
- }
- break;
-
- }
-
- if (ambiqmicro_info->target_class <
- (sizeof(ambiqmicroParts)/sizeof(ambiqmicroParts[0])))
- ambiqmicro_info->target_name =
- ambiqmicroParts[ambiqmicro_info->target_class].partname;
- else
- ambiqmicro_info->target_name =
- ambiqmicroParts[0].partname;
-
- LOG_DEBUG("num_pages: %d, pagesize: %d, flash: %d, sram: %d",
- ambiqmicro_info->num_pages,
- ambiqmicro_info->pagesize,
- ambiqmicro_info->flshsiz,
- ambiqmicro_info->sramsiz);
-
- return ERROR_OK;
-}
-
-/***************************************************************************
-* flash operations *
-***************************************************************************/
-
-static int ambiqmicro_protect_check(struct flash_bank *bank)
-{
- struct ambiqmicro_flash_bank *ambiqmicro = bank->driver_priv;
- int status = ERROR_OK;
- uint32_t i;
-
-
- if (ambiqmicro->probed == 0) {
- LOG_ERROR("Target not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- for (i = 0; i < (unsigned) bank->num_sectors; i++)
- bank->sectors[i].is_protected = -1;
-
- return status;
-}
-/** Read flash status from bootloader. */
-static int check_flash_status(struct target *target, uint32_t address)
-{
- uint32_t retflash;
- int rc;
- rc = target_read_u32(target, address, &retflash);
- /* target connection failed. */
- if (rc != ERROR_OK) {
- LOG_DEBUG("%s:%d:%s(): status(0x%x)\n",
- __FILE__, __LINE__, __func__, rc);
- return rc;
- }
- /* target flash failed, unknown cause. */
- if (retflash != 0) {
- LOG_ERROR("Flash not happy: status(0x%x)", retflash);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- return ERROR_OK;
-}
-
-static int ambiqmicro_exec_command(struct target *target,
- uint32_t command,
- uint32_t flash_return_address)
-{
- int retval, retflash;
-
- retval = target_resume(
- target,
- false,
- command,
- true,
- true);
-
- CHECK_STATUS(retval, "error executing ambiqmicro command");
-
- /*
- * Wait for halt.
- */
- for (;; ) {
- target_poll(target);
- if (target->state == TARGET_HALTED)
- break;
- else if (target->state == TARGET_RUNNING ||
- target->state == TARGET_DEBUG_RUNNING) {
- /*
- * Keep polling until target halts.
- */
- target_poll(target);
- alive_sleep(100);
- LOG_DEBUG("state = %d", target->state);
- } else {
- LOG_ERROR("Target not halted or running %d", target->state);
- break;
- }
- }
-
- /*
- * Read return value, flash error takes precedence.
- */
- retflash = check_flash_status(target, flash_return_address);
- if (retflash != ERROR_OK)
- retval = retflash;
-
- /* Return code from target_resume OR flash. */
- return retval;
-}
-
-static int ambiqmicro_mass_erase(struct flash_bank *bank)
-{
- struct target *target = NULL;
- struct ambiqmicro_flash_bank *ambiqmicro_info = NULL;
- int retval = ERROR_OK;
-
- ambiqmicro_info = bank->driver_priv;
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (ambiqmicro_info->probed == 0) {
- LOG_ERROR("Target not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- /*
- * Clear Bootloader bit.
- */
- retval = target_write_u32(target, 0x400201a0, 0x0);
- CHECK_STATUS(retval, "error clearing bootloader bit.");
-
- /*
- * Set up the SRAM.
- */
-
- /*
- * Bank.
- */
- retval = target_write_u32(target, 0x10000000, bank->bank_number);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Write Key.
- */
- retval = target_write_u32(target, 0x10000004, PROGRAM_KEY);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Breakpoint.
- */
- retval = target_write_u32(target, 0x10000008, 0xfffffffe);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Erase the main array.
- */
- LOG_INFO("Mass erase on bank %d.", bank->bank_number);
-
- /*
- * passed pc, addr = ROM function, handle breakpoints, not debugging.
- */
- retval = ambiqmicro_exec_command(target, FLASH_MASS_ERASE_MAIN_PAGES_FROM_SRAM, 0x10000008);
- CHECK_STATUS(retval, "error executing ambiqmicro flash mass erase.");
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * Set Bootloader bit, regardless of command execution.
- */
- retval = target_write_u32(target, 0x400201a0, 0x1);
- CHECK_STATUS(retval, "error setting bootloader bit.");
-
- return retval;
-}
-
-
-static int ambiqmicro_erase(struct flash_bank *bank, int first, int last)
-{
- struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t retval = ERROR_OK;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (ambiqmicro_info->probed == 0) {
- LOG_ERROR("Target not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- /*
- * Check pages.
- * Fix num_pages for the device.
- */
- if ((first < 0) || (last < first) || (last >= (int)ambiqmicro_info->num_pages))
- return ERROR_FLASH_SECTOR_INVALID;
-
- /*
- * Just Mass Erase if all pages are given.
- * TODO: Fix num_pages for the device
- */
- if ((first == 0) && (last == ((int)ambiqmicro_info->num_pages-1)))
- return ambiqmicro_mass_erase(bank);
-
- /*
- * Clear Bootloader bit.
- */
- retval = target_write_u32(target, 0x400201a0, 0x0);
- CHECK_STATUS(retval, "error clearing bootloader bit.");
-
- /*
- * Set up the SRAM.
- */
-
- /*
- * Bank.
- */
- retval = target_write_u32(target, 0x10000000, bank->bank_number);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Number of pages to erase.
- */
- retval = target_write_u32(target, 0x10000004, 1 + (last-first));
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Write Key.
- */
- retval = target_write_u32(target, 0x10000008, PROGRAM_KEY);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Breakpoint.
- */
- retval = target_write_u32(target, 0x1000000c, 0xfffffffe);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Pointer to flash address.
- */
- retval = target_write_u32(target, 0x10000010, first);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * Erase the pages.
- */
- LOG_INFO("Erasing pages %d to %d on bank %d", first, last, bank->bank_number);
-
- /*
- * passed pc, addr = ROM function, handle breakpoints, not debugging.
- */
- retval = ambiqmicro_exec_command(target, FLASH_ERASE_LIST_MAIN_PAGES_FROM_SRAM, 0x1000000C);
- CHECK_STATUS(retval, "error executing flash page erase");
- if (retval != ERROR_OK)
- return retval;
-
- LOG_INFO("%d pages erased!", 1+(last-first));
-
- if (first == 0) {
- /*
- * Set Bootloader bit.
- */
- retval = target_write_u32(target, 0x400201a0, 0x1);
- CHECK_STATUS(retval, "error setting bootloader bit.");
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-static int ambiqmicro_protect(struct flash_bank *bank, int set, int first, int last)
-{
- /* struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
- * struct target *target = bank->target; */
-
- /*
- * TODO
- */
- LOG_INFO("Not yet implemented");
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- return ERROR_OK;
-}
-
-static int ambiqmicro_write_block(struct flash_bank *bank,
- const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- /* struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv; */
- struct target *target = bank->target;
- uint32_t address = bank->base + offset;
- uint32_t buffer_pointer = 0x10000010;
- uint32_t maxbuffer;
- uint32_t thisrun_count;
- int retval = ERROR_OK;
-
- if (((count%4) != 0) || ((offset%4) != 0)) {
- LOG_ERROR("write block must be multiple of 4 bytes in offset & length");
- return ERROR_FAIL;
- }
-
- /*
- * Max buffer size for this device.
- * Hard code 6kB for the buffer.
- */
- maxbuffer = 0x1800;
-
- LOG_INFO("Flashing main array");
-
- while (count > 0) {
- if (count > maxbuffer)
- thisrun_count = maxbuffer;
- else
- thisrun_count = count;
-
- /*
- * Set up the SRAM.
- */
-
- /*
- * Pointer to flash.
- */
- retval = target_write_u32(target, 0x10000000, address);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Number of 32-bit words to program.
- */
- retval = target_write_u32(target, 0x10000004, thisrun_count/4);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Write Key.
- */
- retval = target_write_u32(target, 0x10000008, PROGRAM_KEY);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Breakpoint.
- */
- retval = target_write_u32(target, 0x1000000c, 0xfffffffe);
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
-
- /*
- * Write Buffer.
- */
- retval = target_write_buffer(target, buffer_pointer, thisrun_count, buffer);
-
- if (retval != ERROR_OK) {
- CHECK_STATUS(retval, "error writing target SRAM parameters.");
- break;
- }
-
- LOG_DEBUG("address = 0x%08x", address);
-
- retval = ambiqmicro_exec_command(target, FLASH_PROGRAM_MAIN_FROM_SRAM, 0x1000000c);
- CHECK_STATUS(retval, "error executing ambiqmicro flash write algorithm");
- if (retval != ERROR_OK)
- break;
- buffer += thisrun_count;
- address += thisrun_count;
- count -= thisrun_count;
- }
-
-
- LOG_INFO("Main array flashed");
-
- /*
- * Clear Bootloader bit.
- */
- retval = target_write_u32(target, 0x400201a0, 0x0);
- CHECK_STATUS(retval, "error clearing bootloader bit");
-
- return retval;
-}
-
-static int ambiqmicro_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- uint32_t retval;
-
- /* try using a block write */
- retval = ambiqmicro_write_block(bank, buffer, offset, count);
- if (retval != ERROR_OK)
- LOG_ERROR("write failed");
-
- return retval;
-}
-
-static int ambiqmicro_probe(struct flash_bank *bank)
-{
- struct ambiqmicro_flash_bank *ambiqmicro_info = bank->driver_priv;
- uint32_t retval;
-
- /* If this is a ambiqmicro chip, it has flash; probe() is just
- * to figure out how much is present. Only do it once.
- */
- if (ambiqmicro_info->probed == 1) {
- LOG_INFO("Target already probed");
- return ERROR_OK;
- }
-
- /* ambiqmicro_read_part_info() already handled error checking and
- * reporting. Note that it doesn't write, so we don't care about
- * whether the target is halted or not.
- */
- retval = ambiqmicro_read_part_info(bank);
- if (retval != ERROR_OK)
- return retval;
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- /* provide this for the benefit of the NOR flash framework */
- bank->size = ambiqmicro_info->pagesize * ambiqmicro_info->num_pages;
- bank->num_sectors = ambiqmicro_info->num_pages;
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = i * ambiqmicro_info->pagesize;
- bank->sectors[i].size = ambiqmicro_info->pagesize;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- /*
- * Part has been probed.
- */
- ambiqmicro_info->probed = 1;
-
- return retval;
-}
-
-static int ambiqmicro_otp_program(struct flash_bank *bank,
- uint32_t offset, uint32_t count)
-{
- struct target *target = NULL;
- struct ambiqmicro_flash_bank *ambiqmicro_info = NULL;
- uint32_t retval = ERROR_OK;
-
- ambiqmicro_info = bank->driver_priv;
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (ambiqmicro_info->probed == 0) {
- LOG_ERROR("Target not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- if (count > 256) {
- LOG_ERROR("Count must be < 256");
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /*
- * Clear Bootloader bit.
- */
- retval = target_write_u32(target, 0x400201a0, 0x0);
- CHECK_STATUS(retval, "error clearing bootloader bit.");
-
- /*
- * Set up the SRAM.
- */
-
- /*
- * Bank.
- */
- retval = target_write_u32(target, 0x10000000, offset);
- CHECK_STATUS(retval, "error setting target SRAM parameters.");
-
- /*
- * Num of words to program.
- */
- retval = target_write_u32(target, 0x10000004, count);
- CHECK_STATUS(retval, "error setting target SRAM parameters.");
-
- /*
- * Write Key.
- */
- retval = target_write_u32(target, 0x10000008, OTP_PROGRAM_KEY);
- CHECK_STATUS(retval, "error setting target SRAM parameters.");
-
- /*
- * Breakpoint.
- */
- retval = target_write_u32(target, 0x1000000c, 0xfffffffe);
- CHECK_STATUS(retval, "error setting target SRAM parameters.");
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * Program OTP.
- */
- LOG_INFO("Programming OTP offset 0x%08x", offset);
-
- /*
- * passed pc, addr = ROM function, handle breakpoints, not debugging.
- */
- retval = ambiqmicro_exec_command(target, FLASH_PROGRAM_OTP_FROM_SRAM, 0x1000000C);
- CHECK_STATUS(retval, "error executing ambiqmicro otp program algorithm");
-
- LOG_INFO("Programming OTP finished.");
-
- return retval;
-}
-
-
-
-COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command)
-{
- int i;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- uint32_t retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (ambiqmicro_mass_erase(bank) == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "ambiqmicro mass erase complete");
- } else
- command_print(CMD_CTX, "ambiqmicro mass erase failed");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(ambiqmicro_handle_page_erase_command)
-{
- struct flash_bank *bank;
- uint32_t first, last;
- uint32_t retval;
-
- if (CMD_ARGC < 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], first);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last);
-
- retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (ambiqmicro_erase(bank, first, last) == ERROR_OK)
- command_print(CMD_CTX, "ambiqmicro page erase complete");
- else
- command_print(CMD_CTX, "ambiqmicro page erase failed");
-
- return ERROR_OK;
-}
-
-
-/**
- * Program the otp block.
- */
-COMMAND_HANDLER(ambiqmicro_handle_program_otp_command)
-{
- struct flash_bank *bank;
- uint32_t offset, count;
- uint32_t retval;
-
- if (CMD_ARGC < 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], offset);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], count);
-
- command_print(CMD_CTX, "offset=0x%08x count=%d", offset, count);
-
- CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
-
- retval = ambiqmicro_otp_program(bank, offset, count);
-
- if (retval != ERROR_OK)
- LOG_ERROR("error check log");
-
- return ERROR_OK;
-}
-
-
-
-static const struct command_registration ambiqmicro_exec_command_handlers[] = {
- {
- .name = "mass_erase",
- .usage = "<bank>",
- .handler = ambiqmicro_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .help = "Erase entire device",
- },
- {
- .name = "page_erase",
- .usage = "<bank> <first> <last>",
- .handler = ambiqmicro_handle_page_erase_command,
- .mode = COMMAND_EXEC,
- .help = "Erase device pages",
- },
- {
- .name = "program_otp",
- .handler = ambiqmicro_handle_program_otp_command,
- .mode = COMMAND_EXEC,
- .usage = "<bank> <offset> <count>",
- .help =
- "Program OTP (assumes you have already written array starting at 0x10000010)",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration ambiqmicro_command_handlers[] = {
- {
- .name = "ambiqmicro",
- .mode = COMMAND_EXEC,
- .help = "ambiqmicro flash command group",
- .usage = "Support for Ambiq Micro parts.",
- .chain = ambiqmicro_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver ambiqmicro_flash = {
- .name = "ambiqmicro",
- .commands = ambiqmicro_command_handlers,
- .flash_bank_command = ambiqmicro_flash_bank_command,
- .erase = ambiqmicro_erase,
- .protect = ambiqmicro_protect,
- .write = ambiqmicro_write,
- .read = default_flash_read,
- .probe = ambiqmicro_probe,
- .auto_probe = ambiqmicro_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = ambiqmicro_protect_check,
- .info = get_ambiqmicro_info,
-};
[46/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_write.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_write.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_write.S
deleted file mode 100755
index 8435a20..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/lpcspifi_write.S
+++ /dev/null
@@ -1,222 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2012 by George Harris *
- * george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m3
- .thumb
- .thumb_func
-
-/*
- * Params :
- * r0 = workarea start, status (out)
- * r1 = workarea end
- * r2 = target address (offset from flash base)
- * r3 = count (bytes)
- * r4 = page size
- * Clobbered:
- * r7 - rp
- * r8 - wp, tmp
- * r9 - send/receive data
- * r10 - temp
- * r11 - current page end address
- */
-
-/*
- * This code is embedded within: src/flash/nor/lpcspifi.c as a "C" array.
- *
- * To rebuild:
- * arm-none-eabi-gcc -c lpcspifi_write.S
- * arm-none-eabi-objcopy -O binary lpcspifi_write.o lpcspifi_write.bin
- * xxd -c 8 -i lpcspifi_write.bin > lpcspifi_write.txt
- *
- * Then read and edit this result into the "C" source.
- */
-
-#define SSP_BASE_HIGH 0x4008
-#define SSP_BASE_LOW 0x3000
-#define SSP_CR0_OFFSET 0x00
-#define SSP_CR1_OFFSET 0x04
-#define SSP_DATA_OFFSET 0x08
-#define SSP_CPSR_OFFSET 0x10
-#define SSP_SR_OFFSET 0x0c
-
-#define SSP_CLOCK_BASE_HIGH 0x4005
-#define SSP_CLOCK_BASE_LOW 0x0000
-#define SSP_BRANCH_CLOCK_BASE_HIGH 0x4005
-#define SSP_BRANCH_CLOCK_BASE_LOW 0x2000
-#define SSP_BASE_CLOCK_OFFSET 0x94
-#define SSP_BRANCH_CLOCK_OFFSET 0x700
-
-#define IOCONFIG_BASE_HIGH 0x4008
-#define IOCONFIG_BASE_LOW 0x6000
-#define IOCONFIG_SCK_OFFSET 0x18c
-#define IOCONFIG_HOLD_OFFSET 0x190
-#define IOCONFIG_WP_OFFSET 0x194
-#define IOCONFIG_MISO_OFFSET 0x198
-#define IOCONFIG_MOSI_OFFSET 0x19c
-#define IOCONFIG_CS_OFFSET 0x1a0
-
-#define IO_BASE_HIGH 0x400f
-#define IO_BASE_LOW 0x4000
-#define IO_CS_OFFSET 0xab
-#define IODIR_BASE_HIGH 0x400f
-#define IODIR_BASE_LOW 0x6000
-#define IO_CS_DIR_OFFSET 0x14
-
-
-setup: /* Initialize SSP pins and module */
- mov.w r10, #IOCONFIG_BASE_LOW
- movt r10, #IOCONFIG_BASE_HIGH
- mov.w r8, #0xea
- str.w r8, [r10, #IOCONFIG_SCK_OFFSET] /* Configure SCK pin function */
- mov.w r8, #0x40
- str.w r8, [r10, #IOCONFIG_HOLD_OFFSET] /* Configure /HOLD pin function */
- mov.w r8, #0x40
- str.w r8, [r10, #IOCONFIG_WP_OFFSET] /* Configure /WP pin function */
- mov.w r8, #0xed
- str.w r8, [r10, #IOCONFIG_MISO_OFFSET] /* Configure MISO pin function */
- mov.w r8, #0xed
- str.w r8, [r10, #IOCONFIG_MOSI_OFFSET] /* Configure MOSI pin function */
- mov.w r8, #0x44
- str.w r8, [r10, #IOCONFIG_CS_OFFSET] /* Configure CS pin function */
-
- mov.w r10, #IODIR_BASE_LOW
- movt r10, #IODIR_BASE_HIGH
- mov.w r8, #0x800
- str r8, [r10, #IO_CS_DIR_OFFSET] /* Set CS as output */
- mov.w r10, #IO_BASE_LOW
- movt r10, #IO_BASE_HIGH
- mov.w r8, #0xff
- str.w r8, [r10, #IO_CS_OFFSET] /* Set CS high */
-
- mov.w r10, #SSP_CLOCK_BASE_LOW
- movt r10, #SSP_CLOCK_BASE_HIGH
- mov.w r8, #0x0000
- movt r8, #0x0100
- str.w r8, [r10, #SSP_BASE_CLOCK_OFFSET] /* Configure SSP0 base clock (use 12 MHz IRC) */
-
- mov.w r10, #SSP_BRANCH_CLOCK_BASE_LOW
- movt r10, #SSP_BRANCH_CLOCK_BASE_HIGH
- mov.w r8, #0x01
- str.w r8, [r10, #SSP_BRANCH_CLOCK_OFFSET] /* Configure (enable) SSP0 branch clock */
-
- mov.w r10, #SSP_BASE_LOW
- movt r10, #SSP_BASE_HIGH
- mov.w r8, #0x07
- str.w r8, [r10, #SSP_CR0_OFFSET] /* Set clock postscale */
- mov.w r8, #0x02
- str.w r8, [r10, #SSP_CPSR_OFFSET] /* Set clock prescale */
- str.w r8, [r10, #SSP_CR1_OFFSET] /* Enable SSP in SPI mode */
-
- mov.w r11, #0x00
-find_next_page_boundary:
- add r11, r4 /* Increment to the next page */
- cmp r11, r2
- /* If we have not reached the next page boundary after the target address, keep going */
- bls find_next_page_boundary
-write_enable:
- bl cs_down
- mov.w r9, #0x06 /* Send the write enable command */
- bl write_data
- bl cs_up
-
- bl cs_down
- mov.w r9, #0x05 /* Get status register */
- bl write_data
- mov.w r9, #0x00 /* Dummy data to clock in status */
- bl write_data
- bl cs_up
-
- tst r9, #0x02 /* If the WE bit isn't set, we have a problem. */
- beq error
-page_program:
- bl cs_down
- mov.w r9, #0x02 /* Send the page program command */
- bl write_data
-write_address:
- lsr r9, r2, #16 /* Send the current 24-bit write address, MSB first */
- bl write_data
- lsr r9, r2, #8
- bl write_data
- mov.w r9, r2
- bl write_data
-wait_fifo:
- ldr r8, [r0] /* read the write pointer */
- cmp r8, #0 /* if it's zero, we're gonzo */
- beq exit
- ldr r7, [r0, #4] /* read the read pointer */
- cmp r7, r8 /* wait until they are not equal */
- beq wait_fifo
-write:
- ldrb r9, [r7], #0x01 /* Load one byte from the FIFO, increment the read pointer by 1 */
- bl write_data /* send the byte to the flash chip */
-
- cmp r7, r1 /* wrap the read pointer if it is at the end */
- it cs
- addcs r7, r0, #8 /* skip loader args */
- str r7, [r0, #4] /* store the new read pointer */
- subs r3, r3, #1 /* decrement count */
- cbz r3, exit /* Exit if we have written everything */
-
- add r2, #1 /* Increment flash address by 1 */
- cmp r11, r2 /* See if we have reached the end of a page */
- bne wait_fifo /* If not, keep writing bytes */
- bl cs_up /* Otherwise, end the command and keep going w/ the next page */
- add r11, r4 /* Move up the end-of-page address by the page size*/
-wait_flash_busy: /* Wait for the flash to finish the previous page write */
- bl cs_down
- mov.w r9, #0x05 /* Get status register */
- bl write_data
- mov.w r9, #0x00 /* Dummy data to clock in status */
- bl write_data
- bl cs_up
- tst r9, #0x01 /* If it isn't done, keep waiting */
- bne wait_flash_busy
- b write_enable /* If it is done, start a new page write */
-write_data: /* Send/receive 1 byte of data over SSP */
- mov.w r10, #SSP_BASE_LOW
- movt r10, #SSP_BASE_HIGH
- str.w r9, [r10, #SSP_DATA_OFFSET] /* Write supplied data to the SSP data reg */
-wait_transmit:
- ldr r9, [r10, #SSP_SR_OFFSET] /* Check SSP status */
- tst r9, #0x0010 /* Check if BSY bit is set */
- bne wait_transmit /* If still transmitting, keep waiting */
- ldr r9, [r10, #SSP_DATA_OFFSET] /* Load received data */
- bx lr /* Exit subroutine */
-cs_up:
- mov.w r8, #0xff
- b cs_write
-cs_down:
- mov.w r8, #0x0000
-cs_write:
- mov.w r10, #IO_BASE_LOW
- movt r10, #IO_BASE_HIGH
- str.w r8, [r10, #IO_CS_OFFSET]
- bx lr
-error:
- movs r0, #0
- str r0, [r2, #4] /* set rp = 0 on error */
-exit:
- bl cs_up /* end the command before returning */
- mov r0, r6
- bkpt #0x00
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/mdr32fx.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/mdr32fx.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/mdr32fx.S
deleted file mode 100755
index 73f4b6f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/mdr32fx.S
+++ /dev/null
@@ -1,125 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * *
- * Copyright (C) 2013 by Paul Fertser *
- * fercerpav@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
- .thumb_func
- .global write
-
- /* Params:
- * r0 - flash base (in), status (out)
- * r1 - count (32bit)
- * r2 - workarea start
- * r3 - workarea end
- * r4 - target address
- * Clobbered:
- * r5 - rp
- * r6 - wp, tmp
- * r7 - current FLASH_CMD
- */
-
-#define FLASH_CMD 0x00
-#define FLASH_ADR 0x04
-#define FLASH_DI 0x08
-
-#define FLASH_NVSTR (1 << 13)
-#define FLASH_PROG (1 << 12)
-#define FLASH_MAS1 (1 << 11)
-#define FLASH_ERASE (1 << 10)
-#define FLASH_SE (1 << 8)
-#define FLASH_YE (1 << 7)
-#define FLASH_XE (1 << 6)
-
- ldr r7, [r0, #FLASH_CMD]
-wait_fifo:
- ldr r6, [r2, #0] /* read wp */
- cmp r6, #0 /* abort if wp == 0 */
- beq exit
- ldr r5, [r2, #4] /* read rp */
- cmp r5, r6 /* wait until rp != wp */
- beq wait_fifo
-
- ldr r6, [r5] /* "*target_address++ = *rp++" */
- str r4, [r0, #FLASH_ADR]
- str r6, [r0, #FLASH_DI]
-
- ldr r6, =(FLASH_XE | FLASH_PROG)
- orrs r7, r7, r6
- str r7, [r0, #FLASH_CMD]
- # wait 5us
- movs r6, #5
- bl delay
- ldr r6, =#FLASH_NVSTR
- orrs r7, r7, r6
- str r7, [r0, #FLASH_CMD]
- # wait 10us
- movs r6, #13
- bl delay
- movs r6, #FLASH_YE
- orrs r7, r7, r6
- str r7, [r0, #FLASH_CMD]
- # wait 40us
- movs r6, #61
- bl delay
- movs r6, #FLASH_YE
- bics r7, r7, r6
- str r7, [r0, #FLASH_CMD]
- ldr r6, =#FLASH_PROG
- bics r7, r7, r6
- str r7, [r0, #FLASH_CMD]
- # wait 5us
- movs r6, #5
- bl delay
- ldr r6, =#(FLASH_XE | FLASH_NVSTR)
- bics r7, r7, r6
- str r7, [r0, #FLASH_CMD]
-
- adds r5, #4
- adds r4, #4
-
- cmp r5, r3 /* wrap rp at end of buffer */
- bcc no_wrap
- mov r5, r2
- adds r5, #8
-no_wrap:
- str r5, [r2, #4] /* store rp */
- subs r1, r1, #1 /* decrement word count */
- cmp r1, #0
- beq exit /* loop if not done */
- b wait_fifo
-exit:
- mov r0, r6 /* return status in r0 */
- bkpt #0
-
- /* r6 - in
- * for r6 == 1 it'll take:
- * 1 (prepare operand) + 4 (bl) + 2 (subs+cmp) + 1 (bne) + 3 (b) ->
- * 11 tacts == 1.4us with 8MHz
- * every extra iteration will take 5 tacts == 0.6us */
-delay:
- subs r6, r6, #1
- cmp r6, #0
- bne delay
- bx lr
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/mrvlqspi_write.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/mrvlqspi_write.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/mrvlqspi_write.S
deleted file mode 100755
index 064192c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/mrvlqspi_write.S
+++ /dev/null
@@ -1,232 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2014 by Mahavir Jain <mj...@marvell.com> *
- * *
- * Adapted from (contrib/loaders/flash/lpcspifi_write.S): *
- * Copyright (C) 2012 by George Harris *
- * george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m3
- .thumb
- .thumb_func
-
-/*
- * For compilation:
- * arm-none-eabi-gcc -mcpu=cortex-m3 -mthumb -c contrib/loaders/flash/mrvlqspi_write.S
- * arm-none-eabi-objcopy -O binary mrvlqspi_write.o code.bin
- * Copy code.bin into mrvlqspi flash driver
- */
-
-/*
- * Params :
- * r0 = workarea start, status (out)
- * r1 = workarea end
- * r2 = target address (offset from flash base)
- * r3 = count (bytes)
- * r4 = page size
- * r5 = qspi base address
- * Clobbered:
- * r7 - rp
- * r8 - wp, tmp
- * r9 - send/receive data
- * r10 - current page end address
- */
-
-#define CNTL 0x0
-#define CONF 0x4
-#define DOUT 0x8
-#define DIN 0xc
-#define INSTR 0x10
-#define ADDR 0x14
-#define RDMODE 0x18
-#define HDRCNT 0x1c
-#define DINCNT 0x20
-
-#define SS_EN (1 << 0)
-#define XFER_RDY (1 << 1)
-#define RFIFO_EMPTY (1 << 4)
-#define WFIFO_EMPTY (1 << 6)
-#define WFIFO_FULL (1 << 7)
-#define FIFO_FLUSH (1 << 9)
-#define RW_EN (1 << 13)
-#define XFER_STOP (1 << 14)
-#define XFER_START (1 << 15)
-
-#define INS_WRITE_ENABLE 0x06
-#define INS_READ_STATUS 0x05
-#define INS_PAGE_PROGRAM 0x02
-
-init:
- mov.w r10, #0x00
-find_next_page_boundary:
- add r10, r4 /* Increment to the next page */
- cmp r10, r2
- /* If we have not reached the next page boundary after the target address, keep going */
- bls find_next_page_boundary
-write_enable:
- /* Flush read/write fifo's */
- bl flush_fifo
-
- /* Instruction byte 1 */
- movs r8, #0x1
- str r8, [r5, #HDRCNT]
-
- /* Set write enable instruction */
- movs r8, #INS_WRITE_ENABLE
- str r8, [r5, #INSTR]
-
- movs r9, #0x1
- bl start_tx
- bl stop_tx
-page_program:
- /* Instruction byte 1, Addr byte 3 */
- movs r8, #0x31
- str r8, [r5, #HDRCNT]
- /* Todo: set addr and data pin to single */
-write_address:
- mov r8, r2
- str r8, [r5, #ADDR]
- /* Set page program instruction */
- movs r8, #INS_PAGE_PROGRAM
- str r8, [r5, #INSTR]
- /* Start write transfer */
- movs r9, #0x1
- bl start_tx
-wait_fifo:
- ldr r8, [r0] /* read the write pointer */
- cmp r8, #0 /* if it's zero, we're gonzo */
- beq exit
- ldr r7, [r0, #4] /* read the read pointer */
- cmp r7, r8 /* wait until they are not equal */
- beq wait_fifo
-write:
- ldrb r9, [r7], #0x01 /* Load one byte from the FIFO, increment the read pointer by 1 */
- bl write_data /* send the byte to the flash chip */
-
- cmp r7, r1 /* wrap the read pointer if it is at the end */
- it cs
- addcs r7, r0, #8 /* skip loader args */
- str r7, [r0, #4] /* store the new read pointer */
- subs r3, r3, #1 /* decrement count */
- cmp r3, #0 /* Exit if we have written everything */
- beq write_wait
- add r2, #1 /* Increment flash address by 1 */
- cmp r10, r2 /* See if we have reached the end of a page */
- bne wait_fifo /* If not, keep writing bytes */
-write_wait:
- bl stop_tx /* Otherwise, end the command and keep going w/ the next page */
- add r10, r4 /* Move up the end-of-page address by the page size*/
-check_flash_busy: /* Wait for the flash to finish the previous page write */
- /* Flush read/write fifo's */
- bl flush_fifo
- /* Instruction byte 1 */
- movs r8, #0x1
- str r8, [r5, #HDRCNT]
- /* Continuous data in of status register */
- movs r8, #0x0
- str r8, [r5, #DINCNT]
- /* Set write enable instruction */
- movs r8, #INS_READ_STATUS
- str r8, [r5, #INSTR]
- /* Start read transfer */
- movs r9, #0x0
- bl start_tx
-wait_flash_busy:
- bl read_data
- and.w r9, r9, #0x1
- cmp r9, #0x0
- bne.n wait_flash_busy
- bl stop_tx
- cmp r3, #0
- bne.n write_enable /* If it is done, start a new page write */
- b exit /* All data written, exit */
-
-write_data: /* Send/receive 1 byte of data over QSPI */
- ldr r8, [r5, #CNTL]
- lsls r8, r8, #24
- bmi.n write_data
- str r9, [r5, #DOUT]
- bx lr
-
-read_data: /* Read 1 byte of data over QSPI */
- ldr r8, [r5, #CNTL]
- lsls r8, r8, #27
- bmi.n read_data
- ldr r9, [r5, #DIN]
- bx lr
-
-flush_fifo: /* Flush read write fifos */
- ldr r8, [r5, #CONF]
- orr.w r8, r8, #FIFO_FLUSH
- str r8, [r5, #CONF]
-flush_reset:
- ldr r8, [r5, #CONF]
- lsls r8, r8, #22
- bmi.n flush_reset
- bx lr
-
-start_tx:
- ldr r8, [r5, #CNTL]
- orr.w r8, r8, #SS_EN
- str r8, [r5, #CNTL]
-xfer_rdy:
- ldr r8, [r5, #CNTL]
- lsls r8, r8, #30
- bpl.n xfer_rdy
- ldr r8, [r5, #CONF]
- bfi r8, r9, #13, #1
- orr.w r8, r8, #XFER_START
- str r8, [r5, #CONF]
- bx lr
-
-stop_tx:
- ldr r8, [r5, #CNTL]
- lsls r8, r8, #30
- bpl.n stop_tx
-wfifo_wait:
- ldr r8, [r5, #CNTL]
- lsls r8, r8, #25
- bpl.n wfifo_wait
- ldr r8, [r5, #CONF]
- orr.w r8, r8, #XFER_STOP
- str r8, [r5, #CONF]
-xfer_start:
- ldr r8, [r5, #CONF]
- lsls r8, r8, #16
- bmi.n xfer_start
-ss_disable:
- # Disable SS_EN
- ldr r8, [r5, #CNTL]
- bic.w r8, r8, #SS_EN
- str r8, [r5, #CNTL]
-wait:
- ldr r8, [r5, #CNTL]
- lsls r8, r8, #30
- bpl.n wait
- bx lr
-
-error:
- movs r0, #0
- str r0, [r2, #4] /* set rp = 0 on error */
-exit:
- mov r0, r6
- bkpt #0x00
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/pic32mx.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/pic32mx.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/pic32mx.s
deleted file mode 100755
index 9f41965..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/pic32mx.s
+++ /dev/null
@@ -1,132 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arch m4k
- .set noreorder
- .set noat
-
-/* params:
- * $a0 src adr - ram + result
- * $a1 dest adr - flash
- * $a2 count (32bit words)
- * vars
- *
- * temps:
- * $t0, $t1, $t2, $t3, $t4, $t5
- * $s0, $s1, $s3, $s4, $s5
- */
-
- .type main, @function
- .global main
-
-.ent main
-main:
- /* setup constants */
- lui $t0, 0xaa99
- ori $t0, 0x6655 /* NVMKEY1 */
- lui $t1, 0x5566
- ori $t1, 0x99AA /* NVMKEY2 */
- lui $t2, 0xBF80
- ori $t2, 0xF400 /* NVMCON */
- ori $t3, $zero, 0x4003 /* NVMCON row write cmd */
- ori $t4, $zero, 0x8000 /* NVMCON start cmd */
-
-write_row:
- /* can we perform a row write: 128 32bit words */
- sltiu $s3, $a2, 128
- bne $s3, $zero, write_word
- ori $t5, $zero, 0x4000 /* NVMCON clear cmd */
-
- /* perform row write 512 bytes */
- sw $a1, 32($t2) /* set NVMADDR with dest addr - real addr */
- sw $a0, 64($t2) /* set NVMSRCADDR with src addr - real addr */
-
- bal progflash
- addiu $a0, $a0, 512
- addiu $a1, $a1, 512
- beq $zero, $zero, write_row
- addiu $a2, $a2, -128
-
-write_word:
- /* write 32bit words */
- lui $s5, 0xa000
- ori $s5, 0x0000
- or $a0, $a0, $s5 /* convert to virtual addr */
-
- beq $zero, $zero, next_word
- ori $t3, $zero, 0x4001 /* NVMCON word write cmd */
-
-prog_word:
- lw $s4, 0($a0) /* load data - from virtual addr */
- sw $s4, 48($t2) /* set NVMDATA with data */
- sw $a1, 32($t2) /* set NVMADDR with dest addr - real addr */
-
- bal progflash
- addiu $a0, $a0, 4
- addiu $a1, $a1, 4
- addiu $a2, $a2, -1
-next_word:
- bne $a2, $zero, prog_word
- nop
-
-done:
- beq $zero, $zero, exit
- addiu $a0, $zero, 0
-
-error:
- /* save result to $a0 */
- addiu $a0, $s1, 0
-
-exit:
- sdbbp
-.end main
-
- .type progflash, @function
- .global progflash
-
-.ent progflash
-progflash:
- sw $t3, 0($t2) /* set NVMWREN */
- sw $t0, 16($t2) /* write NVMKEY1 */
- sw $t1, 16($t2) /* write NVMKEY2 */
- sw $t4, 8($t2) /* start operation */
-
-waitflash:
- lw $s0, 0($t2)
- and $s0, $s0, $t4
- bne $s0, $zero, waitflash
- nop
-
- /* following is to comply with errata #34
- * 500ns delay required */
- nop
- nop
- nop
- nop
- /* check for errors */
- lw $s1, 0($t2)
- andi $s1, $zero, 0x3000
- bne $s1, $zero, error
- sw $t5, 4($t2) /* clear NVMWREN */
- jr $ra
- nop
-
-.end progflash
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/sim3x.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/sim3x.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/sim3x.s
deleted file mode 100755
index cdb3ef6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/sim3x.s
+++ /dev/null
@@ -1,81 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2014 by Ladislav B�bel *
- * ladababel@seznam.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
-#define INITIAL_UNLOCK 0x5A
-#define MULTIPLE_UNLOCK 0xF2
-
-#define FLASHCTRL_KEY 0x4002E0C0
-#define FLASHCTRL_CONFIG 0x4002E000
-#define FLASHCTRL_WRADDR 0x4002E0A0
-#define FLASHCTRL_WRDATA 0x4002E0B0
-#define BUSYF 0x00100000
-
-
- /* Write the initial unlock value to KEY (0xA5) */
- movs r6, #INITIAL_UNLOCK
- str r6, [r0, #FLASHCTRL_KEY]
-
- /* Write the multiple unlock value to KEY (0xF2) */
- movs r6, #MULTIPLE_UNLOCK
- str r6, [r0, #FLASHCTRL_KEY]
-
-wait_fifo:
- ldr r6, [r2, #0]
- cmp r6, #0
- beq exit
- ldr r5, [r2, #4]
- cmp r5, r6
- beq wait_fifo
-
- /* wait for BUSYF flag */
-wait_busy1:
- ldr r6, [r0, #FLASHCTRL_CONFIG]
- tst r6, #BUSYF
- bne wait_busy1
-
- /* Write the destination address to WRADDR */
- str r4, [r0, #FLASHCTRL_WRADDR]
-
- /* Write the data half-word to WRDATA in right-justified format */
- ldrh r6, [r5]
- str r6, [r0, #FLASHCTRL_WRDATA]
-
- adds r5, #2
- adds r4, #2
-
- /* wrap rp at end of buffer */
- cmp r5, r3
- bcc no_wrap
- mov r5, r2
- adds r5, #8
-
-no_wrap:
- str r5, [r2, #4]
- subs r1, r1, #1
- cmp r1, #0
- beq exit
- b wait_fifo
-
-exit:
- movs r6, #MULTIPLE_LOCK
- str r6, [r0, #FLASHCTRL_KEY]
-
- /* wait for BUSYF flag */
-wait_busy2:
- ldr r6, [r0, #FLASHCTRL_CONFIG]
- tst r6, #BUSYF
- bne wait_busy2
-
- bkpt #0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stellaris.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stellaris.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stellaris.s
deleted file mode 100755
index 6e1ed69..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stellaris.s
+++ /dev/null
@@ -1,78 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Magnus Lundin *
- * lundin@mlu.mine.nu *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m3
- .thumb
- .thumb_func
-
-/*
- * Params :
- * r0 = workarea start
- * r1 = workarea end
- * r2 = target address
- * r3 = count (32bit words)
- *
- * Clobbered:
- * r4 = pFLASH_CTRL_BASE
- * r5 = FLASHWRITECMD
- * r7 - rp
- * r8 - wp, tmp
- */
-
-write:
- ldr r4, pFLASH_CTRL_BASE
- ldr r5, FLASHWRITECMD
-
-wait_fifo:
- ldr r8, [r0, #0] /* read wp */
- cmp r8, #0 /* abort if wp == 0 */
- beq exit
- ldr r7, [r0, #4] /* read rp */
- cmp r7, r8 /* wait until rp != wp */
- beq wait_fifo
-
-mainloop:
- str r2, [r4, #0] /* FMA - write address */
- add r2, r2, #4 /* increment target address */
- ldr r8, [r7], #4
- str r8, [r4, #4] /* FMD - write data */
- str r5, [r4, #8] /* FMC - enable write */
-busy:
- ldr r8, [r4, #8]
- tst r8, #1
- bne busy
-
- cmp r7, r1 /* wrap rp at end of buffer */
- it cs
- addcs r7, r0, #8 /* skip loader args */
- str r7, [r0, #4] /* store rp */
- subs r3, r3, #1 /* decrement word count */
- cbz r3, exit /* loop if not done */
- b wait_fifo
-exit:
- bkpt #0
-
-pFLASH_CTRL_BASE: .word 0x400FD000
-FLASHWRITECMD: .word 0xA4420001
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32f1x.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32f1x.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32f1x.S
deleted file mode 100755
index 5ce463d..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32f1x.S
+++ /dev/null
@@ -1,76 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
- .thumb_func
- .global write
-
- /* Params:
- * r0 - flash base (in), status (out)
- * r1 - count (halfword-16bit)
- * r2 - workarea start
- * r3 - workarea end
- * r4 - target address
- * Clobbered:
- * r5 - rp
- * r6 - wp, tmp
- * r7 - tmp
- */
-
-#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register from flash reg base */
-
-wait_fifo:
- ldr r6, [r2, #0] /* read wp */
- cmp r6, #0 /* abort if wp == 0 */
- beq exit
- ldr r5, [r2, #4] /* read rp */
- cmp r5, r6 /* wait until rp != wp */
- beq wait_fifo
- ldrh r6, [r5] /* "*target_address++ = *rp++" */
- strh r6, [r4]
- adds r5, #2
- adds r4, #2
-busy:
- ldr r6, [r0, #STM32_FLASH_SR_OFFSET] /* wait until BSY flag is reset */
- movs r7, #1
- tst r6, r7
- bne busy
- movs r7, #0x14 /* check the error bits */
- tst r6, r7
- bne error
- cmp r5, r3 /* wrap rp at end of buffer */
- bcc no_wrap
- mov r5, r2
- adds r5, #8
-no_wrap:
- str r5, [r2, #4] /* store rp */
- subs r1, r1, #1 /* decrement halfword count */
- cmp r1, #0
- beq exit /* loop if not done */
- b wait_fifo
-error:
- movs r0, #0
- str r0, [r2, #4] /* set rp = 0 on error */
-exit:
- mov r0, r6 /* return status in r0 */
- bkpt #0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32f2x.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32f2x.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32f2x.S
deleted file mode 100755
index 0dd1223..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32f2x.S
+++ /dev/null
@@ -1,81 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m3
- .thumb
- .thumb_func
-
-/*
- * Params :
- * r0 = workarea start, status (out)
- * r1 = workarea end
- * r2 = target address
- * r3 = count (16bit words)
- * r4 = flash base
- *
- * Clobbered:
- * r6 - temp
- * r7 - rp
- * r8 - wp, tmp
- */
-
-#define STM32_FLASH_CR_OFFSET 0x10 /* offset of CR register in FLASH struct */
-#define STM32_FLASH_SR_OFFSET 0x0c /* offset of SR register in FLASH struct */
-
-wait_fifo:
- ldr r8, [r0, #0] /* read wp */
- cmp r8, #0 /* abort if wp == 0 */
- beq exit
- ldr r7, [r0, #4] /* read rp */
- cmp r7, r8 /* wait until rp != wp */
- beq wait_fifo
-
- ldr r6, STM32_PROG16
- str r6, [r4, #STM32_FLASH_CR_OFFSET]
- ldrh r6, [r7], #0x02 /* read one half-word from src, increment ptr */
- strh r6, [r2], #0x02 /* write one half-word from src, increment ptr */
- dsb
-busy:
- ldr r6, [r4, #STM32_FLASH_SR_OFFSET]
- tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */
- bne busy /* wait more... */
- tst r6, #0xf0 /* PGSERR | PGPERR | PGAERR | WRPERR */
- bne error /* fail... */
-
- cmp r7, r1 /* wrap rp at end of buffer */
- it cs
- addcs r7, r0, #8 /* skip loader args */
- str r7, [r0, #4] /* store rp */
- subs r3, r3, #1 /* decrement halfword count */
- cbz r3, exit /* loop if not done */
- b wait_fifo
-error:
- movs r1, #0
- str r1, [r0, #4] /* set rp = 0 on error */
-exit:
- mov r0, r6 /* return status in r0 */
- bkpt #0x00
-
-STM32_PROG16: .word 0x101 /* PG | PSIZE_16*/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32l4x.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32l4x.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32l4x.S
deleted file mode 100755
index 799dec5..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32l4x.S
+++ /dev/null
@@ -1,100 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2015 Uwe Bonnes *
- * bon@elektron.ikp.physik.tu-darmstadt.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .cpu cortex-m4
- .thumb
- .thumb_func
-
-/* To assemble:
- * arm-none-eabi-gcc -c stm32l4x.S
- *
- * To disassemble:
- * arm-none-eabi-objdump -o stm32l4x.o
- *
- * To generate binary file:
- * arm-none-eabi-objcopy -O binary stm32l4x.o stm32l4_flash_write_code.bin
- *
- * To generate include file:
- * xxd -i stm32l4_flash_write_code.bin
- */
-
-/*
- * Params :
- * r0 = workarea start, status (out)
- * r1 = workarea end
- * r2 = target address
- * r3 = count (64bit words)
- * r4 = flash base
- *
- * Clobbered:
- * r5 - rp
- * r6/7 - temp (64-bit)
- * r8 - wp, tmp
- */
-
-#define STM32_FLASH_CR_OFFSET 0x14 /* offset of CR register in FLASH struct */
-#define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */
-
-wait_fifo:
- ldr r8, [r0, #0] /* read wp */
- cmp r8, #0 /* abort if wp == 0 */
- beq exit
- ldr r5, [r0, #4] /* read rp */
- subs r6, r8, r5 /* number of bytes available for read in r6*/
- itt mi /* if wrapped around*/
- addmi r6, r1 /* add size of buffer */
- submi r6, r0
- cmp r6, #8 /* wait until 8 bytes are available */
- bcc wait_fifo
-
- ldr r6, STM32_PROG
- str r6, [r4, #STM32_FLASH_CR_OFFSET]
- ldrd r6, [r5], #0x08 /* read one word from src, increment ptr */
- strd r6, [r2], #0x08 /* write one word to dst, increment ptr */
- dsb
-busy:
- ldr r6, [r4, #STM32_FLASH_SR_OFFSET]
- tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */
- bne busy /* wait more... */
- tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/
- bne error /* fail... */
-
- cmp r5, r1 /* wrap rp at end of buffer */
- it cs
- addcs r5, r0, #8 /* skip loader args */
- str r5, [r0, #4] /* store rp */
- subs r3, r3, #1 /* decrement dword count */
- cbz r3, exit /* loop if not done */
- b wait_fifo
-error:
- movs r1, #0
- str r1, [r0, #4] /* set rp = 0 on error */
-exit:
- mov r0, r6 /* return status in r0 */
- bkpt #0x00
-
-STM32_PROG: .word 0x1 /* PG */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32lx.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32lx.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32lx.S
deleted file mode 100755
index 88deed3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/stm32lx.S
+++ /dev/null
@@ -1,63 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2011 Clement Burin des Roziers *
- * clement.burin-des-roziers@hikob.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-
-// Build : arm-eabi-gcc -c stm32lx.S
- .text
- .syntax unified
- .cpu cortex-m3
- .thumb
- .thumb_func
- .global write
-
-/*
- r0 - destination address
- r1 - source address
- r2 - count
-*/
-
- // Set 0 to r3
- movs r3, #0
- // Go to compare
- b.n test_done
-
-write_word:
- // Load one word from address in r0, increment by 4
- ldr.w ip, [r1], #4
- // Store the word to address in r1, increment by 4
- str.w ip, [r0], #4
- // Increment r3
- adds r3, #1
-
-test_done:
- // Compare r3 and r2
- cmp r3, r2
- // Loop if not zero
- bcc.n write_word
-
- // Set breakpoint to exit
- bkpt #0x00
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/str7x.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/str7x.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/str7x.s
deleted file mode 100755
index a163ee6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/str7x.s
+++ /dev/null
@@ -1,59 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv4t
-
- .section .init
-/*
- r0 source address
- r1 address
- r2 FLASH_CR0
- r3 dword count
- r4 result
- r5 busy mask
-*/
-
-write:
- mov r4, #0x10000000 /* set DWPG bit */
- str r4, [r2, #0x0] /* FLASH_CR0 */
- str r1, [r2, #0x10] /* FLASH_AR */
- ldr r4, [r0], #4 /* load data */
- str r4, [r2, #0x8] /* FLASH_DR0 */
- ldr r4, [r0], #4 /* load data */
- str r4, [r2, #0xc] /* FLASH_DR1 */
- mov r4, #0x90000000 /* set DWPG and WMS bits */
- str r4, [r2, #0x0] /* FLASH_CR0 */
-busy:
- ldr r4, [r2, #0x0] /* FLASH_CR0 */
- tst r4, r5
- bne busy
- ldr r4, [r2, #0x14] /* FLASH_ER */
- tst r4, #0xff /* do we have errors */
- tsteq r4, #0x100 /* write protection set */
- bne exit
- add r1, r1, #0x8 /* next 8 bytes */
- subs r3, r3, #1 /* decremment dword count */
- bne write
-exit:
- b exit
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/str9x.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/str9x.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/str9x.s
deleted file mode 100755
index 4daac77..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/str9x.s
+++ /dev/null
@@ -1,56 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv5t
-
- .section .init
-/*
- r0 source address (in)
- r1 target address (in)
- r2 word count (in)
- r3 result (out)
-*/
-
-write:
- bic r4, r1, #3 /* word address */
- mov r3, #0x40 /* write command */
- strh r3, [r4, #0]
- ldrh r3, [r0], #2 /* read data */
- strh r3, [r1], #2 /* write data */
- mov r3, #0x70 /* status command */
- strh r3, [r4, #0]
-busy:
- ldrb r3, [r4, #0] /* status */
- tst r3, #0x80
- beq busy
- mov r5, #0x50 /* clear status command */
- strh r5, [r4, #0]
- mov r5, #0xFF /* read array */
- strh r5, [r4, #0]
- tst r3, #0x12
- bne exit
- subs r2, r2, #1 /* decremment word count */
- bne write
-exit:
- bkpt #0
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase.S
deleted file mode 100755
index e5a4808..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase.S
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Infineon XMC1000 flash sectors erase
- *
- * Copyright (c) 2016 Andreas F�rber
- *
- * Based on XMC1100 AA-Step Reference Manual
- *
- * License: GPL-2.0+
- */
-
-#include "xmc1xxx.S"
-
-#define DUMMY_VALUE 0x42
-
- .macro erase_page, nvmbase, addr, tmp, tmp2
-
- movs \tmp, #DUMMY_VALUE
- str \tmp, [\addr]
-
- busy_wait \nvmbase, \tmp, \tmp2
-
- .endm
-
-
- .macro erase, nvmbase, addr, end, tmp, tmp2
-
- movs \tmp, #NVMPROG_ACTION_PAGE_ERASE_CONTINUOUS
- strh \tmp, [\nvmbase, #NVMPROG]
-2001:
- erase_page \nvmbase, \addr, \tmp, \tmp2
-
- movs \tmp, #(NVM_PAGE_SIZE - 1)
- adds \tmp, \tmp, #1
- add \addr, \addr, \tmp
- cmp \addr, \end
- blt 2001b
-
- movs \tmp, #NVMPROG_ACTION_IDLE
- strh \tmp, [\nvmbase, #NVMPROG]
-
- .endm
-
-
- /*
- * r0 = 0x40050000
- * r1 = e.g. 0x10001000
- * r2 = e.g. 0x10011000
- * NVMPROG.ACTION = 0x00
- */
-erase:
- erase r0, r1, r2, r3, r4
-
- bkpt #0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase.inc
deleted file mode 100755
index b33e57d..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase.inc
+++ /dev/null
@@ -1,4 +0,0 @@
-/* Autogenerated with ../../../../src/helper/bin2char.sh */
-0xa2,0x23,0x83,0x80,0x42,0x23,0x0b,0x60,0x03,0x88,0x01,0x24,0x23,0x40,0xa3,0x42,
-0xfa,0xd0,0xff,0x23,0x01,0x33,0x19,0x44,0x91,0x42,0xf3,0xdb,0x00,0x23,0x83,0x80,
-0x00,0xbe,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase_check.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase_check.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase_check.S
deleted file mode 100755
index 6c99344..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase_check.S
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Infineon XMC1000 flash sector erase check
- *
- * Copyright (c) 2016 Andreas F�rber
- *
- * Based on XMC1100 AA-Step Reference Manual
- *
- * License: GPL-2.0+
- */
-
-#include "xmc1xxx.S"
-
- .macro verify_block, nvmbase, addr, tmp, tmp2
-
- movs \tmp, #0x00
- mvns \tmp, \tmp
- str \tmp, [\addr, #0x0]
- str \tmp, [\addr, #0x4]
- str \tmp, [\addr, #0x8]
- str \tmp, [\addr, #0xC]
-
- busy_wait \nvmbase, \tmp, \tmp2
-
- .endm
-
-
- .macro erase_check, nvmbase, addr, end, tmp, tmp2
-
- ldrh \tmp, [\nvmbase, #NVMCONF]
- movs \tmp2, #NVMCONF_HRLEV_MASK
- mvns \tmp2, \tmp2
- ands \tmp, \tmp, \tmp2
- movs \tmp2, #NVMCONF_HRLEV_HRE
- orrs \tmp, \tmp, \tmp2
- strh \tmp, [\nvmbase, #NVMCONF]
-
- movs \tmp, #NVMPROG_ACTION_VERIFY_CONTINUOUS
- strh \tmp, [\nvmbase, #NVMPROG]
-2001:
- verify_block \nvmbase, \addr, \tmp, \tmp2
-
- ldrh \tmp, [\nvmbase, #NVMSTATUS]
- movs \tmp2, #NVMSTATUS_VERR_MASK
- ands \tmp, \tmp, \tmp2
- cmp \tmp, #NVMSTATUS_VERR_NOFAIL
- bne 2010f
-
- adds \addr, \addr, #NVM_BLOCK_SIZE
- cmp \addr, \end
- blt 2001b
-2010:
- movs \tmp, #NVMPROG_ACTION_IDLE
- strh \tmp, [\nvmbase, #NVMPROG]
-
- .endm
-
-
- /*
- * r0 = 0x40050000
- * r1 = e.g. 0x10001000
- * r2 = e.g. 0x10002000
- * NVMPROG.ACTION = 0x00
- */
-erase_check:
- erase_check r0, r1, r2, r3, r4
-
- bkpt #0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase_check.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase_check.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase_check.inc
deleted file mode 100755
index 8fc8e0b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/erase_check.inc
+++ /dev/null
@@ -1,5 +0,0 @@
-/* Autogenerated with ../../../../src/helper/bin2char.sh */
-0x03,0x89,0x06,0x24,0xe4,0x43,0x23,0x40,0x04,0x24,0x23,0x43,0x03,0x81,0xe0,0x23,
-0x83,0x80,0x00,0x23,0xdb,0x43,0x0b,0x60,0x4b,0x60,0x8b,0x60,0xcb,0x60,0x03,0x88,
-0x01,0x24,0x23,0x40,0xa3,0x42,0xfa,0xd0,0x03,0x88,0x0c,0x24,0x23,0x40,0x00,0x2b,
-0x02,0xd1,0x10,0x31,0x91,0x42,0xec,0xdb,0x00,0x23,0x83,0x80,0x00,0xbe,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/write.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/write.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/write.S
deleted file mode 100755
index 640f6ca..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/write.S
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Infineon XMC1000 flash write
- *
- * Copyright (c) 2016 Andreas F�rber
- *
- * Based on XMC1100 AA-Step Reference Manual
- *
- * License: GPL-2.0+
- */
-
-#include "xmc1xxx.S"
-
- .macro write_block, nvmbase, dest, src, tmp, tmp2
-
- ldr \tmp, [\src, #0x0]
- str \tmp, [\dest, #0x0]
- ldr \tmp, [\src, #0x4]
- str \tmp, [\dest, #0x4]
- ldr \tmp, [\src, #0x8]
- str \tmp, [\dest, #0x8]
- ldr \tmp, [\src, #0xc]
- str \tmp, [\dest, #0xc]
-
- busy_wait \nvmbase, \tmp, \tmp2
-
- .endm
-
-
- .macro write, nvmbase, dest, src, count, tmp, tmp2
-
- movs \tmp, #NVMPROG_ACTION_WRITE_CONTINUOUS
- strh \tmp, [\nvmbase, #NVMPROG]
-1001:
- write_block \nvmbase, \dest, \src, \tmp, \tmp2
-
- adds \dest, \dest, #NVM_BLOCK_SIZE
- adds \src, \src, #NVM_BLOCK_SIZE
- subs \count, \count, #1
- cmp \count, #0
- bgt 1001b
-
- movs \tmp, #NVMPROG_ACTION_IDLE
- strh \tmp, [\nvmbase, #NVMPROG]
-
- .endm
-
-
- /*
- * r0 = 0x40050000
- * r1 = e.g. 0x10001000
- * r2 = e.g. 0x20000000
- * r3 = e.g. 1
- * NVMPROG.ACTION = 0x00
- */
-write:
- write r0, r1, r2, r3, r4, r5
-
- bkpt #0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/write.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/write.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/write.inc
deleted file mode 100755
index 8272bb7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/write.inc
+++ /dev/null
@@ -1,4 +0,0 @@
-/* Autogenerated with ../../../../src/helper/bin2char.sh */
-0xa1,0x24,0x84,0x80,0x14,0x68,0x0c,0x60,0x54,0x68,0x4c,0x60,0x94,0x68,0x8c,0x60,
-0xd4,0x68,0xcc,0x60,0x04,0x88,0x01,0x25,0x2c,0x40,0xac,0x42,0xfa,0xd0,0x10,0x31,
-0x10,0x32,0x01,0x3b,0x00,0x2b,0xed,0xdc,0x00,0x24,0x84,0x80,0x00,0xbe,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/xmc1xxx.S
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/xmc1xxx.S b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/xmc1xxx.S
deleted file mode 100755
index dfe7d3f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/xmc1xxx/xmc1xxx.S
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Infineon XMC1000 flash
- *
- * Copyright (c) 2016 Andreas F�rber
- *
- * Based on XMC1100 AA-Step Reference Manual
- *
- * License: GPL-2.0+
- */
-
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
- .thumb_func
-
-#define NVMSTATUS 0x00
-#define NVMPROG 0x04
-#define NVMCONF 0x08
-
-#define NVMSTATUS_BUSY (1 << 0)
-#define NVMSTATUS_VERR_NOFAIL (0x0 << 2)
-#define NVMSTATUS_VERR_MASK (0x3 << 2)
-
-#define NVMPROG_ACTION_IDLE 0x00
-#define NVMPROG_ACTION_WRITE_CONTINUOUS 0xA1
-#define NVMPROG_ACTION_PAGE_ERASE_CONTINUOUS 0xA2
-#define NVMPROG_ACTION_VERIFY_CONTINUOUS 0xE0
-
-#define NVMCONF_HRLEV_NR (0x0 << 1)
-#define NVMCONF_HRLEV_HRE (0x2 << 1)
-#define NVMCONF_HRLEV_MASK (0x3 << 1)
-
-#define NVM_WORD_SIZE 4
-#define NVM_BLOCK_SIZE (4 * NVM_WORD_SIZE)
-#define NVM_PAGE_SIZE (16 * NVM_BLOCK_SIZE)
-
- .macro busy_wait, nvmbase, tmp, tmp2
-1:
- ldrh \tmp, [\nvmbase, #NVMSTATUS]
- movs \tmp2, #NVMSTATUS_BUSY
- ands \tmp, \tmp, \tmp2
- cmp \tmp, \tmp2
- beq 1b
-
- .endm
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/watchdog/armv7m_kinetis_wdog.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/watchdog/armv7m_kinetis_wdog.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/watchdog/armv7m_kinetis_wdog.inc
deleted file mode 100755
index 4b6579e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/watchdog/armv7m_kinetis_wdog.inc
+++ /dev/null
@@ -1,4 +0,0 @@
-/* Autogenerated with ../../../src/helper/bin2char.sh */
-0x04,0x4b,0x05,0x4a,0xda,0x81,0x05,0x4a,0xda,0x81,0x01,0x24,0x1a,0x88,0xa2,0x43,
-0x1a,0x80,0x06,0xe0,0x00,0x20,0x05,0x40,0x20,0xc5,0x00,0x00,0x28,0xd9,0x00,0x00,
-0x00,0x00,0x00,0xbe,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/watchdog/armv7m_kinetis_wdog.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/watchdog/armv7m_kinetis_wdog.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/watchdog/armv7m_kinetis_wdog.s
deleted file mode 100755
index bac924a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/watchdog/armv7m_kinetis_wdog.s
+++ /dev/null
@@ -1,64 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 Tomas Vanek *
- * vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
- ***************************************************************************/
-
-/*
- Disable watchdog for Kinetis Kx and KVx
- Parameters: none
- Used instruction set should work on both Cortex-M4 and M0+
-*/
-
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
-
-WDOG_ADDR = 0x40052000
-/* WDOG registers offsets */
-WDOG_STCTRLH = 0
-WDOG_UNLOCK = 0x0e
-
-WDOG_KEY1 = 0xc520
-WDOG_KEY2 = 0xd928
-
- .thumb_func
-start:
-/* WDOG_UNLOCK = 0xC520 */
- ldr r3, =WDOG_ADDR
- ldr r2, =WDOG_KEY1
- strh r2, [r3, WDOG_UNLOCK]
-/* WDOG_UNLOCK = 0xD928 */
- ldr r2, =WDOG_KEY2
- strh r2, [r3, WDOG_UNLOCK]
-/* WDOG_STCTRLH clear bit 0 */
- movs r4, #1
- ldrh r2, [r3, WDOG_STCTRLH]
- bics r2, r4
- strh r2, [r3, WDOG_STCTRLH]
-/* OpenOCD checks exit point address. Jump to the very end. */
- b done
-
- .pool
-
-/* Avoid padding at .text segment end. Otherwise exit point check fails. */
- .skip ( . - start + 2) & 2, 0
-done:
- bkpt #0
-
- .end
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c
deleted file mode 100755
index e59a1bd..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/remote_bitbang/remote_bitbang_sysfsgpio.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 Paul Fertser <fe...@gmail.com> *
- * Copyright (C) 2012 by Creative Product Design, marc @ cpdesign.com.au *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- This is a test application to be used as a remote bitbang server for
- the OpenOCD remote_bitbang interface driver.
-
- To compile run:
- gcc -Wall -ansi -pedantic -std=c99 -o remote_bitbang_sysfsgpio remote_bitbang_sysfsgpio.c
-
-
- Usage example:
-
- On Raspberry Pi run:
- socat TCP6-LISTEN:7777,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
-
- On host run:
- openocd -c "interface remote_bitbang; remote_bitbang_host raspberrypi; remote_bitbang_port 7777" \
- -f target/stm32f1x.cfg
-
- Or if you want to test UNIX sockets, run both on Raspberry Pi:
- socat UNIX-LISTEN:/tmp/remotebitbang-socket,fork EXEC:"sudo ./remote_bitbang_sysfsgpio tck 11 tms 25 tdo 9 tdi 10"
- openocd -c "interface remote_bitbang; remote_bitbang_host /tmp/remotebitbang-socket" -f target/stm32f1x.cfg
-*/
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <errno.h>
-
-#define LOG_ERROR(...) do { \
- fprintf(stderr, __VA_ARGS__); \
- fputc('\n', stderr); \
- } while (0)
-#define LOG_WARNING(...) LOG_ERROR(__VA_ARGS__)
-
-#define ERROR_OK (-1)
-#define ERROR_FAIL (-2)
-#define ERROR_JTAG_INIT_FAILED ERROR_FAIL
-
-/*
- * Helper func to determine if gpio number valid
- *
- * Assume here that there will be less than 1000 gpios on a system
- */
-static int is_gpio_valid(int gpio)
-{
- return gpio >= 0 && gpio < 1000;
-}
-
-/*
- * Helper func to open, write to and close a file
- * name and valstr must be null terminated.
- *
- * Returns negative on failure.
- */
-static int open_write_close(const char *name, const char *valstr)
-{
- int ret;
- int fd = open(name, O_WRONLY);
- if (fd < 0)
- return fd;
-
- ret = write(fd, valstr, strlen(valstr));
- close(fd);
-
- return ret;
-}
-
-/*
- * Helper func to unexport gpio from sysfs
- */
-static void unexport_sysfs_gpio(int gpio)
-{
- char gpiostr[4];
-
- if (!is_gpio_valid(gpio))
- return;
-
- snprintf(gpiostr, sizeof(gpiostr), "%d", gpio);
- if (open_write_close("/sys/class/gpio/unexport", gpiostr) < 0)
- LOG_ERROR("Couldn't unexport gpio %d", gpio);
-
- return;
-}
-
-/*
- * Exports and sets up direction for gpio.
- * If the gpio is an output, it is initialized according to init_high,
- * otherwise it is ignored.
- *
- * If the gpio is already exported we just show a warning and continue; if
- * openocd happened to crash (or was killed by user) then the gpios will not
- * have been cleaned up.
- */
-static int setup_sysfs_gpio(int gpio, int is_output, int init_high)
-{
- char buf[40];
- char gpiostr[4];
- int ret;
-
- if (!is_gpio_valid(gpio))
- return ERROR_OK;
-
- snprintf(gpiostr, sizeof(gpiostr), "%d", gpio);
- ret = open_write_close("/sys/class/gpio/export", gpiostr);
- if (ret < 0) {
- if (errno == EBUSY) {
- LOG_WARNING("gpio %d is already exported", gpio);
- } else {
- LOG_ERROR("Couldn't export gpio %d", gpio);
- perror("sysfsgpio: ");
- return ERROR_FAIL;
- }
- }
-
- snprintf(buf, sizeof(buf), "/sys/class/gpio/gpio%d/direction", gpio);
- ret = open_write_close(buf, is_output ? (init_high ? "high" : "low") : "in");
- if (ret < 0) {
- LOG_ERROR("Couldn't set direction for gpio %d", gpio);
- perror("sysfsgpio: ");
- unexport_sysfs_gpio(gpio);
- return ERROR_FAIL;
- }
-
- snprintf(buf, sizeof(buf), "/sys/class/gpio/gpio%d/value", gpio);
- if (is_output)
- ret = open(buf, O_WRONLY | O_NONBLOCK | O_SYNC);
- else
- ret = open(buf, O_RDONLY | O_NONBLOCK | O_SYNC);
-
- if (ret < 0)
- unexport_sysfs_gpio(gpio);
-
- return ret;
-}
-
-/*
- * file descriptors for /sys/class/gpio/gpioXX/value
- * Set up during init.
- */
-static int tck_fd = -1;
-static int tms_fd = -1;
-static int tdi_fd = -1;
-static int tdo_fd = -1;
-static int trst_fd = -1;
-static int srst_fd = -1;
-
-/*
- * Bitbang interface read of TDO
- *
- * The sysfs value will read back either '0' or '1'. The trick here is to call
- * lseek to bypass buffering in the sysfs kernel driver.
- */
-static int sysfsgpio_read(void)
-{
- char buf[1];
-
- /* important to seek to signal sysfs of new read */
- lseek(tdo_fd, 0, SEEK_SET);
- int ret = read(tdo_fd, &buf, sizeof(buf));
-
- if (ret < 0) {
- LOG_WARNING("reading tdo failed");
- return 0;
- }
-
- return buf[0];
-}
-
-/*
- * Bitbang interface write of TCK, TMS, TDI
- *
- * Seeing as this is the only function where the outputs are changed,
- * we can cache the old value to avoid needlessly writing it.
- */
-static void sysfsgpio_write(int tck, int tms, int tdi)
-{
- const char one[] = "1";
- const char zero[] = "0";
-
- static int last_tck;
- static int last_tms;
- static int last_tdi;
-
- static int first_time;
- size_t bytes_written;
-
- if (!first_time) {
- last_tck = !tck;
- last_tms = !tms;
- last_tdi = !tdi;
- first_time = 1;
- }
-
- if (tdi != last_tdi) {
- bytes_written = write(tdi_fd, tdi ? &one : &zero, 1);
- if (bytes_written != 1)
- LOG_WARNING("writing tdi failed");
- }
-
- if (tms != last_tms) {
- bytes_written = write(tms_fd, tms ? &one : &zero, 1);
- if (bytes_written != 1)
- LOG_WARNING("writing tms failed");
- }
-
- /* write clk last */
- if (tck != last_tck) {
- bytes_written = write(tck_fd, tck ? &one : &zero, 1);
- if (bytes_written != 1)
- LOG_WARNING("writing tck failed");
- }
-
- last_tdi = tdi;
- last_tms = tms;
- last_tck = tck;
-}
-
-/*
- * Bitbang interface to manipulate reset lines SRST and TRST
- *
- * (1) assert or (0) deassert reset lines
- */
-static void sysfsgpio_reset(int trst, int srst)
-{
- const char one[] = "1";
- const char zero[] = "0";
- size_t bytes_written;
-
- /* assume active low */
- if (srst_fd >= 0) {
- bytes_written = write(srst_fd, srst ? &zero : &one, 1);
- if (bytes_written != 1)
- LOG_WARNING("writing srst failed");
- }
-
- /* assume active low */
- if (trst_fd >= 0) {
- bytes_written = write(trst_fd, trst ? &zero : &one, 1);
- if (bytes_written != 1)
- LOG_WARNING("writing trst failed");
- }
-}
-
-/* gpio numbers for each gpio. Negative values are invalid */
-static int tck_gpio = -1;
-static int tms_gpio = -1;
-static int tdi_gpio = -1;
-static int tdo_gpio = -1;
-static int trst_gpio = -1;
-static int srst_gpio = -1;
-
-/* helper func to close and cleanup files only if they were valid/ used */
-static void cleanup_fd(int fd, int gpio)
-{
- if (gpio >= 0) {
- if (fd >= 0)
- close(fd);
-
- unexport_sysfs_gpio(gpio);
- }
-}
-
-static void cleanup_all_fds(void)
-{
- cleanup_fd(tck_fd, tck_gpio);
- cleanup_fd(tms_fd, tms_gpio);
- cleanup_fd(tdi_fd, tdi_gpio);
- cleanup_fd(tdo_fd, tdo_gpio);
- cleanup_fd(trst_fd, trst_gpio);
- cleanup_fd(srst_fd, srst_gpio);
-}
-
-static void process_remote_protocol(void)
-{
- int c;
- while (1) {
- c = getchar();
- if (c == EOF || c == 'Q') /* Quit */
- break;
- else if (c == 'b' || c == 'B') /* Blink */
- continue;
- else if (c >= 'r' && c <= 'r' + 2) { /* Reset */
- char d = c - 'r';
- sysfsgpio_reset(!!(d & 2),
- (d & 1));
- } else if (c >= '0' && c <= '0' + 7) {/* Write */
- char d = c - '0';
- sysfsgpio_write(!!(d & 4),
- !!(d & 2),
- (d & 1));
- } else if (c == 'R')
- putchar(sysfsgpio_read());
- else
- LOG_ERROR("Unknown command '%c' received", c);
- }
-}
-
-int main(int argc, char *argv[])
-{
- LOG_WARNING("SysfsGPIO remote_bitbang JTAG driver\n");
-
- for (int i = 1; i < argc; i++) {
- if (!strcmp(argv[i], "tck"))
- tck_gpio = atoi(argv[++i]);
- else if (!strcmp(argv[i], "tms"))
- tms_gpio = atoi(argv[++i]);
- else if (!strcmp(argv[i], "tdo"))
- tdo_gpio = atoi(argv[++i]);
- else if (!strcmp(argv[i], "tdi"))
- tdi_gpio = atoi(argv[++i]);
- else if (!strcmp(argv[i], "trst"))
- trst_gpio = atoi(argv[++i]);
- else if (!strcmp(argv[i], "srst"))
- srst_gpio = atoi(argv[++i]);
- else {
- LOG_ERROR("Usage:\n%s ((tck|tms|tdo|tdi|trst|srst) num)*", argv[0]);
- return -1;
- }
- }
-
- if (!(is_gpio_valid(tck_gpio)
- && is_gpio_valid(tms_gpio)
- && is_gpio_valid(tdi_gpio)
- && is_gpio_valid(tdo_gpio))) {
- if (!is_gpio_valid(tck_gpio))
- LOG_ERROR("gpio num for tck is invalid");
- if (!is_gpio_valid(tms_gpio))
- LOG_ERROR("gpio num for tms is invalid");
- if (!is_gpio_valid(tdo_gpio))
- LOG_ERROR("gpio num for tdo is invalid");
- if (!is_gpio_valid(tdi_gpio))
- LOG_ERROR("gpio num for tdi is invalid");
-
- LOG_ERROR("Require tck, tms, tdi and tdo gpios to all be specified");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- /*
- * Configure TDO as an input, and TDI, TCK, TMS, TRST, SRST
- * as outputs. Drive TDI and TCK low, and TMS/TRST/SRST high.
- */
- tck_fd = setup_sysfs_gpio(tck_gpio, 1, 0);
- if (tck_fd < 0)
- goto out_error;
-
- tms_fd = setup_sysfs_gpio(tms_gpio, 1, 1);
- if (tms_fd < 0)
- goto out_error;
-
- tdi_fd = setup_sysfs_gpio(tdi_gpio, 1, 0);
- if (tdi_fd < 0)
- goto out_error;
-
- tdo_fd = setup_sysfs_gpio(tdo_gpio, 0, 0);
- if (tdo_fd < 0)
- goto out_error;
-
- /* assume active low */
- if (trst_gpio > 0) {
- trst_fd = setup_sysfs_gpio(trst_gpio, 1, 1);
- if (trst_fd < 0)
- goto out_error;
- }
-
- /* assume active low */
- if (srst_gpio > 0) {
- srst_fd = setup_sysfs_gpio(srst_gpio, 1, 1);
- if (srst_fd < 0)
- goto out_error;
- }
-
- LOG_WARNING("SysfsGPIO nums: tck = %d, tms = %d, tdi = %d, tdo = %d",
- tck_gpio, tms_gpio, tdi_gpio, tdo_gpio);
- LOG_WARNING("SysfsGPIO num: srst = %d", srst_gpio);
- LOG_WARNING("SysfsGPIO num: trst = %d", trst_gpio);
-
- setvbuf(stdout, NULL, _IONBF, 0);
- process_remote_protocol();
-
- cleanup_all_fds();
- return 0;
-out_error:
- cleanup_all_fds();
- return ERROR_JTAG_INIT_FAILED;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rpc_examples/ocd_rpc_example.py
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rpc_examples/ocd_rpc_example.py b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rpc_examples/ocd_rpc_example.py
deleted file mode 100755
index 6c8529c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rpc_examples/ocd_rpc_example.py
+++ /dev/null
@@ -1,145 +0,0 @@
-#!/usr/bin/env python3
-"""
-OpenOCD RPC example, covered by GNU GPLv3 or later
-Copyright (C) 2014 Andreas Ortmann (ortmann@finf.uni-hannover.de)
-
-
-Example output:
-./ocd_rpc_example.py
-echo says hi!
-
-target state: halted
-target halted due to debug-request, current mode: Thread
-xPSR: 0x01000000 pc: 0x00000188 msp: 0x10000fd8
-
-variable @ 0x10000000: 0x01c9c380
-
-variable @ 0x10000000: 0xdeadc0de
-
-memory (before): ['0xdeadc0de', '0x00000011', '0xaaaaaaaa', '0x00000023',
-'0x00000042', '0x0000ffff']
-
-memory (after): ['0x00000001', '0x00000000', '0xaaaaaaaa', '0x00000023',
-'0x00000042', '0x0000ffff']
-"""
-
-import socket
-import itertools
-
-def strToHex(data):
- return map(strToHex, data) if isinstance(data, list) else int(data, 16)
-
-def hexify(data):
- return "<None>" if data is None else ("0x%08x" % data)
-
-def compareData(a, b):
- for i, j, num in zip(a, b, itertools.count(0)):
- if i != j:
- print("difference at %d: %s != %s" % (num, hexify(i), hexify(j)))
-
-
-class OpenOcd:
- COMMAND_TOKEN = '\x1a'
- def __init__(self, verbose=False):
- self.verbose = verbose
- self.tclRpcIp = "127.0.0.1"
- self.tclRpcPort = 6666
- self.bufferSize = 4096
-
- self.sock = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
-
- def __enter__(self):
- self.sock.connect((self.tclRpcIp, self.tclRpcPort))
- return self
-
- def __exit__(self, type, value, traceback):
- try:
- self.send("exit")
- finally:
- self.sock.close()
-
- def send(self, cmd):
- """Send a command string to TCL RPC. Return the result that was read."""
- data = (cmd + OpenOcd.COMMAND_TOKEN).encode("utf-8")
- if self.verbose:
- print("<- ", data)
-
- self.sock.send(data)
- return self._recv()
-
- def _recv(self):
- """Read from the stream until the token (\x1a) was received."""
- data = bytes()
- while True:
- chunk = self.sock.recv(self.bufferSize)
- data += chunk
- if bytes(OpenOcd.COMMAND_TOKEN, encoding="utf-8") in chunk:
- break
-
- if self.verbose:
- print("-> ", data)
-
- data = data.decode("utf-8").strip()
- data = data[:-1] # strip trailing \x1a
-
- return data
-
- def readVariable(self, address):
- raw = self.send("ocd_mdw 0x%x" % address).split(": ")
- return None if (len(raw) < 2) else strToHex(raw[1])
-
- def readMemory(self, wordLen, address, n):
- self.send("array unset output") # better to clear the array before
- self.send("mem2array output %d 0x%x %d" % (wordLen, address, n))
-
- output = self.send("ocd_echo $output").split(" ")
-
- return [int(output[2*i+1]) for i in range(len(output)//2)]
-
- def writeVariable(self, address, value):
- assert value is not None
- self.send("mww 0x%x 0x%x" % (address, value))
-
- def writeMemory(self, wordLen, address, n, data):
- array = " ".join(["%d 0x%x" % (a, b) for a, b in enumerate(data)])
-
- self.send("array unset 1986\u0432\u04351\u0442") # better to clear the array before
- self.send("array set 1986\u0432\u04351\u0442 { %s }" % array)
- self.send("array2mem 1986\u0432\u04351\u0442 0x%x %s %d" % (wordLen, address, n))
-
-if __name__ == "__main__":
-
- def show(*args):
- print(*args, end="\n\n")
-
- with OpenOcd() as ocd:
- ocd.send("reset")
-
- show(ocd.send("ocd_echo \"echo says hi!\"")[:-1])
- show(ocd.send("capture \"ocd_halt\"")[:-1])
-
- # Read the first few words at the RAM region (put starting adress of RAM
- # region into 'addr')
- addr = 0x10000000
-
- value = ocd.readVariable(addr)
- show("variable @ %s: %s" % (hexify(addr), hexify(value)))
-
- ocd.writeVariable(addr, 0xdeadc0de)
- show("variable @ %s: %s" % (hexify(addr), hexify(ocd.readVariable(addr))))
-
- data = [1, 0, 0xaaaaaaaa, 0x23, 0x42, 0xffff]
- wordlen = 32
- n = len(data)
-
- read = ocd.readMemory(wordlen, addr, n)
- show("memory (before):", list(map(hexify, read)))
-
- ocd.writeMemory(wordlen, addr, n, data)
-
- read = ocd.readMemory(wordlen, addr, n)
- show("memory (after):", list(map(hexify, read)))
-
- compareData(read, data)
-
- ocd.send("resume")
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rpc_examples/ocdrpc.hs
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rpc_examples/ocdrpc.hs b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rpc_examples/ocdrpc.hs
deleted file mode 100755
index 27fb1ae..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rpc_examples/ocdrpc.hs
+++ /dev/null
@@ -1,56 +0,0 @@
--- OpenOCD RPC example, covered by GNU GPLv3 or later
--- Copyright (C) 2014 Paul Fertser
---
--- Example output:
--- $ ./ocdrpc
--- Halting the target, full log output captured:
--- target state: halted
--- target halted due to debug-request, current mode: Thread
--- xPSR: 0x21000000 pc: 0x00003352 msp: 0x20000fe8
---
--- Read memory, parse the result and show as a list of strings:
--- ["0x20001000","0x0000334d","0x00002abb","0x0000118f","0x00002707","0x00002707","0x00002707","0x00000000","0x00000000","0x00000000","0x00000000","0x00002707","0x00002707","0x00000000","0x00002707","0x00002781"]
--- Resuming
-
-{-# LANGUAGE OverloadedStrings #-}
-module Main where
-
-import Prelude
-import Control.Applicative
-import Network.Socket
-import System.IO.Streams.Core hiding (connect)
-import System.IO.Streams.Network
-import System.IO.Streams.Attoparsec
-import Data.Attoparsec.ByteString.Char8
-import Data.Attoparsec.Combinator
-import Data.ByteString.Char8 hiding (putStrLn, concat, map)
-import Text.Printf
-
-ocdReply = manyTill anyChar (char '\x1a')
-
-ocdExec (oistream, oostream) command = do
- write (Just $ pack $ command ++ "\x1a") oostream
- parseFromStream ocdReply oistream
-
--- For each line: dispose of address, then match hex values
-mdwParser = (manyTill anyChar (string ": ") *>
- hexadecimal `sepBy` char ' ')
- `sepBy` string " \n"
-
-ocdMdw :: (InputStream ByteString, OutputStream ByteString) -> Integer -> Integer -> IO [Integer]
-ocdMdw s start count = do
- s <- ocdExec s $ "ocd_mdw " ++ show start ++ " " ++ show count
- case parseOnly mdwParser (pack s) of
- Right r -> return $ concat r
-
-main = do
- osock <- socket AF_INET Stream defaultProtocol
- haddr <- inet_addr "127.0.0.1"
- connect osock (SockAddrInet 6666 haddr)
- ostreams <- socketToStreams osock
- putStrLn "Halting the target, full log output captured:"
- ocdExec ostreams "capture \"halt\"" >>= putStrLn
- putStrLn "Read memory, parse the result and show as a list of strings:"
- ocdMdw ostreams 0 16 >>= putStrLn . (show :: [String] -> String) . map (printf "0x%08x")
- putStrLn "Resuming"
- ocdExec ostreams "resume"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rtos-helpers/FreeRTOS-openocd.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rtos-helpers/FreeRTOS-openocd.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rtos-helpers/FreeRTOS-openocd.c
deleted file mode 100755
index 81a3ab7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/rtos-helpers/FreeRTOS-openocd.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Since at least FreeRTOS V7.5.3 uxTopUsedPriority is no longer
- * present in the kernel, so it has to be supplied by other means for
- * OpenOCD's threads awareness.
- *
- * Add this file to your project, and, if you're using --gc-sections,
- * ``--undefined=uxTopUsedPriority'' (or
- * ``-Wl,--undefined=uxTopUsedPriority'' when using gcc for final
- * linking) to your LDFLAGS; same with all the other symbols you need.
- */
-
-#include "FreeRTOS.h"
-
-#ifdef __GNUC__
-#define USED __attribute__((used))
-#else
-#define USED
-#endif
-
-const int USED uxTopUsedPriority = configMAX_PRIORITIES - 1;
[27/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/fm3.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/fm3.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/fm3.c
deleted file mode 100755
index d3d143f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/fm3.c
+++ /dev/null
@@ -1,1002 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Marc Willam, Holger Wech *
- * openOCD.fseu(AT)de.fujitsu.com *
- * Copyright (C) 2011 Ronny Strutz *
- * *
- * Copyright (C) 2013 Nemui Trinomius *
- * nemuisan_kawausogasuki@live.jp *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-#define FLASH_DQ6 0x40 /* Data toggle flag bit (TOGG) position */
-#define FLASH_DQ5 0x20 /* Time limit exceeding flag bit (TLOV) position */
-
-enum fm3_variant {
- mb9bfxx1, /* Flash Type '1' */
- mb9bfxx2,
- mb9bfxx3,
- mb9bfxx4,
- mb9bfxx5,
- mb9bfxx6,
- mb9bfxx7,
- mb9bfxx8,
-
- mb9afxx1, /* Flash Type '2' */
- mb9afxx2,
- mb9afxx3,
- mb9afxx4,
- mb9afxx5,
- mb9afxx6,
- mb9afxx7,
- mb9afxx8,
-};
-
-enum fm3_flash_type {
- fm3_no_flash_type = 0,
- fm3_flash_type1 = 1,
- fm3_flash_type2 = 2
-};
-
-struct fm3_flash_bank {
- enum fm3_variant variant;
- enum fm3_flash_type flashtype;
- int probed;
-};
-
-FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command)
-{
- struct fm3_flash_bank *fm3_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- fm3_info = malloc(sizeof(struct fm3_flash_bank));
- bank->driver_priv = fm3_info;
-
- /* Flash type '1' */
- if (strcmp(CMD_ARGV[5], "mb9bfxx1.cpu") == 0) {
- fm3_info->variant = mb9bfxx1;
- fm3_info->flashtype = fm3_flash_type1;
- } else if (strcmp(CMD_ARGV[5], "mb9bfxx2.cpu") == 0) {
- fm3_info->variant = mb9bfxx2;
- fm3_info->flashtype = fm3_flash_type1;
- } else if (strcmp(CMD_ARGV[5], "mb9bfxx3.cpu") == 0) {
- fm3_info->variant = mb9bfxx3;
- fm3_info->flashtype = fm3_flash_type1;
- } else if (strcmp(CMD_ARGV[5], "mb9bfxx4.cpu") == 0) {
- fm3_info->variant = mb9bfxx4;
- fm3_info->flashtype = fm3_flash_type1;
- } else if (strcmp(CMD_ARGV[5], "mb9bfxx5.cpu") == 0) {
- fm3_info->variant = mb9bfxx5;
- fm3_info->flashtype = fm3_flash_type1;
- } else if (strcmp(CMD_ARGV[5], "mb9bfxx6.cpu") == 0) {
- fm3_info->variant = mb9bfxx6;
- fm3_info->flashtype = fm3_flash_type1;
- } else if (strcmp(CMD_ARGV[5], "mb9bfxx7.cpu") == 0) {
- fm3_info->variant = mb9bfxx7;
- fm3_info->flashtype = fm3_flash_type1;
- } else if (strcmp(CMD_ARGV[5], "mb9bfxx8.cpu") == 0) {
- fm3_info->variant = mb9bfxx8;
- fm3_info->flashtype = fm3_flash_type1;
- } else if (strcmp(CMD_ARGV[5], "mb9afxx1.cpu") == 0) { /* Flash type '2' */
- fm3_info->variant = mb9afxx1;
- fm3_info->flashtype = fm3_flash_type2;
- } else if (strcmp(CMD_ARGV[5], "mb9afxx2.cpu") == 0) {
- fm3_info->variant = mb9afxx2;
- fm3_info->flashtype = fm3_flash_type2;
- } else if (strcmp(CMD_ARGV[5], "mb9afxx3.cpu") == 0) {
- fm3_info->variant = mb9afxx3;
- fm3_info->flashtype = fm3_flash_type2;
- } else if (strcmp(CMD_ARGV[5], "mb9afxx4.cpu") == 0) {
- fm3_info->variant = mb9afxx4;
- fm3_info->flashtype = fm3_flash_type2;
- } else if (strcmp(CMD_ARGV[5], "mb9afxx5.cpu") == 0) {
- fm3_info->variant = mb9afxx5;
- fm3_info->flashtype = fm3_flash_type2;
- } else if (strcmp(CMD_ARGV[5], "mb9afxx6.cpu") == 0) {
- fm3_info->variant = mb9afxx6;
- fm3_info->flashtype = fm3_flash_type2;
- } else if (strcmp(CMD_ARGV[5], "mb9afxx7.cpu") == 0) {
- fm3_info->variant = mb9afxx7;
- fm3_info->flashtype = fm3_flash_type2;
- } else if (strcmp(CMD_ARGV[5], "mb9afxx8.cpu") == 0) {
- fm3_info->variant = mb9afxx8;
- fm3_info->flashtype = fm3_flash_type2;
- }
-
- /* unknown Flash type */
- else {
- LOG_ERROR("unknown fm3 variant: %s", CMD_ARGV[5]);
- free(fm3_info);
- return ERROR_FLASH_BANK_INVALID;
- }
-
- fm3_info->probed = 0;
-
- return ERROR_OK;
-}
-
-/* Data polling algorithm */
-static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms)
-{
- int retval = ERROR_OK;
- uint8_t state1, state2;
- int ms = 0;
-
- /* While(1) loop exit via "break" and "return" on error */
- while (1) {
- /* dummy-read - see flash manual */
- retval = target_read_u8(target, offset, &state1);
- if (retval != ERROR_OK)
- return retval;
-
- /* Data polling 1 */
- retval = target_read_u8(target, offset, &state1);
- if (retval != ERROR_OK)
- return retval;
-
- /* Data polling 2 */
- retval = target_read_u8(target, offset, &state2);
- if (retval != ERROR_OK)
- return retval;
-
- /* Flash command finished via polled data equal? */
- if ((state1 & FLASH_DQ6) == (state2 & FLASH_DQ6))
- break;
- /* Timeout Flag? */
- else if (state1 & FLASH_DQ5) {
- /* Retry data polling */
-
- /* Data polling 1 */
- retval = target_read_u8(target, offset, &state1);
- if (retval != ERROR_OK)
- return retval;
-
- /* Data polling 2 */
- retval = target_read_u8(target, offset, &state2);
- if (retval != ERROR_OK)
- return retval;
-
- /* Flash command finished via polled data equal? */
- if ((state1 & FLASH_DQ6) != (state2 & FLASH_DQ6))
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* finish anyway */
- break;
- }
- usleep(1000);
- ++ms;
-
- /* Polling time exceeded? */
- if (ms > timeout_ms) {
- LOG_ERROR("Polling data reading timed out!");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
-
- if (retval == ERROR_OK)
- LOG_DEBUG("fm3_busy_wait(%" PRIx32 ") needs about %d ms", offset, ms);
-
- return retval;
-}
-
-static int fm3_erase(struct flash_bank *bank, int first, int last)
-{
- struct fm3_flash_bank *fm3_info = bank->driver_priv;
- struct target *target = bank->target;
- int retval = ERROR_OK;
- uint32_t u32DummyRead;
- int sector, odd;
- uint32_t u32FlashType;
- uint32_t u32FlashSeqAddress1;
- uint32_t u32FlashSeqAddress2;
-
- struct working_area *write_algorithm;
- struct reg_param reg_params[3];
- struct armv7m_algorithm armv7m_info;
-
- u32FlashType = (uint32_t) fm3_info->flashtype;
-
- if (u32FlashType == fm3_flash_type1) {
- u32FlashSeqAddress1 = 0x00001550;
- u32FlashSeqAddress2 = 0x00000AA8;
- } else if (u32FlashType == fm3_flash_type2) {
- u32FlashSeqAddress1 = 0x00000AA8;
- u32FlashSeqAddress2 = 0x00000554;
- } else {
- LOG_ERROR("Flash/Device type unknown!");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* RAMCODE used for fm3 Flash sector erase: */
- /* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */
- /* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */
- /* R2 keeps Flash Offset address (ofs) */
- static const uint8_t fm3_flash_erase_sector_code[] = {
- /* *(uint16_t*)u32FlashSeq1 = 0xAA; */
- 0xAA, 0x24, /* MOVS R4, #0xAA */
- 0x04, 0x80, /* STRH R4, [R0, #0] */
- /* *(uint16_t*)u32FlashSeq2 = 0x55; */
- 0x55, 0x23, /* MOVS R3, #0x55 */
- 0x0B, 0x80, /* STRH R3, [R1, #0] */
- /* *(uint16_t*)u32FlashSeq1 = 0x80; */
- 0x80, 0x25, /* MOVS R5, #0x80 */
- 0x05, 0x80, /* STRH R5, [R0, #0] */
- /* *(uint16_t*)u32FlashSeq1 = 0xAA; */
- 0x04, 0x80, /* STRH R4, [R0, #0] */
- /* *(uint16_t*)u32FlashSeq2 = 0x55; */
- 0x0B, 0x80, /* STRH R3, [R1, #0] */
- /* Sector_Erase Command (0x30) */
- /* *(uint16_t*)ofs = 0x30; */
- 0x30, 0x20, /* MOVS R0, #0x30 */
- 0x10, 0x80, /* STRH R0, [R2, #0] */
- /* End Code */
- 0x00, 0xBE, /* BKPT #0 */
- };
-
- LOG_INFO("Fujitsu MB9[A/B]FXXX: Sector Erase ... (%d to %d)", first, last);
-
- /* disable HW watchdog */
- retval = target_write_u32(target, 0x40011C00, 0x1ACCE551);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, 0x40011C00, 0xE5331AAE);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, 0x40011008, 0x00000000);
- if (retval != ERROR_OK)
- return retval;
-
- /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash acccess) */
- retval = target_write_u32(target, 0x40000000, 0x0001);
- if (retval != ERROR_OK)
- return retval;
-
- /* dummy read of FASZR */
- retval = target_read_u32(target, 0x40000000, &u32DummyRead);
- if (retval != ERROR_OK)
- return retval;
-
- /* allocate working area with flash sector erase code */
- if (target_alloc_working_area(target, sizeof(fm3_flash_erase_sector_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(fm3_flash_erase_sector_code), fm3_flash_erase_sector_code);
- if (retval != ERROR_OK)
- return retval;
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* offset */
-
- /* write code buffer and use Flash sector erase code within fm3 */
- for (sector = first ; sector <= last ; sector++) {
- uint32_t offset = bank->sectors[sector].offset;
-
- for (odd = 0; odd < 2 ; odd++) {
- if (odd)
- offset += 4;
-
- buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1);
- buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2);
- buf_set_u32(reg_params[2].value, 0, 32, offset);
-
- retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- write_algorithm->address, 0, 100000, &armv7m_info);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing flash erase programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- return retval;
- }
-
- retval = fm3_busy_wait(target, offset, 500);
- if (retval != ERROR_OK)
- return retval;
- }
- bank->sectors[sector].is_erased = 1;
- }
-
- target_free_working_area(target, write_algorithm);
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
- /* FASZR = 0x02, Enables CPU Run Mode (32-bit Flash acccess) */
- retval = target_write_u32(target, 0x40000000, 0x0002);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */
-
- return retval;
-}
-
-static int fm3_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct fm3_flash_bank *fm3_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t buffer_size = 2048; /* Default minimum value */
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[6];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
- uint32_t u32FlashType;
- uint32_t u32FlashSeqAddress1;
- uint32_t u32FlashSeqAddress2;
-
- /* Increase buffer_size if needed */
- if (buffer_size < (target->working_area_size / 2))
- buffer_size = (target->working_area_size / 2);
-
- u32FlashType = (uint32_t) fm3_info->flashtype;
-
- if (u32FlashType == fm3_flash_type1) {
- u32FlashSeqAddress1 = 0x00001550;
- u32FlashSeqAddress2 = 0x00000AA8;
- } else if (u32FlashType == fm3_flash_type2) {
- u32FlashSeqAddress1 = 0x00000AA8;
- u32FlashSeqAddress2 = 0x00000554;
- } else {
- LOG_ERROR("Flash/Device type unknown!");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* RAMCODE used for fm3 Flash programming: */
- /* R0 keeps source start address (u32Source) */
- /* R1 keeps target start address (u32Target) */
- /* R2 keeps number of halfwords to write (u32Count) */
- /* R3 keeps Flash Sequence address 1 (u32FlashSeq1) */
- /* R4 keeps Flash Sequence address 2 (u32FlashSeq2) */
- /* R5 returns result value (u32FlashResult) */
-
- static const uint8_t fm3_flash_write_code[] = {
- /* fm3_FLASH_IF->FASZ &= 0xFFFD; */
- 0x5F, 0xF0, 0x80, 0x45, /* MOVS.W R5, #(fm3_FLASH_IF->FASZ) */
- 0x2D, 0x68, /* LDR R5, [R5] */
- 0x4F, 0xF6, 0xFD, 0x76, /* MOVW R6, #0xFFFD */
- 0x35, 0x40, /* ANDS R5, R5, R6 */
- 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
- 0x35, 0x60, /* STR R5, [R6] */
- /* fm3_FLASH_IF->FASZ |= 1; */
- 0x5F, 0xF0, 0x80, 0x45, /* MOVS.W R5, #(fm3_FLASH_IF->FASZ) */
- 0x2D, 0x68, /* LDR R5, [R3] */
- 0x55, 0xF0, 0x01, 0x05, /* ORRS.W R5, R5, #1 */
- 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
- 0x35, 0x60, /* STR R5, [R6] */
- /* u32DummyRead = fm3_FLASH_IF->FASZ; */
- 0x28, 0x4D, /* LDR.N R5, ??u32DummyRead */
- 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
- 0x36, 0x68, /* LDR R6, [R6] */
- 0x2E, 0x60, /* STR R6, [R5] */
- /* u32FlashResult = FLASH_WRITE_NO_RESULT */
- 0x26, 0x4D, /* LDR.N R5, ??u32FlashResult */
- 0x00, 0x26, /* MOVS R6, #0 */
- 0x2E, 0x60, /* STR R6, [R5] */
- /* while ((u32Count > 0 ) */
- /* && (u32FlashResult */
- /* == FLASH_WRITE_NO_RESULT)) */
- 0x01, 0x2A, /* L0: CMP R2, #1 */
- 0x2C, 0xDB, /* BLT.N L1 */
- 0x24, 0x4D, /* LDR.N R5, ??u32FlashResult */
- 0x2D, 0x68, /* LDR R5, [R5] */
- 0x00, 0x2D, /* CMP R5, #0 */
- 0x28, 0xD1, /* BNE.N L1 */
- /* *u32FlashSeq1 = FLASH_WRITE_1; */
- 0xAA, 0x25, /* MOVS R5, #0xAA */
- 0x1D, 0x60, /* STR R5, [R3] */
- /* *u32FlashSeq2 = FLASH_WRITE_2; */
- 0x55, 0x25, /* MOVS R5, #0x55 */
- 0x25, 0x60, /* STR R5, [R4] */
- /* *u32FlashSeq1 = FLASH_WRITE_3; */
- 0xA0, 0x25, /* MOVS R5, #0xA0 */
- 0x1D, 0x60, /* STRH R5, [R3] */
- /* *(volatile uint16_t*)u32Target */
- /* = *(volatile uint16_t*)u32Source; */
- 0x05, 0x88, /* LDRH R5, [R0] */
- 0x0D, 0x80, /* STRH R5, [R1] */
- /* while (u32FlashResult */
- /* == FLASH_WRITE_NO_RESTULT) */
- 0x1E, 0x4D, /* L2: LDR.N R5, ??u32FlashResult */
- 0x2D, 0x68, /* LDR R5, [R5] */
- 0x00, 0x2D, /* CMP R5, #0 */
- 0x11, 0xD1, /* BNE.N L3 */
- /* if ((*(volatile uint16_t*)u32Target */
- /* & FLASH_DQ5) == FLASH_DQ5) */
- 0x0D, 0x88, /* LDRH R5, [R1] */
- 0xAD, 0x06, /* LSLS R5, R5, #0x1A */
- 0x02, 0xD5, /* BPL.N L4 */
- /* u32FlashResult = FLASH_WRITE_TIMEOUT */
- 0x1A, 0x4D, /* LDR.N R5, ??u32FlashResult */
- 0x02, 0x26, /* MOVS R6, #2 */
- 0x2E, 0x60, /* STR R6, [R5] */
- /* if ((*(volatile uint16_t *)u32Target */
- /* & FLASH_DQ7) */
- /* == (*(volatile uint16_t*)u32Source */
- /* & FLASH_DQ7)) */
- 0x0D, 0x88, /* L4: LDRH R5, [R1] */
- 0x15, 0xF0, 0x80, 0x05, /* ANDS.W R5, R5, #0x80 */
- 0x06, 0x88, /* LDRH R6, [R0] */
- 0x16, 0xF0, 0x80, 0x06, /* ANDS.W R6, R6, #0x80 */
- 0xB5, 0x42, /* CMP R5, R6 */
- 0xED, 0xD1, /* BNE.N L2 */
- /* u32FlashResult = FLASH_WRITE_OKAY */
- 0x15, 0x4D, /* LDR.N R5, ??u32FlashResult */
- 0x01, 0x26, /* MOVS R6, #1 */
- 0x2E, 0x60, /* STR R6, [R5] */
- 0xE9, 0xE7, /* B.N L2 */
- /* if (u32FlashResult */
- /* != FLASH_WRITE_TIMEOUT) */
- 0x13, 0x4D, /* LDR.N R5, ??u32FlashResult */
- 0x2D, 0x68, /* LDR R5, [R5] */
- 0x02, 0x2D, /* CMP R5, #2 */
- 0x02, 0xD0, /* BEQ.N L5 */
- /* u32FlashResult = FLASH_WRITE_NO_RESULT */
- 0x11, 0x4D, /* LDR.N R5, ??u32FlashResult */
- 0x00, 0x26, /* MOVS R6, #0 */
- 0x2E, 0x60, /* STR R6, [R5] */
- /* u32Count--; */
- 0x52, 0x1E, /* L5: SUBS R2, R2, #1 */
- /* u32Source += 2; */
- 0x80, 0x1C, /* ADDS R0, R0, #2 */
- /* u32Target += 2; */
- 0x89, 0x1C, /* ADDS R1, R1, #2 */
- 0xD0, 0xE7, /* B.N L0 */
- /* fm3_FLASH_IF->FASZ &= 0xFFFE; */
- 0x5F, 0xF0, 0x80, 0x45, /* L1: MOVS.W R5, #(fm3_FLASH_IF->FASZ) */
- 0x2D, 0x68, /* LDR R5, [R5] */
- 0x4F, 0xF6, 0xFE, 0x76, /* MOVW R6, #0xFFFE */
- 0x35, 0x40, /* ANDS R5, R5, R6 */
- 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
- 0x35, 0x60, /* STR R5, [R6] */
- /* fm3_FLASH_IF->FASZ |= 2; */
- 0x5F, 0xF0, 0x80, 0x45, /* MOVS.W R5, #(fm3_FLASH_IF->FASZ) */
- 0x2D, 0x68, /* LDR R5, [R5] */
- 0x55, 0xF0, 0x02, 0x05, /* ORRS.W R5, R5, #2 */
- 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
- 0x35, 0x60, /* STR R5, [R6] */
- /* u32DummyRead = fm3_FLASH_IF->FASZ; */
- 0x04, 0x4D, /* LDR.N R5, ??u32DummyRead */
- 0x5F, 0xF0, 0x80, 0x46, /* MOVS.W R6, #(fm3_FLASH_IF->FASZ) */
- 0x36, 0x68, /* LDR R6, [R6] */
- 0x2E, 0x60, /* STR R6, [R5] */
- /* copy u32FlashResult to R3 for return */
- /* value */
- 0xDF, 0xF8, 0x08, 0x50, /* LDR.W R5, ??u32FlashResult */
- 0x2D, 0x68, /* LDR R5, [R5] */
- /* Breakpoint here */
- 0x00, 0xBE, /* BKPT #0 */
-
- /* The following address pointers assume, that the code is running from */
- /* SRAM basic-address + 8.These address pointers will be patched, if a */
- /* different start address in RAM is used (e.g. for Flash type 2)! */
- /* Default SRAM basic-address is 0x20000000. */
- 0x00, 0x00, 0x00, 0x20, /* u32DummyRead address in RAM (0x20000000) */
- 0x04, 0x00, 0x00, 0x20 /* u32FlashResult address in RAM (0x20000004) */
- };
-
- LOG_INFO("Fujitsu MB9[A/B]FXXX: FLASH Write ...");
-
- /* disable HW watchdog */
- retval = target_write_u32(target, 0x40011C00, 0x1ACCE551);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, 0x40011C00, 0xE5331AAE);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, 0x40011008, 0x00000000);
- if (retval != ERROR_OK)
- return retval;
-
- count = count / 2; /* number bytes -> number halfwords */
-
- /* check code alignment */
- if (offset & 0x1) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* allocate working area and variables with flash programming code */
- if (target_alloc_working_area(target, sizeof(fm3_flash_write_code) + 8,
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address + 8,
- sizeof(fm3_flash_write_code), fm3_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* Patching 'local variable address' */
- /* Algorithm: u32DummyRead: */
- retval = target_write_u32(target, (write_algorithm->address + 8)
- + sizeof(fm3_flash_write_code) - 8, (write_algorithm->address));
- if (retval != ERROR_OK)
- return retval;
- /* Algorithm: u32FlashResult: */
- retval = target_write_u32(target, (write_algorithm->address + 8)
- + sizeof(fm3_flash_write_code) - 4, (write_algorithm->address) + 4);
- if (retval != ERROR_OK)
- return retval;
-
-
-
- /* memory buffer */
- while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* free working area, write algorithm already allocated */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("No large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* source start address */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* target start address */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* number of halfwords to program */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* Flash Sequence address 1 */
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* Flash Sequence address 1 */
- init_reg_param(®_params[5], "r5", 32, PARAM_IN); /* result */
-
- /* write code buffer and use Flash programming code within fm3 */
- /* Set breakpoint to 0 with time-out of 1000 ms */
- while (count > 0) {
- uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
-
- retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
- if (retval != ERROR_OK)
- break;
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
- buf_set_u32(reg_params[3].value, 0, 32, u32FlashSeqAddress1);
- buf_set_u32(reg_params[4].value, 0, 32, u32FlashSeqAddress2);
-
- retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
- (write_algorithm->address + 8), 0, 1000, &armv7m_info);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing fm3 Flash programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- if (buf_get_u32(reg_params[5].value, 0, 32) != ERROR_OK) {
- LOG_ERROR("Fujitsu MB9[A/B]FXXX: Flash programming ERROR (Timeout) -> Reg R3: %" PRIx32,
- buf_get_u32(reg_params[5].value, 0, 32));
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- buffer += thisrun_count * 2;
- address += thisrun_count * 2;
- count -= thisrun_count;
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
- destroy_reg_param(®_params[5]);
-
- return retval;
-}
-
-static int fm3_probe(struct flash_bank *bank)
-{
- struct fm3_flash_bank *fm3_info = bank->driver_priv;
- uint16_t num_pages;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
-/*
- -- page-- start -- blocksize - mpu - totalFlash --
- page0 0x00000 16k
- page1 0x04000 16k
- page2 0x08000 96k ___ fxx3 128k Flash
- page3 0x20000 128k ___ fxx4 256k Flash
- page4 0x40000 128k ___ fxx5 384k Flash
- page5 0x60000 128k ___ fxx6 512k Flash
------------------------
- page6 0x80000 128k
- page7 0xa0000 128k ___ fxx7 256k Flash
- page8 0xc0000 128k
- page9 0xe0000 128k ___ fxx8 256k Flash
- */
-
- num_pages = 10; /* max number of Flash pages for malloc */
- fm3_info->probed = 0;
-
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
- bank->base = 0x00000000;
- bank->size = 32 * 1024; /* bytes */
-
- bank->sectors[0].offset = 0;
- bank->sectors[0].size = 16 * 1024;
- bank->sectors[0].is_erased = -1;
- bank->sectors[0].is_protected = -1;
-
- bank->sectors[1].offset = 0x4000;
- bank->sectors[1].size = 16 * 1024;
- bank->sectors[1].is_erased = -1;
- bank->sectors[1].is_protected = -1;
-
- if ((fm3_info->variant == mb9bfxx1)
- || (fm3_info->variant == mb9afxx1)) {
- num_pages = 3;
- bank->size = 64 * 1024; /* bytes */
- bank->num_sectors = num_pages;
-
- bank->sectors[2].offset = 0x8000;
- bank->sectors[2].size = 32 * 1024;
- bank->sectors[2].is_erased = -1;
- bank->sectors[2].is_protected = -1;
- }
-
- if ((fm3_info->variant == mb9bfxx2)
- || (fm3_info->variant == mb9bfxx4)
- || (fm3_info->variant == mb9bfxx5)
- || (fm3_info->variant == mb9bfxx6)
- || (fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx2)
- || (fm3_info->variant == mb9afxx4)
- || (fm3_info->variant == mb9afxx5)
- || (fm3_info->variant == mb9afxx6)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
- num_pages = 3;
- bank->size = 128 * 1024; /* bytes */
- bank->num_sectors = num_pages;
-
- bank->sectors[2].offset = 0x8000;
- bank->sectors[2].size = 96 * 1024;
- bank->sectors[2].is_erased = -1;
- bank->sectors[2].is_protected = -1;
- }
-
- if ((fm3_info->variant == mb9bfxx4)
- || (fm3_info->variant == mb9bfxx5)
- || (fm3_info->variant == mb9bfxx6)
- || (fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx4)
- || (fm3_info->variant == mb9afxx5)
- || (fm3_info->variant == mb9afxx6)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
- num_pages = 4;
- bank->size = 256 * 1024; /* bytes */
- bank->num_sectors = num_pages;
-
- bank->sectors[3].offset = 0x20000;
- bank->sectors[3].size = 128 * 1024;
- bank->sectors[3].is_erased = -1;
- bank->sectors[3].is_protected = -1;
- }
-
- if ((fm3_info->variant == mb9bfxx5)
- || (fm3_info->variant == mb9bfxx6)
- || (fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx5)
- || (fm3_info->variant == mb9afxx6)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
- num_pages = 5;
- bank->size = 384 * 1024; /* bytes */
- bank->num_sectors = num_pages;
-
- bank->sectors[4].offset = 0x40000;
- bank->sectors[4].size = 128 * 1024;
- bank->sectors[4].is_erased = -1;
- bank->sectors[4].is_protected = -1;
- }
-
- if ((fm3_info->variant == mb9bfxx6)
- || (fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx6)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
- num_pages = 6;
- bank->size = 512 * 1024; /* bytes */
- bank->num_sectors = num_pages;
-
- bank->sectors[5].offset = 0x60000;
- bank->sectors[5].size = 128 * 1024;
- bank->sectors[5].is_erased = -1;
- bank->sectors[5].is_protected = -1;
- }
-
- if ((fm3_info->variant == mb9bfxx7)
- || (fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx7)
- || (fm3_info->variant == mb9afxx8)) {
- num_pages = 8;
- bank->size = 768 * 1024; /* bytes */
- bank->num_sectors = num_pages;
-
- bank->sectors[6].offset = 0x80000;
- bank->sectors[6].size = 128 * 1024;
- bank->sectors[6].is_erased = -1;
- bank->sectors[6].is_protected = -1;
-
- bank->sectors[7].offset = 0xa0000;
- bank->sectors[7].size = 128 * 1024;
- bank->sectors[7].is_erased = -1;
- bank->sectors[7].is_protected = -1;
- }
-
- if ((fm3_info->variant == mb9bfxx8)
- || (fm3_info->variant == mb9afxx8)) {
- num_pages = 10;
- bank->size = 1024 * 1024; /* bytes */
- bank->num_sectors = num_pages;
-
- bank->sectors[8].offset = 0xc0000;
- bank->sectors[8].size = 128 * 1024;
- bank->sectors[8].is_erased = -1;
- bank->sectors[8].is_protected = -1;
-
- bank->sectors[9].offset = 0xe0000;
- bank->sectors[9].size = 128 * 1024;
- bank->sectors[9].is_erased = -1;
- bank->sectors[9].is_protected = -1;
- }
-
- fm3_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int fm3_auto_probe(struct flash_bank *bank)
-{
- struct fm3_flash_bank *fm3_info = bank->driver_priv;
- if (fm3_info->probed)
- return ERROR_OK;
- return fm3_probe(bank);
-}
-
-/* Chip erase */
-static int fm3_chip_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct fm3_flash_bank *fm3_info2 = bank->driver_priv;
- int retval = ERROR_OK;
- uint32_t u32DummyRead;
- uint32_t u32FlashType;
- uint32_t u32FlashSeqAddress1;
- uint32_t u32FlashSeqAddress2;
-
- struct working_area *write_algorithm;
- struct reg_param reg_params[3];
- struct armv7m_algorithm armv7m_info;
-
- u32FlashType = (uint32_t) fm3_info2->flashtype;
-
- if (u32FlashType == fm3_flash_type1) {
- LOG_INFO("*** Erasing mb9bfxxx type");
- u32FlashSeqAddress1 = 0x00001550;
- u32FlashSeqAddress2 = 0x00000AA8;
- } else if (u32FlashType == fm3_flash_type2) {
- LOG_INFO("*** Erasing mb9afxxx type");
- u32FlashSeqAddress1 = 0x00000AA8;
- u32FlashSeqAddress2 = 0x00000554;
- } else {
- LOG_ERROR("Flash/Device type unknown!");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* RAMCODE used for fm3 Flash chip erase: */
- /* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */
- /* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */
- static const uint8_t fm3_flash_erase_chip_code[] = {
- /* *(uint16_t*)u32FlashSeq1 = 0xAA; */
- 0xAA, 0x22, /* MOVS R2, #0xAA */
- 0x02, 0x80, /* STRH R2, [R0, #0] */
- /* *(uint16_t*)u32FlashSeq2 = 0x55; */
- 0x55, 0x23, /* MOVS R3, #0x55 */
- 0x0B, 0x80, /* STRH R3, [R1, #0] */
- /* *(uint16_t*)u32FlashSeq1 = 0x80; */
- 0x80, 0x24, /* MOVS R4, #0x80 */
- 0x04, 0x80, /* STRH R4, [R0, #0] */
- /* *(uint16_t*)u32FlashSeq1 = 0xAA; */
- 0x02, 0x80, /* STRH R2, [R0, #0] */
- /* *(uint16_t*)u32FlashSeq2 = 0x55; */
- 0x0B, 0x80, /* STRH R3, [R1, #0] */
- /* Chip_Erase Command 0x10 */
- /* *(uint16_t*)u32FlashSeq1 = 0x10; */
- 0x10, 0x21, /* MOVS R1, #0x10 */
- 0x01, 0x80, /* STRH R1, [R0, #0] */
- /* End Code */
- 0x00, 0xBE, /* BKPT #0 */
- };
-
- LOG_INFO("Fujitsu MB9[A/B]xxx: Chip Erase ... (may take several seconds)");
-
- /* disable HW watchdog */
- retval = target_write_u32(target, 0x40011C00, 0x1ACCE551);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, 0x40011C00, 0xE5331AAE);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, 0x40011008, 0x00000000);
- if (retval != ERROR_OK)
- return retval;
-
- /* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */
- retval = target_write_u32(target, 0x40000000, 0x0001);
- if (retval != ERROR_OK)
- return retval;
-
- /* dummy read of FASZR */
- retval = target_read_u32(target, 0x40000000, &u32DummyRead);
- if (retval != ERROR_OK)
- return retval;
-
- /* allocate working area with flash chip erase code */
- if (target_alloc_working_area(target, sizeof(fm3_flash_erase_chip_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(fm3_flash_erase_chip_code), fm3_flash_erase_chip_code);
- if (retval != ERROR_OK)
- return retval;
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */
-
- buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1);
- buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2);
-
- retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
- write_algorithm->address, 0, 100000, &armv7m_info);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing flash erase programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- return retval;
- }
-
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
-
- retval = fm3_busy_wait(target, u32FlashSeqAddress2, 20000); /* 20s timeout */
- if (retval != ERROR_OK)
- return retval;
-
- /* FASZR = 0x02, Re-enables CPU Run Mode (32-bit Flash access) */
- retval = target_write_u32(target, 0x40000000, 0x0002);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, 0x40000000, &u32DummyRead); /* dummy read of FASZR */
-
- return retval;
-}
-
-COMMAND_HANDLER(fm3_handle_chip_erase_command)
-{
- int i;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (fm3_chip_erase(bank) == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "fm3 chip erase complete");
- } else {
- command_print(CMD_CTX, "fm3 chip erase failed");
- }
-
- return ERROR_OK;
-}
-
-static const struct command_registration fm3_exec_command_handlers[] = {
- {
- .name = "chip_erase",
- .usage = "<bank>",
- .handler = fm3_handle_chip_erase_command,
- .mode = COMMAND_EXEC,
- .help = "Erase entire Flash device.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration fm3_command_handlers[] = {
- {
- .name = "fm3",
- .mode = COMMAND_ANY,
- .help = "fm3 Flash command group",
- .usage = "",
- .chain = fm3_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver fm3_flash = {
- .name = "fm3",
- .commands = fm3_command_handlers,
- .flash_bank_command = fm3_flash_bank_command,
- .erase = fm3_erase,
- .write = fm3_write_block,
- .probe = fm3_probe,
- .auto_probe = fm3_auto_probe,
- .erase_check = default_flash_blank_check,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/fm4.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/fm4.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/fm4.c
deleted file mode 100755
index c348c1d..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/fm4.c
+++ /dev/null
@@ -1,722 +0,0 @@
-/*
- * Spansion FM4 flash
- *
- * Copyright (c) 2015 Andreas F�rber
- *
- * Based on S6E2DH_MN709-00013 for S6E2DH/DF/D5/D3 series
- * Based on S6E2CC_MN709-00007 for S6E2CC/C5/C4/C3/C2/C1 series
- * Based on MB9B560R_MN709-00005 for MB9BFx66/x67/x68 series
- * Based on MB9B560L_MN709-00006 for MB9BFx64/x65/x66 series
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-#define FLASH_BASE 0x40000000
-#define FASZR (FLASH_BASE + 0x000)
-#define DFCTRLR (FLASH_BASE + 0x030)
-#define DFCTRLR_DFE (1UL << 0)
-
-#define WDG_BASE 0x40011000
-#define WDG_CTL (WDG_BASE + 0x008)
-#define WDG_LCK (WDG_BASE + 0xC00)
-
-enum fm4_variant {
- mb9bfx64,
- mb9bfx65,
- mb9bfx66,
- mb9bfx67,
- mb9bfx68,
-
- s6e2cx8,
- s6e2cx9,
- s6e2cxa,
-
- s6e2dx,
-};
-
-struct fm4_flash_bank {
- enum fm4_variant variant;
- int macro_nr;
- bool probed;
-};
-
-static int fm4_disable_hw_watchdog(struct target *target)
-{
- int retval;
-
- retval = target_write_u32(target, WDG_LCK, 0x1ACCE551);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, WDG_LCK, 0xE5331AAE);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, WDG_CTL, 0);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int fm4_enter_flash_cpu_programming_mode(struct target *target)
-{
- uint32_t u32_value;
- int retval;
-
- /* FASZR ASZ = CPU programming mode */
- retval = target_write_u32(target, FASZR, 0x00000001);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, FASZR, &u32_value);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int fm4_enter_flash_cpu_rom_mode(struct target *target)
-{
- uint32_t u32_value;
- int retval;
-
- /* FASZR ASZ = CPU ROM mode */
- retval = target_write_u32(target, FASZR, 0x00000002);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, FASZR, &u32_value);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int fm4_flash_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- struct working_area *workarea;
- struct reg_param reg_params[4];
- struct armv7m_algorithm armv7m_algo;
- unsigned i;
- int retval, sector;
- const uint8_t erase_sector_code[] = {
-#include "../../../contrib/loaders/flash/fm4/erase.inc"
- };
-
- if (target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_DEBUG("Spansion FM4 erase sectors %d to %d", first, last);
-
- retval = fm4_disable_hw_watchdog(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = fm4_enter_flash_cpu_programming_mode(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_alloc_working_area(target, sizeof(erase_sector_code),
- &workarea);
- if (retval != ERROR_OK) {
- LOG_ERROR("No working area available.");
- retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- goto err_alloc_code;
- }
- retval = target_write_buffer(target, workarea->address,
- sizeof(erase_sector_code), erase_sector_code);
- if (retval != ERROR_OK)
- goto err_write_code;
-
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_IN);
-
- for (sector = first; sector <= last; sector++) {
- uint32_t addr = bank->base + bank->sectors[sector].offset;
- uint32_t result;
-
- buf_set_u32(reg_params[0].value, 0, 32, (addr & ~0xffff) | 0xAA8);
- buf_set_u32(reg_params[1].value, 0, 32, (addr & ~0xffff) | 0x554);
- buf_set_u32(reg_params[2].value, 0, 32, addr);
-
- retval = target_run_algorithm(target,
- 0, NULL,
- ARRAY_SIZE(reg_params), reg_params,
- workarea->address, 0,
- 1000, &armv7m_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing flash sector erase "
- "programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run;
- }
-
- result = buf_get_u32(reg_params[3].value, 0, 32);
- if (result == 2) {
- LOG_ERROR("Timeout error from flash sector erase programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run_ret;
- } else if (result != 0) {
- LOG_ERROR("Unexpected error %d from flash sector erase programming algorithm", result);
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run_ret;
- } else
- retval = ERROR_OK;
-
- bank->sectors[sector].is_erased = 1;
- }
-
-err_run_ret:
-err_run:
- for (i = 0; i < ARRAY_SIZE(reg_params); i++)
- destroy_reg_param(®_params[i]);
-
-err_write_code:
- target_free_working_area(target, workarea);
-
-err_alloc_code:
- if (retval != ERROR_OK)
- fm4_enter_flash_cpu_rom_mode(target);
- else
- retval = fm4_enter_flash_cpu_rom_mode(target);
-
- return retval;
-}
-
-static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t byte_count)
-{
- struct target *target = bank->target;
- struct working_area *code_workarea, *data_workarea;
- struct reg_param reg_params[6];
- struct armv7m_algorithm armv7m_algo;
- uint32_t halfword_count = DIV_ROUND_UP(byte_count, 2);
- uint32_t result;
- unsigned i;
- int retval;
- const uint8_t write_block_code[] = {
-#include "../../../contrib/loaders/flash/fm4/write.inc"
- };
-
- LOG_DEBUG("Spansion FM4 write at 0x%08" PRIx32 " (%" PRId32 " bytes)",
- offset, byte_count);
-
- if (offset & 0x1) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment",
- offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
- if (byte_count & 0x1) {
- LOG_WARNING("length %" PRId32 " is not 2-byte aligned, rounding up",
- byte_count);
- }
-
- if (target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = fm4_disable_hw_watchdog(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_alloc_working_area(target, sizeof(write_block_code),
- &code_workarea);
- if (retval != ERROR_OK) {
- LOG_ERROR("No working area available for write code.");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- retval = target_write_buffer(target, code_workarea->address,
- sizeof(write_block_code), write_block_code);
- if (retval != ERROR_OK)
- goto err_write_code;
-
- retval = target_alloc_working_area(target,
- MIN(halfword_count * 2, target_get_working_area_avail(target)),
- &data_workarea);
- if (retval != ERROR_OK) {
- LOG_ERROR("No working area available for write data.");
- retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- goto err_alloc_data;
- }
-
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
- init_reg_param(®_params[5], "r5", 32, PARAM_IN);
-
- retval = fm4_enter_flash_cpu_programming_mode(target);
- if (retval != ERROR_OK)
- goto err_flash_mode;
-
- while (byte_count > 0) {
- uint32_t halfwords = MIN(halfword_count, data_workarea->size / 2);
- uint32_t addr = bank->base + offset;
-
- LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" PRIx32,
- MIN(halfwords * 2, byte_count), data_workarea->address);
-
- retval = target_write_buffer(target, data_workarea->address,
- MIN(halfwords * 2, byte_count), buffer);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error writing data buffer");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_write_data;
- }
-
- LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)",
- addr, addr + halfwords * 2 - 1, halfwords);
-
- buf_set_u32(reg_params[0].value, 0, 32, (addr & ~0xffff) | 0xAA8);
- buf_set_u32(reg_params[1].value, 0, 32, (addr & ~0xffff) | 0x554);
- buf_set_u32(reg_params[2].value, 0, 32, addr);
- buf_set_u32(reg_params[3].value, 0, 32, data_workarea->address);
- buf_set_u32(reg_params[4].value, 0, 32, halfwords);
-
- retval = target_run_algorithm(target,
- 0, NULL,
- ARRAY_SIZE(reg_params), reg_params,
- code_workarea->address, 0,
- 5 * 60 * 1000, &armv7m_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing flash sector erase "
- "programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run;
- }
-
- result = buf_get_u32(reg_params[5].value, 0, 32);
- if (result == 2) {
- LOG_ERROR("Timeout error from flash write "
- "programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run_ret;
- } else if (result != 0) {
- LOG_ERROR("Unexpected error %d from flash write "
- "programming algorithm", result);
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run_ret;
- } else
- retval = ERROR_OK;
-
- halfword_count -= halfwords;
- offset += halfwords * 2;
- buffer += halfwords * 2;
- byte_count -= MIN(halfwords * 2, byte_count);
- }
-
-err_run_ret:
-err_run:
-err_write_data:
- retval = fm4_enter_flash_cpu_rom_mode(target);
-
-err_flash_mode:
- for (i = 0; i < ARRAY_SIZE(reg_params); i++)
- destroy_reg_param(®_params[i]);
-
- target_free_working_area(target, data_workarea);
-err_alloc_data:
-err_write_code:
- target_free_working_area(target, code_workarea);
-
- return retval;
-}
-
-static int mb9bf_probe(struct flash_bank *bank)
-{
- struct fm4_flash_bank *fm4_bank = bank->driver_priv;
- uint32_t flash_addr = bank->base;
- int i;
-
- switch (fm4_bank->variant) {
- case mb9bfx64:
- bank->num_sectors = 8;
- break;
- case mb9bfx65:
- bank->num_sectors = 10;
- break;
- case mb9bfx66:
- bank->num_sectors = 12;
- break;
- case mb9bfx67:
- bank->num_sectors = 16;
- break;
- case mb9bfx68:
- bank->num_sectors = 20;
- break;
- default:
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
-
- LOG_DEBUG("%d sectors", bank->num_sectors);
- bank->sectors = calloc(bank->num_sectors,
- sizeof(struct flash_sector));
- for (i = 0; i < bank->num_sectors; i++) {
- if (i < 4)
- bank->sectors[i].size = 8 * 1024;
- else if (i == 4)
- bank->sectors[i].size = 32 * 1024;
- else
- bank->sectors[i].size = 64 * 1024;
- bank->sectors[i].offset = flash_addr - bank->base;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
-
- bank->size += bank->sectors[i].size;
- flash_addr += bank->sectors[i].size;
- }
-
- return ERROR_OK;
-}
-
-static void s6e2cc_init_sector(struct flash_sector *sector, int sa)
-{
- if (sa < 8)
- sector->size = 8 * 1024;
- else if (sa == 8)
- sector->size = 32 * 1024;
- else
- sector->size = 64 * 1024;
-
- sector->is_erased = -1;
- sector->is_protected = -1;
-}
-
-static int s6e2cc_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct fm4_flash_bank *fm4_bank = bank->driver_priv;
- uint32_t u32_value;
- uint32_t flash_addr = bank->base;
- int i, retval, num_sectors, num_extra_sectors;
-
- retval = target_read_u32(target, DFCTRLR, &u32_value);
- if (retval != ERROR_OK)
- return retval;
- if (u32_value & DFCTRLR_DFE) {
- LOG_WARNING("Dual Flash mode is not implemented.");
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
-
- switch (fm4_bank->variant) {
- case s6e2cx8:
- num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 0;
- break;
- case s6e2cx9:
- num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 12;
- break;
- case s6e2cxa:
- num_sectors = 20;
- break;
- default:
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
- num_extra_sectors = (fm4_bank->macro_nr == 0) ? 1 : 4;
- bank->num_sectors = num_sectors + num_extra_sectors;
-
- LOG_DEBUG("%d sectors", bank->num_sectors);
- bank->sectors = calloc(bank->num_sectors,
- sizeof(struct flash_sector));
- for (i = 0; i < num_sectors; i++) {
- int sa = 4 + i;
- bank->sectors[i].offset = flash_addr - bank->base;
- s6e2cc_init_sector(&bank->sectors[i], sa);
-
- bank->size += bank->sectors[i].size;
- flash_addr += bank->sectors[i].size;
- }
-
- flash_addr = (fm4_bank->macro_nr == 0) ? 0x00406000 : 0x00408000;
- for (; i < bank->num_sectors; i++) {
- int sa = 4 - num_extra_sectors + (i - num_sectors);
- bank->sectors[i].offset = flash_addr - bank->base;
- s6e2cc_init_sector(&bank->sectors[i], sa);
-
- /*
- * Don't increase bank->size for these sectors
- * to avoid an overlap between Flash Macros #0 and #1.
- */
- flash_addr += bank->sectors[i].size;
- }
-
- return ERROR_OK;
-}
-
-static int s6e2dh_probe(struct flash_bank *bank)
-{
- uint32_t flash_addr = bank->base;
- int i;
-
- bank->num_sectors = 10;
- bank->sectors = calloc(bank->num_sectors,
- sizeof(struct flash_sector));
- for (i = 0; i < bank->num_sectors; i++) {
- if (i < 4)
- bank->sectors[i].size = 8 * 1024;
- else if (i == 4)
- bank->sectors[i].size = 32 * 1024;
- else
- bank->sectors[i].size = 64 * 1024;
- bank->sectors[i].offset = flash_addr - bank->base;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
-
- bank->size += bank->sectors[i].size;
- flash_addr += bank->sectors[i].size;
- }
-
- return ERROR_OK;
-}
-
-static int fm4_probe(struct flash_bank *bank)
-{
- struct fm4_flash_bank *fm4_bank = bank->driver_priv;
- int retval;
-
- if (fm4_bank->probed)
- return ERROR_OK;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- switch (fm4_bank->variant) {
- case mb9bfx64:
- case mb9bfx65:
- case mb9bfx66:
- case mb9bfx67:
- case mb9bfx68:
- retval = mb9bf_probe(bank);
- break;
- case s6e2cx8:
- case s6e2cx9:
- case s6e2cxa:
- retval = s6e2cc_probe(bank);
- break;
- case s6e2dx:
- retval = s6e2dh_probe(bank);
- break;
- default:
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
- if (retval != ERROR_OK)
- return retval;
-
- fm4_bank->probed = true;
-
- return ERROR_OK;
-}
-
-static int fm4_auto_probe(struct flash_bank *bank)
-{
- struct fm4_flash_bank *fm4_bank = bank->driver_priv;
-
- if (fm4_bank->probed)
- return ERROR_OK;
-
- return fm4_probe(bank);
-}
-
-static int fm4_protect_check(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-static int fm4_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct fm4_flash_bank *fm4_bank = bank->driver_priv;
- const char *name;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- switch (fm4_bank->variant) {
- case mb9bfx64:
- name = "MB9BFx64";
- break;
- case mb9bfx65:
- name = "MB9BFx65";
- break;
- case mb9bfx66:
- name = "MB9BFx66";
- break;
- case mb9bfx67:
- name = "MB9BFx67";
- break;
- case mb9bfx68:
- name = "MB9BFx68";
- break;
- case s6e2cx8:
- name = "S6E2Cx8";
- break;
- case s6e2cx9:
- name = "S6E2Cx9";
- break;
- case s6e2cxa:
- name = "S6E2CxA";
- break;
- case s6e2dx:
- name = "S6E2Dx";
- break;
- default:
- name = "unknown";
- break;
- }
-
- switch (fm4_bank->variant) {
- case s6e2cx8:
- case s6e2cx9:
- case s6e2cxa:
- snprintf(buf, buf_size, "%s MainFlash Macro #%i",
- name, fm4_bank->macro_nr);
- break;
- default:
- snprintf(buf, buf_size, "%s MainFlash", name);
- break;
- }
-
- return ERROR_OK;
-}
-
-static bool fm4_name_match(const char *s, const char *pattern)
-{
- int i = 0;
-
- while (s[i]) {
- /* If the match string is shorter, ignore excess */
- if (!pattern[i])
- return true;
- /* Use x as wildcard */
- if (pattern[i] != 'x' && tolower(s[i]) != tolower(pattern[i]))
- return false;
- i++;
- }
- return true;
-}
-
-static int mb9bf_bank_setup(struct flash_bank *bank, const char *variant)
-{
- struct fm4_flash_bank *fm4_bank = bank->driver_priv;
-
- if (fm4_name_match(variant, "MB9BFx64")) {
- fm4_bank->variant = mb9bfx64;
- } else if (fm4_name_match(variant, "MB9BFx65")) {
- fm4_bank->variant = mb9bfx65;
- } else if (fm4_name_match(variant, "MB9BFx66")) {
- fm4_bank->variant = mb9bfx66;
- } else if (fm4_name_match(variant, "MB9BFx67")) {
- fm4_bank->variant = mb9bfx67;
- } else if (fm4_name_match(variant, "MB9BFx68")) {
- fm4_bank->variant = mb9bfx68;
- } else {
- LOG_WARNING("MB9BF variant %s not recognized.", variant);
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
-
- return ERROR_OK;
-}
-
-static int s6e2cc_bank_setup(struct flash_bank *bank, const char *variant)
-{
- struct fm4_flash_bank *fm4_bank = bank->driver_priv;
-
- if (fm4_name_match(variant, "S6E2Cx8")) {
- fm4_bank->variant = s6e2cx8;
- } else if (fm4_name_match(variant, "S6E2Cx9")) {
- fm4_bank->variant = s6e2cx9;
- } else if (fm4_name_match(variant, "S6E2CxA")) {
- fm4_bank->variant = s6e2cxa;
- } else {
- LOG_WARNING("S6E2CC variant %s not recognized.", variant);
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
-
- return ERROR_OK;
-}
-
-FLASH_BANK_COMMAND_HANDLER(fm4_flash_bank_command)
-{
- struct fm4_flash_bank *fm4_bank;
- const char *variant;
- int ret;
-
- if (CMD_ARGC < 7)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- variant = CMD_ARGV[6];
-
- fm4_bank = malloc(sizeof(struct fm4_flash_bank));
- if (!fm4_bank)
- return ERROR_FLASH_OPERATION_FAILED;
-
- fm4_bank->probed = false;
- fm4_bank->macro_nr = (bank->base == 0x00000000) ? 0 : 1;
-
- bank->driver_priv = fm4_bank;
-
- if (fm4_name_match(variant, "MB9BF"))
- ret = mb9bf_bank_setup(bank, variant);
- else if (fm4_name_match(variant, "S6E2Cx"))
- ret = s6e2cc_bank_setup(bank, variant);
- else if (fm4_name_match(variant, "S6E2Dx")) {
- fm4_bank->variant = s6e2dx;
- ret = ERROR_OK;
- } else {
- LOG_WARNING("Family %s not recognized.", variant);
- ret = ERROR_FLASH_OPER_UNSUPPORTED;
- }
- if (ret != ERROR_OK)
- free(fm4_bank);
- return ret;
-}
-
-static const struct command_registration fm4_exec_command_handlers[] = {
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration fm4_command_handlers[] = {
- {
- .name = "fm4",
- .mode = COMMAND_ANY,
- .help = "fm4 flash command group",
- .usage = "",
- .chain = fm4_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver fm4_flash = {
- .name = "fm4",
- .commands = fm4_command_handlers,
- .flash_bank_command = fm4_flash_bank_command,
- .info = fm4_get_info_command,
- .probe = fm4_probe,
- .auto_probe = fm4_auto_probe,
- .protect_check = fm4_protect_check,
- .read = default_flash_read,
- .erase = fm4_flash_erase,
- .erase_check = default_flash_blank_check,
- .write = fm4_flash_write,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/imp.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/imp.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/imp.h
deleted file mode 100755
index 31d0984..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/imp.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FLASH_NOR_IMP_H
-#define FLASH_NOR_IMP_H
-
-/* this is an internal header */
-#include "core.h"
-#include "driver.h"
-/* almost all drivers will need this file */
-#include <target/target.h>
-
-/**
- * Adds a new NOR bank to the global list of banks.
- * @param bank The bank that should be added.
- */
-void flash_bank_add(struct flash_bank *bank);
-
-/**
- * @return The first bank in the global list.
- */
-struct flash_bank *flash_bank_list(void);
-
-int flash_driver_erase(struct flash_bank *bank, int first, int last);
-int flash_driver_protect(struct flash_bank *bank, int set, int first, int last);
-int flash_driver_write(struct flash_bank *bank,
- uint8_t *buffer, uint32_t offset, uint32_t count);
-int flash_driver_read(struct flash_bank *bank,
- uint8_t *buffer, uint32_t offset, uint32_t count);
-
-/* write (optional verify) an image to flash memory of the given target */
-int flash_write_unlock(struct target *target, struct image *image,
- uint32_t *written, int erase, bool unlock);
-
-#endif /* FLASH_NOR_IMP_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/jtagspi.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/jtagspi.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/jtagspi.c
deleted file mode 100755
index 1e623a7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/jtagspi.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 Robert Jordens <jo...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <jtag/jtag.h>
-#include <flash/nor/spi.h>
-#include <helper/time_support.h>
-
-#define JTAGSPI_MAX_TIMEOUT 3000
-
-
-struct jtagspi_flash_bank {
- struct jtag_tap *tap;
- const struct flash_device *dev;
- int probed;
- uint32_t ir;
- uint32_t dr_len;
-};
-
-FLASH_BANK_COMMAND_HANDLER(jtagspi_flash_bank_command)
-{
- struct jtagspi_flash_bank *info;
-
- if (CMD_ARGC < 8)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- info = malloc(sizeof(struct jtagspi_flash_bank));
- if (info == NULL) {
- LOG_ERROR("no memory for flash bank info");
- return ERROR_FAIL;
- }
- bank->driver_priv = info;
-
- info->tap = NULL;
- info->probed = 0;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], info->ir);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[7], info->dr_len);
-
- return ERROR_OK;
-}
-
-static void jtagspi_set_ir(struct flash_bank *bank)
-{
- struct jtagspi_flash_bank *info = bank->driver_priv;
- struct scan_field field;
- uint8_t buf[4];
-
- if (buf_get_u32(info->tap->cur_instr, 0, info->tap->ir_length) == info->ir)
- return;
-
- LOG_DEBUG("loading jtagspi ir");
- buf_set_u32(buf, 0, info->tap->ir_length, info->ir);
- field.num_bits = info->tap->ir_length;
- field.out_value = buf;
- field.in_value = NULL;
- jtag_add_ir_scan(info->tap, &field, TAP_IDLE);
-}
-
-static void flip_u8(uint8_t *in, uint8_t *out, int len)
-{
- for (int i = 0; i < len; i++)
- out[i] = flip_u32(in[i], 8);
-}
-
-static int jtagspi_cmd(struct flash_bank *bank, uint8_t cmd,
- uint32_t *addr, uint8_t *data, int len)
-{
- struct jtagspi_flash_bank *info = bank->driver_priv;
- struct scan_field fields[3];
- uint8_t cmd_buf[4];
- uint8_t *data_buf;
- int is_read, lenb, n;
-
- /* LOG_DEBUG("cmd=0x%02x len=%i", cmd, len); */
-
- n = 0;
- fields[n].num_bits = 8;
- cmd_buf[0] = cmd;
- if (addr) {
- h_u24_to_be(cmd_buf + 1, *addr);
- fields[n].num_bits += 24;
- }
- flip_u8(cmd_buf, cmd_buf, 4);
- fields[n].out_value = cmd_buf;
- fields[n].in_value = NULL;
- n++;
-
- is_read = (len < 0);
- if (is_read)
- len = -len;
- lenb = DIV_ROUND_UP(len, 8);
- data_buf = malloc(lenb);
- if (lenb > 0) {
- if (data_buf == NULL) {
- LOG_ERROR("no memory for spi buffer");
- return ERROR_FAIL;
- }
- if (is_read) {
- fields[n].num_bits = info->dr_len;
- fields[n].out_value = NULL;
- fields[n].in_value = NULL;
- n++;
- fields[n].out_value = NULL;
- fields[n].in_value = data_buf;
- } else {
- flip_u8(data, data_buf, lenb);
- fields[n].out_value = data_buf;
- fields[n].in_value = NULL;
- }
- fields[n].num_bits = len;
- n++;
- }
-
- jtagspi_set_ir(bank);
- jtag_add_dr_scan(info->tap, n, fields, TAP_IDLE);
- jtag_execute_queue();
-
- if (is_read)
- flip_u8(data_buf, data, lenb);
- free(data_buf);
- return ERROR_OK;
-}
-
-static int jtagspi_probe(struct flash_bank *bank)
-{
- struct jtagspi_flash_bank *info = bank->driver_priv;
- struct flash_sector *sectors;
- uint8_t in_buf[3];
- uint32_t id;
-
- if (info->probed)
- free(bank->sectors);
- info->probed = 0;
-
- if (bank->target->tap == NULL) {
- LOG_ERROR("Target has no JTAG tap");
- return ERROR_FAIL;
- }
- info->tap = bank->target->tap;
-
- jtagspi_cmd(bank, SPIFLASH_READ_ID, NULL, in_buf, -24);
- /* the table in spi.c has the manufacturer byte (first) as the lsb */
- id = le_to_h_u24(in_buf);
-
- info->dev = NULL;
- for (const struct flash_device *p = flash_devices; p->name ; p++)
- if (p->device_id == id) {
- info->dev = p;
- break;
- }
-
- if (!(info->dev)) {
- LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
- return ERROR_FAIL;
- }
-
- LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")",
- info->dev->name, info->dev->device_id);
-
- /* Set correct size value */
- bank->size = info->dev->size_in_bytes;
-
- /* create and fill sectors array */
- bank->num_sectors =
- info->dev->size_in_bytes / info->dev->sectorsize;
- sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- if (sectors == NULL) {
- LOG_ERROR("not enough memory");
- return ERROR_FAIL;
- }
-
- for (int sector = 0; sector < bank->num_sectors; sector++) {
- sectors[sector].offset = sector * info->dev->sectorsize;
- sectors[sector].size = info->dev->sectorsize;
- sectors[sector].is_erased = -1;
- sectors[sector].is_protected = 0;
- }
-
- bank->sectors = sectors;
- info->probed = 1;
- return ERROR_OK;
-}
-
-static void jtagspi_read_status(struct flash_bank *bank, uint32_t *status)
-{
- uint8_t buf;
- jtagspi_cmd(bank, SPIFLASH_READ_STATUS, NULL, &buf, -8);
- *status = buf;
- /* LOG_DEBUG("status=0x%08" PRIx32, *status); */
-}
-
-static int jtagspi_wait(struct flash_bank *bank, int timeout_ms)
-{
- uint32_t status;
- long long t0 = timeval_ms();
- long long dt;
-
- do {
- dt = timeval_ms() - t0;
- jtagspi_read_status(bank, &status);
- if ((status & SPIFLASH_BSY_BIT) == 0) {
- LOG_DEBUG("waited %lld ms", dt);
- return ERROR_OK;
- }
- alive_sleep(1);
- } while (dt <= timeout_ms);
-
- LOG_ERROR("timeout, device still busy");
- return ERROR_FAIL;
-}
-
-static int jtagspi_write_enable(struct flash_bank *bank)
-{
- uint32_t status;
-
- jtagspi_cmd(bank, SPIFLASH_WRITE_ENABLE, NULL, NULL, 0);
- jtagspi_read_status(bank, &status);
- if ((status & SPIFLASH_WE_BIT) == 0) {
- LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32, status);
- return ERROR_FAIL;
- }
- return ERROR_OK;
-}
-
-static int jtagspi_bulk_erase(struct flash_bank *bank)
-{
- struct jtagspi_flash_bank *info = bank->driver_priv;
- int retval;
- long long t0 = timeval_ms();
-
- retval = jtagspi_write_enable(bank);
- if (retval != ERROR_OK)
- return retval;
- jtagspi_cmd(bank, info->dev->chip_erase_cmd, NULL, NULL, 0);
- retval = jtagspi_wait(bank, bank->num_sectors*JTAGSPI_MAX_TIMEOUT);
- LOG_INFO("took %lld ms", timeval_ms() - t0);
- return retval;
-}
-
-static int jtagspi_sector_erase(struct flash_bank *bank, int sector)
-{
- struct jtagspi_flash_bank *info = bank->driver_priv;
- int retval;
- long long t0 = timeval_ms();
-
- retval = jtagspi_write_enable(bank);
- if (retval != ERROR_OK)
- return retval;
- jtagspi_cmd(bank, info->dev->erase_cmd, &bank->sectors[sector].offset, NULL, 0);
- retval = jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT);
- LOG_INFO("sector %d took %lld ms", sector, timeval_ms() - t0);
- return retval;
-}
-
-static int jtagspi_erase(struct flash_bank *bank, int first, int last)
-{
- int sector;
- struct jtagspi_flash_bank *info = bank->driver_priv;
- int retval = ERROR_OK;
-
- LOG_DEBUG("erase from sector %d to sector %d", first, last);
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
- LOG_ERROR("Flash sector invalid");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- if (!(info->probed)) {
- LOG_ERROR("Flash bank not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- for (sector = first; sector <= last; sector++) {
- if (bank->sectors[sector].is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
- return ERROR_FAIL;
- }
- }
-
- if (first == 0 && last == (bank->num_sectors - 1)
- && info->dev->chip_erase_cmd != info->dev->erase_cmd) {
- LOG_DEBUG("Trying bulk erase.");
- retval = jtagspi_bulk_erase(bank);
- if (retval == ERROR_OK)
- return retval;
- else
- LOG_WARNING("Bulk flash erase failed. Falling back to sector erase.");
- }
-
- for (sector = first; sector <= last; sector++) {
- retval = jtagspi_sector_erase(bank, sector);
- if (retval != ERROR_OK) {
- LOG_ERROR("Sector erase failed.");
- break;
- }
- }
-
- return retval;
-}
-
-static int jtagspi_protect(struct flash_bank *bank, int set, int first, int last)
-{
- int sector;
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
- LOG_ERROR("Flash sector invalid");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- for (sector = first; sector <= last; sector++)
- bank->sectors[sector].is_protected = set;
- return ERROR_OK;
-}
-
-static int jtagspi_protect_check(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-static int jtagspi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct jtagspi_flash_bank *info = bank->driver_priv;
-
- if (!(info->probed)) {
- LOG_ERROR("Flash bank not yet probed.");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- jtagspi_cmd(bank, SPIFLASH_READ, &offset, buffer, -count*8);
- return ERROR_OK;
-}
-
-static int jtagspi_page_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- int retval;
-
- retval = jtagspi_write_enable(bank);
- if (retval != ERROR_OK)
- return retval;
- jtagspi_cmd(bank, SPIFLASH_PAGE_PROGRAM, &offset, (uint8_t *) buffer, count*8);
- return jtagspi_wait(bank, JTAGSPI_MAX_TIMEOUT);
-}
-
-static int jtagspi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct jtagspi_flash_bank *info = bank->driver_priv;
- int retval;
- uint32_t n;
-
- if (!(info->probed)) {
- LOG_ERROR("Flash bank not yet probed.");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- for (n = 0; n < count; n += info->dev->pagesize) {
- retval = jtagspi_page_write(bank, buffer + n, offset + n,
- MIN(count - n, info->dev->pagesize));
- if (retval != ERROR_OK) {
- LOG_ERROR("page write error");
- return retval;
- }
- LOG_DEBUG("wrote page at 0x%08" PRIx32, offset + n);
- }
- return ERROR_OK;
-}
-
-static int jtagspi_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct jtagspi_flash_bank *info = bank->driver_priv;
-
- if (!(info->probed)) {
- snprintf(buf, buf_size, "\nJTAGSPI flash bank not probed yet\n");
- return ERROR_OK;
- }
-
- snprintf(buf, buf_size, "\nSPIFI flash information:\n"
- " Device \'%s\' (ID 0x%08" PRIx32 ")\n",
- info->dev->name, info->dev->device_id);
-
- return ERROR_OK;
-}
-
-struct flash_driver jtagspi_flash = {
- .name = "jtagspi",
- .flash_bank_command = jtagspi_flash_bank_command,
- .erase = jtagspi_erase,
- .protect = jtagspi_protect,
- .write = jtagspi_write,
- .read = jtagspi_read,
- .probe = jtagspi_probe,
- .auto_probe = jtagspi_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = jtagspi_protect_check,
- .info = jtagspi_info
-};
[11/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/binarybuffer.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/binarybuffer.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/binarybuffer.h
deleted file mode 100755
index eaa8c52..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/binarybuffer.h
+++ /dev/null
@@ -1,243 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2004, 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef BINARYBUFFER_H
-#define BINARYBUFFER_H
-
-#include "list.h"
-
-/** @file
- * Support functions to access arbitrary bits in a byte array
- */
-
-/**
- * Sets @c num bits in @c _buffer, starting at the @c first bit,
- * using the bits in @c value. This routine fast-paths writes
- * of little-endian, byte-aligned, 32-bit words.
- * @param _buffer The buffer whose bits will be set.
- * @param first The bit offset in @c _buffer to start writing (0-31).
- * @param num The number of bits from @c value to copy (1-32).
- * @param value Up to 32 bits that will be copied to _buffer.
- */
-static inline void buf_set_u32(uint8_t *_buffer,
- unsigned first, unsigned num, uint32_t value)
-{
- uint8_t *buffer = _buffer;
-
- if ((num == 32) && (first == 0)) {
- buffer[3] = (value >> 24) & 0xff;
- buffer[2] = (value >> 16) & 0xff;
- buffer[1] = (value >> 8) & 0xff;
- buffer[0] = (value >> 0) & 0xff;
- } else {
- for (unsigned i = first; i < first + num; i++) {
- if (((value >> (i - first)) & 1) == 1)
- buffer[i / 8] |= 1 << (i % 8);
- else
- buffer[i / 8] &= ~(1 << (i % 8));
- }
- }
-}
-
-/**
- * Sets @c num bits in @c _buffer, starting at the @c first bit,
- * using the bits in @c value. This routine fast-paths writes
- * of little-endian, byte-aligned, 64-bit words.
- * @param _buffer The buffer whose bits will be set.
- * @param first The bit offset in @c _buffer to start writing (0-63).
- * @param num The number of bits from @c value to copy (1-64).
- * @param value Up to 64 bits that will be copied to _buffer.
- */
-static inline void buf_set_u64(uint8_t *_buffer,
- unsigned first, unsigned num, uint64_t value)
-{
- uint8_t *buffer = _buffer;
-
- if ((num == 32) && (first == 0)) {
- buffer[3] = (value >> 24) & 0xff;
- buffer[2] = (value >> 16) & 0xff;
- buffer[1] = (value >> 8) & 0xff;
- buffer[0] = (value >> 0) & 0xff;
- } else if ((num == 64) && (first == 0)) {
- buffer[7] = (value >> 56) & 0xff;
- buffer[6] = (value >> 48) & 0xff;
- buffer[5] = (value >> 40) & 0xff;
- buffer[4] = (value >> 32) & 0xff;
- buffer[3] = (value >> 24) & 0xff;
- buffer[2] = (value >> 16) & 0xff;
- buffer[1] = (value >> 8) & 0xff;
- buffer[0] = (value >> 0) & 0xff;
- } else {
- for (unsigned i = first; i < first + num; i++) {
- if (((value >> (i - first)) & 1) == 1)
- buffer[i / 8] |= 1 << (i % 8);
- else
- buffer[i / 8] &= ~(1 << (i % 8));
- }
- }
-}
-
-/**
- * Retrieves @c num bits from @c _buffer, starting at the @c first bit,
- * returning the bits in a 32-bit word. This routine fast-paths reads
- * of little-endian, byte-aligned, 32-bit words.
- * @param _buffer The buffer whose bits will be read.
- * @param first The bit offset in @c _buffer to start reading (0-31).
- * @param num The number of bits from @c _buffer to read (1-32).
- * @returns Up to 32-bits that were read from @c _buffer.
- */
-static inline uint32_t buf_get_u32(const uint8_t *_buffer,
- unsigned first, unsigned num)
-{
- const uint8_t *buffer = _buffer;
-
- if ((num == 32) && (first == 0)) {
- return (((uint32_t)buffer[3]) << 24) |
- (((uint32_t)buffer[2]) << 16) |
- (((uint32_t)buffer[1]) << 8) |
- (((uint32_t)buffer[0]) << 0);
- } else {
- uint32_t result = 0;
- for (unsigned i = first; i < first + num; i++) {
- if (((buffer[i / 8] >> (i % 8)) & 1) == 1)
- result |= 1 << (i - first);
- }
- return result;
- }
-}
-
-/**
- * Retrieves @c num bits from @c _buffer, starting at the @c first bit,
- * returning the bits in a 64-bit word. This routine fast-paths reads
- * of little-endian, byte-aligned, 64-bit words.
- * @param _buffer The buffer whose bits will be read.
- * @param first The bit offset in @c _buffer to start reading (0-63).
- * @param num The number of bits from @c _buffer to read (1-64).
- * @returns Up to 64-bits that were read from @c _buffer.
- */
-static inline uint64_t buf_get_u64(const uint8_t *_buffer,
- unsigned first, unsigned num)
-{
- const uint8_t *buffer = _buffer;
-
- if ((num == 32) && (first == 0)) {
- return 0 + ((((uint32_t)buffer[3]) << 24) | /* Note - zero plus is to avoid a checkpatch bug */
- (((uint32_t)buffer[2]) << 16) |
- (((uint32_t)buffer[1]) << 8) |
- (((uint32_t)buffer[0]) << 0));
- } else if ((num == 64) && (first == 0)) {
- return 0 + ((((uint64_t)buffer[7]) << 56) | /* Note - zero plus is to avoid a checkpatch bug */
- (((uint64_t)buffer[6]) << 48) |
- (((uint64_t)buffer[5]) << 40) |
- (((uint64_t)buffer[4]) << 32) |
- (((uint64_t)buffer[3]) << 24) |
- (((uint64_t)buffer[2]) << 16) |
- (((uint64_t)buffer[1]) << 8) |
- (((uint64_t)buffer[0]) << 0));
- } else {
- uint64_t result = 0;
- for (unsigned i = first; i < first + num; i++) {
- if (((buffer[i / 8] >> (i % 8)) & 1) == 1)
- result = result | ((uint64_t)1 << (uint64_t)(i - first));
- }
- return result;
- }
-}
-
-
-/**
- * Inverts the ordering of bits inside a 32-bit word (e.g. 31..0 -> 0..31).
- * This routine can be used to flip smaller data types by using smaller
- * values for @c width.
- * @param value The word to flip.
- * @param width The number of bits in value (2-32).
- * @returns A 32-bit word with @c value in reversed bit-order.
- */
-uint32_t flip_u32(uint32_t value, unsigned width);
-
-bool buf_cmp(const void *buf1, const void *buf2, unsigned size);
-bool buf_cmp_mask(const void *buf1, const void *buf2,
- const void *mask, unsigned size);
-
-/**
- * Copies @c size bits out of @c from and into @c to. Any extra
- * bits in the final byte will be set to zero.
- * @param from The buffer to copy into @c to.
- * @param to The buffer that will receive the copy of @c from.
- * @param size The number of bits to copy.
- */
-void *buf_cpy(const void *from, void *to, unsigned size);
-
-/**
- * Set the contents of @c buf with @c count bits, all set to 1.
- * @param buf The buffer to fill with ones.
- * @param size The number of bits.
- * @returns The original buffer (@c buf).
- */
-void *buf_set_ones(void *buf, unsigned size);
-
-void *buf_set_buf(const void *src, unsigned src_start,
- void *dst, unsigned dst_start, unsigned len);
-
-int str_to_buf(const char *str, unsigned len,
- void *bin_buf, unsigned buf_size, unsigned radix);
-char *buf_to_str(const void *buf, unsigned size, unsigned radix);
-
-/* read a uint32_t from a buffer in target memory endianness */
-static inline uint32_t fast_target_buffer_get_u32(const void *p, bool le)
-{
- return le ? le_to_h_u32(p) : be_to_h_u32(p);
-}
-
-static inline void bit_copy(uint8_t *dst, unsigned dst_offset, const uint8_t *src,
- unsigned src_offset, unsigned bit_count)
-{
- buf_set_buf(src, src_offset, dst, dst_offset, bit_count);
-}
-
-struct bit_copy_queue {
- struct list_head list;
-};
-
-struct bit_copy_queue_entry {
- uint8_t *dst;
- unsigned dst_offset;
- const uint8_t *src;
- unsigned src_offset;
- unsigned bit_count;
- struct list_head list;
-};
-
-void bit_copy_queue_init(struct bit_copy_queue *q);
-int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned dst_offset, const uint8_t *src,
- unsigned src_offset, unsigned bit_count);
-void bit_copy_execute(struct bit_copy_queue *q);
-void bit_copy_discard(struct bit_copy_queue *q);
-
-/* functions to convert to/from hex encoded buffer
- * used in ti-icdi driver and gdb server */
-int unhexify(char *bin, const char *hex, int count);
-int hexify(char *hex, const char *bin, int count, int out_maxlen);
-void buffer_shr(void *_buf, unsigned buf_len, unsigned count);
-
-#endif /* BINARYBUFFER_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/command.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/command.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/command.c
deleted file mode 100755
index a0aa9e8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/command.c
+++ /dev/null
@@ -1,1468 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008, Duane Ellis *
- * openocd@duaneeellis.com *
- * *
- * part of this file is taken from libcli (libcli.sourceforge.net) *
- * Copyright (C) David Parrish (david@dparrish.com) *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-/* see Embedded-HOWTO.txt in Jim Tcl project hosted on BerliOS*/
-#define JIM_EMBEDDED
-
-/* @todo the inclusion of target.h here is a layering violation */
-#include <jtag/jtag.h>
-#include <target/target.h>
-#include "command.h"
-#include "configuration.h"
-#include "log.h"
-#include "time_support.h"
-#include "jim-eventloop.h"
-
-/* nice short description of source file */
-#define __THIS__FILE__ "command.c"
-
-static int run_command(struct command_context *context,
- struct command *c, const char *words[], unsigned num_words);
-
-struct log_capture_state {
- Jim_Interp *interp;
- Jim_Obj *output;
-};
-
-static void tcl_output(void *privData, const char *file, unsigned line,
- const char *function, const char *string)
-{
- struct log_capture_state *state = privData;
- Jim_AppendString(state->interp, state->output, string, strlen(string));
-}
-
-static struct log_capture_state *command_log_capture_start(Jim_Interp *interp)
-{
- /* capture log output and return it. A garbage collect can
- * happen, so we need a reference count to this object */
- Jim_Obj *tclOutput = Jim_NewStringObj(interp, "", 0);
- if (NULL == tclOutput)
- return NULL;
-
- struct log_capture_state *state = malloc(sizeof(*state));
- if (NULL == state)
- return NULL;
-
- state->interp = interp;
- Jim_IncrRefCount(tclOutput);
- state->output = tclOutput;
-
- log_add_callback(tcl_output, state);
-
- return state;
-}
-
-/* Classic openocd commands provide progress output which we
- * will capture and return as a Tcl return value.
- *
- * However, if a non-openocd command has been invoked, then it
- * makes sense to return the tcl return value from that command.
- *
- * The tcl return value is empty for openocd commands that provide
- * progress output.
- *
- * Therefore we set the tcl return value only if we actually
- * captured output.
- */
-static void command_log_capture_finish(struct log_capture_state *state)
-{
- if (NULL == state)
- return;
-
- log_remove_callback(tcl_output, state);
-
- int length;
- Jim_GetString(state->output, &length);
-
- if (length > 0)
- Jim_SetResult(state->interp, state->output);
- else {
- /* No output captured, use tcl return value (which could
- * be empty too). */
- }
- Jim_DecrRefCount(state->interp, state->output);
-
- free(state);
-}
-
-static int command_retval_set(Jim_Interp *interp, int retval)
-{
- int *return_retval = Jim_GetAssocData(interp, "retval");
- if (return_retval != NULL)
- *return_retval = retval;
-
- return (retval == ERROR_OK) ? JIM_OK : retval;
-}
-
-extern struct command_context *global_cmd_ctx;
-
-/* dump a single line to the log for the command.
- * Do nothing in case we are not at debug level 3 */
-void script_debug(Jim_Interp *interp, const char *name,
- unsigned argc, Jim_Obj * const *argv)
-{
- if (debug_level < LOG_LVL_DEBUG)
- return;
-
- char *dbg = alloc_printf("command - %s", name);
- for (unsigned i = 0; i < argc; i++) {
- int len;
- const char *w = Jim_GetString(argv[i], &len);
- char *t = alloc_printf("%s %s", dbg, w);
- free(dbg);
- dbg = t;
- }
- LOG_DEBUG("%s", dbg);
- free(dbg);
-}
-
-static void script_command_args_free(char **words, unsigned nwords)
-{
- for (unsigned i = 0; i < nwords; i++)
- free(words[i]);
- free(words);
-}
-
-static char **script_command_args_alloc(
- unsigned argc, Jim_Obj * const *argv, unsigned *nwords)
-{
- char **words = malloc(argc * sizeof(char *));
- if (NULL == words)
- return NULL;
-
- unsigned i;
- for (i = 0; i < argc; i++) {
- int len;
- const char *w = Jim_GetString(argv[i], &len);
- words[i] = strdup(w);
- if (words[i] == NULL) {
- script_command_args_free(words, i);
- return NULL;
- }
- }
- *nwords = i;
- return words;
-}
-
-struct command_context *current_command_context(Jim_Interp *interp)
-{
- /* grab the command context from the associated data */
- struct command_context *cmd_ctx = Jim_GetAssocData(interp, "context");
- if (NULL == cmd_ctx) {
- /* Tcl can invoke commands directly instead of via command_run_line(). This would
- * happen when the Jim Tcl interpreter is provided by eCos or if we are running
- * commands in a startup script.
- *
- * A telnet or gdb server would provide a non-default command context to
- * handle piping of error output, have a separate current target, etc.
- */
- cmd_ctx = global_cmd_ctx;
- }
- return cmd_ctx;
-}
-
-static int script_command_run(Jim_Interp *interp,
- int argc, Jim_Obj * const *argv, struct command *c, bool capture)
-{
- target_call_timer_callbacks_now();
- LOG_USER_N("%s", ""); /* Keep GDB connection alive*/
-
- unsigned nwords;
- char **words = script_command_args_alloc(argc, argv, &nwords);
- if (NULL == words)
- return JIM_ERR;
-
- struct log_capture_state *state = NULL;
- if (capture)
- state = command_log_capture_start(interp);
-
- struct command_context *cmd_ctx = current_command_context(interp);
- int retval = run_command(cmd_ctx, c, (const char **)words, nwords);
-
- command_log_capture_finish(state);
-
- script_command_args_free(words, nwords);
- return command_retval_set(interp, retval);
-}
-
-static int script_command(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- /* the private data is stashed in the interp structure */
-
- struct command *c = interp->cmdPrivData;
- assert(c);
- script_debug(interp, c->name, argc, argv);
- return script_command_run(interp, argc, argv, c, true);
-}
-
-static struct command *command_root(struct command *c)
-{
- while (NULL != c->parent)
- c = c->parent;
- return c;
-}
-
-/**
- * Find a command by name from a list of commands.
- * @returns Returns the named command if it exists in the list.
- * Returns NULL otherwise.
- */
-static struct command *command_find(struct command *head, const char *name)
-{
- for (struct command *cc = head; cc; cc = cc->next) {
- if (strcmp(cc->name, name) == 0)
- return cc;
- }
- return NULL;
-}
-
-struct command *command_find_in_context(struct command_context *cmd_ctx,
- const char *name)
-{
- return command_find(cmd_ctx->commands, name);
-}
-struct command *command_find_in_parent(struct command *parent,
- const char *name)
-{
- return command_find(parent->children, name);
-}
-
-/**
- * Add the command into the linked list, sorted by name.
- * @param head Address to head of command list pointer, which may be
- * updated if @c c gets inserted at the beginning of the list.
- * @param c The command to add to the list pointed to by @c head.
- */
-static void command_add_child(struct command **head, struct command *c)
-{
- assert(head);
- if (NULL == *head) {
- *head = c;
- return;
- }
-
- while ((*head)->next && (strcmp(c->name, (*head)->name) > 0))
- head = &(*head)->next;
-
- if (strcmp(c->name, (*head)->name) > 0) {
- c->next = (*head)->next;
- (*head)->next = c;
- } else {
- c->next = *head;
- *head = c;
- }
-}
-
-static struct command **command_list_for_parent(
- struct command_context *cmd_ctx, struct command *parent)
-{
- return parent ? &parent->children : &cmd_ctx->commands;
-}
-
-static void command_free(struct command *c)
-{
- /** @todo if command has a handler, unregister its jim command! */
-
- while (NULL != c->children) {
- struct command *tmp = c->children;
- c->children = tmp->next;
- command_free(tmp);
- }
-
- free(c->name);
- free(c->help);
- free(c->usage);
- free(c);
-}
-
-static struct command *command_new(struct command_context *cmd_ctx,
- struct command *parent, const struct command_registration *cr)
-{
- assert(cr->name);
-
- /*
- * If it is a non-jim command with no .usage specified,
- * log an error.
- *
- * strlen(.usage) == 0 means that the command takes no
- * arguments.
- */
- if ((cr->jim_handler == NULL) && (cr->usage == NULL)) {
- LOG_DEBUG("BUG: command '%s%s%s' does not have the "
- "'.usage' field filled out",
- parent && parent->name ? parent->name : "",
- parent && parent->name ? " " : "",
- cr->name);
- }
-
- struct command *c = calloc(1, sizeof(struct command));
- if (NULL == c)
- return NULL;
-
- c->name = strdup(cr->name);
- if (cr->help)
- c->help = strdup(cr->help);
- if (cr->usage)
- c->usage = strdup(cr->usage);
-
- if (!c->name || (cr->help && !c->help) || (cr->usage && !c->usage))
- goto command_new_error;
-
- c->parent = parent;
- c->handler = cr->handler;
- c->jim_handler = cr->jim_handler;
- c->jim_handler_data = cr->jim_handler_data;
- c->mode = cr->mode;
-
- command_add_child(command_list_for_parent(cmd_ctx, parent), c);
-
- return c;
-
-command_new_error:
- command_free(c);
- return NULL;
-}
-
-static int command_unknown(Jim_Interp *interp, int argc, Jim_Obj *const *argv);
-
-static int register_command_handler(struct command_context *cmd_ctx,
- struct command *c)
-{
- Jim_Interp *interp = cmd_ctx->interp;
- char *ocd_name = alloc_printf("ocd_%s", c->name);
- if (NULL == ocd_name)
- return JIM_ERR;
-
- LOG_DEBUG("registering '%s'...", ocd_name);
-
- Jim_CmdProc *func = c->handler ? &script_command : &command_unknown;
- int retval = Jim_CreateCommand(interp, ocd_name, func, c, NULL);
- free(ocd_name);
- if (JIM_OK != retval)
- return retval;
-
- /* we now need to add an overrideable proc */
- char *override_name = alloc_printf(
- "proc %s {args} {eval ocd_bouncer %s $args}",
- c->name, c->name);
- if (NULL == override_name)
- return JIM_ERR;
-
- retval = Jim_Eval_Named(interp, override_name, 0, 0);
- free(override_name);
-
- return retval;
-}
-
-struct command *register_command(struct command_context *context,
- struct command *parent, const struct command_registration *cr)
-{
- if (!context || !cr->name)
- return NULL;
-
- const char *name = cr->name;
- struct command **head = command_list_for_parent(context, parent);
- struct command *c = command_find(*head, name);
- if (NULL != c) {
- /* TODO: originally we treated attempting to register a cmd twice as an error
- * Sometimes we need this behaviour, such as with flash banks.
- * http://www.mail-archive.com/openocd-development@lists.berlios.de/msg11152.html */
- LOG_DEBUG("command '%s' is already registered in '%s' context",
- name, parent ? parent->name : "<global>");
- return c;
- }
-
- c = command_new(context, parent, cr);
- if (NULL == c)
- return NULL;
-
- int retval = ERROR_OK;
- if (NULL != cr->jim_handler && NULL == parent) {
- retval = Jim_CreateCommand(context->interp, cr->name,
- cr->jim_handler, cr->jim_handler_data, NULL);
- } else if (NULL != cr->handler || NULL != parent)
- retval = register_command_handler(context, command_root(c));
-
- if (ERROR_OK != retval) {
- unregister_command(context, parent, name);
- c = NULL;
- }
- return c;
-}
-
-int register_commands(struct command_context *cmd_ctx, struct command *parent,
- const struct command_registration *cmds)
-{
- int retval = ERROR_OK;
- unsigned i;
- for (i = 0; cmds[i].name || cmds[i].chain; i++) {
- const struct command_registration *cr = cmds + i;
-
- struct command *c = NULL;
- if (NULL != cr->name) {
- c = register_command(cmd_ctx, parent, cr);
- if (NULL == c) {
- retval = ERROR_FAIL;
- break;
- }
- }
- if (NULL != cr->chain) {
- struct command *p = c ? : parent;
- retval = register_commands(cmd_ctx, p, cr->chain);
- if (ERROR_OK != retval)
- break;
- }
- }
- if (ERROR_OK != retval) {
- for (unsigned j = 0; j < i; j++)
- unregister_command(cmd_ctx, parent, cmds[j].name);
- }
- return retval;
-}
-
-int unregister_all_commands(struct command_context *context,
- struct command *parent)
-{
- if (context == NULL)
- return ERROR_OK;
-
- struct command **head = command_list_for_parent(context, parent);
- while (NULL != *head) {
- struct command *tmp = *head;
- *head = tmp->next;
- command_free(tmp);
- }
-
- return ERROR_OK;
-}
-
-int unregister_command(struct command_context *context,
- struct command *parent, const char *name)
-{
- if ((!context) || (!name))
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct command *p = NULL;
- struct command **head = command_list_for_parent(context, parent);
- for (struct command *c = *head; NULL != c; p = c, c = c->next) {
- if (strcmp(name, c->name) != 0)
- continue;
-
- if (p)
- p->next = c->next;
- else
- *head = c->next;
-
- command_free(c);
- return ERROR_OK;
- }
-
- return ERROR_OK;
-}
-
-void command_set_handler_data(struct command *c, void *p)
-{
- if (NULL != c->handler || NULL != c->jim_handler)
- c->jim_handler_data = p;
- for (struct command *cc = c->children; NULL != cc; cc = cc->next)
- command_set_handler_data(cc, p);
-}
-
-void command_output_text(struct command_context *context, const char *data)
-{
- if (context && context->output_handler && data)
- context->output_handler(context, data);
-}
-
-void command_print_sameline(struct command_context *context, const char *format, ...)
-{
- char *string;
-
- va_list ap;
- va_start(ap, format);
-
- string = alloc_vprintf(format, ap);
- if (string != NULL) {
- /* we want this collected in the log + we also want to pick it up as a tcl return
- * value.
- *
- * The latter bit isn't precisely neat, but will do for now.
- */
- LOG_USER_N("%s", string);
- /* We already printed it above
- * command_output_text(context, string); */
- free(string);
- }
-
- va_end(ap);
-}
-
-void command_print(struct command_context *context, const char *format, ...)
-{
- char *string;
-
- va_list ap;
- va_start(ap, format);
-
- string = alloc_vprintf(format, ap);
- if (string != NULL) {
- strcat(string, "\n"); /* alloc_vprintf guaranteed the buffer to be at least one
- *char longer */
- /* we want this collected in the log + we also want to pick it up as a tcl return
- * value.
- *
- * The latter bit isn't precisely neat, but will do for now.
- */
- LOG_USER_N("%s", string);
- /* We already printed it above
- * command_output_text(context, string); */
- free(string);
- }
-
- va_end(ap);
-}
-
-static char *__command_name(struct command *c, char delim, unsigned extra)
-{
- char *name;
- unsigned len = strlen(c->name);
- if (NULL == c->parent) {
- /* allocate enough for the name, child names, and '\0' */
- name = malloc(len + extra + 1);
- strcpy(name, c->name);
- } else {
- /* parent's extra must include both the space and name */
- name = __command_name(c->parent, delim, 1 + len + extra);
- char dstr[2] = { delim, 0 };
- strcat(name, dstr);
- strcat(name, c->name);
- }
- return name;
-}
-
-char *command_name(struct command *c, char delim)
-{
- return __command_name(c, delim, 0);
-}
-
-static bool command_can_run(struct command_context *cmd_ctx, struct command *c)
-{
- return c->mode == COMMAND_ANY || c->mode == cmd_ctx->mode;
-}
-
-static int run_command(struct command_context *context,
- struct command *c, const char *words[], unsigned num_words)
-{
- if (!command_can_run(context, c)) {
- /* Many commands may be run only before/after 'init' */
- const char *when;
- switch (c->mode) {
- case COMMAND_CONFIG:
- when = "before";
- break;
- case COMMAND_EXEC:
- when = "after";
- break;
- /* handle the impossible with humor; it guarantees a bug report! */
- default:
- when = "if Cthulhu is summoned by";
- break;
- }
- LOG_ERROR("The '%s' command must be used %s 'init'.",
- c->name, when);
- return ERROR_FAIL;
- }
-
- struct command_invocation cmd = {
- .ctx = context,
- .current = c,
- .name = c->name,
- .argc = num_words - 1,
- .argv = words + 1,
- };
- int retval = c->handler(&cmd);
- if (retval == ERROR_COMMAND_SYNTAX_ERROR) {
- /* Print help for command */
- char *full_name = command_name(c, ' ');
- if (NULL != full_name) {
- command_run_linef(context, "usage %s", full_name);
- free(full_name);
- } else
- retval = -ENOMEM;
- } else if (retval == ERROR_COMMAND_CLOSE_CONNECTION) {
- /* just fall through for a shutdown request */
- } else if (retval != ERROR_OK) {
- /* we do not print out an error message because the command *should*
- * have printed out an error
- */
- LOG_DEBUG("Command failed with error code %d", retval);
- }
-
- return retval;
-}
-
-int command_run_line(struct command_context *context, char *line)
-{
- /* all the parent commands have been registered with the interpreter
- * so, can just evaluate the line as a script and check for
- * results
- */
- /* run the line thru a script engine */
- int retval = ERROR_FAIL;
- int retcode;
- /* Beware! This code needs to be reentrant. It is also possible
- * for OpenOCD commands to be invoked directly from Tcl. This would
- * happen when the Jim Tcl interpreter is provided by eCos for
- * instance.
- */
- Jim_Interp *interp = context->interp;
- Jim_DeleteAssocData(interp, "context");
- retcode = Jim_SetAssocData(interp, "context", NULL, context);
- if (retcode == JIM_OK) {
- /* associated the return value */
- Jim_DeleteAssocData(interp, "retval");
- retcode = Jim_SetAssocData(interp, "retval", NULL, &retval);
- if (retcode == JIM_OK) {
- retcode = Jim_Eval_Named(interp, line, 0, 0);
-
- Jim_DeleteAssocData(interp, "retval");
- }
- Jim_DeleteAssocData(interp, "context");
- }
- if (retcode == JIM_OK) {
- const char *result;
- int reslen;
-
- result = Jim_GetString(Jim_GetResult(interp), &reslen);
- if (reslen > 0) {
- int i;
- char buff[256 + 1];
- for (i = 0; i < reslen; i += 256) {
- int chunk;
- chunk = reslen - i;
- if (chunk > 256)
- chunk = 256;
- strncpy(buff, result + i, chunk);
- buff[chunk] = 0;
- LOG_USER_N("%s", buff);
- }
- LOG_USER_N("\n");
- }
- retval = ERROR_OK;
- } else if (retcode == JIM_EXIT) {
- /* ignore.
- * exit(Jim_GetExitCode(interp)); */
- } else if (retcode == ERROR_COMMAND_CLOSE_CONNECTION) {
- return retcode;
- } else {
- Jim_MakeErrorMessage(interp);
- LOG_USER("%s", Jim_GetString(Jim_GetResult(interp), NULL));
-
- if (retval == ERROR_OK) {
- /* It wasn't a low level OpenOCD command that failed */
- return ERROR_FAIL;
- }
- return retval;
- }
-
- return retval;
-}
-
-int command_run_linef(struct command_context *context, const char *format, ...)
-{
- int retval = ERROR_FAIL;
- char *string;
- va_list ap;
- va_start(ap, format);
- string = alloc_vprintf(format, ap);
- if (string != NULL) {
- retval = command_run_line(context, string);
- free(string);
- }
- va_end(ap);
- return retval;
-}
-
-void command_set_output_handler(struct command_context *context,
- command_output_handler_t output_handler, void *priv)
-{
- context->output_handler = output_handler;
- context->output_handler_priv = priv;
-}
-
-struct command_context *copy_command_context(struct command_context *context)
-{
- struct command_context *copy_context = malloc(sizeof(struct command_context));
-
- *copy_context = *context;
-
- return copy_context;
-}
-
-void command_done(struct command_context *cmd_ctx)
-{
- if (NULL == cmd_ctx)
- return;
-
- free(cmd_ctx);
-}
-
-/* find full path to file */
-static int jim_find(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- if (argc != 2)
- return JIM_ERR;
- const char *file = Jim_GetString(argv[1], NULL);
- char *full_path = find_file(file);
- if (full_path == NULL)
- return JIM_ERR;
- Jim_Obj *result = Jim_NewStringObj(interp, full_path, strlen(full_path));
- free(full_path);
-
- Jim_SetResult(interp, result);
- return JIM_OK;
-}
-
-COMMAND_HANDLER(jim_echo)
-{
- if (CMD_ARGC == 2 && !strcmp(CMD_ARGV[0], "-n")) {
- LOG_USER_N("%s", CMD_ARGV[1]);
- return JIM_OK;
- }
- if (CMD_ARGC != 1)
- return JIM_ERR;
- LOG_USER("%s", CMD_ARGV[0]);
- return JIM_OK;
-}
-
-/* Capture progress output and return as tcl return value. If the
- * progress output was empty, return tcl return value.
- */
-static int jim_capture(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- if (argc != 2)
- return JIM_ERR;
-
- struct log_capture_state *state = command_log_capture_start(interp);
-
- /* disable polling during capture. This avoids capturing output
- * from polling.
- *
- * This is necessary in order to avoid accidentally getting a non-empty
- * string for tcl fn's.
- */
- bool save_poll = jtag_poll_get_enabled();
-
- jtag_poll_set_enabled(false);
-
- const char *str = Jim_GetString(argv[1], NULL);
- int retcode = Jim_Eval_Named(interp, str, __THIS__FILE__, __LINE__);
-
- jtag_poll_set_enabled(save_poll);
-
- command_log_capture_finish(state);
-
- return retcode;
-}
-
-static COMMAND_HELPER(command_help_find, struct command *head,
- struct command **out)
-{
- if (0 == CMD_ARGC)
- return ERROR_COMMAND_SYNTAX_ERROR;
- *out = command_find(head, CMD_ARGV[0]);
- if (NULL == *out && strncmp(CMD_ARGV[0], "ocd_", 4) == 0)
- *out = command_find(head, CMD_ARGV[0] + 4);
- if (NULL == *out)
- return ERROR_COMMAND_SYNTAX_ERROR;
- if (--CMD_ARGC == 0)
- return ERROR_OK;
- CMD_ARGV++;
- return CALL_COMMAND_HANDLER(command_help_find, (*out)->children, out);
-}
-
-static COMMAND_HELPER(command_help_show, struct command *c, unsigned n,
- bool show_help, const char *cmd_match);
-
-static COMMAND_HELPER(command_help_show_list, struct command *head, unsigned n,
- bool show_help, const char *cmd_match)
-{
- for (struct command *c = head; NULL != c; c = c->next)
- CALL_COMMAND_HANDLER(command_help_show, c, n, show_help, cmd_match);
- return ERROR_OK;
-}
-
-#define HELP_LINE_WIDTH(_n) (int)(76 - (2 * _n))
-
-static void command_help_show_indent(unsigned n)
-{
- for (unsigned i = 0; i < n; i++)
- LOG_USER_N(" ");
-}
-static void command_help_show_wrap(const char *str, unsigned n, unsigned n2)
-{
- const char *cp = str, *last = str;
- while (*cp) {
- const char *next = last;
- do {
- cp = next;
- do {
- next++;
- } while (*next != ' ' && *next != '\t' && *next != '\0');
- } while ((next - last < HELP_LINE_WIDTH(n)) && *next != '\0');
- if (next - last < HELP_LINE_WIDTH(n))
- cp = next;
- command_help_show_indent(n);
- LOG_USER("%.*s", (int)(cp - last), last);
- last = cp + 1;
- n = n2;
- }
-}
-
-static COMMAND_HELPER(command_help_show, struct command *c, unsigned n,
- bool show_help, const char *cmd_match)
-{
- char *cmd_name = command_name(c, ' ');
- if (NULL == cmd_name)
- return -ENOMEM;
-
- /* If the match string occurs anywhere, we print out
- * stuff for this command. */
- bool is_match = (strstr(cmd_name, cmd_match) != NULL) ||
- ((c->usage != NULL) && (strstr(c->usage, cmd_match) != NULL)) ||
- ((c->help != NULL) && (strstr(c->help, cmd_match) != NULL));
-
- if (is_match) {
- command_help_show_indent(n);
- LOG_USER_N("%s", cmd_name);
- }
- free(cmd_name);
-
- if (is_match) {
- if (c->usage && strlen(c->usage) > 0) {
- LOG_USER_N(" ");
- command_help_show_wrap(c->usage, 0, n + 5);
- } else
- LOG_USER_N("\n");
- }
-
- if (is_match && show_help) {
- char *msg;
-
- /* Normal commands are runtime-only; highlight exceptions */
- if (c->mode != COMMAND_EXEC) {
- const char *stage_msg = "";
-
- switch (c->mode) {
- case COMMAND_CONFIG:
- stage_msg = " (configuration command)";
- break;
- case COMMAND_ANY:
- stage_msg = " (command valid any time)";
- break;
- default:
- stage_msg = " (?mode error?)";
- break;
- }
- msg = alloc_printf("%s%s", c->help ? : "", stage_msg);
- } else
- msg = alloc_printf("%s", c->help ? : "");
-
- if (NULL != msg) {
- command_help_show_wrap(msg, n + 3, n + 3);
- free(msg);
- } else
- return -ENOMEM;
- }
-
- if (++n > 5) {
- LOG_ERROR("command recursion exceeded");
- return ERROR_FAIL;
- }
-
- return CALL_COMMAND_HANDLER(command_help_show_list,
- c->children, n, show_help, cmd_match);
-}
-
-COMMAND_HANDLER(handle_help_command)
-{
- bool full = strcmp(CMD_NAME, "help") == 0;
- int retval;
- struct command *c = CMD_CTX->commands;
- char *cmd_match = NULL;
-
- if (CMD_ARGC == 0)
- cmd_match = "";
- else if (CMD_ARGC >= 1) {
- unsigned i;
-
- for (i = 0; i < CMD_ARGC; ++i) {
- if (NULL != cmd_match) {
- char *prev = cmd_match;
-
- cmd_match = alloc_printf("%s %s", cmd_match, CMD_ARGV[i]);
- free(prev);
- if (NULL == cmd_match) {
- LOG_ERROR("unable to build search string");
- return -ENOMEM;
- }
- } else {
- cmd_match = alloc_printf("%s", CMD_ARGV[i]);
- if (NULL == cmd_match) {
- LOG_ERROR("unable to build search string");
- return -ENOMEM;
- }
- }
- }
- } else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- retval = CALL_COMMAND_HANDLER(command_help_show_list,
- c, 0, full, cmd_match);
-
- if (CMD_ARGC >= 1)
- free(cmd_match);
- return retval;
-}
-
-static int command_unknown_find(unsigned argc, Jim_Obj *const *argv,
- struct command *head, struct command **out, bool top_level)
-{
- if (0 == argc)
- return argc;
- const char *cmd_name = Jim_GetString(argv[0], NULL);
- struct command *c = command_find(head, cmd_name);
- if (NULL == c && top_level && strncmp(cmd_name, "ocd_", 4) == 0)
- c = command_find(head, cmd_name + 4);
- if (NULL == c)
- return argc;
- *out = c;
- return command_unknown_find(--argc, ++argv, (*out)->children, out, false);
-}
-
-static int command_unknown(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- const char *cmd_name = Jim_GetString(argv[0], NULL);
- if (strcmp(cmd_name, "unknown") == 0) {
- if (argc == 1)
- return JIM_OK;
- argc--;
- argv++;
- }
- script_debug(interp, cmd_name, argc, argv);
-
- struct command_context *cmd_ctx = current_command_context(interp);
- struct command *c = cmd_ctx->commands;
- int remaining = command_unknown_find(argc, argv, c, &c, true);
- /* if nothing could be consumed, then it's really an unknown command */
- if (remaining == argc) {
- const char *cmd = Jim_GetString(argv[0], NULL);
- LOG_ERROR("Unknown command:\n %s", cmd);
- return JIM_OK;
- }
-
- bool found = true;
- Jim_Obj *const *start;
- unsigned count;
- if (c->handler || c->jim_handler) {
- /* include the command name in the list */
- count = remaining + 1;
- start = argv + (argc - remaining - 1);
- } else {
- c = command_find(cmd_ctx->commands, "usage");
- if (NULL == c) {
- LOG_ERROR("unknown command, but usage is missing too");
- return JIM_ERR;
- }
- count = argc - remaining;
- start = argv;
- found = false;
- }
- /* pass the command through to the intended handler */
- if (c->jim_handler) {
- interp->cmdPrivData = c->jim_handler_data;
- return (*c->jim_handler)(interp, count, start);
- }
-
- return script_command_run(interp, count, start, c, found);
-}
-
-static int jim_command_mode(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- struct command_context *cmd_ctx = current_command_context(interp);
- enum command_mode mode;
-
- if (argc > 1) {
- struct command *c = cmd_ctx->commands;
- int remaining = command_unknown_find(argc - 1, argv + 1, c, &c, true);
- /* if nothing could be consumed, then it's an unknown command */
- if (remaining == argc - 1) {
- Jim_SetResultString(interp, "unknown", -1);
- return JIM_OK;
- }
- mode = c->mode;
- } else
- mode = cmd_ctx->mode;
-
- const char *mode_str;
- switch (mode) {
- case COMMAND_ANY:
- mode_str = "any";
- break;
- case COMMAND_CONFIG:
- mode_str = "config";
- break;
- case COMMAND_EXEC:
- mode_str = "exec";
- break;
- default:
- mode_str = "unknown";
- break;
- }
- Jim_SetResultString(interp, mode_str, -1);
- return JIM_OK;
-}
-
-static int jim_command_type(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- if (1 == argc)
- return JIM_ERR;
-
- struct command_context *cmd_ctx = current_command_context(interp);
- struct command *c = cmd_ctx->commands;
- int remaining = command_unknown_find(argc - 1, argv + 1, c, &c, true);
- /* if nothing could be consumed, then it's an unknown command */
- if (remaining == argc - 1) {
- Jim_SetResultString(interp, "unknown", -1);
- return JIM_OK;
- }
-
- if (c->jim_handler)
- Jim_SetResultString(interp, "native", -1);
- else if (c->handler)
- Jim_SetResultString(interp, "simple", -1);
- else if (remaining == 0)
- Jim_SetResultString(interp, "group", -1);
- else
- Jim_SetResultString(interp, "unknown", -1);
-
- return JIM_OK;
-}
-
-int help_add_command(struct command_context *cmd_ctx, struct command *parent,
- const char *cmd_name, const char *help_text, const char *usage)
-{
- struct command **head = command_list_for_parent(cmd_ctx, parent);
- struct command *nc = command_find(*head, cmd_name);
- if (NULL == nc) {
- /* add a new command with help text */
- struct command_registration cr = {
- .name = cmd_name,
- .mode = COMMAND_ANY,
- .help = help_text,
- .usage = usage,
- };
- nc = register_command(cmd_ctx, parent, &cr);
- if (NULL == nc) {
- LOG_ERROR("failed to add '%s' help text", cmd_name);
- return ERROR_FAIL;
- }
- LOG_DEBUG("added '%s' help text", cmd_name);
- return ERROR_OK;
- }
- if (help_text) {
- bool replaced = false;
- if (nc->help) {
- free(nc->help);
- replaced = true;
- }
- nc->help = strdup(help_text);
- if (replaced)
- LOG_INFO("replaced existing '%s' help", cmd_name);
- else
- LOG_DEBUG("added '%s' help text", cmd_name);
- }
- if (usage) {
- bool replaced = false;
- if (nc->usage) {
- free(nc->usage);
- replaced = true;
- }
- nc->usage = strdup(usage);
- if (replaced)
- LOG_INFO("replaced existing '%s' usage", cmd_name);
- else
- LOG_DEBUG("added '%s' usage text", cmd_name);
- }
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_help_add_command)
-{
- if (CMD_ARGC < 2) {
- LOG_ERROR("%s: insufficient arguments", CMD_NAME);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- /* save help text and remove it from argument list */
- const char *str = CMD_ARGV[--CMD_ARGC];
- const char *help = !strcmp(CMD_NAME, "add_help_text") ? str : NULL;
- const char *usage = !strcmp(CMD_NAME, "add_usage_text") ? str : NULL;
- if (!help && !usage) {
- LOG_ERROR("command name '%s' is unknown", CMD_NAME);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- /* likewise for the leaf command name */
- const char *cmd_name = CMD_ARGV[--CMD_ARGC];
-
- struct command *c = NULL;
- if (CMD_ARGC > 0) {
- c = CMD_CTX->commands;
- int retval = CALL_COMMAND_HANDLER(command_help_find, c, &c);
- if (ERROR_OK != retval)
- return retval;
- }
- return help_add_command(CMD_CTX, c, cmd_name, help, usage);
-}
-
-/* sleep command sleeps for <n> milliseconds
- * this is useful in target startup scripts
- */
-COMMAND_HANDLER(handle_sleep_command)
-{
- bool busy = false;
- if (CMD_ARGC == 2) {
- if (strcmp(CMD_ARGV[1], "busy") == 0)
- busy = true;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
- } else if (CMD_ARGC < 1 || CMD_ARGC > 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- unsigned long duration = 0;
- int retval = parse_ulong(CMD_ARGV[0], &duration);
- if (ERROR_OK != retval)
- return retval;
-
- if (!busy) {
- long long then = timeval_ms();
- while (timeval_ms() - then < (long long)duration) {
- target_call_timer_callbacks_now();
- usleep(1000);
- }
- } else
- busy_sleep(duration);
-
- return ERROR_OK;
-}
-
-static const struct command_registration command_subcommand_handlers[] = {
- {
- .name = "mode",
- .mode = COMMAND_ANY,
- .jim_handler = jim_command_mode,
- .usage = "[command_name ...]",
- .help = "Returns the command modes allowed by a command:"
- "'any', 'config', or 'exec'. If no command is"
- "specified, returns the current command mode. "
- "Returns 'unknown' if an unknown command is given. "
- "Command can be multiple tokens.",
- },
- {
- .name = "type",
- .mode = COMMAND_ANY,
- .jim_handler = jim_command_type,
- .usage = "command_name [...]",
- .help = "Returns the type of built-in command:"
- "'native', 'simple', 'group', or 'unknown'. "
- "Command can be multiple tokens.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration command_builtin_handlers[] = {
- {
- .name = "echo",
- .handler = jim_echo,
- .mode = COMMAND_ANY,
- .help = "Logs a message at \"user\" priority. "
- "Output message to stdout. "
- "Option \"-n\" suppresses trailing newline",
- .usage = "[-n] string",
- },
- {
- .name = "add_help_text",
- .handler = handle_help_add_command,
- .mode = COMMAND_ANY,
- .help = "Add new command help text; "
- "Command can be multiple tokens.",
- .usage = "command_name helptext_string",
- },
- {
- .name = "add_usage_text",
- .handler = handle_help_add_command,
- .mode = COMMAND_ANY,
- .help = "Add new command usage text; "
- "command can be multiple tokens.",
- .usage = "command_name usage_string",
- },
- {
- .name = "sleep",
- .handler = handle_sleep_command,
- .mode = COMMAND_ANY,
- .help = "Sleep for specified number of milliseconds. "
- "\"busy\" will busy wait instead (avoid this).",
- .usage = "milliseconds ['busy']",
- },
- {
- .name = "help",
- .handler = handle_help_command,
- .mode = COMMAND_ANY,
- .help = "Show full command help; "
- "command can be multiple tokens.",
- .usage = "[command_name]",
- },
- {
- .name = "usage",
- .handler = handle_help_command,
- .mode = COMMAND_ANY,
- .help = "Show basic command usage; "
- "command can be multiple tokens.",
- .usage = "[command_name]",
- },
- {
- .name = "command",
- .mode = COMMAND_ANY,
- .help = "core command group (introspection)",
- .chain = command_subcommand_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct command_context *command_init(const char *startup_tcl, Jim_Interp *interp)
-{
- struct command_context *context = malloc(sizeof(struct command_context));
- const char *HostOs;
-
- context->mode = COMMAND_EXEC;
- context->commands = NULL;
- context->current_target = 0;
- context->output_handler = NULL;
- context->output_handler_priv = NULL;
-
- /* Create a jim interpreter if we were not handed one */
- if (interp == NULL) {
- /* Create an interpreter */
- interp = Jim_CreateInterp();
- /* Add all the Jim core commands */
- Jim_RegisterCoreCommands(interp);
- Jim_InitStaticExtensions(interp);
- }
-
- context->interp = interp;
-
- /* Stick to lowercase for HostOS strings. */
-#if defined(_MSC_VER)
- /* WinXX - is generic, the forward
- * looking problem is this:
- *
- * "win32" or "win64"
- *
- * "winxx" is generic.
- */
- HostOs = "winxx";
-#elif defined(__linux__)
- HostOs = "linux";
-#elif defined(__APPLE__) || defined(__DARWIN__)
- HostOs = "darwin";
-#elif defined(__CYGWIN__)
- HostOs = "cygwin";
-#elif defined(__MINGW32__)
- HostOs = "mingw32";
-#elif defined(__ECOS)
- HostOs = "ecos";
-#elif defined(__FreeBSD__)
- HostOs = "freebsd";
-#elif defined(__NetBSD__)
- HostOs = "netbsd";
-#elif defined(__OpenBSD__)
- HostOs = "openbsd";
-#else
-#warning "Unrecognized host OS..."
- HostOs = "other";
-#endif
- Jim_SetGlobalVariableStr(interp, "ocd_HOSTOS",
- Jim_NewStringObj(interp, HostOs, strlen(HostOs)));
-
- Jim_CreateCommand(interp, "ocd_find", jim_find, NULL, NULL);
- Jim_CreateCommand(interp, "capture", jim_capture, NULL, NULL);
-
- register_commands(context, NULL, command_builtin_handlers);
-
- Jim_SetAssocData(interp, "context", NULL, context);
- if (Jim_Eval_Named(interp, startup_tcl, "embedded:startup.tcl", 1) == JIM_ERR) {
- LOG_ERROR("Failed to run startup.tcl (embedded into OpenOCD)");
- Jim_MakeErrorMessage(interp);
- LOG_USER_N("%s", Jim_GetString(Jim_GetResult(interp), NULL));
- exit(-1);
- }
- Jim_DeleteAssocData(interp, "context");
-
- return context;
-}
-
-int command_context_mode(struct command_context *cmd_ctx, enum command_mode mode)
-{
- if (!cmd_ctx)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- cmd_ctx->mode = mode;
- return ERROR_OK;
-}
-
-void process_jim_events(struct command_context *cmd_ctx)
-{
- static int recursion;
- if (recursion)
- return;
-
- recursion++;
- Jim_ProcessEvents(cmd_ctx->interp, JIM_ALL_EVENTS | JIM_DONT_WAIT);
- recursion--;
-}
-
-#define DEFINE_PARSE_NUM_TYPE(name, type, func, min, max) \
- int parse ## name(const char *str, type * ul) \
- { \
- if (!*str) { \
- LOG_ERROR("Invalid command argument"); \
- return ERROR_COMMAND_ARGUMENT_INVALID; \
- } \
- char *end; \
- *ul = func(str, &end, 0); \
- if (*end) { \
- LOG_ERROR("Invalid command argument"); \
- return ERROR_COMMAND_ARGUMENT_INVALID; \
- } \
- if ((max == *ul) && (ERANGE == errno)) { \
- LOG_ERROR("Argument overflow"); \
- return ERROR_COMMAND_ARGUMENT_OVERFLOW; \
- } \
- if (min && (min == *ul) && (ERANGE == errno)) { \
- LOG_ERROR("Argument underflow"); \
- return ERROR_COMMAND_ARGUMENT_UNDERFLOW; \
- } \
- return ERROR_OK; \
- }
-DEFINE_PARSE_NUM_TYPE(_ulong, unsigned long, strtoul, 0, ULONG_MAX)
-DEFINE_PARSE_NUM_TYPE(_ullong, unsigned long long, strtoull, 0, ULLONG_MAX)
-DEFINE_PARSE_NUM_TYPE(_long, long, strtol, LONG_MIN, LONG_MAX)
-DEFINE_PARSE_NUM_TYPE(_llong, long long, strtoll, LLONG_MIN, LLONG_MAX)
-
-#define DEFINE_PARSE_WRAPPER(name, type, min, max, functype, funcname) \
- int parse ## name(const char *str, type * ul) \
- { \
- functype n; \
- int retval = parse ## funcname(str, &n); \
- if (ERROR_OK != retval) \
- return retval; \
- if (n > max) \
- return ERROR_COMMAND_ARGUMENT_OVERFLOW; \
- if (min) \
- return ERROR_COMMAND_ARGUMENT_UNDERFLOW; \
- *ul = n; \
- return ERROR_OK; \
- }
-
-#define DEFINE_PARSE_ULONGLONG(name, type, min, max) \
- DEFINE_PARSE_WRAPPER(name, type, min, max, unsigned long long, _ullong)
-DEFINE_PARSE_ULONGLONG(_uint, unsigned, 0, UINT_MAX)
-DEFINE_PARSE_ULONGLONG(_u64, uint64_t, 0, UINT64_MAX)
-DEFINE_PARSE_ULONGLONG(_u32, uint32_t, 0, UINT32_MAX)
-DEFINE_PARSE_ULONGLONG(_u16, uint16_t, 0, UINT16_MAX)
-DEFINE_PARSE_ULONGLONG(_u8, uint8_t, 0, UINT8_MAX)
-
-#define DEFINE_PARSE_LONGLONG(name, type, min, max) \
- DEFINE_PARSE_WRAPPER(name, type, min, max, long long, _llong)
-DEFINE_PARSE_LONGLONG(_int, int, n < INT_MIN, INT_MAX)
-DEFINE_PARSE_LONGLONG(_s64, int64_t, n < INT64_MIN, INT64_MAX)
-DEFINE_PARSE_LONGLONG(_s32, int32_t, n < INT32_MIN, INT32_MAX)
-DEFINE_PARSE_LONGLONG(_s16, int16_t, n < INT16_MIN, INT16_MAX)
-DEFINE_PARSE_LONGLONG(_s8, int8_t, n < INT8_MIN, INT8_MAX)
-
-static int command_parse_bool(const char *in, bool *out,
- const char *on, const char *off)
-{
- if (strcasecmp(in, on) == 0)
- *out = true;
- else if (strcasecmp(in, off) == 0)
- *out = false;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
- return ERROR_OK;
-}
-
-int command_parse_bool_arg(const char *in, bool *out)
-{
- if (command_parse_bool(in, out, "on", "off") == ERROR_OK)
- return ERROR_OK;
- if (command_parse_bool(in, out, "enable", "disable") == ERROR_OK)
- return ERROR_OK;
- if (command_parse_bool(in, out, "true", "false") == ERROR_OK)
- return ERROR_OK;
- if (command_parse_bool(in, out, "yes", "no") == ERROR_OK)
- return ERROR_OK;
- if (command_parse_bool(in, out, "1", "0") == ERROR_OK)
- return ERROR_OK;
- return ERROR_COMMAND_SYNTAX_ERROR;
-}
-
-COMMAND_HELPER(handle_command_parse_bool, bool *out, const char *label)
-{
- switch (CMD_ARGC) {
- case 1: {
- const char *in = CMD_ARGV[0];
- if (command_parse_bool_arg(in, out) != ERROR_OK) {
- LOG_ERROR("%s: argument '%s' is not valid", CMD_NAME, in);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- /* fall through */
- }
- case 0:
- LOG_INFO("%s is %s", label, *out ? "enabled" : "disabled");
- break;
- default:
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- return ERROR_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/command.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/command.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/command.h
deleted file mode 100755
index 0eda5b5..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/command.h
+++ /dev/null
@@ -1,420 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef COMMAND_H
-#define COMMAND_H
-
-#include <jim-nvp.h>
-
-/* To achieve C99 printf compatibility in MinGW, gnu_printf should be
- * used for __attribute__((format( ... ))), with GCC v4.4 or later
- */
-#if (defined(IS_MINGW) && (((__GNUC__ << 16) + __GNUC_MINOR__) >= 0x00040004))
-#define PRINTF_ATTRIBUTE_FORMAT gnu_printf
-#else
-#define PRINTF_ATTRIBUTE_FORMAT printf
-#endif
-
-enum command_mode {
- COMMAND_EXEC,
- COMMAND_CONFIG,
- COMMAND_ANY,
-};
-
-struct command_context;
-
-/** The type signature for command context's output handler. */
-typedef int (*command_output_handler_t)(struct command_context *context,
- const char *line);
-
-struct command_context {
- Jim_Interp *interp;
- enum command_mode mode;
- struct command *commands;
- int current_target;
- command_output_handler_t output_handler;
- void *output_handler_priv;
-};
-
-struct command;
-
-/**
- * When run_command is called, a new instance will be created on the
- * stack, filled with the proper values, and passed by reference to the
- * required COMMAND_HANDLER routine.
- */
-struct command_invocation {
- struct command_context *ctx;
- struct command *current;
- const char *name;
- unsigned argc;
- const char **argv;
-};
-
-/**
- * Command handlers may be defined with more parameters than the base
- * set provided by command.c. This macro uses C99 magic to allow
- * defining all such derivative types using this macro.
- */
-#define __COMMAND_HANDLER(name, extra ...) \
- int name(struct command_invocation *cmd, ## extra)
-
-/**
- * Use this to macro to call a command helper (or a nested handler).
- * It provides command handler authors protection against reordering or
- * removal of unused parameters.
- *
- * @b Note: This macro uses lexical capture to provide some arguments.
- * As a result, this macro should be used @b only within functions
- * defined by the COMMAND_HANDLER or COMMAND_HELPER macros. Those
- * macros provide the expected lexical context captured by this macro.
- * Furthermore, it should be used only from the top-level of handler or
- * helper function, or care must be taken to avoid redefining the same
- * variables in intervening scope(s) by accident.
- */
-#define CALL_COMMAND_HANDLER(name, extra ...) \
- name(cmd, ## extra)
-
-/**
- * Always use this macro to define new command handler functions.
- * It ensures the parameters are ordered, typed, and named properly, so
- * they be can be used by other macros (e.g. COMMAND_PARSE_NUMBER).
- * All command handler functions must be defined as static in scope.
- */
-#define COMMAND_HANDLER(name) \
- static __COMMAND_HANDLER(name)
-
-/**
- * Similar to COMMAND_HANDLER, except some parameters are expected.
- * A helper is globally-scoped because it may be shared between several
- * source files (e.g. the s3c24xx device command helper).
- */
-#define COMMAND_HELPER(name, extra ...) __COMMAND_HANDLER(name, extra)
-
-/**
- * Use this macro to access the context of the command being handled,
- * rather than accessing the variable directly. It may be moved.
- */
-#define CMD_CTX (cmd->ctx)
-/**
- * Use this macro to access the number of arguments for the command being
- * handled, rather than accessing the variable directly. It may be moved.
- */
-#define CMD_ARGC (cmd->argc)
-/**
- * Use this macro to access the arguments for the command being handled,
- * rather than accessing the variable directly. It may be moved.
- */
-#define CMD_ARGV (cmd->argv)
-/**
- * Use this macro to access the name of the command being handled,
- * rather than accessing the variable directly. It may be moved.
- */
-#define CMD_NAME (cmd->name)
-/**
- * Use this macro to access the current command being handled,
- * rather than accessing the variable directly. It may be moved.
- */
-#define CMD_CURRENT (cmd->current)
-/**
- * Use this macro to access the invoked command handler's data pointer,
- * rather than accessing the variable directly. It may be moved.
- */
-#define CMD_DATA (CMD_CURRENT->jim_handler_data)
-
-/**
- * The type signature for command handling functions. They are
- * usually registered as part of command_registration, providing
- * a high-level means for executing a command.
- *
- * If the command fails, it *MUST* return a value != ERROR_OK
- * (many commands break this rule, patches welcome!)
- *
- * This is *especially* important for commands such as writing
- * to flash or verifying memory. The reason is that those commands
- * can be used by programs to determine if the operation succeded
- * or not. If the operation failed, then a program can try
- * an alternative approach.
- *
- * Returning ERROR_COMMAND_SYNTAX_ERROR will have the effect of
- * printing out the syntax of the command.
- */
-typedef __COMMAND_HANDLER((*command_handler_t));
-
-struct command {
- char *name;
- char *help;
- char *usage;
- struct command *parent;
- struct command *children;
- command_handler_t handler;
- Jim_CmdProc *jim_handler;
- void *jim_handler_data;
- enum command_mode mode;
- struct command *next;
-};
-
-/**
- * @param c The command to be named.
- * @param delim The character to place between command names.
- * @returns A malloc'd string containing the full command name,
- * which may include one or more ancestor components. Multiple names
- * are separated by single spaces. The caller must free() the string
- * when done with it.
- */
-char *command_name(struct command *c, char delim);
-
-/*
- * Commands should be registered by filling in one or more of these
- * structures and passing them to register_command().
- *
- * A conventioal format should be used for help strings, to provide both
- * usage and basic information:
- * @code
- * "@<options@> ... - some explanation text"
- * @endcode
- *
- * @param name The name of the command to register, which must not have
- * been registered previously in the intended context.
- * @param handler The callback function that will be called. If NULL,
- * then the command serves as a placeholder for its children or a script.
- * @param mode The command mode(s) in which this command may be run.
- * @param help The help text that will be displayed to the user.
- */
-struct command_registration {
- const char *name;
- command_handler_t handler;
- Jim_CmdProc *jim_handler;
- void *jim_handler_data;
- enum command_mode mode;
- const char *help;
- /** a string listing the options and arguments, required or optional */
- const char *usage;
-
- /**
- * If non-NULL, the commands in @c chain will be registered in
- * the same context and scope of this registration record.
- * This allows modules to inherit lists commands from other
- * modules.
- */
- const struct command_registration *chain;
-};
-
-/** Use this as the last entry in an array of command_registration records. */
-#define COMMAND_REGISTRATION_DONE { .name = NULL, .chain = NULL }
-
-/**
- * Register a command @c handler that can be called from scripts during
- * the execution @c mode specified.
- *
- * If @c parent is non-NULL, the new command will be registered as a
- * sub-command under it; otherwise, it will be available as a top-level
- * command.
- *
- * @param cmd_ctx The command_context in which to register the command.
- * @param parent Register this command as a child of this, or NULL to
- * register a top-level command.
- * @param rec A command_registration record that contains the desired
- * command parameters.
- * @returns The new command, if successful; otherwise, NULL.
- */
-struct command *register_command(struct command_context *cmd_ctx,
- struct command *parent, const struct command_registration *rec);
-
-/**
- * Register one or more commands in the specified context, as children
- * of @c parent (or top-level commends, if NULL). In a registration's
- * record contains a non-NULL @c chain member and name is NULL, the
- * commands on the chain will be registered in the same context.
- * Otherwise, the chained commands are added as children of the command.
- *
- * @param cmd_ctx The command_context in which to register the command.
- * @param parent Register this command as a child of this, or NULL to
- * register a top-level command.
- * @param cmds Pointer to an array of command_registration records that
- * contains the desired command parameters. The last record must have
- * NULL for all fields.
- * @returns ERROR_OK on success; ERROR_FAIL if any registration fails.
- */
-int register_commands(struct command_context *cmd_ctx, struct command *parent,
- const struct command_registration *cmds);
-
-
-/**
- * Unregisters command @c name from the given context, @c cmd_ctx.
- * @param cmd_ctx The context of the registered command.
- * @param parent The parent of the given command, or NULL.
- * @param name The name of the command to unregister.
- * @returns ERROR_OK on success, or an error code.
- */
-int unregister_command(struct command_context *cmd_ctx,
- struct command *parent, const char *name);
-/**
- * Unregisters all commands from the specfied context.
- * @param cmd_ctx The context that will be cleared of registered commands.
- * @param parent If given, only clear commands from under this one command.
- * @returns ERROR_OK on success, or an error code.
- */
-int unregister_all_commands(struct command_context *cmd_ctx,
- struct command *parent);
-
-struct command *command_find_in_context(struct command_context *cmd_ctx,
- const char *name);
-struct command *command_find_in_parent(struct command *parent,
- const char *name);
-
-/**
- * Update the private command data field for a command and all descendents.
- * This is used when creating a new heirarchy of commands that depends
- * on obtaining a dynamically created context. The value will be available
- * in command handlers by using the CMD_DATA macro.
- * @param c The command (group) whose data pointer(s) will be updated.
- * @param p The new data pointer to use for the command or its descendents.
- */
-void command_set_handler_data(struct command *c, void *p);
-
-void command_set_output_handler(struct command_context *context,
- command_output_handler_t output_handler, void *priv);
-
-
-int command_context_mode(struct command_context *context, enum command_mode mode);
-
-/* Return the current command context associated with the Jim interpreter or
- * alternatively the global default command interpreter
- */
-struct command_context *current_command_context(Jim_Interp *interp);
-/**
- * Creates a new command context using the startup TCL provided and
- * the existing Jim interpreter, if any. If interp == NULL, then command_init
- * creates a command interpreter.
- */
-struct command_context *command_init(const char *startup_tcl, Jim_Interp *interp);
-/**
- * Creates a copy of an existing command context. This does not create
- * a deep copy of the command list, so modifications in one context will
- * affect all shared contexts. The caller must track reference counting
- * and ensure the commands are freed before destroying the last instance.
- * @param cmd_ctx The command_context that will be copied.
- * @returns A new command_context with the same state as the original.
- */
-struct command_context *copy_command_context(struct command_context *cmd_ctx);
-/**
- * Frees the resources associated with a command context. The commands
- * are not removed, so unregister_all_commands() must be called first.
- * @param context The command_context that will be destroyed.
- */
-void command_done(struct command_context *context);
-
-void command_print(struct command_context *context, const char *format, ...)
-__attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 2, 3)));
-void command_print_sameline(struct command_context *context, const char *format, ...)
-__attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 2, 3)));
-int command_run_line(struct command_context *context, char *line);
-int command_run_linef(struct command_context *context, const char *format, ...)
-__attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 2, 3)));
-void command_output_text(struct command_context *context, const char *data);
-
-void process_jim_events(struct command_context *cmd_ctx);
-
-#define ERROR_COMMAND_CLOSE_CONNECTION (-600)
-#define ERROR_COMMAND_SYNTAX_ERROR (-601)
-#define ERROR_COMMAND_NOTFOUND (-602)
-#define ERROR_COMMAND_ARGUMENT_INVALID (-603)
-#define ERROR_COMMAND_ARGUMENT_OVERFLOW (-604)
-#define ERROR_COMMAND_ARGUMENT_UNDERFLOW (-605)
-
-int parse_ulong(const char *str, unsigned long *ul);
-int parse_ullong(const char *str, unsigned long long *ul);
-
-int parse_long(const char *str, long *ul);
-int parse_llong(const char *str, long long *ul);
-
-#define DECLARE_PARSE_WRAPPER(name, type) \
- int parse ## name(const char *str, type * ul)
-
-DECLARE_PARSE_WRAPPER(_uint, unsigned);
-DECLARE_PARSE_WRAPPER(_u64, uint64_t);
-DECLARE_PARSE_WRAPPER(_u32, uint32_t);
-DECLARE_PARSE_WRAPPER(_u16, uint16_t);
-DECLARE_PARSE_WRAPPER(_u8, uint8_t);
-
-DECLARE_PARSE_WRAPPER(_int, int);
-DECLARE_PARSE_WRAPPER(_s32, int32_t);
-DECLARE_PARSE_WRAPPER(_s16, int16_t);
-DECLARE_PARSE_WRAPPER(_s8, int8_t);
-
-/**
- * @brief parses the string @a in into @a out as a @a type, or prints
- * a command error and passes the error code to the caller. If an error
- * does occur, the calling function will return the error code produced
- * by the parsing function (one of ERROR_COMMAND_ARGUMENT_*).
- *
- * This function may cause the calling function to return immediately,
- * so it should be used carefully to avoid leaking resources. In most
- * situations, parsing should be completed in full before proceding
- * to allocate resources, and this strategy will most prevents leaks.
- */
-#define COMMAND_PARSE_NUMBER(type, in, out) \
- do { \
- int retval_macro_tmp = parse_ ## type(in, &(out)); \
- if (ERROR_OK != retval_macro_tmp) { \
- command_print(CMD_CTX, stringify(out) \
- " option value ('%s') is not valid", in); \
- return retval_macro_tmp; \
- } \
- } while (0)
-
-/**
- * Parse the string @c as a binary parameter, storing the boolean value
- * in @c out. The strings @c on and @c off are used to match different
- * strings for true and false options (e.g. "on" and "off" or
- * "enable" and "disable").
- */
-#define COMMAND_PARSE_BOOL(in, out, on, off) \
- do { \
- bool value; \
- int retval_macro_tmp = command_parse_bool_arg(in, &value); \
- if (ERROR_OK != retval_macro_tmp) { \
- command_print(CMD_CTX, stringify(out) \
- " option value ('%s') is not valid", in); \
- command_print(CMD_CTX, " choices are '%s' or '%s'", \
- on, off); \
- return retval_macro_tmp; \
- } \
- out = value; \
- } while (0)
-
-int command_parse_bool_arg(const char *in, bool *out);
-COMMAND_HELPER(handle_command_parse_bool, bool *out, const char *label);
-
-/** parses an on/off command argument */
-#define COMMAND_PARSE_ON_OFF(in, out) \
- COMMAND_PARSE_BOOL(in, out, "on", "off")
-/** parses an enable/disable command argument */
-#define COMMAND_PARSE_ENABLE(in, out) \
- COMMAND_PARSE_BOOL(in, out, "enable", "disable")
-
-void script_debug(Jim_Interp *interp, const char *cmd,
- unsigned argc, Jim_Obj * const *argv);
-
-#endif /* COMMAND_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/configuration.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/configuration.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/configuration.c
deleted file mode 100755
index dde1491..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/configuration.c
+++ /dev/null
@@ -1,172 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2004, 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "configuration.h"
-#include "log.h"
-
-static size_t num_config_files;
-static char **config_file_names;
-
-static size_t num_script_dirs;
-static char **script_search_dirs;
-
-void add_script_search_dir(const char *dir)
-{
- num_script_dirs++;
- script_search_dirs = realloc(script_search_dirs, (num_script_dirs + 1) * sizeof(char *));
-
- script_search_dirs[num_script_dirs-1] = strdup(dir);
- script_search_dirs[num_script_dirs] = NULL;
-
- LOG_DEBUG("adding %s", dir);
-}
-
-void add_config_command(const char *cfg)
-{
- num_config_files++;
- config_file_names = realloc(config_file_names, (num_config_files + 1) * sizeof(char *));
-
- config_file_names[num_config_files-1] = strdup(cfg);
- config_file_names[num_config_files] = NULL;
-}
-
-/* return full path or NULL according to search rules */
-char *find_file(const char *file)
-{
- FILE *fp = NULL;
- char **search_dirs = script_search_dirs;
- char *dir;
- char const *mode = "r";
- char *full_path;
-
- /* Check absolute and relative to current working dir first.
- * This keeps full_path reporting belowing working. */
- full_path = alloc_printf("%s", file);
- fp = fopen(full_path, mode);
-
- while (!fp) {
- free(full_path);
- full_path = NULL;
- dir = *search_dirs++;
-
- if (!dir)
- break;
-
- full_path = alloc_printf("%s/%s", dir, file);
- fp = fopen(full_path, mode);
- }
-
- if (fp) {
- fclose(fp);
- LOG_DEBUG("found %s", full_path);
- return full_path;
- }
-
- free(full_path);
-
- return NULL;
-}
-
-FILE *open_file_from_path(const char *file, const char *mode)
-{
- if (mode[0] != 'r')
- return fopen(file, mode);
- else {
- char *full_path = find_file(file);
- if (full_path == NULL)
- return NULL;
- FILE *fp = NULL;
- fp = fopen(full_path, mode);
- free(full_path);
- return fp;
- }
-}
-
-int parse_config_file(struct command_context *cmd_ctx)
-{
- int retval;
- char **cfg;
-
- if (!config_file_names) {
- command_run_line(cmd_ctx, "script openocd.cfg");
- return ERROR_OK;
- }
-
- cfg = config_file_names;
-
- while (*cfg) {
- retval = command_run_line(cmd_ctx, *cfg);
- if (retval != ERROR_OK)
- return retval;
- cfg++;
- }
-
- return ERROR_OK;
-}
-
-#ifndef _WIN32
-#include <pwd.h>
-#endif
-
-char *get_home_dir(const char *append_path)
-{
- char *home = getenv("HOME");
-
- if (home == NULL) {
-
-#ifdef _WIN32
- home = getenv("USERPROFILE");
-
- if (home == NULL) {
-
- char homepath[MAX_PATH];
- char *drive = getenv("HOMEDRIVE");
- char *path = getenv("HOMEPATH");
- if (drive && path) {
- snprintf(homepath, MAX_PATH, "%s/%s", drive, path);
- home = homepath;
- }
- }
-#else
- struct passwd *pwd = getpwuid(getuid());
- if (pwd)
- home = pwd->pw_dir;
-
-#endif
- }
-
- if (home == NULL)
- return home;
-
- char *home_path;
-
- if (append_path)
- home_path = alloc_printf("%s/%s", home, append_path);
- else
- home_path = alloc_printf("%s", home);
-
- return home_path;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/configuration.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/configuration.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/configuration.h
deleted file mode 100755
index 7b9f711..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/configuration.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2004, 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef CONFIGURATION_H
-#define CONFIGURATION_H
-
-#include <helper/command.h>
-
-int parse_cmdline_args(struct command_context *cmd_ctx,
- int argc, char *argv[]);
-
-int parse_config_file(struct command_context *cmd_ctx);
-void add_config_command(const char *cfg);
-
-void add_script_search_dir(const char *dir);
-
-int configuration_output_handler(struct command_context *cmd_ctx,
- const char *line);
-
-FILE *open_file_from_path(const char *file, const char *mode);
-
-char *find_file(const char *name);
-char *get_home_dir(const char *append_path);
-
-#endif /* CONFIGURATION_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/fileio.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/fileio.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/fileio.c
deleted file mode 100755
index 9864b5f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/fileio.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "log.h"
-#include "configuration.h"
-#include "fileio.h"
-
-struct fileio {
- char *url;
- size_t size;
- enum fileio_type type;
- enum fileio_access access;
- FILE *file;
-};
-
-static inline int fileio_close_local(struct fileio *fileio)
-{
- int retval = fclose(fileio->file);
- if (retval != 0) {
- if (retval == EBADF)
- LOG_ERROR("BUG: fileio->file not a valid file descriptor");
- else
- LOG_ERROR("couldn't close %s: %s", fileio->url, strerror(errno));
-
- return ERROR_FILEIO_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static inline int fileio_open_local(struct fileio *fileio)
-{
- char file_access[4];
- ssize_t file_size;
-
- switch (fileio->access) {
- case FILEIO_READ:
- strcpy(file_access, "r");
- break;
- case FILEIO_WRITE:
- strcpy(file_access, "w");
- break;
- case FILEIO_READWRITE:
- strcpy(file_access, "w+");
- break;
- case FILEIO_APPEND:
- strcpy(file_access, "a");
- break;
- case FILEIO_APPENDREAD:
- strcpy(file_access, "a+");
- break;
- default:
- LOG_ERROR("BUG: access neither read, write nor readwrite");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- /* win32 always opens in binary mode */
-#ifndef _WIN32
- if (fileio->type == FILEIO_BINARY)
-#endif
- strcat(file_access, "b");
-
- fileio->file = open_file_from_path(fileio->url, file_access);
- if (!fileio->file) {
- LOG_ERROR("couldn't open %s", fileio->url);
- return ERROR_FILEIO_OPERATION_FAILED;
- }
-
- file_size = 0;
-
- if ((fileio->access != FILEIO_WRITE) || (fileio->access == FILEIO_READWRITE)) {
- /* NB! Here we use fseek() instead of stat(), since stat is a
- * more advanced operation that might not apply to e.g. a disk path
- * that refers to e.g. a tftp client */
- int result, result2;
-
- result = fseek(fileio->file, 0, SEEK_END);
-
- file_size = ftell(fileio->file);
-
- result2 = fseek(fileio->file, 0, SEEK_SET);
-
- if ((file_size < 0) || (result < 0) || (result2 < 0)) {
- fileio_close_local(fileio);
- return ERROR_FILEIO_OPERATION_FAILED;
- }
- }
-
- fileio->size = file_size;
-
- return ERROR_OK;
-}
-
-int fileio_open(struct fileio **fileio, const char *url,
- enum fileio_access access_type, enum fileio_type type)
-{
- int retval;
- struct fileio *tmp;
-
- tmp = malloc(sizeof(struct fileio));
-
- tmp->type = type;
- tmp->access = access_type;
- tmp->url = strdup(url);
-
- retval = fileio_open_local(tmp);
-
- if (retval != ERROR_OK) {
- free(tmp->url);
- free(tmp);
- return retval;
- }
-
- *fileio = tmp;
-
- return ERROR_OK;
-}
-
-int fileio_close(struct fileio *fileio)
-{
- int retval;
-
- retval = fileio_close_local(fileio);
-
- free(fileio->url);
- free(fileio);
-
- return retval;
-}
-
-int fileio_seek(struct fileio *fileio, size_t position)
-{
- int retval;
-
- retval = fseek(fileio->file, position, SEEK_SET);
-
- if (retval != 0) {
- LOG_ERROR("couldn't seek file %s: %s", fileio->url, strerror(errno));
- return ERROR_FILEIO_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int fileio_local_read(struct fileio *fileio, size_t size, void *buffer,
- size_t *size_read)
-{
- ssize_t retval;
-
- retval = fread(buffer, 1, size, fileio->file);
- *size_read = (retval >= 0) ? retval : 0;
-
- return (retval < 0) ? retval : ERROR_OK;
-}
-
-int fileio_read(struct fileio *fileio, size_t size, void *buffer,
- size_t *size_read)
-{
- return fileio_local_read(fileio, size, buffer, size_read);
-}
-
-int fileio_read_u32(struct fileio *fileio, uint32_t *data)
-{
- int retval;
- uint8_t buf[4];
- size_t size_read;
-
- retval = fileio_local_read(fileio, sizeof(uint32_t), buf, &size_read);
-
- if (ERROR_OK == retval && sizeof(uint32_t) != size_read)
- retval = -EIO;
- if (ERROR_OK == retval)
- *data = be_to_h_u32(buf);
-
- return retval;
-}
-
-static int fileio_local_fgets(struct fileio *fileio, size_t size, void *buffer)
-{
- if (fgets(buffer, size, fileio->file) == NULL)
- return ERROR_FILEIO_OPERATION_FAILED;
-
- return ERROR_OK;
-}
-
-int fileio_fgets(struct fileio *fileio, size_t size, void *buffer)
-{
- return fileio_local_fgets(fileio, size, buffer);
-}
-
-static int fileio_local_write(struct fileio *fileio, size_t size,
- const void *buffer, size_t *size_written)
-{
- ssize_t retval;
-
- retval = fwrite(buffer, 1, size, fileio->file);
- *size_written = (retval >= 0) ? retval : 0;
-
- return (retval < 0) ? retval : ERROR_OK;
-}
-
-int fileio_write(struct fileio *fileio, size_t size, const void *buffer,
- size_t *size_written)
-{
- int retval;
-
- retval = fileio_local_write(fileio, size, buffer, size_written);
-
- if (retval == ERROR_OK)
- fileio->size += *size_written;
-
- return retval;
-}
-
-int fileio_write_u32(struct fileio *fileio, uint32_t data)
-{
- int retval;
- uint8_t buf[4];
- h_u32_to_be(buf, data);
- size_t size_written;
-
- retval = fileio_write(fileio, 4, buf, &size_written);
-
- if (ERROR_OK == retval && size_written != sizeof(uint32_t))
- retval = -EIO;
-
- return retval;
-}
-
-/**
- * FIX!!!!
- *
- * For now this can not fail, but that's because a seek was executed
- * on startup.
- *
- * Avoiding the seek on startup opens up for using streams.
- *
- */
-int fileio_size(struct fileio *fileio, size_t *size)
-{
- *size = fileio->size;
-
- return ERROR_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/fileio.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/fileio.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/fileio.h
deleted file mode 100755
index f10e0c4..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/fileio.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FILEIO_H
-#define FILEIO_H
-
-#define FILEIO_MAX_ERROR_STRING (128)
-
-enum fileio_type {
- FILEIO_TEXT,
- FILEIO_BINARY,
-};
-
-enum fileio_access {
- FILEIO_NONE, /* open without any access (invalid mode) */
- FILEIO_READ, /* open for reading, position at beginning */
- FILEIO_WRITE, /* open for writing, position at beginning */
- FILEIO_READWRITE, /* open for writing, position at beginning, allow reading */
- FILEIO_APPEND, /* open for writing, position at end */
- FILEIO_APPENDREAD, /* open for writing, position at end, allow reading */
-};
-
-struct fileio;
-
-int fileio_open(struct fileio **fileio, const char *url,
- enum fileio_access access_type, enum fileio_type type);
-int fileio_close(struct fileio *fileio);
-
-int fileio_seek(struct fileio *fileio, size_t position);
-int fileio_fgets(struct fileio *fileio, size_t size, void *buffer);
-
-int fileio_read(struct fileio *fileio,
- size_t size, void *buffer, size_t *size_read);
-int fileio_write(struct fileio *fileio,
- size_t size, const void *buffer, size_t *size_written);
-
-int fileio_read_u32(struct fileio *fileio, uint32_t *data);
-int fileio_write_u32(struct fileio *fileio, uint32_t data);
-int fileio_size(struct fileio *fileio, size_t *size);
-
-#define ERROR_FILEIO_LOCATION_UNKNOWN (-1200)
-#define ERROR_FILEIO_NOT_FOUND (-1201)
-#define ERROR_FILEIO_OPERATION_FAILED (-1202)
-#define ERROR_FILEIO_ACCESS_NOT_SUPPORTED (-1203)
-#define ERROR_FILEIO_RESOURCE_TYPE_UNKNOWN (-1204)
-#define ERROR_FILEIO_OPERATION_NOT_SUPPORTED (-1205)
-
-#endif /* FILEIO_H */
[44/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/primer/autotools.txt
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/primer/autotools.txt b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/primer/autotools.txt
deleted file mode 100755
index 9d9aada..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/primer/autotools.txt
+++ /dev/null
@@ -1,147 +0,0 @@
-/** @page primerautotools OpenOCD Autotools Primer
-
-This page provides an overview to OpenOCD's use of the GNU autotool suite:
-- @ref primerautoconf
-- @ref primerautomake
-- @ref primerlibtool
-
-Most developers do not need to concern themselves with these tools, as
-the @ref primerbootstrap script runs these tools in the required sequence.
-
-@section primerbootstrap Autotools Bootstrap
-
-The @c bootstrap script should be used by developers to run the
-autotools in the correct sequence.
-
-When run after a fresh checkout, this script generates the build files
-required to compile the project, producing the project configure script.
-After running @c configure, the @ref primermaintainermode settings will
-handle most situations that require running these tools again. In some
-cases, a fresh bootstrap may be still required.
-
-@subsection primerbootstrapcures Problems Solved By Bootstrap
-
-For example, the build system can fail in unexpected ways after running
-<code>git pull</code>. Here, the <code>make maintainer-clean</code>
-should be used to remove all of the files generated by the @c bootstrap
-script and subsequent build processes.
-
-In this particular case, one may also need to remove stray files by hand
-after running this command to ensure everything is rebuilt properly.
-This step should be necessary only if the @c maintainer-clean was run
-@b after altering the build system files with git. If it is run
-@b before any updates, the build system should never leave artifacts
-in the tree.
-
-Without such precautions, changes can be introduced that leave the tree
-timestamps in an inconsistent state, producing strange compile errors
-that are resolve after such diligence.
-
-@subsection primermaintainerclean Autotools Cleaning
-
-Normally, all files generated by the bootstrap script, configure
-process, and build system should be removed after running <code>make
-maintainer-clean</code>. Automatically generated files that remain
-after this should be listed in @c MAINTAINERCLEANFILES,
-@c DISTCLEANFILES, or @c CLEANFILES, depending on which stage of the
-build process they are produced.
-
-@section primerautoconf Autoconf Configuration Script
-
-The @c autoconf program generates the @c configure script from
-@c configure.in, using serious Perl voodoo. The resulting script is
-included in the project distribution packages and run by users to
-configure the build process for their system.
-
-@section primerautomake Automake Makefiles
-
-The @c automake program generates @c Makefile.in files (from @c
-Makefile.am files). These files are later processed by the configure
-script produced by @c autoconf.
-
-@subsection primerautomakenewfiles Creating Makefile.am Files
-
-This section shows how to add a @c Makefile.am in a new directory (or
-one that lacks one).
--# The new directory must be listed in the @c SUBDIRS variable in the
-parent directory's Makefile.am:
-@code
-$ echo 'SUBDIRS += directory' >>../Makefile.am
-@endcode
--# Create an bare-bones Makefile.am file in directory that needs it:
-@code
-$ echo "MAINTAINERCLEANFILES = Makefile.in" >Makefile.am
-@endcode
--# The @c configure.in script must be updated, so it generates the required
-Makefile when the @a configure script is run by the user:
-@verbatim
-AC_OUTPUT([
- ...
- path/to/new/Makefile
- ])
-@endverbatim
-
-Note: these instructions are @b not meant to be used literally, rather
-they are shown for demonstration purposes.
-
-The default MAINTAINERCLEANFILES rule ensures that the
-automake-generated @c Makefile.in file will be removed when developers
-run <code>make maintainer-clean</code>. Additional rules may be added
-after this; however, the project should bootstrap and tear down cleanly
-after taking these minimal steps, with the new directory being visited
-during the @c make sequence.
-
-@subsection primerautomaketweaks Updating Makefile.am Files
-
-Adding, removing, and renaming files from the project tree usually
-requires updating the autotools inputs. This section will help describe
-how to do this as questions arise.
-
-@section primerlibtool Libtool and Libraries
-
-The @c libtool program provides the means of generating libraries in a
-portable and painless manner (relatively speaking).
-
-This section will contain an answer to "what does libtool give OpenOCD?"
-and "what do developers need to consider in new code?"
-
-@section primerautotoolsmation Autotools Automation
-
-This section outlines three ways the autotools provides automation to
-assist with testing and distribution:
-- @ref primerautocheck -- automatic unit and smoke tests
-- @ref primerautodistcheck -- automatic distribution and packaging tests
-
-@subsection primerautocheck make check
-
-The <code>make check</code> command will run the OpenOCD test suite,
-once it has been integrated as such. This section will contain
-information about how to extend the testing build system components to
-implement new checks.
-
-@subsection primerautodistcheck make distcheck
-
-The <code>make distcheck</code> command produces an archive of the
-project deliverables (using <code>make dist</code>) and verifies its
-integrity for distribution by attemptng to use the package in the same
-manner as a user.
-
-These checks includes the following steps:
--# Unpack the project archive into its expected directory.
--# Configure and build the project in a temporary out-of-tree directory.
--# Run <code>make check</code> to ensure the distributed code passes all tests.
--# Run <code>make install</code> into a temporary installation directory.
--# Check that <code>make uninstall</code> removes all files that were installed.
--# Check that <code>make distclean</code> removes all files created
-during all other steps (except the first).
-
-If all of these steps complete successfully, the @c make process will
-output a friendly message indicating the archive is ready to be
-distributed.
-
- */
-/** @file
-
-This file contains the @ref primerautotools page.
-
- */
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-/** @page primercommand Command Development Primer
-
-This page provides a primer for writing commands by introducing @c hello
-module. The full source code used in this example can be found in
-hello.c, and the @ref primercmdcode section shows how to use it.
-
-A summary of this information can be found in @ref helpercommand .
-
-@section primercmdhandler Command Handlers
-
-Defining new commands and their helpers is easy. The following code
-defines a simple command handler that delegates its argument parsing:
-@code
-COMMAND_HANDLER(handle_hello_command)
-{
- const char *sep, *name;
- int retval = CALL_COMMAND_HANDLER(handle_hello_args);
- if (ERROR_OK == retval)
- command_print(CMD_CTX, "Greetings%s%s!", sep, name);
- return retval;
-}
-@endcode
-
-Here, the @c COMMAND_HANDLER macro establishes the function signature,
-see in command.h by the @c __COMMAND_HANDLER macro.
-
-The COMMAND_HELPER macro function allows defining functions with an
-extended version of the base signature. These helper functions can be
-called (with the appropriate parameters), the @c CALL_COMMAND_HANDLER
-macro to pass any e as parameters to the following helper function:
-
-The subsequent blocks of code are a normal C function that can do
-anything, so only complex commands deserve should use comamnd helper
-functions. In this respect, this example uses one to demonstrate how --
-not when -- they should be used.
-
-@code
-static COMMAND_HELPER(handle_hello_args, const char **sep, const char **name)
-{
- if (argc > 1)
- {
- LOG_ERROR("%s: too many arguments", CMD_NAME);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- if (1 == CMD_ARGC)
- {
- *sep = ", ";
- *name = CMD_ARGV[0];
- }
- else
- *sep = *name = "";
-
- return ERROR_OK;
-}
-@endcode
-
-Of course, you may also call other macros or functions, but that extends
-beyond the scope of this tutorial on writing commands.
-
-@section primercmdreg Command Registration
-
-Before this new function can be used, it must be registered somehow.
-For a new module, registering should be done in a new function for
-the purpose, which must be called from @c openocd.c:
-@code
-
-static const struct command_registration hello_command_handlers[] = {
- {
- .name = "hello",
- .mode = COMMAND_ANY,
- .handler = handle_hello_command,
- .help = "print a warm greeting",
- .usage = "[name]",
- },
- {
- .chain = foo_command_handlers,
- }
- COMMAND_REGISTRATION_DONE
-};
-
-int hello_register_commands(struct command_context_s *cmd_ctx)
-{
- return register_commands(cmd_ctx, NULL, handle_command_handlers);
-}
-@endcode
-
-Note that the "usage" text should use the same EBNF that's found
-in the User's Guide: literals in 'single quotes', sequences of
-optional parameters in [square brackets], and alternatives in
-(parentheses|with|vertical bars), and so forth. No angle brackets.
-
-That's it! The command should now be registered and available to scripts.
-
-@section primercmdchain Command Chaining
-
-This example also shows how to chain command handler registration, so
-your modules can "inherit" commands provided by other (sub)modules.
-Here, the hello module includes the foo commands in the same context
-that the 'hello' command will be registered.
-
-If the @c chain field had been put in the 'hello' command, then the
-@c foo module commands would be registered under it. Indeed, that
-technique is used to define the 'foo bar' and 'foo baz' commands,
-as well as for the example drivers that use these modules.
-
-The code for the 'foo' command handlers can be found in @c hello.c.
-
-@section primercmdcode Trying These Example Commands
-
-These commands have been inherited by the dummy interface, faux flash,
-and testee target drivers. The easiest way to test these is by using the
-dummy interface.
-
-Once OpenOCD has been built with this example code, the following command
-demonstrates the abilities that the @c hello module provides:
-@code
-openocd -c 'interface dummy' \
- -c 'dummy hello' \
- -c 'dummy hello World' \
- -c 'dummy hello {John Doe}' \
- -c 'dummy hello John Doe' # error: too many arguments
-@endcode
-
-If saved in @c hello.cfg, then running <code>openocd -f hello.cfg</code>
-should produce the following output before displaying the help text and
-exiting:
-@code
-Greetings!
-Greetings, World!
-Greetings, John Doe!
-Error: hello: too many arguments
-Runtime error, file "openocd.cfg", line 14:
- hello: too many arguments
-dummy hello [<name>]
- prints a warm welcome
-@endcode
-
- */
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-/** @page primerdocs OpenOCD Documentation Primers
-
-This page provides an introduction to OpenOCD's documentation processes.
-
-OpenOCD presently produces several kinds of documentation:
-- The User's Guide:
- - Focuses on using the OpenOCD software.
- - Details the installation, usage, and customization.
- - Provides descriptions of public Jim/TCL script commands.
- - Written using GNU texinfo.
- - Created with 'make pdf' or 'make html'.
- - See @subpage primertexinfo and @ref styletexinfo.
-- The References: (as proposed)
- - Focuses on using specific hardware with OpenOCD.
- - Details the supported interfaces, chips, boards, and targets.
- - Provides overview, usage, reference, and FAQ for each device.
- - Written using LaTeX language with custom macros.
- - Created with 'make references'.
- - See @subpage primerlatex and @ref stylelatex.
-- The Manual:
- - Focuses on developing the OpenOCD software.
- - Details the architecutre, driver interfaces, and processes.
- - Provides "full" coverage of C source code (work-in-progress).
- - Written using Doxygen C language conventions (i.e. in comments).
- - Created with 'make doxygen'.
- - See @subpage primerdoxygen and @ref styledoxygen.
-
-The following sections provide more information for anyone that wants to
-contribute new or updated documentation to the OpenOCD project.
-
- */
-/** @page primertexinfo Texinfo Primer
-
-The OpenOCD User's Guide presently exists entirely within the
-doc/openocd.texi document. That file contains documentation with
-mark-up suitable for being parsed by the GNU Texinfo utilities
-(http://www.gnu.org/software/texinfo/).
-
-When you add a new command, driver, or driver option, it needs to be
-documented in the User's Guide. Use the existing documentation for
-models, but feel free to make better use of Texinfo mechanisms. See
-the Texinfo web site for the Texinfo manual and more information.
-
-OpenOCD style guidelines for Texinfo documentation can be found on the
-@ref styletexinfo page.
-
- */
-/** @page primerlatex LaTeX Primer
-
-The OpenOCD project provides a number of reference guides using the
-LaTeX typesetting language.
-
-- OpenOCD Quick Reference Sheets
-- OpenOCD Hardware Reference Guides
-
-These documents have not yet been produced, so this Primer serves as
-a placeholder to describe how they are created and can be extended.
-The same holds true for the @ref stylelatex page.
-
- */
-/** @page primerdoxygen Doxygen Primer
-
-Doxygen-style comments are used to provide documentation in-line with
-the OpenOCD source code. These comments are used to document functions,
-variables, structs, enums, fields, and everything else that might need
-to be documented for developers. Additional files containing comments
-that supplement the code comments in order to provide complete developer
-documentation.
-
-Even if you already know Doxygen, please read this Primer to learn
-how OpenOCD developers already use Doxygen features in the project tree.
-For more information about OpenOCD's required style for using Doxygen,
-see the @ref styledoxygen page and look at existing documentation in the
-@c doc/manual tree.
-
-@section primerdoxytext Doxygen Input Files
-
-Doxygen has been configured parse all of the C source code files (*.c
-and *.h) in @c src/ in order to produce a complete reference of all
-OpenOCD project symbols. In addition to the source code files, other
-files will also be scanned for comment blocks; some are referenced
-explicitly by the @c INPUT variable in the Doxygen configuration file.
-
-By default, the Doxygen configuration enables a "full" set of features,
-including generation of dependency graphs (using the GraphViz package).
-These features may be disabled by editing the @c Doxyfile.in file at the
-top of the project tree; the configuration file includes comments that
-provide detailed documentation for each option.
-
-To support out-of-tree building of the documentation, the @c Doxyfile.in
-@c INPUT values will have all instances of the string @c "@srcdir@"
-replaced with the current value of the make variable
-<code>$(srcdir)</code>. The Makefile uses a rule to convert
-@c Doxyfile.in into the @c Doxyfile used by <code>make doxygen</code>.
-
-@section primerdoxyoocd OpenOCD Input Files
-
-OpenOCD uses the @c INPUT mechanism to include additional documentation to
-provide The Manual for OpenOCD Developers. These extra files contain
-high-level information intended to supplement the relatively low-level
-documentation that gets extracted from the source code comments.
-
-OpenOCD's Doxygen configuration file will search for all @c .txt files
-that can be found under the @c doc/manual directory in the project tree.
-New files containing valid Doxygen markup that are placed in or under
-that directory will be detected and included in The Manual automatically.
-
-@section primerdoxyman Doxygen Reference Manual
-
-The full documentation for Doxygen can be referenced on-line at the project
-home page: http://www.doxygen.org/index.html. In HTML versions of this
-document, an image with a link to this site appears in the page footer.
-
-*/
-/** @file
-
-This file contains the Doxygen source code for the @ref primerdocs.
-The @ref primerdocs page also contains the following sections:
-
-- @ref primertexinfo
-- @ref primerlatex
-- @ref primerdoxygen
-
- */
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-/** @page primerjtag OpenOCD JTAG Primer
-
-JTAG is unnecessarily confusing, because JTAG is often confused with
-boundary scan, which is just one of its possible functions.
-
-JTAG is simply a communication interface designed to allow communication
-to functions contained on devices, for the designed purposes of
-initialisation, programming, testing, debugging, and anything else you
-want to use it for (as a chip designer).
-
-Think of JTAG as I2C for testing. It doesn't define what it can do,
-just a logical interface that allows a uniform channel for communication.
-
-See @par
- http://en.wikipedia.org/wiki/Joint_Test_Action_Group
-
-@image html jtag-state-machine-large.png
-
-The first page (among other things) shows a logical representation
-describing how multiple devices are wired up using JTAG. JTAG does not
-specify, data rates or interface levels (3.3V/1.8V, etc) each device can
-support different data rates/interface logic levels. How to wire them
-in a compatible way is an exercise for an engineer.
-
-Basically TMS controls which shift register is placed on the device,
-between TDI and TDO. The second diagram shows the state transitions on
-TMS which will select different shift registers.
-
-The first thing you need to do is reset the state machine, because when
-you connect to a chip you do not know what state the controller is in,you need
-to clock TMS as 1, at least 5 times. This will put you into "Test Logic
-Reset" State. Knowing this, you can, once reset, then track what each
-transition on TMS will do, and hence know what state the JTAG state
-machine is in.
-
-There are 2 "types" of shift registers. The Instruction shift register
-and the data shift register. The sizes of these are undefined, and can
-change from chip to chip. The Instruction register is used to select
-which Data register/data register function is used, and the data
-register is used to read data from that function or write data to it.
-
-Each of the states control what happens to either the data register or
-instruction register.
-
-For example, one of the data registers will be known as "bypass" this is
-(usually) a single bit which has no function and is used to bypass the
-chip. Assume we have 3 identical chips, wired up like the picture(wikipedia)
-and each has a 3 bits instruction register, and there are 2 known
-instructions (110 = bypass, 010 = "some other function") if we want to use
-"some other function", on the second chip in the line, and not change
-the other chips we would do the following transitions.
-
-From Test Logic Reset, TMS goes:
-
- 0 1 1 0 0
-
-which puts every chip in the chain into the "Shift IR state"
-Then (while holding TMS as 0) TDI goes:
-
- 0 1 1 0 1 0 0 1 1
-
-which puts the following values in the instruction shift register for
-each chip [110] [010] [110]
-
-The order is reversed, because we shift out the least significant bit
-first. Then we transition TMS:
-
- 1 1 1 0 0
-
-which puts us in the "Shift DR state".
-
-Now when we clock data onto TDI (again while holding TMS to 0) , the
-data shifts through the data registers, and because of the instruction
-registers we selected ("some other function" has 8 bits in its data
-register), our total data register in the chain looks like this:
-
- 0 00000000 0
-
-The first and last bit are in the "bypassed" chips, so values read from
-them are irrelevant and data written to them is ignored. But we need to
-write bits for those registers, because they are in the chain.
-
-If we wanted to write 0xF5 to the data register we would clock out of
-TDI (holding TMS to 0):
-
- 0 1 0 1 0 1 1 1 1 0
-
-Again, we are clocking the least-significant bit first. Then we would
-clock TMS:
-
- 1 1 0
-
-which updates the selected data register with the value 0xF5 and returns
-us to run test idle.
-
-If we needed to read the data register before over-writing it with F5,
-no sweat, that's already done, because the TDI/TDO are set up as a
-circular shift register, so if you write enough bits to fill the shift
-register, you will receive the "captured" contents of the data registers
-simultaneously on TDO.
-
-That's JTAG in a nutshell. On top of this, you need to get specs for
-target chips and work out what the various instruction registers/data
-registers do, so you can actually do something useful. That's where it
-gets interesting. But in and of itself, JTAG is actually very simple.
-
-@section primerjtag More Reading
-
-A separate primer contains information about @subpage primerjtagbs for
-developers that want to extend OpenOCD for such purposes.
-
- */
-/** @page primerjtagbs JTAG Boundary Scan Primer
-
-The following page provides an introduction on JTAG that focuses on its
-boundary scan capabilities: @par
-http://www.engr.udayton.edu/faculty/jloomis/ece446/notes/jtag/jtag1.html
-
-OpenOCD does not presently have clear means of using JTAG for boundary
-scan testing purposes; however, some developers have explored the
-possibilities. The page contains information that may be useful to
-those wishing to implement boundary scan capabilities in OpenOCD.
-
-@section primerbsdl The BSDL Language
-
-For more information on the Boundary Scan Description Language (BSDL),
-the following page provides a good introduction: @par
-http://www.radio-electronics.com/info/t_and_m/boundaryscan/bsdl.php
-
-@section primerbsdlvendors Vendor BSDL Files
-
-NXP LPC: @par
-http://www.standardics.nxp.com/support/models/lpc2000/
-
-Freescale PowerPC: @par
-http://www.freescale.com/webapp/sps/site/overview.jsp?code=DRPPCBSDLFLS
-
-Freescale i.MX1 (too old): @par
-http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX1&nodeId=0162468rH311432973ZrDR&fpsp=1&tab=Design_Tools_Tab
-
-Renesas R32C/117: @par
-http://sg.renesas.com/fmwk.jsp?cnt=r32c116_7_8_root.jsp&fp=/products/mpumcu/m16c_family/r32c100_series/r32c116_7_8_group/
-- The device page does not come with BSDL file; you have to register to
- download them. @par
- http://www.corelis.com/support/BSDL.htm
-
-TI links theirs right off the generic page for each chip;
-this may be the case for other vendors as well. For example:
-
-- DaVinci DM355 -- http://www.ti.com/litv/zip/sprm262b
-- DaVinci DM6446
- - 2.1 silicon -- http://www.ti.com/litv/zip/sprm325a
- - older silicon -- http://www.ti.com/litv/zip/sprm203
-- OMAP 3530
- - CBB package -- http://www.ti.com/litv/zip/sprm315b
- - 515 ball s-PGBA, POP, 0.4mm pitch
- - CUS package -- http://www.ti.com/litv/zip/sprm314a
- - 515 ball s-PGBA, POP, 0.5mm pitch
- - CBC package -- http://www.ti.com/litv/zip/sprm346
- - 423 ball s-PGBA, 0.65mm pitch
-
-Many other files are available in the "Semiconductor Manufacturer's BSDL
-files" section of the following site: @par
-http://www.freelabs.com/~whitis/electronics/jtag/
-
- */
-/** @file
-This file contains the @ref primerjtag and @ref primerjtagbs page.
- */
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-/** @page primertcl OpenOCD TCL Primer
-
-The @subpage scripting page provides additional TCL Primer material.
-
-@verbatim
-
-****************************************
-****************************************
-
-This is a short introduction to 'un-scare' you about the language
-known as TCL. It is structured as a guided tour through the files
-written by me [Duane Ellis] - in early July 2008 for OpenOCD.
-
-Which uses the "JIM" embedded Tcl clone-ish language.
-
-Thing described here are *totally* TCL generic... not Jim specific.
-
-The goal of this document is to encourage you to add your own set of
-chips to the TCL package - and most importantly you should know where
-you should put them - so they end up in an organized way.
-
---Duane Ellis.
- duane@duaneellis.com
-
-****************************************
-****************************************
-
-Adding "chip" support - Duane Ellis July 5 - 2008.
-
-The concept is this:
- In your "openocd.cfg" file add something like this:
-
- source [find tcl/chip/VENDOR/FAMILY/NAME.tcl]
-
- For example...
- source [find tcl/chip/atmel/at91/at91sam7x256.tcl]
-
- You'll notice that it makes use of:
-
- tcl/cpu/arm/<NAME>.tcl.
-
- Yes, that is where you should put "core" specific things.
- Be careful and learn the difference:
-
- THE "CORE" - is not the entire chip!
-
-Definition:
- That "file" listed above is called a "CHIP FILE".
-
- It may be standalone, or may need to "source" other "helper" files.
-
- The reference [7/5/2008] is the at91sam7x256.tcl file.
-
-****************************************
-****************************************
-=== TCL TOUR ===
-Open: at91sam7x256.tcl
-=== TCL TOUR ===
-
-A walk through --- For those who are new to TCL.
-
-Examine the file: at91sam7x256.tcl
-
-It starts with:
- source [find path/filename.tcl]
-
-In TCL - this is very important.
-
- Rule #1 Everything is a string.
- Rule #2 If you think other wise See #1.
-Reminds you of:
- Rule #1: The wife is correct.
- Rule #2: If you think otherwise, See #1
-
-Any text contained inside of [square-brackets]
-is just like `back-ticks` in BASH.
-
-Hence, the [find FILENAME] executes the command find with a single
-parameter the filename.
-
-========================================
-
-Next you see a series of:
-
-set NAME VALUE
-
-It is mostly "obvious" what is going on.
-
-Exception: The arrays.
-
- You would *THINK* Tcl supports arrays.
- In fact, multi-dim arrays. That is false.
-
- For the index for"FLASH(0,CHIPSELECT)" is actually the string
- "0,CHIPSELECT". This is problematic. In the normal world, you think
- of array indexes as integers.
-
- For example these are different:
-
- set foo(0x0c) 123
- set foo(12) 444
-
- Why? Because 0x0c {lowercase} is a string.
- Don't forget UPPER CASE.
-
- You must be careful - always... always... use simple decimal
- numbers. When in doubt use 'expr' the evaluator. These are all the
- same.
-
- set x 0x0c
- set foo([expr $x]) "twelve"
-
- set x 12
- set foo([expr $x]) "twelve"
-
- set x "2 * 6"
- set foo([expr $x]) "twelve"
-
-**************************************************
-***************************************************
-=== TCL TOUR ===
-Open the file: "bitsbytes.tcl"
-
-There is some tricky things going on.
-===============
-
-First, there is a "for" loop - at level 0
-{level 0 means: out side of a proc/function}
-
-This means it is evaluated when the file is parsed.
-
-== SIDEBAR: About The FOR command ==
-In TCL, "FOR" is a funny thing, it is not what you think it is.
-
-Syntactically - FOR is a just a command, it is not language
-construct like for(;;) in C...
-
-The "for" command takes 4 parameters.
- (1) The "initial command" to execute.
- (2) the test "expression"
- (3) the "next command"
- (4) the "body command" of the FOR loop.
-
-Notice I used the words "command" and "expression" above.
-
-The FOR command:
-1) executes the "initial command"
-2) evaluates the expression if 0 it stops.
-3) executes the "body command"
-4) executes the "next command"
-5) Goto Step 2.
-
-As show, each of these items are in {curly-braces}. This means they
-are passed as they are - KEY-POINT: un evaluated to the FOR
-command. Think of it like escaping the backticks in Bash so that the
-"under-lying" command can evaluate the contents. In this case, the FOR
-COMMAND.
-
-== END: SIDEBAR: About The FOR command ==
-
-You'll see two lines:
-
-LINE1:
- set vn [format "BIT%d" $x]
-
-Format is like "sprintf". Because of the [brackets], it becomes what
-you think. But here's how:
-
-First - the line is parsed - for {braces}. In this case, there are
-none. The, the parser looks for [brackets] and finds them. The,
-parser then evaluates the contents of the [brackets], and replaces
-them. It is alot this bash statement.
-
- EXPORT vn=`date`
-
-LINE 2 & 3
- set $vn [expr (1024 * $x)]
- global $vn
-
-In line 1, we dynamically created a variable name. Here, we are
-assigning it a value. Lastly Line 3 we force the variable to be
-global, not "local" the the "for command body"
-
-===============
-The PROCS
-
-proc create_mask { MSB LSB } {
- ... body ....
-}
-
-Like "for" - PROC is really just a command that takes 3 parameters.
-The (1) NAME of the function, a (2) LIST of parameters, and a (3) BODY
-
-Again, this is at "level 0" so it is a global function. (Yes, TCL
-supports local functions, you put them inside of a function}
-
-You'll see in some cases, I nest [brackets] alot and in others I'm
-lazy or wanted it to be more clear... it is a matter of choice.
-===============
-
-
-**************************************************
-***************************************************
-=== TCL TOUR ===
-Open the file: "memory.tcl"
-===============
-
-Here is where I setup some 'memory definitions' that various targets can use.
-
-For example - there is an "unknown" memory region.
-
-All memory regions must have 2 things:
-
- (1) N_<name>
- (2) NAME( array )
- And the array must have some specific names:
- ( <idx>, THING )
- Where: THING is one of:
- CHIPSELECT
- BASE
- LEN
- HUMAN
- TYPE
- RWX - the access ability.
- WIDTH - the accessible width.
-
- ie: Some regions of memory are not 'word'
- accessible.
-
-The function "address_info" - given an address should
-tell you about the address.
-
- [as of this writing: 7/5/2008 I have done
- only a little bit with this -Duane]
-
-===
-MAJOR FUNCTION:
-==
-
-proc memread32 { ADDR }
-proc memread16 { ADDR }
-proc memread8 { ADDR }
-
-All read memory - and return the contents.
-
-[ FIXME: 7/5/2008 - I need to create "memwrite" functions]
-
-**************************************************
-***************************************************
-=== TCL TOUR ===
-Open the file: "mmr_helpers.tcl"
-===============
-
-This file is used to display and work with "memory mapped registers"
-
-For example - 'show_mmr32_reg' is given the NAME of the register to
-display. The assumption is - the NAME is a global variable holding the
-address of that MMR.
-
-The code does some tricks. The [set [set NAME]] is the TCL way
-of doing double variable interpolation - like makefiles...
-
-In a makefile or shell script you may have seen this:
-
- FOO_linux = "Penguins rule"
- FOO_winXP = "Broken Glass"
- FOO_mac = "I like cat names"
-
- # Pick one
- BUILD = linux
- #BUILD = winXP
- #BUILD = mac
- FOO = ${FOO_${BUILD}}
-
-The "double [set] square bracket" thing is the TCL way, nothing more.
-
-----
-
-The IF statement - and "CATCH" .
-
-Notice this IF COMMAND - (not statement) is like this:
-[7/5/2008 it is this way]
-
- if ![catch { command } msg ] {
- ...something...
- } else {
- error [format string...]
- }
-
-The "IF" command expects either 2 params, or 4 params.
-
- === Sidebar: About "commands" ===
-
- Take a look at the internals of "jim.c"
- Look for the function: Jim_IfCoreCommand()
- And all those other "CoreCommands"
-
- You'll notice - they all have "argc" and "argv"
-
- Yea, the entire thing is done that way.
-
- IF is a command. SO is "FOR" and "WHILE" and "DO" and the
- others. That is why I keep using the phase it is a "command"
-
- === END: Sidebar: About "commands" ===
-
-Parameter 1 to the IF command is expected to be an expression.
-
-As such, I do not need to wrap it in {braces}.
-
-In this case, the "expression" is the result of the "CATCH" command.
-
-CATCH - is an error catcher.
-
-You give CATCH 1 or 2 parameters.
- The first 1st parameter is the "code to execute"
- The 2nd (optional) is where to put the error message.
-
- CATCH returns 0 on success, 1 for failure.
- The "![catch command]" is self explaintory.
-
-
-The 3rd parameter to IF must be exactly "else" or "elseif" [I lied
-above, the IF command can take many parameters they just have to
-be joined by exactly the words "else" or "elseif".
-
-The 4th parameter contains:
-
- "error [format STRING....]"
-
-This lets me modify the previous lower level error by tacking more
-text onto the end of it. In this case, i want to add the MMR register
-name to make my error message look better.
-
----------
-Back to something inside show_mmr32_reg{}.
-
-You'll see something 'set fn show_${NAME}_helper' Here I am
-constructing a 'function name' Then - I look it up to see if it
-exists. {the function: "proc_exists" does this}
-
-And - if it does - I call the function.
-
-In "C" it is alot like using: 'sprintf()' to construct a function name
-string, then using "dlopen()" and "dlsym()" to look it up - and get a
-function pointer - and calling the function pointer.
-
-In this case - I execute a dynamic command. You can do some cool
-tricks with interpretors.
-
-----------
-
-Function: show_mmr32_bits()
-
-In this case, we use the special TCL command "upvar" which tcl's way
-of passing things by reference. In this case, we want to reach up into
-the callers lexical scope and find the array named "NAMES"
-
-The rest of the function is pretty straight forward.
-
-First - we figure out the longest name.
-Then print 4 rows of 8bits - with names.
-
-
-**************************************************
-***************************************************
-=== TCL TOUR ===
-Open the file: "chips/atmel/at91/usarts.tcl"
-===============
-
-First - about the AT91SAM series - all of the usarts
-are basically identical...
-
-Second - there can be many of them.
-
-In this case - I do some more TCL tricks to dynamically
-create functions out of thin air.
-
-Some assumptions:
-
-The "CHIP" file has defined some variables in a proper form.
-
-ie: AT91C_BASE_US0 - for usart0,
- AT91C_BASE_US1 - for usart1
- ... And so on ...
-
-Near the end of the file - look for a large "foreach" loop that
-looks like this:
-
- foreach WHO { US0 US1 US2 US3 US4 .... } {
-
- }
-
-In this case, I'm trying to figure out what USARTs exist.
-
-Step 1 - is to determine if the NAME has been defined.
-ie: Does AT91C_BASE_USx - where X is some number exist?
-
-The "info exists VARNAME" tells you if the variable exists. Then -
-inside the IF statement... There is another loop. This loop is the
-name of various "sub-registers" within the USART.
-
-Some more trick are played with the [set VAR] backtick evaluation stuff.
-And we create two variables
-
-We calculate and create the global variable name for every subregister in the USART.
-And - declare that variable as GLOBAL so the world can find it.
-
-Then - we dynamically create a function - based on the register name.
-
-Look carefully at how that is done. You'll notice the FUNCTION BODY is
-a string - not something in {braces}. Why? This is because we need TCL
-to evaluate the contents of that string "*NOW*" - when $vn exists not
-later, when the function "show_FOO" is invoked.
-
-Lastly - we build a "str" of commands - and create a single function -
-with the generated list of commands for the entire USART.
-
-With that little bit of code - I now have a bunch of functions like:
-
- show_US0, show_US1, show_US2, .... etc ...
-
- And show_US0_MR, show_US0_IMR ... etc...
-
-And - I have this for every USART... without having to create tons of
-boiler plate yucky code.
-
-****************************************
-****************************************
-END of the Tcl Intro and Walk Through
-****************************************
-****************************************
-
-FUTURE PLANS
-
- Some "GPIO" functions...
-
-@endverbatim
-
- */
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-/** @page releases Release Processes
-
-This page provides an introduction to the OpenOCD Release Processes:
-
-- @ref releasewhy - Explain the motivations for producing
- releases on a regular basis.
-- @ref releasewho - Describes the responsibilities and
- authority required to produce official OpenOCD releases.
-- @ref releasewhen - Provides guidelines for scheduling
- activities for each release cycle.
-- @ref releasehow - Outlines all of the steps for the
- processes used to produce and release the package source archives.
-- @ref releasescriptcmds - Introduces the automated @c release.sh script.
-
-@section releasewhy Why Produce Releases?
-
-The OpenOCD maintainers produce <i>releases</i> periodically for many
-reasons. This section provides the key reasons for making releases on a
-regular basis and why a set of <i>release processes</i> should be used
-to produce them.
-
-At any time, <i>source archives</i> can be produced by running
-<code>make dist</code> in the OpenOCD project tree. With the 0.2.0
-release, this command will package the tree into several popular archive
-formats: <code>openocd-\<version\>.{tar.gz,tar.bz2,zip}</code>. If
-produced properly, these files are suitable for release to the public.
-
-When properly versioned and released for users, these archives present
-several important advantages compared to using the source repository
-(including snapshots downloaded from that repository using gitweb):
-
--# They allow others to package and distribute the code using
- consistent version labels. Users won't normally need to care
- whose package they use, just the version of OpenOCD.
--# They contain a working configure script and makefiles, which
- were produced as part of creating the archive.
--# Because they have been formally released by the project, users
- don't need to try a random work-in-process revision. Releasing
- involves spending some time specifically on quality improvments,
- including bugfixing source code and documentation.
--# They provide developers with the flexibility needed to address
- larger issues, which sometimes involves temporary breakage.
-
-Hopefully, this shows several good reasons to produce regular releases,
-but the release processes were developed with some additional design
-goals in mind. Specifically, the releases processes should have the
-following properties:
-
--# Produce successive sets of archives cleanly and consistently.
--# Implementable as a script that automates the critical steps.
--# Prevent human operators from producing broken packages, when possible.
--# Allow scheduling and automation of building and publishing milestones.
-
-The current release processes are documented in the following sections.
-They attempt to meet these design goals, but improvements may still
-need to be made.
-
-@subsection version_labels Version Labels
-
-Users can display the OpenOCD version string in at least two
-ways. The command line <code>openocd -v</code> invocation
-displays it; as does the Tcl <code>version</code> command.
-
-Labels for released versions look like <em>0.3.0</em>, or
-<em>0.3.0-rc1</em> for a preliminary release.
-Non-released (developer) versions look like <em>0.3.0-dev</em>,
-or <em>0.3.0-rc1-dev</em>.
-In all cases, additional tags may be appended to those base
-release version labels.
-
-The <code>tools/release/version.sh</code> script is used to
-manipulate version IDs found in the source tree.
-
-@subsubsection releaseversions Release Versions and Tags
-
-The OpenOCD version string is composed of three numeric components
-separated by two decimal points: @c x.y.z, where @c x is the @a major
-version number, @c y is the @a minor number, and @c z is the @a micro.
-For any <em>bug-fix</em> release, the micro version number will be non-zero
-(<code>z > 0</code>). For a <i>minor release</i>, the micro version
-number will be zero (<code>z = 0</code>). For a <i>major releases</i>,
-the minor version will @a also be zero (<code>y = 0, z = 0</code>).
-
-After these required numeric components, release version strings
-may contain tags such as as <em>-rc1</em> or <em>-rc2</em>.
-These 'rc' tags indicate "release candidate" versions of the package.
-Like major/minor/micro numbers, these are updated
-as part of the release process.
-
-The release process includes version number manipulations to the tree
-being released, ensuring that all numbers are incremented (or rolled
-over) at the right time and in the proper locations of the repository.
-One of those manipulations creates a repository tag matching that
-release's version label.
-
-@subsubsection releaseversionsdist Packager Versions
-
-Distributors of patched versions of OpenOCD are encouraged to extend the
-version string with a unique version tag when producing external
-releases, as this helps to identify your particular distribution series.
-Knowing that a release has such patches can be essential to tracking
-down and fixing bugs.
-
-Packager version tags should always be suffixes to the version
-code from the OpenOCD project, signifying modifications to the
-original code base. Each packager release should have a unique
-version.
-
-For example, the following command will add a 'foo' tag to the
-configure.ac script of a local copy of the source tree, giving
-a version label like <em>0.3.0-foo</em>:
-
-@code
-tools/release/version.sh tag add foo
-@endcode
-
-This command will modify the configure.ac script in your working copy
-only. After running the @c bootstrap sequence, the tree can be patched
-and used to produce your own derived versions. You might check that
-change into a private branch of your git tree, along with the other
-patches you are providing.
-
-You can also "bump" those tags (so "foo1" becomes "foo2" etc)
-each time a derived package is released, incrementing the tag's
-version to facilitate tracking the changes you have distributed.
-
-@code
-tools/release/version.sh bump tag foo
-@endcode
-
-Of course, any patches in your branches must be provided to
-your customers, and be in conformance with the GPL. In most
-cases you should also work to merge your improvements to the
-mainline tree.
-
-@subsubsection version_tags Development Versions and Tags
-
-Everything except formal releases should have the tag <em>-dev</em>
-in their version number. This helps developers identify reports
-created from non-release versions, and it can be detected and
-manipulated by the release script. Specifically, this tag will be
-removed and re-added during the release process; it should never be
-manipulated by developers in submitted patches.
-
-Versions built from developer trees may have additional tags.
-Trees built from git snapshots have <em>snapshot</em> tags.
-When built from a "live" git tree, tags specify
-specific git revisions:
-
-0.3.0-rc1-dev-00015-gf37c9b8-dirty
-
-indicates a development tree based on git revison f37c9b8
-(a truncated version of a SHA1 hash) with some non-git
-patches applied (the <em>dirty</em> tag). This information
-can be useful when tracking down bugs.
-(Note that at this writing, the tags do not directly
-correspond to <code>git describe</code> output. The
-hash ID can be used with <code>git show</code>, but
-the relevant repository tag isn't <em>0.3.0-rc1-dev</em>;
-this might change in the future.)
-
-@section releasewho Release Manager
-
-OpenOCD archive releases will be produced by an individual filling the
-role of <i>Release Manager</i>, hereafter abbreviated as <i>RM</i>. This
-individual determines the schedule and executes the release processes
-for the community.
-
-@subsection releasewhohow RM Authority
-
-Each release requires one individual to fulfill the RM role; however,
-graceful transitions of this authority may take place at any time. The
-current RM may transfer their authority to another contributor in a post
-to the OpenOCD development mailing list. Such delegation of authority
-must be approved by the individual that will receive it and the
-community of maintainers. Initial arrangements with the new RM should
-be made off-list, as not every contributor wants these responsibilities.
-
-@subsection releasewhowhat RM Responsibilities
-
-In addition to the actual process of producing the releases, the RM is
-responsible for keeping the community informed of all progress through
-the release cycle(s) being managed. The RM is responsible for managing
-the changes to the package version, though the release tools should
-manage the tasks of adding or removing any required development branch
-tags and incrementing the version.
-
-These responsibilities matter most towards the end of the release
-cycle, when the RM creates the first RC and all contributors enter
-a quality-improvement mode. The RM works with other contributors
-to make sure everyone knows what kinds of fixes should merge, the
-status of major issues, and the release timetable.
-
-In particular, the RM has the final decision on whether a given
-bug should block the release.
-
-@section releasewhen Release Schedule
-
-The OpenOCD release process must be carried out on a periodic basis, so
-the project can realize the benefits presented in answer to the question,
-@ref releasewhy.
-
-Starting with the 0.2.0 release, the OpenOCD project expects to produce
-new releases every few months.
-Bug fix releases could be provided more frequently. These release
-schedule goals may be adjusted in the future, after the project
-maintainers and distributors receive feedback and experience.
-
-More importantly, the statements made in this section do not create an
-obligation by any member of the OpenOCD community to produce new
-releases on regular schedule, now or in the future.
-
-@subsection releasewhenexample Sample Schedule
-
-The RM must pro-actively communicate with the community from the
-beginning of the development cycle through the delivery of the new
-release. This section presents guidelines for scheduling key points
-where the community must be informed of changing conditions.
-
-If Tn is the time of release n, then the following schedule
-might describe some key T0-to-T1 release cycle milestones.
-
-- T0 ... End of T0 release cycle. T1 cycle starts, with merge
- window opening. Developers begin to merge queued work.
-- <em>... several weeks of merge window ...</em>
-- RC1 ... Close mainline to new work. Produce RC1
- release, begin testing phase; developers are in "bugfix mode",
- all other work is queued; send out planned endgame schedule.
-- RC2 ... Produce RC2 and send schedule update to
- mailing list, listing priorities for remaining fixes
-- <em>... more RC milestones, until ready ...</em>
-- T1: End of T1 release cycle. T2 cycle starts, with merge
- window opening. Developers begin to merge queued work.
-
-Note that until it happens, any date for T1 is just a goal.
-Critical bugs prevent releases from happening. We are just
-beginning to use this window-plus-RCs process, so the lengths
-of the merge windows versus the RC phase is subject to change.
-Most projects have RC phases of a month or more.
-
-Some additional supplemental communication will be desirable. The above
-list omits the step-by-step instructions to daily release management.
-Individuals performing release management need to have the ability to
-interact proactively with the community as a whole, anticipating when
-such interaction will be required and giving ample notification.
-
-The next section explains why the OpenOCD project allows significant
-flexibility in the part of the development that precedes the release
-process.
-
-@subsection releasewhenflex Schedule Flexibility
-
-The Release Manager should attempt to follow the guidelines in this
-document, but the process of scheduling each release milestone should be
-community driven at the start. Features that don't complete before
-the merge window closes can be held (perhaps in some branch) until
-the next merge window opens, rather than delaying the release cycle.
-
-The Release
-Manager cannot schedule the work that will be done on the project,
-when it will be submitted, reviewed, and deemed suitable to be committed.
-That is, the RM cannot act as a priest in a cathedral; OpenOCD uses
-the bazaar development model. The release schedule must adapt
-continuously in response to changes in the rate of work.
-Fewer releases may be
-required if developers contribute less patches, and more releases may be
-desirable if the project continues to grow and experience high rates of
-community contribution. During each cycle, the RM should be tracking
-the situation and gathering feedback from the community.
-
-@section releasehow Release Process: Step-by-Step
-
-The release process is not final; it may need more iterations
-to work out bugs.
-While there are release scripts, key steps require community
-support; the Release Manager isn't the only participant.
-
-The following steps should be followed to produce each release:
-
--# Produce final patches using a local clone of mainline. Nobody
- except the RM should be committing anything. <em>Everyone with commit
- privileges needs to know and agree to this in advance!</em> Even the RM
- only commits a handful of updates as part of the release process
- itself ... to files which are part of the version identification scheme
- or release process; and to create the version tag; and then to open the
- merge window for the next release cycle.
- -# Finalize @c the NEWS file to describe the changes in the release
- - This file is used to automatically post "blurbs" about the project.
- - This material should have been produced during the development cycle,
- by adding items for each @c NEWS-worthy contribution, when committed
- during the merge window. (One part of closing the merge window, by
- opening the RC phase of the release, is the commitment to hold all
- further such contributions until the next merge window opens.)
- - The RM should make sure nothing important was omitted, as part of
- the RC1 cycle. From then on, no more updates to NEWS content should
- be needed (except to seed the process for the next release, or maybe
- if a significant and longstanding bug is fixed late in the RC phase).
- -# Bump library version if our API changed (not yet required)
- -# Update and commit the final package version in @c configure.ac:
- (The <code>tools/release/version.sh</code> script might help ensure
- the versions are named properly.):
- -# Remove @c -dev tag.
- -# Update any @c -rc tag:
- - If producing the final release from an -rc series, remove it
- - If producing the first RC in a series, add rc1
- - If producing the next RC in a series, bump the rc number
- -# Commit that version change, with a good descriptive comment.
- -# Create a git tag for the final commit, with a tag name matching
- the version string in <code>configure.ac</code> (including <em>-rcN</em>
- where relevant):
-@verbatim
-PACKAGE_VERSION="x.y.z"
-PACKAGE_TAG="v${PACKAGE_VERSION}"
-git tag -m "The openocd-${PACKAGE_VERSION} release." "${PACKAGE_TAG}"
-@endverbatim
- -# Do not push those changes to mainline yet; only builds using the
- source archives you will be creating should ever be labeled as
- official releases (with no "-dev" suffix). Since mainline is a
- development tree, these will be pushed later, as part of opening
- the merge window for the next release cycle (restoring the "-dev"
- suffix for that next release.) Those version and tag updates are
- the last ones to be included in the release being made.
--# Produce the release files, using the local clone of the source
- tree which holds the release's tag and updated version in
- @c configure.ac ... this is used only to produce the release, and
- all files should already be properly checked out.
- -# Run <code>tools/release.sh package</code> to produce the
- source archives. This automatically bootstraps and
- configures the process.
- -# Run <code>tools/release.sh stage</code> to create an @c archives
- directory with the release data, including MD5 and SHA1
- checksum files.
- -# Sanity check at least one of those archives, by extracting and
- configuring its contents, using them to build a copy of OpenOCD,
- and verifying that the result prints the correct release version
- in its startup banner. (For example,
- "configure --enable-ft2232_libftdi --enable-parport"
- then "make" and run "src/openocd -v" as a sanity check.)
- -# Run <code>make docs</code> to create the
- documentation which will be published.
--# Upload packages and post announcements of their availability:
- -# Release packages into files section of project sites:
- - SF.net:
- -# Under "Project Admin", use the "File Manager"
- -# Create a new folder under "openocd" named "${PACKAGE_VERSION}"
- -# Upload the @c NEWS file and mark it as the release notes.
- -# Upload the three source archive files, using the Web interface,
- into that folder. Verify the upload worked OK by checking the
- MD5 and SHA1 checksums computed by SourceForge against the
- versions created as part of staging the release.
- -# Also upload doc/openocd.pdf (the User's Guide) so the version
- matching each release will be easily available.
- -# Select each file in the release, and use the property panel
- to set its type and select the right release notes.
- - .tar.bz2: Linux, Mac
- - .tar.gz: BSD, Solaris, Others
- - .zip: Windows
- - For openocd.pdf just associate it with the right release notes.
- -# Create an SF.net project news update.
- -# Depending on how paranoid you're feeling today, verify the images by
- downloading them from the websites and making sure there are no
- differences between the downloaded copies and your originals.
- -# Publish User's and Developer's Guides to the project web sites:
- -# Use SCP to update the SF.net web site with PDF and HTML for the
- User's Guide, and HTML for the developer's guide ... you can
- instantiate a shell.sourceforge.net instance and set up symlinks
- from your home directory, to simplify this process.
- -# Post announcement e-mail to the openocd-development list.
- -# optionally:
- -# Post an update on the OpenOCD blog.
- -# Announce updates on freshmeat.net and other trackers.
- -# Submit updates to news feeds (e.g. Digg, Reddit, etc.).
--# Resume normal development on mainline, by opening the merge window for
- the next major or minor release cycle. (You might want to do this
- before all the release bits are fully published.)
- - Update the version label in the @c configure.ac file:
- - Restore @c -dev version tag.
- - For a new minor release cycle, increment the release's minor number
- - For a new major release cycle, increment the release's major number
- and zero its minor number
- - Archive @c NEWS file as "<code>doc/news/NEWS-${PACKAGE_VERSION}</code>".
- - Create a new @c NEWS file for the next release
- - Commit those changes.
- - Push all the updates to mainline.
- - Last updates for the release, including the release tag (you
- will need to "git push --tags").
- - Updates opening the merge window
- - At this point, it's OK for commiters to start pushing changes
- which have been held off until the next release. (Any bugfixes to
- this release will be against a bug-fix release branch starting from
- the commit you tagged as this release, not mainline.)
- - Announce to the openocd-development list. Ideally, you will also
- be able to say who is managing the next release cycle.
-
-To start a bug-fix release branch:
--# Create a new branch, starting from a major or
- minor release tag
--# Restore @c -dev version tag.
--# Bump micro version number in configure.ac
--# Backport bugfix patches from mainline into that branch.
- (Always be sure mainline has the fix first, so it's hard
- to just lose a bugfix.)
--# Commit and push those patches.
--# When desired, release as above ... except note that the next
- release of a bugfix branch is never a new major or minor release
-
-@subsection releasescriptcmds Release Script Commands
-
-The @c release.sh script automates some of the steps involved
-in making releases, simplifying the Release Manager's work.
-
-The release script can be used for two tasks:
-- Creating releases and starting a new release cycle:
-@code
-git checkout master
-tools/release.sh --type=minor --final --start-rc release
-@endcode
-- Creating a development branch from a tagged release:
-@code
-git checkout 'v0.2.0'
-tools/release.sh --type=micro branch
-@endcode
-
-Both of these variations make automatic commits and tags in your
-repository, so you should be sure to run it on a cloned copy before
-proceding with a live release.
-
-@subsection releasescriptopts Release Script Options
-
-The @c release.sh script recognizes some command-line options that
-affect its behavior:
-
-- The @c --start-rc indicates that the new development release cycle
- should start with @c -rc0. Without this, the @c -rc tag will be omitted,
- leading to non-monotonic versioning of the in-tree version numbers.
-- The @c --final indicates that the release should drop the @c -rc tag,
- to going from @c x.y.z-rcN-dev to x.y.z.
-
-@subsection releasescriptenv Release Script Environment
-
-The @c release.sh script recognizes some environment variables which
-affect its behavior:
-
-- @c CONFIG_OPTS : Passed as options to the configure script.
-- @c MAKE_OPTS : Passed as options to the 'make' processes.
-
-@section releasetutorial Release Tutorials
-
-This section should contain a brief tutorial for using the Release
-Script to perform release tasks, but the new script needs to be
-used for 0.3.0.
-
-@section releasetodo Release Script Shortcomings
-
-Improved automated packaging and distribution of OpenOCD requires more
-patching of the configure script. The final release script should be
-able to manage most steps of the processes. The steps requiring user
-input could be guided by an "assistant" that walks the Release Manager
-through the process from beginning to end, performing basic sanity
-checks on their various inputs (e.g. the @c NEWS blurb).
-
- */
-/** @file
-This file contains the @ref releases page.
- */
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-/** @page scripting Scripting Overview
-
-@section scriptingisnt What scripting will not do
-
-The scripting support is intended for developers of OpenOCD.
-It is not the intention that normal OpenOCD users will
-use tcl scripting extensively, write lots of clever scripts,
-or contribute back to OpenOCD.
-
-Target scripts can contain new procedures that end users may
-tinker to their needs without really understanding tcl.
-
-Since end users are not expected to mess with the scripting
-language, the choice of language is not terribly important
-to those same end users.
-
-Jim Tcl was chosen as it was easy to integrate, works
-great in an embedded environment and �yvind Harboe
-had experience with it.
-
-@section scriptinguses Uses of scripting
-
-Default implementation of procedures in tcl/procedures.tcl.
-
-- Polymorphic commands for target scripts.
- - there will be added some commands in Tcl that the target
- scripts can replace.
- - produce \<productionfile\> \<serialnumber\>. Default implementation
- is to ignore serial number and write a raw binary file
- to beginning of first flash. Target script can dictate
- file format and structure of serialnumber. Tcl allows
- an argument to consist of e.g. a list so the structure of
- the serial number is not limited to a single string.
- - reset handling. Precise control of how srst, trst &
- tms is handled.
-- replace some parts of the current command line handler.
- This is only to simplify the implementation of OpenOCD
- and will have no externally visible consequences.
- Tcl has an advantage in that it's syntax is backwards
- compatible with the current OpenOCD syntax.
-- external scripting. Low level tcl functions will be defined
- that return machine readable output. These low level tcl
- functions constitute the tcl api. flash_banks is such
- a low level tcl proc. "flash banks" is an example of
- a command that has human readable output. The human
- readable output is expected to change inbetween versions
- of OpenOCD. The output from flash_banks may not be
- in the preferred form for the client. The client then
- has two choices a) parse the output from flash_banks
- or b) write a small piece of tcl to output the
- flash_banks output to a more suitable form. The latter may
- be simpler.
-
-
-@section scriptingexternal External scripting
-
-The embedded Jim Tcl interpreter in OpenOCD is very limited
-compared to any full scale PC hosted scripting language.
-
-The goal is to keep the internal Jim Tcl interpreter as
-small as possible and allow any advanced scripting,
-especially scripting that interacts with the host,
-run on the host and talk to OpenOCD via the TCP/IP
-scripting connection.
-
-Another problem with Jim Tcl is that there is no debugger
-for it.
-
-With a bit of trickery it should be possible to run Jim
-Tcl scripts under a Tcl interpreter on a PC. The advantage
-would be that the Jim Tcl scripts could be debugged using
-a standard PC Tcl debugger.
-
-The rough idea is to write an unknown proc that sends
-unknown commands to OpenOCD.
-
-Basically a PC version of startup.tcl. Patches most
-gratefully accepted! :-)
-
- */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/server.txt
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-/** @page serverdocs OpenOCD Server APIs
-
-OpenOCD provides support for implementing different types of servers.
-Presently, the following servers have APIs that can be used.
-
- - @subpage servergdb
- - @subpage servertelnet
- - @subpage serverhttp
-
-@section serverdocsoverview Overview
-
-What follows is a development history, and describes some of the intent
-of why certain features exist within OpenOCD along with the reasoning
-behind them.
-
-This roadmap section was written May 2009 - about 9 to 12 months
-after some of this work had started, it attempts to document some of
-the reasons why certain features exist within OpenOCD at that time.
-
-@section serverdocsbg Background
-
-In early 2008, Oyvind Harboe and Duane Ellis had talked about how to
-create a reasonable GUI for OpenOCD - something that is non-invasive,
-simple to use and maintain, and does not tie OpenOCD to many other
-packages. It would be wrong to "spider web" requirements into other
-external external packages. That makes it difficult for developers to
-write new code and creates a support nightmare.
-
-In many ways, people had talked about the need for some type of
-high-level interface to OpenOCD, because they only had two choices:
-- the ability to script: via an external program the actions of OpenOCD.
-- the ablity to write a complex internal commands: native 'commands'
- inside of OpenOCD was complicated.
-
-Fundamentally, the basic problem with both of those would be solved
-with a script language:
-
--# <b>Internal</b>: simple, small, and self-contained.
--# <b>Cross Language</b>: script friendly front-end
--# <b>Cross Host</b>: GUI Host interface
--# <b>Cross Debugger</b>: GUI-like interface
-
-What follows hopefully shows how the plans to solve these problems
-materialized and help to explain the grand roadmap plan.
-
-@subsection serverdocsjim Why JimTCL? The Internal Script Language
-
-At the time, the existing "command context schema" was proving itself
-insufficient. However, the problem was also considered from another
-direction: should OpenOCD be first class and the script second class?
-Which one rules?
-
-In the end, OpenOCD won, the conclusion was that simpler will be better.
-Let the script language be "good enough"; it would not need numerous
-features. Imagine debugging an embedded Perl module while debugging
-OpenOCD. Yuck. OpenOCD already has a complex enough build system, why
-make it worse?
-
-The goal was to add a simple language that would be moderately easy to
-work with and be self-contained. JimTCL is a single C and single H
-file, allowing OpenOCD to avoid the spider web of dependent packages.
-
-@section serverdocstcl TCL Server Port
-
-The TCL Server port was added in mid-2008. With embedded TCL, we can
-write scripts internally to help things, or we can write "C" code that
-interfaces well with TCL.
-
-From there, the developers wanted to create an external front-end that
-would be @a very usable and that that @a any language could utilize,
-allowing simple front-ends to be (a) cross-platform (b) languag
-agnostic, and (c) easy to develop and use.
-
-Simple ASCII protocols are easy. For example, HTTP, FTP (control), and
-SMTP are all text-based. All of these examples are widely and
-well-known, and they do not require high-speed or high-volume. They
-also support a high degree of interoperability with multiple systems.
-They are not human-centric protocols; more correctly, they are rigid,
-terse, simple ASCII protocols that are emensely parsable by a script.
-
-Thus, the TCL server -- a 'machine' type socket interface -- was added
-with the hope was it would output simple "name-value" pair type
-data. At the time, simple name/value pairs seemed reasonably easier to
-do at the time, though Maybe it should output JSON;
-
-See here:
-
- http://www.mail-archive.com/openocd-development%40lists.berlios.de/msg00248.html
-
-The hope was that one could write a script in what ever language you want
-and do things with it!
-
-@section serverdocsgui GUI Like Interfaces
-
-A lot has been said about various "widigit-foo-gui-library is so
-wonderful". Please refer back to the domino and spider web problem of
-dependencies. Sure, you may well know the WhatEver-GUI library, but
-most others will not (including the next contributer to OpenOCD).
-How do we solve that problem?
-
-For example, Cygwin can be painful, Cygwin GUI packages want X11
-to be present, crossing the barrier between MinGW and Cygwin is
-painful, let alone getting the GUI front end to work on MacOS, and
-Linux, yuck yuck yuck. Painful. very very painful.
-
-What works easier and is less work is what is already present in every
-platform? The answer: A web browser. In other words, OpenOCD could
-serve out embedded web pages via "localhost" to your browser.
-
-Long before OpenOCD had a TCL command line, Zylin AS built their ZY1000
-devince with a built-in HTTP server. Later, they were willing to both
-contribute and integrate most of that work into the main tree.
-
-@subsection serverdocsother Other Options Considered
-
-What if a web browser is not acceptable ie: You want to write your own
-front gadget in Eclipse, or KDevelop, or PerlTK, Ruby, or what ever
-the latest and greatest Script De Jour is.
-
-- Option 1: Can we transport this extra data through the GDB server
-protocol? In other words, can we extend the GDB server protocol?
-No, Eclipse wants to talk to GDB directly and control the GDB port.
-
-- Option 2: SWIG front end (libopenocd): Would that work?
-
-That's painful - unless you design your api to be very simplistic -
-every language has it's own set of wack-ness, parameter marshaling is
-painful.
-
-What about "callbacks" and structures, and other mess. Imagine
-debugging that system. When JimTCL was introduced Spencer Oliver had
-quite a few well-put concerns (Summer 2008) about the idea of "TCL"
-taking over OpenOCD. His concern is and was: how do you debug
-something written in 2 different languages? A "SWIG" front-end is
-unlikely to help that situation.
-
-@subsection serverdoccombined Combined: Socket & WebServer Benifits
-
-Seriously think about this question: What script language (or compiled
-language) today cannot talk directly to a socket? Every thing in the
-OpenOCD world can work a socket interface. Any host side tool can talk
-to Localhost or remote host, however one might want to make it work.
-
-A socket interface is very simple. One could write a Java application
-and serve it out via the embedded web server, could it - or something
-like it talk to the built in TCL server? Yes, absolutely! We are on to
-something here.
-
-@subsection serverdocplatforms Platform Permuntations
-
-Look at some permutations where OpenOCD can run; these "just work" if
-the Socket Approach is used.
-
-
-- Linux/Cygwin/MinGw/MacOSx/FreeBSD development Host Locally
-- OpenOCD with some dongle on that host
-
-
-- Linux/Cygwin/MingW/MacOS/FreeBSD development host
-- DONGLE: tcpip based ARM-Linux perhaps at91rm9200 or ep93xx.c, running openocd.
-
-
-- Windows cygwin/X desktop environment.
-- Linux development host (via remote X11)
-- Dongle: "eb93xx.c" based linux board
-
-
-@subsection serverdocfuture Development Scale Out
-
-During 2008, Duane Ellis created some TCL scripts to display peripheral
-register contents. For example, look at the sam7 TCL scripts, and the
-stm32 TCL scripts. The hope was others would create more.
-
-
-A good example of this is display/view the peripheral registers on
-your embedded target. Lots of commercial embedded debug tools have
-this, some can show the TIMER registers, the interrupt controller.
-
-What if the chip companies behind STM32, or PIC32, AT91SAM chips -
-wanted to write something that makes working with their chip better,
-easier, faster, etc.
-
-@a Question: How can we (the OpenOCD group) make that really fancy
-stuff across multiple different host platforms?
-
-Remember: OpenOCD runs on:
--# Linux via USB,
--# ARM Linux - bit-banging GPIO pins
--# MacOSX
--# FreeBSD
--# Cygwin
--# MinGW32
--# Ecos
-
-How can we get that to work?
-
-@subsection serverdocdebug What about Debugger Plugins?
-
-Really GDB is nice, it works, but it is not a good embedded debug tool.
-OpenOCD cannot work in a GUI when one cannot get to its command line.
-Some GDB front-end developers have pedantic designs that refuse any and
-all access to the GDB command line (e.g. http://www.kdbg.org/todo.php).
-
-The TELNET interface to OpenOCD works, but the intent of that interface
-is <b>human interaction</b>. It must remain available, developers depend
-upon it, sometimes that is the only scheme available.
-
-As a small group of developers, supporting all the platforms and
-targets in the debugger will be difficult, as there are enough problem
-with the plethora of Adapters, Chips, and different target boards.
-Yes, the TCL interface might be suitable, but it has not received much
-love or attention. Perhaps it will after you read and understand this.
-
-One reason might be, this adds one more host side requirement to make
-use of the feature. In other words, one could write a Python/TK
-front-end, but it is only useable if you have Python/TK installed.
-Maybe this can be done via Ecllipse, but not all developers use Ecplise.
-Many devlopers use Emacs (possibly with GUD mode) or vim and will not
-accept such an interface. The next developer reading this might be
-using Insight (GDB-TK) - and somebody else - DDD..
-
-There is no common host-side GDB front-end method.
-
-@section serverdocschallenge Front-End Scaling
-
-Maybe we are wrong - ie: OpenOCD + some TK tool
-
-Remember: OpenOCD is often (maybe 99.9%) of the time used with
-GDB-REMOTE. There is always some front-end package - be it command-line
-GDB under DDD, Eclipse, KDevelop, Emacs, or some other package
-(e.g. IAR tools can talk to GDB servers). How can the OpenOCD
-developers make that fancy target display GUI visible under 5 to 10
-different host-side GDB..
-
-Sure - a <em>man on a mission</em> can make that work. The GUI might be
-libopenocd + Perl/TK, or maybe an Eclipse Plug-in.
-That is a development support nightmare for reasons described
-above. We have enough support problems as it is with targets, adapters,
-etc.
-
-@section serverdocshttpbg HTTP Server Background
-
-OpenOCD includes an HTTP server because most development environments
-are likely contain a web browser. The web browser can talk to OpenOCD's
-HTTP server and provide a high-level interfaces to the program.
-Altogether, it provides a universally accessible GUI for OpenOCD.
-
-@section serverdocshtml Simple HTML Pages
-
-There is (or could be) a simple "Jim TCL" function to read a memory
-location. If that can be tied into a TCL script that can modify the
-HTTP text, then we have a simple script-based web server with a JTAG
-engine under the hood.
-
-Imagine a web page - served from a small board with two buttons:
-"LED_ON" and "LED_OFF", each click - turns the LED on or OFF, a very
-simplistic idea. Little boards with web servers are great examples of
-this: Ethernut is a good example and Contiki (not a board, an embedded
-OS) is another example.
-
-One could create a simple: <b>Click here to display memory</b> or maybe
-<b>click here to display the UART REGISTER BLOCK</b>; click again and see
-each register explained in exquisit detail.
-
-For an STM32, one could create a simple HTML page, with simple
-substitution text that the simple web server use to substitute the
-HTML text JIMTCL_PEEK32( 0x12345678 ) with the value read from
-memory. We end up with an HTML page that could list the contents of
-every peripheral register on the target platform.
-
-That also is transportable, regardless of the OpenOCD host
-platform: Linux/X86, Linux/ARM, FreeBSD, Cygwin, MingW, or MacOSX.
-You could even port OpenOCD to an Android system and use it as a
-bit-banging JTAG Adapter serving web pages.
-
-@subsection serverdocshtmladv Advanced HTML Pages
-
-Java or JavaScript could be used to talk back to the TCL port. One
-could write a Java, AJAX, FLASH, or some other developer friendly
-toolbox and get a real cross-platform GUI interface. Sure, the interface
-is not native - but it is 100% cross-platform!
-
-OpenOCD current uses simple HTML pages; others might be an Adobe FLASH
-expert, or a Java Expert. These possibilities could allow the pages
-remain cross-platform but still provide a rich user-interface
-experience.
-
-Don't forget it can also be very simple, exactly what one developer
-can contribute, a set of very simple web pages.
-
-@subsection serverdocshtmlstatus HTTP/HTML Status
-
-As of May 2009, much of the HTML pages were contributed by Zylin AS,
-hence they continue to retain some resemblance to the ZY1000 interface.
-
-Patches would be welcome to move these parts of the system forward.
-
- */
-
-/** @page servergdb OpenOCD GDB Server API
-
-This section needs to be expanded.
-
- */
-
-/** @page servertelnet OpenOCD Telnet Server API
-
-This section needs to be expanded.
-
- */
-
-/** @page serverhttp OpenOCD http Server API
-
-This section needs to be expanded.
-
- */
[33/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam4.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam4.c
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-/***************************************************************************
- * Copyright (C) 2009 by Duane Ellis *
- * openocd@duaneellis.com *
- * *
- * Copyright (C) 2010 by Olaf L�ke (at91sam3s* support) *
- * olaf@uni-paderborn.de *
- * *
- * Copyright (C) 2011 by Olivier Schonken, Jim Norris *
- * (at91sam3x* & at91sam4 support)* *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the *
- * GNU General public License for more details. *
- * *
- * You should have received a copy of the GNU General public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
-****************************************************************************/
-
-/* Some of the the lower level code was based on code supplied by
- * ATMEL under this copyright. */
-
-/* BEGIN ATMEL COPYRIGHT */
-/* ----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support
- * ----------------------------------------------------------------------------
- * Copyright (c) 2009, Atmel Corporation
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaimer below.
- *
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
- */
-/* END ATMEL COPYRIGHT */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/time_support.h>
-
-#define REG_NAME_WIDTH (12)
-
-/* at91sam4s/at91sam4e series (has always one flash bank)*/
-#define FLASH_BANK_BASE_S 0x00400000
-
-/* at91sam4sd series (two one flash banks), first bank address */
-#define FLASH_BANK0_BASE_SD FLASH_BANK_BASE_S
-/* at91sam4sd16x, second bank address */
-#define FLASH_BANK1_BASE_1024K_SD (FLASH_BANK0_BASE_SD+(1024*1024/2))
-/* at91sam4sd32x, second bank address */
-#define FLASH_BANK1_BASE_2048K_SD (FLASH_BANK0_BASE_SD+(2048*1024/2))
-
-#define AT91C_EFC_FCMD_GETD (0x0) /* (EFC) Get Flash Descriptor */
-#define AT91C_EFC_FCMD_WP (0x1) /* (EFC) Write Page */
-#define AT91C_EFC_FCMD_WPL (0x2) /* (EFC) Write Page and Lock */
-#define AT91C_EFC_FCMD_EWP (0x3) /* (EFC) Erase Page and Write Page */
-#define AT91C_EFC_FCMD_EWPL (0x4) /* (EFC) Erase Page and Write Page then Lock */
-#define AT91C_EFC_FCMD_EA (0x5) /* (EFC) Erase All */
-/* cmd6 is not present in the at91sam4u4/2/1 data sheet table 19-2 */
-/* #define AT91C_EFC_FCMD_EPL (0x6) // (EFC) Erase plane? */
-#define AT91C_EFC_FCMD_EPA (0x7) /* (EFC) Erase pages */
-#define AT91C_EFC_FCMD_SLB (0x8) /* (EFC) Set Lock Bit */
-#define AT91C_EFC_FCMD_CLB (0x9) /* (EFC) Clear Lock Bit */
-#define AT91C_EFC_FCMD_GLB (0xA) /* (EFC) Get Lock Bit */
-#define AT91C_EFC_FCMD_SFB (0xB) /* (EFC) Set Fuse Bit */
-#define AT91C_EFC_FCMD_CFB (0xC) /* (EFC) Clear Fuse Bit */
-#define AT91C_EFC_FCMD_GFB (0xD) /* (EFC) Get Fuse Bit */
-#define AT91C_EFC_FCMD_STUI (0xE) /* (EFC) Start Read Unique ID */
-#define AT91C_EFC_FCMD_SPUI (0xF) /* (EFC) Stop Read Unique ID */
-
-#define offset_EFC_FMR 0
-#define offset_EFC_FCR 4
-#define offset_EFC_FSR 8
-#define offset_EFC_FRR 12
-
-extern struct flash_driver at91sam4_flash;
-
-static float _tomhz(uint32_t freq_hz)
-{
- float f;
-
- f = ((float)(freq_hz)) / 1000000.0;
- return f;
-}
-
-/* How the chip is configured. */
-struct sam4_cfg {
- uint32_t unique_id[4];
-
- uint32_t slow_freq;
- uint32_t rc_freq;
- uint32_t mainosc_freq;
- uint32_t plla_freq;
- uint32_t mclk_freq;
- uint32_t cpu_freq;
- uint32_t fclk_freq;
- uint32_t pclk0_freq;
- uint32_t pclk1_freq;
- uint32_t pclk2_freq;
-
-
-#define SAM4_CHIPID_CIDR (0x400E0740)
- uint32_t CHIPID_CIDR;
-#define SAM4_CHIPID_EXID (0x400E0744)
- uint32_t CHIPID_EXID;
-
-#define SAM4_PMC_BASE (0x400E0400)
-#define SAM4_PMC_SCSR (SAM4_PMC_BASE + 0x0008)
- uint32_t PMC_SCSR;
-#define SAM4_PMC_PCSR (SAM4_PMC_BASE + 0x0018)
- uint32_t PMC_PCSR;
-#define SAM4_CKGR_UCKR (SAM4_PMC_BASE + 0x001c)
- uint32_t CKGR_UCKR;
-#define SAM4_CKGR_MOR (SAM4_PMC_BASE + 0x0020)
- uint32_t CKGR_MOR;
-#define SAM4_CKGR_MCFR (SAM4_PMC_BASE + 0x0024)
- uint32_t CKGR_MCFR;
-#define SAM4_CKGR_PLLAR (SAM4_PMC_BASE + 0x0028)
- uint32_t CKGR_PLLAR;
-#define SAM4_PMC_MCKR (SAM4_PMC_BASE + 0x0030)
- uint32_t PMC_MCKR;
-#define SAM4_PMC_PCK0 (SAM4_PMC_BASE + 0x0040)
- uint32_t PMC_PCK0;
-#define SAM4_PMC_PCK1 (SAM4_PMC_BASE + 0x0044)
- uint32_t PMC_PCK1;
-#define SAM4_PMC_PCK2 (SAM4_PMC_BASE + 0x0048)
- uint32_t PMC_PCK2;
-#define SAM4_PMC_SR (SAM4_PMC_BASE + 0x0068)
- uint32_t PMC_SR;
-#define SAM4_PMC_IMR (SAM4_PMC_BASE + 0x006c)
- uint32_t PMC_IMR;
-#define SAM4_PMC_FSMR (SAM4_PMC_BASE + 0x0070)
- uint32_t PMC_FSMR;
-#define SAM4_PMC_FSPR (SAM4_PMC_BASE + 0x0074)
- uint32_t PMC_FSPR;
-};
-
-struct sam4_bank_private {
- int probed;
- /* DANGER: THERE ARE DRAGONS HERE.. */
- /* NOTE: If you add more 'ghost' pointers */
- /* be aware that you must *manually* update */
- /* these pointers in the function sam4_GetDetails() */
- /* See the comment "Here there be dragons" */
-
- /* so we can find the chip we belong to */
- struct sam4_chip *pChip;
- /* so we can find the original bank pointer */
- struct flash_bank *pBank;
- unsigned bank_number;
- uint32_t controller_address;
- uint32_t base_address;
- uint32_t flash_wait_states;
- bool present;
- unsigned size_bytes;
- unsigned nsectors;
- unsigned sector_size;
- unsigned page_size;
-};
-
-struct sam4_chip_details {
- /* THERE ARE DRAGONS HERE.. */
- /* note: If you add pointers here */
- /* be careful about them as they */
- /* may need to be updated inside */
- /* the function: "sam4_GetDetails() */
- /* which copy/overwrites the */
- /* 'runtime' copy of this structure */
- uint32_t chipid_cidr;
- const char *name;
-
- unsigned n_gpnvms;
-#define SAM4_N_NVM_BITS 3
- unsigned gpnvm[SAM4_N_NVM_BITS];
- unsigned total_flash_size;
- unsigned total_sram_size;
- unsigned n_banks;
-#define SAM4_MAX_FLASH_BANKS 2
- /* these are "initialized" from the global const data */
- struct sam4_bank_private bank[SAM4_MAX_FLASH_BANKS];
-};
-
-struct sam4_chip {
- struct sam4_chip *next;
- int probed;
-
- /* this is "initialized" from the global const structure */
- struct sam4_chip_details details;
- struct target *target;
- struct sam4_cfg cfg;
-};
-
-
-struct sam4_reg_list {
- uint32_t address; size_t struct_offset; const char *name;
- void (*explain_func)(struct sam4_chip *pInfo);
-};
-
-static struct sam4_chip *all_sam4_chips;
-
-static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
-{
- struct target *t;
- static struct sam4_chip *p;
-
- t = get_current_target(cmd_ctx);
- if (!t) {
- command_print(cmd_ctx, "No current target?");
- return NULL;
- }
-
- p = all_sam4_chips;
- if (!p) {
- /* this should not happen */
- /* the command is not registered until the chip is created? */
- command_print(cmd_ctx, "No SAM4 chips exist?");
- return NULL;
- }
-
- while (p) {
- if (p->target == t)
- return p;
- p = p->next;
- }
- command_print(cmd_ctx, "Cannot find SAM4 chip?");
- return NULL;
-}
-
-/*The actual sector size of the SAM4S flash memory is 65536 bytes. 16 sectors for a 1024KB device*/
-/*The lockregions are 8KB per lock region, with a 1024KB device having 128 lock regions. */
-/*For the best results, nsectors are thus set to the amount of lock regions, and the sector_size*/
-/*set to the lock region size. Page erases are used to erase 8KB sections when programming*/
-
-/* these are used to *initialize* the "pChip->details" structure. */
-static const struct sam4_chip_details all_sam4_details[] = {
-
- /* Start at91sam4e* series */
- /*atsam4e16e - LQFP144/LFBGA144*/
- {
- .chipid_cidr = 0xA3CC0CE0,
- .name = "at91sam4e16e",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 128 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
-
- /* Start at91sam4n* series */
- /*atsam4n8a - LQFP48/QFN48*/
- {
- .chipid_cidr = 0x293B0AE0,
- .name = "at91sam4n8a",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4n8b - LQFP64/QFN64*/
- {
- .chipid_cidr = 0x294B0AE0,
- .name = "at91sam4n8b",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4n8c - LQFP100/TFBGA100/VFBGA100*/
- {
- .chipid_cidr = 0x295B0AE0,
- .name = "at91sam4n8c",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4n16b - LQFP64/QFN64*/
- {
- .chipid_cidr = 0x29460CE0,
- .name = "at91sam4n16b",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 80 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4n16c - LQFP100/TFBGA100/VFBGA100*/
- {
- .chipid_cidr = 0x29560CE0,
- .name = "at91sam4n16c",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 80 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
-
- /* Start at91sam4s* series */
- /*atsam4s16c - LQFP100/BGA100*/
- {
- .chipid_cidr = 0x28AC0CE0,
- .name = "at91sam4s16c",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 128 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4s16b - LQFP64/QFN64*/
- {
- .chipid_cidr = 0x289C0CE0,
- .name = "at91sam4s16b",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 128 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4sa16b - LQFP64/QFN64*/
- {
- .chipid_cidr = 0x28970CE0,
- .name = "at91sam4sa16b",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 160 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4s16a - LQFP48/QFN48*/
- {
- .chipid_cidr = 0x288C0CE0,
- .name = "at91sam4s16a",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 128 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4s8c - LQFP100/BGA100*/
- {
- .chipid_cidr = 0x28AC0AE0,
- .name = "at91sam4s8c",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 128 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4s8b - LQFP64/BGA64*/
- {
- .chipid_cidr = 0x289C0AE0,
- .name = "at91sam4s8b",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 128 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- /*atsam4s8a - LQFP48/BGA48*/
- {
- .chipid_cidr = 0x288C0AE0,
- .name = "at91sam4s8a",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 128 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
-
- /*atsam4s4a - LQFP48/BGA48*/
- {
- .chipid_cidr = 0x288b09e0,
- .name = "at91sam4s4a",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = {*/
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 32,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
-
- /*at91sam4sd32c*/
- {
- .chipid_cidr = 0x29a70ee0,
- .name = "at91sam4sd32c",
- .total_flash_size = 2048 * 1024,
- .total_sram_size = 160 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
-
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
-
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_2048K_SD,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 1024 * 1024,
- .nsectors = 128,
- .sector_size = 8192,
- .page_size = 512,
- },
- },
- },
-
- /*at91sam4sd16c*/
- {
- .chipid_cidr = 0x29a70ce0,
- .name = "at91sam4sd16c",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 160 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
-
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_1024K_SD,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
- },
- },
-
- /*at91sam4sa16c*/
- {
- .chipid_cidr = 0x28a70ce0,
- .name = "at91sam4sa16c",
- .total_flash_size = 1024 * 1024,
- .total_sram_size = 160 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
-
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_1024K_SD,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
- },
- },
-
- /* at91samg53n19 */
- {
- .chipid_cidr = 0x247e0ae0,
- .name = "at91samg53n19",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 96 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
-
-/* .bank[0] = {*/
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 512 * 1024,
- .nsectors = 64,
- .sector_size = 8192,
- .page_size = 512,
- },
-/* .bank[1] = {*/
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- }
- },
-
- /* terminate */
- {
- .chipid_cidr = 0,
- .name = NULL,
- }
-};
-
-/* Globals above */
-/***********************************************************************
- **********************************************************************
- **********************************************************************
- **********************************************************************
- **********************************************************************
- **********************************************************************/
-/* *ATMEL* style code - from the SAM4 driver code */
-
-/**
- * Get the current status of the EEFC and
- * the value of some status bits (LOCKE, PROGE).
- * @param pPrivate - info about the bank
- * @param v - result goes here
- */
-static int EFC_GetStatus(struct sam4_bank_private *pPrivate, uint32_t *v)
-{
- int r;
- r = target_read_u32(pPrivate->pChip->target,
- pPrivate->controller_address + offset_EFC_FSR,
- v);
- LOG_DEBUG("Status: 0x%08x (lockerror: %d, cmderror: %d, ready: %d)",
- (unsigned int)(*v),
- ((unsigned int)((*v >> 2) & 1)),
- ((unsigned int)((*v >> 1) & 1)),
- ((unsigned int)((*v >> 0) & 1)));
-
- return r;
-}
-
-/**
- * Get the result of the last executed command.
- * @param pPrivate - info about the bank
- * @param v - result goes here
- */
-static int EFC_GetResult(struct sam4_bank_private *pPrivate, uint32_t *v)
-{
- int r;
- uint32_t rv;
- r = target_read_u32(pPrivate->pChip->target,
- pPrivate->controller_address + offset_EFC_FRR,
- &rv);
- if (v)
- *v = rv;
- LOG_DEBUG("Result: 0x%08x", ((unsigned int)(rv)));
- return r;
-}
-
-static int EFC_StartCommand(struct sam4_bank_private *pPrivate,
- unsigned command, unsigned argument)
-{
- uint32_t n, v;
- int r;
- int retry;
-
- retry = 0;
-do_retry:
-
- /* Check command & argument */
- switch (command) {
-
- case AT91C_EFC_FCMD_WP:
- case AT91C_EFC_FCMD_WPL:
- case AT91C_EFC_FCMD_EWP:
- case AT91C_EFC_FCMD_EWPL:
- /* case AT91C_EFC_FCMD_EPL: */
- case AT91C_EFC_FCMD_EPA:
- case AT91C_EFC_FCMD_SLB:
- case AT91C_EFC_FCMD_CLB:
- n = (pPrivate->size_bytes / pPrivate->page_size);
- if (argument >= n)
- LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
- break;
-
- case AT91C_EFC_FCMD_SFB:
- case AT91C_EFC_FCMD_CFB:
- if (argument >= pPrivate->pChip->details.n_gpnvms) {
- LOG_ERROR("*BUG*: Embedded flash has only %d GPNVMs",
- pPrivate->pChip->details.n_gpnvms);
- }
- break;
-
- case AT91C_EFC_FCMD_GETD:
- case AT91C_EFC_FCMD_EA:
- case AT91C_EFC_FCMD_GLB:
- case AT91C_EFC_FCMD_GFB:
- case AT91C_EFC_FCMD_STUI:
- case AT91C_EFC_FCMD_SPUI:
- if (argument != 0)
- LOG_ERROR("Argument is meaningless for cmd: %d", command);
- break;
- default:
- LOG_ERROR("Unknown command %d", command);
- break;
- }
-
- if (command == AT91C_EFC_FCMD_SPUI) {
- /* this is a very special situation. */
- /* Situation (1) - error/retry - see below */
- /* And we are being called recursively */
- /* Situation (2) - normal, finished reading unique id */
- } else {
- /* it should be "ready" */
- EFC_GetStatus(pPrivate, &v);
- if (v & 1) {
- /* then it is ready */
- /* we go on */
- } else {
- if (retry) {
- /* we have done this before */
- /* the controller is not responding. */
- LOG_ERROR("flash controller(%d) is not ready! Error",
- pPrivate->bank_number);
- return ERROR_FAIL;
- } else {
- retry++;
- LOG_ERROR("Flash controller(%d) is not ready, attempting reset",
- pPrivate->bank_number);
- /* we do that by issuing the *STOP* command */
- EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0);
- /* above is recursive, and further recursion is blocked by */
- /* if (command == AT91C_EFC_FCMD_SPUI) above */
- goto do_retry;
- }
- }
- }
-
- v = (0x5A << 24) | (argument << 8) | command;
- LOG_DEBUG("Command: 0x%08x", ((unsigned int)(v)));
- r = target_write_u32(pPrivate->pBank->target,
- pPrivate->controller_address + offset_EFC_FCR, v);
- if (r != ERROR_OK)
- LOG_DEBUG("Error Write failed");
- return r;
-}
-
-/**
- * Performs the given command and wait until its completion (or an error).
- * @param pPrivate - info about the bank
- * @param command - Command to perform.
- * @param argument - Optional command argument.
- * @param status - put command status bits here
- */
-static int EFC_PerformCommand(struct sam4_bank_private *pPrivate,
- unsigned command,
- unsigned argument,
- uint32_t *status)
-{
-
- int r;
- uint32_t v;
- long long ms_now, ms_end;
-
- /* default */
- if (status)
- *status = 0;
-
- r = EFC_StartCommand(pPrivate, command, argument);
- if (r != ERROR_OK)
- return r;
-
- ms_end = 10000 + timeval_ms();
-
- do {
- r = EFC_GetStatus(pPrivate, &v);
- if (r != ERROR_OK)
- return r;
- ms_now = timeval_ms();
- if (ms_now > ms_end) {
- /* error */
- LOG_ERROR("Command timeout");
- return ERROR_FAIL;
- }
- } while ((v & 1) == 0);
-
- /* error bits.. */
- if (status)
- *status = (v & 0x6);
- return ERROR_OK;
-
-}
-
-/**
- * Read the unique ID.
- * @param pPrivate - info about the bank
- * The unique ID is stored in the 'pPrivate' structure.
- */
-static int FLASHD_ReadUniqueID(struct sam4_bank_private *pPrivate)
-{
- int r;
- uint32_t v;
- int x;
- /* assume 0 */
- pPrivate->pChip->cfg.unique_id[0] = 0;
- pPrivate->pChip->cfg.unique_id[1] = 0;
- pPrivate->pChip->cfg.unique_id[2] = 0;
- pPrivate->pChip->cfg.unique_id[3] = 0;
-
- LOG_DEBUG("Begin");
- r = EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_STUI, 0);
- if (r < 0)
- return r;
-
- for (x = 0; x < 4; x++) {
- r = target_read_u32(pPrivate->pChip->target,
- pPrivate->pBank->base + (x * 4),
- &v);
- if (r < 0)
- return r;
- pPrivate->pChip->cfg.unique_id[x] = v;
- }
-
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0, NULL);
- LOG_DEBUG("End: R=%d, id = 0x%08x, 0x%08x, 0x%08x, 0x%08x",
- r,
- (unsigned int)(pPrivate->pChip->cfg.unique_id[0]),
- (unsigned int)(pPrivate->pChip->cfg.unique_id[1]),
- (unsigned int)(pPrivate->pChip->cfg.unique_id[2]),
- (unsigned int)(pPrivate->pChip->cfg.unique_id[3]));
- return r;
-
-}
-
-/**
- * Erases the entire flash.
- * @param pPrivate - the info about the bank.
- */
-static int FLASHD_EraseEntireBank(struct sam4_bank_private *pPrivate)
-{
- LOG_DEBUG("Here");
- return EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_EA, 0, NULL);
-}
-
-/**
- * Erases the entire flash.
- * @param pPrivate - the info about the bank.
- */
-static int FLASHD_ErasePages(struct sam4_bank_private *pPrivate,
- int firstPage,
- int numPages,
- uint32_t *status)
-{
- LOG_DEBUG("Here");
- uint8_t erasePages;
- switch (numPages) {
- case 4:
- erasePages = 0x00;
- break;
- case 8:
- erasePages = 0x01;
- break;
- case 16:
- erasePages = 0x02;
- break;
- case 32:
- erasePages = 0x03;
- break;
- default:
- erasePages = 0x00;
- break;
- }
-
- /* AT91C_EFC_FCMD_EPA
- * According to the datasheet FARG[15:2] defines the page from which
- * the erase will start.This page must be modulo 4, 8, 16 or 32
- * according to the number of pages to erase. FARG[1:0] defines the
- * number of pages to be erased. Previously (firstpage << 2) was used
- * to conform to this, seems it should not be shifted...
- */
- return EFC_PerformCommand(pPrivate,
- /* send Erase Page */
- AT91C_EFC_FCMD_EPA,
- (firstPage) | erasePages,
- status);
-}
-
-/**
- * Gets current GPNVM state.
- * @param pPrivate - info about the bank.
- * @param gpnvm - GPNVM bit index.
- * @param puthere - result stored here.
- */
-/* ------------------------------------------------------------------------------ */
-static int FLASHD_GetGPNVM(struct sam4_bank_private *pPrivate, unsigned gpnvm, unsigned *puthere)
-{
- uint32_t v;
- int r;
-
- LOG_DEBUG("Here");
- if (pPrivate->bank_number != 0) {
- LOG_ERROR("GPNVM only works with Bank0");
- return ERROR_FAIL;
- }
-
- if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
- LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
- gpnvm, pPrivate->pChip->details.n_gpnvms);
- return ERROR_FAIL;
- }
-
- /* Get GPNVMs status */
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GFB, 0, NULL);
- if (r != ERROR_OK) {
- LOG_ERROR("Failed");
- return r;
- }
-
- r = EFC_GetResult(pPrivate, &v);
-
- if (puthere) {
- /* Check if GPNVM is set */
- /* get the bit and make it a 0/1 */
- *puthere = (v >> gpnvm) & 1;
- }
-
- return r;
-}
-
-/**
- * Clears the selected GPNVM bit.
- * @param pPrivate info about the bank
- * @param gpnvm GPNVM index.
- * @returns 0 if successful; otherwise returns an error code.
- */
-static int FLASHD_ClrGPNVM(struct sam4_bank_private *pPrivate, unsigned gpnvm)
-{
- int r;
- unsigned v;
-
- LOG_DEBUG("Here");
- if (pPrivate->bank_number != 0) {
- LOG_ERROR("GPNVM only works with Bank0");
- return ERROR_FAIL;
- }
-
- if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
- LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
- gpnvm, pPrivate->pChip->details.n_gpnvms);
- return ERROR_FAIL;
- }
-
- r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v);
- if (r != ERROR_OK) {
- LOG_DEBUG("Failed: %d", r);
- return r;
- }
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CFB, gpnvm, NULL);
- LOG_DEBUG("End: %d", r);
- return r;
-}
-
-/**
- * Sets the selected GPNVM bit.
- * @param pPrivate info about the bank
- * @param gpnvm GPNVM index.
- */
-static int FLASHD_SetGPNVM(struct sam4_bank_private *pPrivate, unsigned gpnvm)
-{
- int r;
- unsigned v;
-
- if (pPrivate->bank_number != 0) {
- LOG_ERROR("GPNVM only works with Bank0");
- return ERROR_FAIL;
- }
-
- if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
- LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
- gpnvm, pPrivate->pChip->details.n_gpnvms);
- return ERROR_FAIL;
- }
-
- r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v);
- if (r != ERROR_OK)
- return r;
- if (v) {
- /* already set */
- r = ERROR_OK;
- } else {
- /* set it */
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SFB, gpnvm, NULL);
- }
- return r;
-}
-
-/**
- * Returns a bit field (at most 64) of locked regions within a page.
- * @param pPrivate info about the bank
- * @param v where to store locked bits
- */
-static int FLASHD_GetLockBits(struct sam4_bank_private *pPrivate, uint32_t *v)
-{
- int r;
- LOG_DEBUG("Here");
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GLB, 0, NULL);
- if (r == ERROR_OK) {
- EFC_GetResult(pPrivate, v);
- EFC_GetResult(pPrivate, v);
- EFC_GetResult(pPrivate, v);
- r = EFC_GetResult(pPrivate, v);
- }
- LOG_DEBUG("End: %d", r);
- return r;
-}
-
-/**
- * Unlocks all the regions in the given address range.
- * @param pPrivate info about the bank
- * @param start_sector first sector to unlock
- * @param end_sector last (inclusive) to unlock
- */
-
-static int FLASHD_Unlock(struct sam4_bank_private *pPrivate,
- unsigned start_sector,
- unsigned end_sector)
-{
- int r;
- uint32_t status;
- uint32_t pg;
- uint32_t pages_per_sector;
-
- pages_per_sector = pPrivate->sector_size / pPrivate->page_size;
-
- /* Unlock all pages */
- while (start_sector <= end_sector) {
- pg = start_sector * pages_per_sector;
-
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CLB, pg, &status);
- if (r != ERROR_OK)
- return r;
- start_sector++;
- }
-
- return ERROR_OK;
-}
-
-/**
- * Locks regions
- * @param pPrivate - info about the bank
- * @param start_sector - first sector to lock
- * @param end_sector - last sector (inclusive) to lock
- */
-static int FLASHD_Lock(struct sam4_bank_private *pPrivate,
- unsigned start_sector,
- unsigned end_sector)
-{
- uint32_t status;
- uint32_t pg;
- uint32_t pages_per_sector;
- int r;
-
- pages_per_sector = pPrivate->sector_size / pPrivate->page_size;
-
- /* Lock all pages */
- while (start_sector <= end_sector) {
- pg = start_sector * pages_per_sector;
-
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SLB, pg, &status);
- if (r != ERROR_OK)
- return r;
- start_sector++;
- }
- return ERROR_OK;
-}
-
-/****** END SAM4 CODE ********/
-
-/* begin helpful debug code */
-/* print the fieldname, the field value, in dec & hex, and return field value */
-static uint32_t sam4_reg_fieldname(struct sam4_chip *pChip,
- const char *regname,
- uint32_t value,
- unsigned shift,
- unsigned width)
-{
- uint32_t v;
- int hwidth, dwidth;
-
-
- /* extract the field */
- v = value >> shift;
- v = v & ((1 << width)-1);
- if (width <= 16) {
- hwidth = 4;
- dwidth = 5;
- } else {
- hwidth = 8;
- dwidth = 12;
- }
-
- /* show the basics */
- LOG_USER_N("\t%*s: %*" PRId32 " [0x%0*" PRIx32 "] ",
- REG_NAME_WIDTH, regname,
- dwidth, v,
- hwidth, v);
- return v;
-}
-
-static const char _unknown[] = "unknown";
-static const char *const eproc_names[] = {
- _unknown, /* 0 */
- "arm946es", /* 1 */
- "arm7tdmi", /* 2 */
- "cortex-m3", /* 3 */
- "arm920t", /* 4 */
- "arm926ejs", /* 5 */
- "cortex-a5", /* 6 */
- "cortex-m4", /* 7 */
- _unknown, /* 8 */
- _unknown, /* 9 */
- _unknown, /* 10 */
- _unknown, /* 11 */
- _unknown, /* 12 */
- _unknown, /* 13 */
- _unknown, /* 14 */
- _unknown, /* 15 */
-};
-
-#define nvpsize2 nvpsize /* these two tables are identical */
-static const char *const nvpsize[] = {
- "none", /* 0 */
- "8K bytes", /* 1 */
- "16K bytes", /* 2 */
- "32K bytes", /* 3 */
- _unknown, /* 4 */
- "64K bytes", /* 5 */
- _unknown, /* 6 */
- "128K bytes", /* 7 */
- _unknown, /* 8 */
- "256K bytes", /* 9 */
- "512K bytes", /* 10 */
- _unknown, /* 11 */
- "1024K bytes", /* 12 */
- _unknown, /* 13 */
- "2048K bytes", /* 14 */
- _unknown, /* 15 */
-};
-
-static const char *const sramsize[] = {
- "48K Bytes", /* 0 */
- "1K Bytes", /* 1 */
- "2K Bytes", /* 2 */
- "6K Bytes", /* 3 */
- "112K Bytes", /* 4 */
- "4K Bytes", /* 5 */
- "80K Bytes", /* 6 */
- "160K Bytes", /* 7 */
- "8K Bytes", /* 8 */
- "16K Bytes", /* 9 */
- "32K Bytes", /* 10 */
- "64K Bytes", /* 11 */
- "128K Bytes", /* 12 */
- "256K Bytes", /* 13 */
- "96K Bytes", /* 14 */
- "512K Bytes", /* 15 */
-
-};
-
-static const struct archnames { unsigned value; const char *name; } archnames[] = {
- { 0x19, "AT91SAM9xx Series" },
- { 0x29, "AT91SAM9XExx Series" },
- { 0x34, "AT91x34 Series" },
- { 0x37, "CAP7 Series" },
- { 0x39, "CAP9 Series" },
- { 0x3B, "CAP11 Series" },
- { 0x3C, "ATSAM4E" },
- { 0x40, "AT91x40 Series" },
- { 0x42, "AT91x42 Series" },
- { 0x43, "SAMG51 Series"
- },
- { 0x47, "SAMG53 Series"
- },
- { 0x55, "AT91x55 Series" },
- { 0x60, "AT91SAM7Axx Series" },
- { 0x61, "AT91SAM7AQxx Series" },
- { 0x63, "AT91x63 Series" },
- { 0x70, "AT91SAM7Sxx Series" },
- { 0x71, "AT91SAM7XCxx Series" },
- { 0x72, "AT91SAM7SExx Series" },
- { 0x73, "AT91SAM7Lxx Series" },
- { 0x75, "AT91SAM7Xxx Series" },
- { 0x76, "AT91SAM7SLxx Series" },
- { 0x80, "ATSAM3UxC Series (100-pin version)" },
- { 0x81, "ATSAM3UxE Series (144-pin version)" },
- { 0x83, "ATSAM3A/SAM4A xC Series (100-pin version)"},
- { 0x84, "ATSAM3X/SAM4X xC Series (100-pin version)"},
- { 0x85, "ATSAM3X/SAM4X xE Series (144-pin version)"},
- { 0x86, "ATSAM3X/SAM4X xG Series (208/217-pin version)" },
- { 0x88, "ATSAM3S/SAM4S xA Series (48-pin version)" },
- { 0x89, "ATSAM3S/SAM4S xB Series (64-pin version)" },
- { 0x8A, "ATSAM3S/SAM4S xC Series (100-pin version)"},
- { 0x92, "AT91x92 Series" },
- { 0x93, "ATSAM3NxA Series (48-pin version)" },
- { 0x94, "ATSAM3NxB Series (64-pin version)" },
- { 0x95, "ATSAM3NxC Series (100-pin version)" },
- { 0x98, "ATSAM3SDxA Series (48-pin version)" },
- { 0x99, "ATSAM3SDxB Series (64-pin version)" },
- { 0x9A, "ATSAM3SDxC Series (100-pin version)" },
- { 0xA5, "ATSAM5A" },
- { 0xF0, "AT75Cxx Series" },
- { -1, NULL },
-};
-
-static const char *const nvptype[] = {
- "rom", /* 0 */
- "romless or onchip flash", /* 1 */
- "embedded flash memory",/* 2 */
- "rom(nvpsiz) + embedded flash (nvpsiz2)", /* 3 */
- "sram emulating flash", /* 4 */
- _unknown, /* 5 */
- _unknown, /* 6 */
- _unknown, /* 7 */
-};
-
-static const char *_yes_or_no(uint32_t v)
-{
- if (v)
- return "YES";
- else
- return "NO";
-}
-
-static const char *const _rc_freq[] = {
- "4 MHz", "8 MHz", "12 MHz", "reserved"
-};
-
-static void sam4_explain_ckgr_mor(struct sam4_chip *pChip)
-{
- uint32_t v;
- uint32_t rcen;
-
- v = sam4_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1);
- LOG_USER("(main xtal enabled: %s)", _yes_or_no(v));
- v = sam4_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
- LOG_USER("(main osc bypass: %s)", _yes_or_no(v));
- rcen = sam4_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 3, 1);
- LOG_USER("(onchip RC-OSC enabled: %s)", _yes_or_no(rcen));
- v = sam4_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
- LOG_USER("(onchip RC-OSC freq: %s)", _rc_freq[v]);
-
- pChip->cfg.rc_freq = 0;
- if (rcen) {
- switch (v) {
- default:
- pChip->cfg.rc_freq = 0;
- break;
- case 0:
- pChip->cfg.rc_freq = 4 * 1000 * 1000;
- break;
- case 1:
- pChip->cfg.rc_freq = 8 * 1000 * 1000;
- break;
- case 2:
- pChip->cfg.rc_freq = 12 * 1000 * 1000;
- break;
- }
- }
-
- v = sam4_reg_fieldname(pChip, "MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8);
- LOG_USER("(startup clks, time= %f uSecs)",
- ((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq)));
- v = sam4_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1);
- LOG_USER("(mainosc source: %s)",
- v ? "external xtal" : "internal RC");
-
- v = sam4_reg_fieldname(pChip, "CFDEN", pChip->cfg.CKGR_MOR, 25, 1);
- LOG_USER("(clock failure enabled: %s)",
- _yes_or_no(v));
-}
-
-static void sam4_explain_chipid_cidr(struct sam4_chip *pChip)
-{
- int x;
- uint32_t v;
- const char *cp;
-
- sam4_reg_fieldname(pChip, "Version", pChip->cfg.CHIPID_CIDR, 0, 5);
- LOG_USER_N("\n");
-
- v = sam4_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3);
- LOG_USER("%s", eproc_names[v]);
-
- v = sam4_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4);
- LOG_USER("%s", nvpsize[v]);
-
- v = sam4_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4);
- LOG_USER("%s", nvpsize2[v]);
-
- v = sam4_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16, 4);
- LOG_USER("%s", sramsize[v]);
-
- v = sam4_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8);
- cp = _unknown;
- for (x = 0; archnames[x].name; x++) {
- if (v == archnames[x].value) {
- cp = archnames[x].name;
- break;
- }
- }
-
- LOG_USER("%s", cp);
-
- v = sam4_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3);
- LOG_USER("%s", nvptype[v]);
-
- v = sam4_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1);
- LOG_USER("(exists: %s)", _yes_or_no(v));
-}
-
-static void sam4_explain_ckgr_mcfr(struct sam4_chip *pChip)
-{
- uint32_t v;
-
- v = sam4_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1);
- LOG_USER("(main ready: %s)", _yes_or_no(v));
-
- v = sam4_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16);
-
- v = (v * pChip->cfg.slow_freq) / 16;
- pChip->cfg.mainosc_freq = v;
-
- LOG_USER("(%3.03f Mhz (%" PRIu32 ".%03" PRIu32 "khz slowclk)",
- _tomhz(v),
- (uint32_t)(pChip->cfg.slow_freq / 1000),
- (uint32_t)(pChip->cfg.slow_freq % 1000));
-}
-
-static void sam4_explain_ckgr_plla(struct sam4_chip *pChip)
-{
- uint32_t mula, diva;
-
- diva = sam4_reg_fieldname(pChip, "DIVA", pChip->cfg.CKGR_PLLAR, 0, 8);
- LOG_USER_N("\n");
- mula = sam4_reg_fieldname(pChip, "MULA", pChip->cfg.CKGR_PLLAR, 16, 11);
- LOG_USER_N("\n");
- pChip->cfg.plla_freq = 0;
- if (mula == 0)
- LOG_USER("\tPLLA Freq: (Disabled,mula = 0)");
- else if (diva == 0)
- LOG_USER("\tPLLA Freq: (Disabled,diva = 0)");
- else if (diva >= 1) {
- pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1) / diva);
- LOG_USER("\tPLLA Freq: %3.03f MHz",
- _tomhz(pChip->cfg.plla_freq));
- }
-}
-
-static void sam4_explain_mckr(struct sam4_chip *pChip)
-{
- uint32_t css, pres, fin = 0;
- int pdiv = 0;
- const char *cp = NULL;
-
- css = sam4_reg_fieldname(pChip, "CSS", pChip->cfg.PMC_MCKR, 0, 2);
- switch (css & 3) {
- case 0:
- fin = pChip->cfg.slow_freq;
- cp = "slowclk";
- break;
- case 1:
- fin = pChip->cfg.mainosc_freq;
- cp = "mainosc";
- break;
- case 2:
- fin = pChip->cfg.plla_freq;
- cp = "plla";
- break;
- case 3:
- if (pChip->cfg.CKGR_UCKR & (1 << 16)) {
- fin = 480 * 1000 * 1000;
- cp = "upll";
- } else {
- fin = 0;
- cp = "upll (*ERROR* UPLL is disabled)";
- }
- break;
- default:
- assert(0);
- break;
- }
-
- LOG_USER("%s (%3.03f Mhz)",
- cp,
- _tomhz(fin));
- pres = sam4_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3);
- switch (pres & 0x07) {
- case 0:
- pdiv = 1;
- cp = "selected clock";
- break;
- case 1:
- pdiv = 2;
- cp = "clock/2";
- break;
- case 2:
- pdiv = 4;
- cp = "clock/4";
- break;
- case 3:
- pdiv = 8;
- cp = "clock/8";
- break;
- case 4:
- pdiv = 16;
- cp = "clock/16";
- break;
- case 5:
- pdiv = 32;
- cp = "clock/32";
- break;
- case 6:
- pdiv = 64;
- cp = "clock/64";
- break;
- case 7:
- pdiv = 6;
- cp = "clock/6";
- break;
- default:
- assert(0);
- break;
- }
- LOG_USER("(%s)", cp);
- fin = fin / pdiv;
- /* sam4 has a *SINGLE* clock - */
- /* other at91 series parts have divisors for these. */
- pChip->cfg.cpu_freq = fin;
- pChip->cfg.mclk_freq = fin;
- pChip->cfg.fclk_freq = fin;
- LOG_USER("\t\tResult CPU Freq: %3.03f",
- _tomhz(fin));
-}
-
-#if 0
-static struct sam4_chip *target2sam4(struct target *pTarget)
-{
- struct sam4_chip *pChip;
-
- if (pTarget == NULL)
- return NULL;
-
- pChip = all_sam4_chips;
- while (pChip) {
- if (pChip->target == pTarget)
- break; /* return below */
- else
- pChip = pChip->next;
- }
- return pChip;
-}
-#endif
-
-static uint32_t *sam4_get_reg_ptr(struct sam4_cfg *pCfg, const struct sam4_reg_list *pList)
-{
- /* this function exists to help */
- /* keep funky offsetof() errors */
- /* and casting from causing bugs */
-
- /* By using prototypes - we can detect what would */
- /* be casting errors. */
-
- return (uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset);
-}
-
-
-#define SAM4_ENTRY(NAME, FUNC) { .address = SAM4_ ## NAME, .struct_offset = offsetof( \
- struct sam4_cfg, \
- NAME), # NAME, FUNC }
-static const struct sam4_reg_list sam4_all_regs[] = {
- SAM4_ENTRY(CKGR_MOR, sam4_explain_ckgr_mor),
- SAM4_ENTRY(CKGR_MCFR, sam4_explain_ckgr_mcfr),
- SAM4_ENTRY(CKGR_PLLAR, sam4_explain_ckgr_plla),
- SAM4_ENTRY(CKGR_UCKR, NULL),
- SAM4_ENTRY(PMC_FSMR, NULL),
- SAM4_ENTRY(PMC_FSPR, NULL),
- SAM4_ENTRY(PMC_IMR, NULL),
- SAM4_ENTRY(PMC_MCKR, sam4_explain_mckr),
- SAM4_ENTRY(PMC_PCK0, NULL),
- SAM4_ENTRY(PMC_PCK1, NULL),
- SAM4_ENTRY(PMC_PCK2, NULL),
- SAM4_ENTRY(PMC_PCSR, NULL),
- SAM4_ENTRY(PMC_SCSR, NULL),
- SAM4_ENTRY(PMC_SR, NULL),
- SAM4_ENTRY(CHIPID_CIDR, sam4_explain_chipid_cidr),
- SAM4_ENTRY(CHIPID_EXID, NULL),
- /* TERMINATE THE LIST */
- { .name = NULL }
-};
-#undef SAM4_ENTRY
-
-static struct sam4_bank_private *get_sam4_bank_private(struct flash_bank *bank)
-{
- return bank->driver_priv;
-}
-
-/**
- * Given a pointer to where it goes in the structure,
- * determine the register name, address from the all registers table.
- */
-static const struct sam4_reg_list *sam4_GetReg(struct sam4_chip *pChip, uint32_t *goes_here)
-{
- const struct sam4_reg_list *pReg;
-
- pReg = &(sam4_all_regs[0]);
- while (pReg->name) {
- uint32_t *pPossible;
-
- /* calculate where this one go.. */
- /* it is "possibly" this register. */
-
- pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
-
- /* well? Is it this register */
- if (pPossible == goes_here) {
- /* Jump for joy! */
- return pReg;
- }
-
- /* next... */
- pReg++;
- }
- /* This is *TOTAL*PANIC* - we are totally screwed. */
- LOG_ERROR("INVALID SAM4 REGISTER");
- return NULL;
-}
-
-static int sam4_ReadThisReg(struct sam4_chip *pChip, uint32_t *goes_here)
-{
- const struct sam4_reg_list *pReg;
- int r;
-
- pReg = sam4_GetReg(pChip, goes_here);
- if (!pReg)
- return ERROR_FAIL;
-
- r = target_read_u32(pChip->target, pReg->address, goes_here);
- if (r != ERROR_OK) {
- LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Err: %d",
- pReg->name, (unsigned)(pReg->address), r);
- }
- return r;
-}
-
-static int sam4_ReadAllRegs(struct sam4_chip *pChip)
-{
- int r;
- const struct sam4_reg_list *pReg;
-
- pReg = &(sam4_all_regs[0]);
- while (pReg->name) {
- r = sam4_ReadThisReg(pChip,
- sam4_get_reg_ptr(&(pChip->cfg), pReg));
- if (r != ERROR_OK) {
- LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Error: %d",
- pReg->name, ((unsigned)(pReg->address)), r);
- return r;
- }
- pReg++;
- }
-
- return ERROR_OK;
-}
-
-static int sam4_GetInfo(struct sam4_chip *pChip)
-{
- const struct sam4_reg_list *pReg;
- uint32_t regval;
-
- pReg = &(sam4_all_regs[0]);
- while (pReg->name) {
- /* display all regs */
- LOG_DEBUG("Start: %s", pReg->name);
- regval = *sam4_get_reg_ptr(&(pChip->cfg), pReg);
- LOG_USER("%*s: [0x%08" PRIx32 "] -> 0x%08" PRIx32,
- REG_NAME_WIDTH,
- pReg->name,
- pReg->address,
- regval);
- if (pReg->explain_func)
- (*(pReg->explain_func))(pChip);
- LOG_DEBUG("End: %s", pReg->name);
- pReg++;
- }
- LOG_USER(" rc-osc: %3.03f MHz", _tomhz(pChip->cfg.rc_freq));
- LOG_USER(" mainosc: %3.03f MHz", _tomhz(pChip->cfg.mainosc_freq));
- LOG_USER(" plla: %3.03f MHz", _tomhz(pChip->cfg.plla_freq));
- LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq));
- LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq));
-
- LOG_USER(" UniqueId: 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08"PRIx32,
- pChip->cfg.unique_id[0],
- pChip->cfg.unique_id[1],
- pChip->cfg.unique_id[2],
- pChip->cfg.unique_id[3]);
-
- return ERROR_OK;
-}
-
-static int sam4_protect_check(struct flash_bank *bank)
-{
- int r;
- uint32_t v[4] = {0};
- unsigned x;
- struct sam4_bank_private *pPrivate;
-
- LOG_DEBUG("Begin");
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- pPrivate = get_sam4_bank_private(bank);
- if (!pPrivate) {
- LOG_ERROR("no private for this bank?");
- return ERROR_FAIL;
- }
- if (!(pPrivate->probed))
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- r = FLASHD_GetLockBits(pPrivate, v);
- if (r != ERROR_OK) {
- LOG_DEBUG("Failed: %d", r);
- return r;
- }
-
- for (x = 0; x < pPrivate->nsectors; x++)
- bank->sectors[x].is_protected = (!!(v[x >> 5] & (1 << (x % 32))));
- LOG_DEBUG("Done");
- return ERROR_OK;
-}
-
-FLASH_BANK_COMMAND_HANDLER(sam4_flash_bank_command)
-{
- struct sam4_chip *pChip;
-
- pChip = all_sam4_chips;
-
- /* is this an existing chip? */
- while (pChip) {
- if (pChip->target == bank->target)
- break;
- pChip = pChip->next;
- }
-
- if (!pChip) {
- /* this is a *NEW* chip */
- pChip = calloc(1, sizeof(struct sam4_chip));
- if (!pChip) {
- LOG_ERROR("NO RAM!");
- return ERROR_FAIL;
- }
- pChip->target = bank->target;
- /* insert at head */
- pChip->next = all_sam4_chips;
- all_sam4_chips = pChip;
- pChip->target = bank->target;
- /* assumption is this runs at 32khz */
- pChip->cfg.slow_freq = 32768;
- pChip->probed = 0;
- }
-
- switch (bank->base) {
- default:
- LOG_ERROR("Address 0x%08x invalid bank address (try 0x%08x"
- "[at91sam4s series] )",
- ((unsigned int)(bank->base)),
- ((unsigned int)(FLASH_BANK_BASE_S)));
- return ERROR_FAIL;
- break;
-
- /* at91sam4s series only has bank 0*/
- /* at91sam4sd series has the same address for bank 0 (FLASH_BANK0_BASE_SD)*/
- case FLASH_BANK_BASE_S:
- bank->driver_priv = &(pChip->details.bank[0]);
- bank->bank_number = 0;
- pChip->details.bank[0].pChip = pChip;
- pChip->details.bank[0].pBank = bank;
- break;
-
- /* Bank 1 of at91sam4sd series */
- case FLASH_BANK1_BASE_1024K_SD:
- case FLASH_BANK1_BASE_2048K_SD:
- bank->driver_priv = &(pChip->details.bank[1]);
- bank->bank_number = 1;
- pChip->details.bank[1].pChip = pChip;
- pChip->details.bank[1].pBank = bank;
- break;
- }
-
- /* we initialize after probing. */
- return ERROR_OK;
-}
-
-static int sam4_GetDetails(struct sam4_bank_private *pPrivate)
-{
- const struct sam4_chip_details *pDetails;
- struct sam4_chip *pChip;
- struct flash_bank *saved_banks[SAM4_MAX_FLASH_BANKS];
- unsigned x;
-
- LOG_DEBUG("Begin");
- pDetails = all_sam4_details;
- while (pDetails->name) {
- /* Compare cidr without version bits */
- if (pDetails->chipid_cidr == (pPrivate->pChip->cfg.CHIPID_CIDR & 0xFFFFFFE0))
- break;
- else
- pDetails++;
- }
- if (pDetails->name == NULL) {
- LOG_ERROR("SAM4 ChipID 0x%08x not found in table (perhaps you can ID this chip?)",
- (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR));
- /* Help the victim, print details about the chip */
- LOG_INFO("SAM4 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows",
- pPrivate->pChip->cfg.CHIPID_CIDR);
- sam4_explain_chipid_cidr(pPrivate->pChip);
- return ERROR_FAIL;
- }
-
- /* DANGER: THERE ARE DRAGONS HERE */
-
- /* get our pChip - it is going */
- /* to be over-written shortly */
- pChip = pPrivate->pChip;
-
- /* Note that, in reality: */
- /* */
- /* pPrivate = &(pChip->details.bank[0]) */
- /* or pPrivate = &(pChip->details.bank[1]) */
- /* */
-
- /* save the "bank" pointers */
- for (x = 0; x < SAM4_MAX_FLASH_BANKS; x++)
- saved_banks[x] = pChip->details.bank[x].pBank;
-
- /* Overwrite the "details" structure. */
- memcpy(&(pPrivate->pChip->details),
- pDetails,
- sizeof(pPrivate->pChip->details));
-
- /* now fix the ghosted pointers */
- for (x = 0; x < SAM4_MAX_FLASH_BANKS; x++) {
- pChip->details.bank[x].pChip = pChip;
- pChip->details.bank[x].pBank = saved_banks[x];
- }
-
- /* update the *BANK*SIZE* */
-
- LOG_DEBUG("End");
- return ERROR_OK;
-}
-
-static int _sam4_probe(struct flash_bank *bank, int noise)
-{
- unsigned x;
- int r;
- struct sam4_bank_private *pPrivate;
-
-
- LOG_DEBUG("Begin: Bank: %d, Noise: %d", bank->bank_number, noise);
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- pPrivate = get_sam4_bank_private(bank);
- if (!pPrivate) {
- LOG_ERROR("Invalid/unknown bank number");
- return ERROR_FAIL;
- }
-
- r = sam4_ReadAllRegs(pPrivate->pChip);
- if (r != ERROR_OK)
- return r;
-
- LOG_DEBUG("Here");
- if (pPrivate->pChip->probed)
- r = sam4_GetInfo(pPrivate->pChip);
- else
- r = sam4_GetDetails(pPrivate);
- if (r != ERROR_OK)
- return r;
-
- /* update the flash bank size */
- for (x = 0; x < SAM4_MAX_FLASH_BANKS; x++) {
- if (bank->base == pPrivate->pChip->details.bank[x].base_address) {
- bank->size = pPrivate->pChip->details.bank[x].size_bytes;
- break;
- }
- }
-
- if (bank->sectors == NULL) {
- bank->sectors = calloc(pPrivate->nsectors, (sizeof((bank->sectors)[0])));
- if (bank->sectors == NULL) {
- LOG_ERROR("No memory!");
- return ERROR_FAIL;
- }
- bank->num_sectors = pPrivate->nsectors;
-
- for (x = 0; ((int)(x)) < bank->num_sectors; x++) {
- bank->sectors[x].size = pPrivate->sector_size;
- bank->sectors[x].offset = x * (pPrivate->sector_size);
- /* mark as unknown */
- bank->sectors[x].is_erased = -1;
- bank->sectors[x].is_protected = -1;
- }
- }
-
- pPrivate->probed = 1;
-
- r = sam4_protect_check(bank);
- if (r != ERROR_OK)
- return r;
-
- LOG_DEBUG("Bank = %d, nbanks = %d",
- pPrivate->bank_number, pPrivate->pChip->details.n_banks);
- if ((pPrivate->bank_number + 1) == pPrivate->pChip->details.n_banks) {
- /* read unique id, */
- /* it appears to be associated with the *last* flash bank. */
- FLASHD_ReadUniqueID(pPrivate);
- }
-
- return r;
-}
-
-static int sam4_probe(struct flash_bank *bank)
-{
- return _sam4_probe(bank, 1);
-}
-
-static int sam4_auto_probe(struct flash_bank *bank)
-{
- return _sam4_probe(bank, 0);
-}
-
-static int sam4_erase(struct flash_bank *bank, int first, int last)
-{
- struct sam4_bank_private *pPrivate;
- int r;
- int i;
- int pageCount;
- /*16 pages equals 8KB - Same size as a lock region*/
- pageCount = 16;
- uint32_t status;
-
- LOG_DEBUG("Here");
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- r = sam4_auto_probe(bank);
- if (r != ERROR_OK) {
- LOG_DEBUG("Here,r=%d", r);
- return r;
- }
-
- pPrivate = get_sam4_bank_private(bank);
- if (!(pPrivate->probed))
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if ((first == 0) && ((last + 1) == ((int)(pPrivate->nsectors)))) {
- /* whole chip */
- LOG_DEBUG("Here");
- return FLASHD_EraseEntireBank(pPrivate);
- }
- LOG_INFO("sam4 does not auto-erase while programming (Erasing relevant sectors)");
- LOG_INFO("sam4 First: 0x%08x Last: 0x%08x", (unsigned int)(first), (unsigned int)(last));
- for (i = first; i <= last; i++) {
- /*16 pages equals 8KB - Same size as a lock region*/
- r = FLASHD_ErasePages(pPrivate, (i * pageCount), pageCount, &status);
- LOG_INFO("Erasing sector: 0x%08x", (unsigned int)(i));
- if (r != ERROR_OK)
- LOG_ERROR("SAM4: Error performing Erase page @ lock region number %d",
- (unsigned int)(i));
- if (status & (1 << 2)) {
- LOG_ERROR("SAM4: Lock Region %d is locked", (unsigned int)(i));
- return ERROR_FAIL;
- }
- if (status & (1 << 1)) {
- LOG_ERROR("SAM4: Flash Command error @lock region %d", (unsigned int)(i));
- return ERROR_FAIL;
- }
- }
-
- return ERROR_OK;
-}
-
-static int sam4_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct sam4_bank_private *pPrivate;
- int r;
-
- LOG_DEBUG("Here");
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- pPrivate = get_sam4_bank_private(bank);
- if (!(pPrivate->probed))
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (set)
- r = FLASHD_Lock(pPrivate, (unsigned)(first), (unsigned)(last));
- else
- r = FLASHD_Unlock(pPrivate, (unsigned)(first), (unsigned)(last));
- LOG_DEBUG("End: r=%d", r);
-
- return r;
-
-}
-
-static int sam4_page_read(struct sam4_bank_private *pPrivate, unsigned pagenum, uint8_t *buf)
-{
- uint32_t adr;
- int r;
-
- adr = pagenum * pPrivate->page_size;
- adr = adr + pPrivate->base_address;
-
- r = target_read_memory(pPrivate->pChip->target,
- adr,
- 4, /* THIS*MUST*BE* in 32bit values */
- pPrivate->page_size / 4,
- buf);
- if (r != ERROR_OK)
- LOG_ERROR("SAM4: Flash program failed to read page phys address: 0x%08x",
- (unsigned int)(adr));
- return r;
-}
-
-static int sam4_page_write(struct sam4_bank_private *pPrivate, unsigned pagenum, const uint8_t *buf)
-{
- uint32_t adr;
- uint32_t status;
- uint32_t fmr; /* EEFC Flash Mode Register */
- int r;
-
- adr = pagenum * pPrivate->page_size;
- adr = (adr + pPrivate->base_address);
-
- /* Get flash mode register value */
- r = target_read_u32(pPrivate->pChip->target, pPrivate->controller_address, &fmr);
- if (r != ERROR_OK)
- LOG_DEBUG("Error Read failed: read flash mode register");
-
- /* Clear flash wait state field */
- fmr &= 0xfffff0ff;
-
- /* set FWS (flash wait states) field in the FMR (flash mode register) */
- fmr |= (pPrivate->flash_wait_states << 8);
-
- LOG_DEBUG("Flash Mode: 0x%08x", ((unsigned int)(fmr)));
- r = target_write_u32(pPrivate->pBank->target, pPrivate->controller_address, fmr);
- if (r != ERROR_OK)
- LOG_DEBUG("Error Write failed: set flash mode register");
-
- /* 1st sector 8kBytes - page 0 - 15*/
- /* 2nd sector 8kBytes - page 16 - 30*/
- /* 3rd sector 48kBytes - page 31 - 127*/
- LOG_DEBUG("Wr Page %u @ phys address: 0x%08x", pagenum, (unsigned int)(adr));
- r = target_write_memory(pPrivate->pChip->target,
- adr,
- 4, /* THIS*MUST*BE* in 32bit values */
- pPrivate->page_size / 4,
- buf);
- if (r != ERROR_OK) {
- LOG_ERROR("SAM4: Failed to write (buffer) page at phys address 0x%08x",
- (unsigned int)(adr));
- return r;
- }
-
- r = EFC_PerformCommand(pPrivate,
- /* send Erase & Write Page */
- AT91C_EFC_FCMD_WP, /*AT91C_EFC_FCMD_EWP only works on first two 8kb sectors*/
- pagenum,
- &status);
-
- if (r != ERROR_OK)
- LOG_ERROR("SAM4: Error performing Write page @ phys address 0x%08x",
- (unsigned int)(adr));
- if (status & (1 << 2)) {
- LOG_ERROR("SAM4: Page @ Phys address 0x%08x is locked", (unsigned int)(adr));
- return ERROR_FAIL;
- }
- if (status & (1 << 1)) {
- LOG_ERROR("SAM4: Flash Command error @phys address 0x%08x", (unsigned int)(adr));
- return ERROR_FAIL;
- }
- return ERROR_OK;
-}
-
-static int sam4_write(struct flash_bank *bank,
- const uint8_t *buffer,
- uint32_t offset,
- uint32_t count)
-{
- int n;
- unsigned page_cur;
- unsigned page_end;
- int r;
- unsigned page_offset;
- struct sam4_bank_private *pPrivate;
- uint8_t *pagebuffer;
-
- /* incase we bail further below, set this to null */
- pagebuffer = NULL;
-
- /* ignore dumb requests */
- if (count == 0) {
- r = ERROR_OK;
- goto done;
- }
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- r = ERROR_TARGET_NOT_HALTED;
- goto done;
- }
-
- pPrivate = get_sam4_bank_private(bank);
- if (!(pPrivate->probed)) {
- r = ERROR_FLASH_BANK_NOT_PROBED;
- goto done;
- }
-
- if ((offset + count) > pPrivate->size_bytes) {
- LOG_ERROR("Flash write error - past end of bank");
- LOG_ERROR(" offset: 0x%08x, count 0x%08x, BankEnd: 0x%08x",
- (unsigned int)(offset),
- (unsigned int)(count),
- (unsigned int)(pPrivate->size_bytes));
- r = ERROR_FAIL;
- goto done;
- }
-
- pagebuffer = malloc(pPrivate->page_size);
- if (!pagebuffer) {
- LOG_ERROR("No memory for %d Byte page buffer", (int)(pPrivate->page_size));
- r = ERROR_FAIL;
- goto done;
- }
-
- /* what page do we start & end in? */
- page_cur = offset / pPrivate->page_size;
- page_end = (offset + count - 1) / pPrivate->page_size;
-
- LOG_DEBUG("Offset: 0x%08x, Count: 0x%08x", (unsigned int)(offset), (unsigned int)(count));
- LOG_DEBUG("Page start: %d, Page End: %d", (int)(page_cur), (int)(page_end));
-
- /* Special case: all one page */
- /* */
- /* Otherwise: */
- /* (1) non-aligned start */
- /* (2) body pages */
- /* (3) non-aligned end. */
-
- /* Handle special case - all one page. */
- if (page_cur == page_end) {
- LOG_DEBUG("Special case, all in one page");
- r = sam4_page_read(pPrivate, page_cur, pagebuffer);
- if (r != ERROR_OK)
- goto done;
-
- page_offset = (offset & (pPrivate->page_size-1));
- memcpy(pagebuffer + page_offset,
- buffer,
- count);
-
- r = sam4_page_write(pPrivate, page_cur, pagebuffer);
- if (r != ERROR_OK)
- goto done;
- r = ERROR_OK;
- goto done;
- }
-
- /* non-aligned start */
- page_offset = offset & (pPrivate->page_size - 1);
- if (page_offset) {
- LOG_DEBUG("Not-Aligned start");
- /* read the partial */
- r = sam4_page_read(pPrivate, page_cur, pagebuffer);
- if (r != ERROR_OK)
- goto done;
-
- /* over-write with new data */
- n = (pPrivate->page_size - page_offset);
- memcpy(pagebuffer + page_offset,
- buffer,
- n);
-
- r = sam4_page_write(pPrivate, page_cur, pagebuffer);
- if (r != ERROR_OK)
- goto done;
-
- count -= n;
- offset += n;
- buffer += n;
- page_cur++;
- }
-
- /* By checking that offset is correct here, we also
- fix a clang warning */
- assert(offset % pPrivate->page_size == 0);
-
- /* intermediate large pages */
- /* also - the final *terminal* */
- /* if that terminal page is a full page */
- LOG_DEBUG("Full Page Loop: cur=%d, end=%d, count = 0x%08x",
- (int)page_cur, (int)page_end, (unsigned int)(count));
-
- while ((page_cur < page_end) &&
- (count >= pPrivate->page_size)) {
- r = sam4_page_write(pPrivate, page_cur, buffer);
- if (r != ERROR_OK)
- goto done;
- count -= pPrivate->page_size;
- buffer += pPrivate->page_size;
- page_cur += 1;
- }
-
- /* terminal partial page? */
- if (count) {
- LOG_DEBUG("Terminal partial page, count = 0x%08x", (unsigned int)(count));
- /* we have a partial page */
- r = sam4_page_read(pPrivate, page_cur, pagebuffer);
- if (r != ERROR_OK)
- goto done;
- /* data goes at start */
- memcpy(pagebuffer, buffer, count);
- r = sam4_page_write(pPrivate, page_cur, pagebuffer);
- if (r != ERROR_OK)
- goto done;
- }
- LOG_DEBUG("Done!");
- r = ERROR_OK;
-done:
- if (pagebuffer)
- free(pagebuffer);
- return r;
-}
-
-COMMAND_HANDLER(sam4_handle_info_command)
-{
- struct sam4_chip *pChip;
- pChip = get_current_sam4(CMD_CTX);
- if (!pChip)
- return ERROR_OK;
-
- unsigned x;
- int r;
-
- /* bank0 must exist before we can do anything */
- if (pChip->details.bank[0].pBank == NULL) {
- x = 0;
-need_define:
- command_print(CMD_CTX,
- "Please define bank %d via command: flash bank %s ... ",
- x,
- at91sam4_flash.name);
- return ERROR_FAIL;
- }
-
- /* if bank 0 is not probed, then probe it */
- if (!(pChip->details.bank[0].probed)) {
- r = sam4_auto_probe(pChip->details.bank[0].pBank);
- if (r != ERROR_OK)
- return ERROR_FAIL;
- }
- /* above guarantees the "chip details" structure is valid */
- /* and thus, bank private areas are valid */
- /* and we have a SAM4 chip, what a concept! */
-
- /* auto-probe other banks, 0 done above */
- for (x = 1; x < SAM4_MAX_FLASH_BANKS; x++) {
- /* skip banks not present */
- if (!(pChip->details.bank[x].present))
- continue;
-
- if (pChip->details.bank[x].pBank == NULL)
- goto need_define;
-
- if (pChip->details.bank[x].probed)
- continue;
-
- r = sam4_auto_probe(pChip->details.bank[x].pBank);
- if (r != ERROR_OK)
- return r;
- }
-
- r = sam4_GetInfo(pChip);
- if (r != ERROR_OK) {
- LOG_DEBUG("Sam4Info, Failed %d", r);
- return r;
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(sam4_handle_gpnvm_command)
-{
- unsigned x, v;
- int r, who;
- struct sam4_chip *pChip;
-
- pChip = get_current_sam4(CMD_CTX);
- if (!pChip)
- return ERROR_OK;
-
- if (pChip->target->state != TARGET_HALTED) {
- LOG_ERROR("sam4 - target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (pChip->details.bank[0].pBank == NULL) {
- command_print(CMD_CTX, "Bank0 must be defined first via: flash bank %s ...",
- at91sam4_flash.name);
- return ERROR_FAIL;
- }
- if (!pChip->details.bank[0].probed) {
- r = sam4_auto_probe(pChip->details.bank[0].pBank);
- if (r != ERROR_OK)
- return r;
- }
-
- switch (CMD_ARGC) {
- default:
- return ERROR_COMMAND_SYNTAX_ERROR;
- break;
- case 0:
- goto showall;
- break;
- case 1:
- who = -1;
- break;
- case 2:
- if ((0 == strcmp(CMD_ARGV[0], "show")) && (0 == strcmp(CMD_ARGV[1], "all")))
- who = -1;
- else {
- uint32_t v32;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], v32);
- who = v32;
- }
- break;
- }
-
- if (0 == strcmp("show", CMD_ARGV[0])) {
- if (who == -1) {
-showall:
- r = ERROR_OK;
- for (x = 0; x < pChip->details.n_gpnvms; x++) {
- r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v);
- if (r != ERROR_OK)
- break;
- command_print(CMD_CTX, "sam4-gpnvm%u: %u", x, v);
- }
- return r;
- }
- if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) {
- r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v);
- command_print(CMD_CTX, "sam4-gpnvm%u: %u", who, v);
- return r;
- } else {
- command_print(CMD_CTX, "sam4-gpnvm invalid GPNVM: %u", who);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- }
-
- if (who == -1) {
- command_print(CMD_CTX, "Missing GPNVM number");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (0 == strcmp("set", CMD_ARGV[0]))
- r = FLASHD_SetGPNVM(&(pChip->details.bank[0]), who);
- else if ((0 == strcmp("clr", CMD_ARGV[0])) ||
- (0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */
- r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who);
- else {
- command_print(CMD_CTX, "Unknown command: %s", CMD_ARGV[0]);
- r = ERROR_COMMAND_SYNTAX_ERROR;
- }
- return r;
-}
-
-COMMAND_HANDLER(sam4_handle_slowclk_command)
-{
- struct sam4_chip *pChip;
-
- pChip = get_current_sam4(CMD_CTX);
- if (!pChip)
- return ERROR_OK;
-
- switch (CMD_ARGC) {
- case 0:
- /* show */
- break;
- case 1:
- {
- /* set */
- uint32_t v;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v);
- if (v > 200000) {
- /* absurd slow clock of 200Khz? */
- command_print(CMD_CTX, "Absurd/illegal slow clock freq: %d\n", (int)(v));
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- pChip->cfg.slow_freq = v;
- break;
- }
- default:
- /* error */
- command_print(CMD_CTX, "Too many parameters");
- return ERROR_COMMAND_SYNTAX_ERROR;
- break;
- }
- command_print(CMD_CTX, "Slowclk freq: %d.%03dkhz",
- (int)(pChip->cfg.slow_freq / 1000),
- (int)(pChip->cfg.slow_freq % 1000));
- return ERROR_OK;
-}
-
-static const struct command_registration at91sam4_exec_command_handlers[] = {
- {
- .name = "gpnvm",
- .handler = sam4_handle_gpnvm_command,
- .mode = COMMAND_EXEC,
- .usage = "[('clr'|'set'|'show') bitnum]",
- .help = "Without arguments, shows all bits in the gpnvm "
- "register. Otherwise, clears, sets, or shows one "
- "General Purpose Non-Volatile Memory (gpnvm) bit.",
- },
- {
- .name = "info",
- .handler = sam4_handle_info_command,
- .mode = COMMAND_EXEC,
- .help = "Print information about the current at91sam4 chip"
- "and its flash configuration.",
- },
- {
- .name = "slowclk",
- .handler = sam4_handle_slowclk_command,
- .mode = COMMAND_EXEC,
- .usage = "[clock_hz]",
- .help = "Display or set the slowclock frequency "
- "(default 32768 Hz).",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration at91sam4_command_handlers[] = {
- {
- .name = "at91sam4",
- .mode = COMMAND_ANY,
- .help = "at91sam4 flash command group",
- .usage = "",
- .chain = at91sam4_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver at91sam4_flash = {
- .name = "at91sam4",
- .commands = at91sam4_command_handlers,
- .flash_bank_command = sam4_flash_bank_command,
- .erase = sam4_erase,
- .protect = sam4_protect,
- .write = sam4_write,
- .read = default_flash_read,
- .probe = sam4_probe,
- .auto_probe = sam4_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = sam4_protect_check,
-};
[04/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/delay.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/delay.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/delay.h
deleted file mode 100755
index 59fb49f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/delay.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef __DELAY_H
-#define __DELAY_H
-
-#include <stdint.h>
-
-#define NOP { __asm nop __endasm; }
-
-void delay_5us(void);
-void delay_1ms(void);
-
-void delay_us(uint16_t delay);
-void delay_ms(uint16_t delay);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/io.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/io.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/io.h
deleted file mode 100755
index 8077d32..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/io.h
+++ /dev/null
@@ -1,124 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef __IO_H
-#define __IO_H
-
-#include "reg_ezusb.h"
-
-/***************************************************************************
- * JTAG Signals: *
- ***************************************************************************
- * TMS ....... Test Mode Select *
- * TCK ....... Test Clock *
- * TDI ....... Test Data Input (from device point of view, not JTAG *
- * adapter point of view!) *
- * TDO ....... Test Data Output (from device point of view, not JTAG *
- * adapter point of view!) *
- * TRST ...... Test Reset: Used to reset the TAP Finite State Machine *
- * into the Test Logic Reset state *
- * RTCK ...... Return Test Clock *
- * OCDSE ..... Enable/Disable OCDS interface (Infineon specific) - shared *
- * with /JEN *
- * TRAP ...... Trap Condition (Infineon specific) - shared with TSTAT *
- * BRKIN ..... Hardware Break-In (Infineon specific) *
- * BRKOUT .... Hardware Break-Out (Infineon specific) *
- * /JEN ...... JTAG-Enable (STMicroelectronics specific) - shared *
- * with OCDSE *
- * TSTAT ..... JTAG ISP Status (STMicroelectronics specific) - shared *
- * with TRAP *
- * RESET ..... Chip Reset (STMicroelectronics specific) *
- * /TERR ..... JTAG ISP Error (STMicroelectronics specific) - shared *
- * with BRKOUT *
- ***************************************************************************/
-
-/* PORT A */
-#define PIN_U_OE OUTA0
-/* PA1 Not Connected */
-#define PIN_OE OUTA2
-/* PA3 Not Connected */
-#define PIN_RUN_LED OUTA4
-#define PIN_TDO PINA5
-#define PIN_BRKOUT PINA6
-#define PIN_COM_LED OUTA7
-
-/* PORT B */
-#define PIN_TDI OUTB0
-#define PIN_TMS OUTB1
-#define PIN_TCK OUTB2
-#define PIN_TRST OUTB3
-#define PIN_BRKIN OUTB4
-#define PIN_RESET OUTB5
-#define PIN_OCDSE OUTB6
-#define PIN_TRAP PINB7
-
-/* JTAG Signals with direction 'OUT' on port B */
-#define MASK_PORTB_DIRECTION_OUT (PIN_TDI | PIN_TMS | PIN_TCK | PIN_TRST | PIN_BRKIN | PIN_RESET | PIN_OCDSE)
-
-/* PORT C */
-#define PIN_RXD0 PINC0
-#define PIN_TXD0 OUTC1
-#define PIN_RESET_2 PINC2
-/* PC3 Not Connecte */
-/* PC4 Not Connected */
-#define PIN_RTCK PINC5
-#define PIN_WR OUTC6
-/* PC7 Not Connected */
-
-/* LED Macros */
-#define SET_RUN_LED() (OUTA &= ~PIN_RUN_LED)
-#define CLEAR_RUN_LED() (OUTA |= PIN_RUN_LED)
-
-#define SET_COM_LED() (OUTA &= ~PIN_COM_LED)
-#define CLEAR_COM_LED() (OUTA |= PIN_COM_LED)
-
-/* JTAG Pin Macros */
-#define GET_TMS() (PINSB & PIN_TMS)
-#define GET_TCK() (PINSB & PIN_TCK)
-
-#define GET_TDO() (PINSA & PIN_TDO)
-#define GET_BRKOUT() (PINSA & PIN_BRKOUT)
-#define GET_TRAP() (PINSB & PIN_TRAP)
-#define GET_RTCK() (PINSC & PIN_RTCK)
-
-#define SET_TMS_HIGH() (OUTB |= PIN_TMS)
-#define SET_TMS_LOW() (OUTB &= ~PIN_TMS)
-
-#define SET_TCK_HIGH() (OUTB |= PIN_TCK)
-#define SET_TCK_LOW() (OUTB &= ~PIN_TCK)
-
-#define SET_TDI_HIGH() (OUTB |= PIN_TDI)
-#define SET_TDI_LOW() (OUTB &= ~PIN_TDI)
-
-/* TRST and RESET are low-active and inverted by hardware. SET_HIGH de-asserts
- * the signal (enabling reset), SET_LOW asserts the signal (disabling reset) */
-#define SET_TRST_HIGH() (OUTB |= PIN_TRST)
-#define SET_TRST_LOW() (OUTB &= ~PIN_TRST)
-
-#define SET_RESET_HIGH() (OUTB |= PIN_RESET)
-#define SET_RESET_LOW() (OUTB &= ~PIN_RESET)
-
-#define SET_OCDSE_HIGH() (OUTB |= PIN_OCDSE)
-#define SET_OCDSE_LOW() (OUTB &= ~PIN_OCDSE)
-
-#define SET_BRKIN_HIGH() (OUTB |= PIN_BRKIN)
-#define SET_BRKIN_LOW() (OUTB &= ~PIN_BRKIN)
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/jtag.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/jtag.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/jtag.h
deleted file mode 100755
index ee2457e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/jtag.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef __JTAG_H
-#define __JTAG_H
-
-#include <stdint.h>
-
-#define NOP { __asm nop __endasm; }
-
-void jtag_scan_in(uint8_t out_offset, uint8_t in_offset);
-void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset);
-
-void jtag_scan_out(uint8_t out_offset);
-void jtag_slow_scan_out(uint8_t out_offset);
-
-void jtag_scan_io(uint8_t out_offset, uint8_t in_offset);
-void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset);
-
-void jtag_clock_tck(uint16_t count);
-void jtag_slow_clock_tck(uint16_t count);
-void jtag_clock_tms(uint8_t count, uint8_t sequence);
-void jtag_slow_clock_tms(uint8_t count, uint8_t sequence);
-
-uint16_t jtag_get_signals(void);
-void jtag_set_signals(uint8_t low, uint8_t high);
-
-void jtag_configure_tck_delay(uint8_t scan_in, uint8_t scan_out,
- uint8_t scan_io, uint8_t tck, uint8_t tms);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/main.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/main.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/main.h
deleted file mode 100755
index 5f7418f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/main.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef __MAIN_H
-#define __MAIN_H
-
-void io_init(void);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/msgtypes.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/msgtypes.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/msgtypes.h
deleted file mode 100755
index 9dbbedd..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/msgtypes.h
+++ /dev/null
@@ -1,191 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/**
- * @file
- * Definition of the commands supported by the OpenULINK firmware.
- *
- * Basically, two types of commands can be distinguished:
- * - Commands with fixed payload size
- * - Commands with variable payload size
- *
- * SCAN commands (in all variations) carry payloads of variable size, all
- * other commands carry payloads of fixed size.
- *
- * In the case of SCAN commands, the payload size (n) is calculated by
- * dividing the scan_size_bits variable by 8, rounding up the result.
- *
- * Offset zero always contains the command ID.
- *
- ****************************************************************************
- * CMD_SCAN_IN, CMD_SLOW_SCAN_IN: *
- * *
- * OUT: *
- * offset 1: scan_size_bytes *
- * offset 2: bits_last_byte *
- * offset 3: tms_count_start + tms_count_end *
- * offset 4: tms_sequence_start *
- * offset 5: tms_sequence_end *
- * *
- * IN: *
- * offset 0..n: TDO data *
- ****************************************************************************
- * CMD_SCAN_OUT, CMD_SLOW_SCAN_OUT: *
- * *
- * OUT: *
- * offset 1: scan_size_bytes *
- * offset 2: bits_last_byte *
- * offset 3: tms_count_start + tms_count_end *
- * offset 4: tms_sequence_start *
- * offset 5: tms_sequence_end *
- * offset 6..x: TDI data *
- ****************************************************************************
- * CMD_SCAN_IO, CMD_SLOW_SCAN_IO: *
- * *
- * OUT: *
- * offset 1: scan_size_bytes *
- * offset 2: bits_last_byte *
- * offset 3: tms_count_start + tms_count_end *
- * offset 4: tms_sequence_start *
- * offset 5: tms_sequence_end *
- * offset 6..x: TDI data *
- * *
- * IN: *
- * offset 0..n: TDO data *
- ****************************************************************************
- * CMD_CLOCK_TMS, CMD_SLOW_CLOCK_TMS: *
- * *
- * OUT: *
- * offset 1: tms_count *
- * offset 2: tms_sequence *
- ****************************************************************************
- * CMD_CLOCK_TCK, CMD_SLOW_CLOCK_TCK: *
- * *
- * OUT: *
- * offset 1: low byte of tck_count *
- * offset 2: high byte of tck_count *
- ****************************************************************************
- * CMD_CLOCK_SLEEP_US: *
- * *
- * OUT: *
- * offset 1: low byte of sleep_us *
- * offset 2: high byte of sleep_us *
- ****************************************************************************
- * CMD_CLOCK_SLEEP_MS: *
- * *
- * OUT: *
- * offset 1: low byte of sleep_ms *
- * offset 2: high byte of sleep_ms *
- ****************************************************************************
- * CMD_GET_SIGNALS: *
- * *
- * IN: *
- * offset 0: current state of input signals *
- * offset 1: current state of output signals *
- ****************************************************************************
- * CMD_SET_SIGNALS: *
- * *
- * OUT: *
- * offset 1: signals that should be de-asserted *
- * offset 2: signals that should be asserted *
- ****************************************************************************
- * CMD_CONFIGURE_TCK_FREQ: *
- * *
- * OUT: *
- * offset 1: delay value for scan_in function *
- * offset 2: delay value for scan_out function *
- * offset 3: delay value for scan_io function *
- * offset 4: delay value for clock_tck function *
- * offset 5: delay value for clock_tms function *
- ****************************************************************************
- * CMD_SET_LEDS: *
- * *
- * OUT: *
- * offset 1: LED states: *
- * Bit 0: turn COM LED on *
- * Bit 1: turn RUN LED on *
- * Bit 2: turn COM LED off *
- * Bit 3: turn RUN LED off *
- * Bits 7..4: Reserved *
- ****************************************************************************
- * CMD_TEST: *
- * *
- * OUT: *
- * offset 1: unused dummy value *
- ****************************************************************************
- */
-
-#ifndef __MSGTYPES_H
-#define __MSGTYPES_H
-
-/*
- * Command IDs:
- *
- * Bits 7..6: Reserved, should always be zero
- * Bits 5..0: Command ID. There are 62 usable IDs. Of this 63 available IDs,
- * the IDs 0x00..0x1F are commands with variable payload size,
- * the IDs 0x20..0x3F are commands with fixed payload size.
- */
-
-#define CMD_ID_MASK 0x3F
-
-/* Commands with variable payload size */
-#define CMD_SCAN_IN 0x00
-#define CMD_SLOW_SCAN_IN 0x01
-#define CMD_SCAN_OUT 0x02
-#define CMD_SLOW_SCAN_OUT 0x03
-#define CMD_SCAN_IO 0x04
-#define CMD_SLOW_SCAN_IO 0x05
-
-/* Commands with fixed payload size */
-#define CMD_CLOCK_TMS 0x20
-#define CMD_SLOW_CLOCK_TMS 0x21
-#define CMD_CLOCK_TCK 0x22
-#define CMD_SLOW_CLOCK_TCK 0x23
-#define CMD_SLEEP_US 0x24
-#define CMD_SLEEP_MS 0x25
-#define CMD_GET_SIGNALS 0x26
-#define CMD_SET_SIGNALS 0x27
-#define CMD_CONFIGURE_TCK_FREQ 0x28
-#define CMD_SET_LEDS 0x29
-#define CMD_TEST 0x2A
-
-/* JTAG signal definition for jtag_get_signals() -- Input signals! */
-#define SIGNAL_TDO (1<<0)
-#define SIGNAL_BRKOUT (1<<1)
-#define SIGNAL_TRAP (1<<2)
-#define SIGNAL_RTCK (1<<3)
-
-/* JTAG signal definition for jtag_get_signals() -- Output signals! */
-#define SIGNAL_TDI (1<<0)
-#define SIGNAL_TMS (1<<1)
-#define SIGNAL_TCK (1<<2)
-#define SIGNAL_TRST (1<<3)
-#define SIGNAL_BRKIN (1<<4)
-#define SIGNAL_RESET (1<<5)
-#define SIGNAL_OCDSE (1<<6)
-
-/* LED definitions for CMD_SET_LEDS and CMD_CLEAR_LEDS commands */
-#define COM_LED_ON (1<<0)
-#define RUN_LED_ON (1<<1)
-#define COM_LED_OFF (1<<2)
-#define RUN_LED_OFF (1<<3)
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/protocol.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/protocol.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/protocol.h
deleted file mode 100755
index fbc1996..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/protocol.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef __PROTOCOL_H
-#define __PROTOCOL_H
-
-#include "common.h"
-#include <stdbool.h>
-
-void execute_set_led_command(void);
-
-bool execute_command(void);
-void command_loop(void);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/reg_ezusb.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
deleted file mode 100755
index 82f9451..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/reg_ezusb.h
+++ /dev/null
@@ -1,743 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef REG_EZUSB_H
-#define REG_EZUSB_H
-
-/**
- * @file
- * All information in this file was taken from the EZ-USB Technical
- * Reference Manual, Cypress Semiconductor, 3901 North First Street
- * San Jose, CA 95134 (www.cypress.com).
- *
- * The EZ-USB Technical Reference Manual is called "EZ-USB TRM" hereafter.
- *
- * The following bit name definitions differ from those in the EZ-USB TRM:
- * - All lowercase characters in the EZ-USB TRM bit names have been converted
- * to capitals (e. g. "WakeSRC" converted to "WAKESRC").
- * - CPUCS: 8051RES is named "RES8051".
- * - ISOCTL: Two MBZ ("Must Be Zero") bits are named "MBZ0" and "MBZ1".
- * - I2CS: STOP and START bits are preceded by "I2C_"
- * - INxCS, OUTxCS: the busy and stall bits are named "EPBSY" and "EPSTALL".
- * - TOGCTL: EZ-USB TRM bit names are preceded by "TOG_".
- */
-
-/* Compiler-specific definitions of SBIT, SFR, SFRX, ... macros */
-#include <mcs51/compiler.h>
-
-/* Bit vectors */
-#define bmBit0 0x01
-#define bmBit1 0x02
-#define bmBit2 0x04
-#define bmBit3 0x08
-#define bmBit4 0x10
-#define bmBit5 0x20
-#define bmBit6 0x40
-#define bmBit7 0x80
-
-/**************************************************************************
- ************************ Special Function Registers **********************
- ***************************************************************************/
-
-/* See EZ-USB TRM, pp. A-9 - A-10 */
-
-SFR(SP, 0x81);
-SFR(DPL0, 0x82);
-SFR(DPH0, 0x83);
-SFR(DPL1, 0x84);
-SFR(DPL2, 0x85);
-
-SFR(DPS, 0x86);
-#define SEL bmBit0
-/* Bit 1 read-only, always reads '0' */
-/* Bit 2 read-only, always reads '0' */
-/* Bit 3 read-only, always reads '0' */
-/* Bit 4 read-only, always reads '0' */
-/* Bit 5 read-only, always reads '0' */
-/* Bit 6 read-only, always reads '0' */
-/* Bit 7 read-only, always reads '0' */
-
-SFR(PCON, 0x87);
-#define IDLE bmBit0
-#define STOP bmBit1
-#define GF0 bmBit2
-#define GF1 bmBit3
-/* Bit 4 read-only, always reads '1' */
-/* Bit 5 read-only, always reads '1' */
-/* Bit 6 unused */
-#define SMOD0 bmBit7
-
-SFR(TCON, 0x88);
-SBIT(IT0, 0x88, 0);
-SBIT(IE0, 0x88, 1);
-SBIT(IT1, 0x88, 2);
-SBIT(IE1, 0x88, 3);
-SBIT(TR0, 0x88, 4);
-SBIT(TF0, 0x88, 5);
-SBIT(TR1, 0x88, 6);
-SBIT(TF1, 0x88, 7);
-
-SFR(TMOD, 0x89);
-/* Some bits in this register share the same name in the EZ-USB TRM. Therefore,
- * we add a '0'/'1' to distinguish them */
-#define M00 bmBit0
-#define M01 bmBit1
-#define CT0 bmBit2
-#define GATE0 bmBit3
-#define M10 bmBit4
-#define M11 bmBit5
-#define CT1 bmBit6
-#define GATE1 bmBit7
-
-SFR(TL0, 0x8A);
-SFR(TL1, 0x8B);
-SFR(TH0, 0x8C);
-SFR(TH1, 0x8D);
-
-SFR(CKCON, 0x8E);
-#define MD0 bmBit0
-#define MD1 bmBit1
-#define MD2 bmBit2
-#define T0M bmBit3
-#define T1M bmBit4
-#define T2M bmBit5
-/* Bit 6 unused */
-/* Bit 7 unused */
-
-SFR(SPC_FNC, 0x8D);
-#define bmWRS bmBit0
-/* Bit 1 read-only, always reads '0' */
-/* Bit 2 read-only, always reads '0' */
-/* Bit 3 read-only, always reads '0' */
-/* Bit 4 read-only, always reads '0' */
-/* Bit 5 read-only, always reads '0' */
-/* Bit 6 read-only, always reads '0' */
-/* Bit 7 read-only, always reads '0' */
-
-SFR(EXIF, 0x91);
-/* Bit 0 read-only, always reads '0' */
-/* Bit 1 read-only, always reads '0' */
-/* Bit 2 read-only, always reads '0' */
-/* Bit 3 read-only, always reads '1' */
-#define USBINT bmBit4
-#define I2CINT bmBit5
-#define IE4 bmBit6
-#define IE5 bmBit7
-
-/* Definition of the _XPAGE register, according to SDCC Compiler User Guide,
- * Version 3.0.1, Chapter 4, p. 61. Also see EZ-USB TRM, p. 2-4. */
-SFR(MPAGE, 0x92);
-SFR(_XPAGE, 0x92);
-
-SFR(SCON0, 0x98);
-SBIT(RI_0, 0x98, 0);
-SBIT(TI_0, 0x98, 1);
-SBIT(RB8_0, 0x98, 2);
-SBIT(TB8_0, 0x98, 3);
-SBIT(REN_0, 0x98, 4);
-SBIT(SM2_0, 0x98, 5);
-SBIT(SM1_0, 0x98, 6);
-SBIT(SM0_0, 0x98, 7);
-
-SFR(SBUF0, 0x99);
-
-SFR(IE, 0xA8);
-SBIT(EX0, 0xA8, 0);
-SBIT(ET0, 0xA8, 1);
-SBIT(EX1, 0xA8, 2);
-SBIT(ET1, 0xA8, 3);
-SBIT(ES0, 0xA8, 4);
-SBIT(ET2, 0xA8, 5);
-SBIT(ES1, 0xA8, 6);
-SBIT(EA, 0xA8, 7);
-
-SFR(IP, 0xB8);
-SBIT(PX0, 0xB8, 0);
-SBIT(PT0, 0xB8, 1);
-SBIT(PX1, 0xB8, 2);
-SBIT(PT1, 0xB8, 3);
-SBIT(PS0, 0xB8, 4);
-SBIT(PT2, 0xB8, 5);
-SBIT(PS1, 0xB8, 6);
-/* Bit 7 read-only, always reads '1' */
-
-SFR(SCON1, 0xC0);
-SBIT(RI_1, 0xC0, 0);
-SBIT(TI_1, 0xC0, 1);
-SBIT(RB8_1, 0xC0, 2);
-SBIT(TB8_1, 0xC0, 3);
-SBIT(REN_1, 0xC0, 4);
-SBIT(SM2_1, 0xC0, 5);
-SBIT(SM1_1, 0xC0, 6);
-SBIT(SM0_1, 0xC0, 7);
-
-SFR(SBUF1, 0xC1);
-
-SFR(T2CON, 0xC8);
-SBIT(CPRL2, 0xC8, 0);
-SBIT(CT2, 0xC8, 1);
-SBIT(TR2, 0xC8, 2);
-SBIT(EXEN2, 0xC8, 3);
-SBIT(TCLK, 0xC8, 4);
-SBIT(RCLK, 0xC8, 5);
-SBIT(EXF2, 0xC8, 6);
-SBIT(TF2, 0xC8, 7);
-
-SFR(RCAP2L, 0xCA);
-SFR(RCAP2H, 0xCB);
-SFR(TL2, 0xCC);
-SFR(TH2, 0xCD);
-
-SFR(PSW, 0xD0);
-SBIT(P, 0xD0, 0);
-SBIT(F1, 0xD0, 1);
-SBIT(OV, 0xD0, 2);
-SBIT(RS0, 0xD0, 3);
-SBIT(RS1, 0xD0, 4);
-SBIT(F0, 0xD0, 5);
-SBIT(AC, 0xD0, 6);
-SBIT(CY, 0xD0, 7);
-
-SFR(EICON, 0xD8);
-/* Bit 0 read-only, always reads '0' */
-/* Bit 1 read-only, always reads '0' */
-/* Bit 2 read-only, always reads '0' */
-SBIT(INT6, 0xD8, 3);
-SBIT(RESI, 0xD8, 4);
-SBIT(ERESI, 0xD8, 5);
-/* Bit 6 read-only, always reads '1' */
-SBIT(SMOD1, 0xD8, 7);
-
-SFR(ACC, 0xE0);
-
-SFR(EIE, 0xE8);
-SBIT(EUSB, 0xE8, 0);
-SBIT(EI2C, 0xE8, 1);
-SBIT(EX4, 0xE8, 2);
-SBIT(EX5, 0xE8, 3);
-SBIT(EWDI, 0xE8, 4);
-/* Bit 5 read-only, always reads '1' */
-/* Bit 6 read-only, always reads '1' */
-/* Bit 7 read-only, always reads '1' */
-
-SFR(B, 0xF0);
-
-SFR(EIP, 0xF8);
-SBIT(PUSB, 0xF8, 0);
-SBIT(PI2C, 0xF8, 1);
-SBIT(PX4, 0xF8, 2);
-SBIT(PX5, 0xF8, 3);
-SBIT(PX6, 0xF8, 4);
-/* Bit 5 read-only, always reads '1' */
-/* Bit 6 read-only, always reads '1' */
-/* Bit 7 read-only, always reads '1' */
-
-/**************************************************************************
- ***************************** XDATA Registers ****************************
- ***************************************************************************/
-
-/************************ Endpoint 0-7 Data Buffers ************************/
-SFRX(OUT7BUF[64], 0x7B40);
-SFRX(IN7BUF[64], 0x7B80);
-SFRX(OUT6BUF[64], 0x7BC0);
-SFRX(IN6BUF[64], 0x7C00);
-SFRX(OUT5BUF[64], 0x7C40);
-SFRX(IN5BUF[64], 0x7C80);
-SFRX(OUT4BUF[64], 0x7CC0);
-SFRX(IN4BUF[64], 0x7D00);
-SFRX(OUT3BUF[64], 0x7D40);
-SFRX(IN3BUF[64], 0x7D80);
-SFRX(OUT2BUF[64], 0x7DC0);
-SFRX(IN2BUF[64], 0x7E00);
-SFRX(OUT1BUF[64], 0x7E40);
-SFRX(IN1BUF[64], 0x7E80);
-SFRX(OUT0BUF[64], 0x7EC0);
-SFRX(IN0BUF[64], 0x7F00);
-/* 0x7F40 - 0x7F5F reserved */
-
-/**************************** Isochronous Data *****************************/
-SFRX(OUT8DATA, 0x7F60);
-SFRX(OUT9DATA, 0x7F61);
-SFRX(OUT10DATA, 0x7F62);
-SFRX(OUT11DATA, 0x7F63);
-SFRX(OUT12DATA, 0x7F64);
-SFRX(OUT13DATA, 0x7F65);
-SFRX(OUT14DATA, 0x7F66);
-SFRX(OUT15DATA, 0x7F67);
-
-SFRX(IN8DATA, 0x7F68);
-SFRX(IN9DATA, 0x7F69);
-SFRX(IN10DATA, 0x7F6A);
-SFRX(IN11DATA, 0x7F6B);
-SFRX(IN12DATA, 0x7F6C);
-SFRX(IN13DATA, 0x7F6D);
-SFRX(IN14DATA, 0x7F6E);
-SFRX(IN15DATA, 0x7F6F);
-
-/************************* Isochronous Byte Counts *************************/
-SFRX(OUT8BCH, 0x7F70);
-SFRX(OUT8BCL, 0x7F71);
-SFRX(OUT9BCH, 0x7F72);
-SFRX(OUT9BCL, 0x7F73);
-SFRX(OUT10BCH, 0x7F74);
-SFRX(OUT10BCL, 0x7F75);
-SFRX(OUT11BCH, 0x7F76);
-SFRX(OUT11BCL, 0x7F77);
-SFRX(OUT12BCH, 0x7F78);
-SFRX(OUT12BCL, 0x7F79);
-SFRX(OUT13BCH, 0x7F7A);
-SFRX(OUT13BCL, 0x7F7B);
-SFRX(OUT14BCH, 0x7F7C);
-SFRX(OUT14BCL, 0x7F7D);
-SFRX(OUT15BCH, 0x7F7E);
-SFRX(OUT16BCL, 0x7F7F);
-
-/****************************** CPU Registers ******************************/
-SFRX(CPUCS, 0x7F92);
-#define RES8051 bmBit0
-#define CLK24OE bmBit1
-/* Bit 2 read-only, always reads '0' */
-/* Bit 3 read-only, always reads '0' */
-/* Bits 4...7: Chip Revision */
-
-SFRX(PORTACFG, 0x7F93);
-#define T0OUT bmBit0
-#define T1OUT bmBit1
-#define OE bmBit2
-#define CS bmBit3
-#define FWR bmBit4
-#define FRD bmBit5
-#define RXD0OUT bmBit6
-#define RXD1OUT bmBit7
-
-SFRX(PORTBCFG, 0x7F94);
-#define T2 bmBit0
-#define T2EX bmBit1
-#define RXD1 bmBit2
-#define TXD1 bmBit3
-#define INT4 bmBit4
-#define INT5 bmBit5
-#define INT6 bmBit6
-#define T2OUT bmBit7
-
-SFRX(PORTCCFG, 0x7F95);
-#define RXD0 bmBit0
-#define TXD0 bmBit1
-#define INT0 bmBit2
-#define INT1 bmBit3
-#define T0 bmBit4
-#define T1 bmBit5
-#define WR bmBit6
-#define RD bmBit7
-
-/*********************** Input-Output Port Registers ***********************/
-SFRX(OUTA, 0x7F96);
-#define OUTA0 bmBit0
-#define OUTA1 bmBit1
-#define OUTA2 bmBit2
-#define OUTA3 bmBit3
-#define OUTA4 bmBit4
-#define OUTA5 bmBit5
-#define OUTA6 bmBit6
-#define OUTA7 bmBit7
-
-SFRX(OUTB, 0x7F97);
-#define OUTB0 bmBit0
-#define OUTB1 bmBit1
-#define OUTB2 bmBit2
-#define OUTB3 bmBit3
-#define OUTB4 bmBit4
-#define OUTB5 bmBit5
-#define OUTB6 bmBit6
-#define OUTB7 bmBit7
-
-SFRX(OUTC, 0x7F98);
-#define OUTC0 bmBit0
-#define OUTC1 bmBit1
-#define OUTC2 bmBit2
-#define OUTC3 bmBit3
-#define OUTC4 bmBit4
-#define OUTC5 bmBit5
-#define OUTC6 bmBit6
-#define OUTC7 bmBit7
-
-SFRX(PINSA, 0x7F99);
-#define PINA0 bmBit0
-#define PINA1 bmBit1
-#define PINA2 bmBit2
-#define PINA3 bmBit3
-#define PINA4 bmBit4
-#define PINA5 bmBit5
-#define PINA6 bmBit6
-#define PINA7 bmBit7
-
-SFRX(PINSB, 0x7F9A);
-#define PINB0 bmBit0
-#define PINB1 bmBit1
-#define PINB2 bmBit2
-#define PINB3 bmBit3
-#define PINB4 bmBit4
-#define PINB5 bmBit5
-#define PINB6 bmBit6
-#define PINB7 bmBit7
-
-SFRX(PINSC, 0x7F9B);
-#define PINC0 bmBit0
-#define PINC1 bmBit1
-#define PINC2 bmBit2
-#define PINC3 bmBit3
-#define PINC4 bmBit4
-#define PINC5 bmBit5
-#define PINC6 bmBit6
-#define PINC7 bmBit7
-
-SFRX(OEA, 0x7F9C);
-#define OEA0 bmBit0
-#define OEA1 bmBit1
-#define OEA2 bmBit2
-#define OEA3 bmBit3
-#define OEA4 bmBit4
-#define OEA5 bmBit5
-#define OEA6 bmBit6
-#define OEA7 bmBit7
-
-SFRX(OEB, 0x7F9D);
-#define OEB0 bmBit0
-#define OEB1 bmBit1
-#define OEB2 bmBit2
-#define OEB3 bmBit3
-#define OEB4 bmBit4
-#define OEB5 bmBit5
-#define OEB6 bmBit6
-#define OEB7 bmBit7
-
-SFRX(OEC, 0x7F9E);
-#define OEC0 bmBit0
-#define OEC1 bmBit1
-#define OEC2 bmBit2
-#define OEC3 bmBit3
-#define OEC4 bmBit4
-#define OEC5 bmBit5
-#define OEC6 bmBit6
-#define OEC7 bmBit7
-
-/* 0x7F9F reserved */
-
-/****************** Isochronous Control/Status Registers *******************/
-SFRX(ISOERR, 0x7FA0);
-#define ISO8ERR bmBit0
-#define ISO9ERR bmBit1
-#define ISO10ERR bmBit2
-#define ISO11ERR bmBit3
-#define ISO12ERR bmBit4
-#define ISO13ERR bmBit5
-#define ISO14ERR bmBit6
-#define ISO15ERR bmBit7
-
-SFRX(ISOCTL, 0x7FA1);
-#define ISODISAB bmBit0
-#define MBZ0 bmBit1
-#define MBZ1 bmBit2
-#define PPSTAT bmBit3
-/* Bit 4 unused */
-/* Bit 5 unused */
-/* Bit 6 unused */
-/* Bit 7 unused */
-
-SFRX(ZBCOUT, 0x7FA2);
-#define EP8 bmBit0
-#define EP9 bmBit1
-#define EP10 bmBit2
-#define EP11 bmBit3
-#define EP12 bmBit4
-#define EP13 bmBit5
-#define EP14 bmBit6
-#define EP15 bmBit7
-
-/* 0x7FA3 reserved */
-/* 0x7FA4 reserved */
-
-/****************************** I2C Registers ******************************/
-SFRX(I2CS, 0x7FA5);
-#define DONE bmBit0
-#define ACK bmBit1
-#define BERR bmBit2
-#define ID0 bmBit3
-#define ID1 bmBit4
-#define LASTRD bmBit5
-#define I2C_STOP bmBit6
-#define I2C_START bmBit7
-
-SFRX(I2DAT, 0x7FA6);
-/* 0x7FA7 reserved */
-
-/******************************* Interrupts ********************************/
-SFRX(IVEC, 0x7FA8);
-/* Bit 0 read-only, always reads '0' */
-/* Bit 1 read-only, always reads '0' */
-#define IV0 bmBit2
-#define IV1 bmBit3
-#define IV2 bmBit4
-#define IV3 bmBit5
-#define IV4 bmBit6
-/* Bit 7 read-only, always reads '0' */
-
-SFRX(IN07IRQ, 0x7FA9);
-#define IN0IR bmBit0
-#define IN1IR bmBit1
-#define IN2IR bmBit2
-#define IN3IR bmBit3
-#define IN4IR bmBit4
-#define IN5IR bmBit5
-#define IN6IR bmBit6
-#define IN7IR bmBit7
-
-SFRX(OUT07IRQ, 0x7FAA);
-#define OUT0IR bmBit0
-#define OUT1IR bmBit1
-#define OUT2IR bmBit2
-#define OUT3IR bmBit3
-#define OUT4IR bmBit4
-#define OUT5IR bmBit5
-#define OUT6IR bmBit6
-#define OUT7IR bmBit7
-
-SFRX(USBIRQ, 0x7FAB);
-#define SUDAVIR bmBit0
-#define SOFIR bmBit1
-#define SUTOKIR bmBit2
-#define SUSPIR bmBit3
-#define URESIR bmBit4
-/* Bit 5 unused */
-/* Bit 6 unused */
-/* Bit 7 unused */
-
-SFRX(IN07IEN, 0x7FAC);
-#define IN0IEN bmBit0
-#define IN1IEN bmBit1
-#define IN2IEN bmBit2
-#define IN3IEN bmBit3
-#define IN4IEN bmBit4
-#define IN5IEN bmBit5
-#define IN6IEN bmBit6
-#define IN7IEN bmBit7
-
-SFRX(OUT07IEN, 0x7FAD);
-#define OUT0IEN bmBit0
-#define OUT1IEN bmBit1
-#define OUT2IEN bmBit2
-#define OUT3IEN bmBit3
-#define OUT4IEN bmBit4
-#define OUT5IEN bmBit5
-#define OUT6IEN bmBit6
-#define OUT7IEN bmBit7
-
-SFRX(USBIEN, 0x7FAE);
-#define SUDAVIE bmBit0
-#define SOFIE bmBit1
-#define SUTOKIE bmBit2
-#define SUSPIE bmBit3
-#define URESIE bmBit4
-/* Bit 5 unused */
-/* Bit 6 unused */
-/* Bit 7 unused */
-
-SFRX(USBBAV, 0x7FAF);
-#define AVEN bmBit0
-#define BPEN bmBit1
-#define BPPULSE bmBit2
-#define BREAK bmBit3
-/* Bit 4 unused */
-/* Bit 5 unused */
-/* Bit 6 unused */
-/* Bit 7 unused */
-
-/* 0x7FB0 reserved */
-/* 0x7FB1 reserved */
-SFRX(BPADDRH, 0x7FB2);
-SFRX(BPADDRL, 0x7FB3);
-
-/****************************** Endpoints 0-7 ******************************/
-SFRX(EP0CS, 0x7FB4);
-#define EP0STALL bmBit0
-#define HSNAK bmBit1
-#define IN0BSY bmBit2
-#define OUT0BSY bmBit3
-/* Bit 4 unused */
-/* Bit 5 unused */
-/* Bit 6 unused */
-/* Bit 7 unused */
-
-SFRX(IN0BC, 0x7FB5);
-SFRX(IN1CS, 0x7FB6);
-SFRX(IN1BC, 0x7FB7);
-SFRX(IN2CS, 0x7FB8);
-SFRX(IN2BC, 0x7FB9);
-SFRX(IN3CS, 0x7FBA);
-SFRX(IN3BC, 0x7FBB);
-SFRX(IN4CS, 0x7FBC);
-SFRX(IN4BC, 0x7FBD);
-SFRX(IN5CS, 0x7FBE);
-SFRX(IN5BC, 0x7FBF);
-SFRX(IN6CS, 0x7FC0);
-SFRX(IN6BC, 0x7FC1);
-SFRX(IN7CS, 0x7FC2);
-SFRX(IN7BC, 0x7FC3);
-/* 0x7FC4 reserved */
-SFRX(OUT0BC, 0x7FC5);
-SFRX(OUT1CS, 0x7FC6);
-SFRX(OUT1BC, 0x7FC7);
-SFRX(OUT2CS, 0x7FC8);
-SFRX(OUT2BC, 0x7FC9);
-SFRX(OUT3CS, 0x7FCA);
-SFRX(OUT3BC, 0x7FCB);
-SFRX(OUT4CS, 0x7FCC);
-SFRX(OUT4BC, 0x7FCD);
-SFRX(OUT5CS, 0x7FCE);
-SFRX(OUT5BC, 0x7FCF);
-SFRX(OUT6CS, 0x7FD0);
-SFRX(OUT6BC, 0x7FD1);
-SFRX(OUT7CS, 0x7FD2);
-SFRX(OUT7BC, 0x7FD3);
-
-/* The INxSTALL, OUTxSTALL, INxBSY and OUTxBSY bits are the same for all
- * INxCS/OUTxCS registers. For better readability, we define them only once */
-#define EPSTALL bmBit0
-#define EPBSY bmBit1
-
-/************************** Global USB Registers ***************************/
-SFRX(SUDPTRH, 0x7FD4);
-SFRX(SUDPTRL, 0x7FD5);
-
-SFRX(USBCS, 0x7FD6);
-#define SIGRSUME bmBit0
-#define RENUM bmBit1
-#define DISCOE bmBit2
-#define DISCON bmBit3
-/* Bit 4 unused */
-/* Bit 5 unused */
-/* Bit 6 unused */
-#define WAKESRC bmBit7
-
-SFRX(TOGCTL, 0x7FD7);
-#define TOG_EP0 bmBit0
-#define TOG_EP1 bmBit1
-#define TOG_EP2 bmBit2
-/* Bit 3 is read-only, always reads '0' */
-#define TOG_IO bmBit4
-#define TOG_R bmBit5
-#define TOG_S bmBit6
-#define TOG_Q bmBit7
-
-SFRX(USBFRAMEL, 0x7FD8);
-SFRX(USBFRAMEH, 0x7FD9);
-/* 0x7FDA reserved */
-SFRX(FNADDR, 0x7FDB);
-/* 0x7FDC reserved */
-
-SFRX(USBPAIR, 0x7FDD);
-#define PR2IN bmBit0
-#define PR4IN bmBit1
-#define PR6IN bmBit2
-#define PR2OUT bmBit3
-#define PR4OUT bmBit4
-#define PR6OUT bmBit5
-/* Bit 6 unused */
-#define ISOSEND0 bmBit7
-
-SFRX(IN07VAL, 0x7FDE);
-/* Bit 0 is read-only, always reads '1' */
-#define IN1VAL bmBit1
-#define IN2VAL bmBit2
-#define IN3VAL bmBit3
-#define IN4VAL bmBit4
-#define IN5VAL bmBit5
-#define IN6VAL bmBit6
-#define IN7VAL bmBit7
-
-SFRX(OUT07VAL, 0x7FDF);
-/* Bit 0 is read-only, always reads '1' */
-#define OUT1VAL bmBit1
-#define OUT2VAL bmBit2
-#define OUT3VAL bmBit3
-#define OUT4VAL bmBit4
-#define OUT5VAL bmBit5
-#define OUT6VAL bmBit6
-#define OUT7VAL bmBit7
-
-SFRX(INISOVAL, 0x7FE0);
-#define IN8VAL bmBit0
-#define IN9VAL bmBit1
-#define IN10VAL bmBit2
-#define IN11VAL bmBit3
-#define IN12VAL bmBit4
-#define IN13VAL bmBit5
-#define IN14VAL bmBit6
-#define IN15VAL bmBit7
-
-SFRX(OUTISOVAL, 0x7FE1);
-#define OUT8VAL bmBit0
-#define OUT9VAL bmBit1
-#define OUT10VAL bmBit2
-#define OUT11VAL bmBit3
-#define OUT12VAL bmBit4
-#define OUT13VAL bmBit5
-#define OUT14VAL bmBit6
-#define OUT15VAL bmBit7
-
-SFRX(FASTXFR, 0x7FE2);
-#define WMOD0 bmBit0
-#define WMOD1 bmBit1
-#define WPOL bmBit2
-#define RMOD0 bmBit3
-#define RMOD1 bmBit4
-#define RPOL bmBit5
-#define FBLK bmBit6
-#define FISO bmBit7
-
-SFRX(AUTOPTRH, 0x7FE3);
-SFRX(AUTOPTRL, 0x7FE4);
-SFRX(AUTODATA, 0x7FE5);
-/* 0x7FE6 reserved */
-/* 0x7FE7 reserved */
-
-/******************************* Setup Data ********************************/
-SFRX(SETUPDAT[8], 0x7FE8);
-
-/************************* Isochronous FIFO sizes **************************/
-SFRX(OUT8ADDR, 0x7FF0);
-SFRX(OUT9ADDR, 0x7FF1);
-SFRX(OUT10ADDR, 0x7FF2);
-SFRX(OUT11ADDR, 0x7FF3);
-SFRX(OUT12ADDR, 0x7FF4);
-SFRX(OUT13ADDR, 0x7FF5);
-SFRX(OUT14ADDR, 0x7FF6);
-SFRX(OUT15ADDR, 0x7FF7);
-
-SFRX(IN8ADDR, 0x7FF8);
-SFRX(IN9ADDR, 0x7FF9);
-SFRX(IN10ADDR, 0x7FFA);
-SFRX(IN11ADDR, 0x7FFB);
-SFRX(IN12ADDR, 0x7FFC);
-SFRX(IN13ADDR, 0x7FFD);
-SFRX(IN14ADDR, 0x7FFE);
-SFRX(IN15ADDR, 0x7FFF);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/usb.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/usb.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/usb.h
deleted file mode 100755
index 182b790..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/include/usb.h
+++ /dev/null
@@ -1,267 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef __USB_H
-#define __USB_H
-
-#include "reg_ezusb.h"
-
-#include <stdint.h>
-#include <stdbool.h>
-
-#define NULL (void *)0;
-
-/* High and Low byte of a word (uint16_t) */
-#define HI8(word) (uint8_t)(((uint16_t)word >> 8) & 0xff)
-#define LO8(word) (uint8_t)((uint16_t)word & 0xff)
-
-/* Convenience functions */
-#define STALL_EP0() (EP0CS |= EP0STALL)
-#define CLEAR_IRQ() (EXIF &= ~USBINT)
-
-/*********** USB descriptors. See section 9.5 of the USB 1.1 spec **********/
-
-/* USB Descriptor Types. See USB 1.1 spec, page 187, table 9-5 */
-#define DESCRIPTOR_TYPE_DEVICE 0x01
-#define DESCRIPTOR_TYPE_CONFIGURATION 0x02
-#define DESCRIPTOR_TYPE_STRING 0x03
-#define DESCRIPTOR_TYPE_INTERFACE 0x04
-#define DESCRIPTOR_TYPE_ENDPOINT 0x05
-
-#define STR_DESCR(len, ...) { len * 2 + 2, DESCRIPTOR_TYPE_STRING, { __VA_ARGS__ } }
-
-/** USB Device Descriptor. See USB 1.1 spec, pp. 196 - 198 */
-struct usb_device_descriptor {
- uint8_t bLength; /**< Size of this descriptor in bytes. */
- uint8_t bDescriptorType; /**< DEVICE Descriptor Type. */
- uint16_t bcdUSB; /**< USB specification release number (BCD). */
- uint8_t bDeviceClass; /**< Class code. */
- uint8_t bDeviceSubClass; /**< Subclass code. */
- uint8_t bDeviceProtocol; /**< Protocol code. */
- uint8_t bMaxPacketSize0; /**< Maximum packet size for EP0 (8, 16, 32, 64). */
- uint16_t idVendor; /**< USB Vendor ID. */
- uint16_t idProduct; /**< USB Product ID. */
- uint16_t bcdDevice; /**< Device Release Number (BCD). */
- uint8_t iManufacturer; /**< Index of manufacturer string descriptor. */
- uint8_t iProduct; /**< Index of product string descriptor. */
- uint8_t iSerialNumber; /**< Index of string descriptor containing serial #. */
- uint8_t bNumConfigurations; /**< Number of possible configurations. */
-};
-
-/** USB Configuration Descriptor. See USB 1.1 spec, pp. 199 - 200 */
-struct usb_config_descriptor {
- uint8_t bLength; /**< Size of this descriptor in bytes. */
- uint8_t bDescriptorType; /**< CONFIGURATION descriptor type. */
- uint16_t wTotalLength; /**< Combined total length of all descriptors. */
- uint8_t bNumInterfaces; /**< Number of interfaces in this configuration. */
- uint8_t bConfigurationValue; /**< Value used to select this configuration. */
- uint8_t iConfiguration; /**< Index of configuration string descriptor. */
- uint8_t bmAttributes; /**< Configuration characteristics. */
- uint8_t MaxPower; /**< Maximum power consumption in 2 mA units. */
-};
-
-/** USB Interface Descriptor. See USB 1.1 spec, pp. 201 - 203 */
-struct usb_interface_descriptor {
- uint8_t bLength; /**< Size of this descriptor in bytes. */
- uint8_t bDescriptorType; /**< INTERFACE descriptor type. */
- uint8_t bInterfaceNumber; /**< Interface number. */
- uint8_t bAlternateSetting; /**< Value used to select alternate setting. */
- uint8_t bNumEndpoints; /**< Number of endpoints used by this interface. */
- uint8_t bInterfaceClass; /**< Class code. */
- uint8_t bInterfaceSubclass; /**< Subclass code. */
- uint8_t bInterfaceProtocol; /**< Protocol code. */
- uint8_t iInterface; /**< Index of interface string descriptor. */
-};
-
-/** USB Endpoint Descriptor. See USB 1.1 spec, pp. 203 - 204 */
-struct usb_endpoint_descriptor {
- uint8_t bLength; /**< Size of this descriptor in bytes. */
- uint8_t bDescriptorType; /**< ENDPOINT descriptor type. */
- uint8_t bEndpointAddress; /**< Endpoint Address: USB 1.1 spec, table 9-10. */
- uint8_t bmAttributes; /**< Endpoint Attributes: USB 1.1 spec, table 9-10. */
- uint16_t wMaxPacketSize; /**< Maximum packet size for this endpoint. */
- uint8_t bInterval; /**< Polling interval (in ms) for this endpoint. */
-};
-
-/** USB Language Descriptor. See USB 1.1 spec, pp. 204 - 205 */
-struct usb_language_descriptor {
- uint8_t bLength; /**< Size of this descriptor in bytes. */
- uint8_t bDescriptorType; /**< STRING descriptor type. */
- uint16_t wLANGID[]; /**< LANGID codes. */
-};
-
-/** USB String Descriptor. See USB 1.1 spec, pp. 204 - 205 */
-struct usb_string_descriptor {
- uint8_t bLength; /**< Size of this descriptor in bytes. */
- uint8_t bDescriptorType; /**< STRING descriptor type. */
- uint16_t bString[]; /**< UNICODE encoded string. */
-};
-
-/********************** USB Control Endpoint 0 related *********************/
-
-/** USB Control Setup Data. See USB 1.1 spec, pp. 183 - 185 */
-struct setup_data {
- uint8_t bmRequestType; /**< Characteristics of a request. */
- uint8_t bRequest; /**< Specific request. */
- uint16_t wValue; /**< Field that varies according to request. */
- uint16_t wIndex; /**< Field that varies according to request. */
- uint16_t wLength; /**< Number of bytes to transfer in data stage. */
-};
-
-/* External declarations for variables that need to be accessed outside of
- * the USB module */
-extern volatile bool EP2_out;
-extern volatile bool EP2_in;
-extern volatile __xdata __at 0x7FE8 struct setup_data setup_data;
-
-/*
- * USB Request Types (bmRequestType): See USB 1.1 spec, page 183, table 9-2
- *
- * Bit 7: Data transfer direction
- * 0 = Host-to-device
- * 1 = Device-to-host
- * Bit 6...5: Type
- * 0 = Standard
- * 1 = Class
- * 2 = Vendor
- * 3 = Reserved
- * Bit 4...0: Recipient
- * 0 = Device
- * 1 = Interface
- * 2 = Endpoint
- * 3 = Other
- * 4...31 = Reserved
- */
-
-#define USB_DIR_OUT 0x00
-#define USB_DIR_IN 0x80
-
-#define USB_REQ_TYPE_STANDARD (0x00 << 5)
-#define USB_REQ_TYPE_CLASS (0x01 << 5)
-#define USB_REQ_TYPE_VENDOR (0x02 << 5)
-#define USB_REQ_TYPE_RESERVED (0x03 << 5)
-
-#define USB_RECIP_DEVICE 0x00
-#define USB_RECIP_INTERFACE 0x01
-#define USB_RECIP_ENDPOINT 0x02
-#define USB_RECIP_OTHER 0x03
-
-/* bmRequestType for USB Standard Requests */
-
-/* Clear Interface Request */
-#define CF_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
-#define CF_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
-#define CF_ENDPOINT (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
-
-/* Get Configuration Request */
-#define GC_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
-
-/* Get Descriptor Request */
-#define GD_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
-
-/* Get Interface Request */
-#define GI_INTERFACE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
-
-/* Get Status Request: See USB 1.1 spec, page 190 */
-#define GS_DEVICE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
-#define GS_INTERFACE (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
-#define GS_ENDPOINT (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
-
-/* Set Address Request is handled by EZ-USB core */
-
-/* Set Configuration Request */
-#define SC_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
-
-/* Set Descriptor Request */
-#define SD_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
-
-/* Set Feature Request */
-#define SF_DEVICE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_DEVICE)
-#define SF_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
-#define SF_ENDPOINT (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
-
-/* Set Interface Request */
-#define SI_INTERFACE (USB_DIR_OUT | USB_REQ_TYPE_STANDARD | USB_RECIP_INTERFACE)
-
-/* Synch Frame Request */
-#define SY_ENDPOINT (USB_DIR_IN | USB_REQ_TYPE_STANDARD | USB_RECIP_ENDPOINT)
-
-/* USB Requests (bRequest): See USB 1.1 spec, table 9-4 on page 187 */
-#define GET_STATUS 0
-#define CLEAR_FEATURE 1
-/* Value '2' is reserved for future use */
-#define SET_FEATURE 3
-/* Value '4' is reserved for future use */
-#define SET_ADDRESS 5
-#define GET_DESCRIPTOR 6
-#define SET_DESCRIPTOR 7
-#define GET_CONFIGURATION 8
-#define SET_CONFIGURATION 9
-#define GET_INTERFACE 10
-#define SET_INTERFACE 11
-#define SYNCH_FRAME 12
-
-/* Standard Feature Selectors: See USB 1.1 spec, table 9-6 on page 188 */
-#define DEVICE_REMOTE_WAKEUP 1
-#define ENDPOINT_HALT 0
-
-/************************** EZ-USB specific stuff **************************/
-
-/** USB Interrupts. See AN2131-TRM, page 9-4 for details */
-enum usb_isr {
- SUDAV_ISR = 13,
- SOF_ISR,
- SUTOK_ISR,
- SUSPEND_ISR,
- USBRESET_ISR,
- IBN_ISR,
- EP0IN_ISR,
- EP0OUT_ISR,
- EP1IN_ISR,
- EP1OUT_ISR,
- EP2IN_ISR,
- EP2OUT_ISR,
- EP3IN_ISR,
- EP3OUT_ISR,
- EP4IN_ISR,
- EP4OUT_ISR,
- EP5IN_ISR,
- EP5OUT_ISR,
- EP6IN_ISR,
- EP6OUT_ISR,
- EP7IN_ISR,
- EP7OUT_ISR
-};
-
-/*************************** Function Prototypes ***************************/
-
-__xdata uint8_t *usb_get_endpoint_cs_reg(uint8_t ep);
-void usb_reset_data_toggle(uint8_t ep);
-
-bool usb_handle_get_status(void);
-bool usb_handle_clear_feature(void);
-bool usb_handle_set_feature(void);
-bool usb_handle_get_descriptor(void);
-void usb_handle_set_interface(void);
-
-void usb_handle_setup_data(void);
-void usb_init(void);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/USBJmpTb.a51
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/USBJmpTb.a51 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/USBJmpTb.a51
deleted file mode 100755
index 8ddd680..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/USBJmpTb.a51
+++ /dev/null
@@ -1,83 +0,0 @@
-;--------------------------------------------------------------------------;
-; Copyright (C) 2011-2013 by Martin Schmoelzer ;
-; <ma...@student.tuwien.ac.at> ;
-; ;
-; This program is free software; you can redistribute it and/or modify ;
-; it under the terms of the GNU General Public License as published by ;
-; the Free Software Foundation; either version 2 of the License, or ;
-; (at your option) any later version. ;
-; ;
-; This program is distributed in the hope that it will be useful, ;
-; but WITHOUT ANY WARRANTY; without even the implied warranty of ;
-; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ;
-; GNU General Public License for more details. ;
-; ;
-; You should have received a copy of the GNU General Public License ;
-; along with this program; if not, write to the ;
-; Free Software Foundation, Inc., ;
-; 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. ;
-;--------------------------------------------------------------------------;
-
-.module JUMPTABLE
-.globl USB_AutoVector
-.globl USB_Jump_Table
-
-;--------------------------------------------------------------------------;
-; Interrupt Vectors ;
-;--------------------------------------------------------------------------;
-.area USB_JV (ABS,OVR) ; Absolute, Overlay
-.org 0x43 ; USB interrupt (INT2) jumps here
-USB_AutoVector = #. + 2
- ljmp USB_Jump_Table
-
-;--------------------------------------------------------------------------;
-; USB Jump Table ;
-;--------------------------------------------------------------------------;
-.area USB_JT (ABS) ; Absolute placement
-.org 0x1B00 ; Place jump table at 0x1B00
-
-USB_Jump_Table: ; autovector jump table
- ljmp _sudav_isr ; Setup Data Available
- .db 0
- ljmp _sof_isr ; Start of Frame
- .db 0
- ljmp _sutok_isr ; Setup Data Loading
- .db 0
- ljmp _suspend_isr ; Global Suspend
- .db 0
- ljmp _usbreset_isr ; USB Reset
- .db 0
- ljmp _ibn_isr ; IN Bulk NAK interrupt
- .db 0
- ljmp _ep0in_isr ; Endpoint 0 IN
- .db 0
- ljmp _ep0out_isr ; Endpoint 0 OUT
- .db 0
- ljmp _ep1in_isr ; Endpoint 1 IN
- .db 0
- ljmp _ep1out_isr ; Endpoint 1 OUT
- .db 0
- ljmp _ep2in_isr ; Endpoint 2 IN
- .db 0
- ljmp _ep2out_isr ; Endpoint 2 OUT
- .db 0
- ljmp _ep3in_isr ; Endpoint 3 IN
- .db 0
- ljmp _ep3out_isr ; Endpoint 3 OUT
- .db 0
- ljmp _ep4in_isr ; Endpoint 4 IN
- .db 0
- ljmp _ep4out_isr ; Endpoint 4 OUT
- .db 0
- ljmp _ep5in_isr ; Endpoint 5 IN
- .db 0
- ljmp _ep5out_isr ; Endpoint 5 OUT
- .db 0
- ljmp _ep6in_isr ; Endpoint 6 IN
- .db 0
- ljmp _ep6out_isr ; Endpoint 6 OUT
- .db 0
- ljmp _ep7in_isr ; Endpoint 7 IN
- .db 0
- ljmp _ep7out_isr ; Endpoint 7 OUT
- .db 0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/delay.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/delay.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/delay.c
deleted file mode 100755
index 82569e2..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/delay.c
+++ /dev/null
@@ -1,51 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#include "delay.h"
-
-void delay_5us(void)
-{
- NOP;
-}
-
-void delay_1ms(void)
-{
- uint16_t i;
-
- for (i = 0; i < 598; i++)
- ;
-}
-
-void delay_us(uint16_t delay)
-{
- uint16_t i;
- uint16_t maxcount = (delay / 5);
-
- for (i = 0; i < maxcount; i++)
- delay_5us();
-}
-
-void delay_ms(uint16_t delay)
-{
- uint16_t i;
-
- for (i = 0; i < delay; i++)
- delay_1ms();
-}
[21/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf51.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf51.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf51.c
deleted file mode 100755
index 334f95f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf51.c
+++ /dev/null
@@ -1,1336 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 Synapse Product Development *
- * Andrey Smirnov <an...@gmail.com> *
- * Angus Gratton <gu...@projectgus.com> *
- * Erdem U. Altunyurt <sp...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-#include <helper/types.h>
-
-enum {
- NRF51_FLASH_BASE = 0x00000000,
-};
-
-enum nrf51_ficr_registers {
- NRF51_FICR_BASE = 0x10000000, /* Factory Information Configuration Registers */
-
-#define NRF51_FICR_REG(offset) (NRF51_FICR_BASE + offset)
-
- NRF51_FICR_CODEPAGESIZE = NRF51_FICR_REG(0x010),
- NRF51_FICR_CODESIZE = NRF51_FICR_REG(0x014),
- NRF51_FICR_CLENR0 = NRF51_FICR_REG(0x028),
- NRF51_FICR_PPFC = NRF51_FICR_REG(0x02C),
- NRF51_FICR_NUMRAMBLOCK = NRF51_FICR_REG(0x034),
- NRF51_FICR_SIZERAMBLOCK0 = NRF51_FICR_REG(0x038),
- NRF51_FICR_SIZERAMBLOCK1 = NRF51_FICR_REG(0x03C),
- NRF51_FICR_SIZERAMBLOCK2 = NRF51_FICR_REG(0x040),
- NRF51_FICR_SIZERAMBLOCK3 = NRF51_FICR_REG(0x044),
- NRF51_FICR_CONFIGID = NRF51_FICR_REG(0x05C),
- NRF51_FICR_DEVICEID0 = NRF51_FICR_REG(0x060),
- NRF51_FICR_DEVICEID1 = NRF51_FICR_REG(0x064),
- NRF51_FICR_ER0 = NRF51_FICR_REG(0x080),
- NRF51_FICR_ER1 = NRF51_FICR_REG(0x084),
- NRF51_FICR_ER2 = NRF51_FICR_REG(0x088),
- NRF51_FICR_ER3 = NRF51_FICR_REG(0x08C),
- NRF51_FICR_IR0 = NRF51_FICR_REG(0x090),
- NRF51_FICR_IR1 = NRF51_FICR_REG(0x094),
- NRF51_FICR_IR2 = NRF51_FICR_REG(0x098),
- NRF51_FICR_IR3 = NRF51_FICR_REG(0x09C),
- NRF51_FICR_DEVICEADDRTYPE = NRF51_FICR_REG(0x0A0),
- NRF51_FICR_DEVICEADDR0 = NRF51_FICR_REG(0x0A4),
- NRF51_FICR_DEVICEADDR1 = NRF51_FICR_REG(0x0A8),
- NRF51_FICR_OVERRIDEN = NRF51_FICR_REG(0x0AC),
- NRF51_FICR_NRF_1MBIT0 = NRF51_FICR_REG(0x0B0),
- NRF51_FICR_NRF_1MBIT1 = NRF51_FICR_REG(0x0B4),
- NRF51_FICR_NRF_1MBIT2 = NRF51_FICR_REG(0x0B8),
- NRF51_FICR_NRF_1MBIT3 = NRF51_FICR_REG(0x0BC),
- NRF51_FICR_NRF_1MBIT4 = NRF51_FICR_REG(0x0C0),
- NRF51_FICR_BLE_1MBIT0 = NRF51_FICR_REG(0x0EC),
- NRF51_FICR_BLE_1MBIT1 = NRF51_FICR_REG(0x0F0),
- NRF51_FICR_BLE_1MBIT2 = NRF51_FICR_REG(0x0F4),
- NRF51_FICR_BLE_1MBIT3 = NRF51_FICR_REG(0x0F8),
- NRF51_FICR_BLE_1MBIT4 = NRF51_FICR_REG(0x0FC),
-};
-
-enum nrf51_uicr_registers {
- NRF51_UICR_BASE = 0x10001000, /* User Information
- * Configuration Regsters */
-
- NRF51_UICR_SIZE = 0x100,
-
-#define NRF51_UICR_REG(offset) (NRF51_UICR_BASE + offset)
-
- NRF51_UICR_CLENR0 = NRF51_UICR_REG(0x000),
- NRF51_UICR_RBPCONF = NRF51_UICR_REG(0x004),
- NRF51_UICR_XTALFREQ = NRF51_UICR_REG(0x008),
- NRF51_UICR_FWID = NRF51_UICR_REG(0x010),
-};
-
-enum nrf51_nvmc_registers {
- NRF51_NVMC_BASE = 0x4001E000, /* Non-Volatile Memory
- * Controller Regsters */
-
-#define NRF51_NVMC_REG(offset) (NRF51_NVMC_BASE + offset)
-
- NRF51_NVMC_READY = NRF51_NVMC_REG(0x400),
- NRF51_NVMC_CONFIG = NRF51_NVMC_REG(0x504),
- NRF51_NVMC_ERASEPAGE = NRF51_NVMC_REG(0x508),
- NRF51_NVMC_ERASEALL = NRF51_NVMC_REG(0x50C),
- NRF51_NVMC_ERASEUICR = NRF51_NVMC_REG(0x514),
-};
-
-enum nrf51_nvmc_config_bits {
- NRF51_NVMC_CONFIG_REN = 0x00,
- NRF51_NVMC_CONFIG_WEN = 0x01,
- NRF51_NVMC_CONFIG_EEN = 0x02,
-
-};
-
-struct nrf51_info {
- uint32_t code_page_size;
- uint32_t code_memory_size;
-
- struct {
- bool probed;
- int (*write) (struct flash_bank *bank,
- struct nrf51_info *chip,
- const uint8_t *buffer, uint32_t offset, uint32_t count);
- } bank[2];
- struct target *target;
-};
-
-struct nrf51_device_spec {
- uint16_t hwid;
- const char *variant;
- const char *build_code;
- unsigned int flash_size_kb;
-};
-
-/* The known devices table below is derived from the "nRF51 Series
- * Compatibility Matrix" document, which can be found by searching for
- * ATTN-51 on the Nordic Semi website:
- *
- * http://www.nordicsemi.com/eng/content/search?SearchText=ATTN-51
- *
- * Up to date with Matrix v2.0, plus some additional HWIDs.
- *
- * The additional HWIDs apply where the build code in the matrix is
- * shown as Gx0, Bx0, etc. In these cases the HWID in the matrix is
- * for x==0, x!=0 means different (unspecified) HWIDs.
- */
-static const struct nrf51_device_spec nrf51_known_devices_table[] = {
- /* nRF51822 Devices (IC rev 1). */
- {
- .hwid = 0x001D,
- .variant = "QFAA",
- .build_code = "CA/C0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0026,
- .variant = "QFAB",
- .build_code = "AA",
- .flash_size_kb = 128,
- },
- {
- .hwid = 0x0027,
- .variant = "QFAB",
- .build_code = "A0",
- .flash_size_kb = 128,
- },
- {
- .hwid = 0x0020,
- .variant = "CEAA",
- .build_code = "BA",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x002F,
- .variant = "CEAA",
- .build_code = "B0",
- .flash_size_kb = 256,
- },
-
- /* nRF51822 Devices (IC rev 2). */
- {
- .hwid = 0x002A,
- .variant = "QFAA",
- .build_code = "FA0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0044,
- .variant = "QFAA",
- .build_code = "GC0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x003C,
- .variant = "QFAA",
- .build_code = "G0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0057,
- .variant = "QFAA",
- .build_code = "G2",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0058,
- .variant = "QFAA",
- .build_code = "G3",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x004C,
- .variant = "QFAB",
- .build_code = "B0",
- .flash_size_kb = 128,
- },
- {
- .hwid = 0x0040,
- .variant = "CEAA",
- .build_code = "CA0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0047,
- .variant = "CEAA",
- .build_code = "DA0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x004D,
- .variant = "CEAA",
- .build_code = "D00",
- .flash_size_kb = 256,
- },
-
- /* nRF51822 Devices (IC rev 3). */
- {
- .hwid = 0x0072,
- .variant = "QFAA",
- .build_code = "H0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x007B,
- .variant = "QFAB",
- .build_code = "C0",
- .flash_size_kb = 128,
- },
- {
- .hwid = 0x0083,
- .variant = "QFAC",
- .build_code = "A0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0084,
- .variant = "QFAC",
- .build_code = "A1",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x007D,
- .variant = "CDAB",
- .build_code = "A0",
- .flash_size_kb = 128,
- },
- {
- .hwid = 0x0079,
- .variant = "CEAA",
- .build_code = "E0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0087,
- .variant = "CFAC",
- .build_code = "A0",
- .flash_size_kb = 256,
- },
-
- /* nRF51422 Devices (IC rev 1). */
- {
- .hwid = 0x001E,
- .variant = "QFAA",
- .build_code = "CA",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0024,
- .variant = "QFAA",
- .build_code = "C0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0031,
- .variant = "CEAA",
- .build_code = "A0A",
- .flash_size_kb = 256,
- },
-
- /* nRF51422 Devices (IC rev 2). */
- {
- .hwid = 0x002D,
- .variant = "QFAA",
- .build_code = "DAA",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x002E,
- .variant = "QFAA",
- .build_code = "E0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0061,
- .variant = "QFAB",
- .build_code = "A00",
- .flash_size_kb = 128,
- },
- {
- .hwid = 0x0050,
- .variant = "CEAA",
- .build_code = "B0",
- .flash_size_kb = 256,
- },
-
- /* nRF51422 Devices (IC rev 3). */
- {
- .hwid = 0x0073,
- .variant = "QFAA",
- .build_code = "F0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x007C,
- .variant = "QFAB",
- .build_code = "B0",
- .flash_size_kb = 128,
- },
- {
- .hwid = 0x0085,
- .variant = "QFAC",
- .build_code = "A0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0086,
- .variant = "QFAC",
- .build_code = "A1",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x007E,
- .variant = "CDAB",
- .build_code = "A0",
- .flash_size_kb = 128,
- },
- {
- .hwid = 0x007A,
- .variant = "CEAA",
- .build_code = "C0",
- .flash_size_kb = 256,
- },
- {
- .hwid = 0x0088,
- .variant = "CFAC",
- .build_code = "A0",
- .flash_size_kb = 256,
- },
-
- /* Some early nRF51-DK (PCA10028) & nRF51-Dongle (PCA10031) boards
- with built-in jlink seem to use engineering samples not listed
- in the nRF51 Series Compatibility Matrix V1.0. */
- {
- .hwid = 0x0071,
- .variant = "QFAC",
- .build_code = "AB",
- .flash_size_kb = 256,
- },
-};
-
-static int nrf51_bank_is_probed(struct flash_bank *bank)
-{
- struct nrf51_info *chip = bank->driver_priv;
-
- assert(chip != NULL);
-
- return chip->bank[bank->bank_number].probed;
-}
-static int nrf51_probe(struct flash_bank *bank);
-
-static int nrf51_get_probed_chip_if_halted(struct flash_bank *bank, struct nrf51_info **chip)
-{
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- *chip = bank->driver_priv;
-
- int probed = nrf51_bank_is_probed(bank);
- if (probed < 0)
- return probed;
- else if (!probed)
- return nrf51_probe(bank);
- else
- return ERROR_OK;
-}
-
-static int nrf51_wait_for_nvmc(struct nrf51_info *chip)
-{
- uint32_t ready;
- int res;
- int timeout = 100;
-
- do {
- res = target_read_u32(chip->target, NRF51_NVMC_READY, &ready);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read NVMC_READY register");
- return res;
- }
-
- if (ready == 0x00000001)
- return ERROR_OK;
-
- alive_sleep(1);
- } while (timeout--);
-
- LOG_DEBUG("Timed out waiting for NVMC_READY");
- return ERROR_FLASH_BUSY;
-}
-
-static int nrf51_nvmc_erase_enable(struct nrf51_info *chip)
-{
- int res;
- res = target_write_u32(chip->target,
- NRF51_NVMC_CONFIG,
- NRF51_NVMC_CONFIG_EEN);
-
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to enable erase operation");
- return res;
- }
-
- /*
- According to NVMC examples in Nordic SDK busy status must be
- checked after writing to NVMC_CONFIG
- */
- res = nrf51_wait_for_nvmc(chip);
- if (res != ERROR_OK)
- LOG_ERROR("Erase enable did not complete");
-
- return res;
-}
-
-static int nrf51_nvmc_write_enable(struct nrf51_info *chip)
-{
- int res;
- res = target_write_u32(chip->target,
- NRF51_NVMC_CONFIG,
- NRF51_NVMC_CONFIG_WEN);
-
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to enable write operation");
- return res;
- }
-
- /*
- According to NVMC examples in Nordic SDK busy status must be
- checked after writing to NVMC_CONFIG
- */
- res = nrf51_wait_for_nvmc(chip);
- if (res != ERROR_OK)
- LOG_ERROR("Write enable did not complete");
-
- return res;
-}
-
-static int nrf51_nvmc_read_only(struct nrf51_info *chip)
-{
- int res;
- res = target_write_u32(chip->target,
- NRF51_NVMC_CONFIG,
- NRF51_NVMC_CONFIG_REN);
-
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to enable read-only operation");
- return res;
- }
- /*
- According to NVMC examples in Nordic SDK busy status must be
- checked after writing to NVMC_CONFIG
- */
- res = nrf51_wait_for_nvmc(chip);
- if (res != ERROR_OK)
- LOG_ERROR("Read only enable did not complete");
-
- return res;
-}
-
-static int nrf51_nvmc_generic_erase(struct nrf51_info *chip,
- uint32_t erase_register, uint32_t erase_value)
-{
- int res;
-
- res = nrf51_nvmc_erase_enable(chip);
- if (res != ERROR_OK)
- goto error;
-
- res = target_write_u32(chip->target,
- erase_register,
- erase_value);
- if (res != ERROR_OK)
- goto set_read_only;
-
- res = nrf51_wait_for_nvmc(chip);
- if (res != ERROR_OK)
- goto set_read_only;
-
- return nrf51_nvmc_read_only(chip);
-
-set_read_only:
- nrf51_nvmc_read_only(chip);
-error:
- LOG_ERROR("Failed to erase reg: 0x%08"PRIx32" val: 0x%08"PRIx32,
- erase_register, erase_value);
- return ERROR_FAIL;
-}
-
-static int nrf51_protect_check(struct flash_bank *bank)
-{
- int res;
- uint32_t clenr0;
-
- /* UICR cannot be write protected so just return early */
- if (bank->base == NRF51_UICR_BASE)
- return ERROR_OK;
-
- struct nrf51_info *chip = bank->driver_priv;
-
- assert(chip != NULL);
-
- res = target_read_u32(chip->target, NRF51_FICR_CLENR0,
- &clenr0);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code region 0 size[FICR]");
- return res;
- }
-
- if (clenr0 == 0xFFFFFFFF) {
- res = target_read_u32(chip->target, NRF51_UICR_CLENR0,
- &clenr0);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code region 0 size[UICR]");
- return res;
- }
- }
-
- for (int i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_protected =
- clenr0 != 0xFFFFFFFF && bank->sectors[i].offset < clenr0;
-
- return ERROR_OK;
-}
-
-static int nrf51_protect(struct flash_bank *bank, int set, int first, int last)
-{
- int res;
- uint32_t clenr0, ppfc;
- struct nrf51_info *chip;
-
- /* UICR cannot be write protected so just bail out early */
- if (bank->base == NRF51_UICR_BASE)
- return ERROR_FAIL;
-
- res = nrf51_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- if (first != 0) {
- LOG_ERROR("Code region 0 must start at the begining of the bank");
- return ERROR_FAIL;
- }
-
- res = target_read_u32(chip->target, NRF51_FICR_PPFC,
- &ppfc);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read PPFC register");
- return res;
- }
-
- if ((ppfc & 0xFF) == 0x00) {
- LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings");
- return ERROR_FAIL;
- }
-
- res = target_read_u32(chip->target, NRF51_UICR_CLENR0,
- &clenr0);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code region 0 size[UICR]");
- return res;
- }
-
- if (clenr0 == 0xFFFFFFFF) {
- res = target_write_u32(chip->target, NRF51_UICR_CLENR0,
- clenr0);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't write code region 0 size[UICR]");
- return res;
- }
-
- } else {
- LOG_ERROR("You need to perform chip erase before changing the protection settings");
- }
-
- nrf51_protect_check(bank);
-
- return ERROR_OK;
-}
-
-static int nrf51_probe(struct flash_bank *bank)
-{
- uint32_t hwid;
- int res;
- struct nrf51_info *chip = bank->driver_priv;
-
- res = target_read_u32(chip->target, NRF51_FICR_CONFIGID, &hwid);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read CONFIGID register");
- return res;
- }
-
- hwid &= 0xFFFF; /* HWID is stored in the lower two
- * bytes of the CONFIGID register */
-
- const struct nrf51_device_spec *spec = NULL;
- for (size_t i = 0; i < ARRAY_SIZE(nrf51_known_devices_table); i++)
- if (hwid == nrf51_known_devices_table[i].hwid) {
- spec = &nrf51_known_devices_table[i];
- break;
- }
-
- if (!chip->bank[0].probed && !chip->bank[1].probed) {
- if (spec)
- LOG_INFO("nRF51822-%s(build code: %s) %ukB Flash",
- spec->variant, spec->build_code, spec->flash_size_kb);
- else
- LOG_WARNING("Unknown device (HWID 0x%08" PRIx32 ")", hwid);
- }
-
-
- if (bank->base == NRF51_FLASH_BASE) {
- res = target_read_u32(chip->target, NRF51_FICR_CODEPAGESIZE,
- &chip->code_page_size);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code page size");
- return res;
- }
-
- res = target_read_u32(chip->target, NRF51_FICR_CODESIZE,
- &chip->code_memory_size);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code memory size");
- return res;
- }
-
- if (spec && chip->code_memory_size != spec->flash_size_kb) {
- LOG_ERROR("Chip's reported Flash capacity does not match expected one");
- return ERROR_FAIL;
- }
-
- bank->size = chip->code_memory_size * 1024;
- bank->num_sectors = bank->size / chip->code_page_size;
- bank->sectors = calloc(bank->num_sectors,
- sizeof((bank->sectors)[0]));
- if (!bank->sectors)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- /* Fill out the sector information: all NRF51 sectors are the same size and
- * there is always a fixed number of them. */
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].size = chip->code_page_size;
- bank->sectors[i].offset = i * chip->code_page_size;
-
- /* mark as unknown */
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- nrf51_protect_check(bank);
-
- chip->bank[0].probed = true;
- } else {
- bank->size = NRF51_UICR_SIZE;
- bank->num_sectors = 1;
- bank->sectors = calloc(bank->num_sectors,
- sizeof((bank->sectors)[0]));
- if (!bank->sectors)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- bank->sectors[0].size = bank->size;
- bank->sectors[0].offset = 0;
-
- /* mark as unknown */
- bank->sectors[0].is_erased = 0;
- bank->sectors[0].is_protected = 0;
-
- chip->bank[1].probed = true;
- }
-
- return ERROR_OK;
-}
-
-static int nrf51_auto_probe(struct flash_bank *bank)
-{
- int probed = nrf51_bank_is_probed(bank);
-
- if (probed < 0)
- return probed;
- else if (probed)
- return ERROR_OK;
- else
- return nrf51_probe(bank);
-}
-
-static struct flash_sector *nrf51_find_sector_by_address(struct flash_bank *bank, uint32_t address)
-{
- struct nrf51_info *chip = bank->driver_priv;
-
- for (int i = 0; i < bank->num_sectors; i++)
- if (bank->sectors[i].offset <= address &&
- address < (bank->sectors[i].offset + chip->code_page_size))
- return &bank->sectors[i];
- return NULL;
-}
-
-static int nrf51_erase_all(struct nrf51_info *chip)
-{
- LOG_DEBUG("Erasing all non-volatile memory");
- return nrf51_nvmc_generic_erase(chip,
- NRF51_NVMC_ERASEALL,
- 0x00000001);
-}
-
-static int nrf51_erase_page(struct flash_bank *bank,
- struct nrf51_info *chip,
- struct flash_sector *sector)
-{
- int res;
-
- LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset);
- if (sector->is_protected) {
- LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset);
- return ERROR_FAIL;
- }
-
- if (bank->base == NRF51_UICR_BASE) {
- uint32_t ppfc;
- res = target_read_u32(chip->target, NRF51_FICR_PPFC,
- &ppfc);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read PPFC register");
- return res;
- }
-
- if ((ppfc & 0xFF) == 0xFF) {
- /* We can't erase the UICR. Double-check to
- see if it's already erased before complaining. */
- default_flash_blank_check(bank);
- if (sector->is_erased == 1)
- return ERROR_OK;
-
- LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region");
- return ERROR_FAIL;
- }
-
- res = nrf51_nvmc_generic_erase(chip,
- NRF51_NVMC_ERASEUICR,
- 0x00000001);
-
-
- } else {
- res = nrf51_nvmc_generic_erase(chip,
- NRF51_NVMC_ERASEPAGE,
- sector->offset);
- }
-
- if (res == ERROR_OK)
- sector->is_erased = 1;
-
- return res;
-}
-
-static const uint8_t nrf51_flash_write_code[] = {
- /* See contrib/loaders/flash/cortex-m0.S */
-/* <wait_fifo>: */
- 0x0d, 0x68, /* ldr r5, [r1, #0] */
- 0x00, 0x2d, /* cmp r5, #0 */
- 0x0b, 0xd0, /* beq.n 1e <exit> */
- 0x4c, 0x68, /* ldr r4, [r1, #4] */
- 0xac, 0x42, /* cmp r4, r5 */
- 0xf9, 0xd0, /* beq.n 0 <wait_fifo> */
- 0x20, 0xcc, /* ldmia r4!, {r5} */
- 0x20, 0xc3, /* stmia r3!, {r5} */
- 0x94, 0x42, /* cmp r4, r2 */
- 0x01, 0xd3, /* bcc.n 18 <no_wrap> */
- 0x0c, 0x46, /* mov r4, r1 */
- 0x08, 0x34, /* adds r4, #8 */
-/* <no_wrap>: */
- 0x4c, 0x60, /* str r4, [r1, #4] */
- 0x04, 0x38, /* subs r0, #4 */
- 0xf0, 0xd1, /* bne.n 0 <wait_fifo> */
-/* <exit>: */
- 0x00, 0xbe /* bkpt 0x0000 */
-};
-
-
-/* Start a low level flash write for the specified region */
-static int nrf51_ll_flash_write(struct nrf51_info *chip, uint32_t offset, const uint8_t *buffer, uint32_t bytes)
-{
- struct target *target = chip->target;
- uint32_t buffer_size = 8192;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = NRF51_FLASH_BASE + offset;
- struct reg_param reg_params[4];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
-
- LOG_DEBUG("Writing buffer to flash offset=0x%"PRIx32" bytes=0x%"PRIx32, offset, bytes);
- assert(bytes % 4 == 0);
-
- /* allocate working area with flash programming code */
- if (target_alloc_working_area(target, sizeof(nrf51_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, falling back to slow memory writes");
-
- for (; bytes > 0; bytes -= 4) {
- retval = target_write_memory(chip->target, offset, 4, 1, buffer);
- if (retval != ERROR_OK)
- return retval;
-
- retval = nrf51_wait_for_nvmc(chip);
- if (retval != ERROR_OK)
- return retval;
-
- offset += 4;
- buffer += 4;
- }
-
- return ERROR_OK;
- }
-
- LOG_WARNING("using fast async flash loader. This is currently supported");
- LOG_WARNING("only with ST-Link and CMSIS-DAP. If you have issues, add");
- LOG_WARNING("\"set WORKAREASIZE 0\" before sourcing nrf51.cfg to disable it");
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(nrf51_flash_write_code),
- nrf51_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
- if (buffer_size <= 256) {
- /* free working area, write algorithm already allocated */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("No large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* byte count */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer start */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT); /* target address */
-
- buf_set_u32(reg_params[0].value, 0, 32, bytes);
- buf_set_u32(reg_params[1].value, 0, 32, source->address);
- buf_set_u32(reg_params[2].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[3].value, 0, 32, address);
-
- retval = target_run_flash_async_algorithm(target, buffer, bytes/4, 4,
- 0, NULL,
- 4, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
-
- return retval;
-}
-
-/* Check and erase flash sectors in specified range then start a low level page write.
- start/end must be sector aligned.
-*/
-static int nrf51_write_pages(struct flash_bank *bank, uint32_t start, uint32_t end, const uint8_t *buffer)
-{
- int res = ERROR_FAIL;
- struct nrf51_info *chip = bank->driver_priv;
- struct flash_sector *sector;
- uint32_t offset;
-
- assert(start % chip->code_page_size == 0);
- assert(end % chip->code_page_size == 0);
-
- /* Erase all sectors */
- for (offset = start; offset < end; offset += chip->code_page_size) {
- sector = nrf51_find_sector_by_address(bank, offset);
- if (!sector) {
- LOG_ERROR("Invalid sector @ 0x%08"PRIx32, offset);
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- if (sector->is_protected) {
- LOG_ERROR("Can't erase protected sector @ 0x%08"PRIx32, offset);
- goto error;
- }
-
- if (sector->is_erased != 1) { /* 1 = erased, 0= not erased, -1 = unknown */
- res = nrf51_erase_page(bank, chip, sector);
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to erase sector @ 0x%08"PRIx32, sector->offset);
- goto error;
- }
- }
- sector->is_erased = 0;
- }
-
- res = nrf51_nvmc_write_enable(chip);
- if (res != ERROR_OK)
- goto error;
-
- res = nrf51_ll_flash_write(chip, start, buffer, (end - start));
- if (res != ERROR_OK)
- goto set_read_only;
-
- return nrf51_nvmc_read_only(chip);
-
-set_read_only:
- nrf51_nvmc_read_only(chip);
-error:
- LOG_ERROR("Failed to write to nrf51 flash");
- return res;
-}
-
-static int nrf51_erase(struct flash_bank *bank, int first, int last)
-{
- int res;
- struct nrf51_info *chip;
-
- res = nrf51_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- /* For each sector to be erased */
- for (int s = first; s <= last && res == ERROR_OK; s++)
- res = nrf51_erase_page(bank, chip, &bank->sectors[s]);
-
- return res;
-}
-
-static int nrf51_code_flash_write(struct flash_bank *bank,
- struct nrf51_info *chip,
- const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
-
- int res;
- /* Need to perform reads to fill any gaps we need to preserve in the first page,
- before the start of buffer, or in the last page, after the end of buffer */
- uint32_t first_page = offset/chip->code_page_size;
- uint32_t last_page = DIV_ROUND_UP(offset+count, chip->code_page_size);
-
- uint32_t first_page_offset = first_page * chip->code_page_size;
- uint32_t last_page_offset = last_page * chip->code_page_size;
-
- LOG_DEBUG("Padding write from 0x%08"PRIx32"-0x%08"PRIx32" as 0x%08"PRIx32"-0x%08"PRIx32,
- offset, offset+count, first_page_offset, last_page_offset);
-
- uint32_t page_cnt = last_page - first_page;
- uint8_t buffer_to_flash[page_cnt*chip->code_page_size];
-
- /* Fill in any space between start of first page and start of buffer */
- uint32_t pre = offset - first_page_offset;
- if (pre > 0) {
- res = target_read_memory(bank->target,
- first_page_offset,
- 1,
- pre,
- buffer_to_flash);
- if (res != ERROR_OK)
- return res;
- }
-
- /* Fill in main contents of buffer */
- memcpy(buffer_to_flash+pre, buffer, count);
-
- /* Fill in any space between end of buffer and end of last page */
- uint32_t post = last_page_offset - (offset+count);
- if (post > 0) {
- /* Retrieve the full row contents from Flash */
- res = target_read_memory(bank->target,
- offset + count,
- 1,
- post,
- buffer_to_flash+pre+count);
- if (res != ERROR_OK)
- return res;
- }
-
- return nrf51_write_pages(bank, first_page_offset, last_page_offset, buffer_to_flash);
-}
-
-static int nrf51_uicr_flash_write(struct flash_bank *bank,
- struct nrf51_info *chip,
- const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- int res;
- uint8_t uicr[NRF51_UICR_SIZE];
- struct flash_sector *sector = &bank->sectors[0];
-
- if ((offset + count) > NRF51_UICR_SIZE)
- return ERROR_FAIL;
-
- res = target_read_memory(bank->target,
- NRF51_UICR_BASE,
- 1,
- NRF51_UICR_SIZE,
- uicr);
-
- if (res != ERROR_OK)
- return res;
-
- if (sector->is_erased != 1) {
- res = nrf51_erase_page(bank, chip, sector);
- if (res != ERROR_OK)
- return res;
- }
-
- res = nrf51_nvmc_write_enable(chip);
- if (res != ERROR_OK)
- return res;
-
- memcpy(&uicr[offset], buffer, count);
-
- res = nrf51_ll_flash_write(chip, NRF51_UICR_BASE, uicr, NRF51_UICR_SIZE);
- if (res != ERROR_OK) {
- nrf51_nvmc_read_only(chip);
- return res;
- }
-
- return nrf51_nvmc_read_only(chip);
-}
-
-
-static int nrf51_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- int res;
- struct nrf51_info *chip;
-
- res = nrf51_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- return chip->bank[bank->bank_number].write(bank, chip, buffer, offset, count);
-}
-
-
-FLASH_BANK_COMMAND_HANDLER(nrf51_flash_bank_command)
-{
- static struct nrf51_info *chip;
-
- switch (bank->base) {
- case NRF51_FLASH_BASE:
- bank->bank_number = 0;
- break;
- case NRF51_UICR_BASE:
- bank->bank_number = 1;
- break;
- default:
- LOG_ERROR("Invalid bank address 0x%08" PRIx32, bank->base);
- return ERROR_FAIL;
- }
-
- if (!chip) {
- /* Create a new chip */
- chip = calloc(1, sizeof(*chip));
- if (!chip)
- return ERROR_FAIL;
-
- chip->target = bank->target;
- }
-
- switch (bank->base) {
- case NRF51_FLASH_BASE:
- chip->bank[bank->bank_number].write = nrf51_code_flash_write;
- break;
- case NRF51_UICR_BASE:
- chip->bank[bank->bank_number].write = nrf51_uicr_flash_write;
- break;
- }
-
- chip->bank[bank->bank_number].probed = false;
- bank->driver_priv = chip;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(nrf51_handle_mass_erase_command)
-{
- int res;
- struct flash_bank *bank = NULL;
- struct target *target = get_current_target(CMD_CTX);
-
- res = get_flash_bank_by_addr(target, NRF51_FLASH_BASE, true, &bank);
- if (res != ERROR_OK)
- return res;
-
- assert(bank != NULL);
-
- struct nrf51_info *chip;
-
- res = nrf51_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- uint32_t ppfc;
-
- res = target_read_u32(target, NRF51_FICR_PPFC,
- &ppfc);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read PPFC register");
- return res;
- }
-
- if ((ppfc & 0xFF) == 0x00) {
- LOG_ERROR("Code region 0 size was pre-programmed at the factory, "
- "mass erase command won't work.");
- return ERROR_FAIL;
- }
-
- res = nrf51_erase_all(chip);
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to erase the chip");
- nrf51_protect_check(bank);
- return res;
- }
-
- for (int i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- res = nrf51_protect_check(bank);
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to check chip's write protection");
- return res;
- }
-
- res = get_flash_bank_by_addr(target, NRF51_UICR_BASE, true, &bank);
- if (res != ERROR_OK)
- return res;
-
- bank->sectors[0].is_erased = 1;
-
- return ERROR_OK;
-}
-
-static int nrf51_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- int res;
-
- struct nrf51_info *chip;
-
- res = nrf51_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- static struct {
- const uint32_t address;
- uint32_t value;
- } ficr[] = {
- { .address = NRF51_FICR_CODEPAGESIZE },
- { .address = NRF51_FICR_CODESIZE },
- { .address = NRF51_FICR_CLENR0 },
- { .address = NRF51_FICR_PPFC },
- { .address = NRF51_FICR_NUMRAMBLOCK },
- { .address = NRF51_FICR_SIZERAMBLOCK0 },
- { .address = NRF51_FICR_SIZERAMBLOCK1 },
- { .address = NRF51_FICR_SIZERAMBLOCK2 },
- { .address = NRF51_FICR_SIZERAMBLOCK3 },
- { .address = NRF51_FICR_CONFIGID },
- { .address = NRF51_FICR_DEVICEID0 },
- { .address = NRF51_FICR_DEVICEID1 },
- { .address = NRF51_FICR_ER0 },
- { .address = NRF51_FICR_ER1 },
- { .address = NRF51_FICR_ER2 },
- { .address = NRF51_FICR_ER3 },
- { .address = NRF51_FICR_IR0 },
- { .address = NRF51_FICR_IR1 },
- { .address = NRF51_FICR_IR2 },
- { .address = NRF51_FICR_IR3 },
- { .address = NRF51_FICR_DEVICEADDRTYPE },
- { .address = NRF51_FICR_DEVICEADDR0 },
- { .address = NRF51_FICR_DEVICEADDR1 },
- { .address = NRF51_FICR_OVERRIDEN },
- { .address = NRF51_FICR_NRF_1MBIT0 },
- { .address = NRF51_FICR_NRF_1MBIT1 },
- { .address = NRF51_FICR_NRF_1MBIT2 },
- { .address = NRF51_FICR_NRF_1MBIT3 },
- { .address = NRF51_FICR_NRF_1MBIT4 },
- { .address = NRF51_FICR_BLE_1MBIT0 },
- { .address = NRF51_FICR_BLE_1MBIT1 },
- { .address = NRF51_FICR_BLE_1MBIT2 },
- { .address = NRF51_FICR_BLE_1MBIT3 },
- { .address = NRF51_FICR_BLE_1MBIT4 },
- }, uicr[] = {
- { .address = NRF51_UICR_CLENR0, },
- { .address = NRF51_UICR_RBPCONF },
- { .address = NRF51_UICR_XTALFREQ },
- { .address = NRF51_UICR_FWID },
- };
-
- for (size_t i = 0; i < ARRAY_SIZE(ficr); i++) {
- res = target_read_u32(chip->target, ficr[i].address,
- &ficr[i].value);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read %" PRIx32, ficr[i].address);
- return res;
- }
- }
-
- for (size_t i = 0; i < ARRAY_SIZE(uicr); i++) {
- res = target_read_u32(chip->target, uicr[i].address,
- &uicr[i].value);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read %" PRIx32, uicr[i].address);
- return res;
- }
- }
-
- snprintf(buf, buf_size,
- "\n[factory information control block]\n\n"
- "code page size: %"PRIu32"B\n"
- "code memory size: %"PRIu32"kB\n"
- "code region 0 size: %"PRIu32"kB\n"
- "pre-programmed code: %s\n"
- "number of ram blocks: %"PRIu32"\n"
- "ram block 0 size: %"PRIu32"B\n"
- "ram block 1 size: %"PRIu32"B\n"
- "ram block 2 size: %"PRIu32"B\n"
- "ram block 3 size: %"PRIu32 "B\n"
- "config id: %" PRIx32 "\n"
- "device id: 0x%"PRIx32"%08"PRIx32"\n"
- "encryption root: 0x%08"PRIx32"%08"PRIx32"%08"PRIx32"%08"PRIx32"\n"
- "identity root: 0x%08"PRIx32"%08"PRIx32"%08"PRIx32"%08"PRIx32"\n"
- "device address type: 0x%"PRIx32"\n"
- "device address: 0x%"PRIx32"%08"PRIx32"\n"
- "override enable: %"PRIx32"\n"
- "NRF_1MBIT values: %"PRIx32" %"PRIx32" %"PRIx32" %"PRIx32" %"PRIx32"\n"
- "BLE_1MBIT values: %"PRIx32" %"PRIx32" %"PRIx32" %"PRIx32" %"PRIx32"\n"
- "\n[user information control block]\n\n"
- "code region 0 size: %"PRIu32"kB\n"
- "read back protection configuration: %"PRIx32"\n"
- "reset value for XTALFREQ: %"PRIx32"\n"
- "firmware id: 0x%04"PRIx32,
- ficr[0].value,
- ficr[1].value,
- (ficr[2].value == 0xFFFFFFFF) ? 0 : ficr[2].value / 1024,
- ((ficr[3].value & 0xFF) == 0x00) ? "present" : "not present",
- ficr[4].value,
- ficr[5].value,
- (ficr[6].value == 0xFFFFFFFF) ? 0 : ficr[6].value,
- (ficr[7].value == 0xFFFFFFFF) ? 0 : ficr[7].value,
- (ficr[8].value == 0xFFFFFFFF) ? 0 : ficr[8].value,
- ficr[9].value,
- ficr[10].value, ficr[11].value,
- ficr[12].value, ficr[13].value, ficr[14].value, ficr[15].value,
- ficr[16].value, ficr[17].value, ficr[18].value, ficr[19].value,
- ficr[20].value,
- ficr[21].value, ficr[22].value,
- ficr[23].value,
- ficr[24].value, ficr[25].value, ficr[26].value, ficr[27].value, ficr[28].value,
- ficr[29].value, ficr[30].value, ficr[31].value, ficr[32].value, ficr[33].value,
- (uicr[0].value == 0xFFFFFFFF) ? 0 : uicr[0].value / 1024,
- uicr[1].value & 0xFFFF,
- uicr[2].value & 0xFF,
- uicr[3].value & 0xFFFF);
-
- return ERROR_OK;
-}
-
-static const struct command_registration nrf51_exec_command_handlers[] = {
- {
- .name = "mass_erase",
- .handler = nrf51_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .help = "Erase all flash contents of the chip.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration nrf51_command_handlers[] = {
- {
- .name = "nrf51",
- .mode = COMMAND_ANY,
- .help = "nrf51 flash command group",
- .usage = "",
- .chain = nrf51_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver nrf51_flash = {
- .name = "nrf51",
- .commands = nrf51_command_handlers,
- .flash_bank_command = nrf51_flash_bank_command,
- .info = nrf51_info,
- .erase = nrf51_erase,
- .protect = nrf51_protect,
- .write = nrf51_write,
- .read = default_flash_read,
- .probe = nrf51_probe,
- .auto_probe = nrf51_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = nrf51_protect_check,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf52.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf52.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf52.c
deleted file mode 100644
index 778494c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf52.c
+++ /dev/null
@@ -1,1056 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 Synapse Product Development *
- * Andrey Smirnov <an...@...> *
- * Angus Gratton <gu...@...> *
- * Erdem U. Altunyurt <sp...@...> *
- * *
- * Ported nrf51 flash driver to the nrf52 Copyright (C) 2016 *
- * by Job Vranish <jv...@...> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-#include <helper/types.h>
-
-enum {
- NRF52_FLASH_BASE = 0x00000000,
-};
-
-enum nrf52_ficr_registers {
- NRF52_FICR_BASE = 0x10000000, /* Factory Information Configuration Registers */
-
-#define NRF52_FICR_REG(offset) (NRF52_FICR_BASE + offset)
-
- NRF52_FICR_CODEPAGESIZE = NRF52_FICR_REG(0x010),
- NRF52_FICR_CODESIZE = NRF52_FICR_REG(0x014),
- NRF52_FICR_CLENR0 = NRF52_FICR_REG(0x028),
- NRF52_FICR_PPFC = NRF52_FICR_REG(0x02C),
- NRF52_FICR_NUMRAMBLOCK = NRF52_FICR_REG(0x034),
- NRF52_FICR_SIZERAMBLOCK0 = NRF52_FICR_REG(0x038),
- NRF52_FICR_SIZERAMBLOCK1 = NRF52_FICR_REG(0x03C),
- NRF52_FICR_SIZERAMBLOCK2 = NRF52_FICR_REG(0x040),
- NRF52_FICR_SIZERAMBLOCK3 = NRF52_FICR_REG(0x044),
- NRF52_FICR_CONFIGID = NRF52_FICR_REG(0x05C),
- NRF52_FICR_DEVICEID0 = NRF52_FICR_REG(0x060),
- NRF52_FICR_DEVICEID1 = NRF52_FICR_REG(0x064),
- NRF52_FICR_ER0 = NRF52_FICR_REG(0x080),
- NRF52_FICR_ER1 = NRF52_FICR_REG(0x084),
- NRF52_FICR_ER2 = NRF52_FICR_REG(0x088),
- NRF52_FICR_ER3 = NRF52_FICR_REG(0x08C),
- NRF52_FICR_IR0 = NRF52_FICR_REG(0x090),
- NRF52_FICR_IR1 = NRF52_FICR_REG(0x094),
- NRF52_FICR_IR2 = NRF52_FICR_REG(0x098),
- NRF52_FICR_IR3 = NRF52_FICR_REG(0x09C),
- NRF52_FICR_DEVICEADDRTYPE = NRF52_FICR_REG(0x0A0),
- NRF52_FICR_DEVICEADDR0 = NRF52_FICR_REG(0x0A4),
- NRF52_FICR_DEVICEADDR1 = NRF52_FICR_REG(0x0A8),
-};
-
-enum nrf52_uicr_registers {
- NRF52_UICR_BASE = 0x10001000, /* User Information
- * Configuration Regsters */
-
- NRF52_UICR_SIZE = 0x100,
-
-#define NRF52_UICR_REG(offset) (NRF52_UICR_BASE + offset)
-
- NRF52_UICR_CLENR0 = NRF52_UICR_REG(0x000),
- NRF52_UICR_RBPCONF = NRF52_UICR_REG(0x004),
- NRF52_UICR_XTALFREQ = NRF52_UICR_REG(0x008),
- NRF52_UICR_FWID = NRF52_UICR_REG(0x010),
-};
-
-enum nrf52_nvmc_registers {
- NRF52_NVMC_BASE = 0x4001E000, /* Non-Volatile Memory
- * Controller Regsters */
-
-#define NRF52_NVMC_REG(offset) (NRF52_NVMC_BASE + offset)
-
- NRF52_NVMC_READY = NRF52_NVMC_REG(0x400),
- NRF52_NVMC_CONFIG = NRF52_NVMC_REG(0x504),
- NRF52_NVMC_ERASEPAGE = NRF52_NVMC_REG(0x508),
- NRF52_NVMC_ERASEALL = NRF52_NVMC_REG(0x50C),
- NRF52_NVMC_ERASEUICR = NRF52_NVMC_REG(0x514),
-};
-
-enum nrf52_nvmc_config_bits {
- NRF52_NVMC_CONFIG_REN = 0x00,
- NRF52_NVMC_CONFIG_WEN = 0x01,
- NRF52_NVMC_CONFIG_EEN = 0x02,
-
-};
-
-struct nrf52_info {
- uint32_t code_page_size;
- uint32_t code_memory_size;
-
- struct {
- bool probed;
- int (*write) (struct flash_bank *bank,
- struct nrf52_info *chip,
- const uint8_t *buffer, uint32_t offset, uint32_t count);
- } bank[2];
- struct target *target;
-};
-
-struct nrf52_device_spec {
- uint16_t hwid;
- // The following two fields are informational only
- const char *variant;
- const char *build_code;
- // This is used to verify flash size read from device registers matches
- // what's expected
- unsigned int flash_size_kb;
-};
-
-static const struct nrf52_device_spec nrf52_known_devices_table[] = {
- {
- .hwid = 0x0053,
- .variant = "QFAA",
- .build_code = "AA",
- .flash_size_kb = 512,
- },
-};
-
-static int nrf52_bank_is_probed(struct flash_bank *bank)
-{
- struct nrf52_info *chip = bank->driver_priv;
-
- assert(chip != NULL);
-
- return chip->bank[bank->bank_number].probed;
-}
-static int nrf52_probe(struct flash_bank *bank);
-
-static int nrf52_get_probed_chip_if_halted(struct flash_bank *bank, struct nrf52_info **chip)
-{
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- *chip = bank->driver_priv;
-
- int probed = nrf52_bank_is_probed(bank);
- if (probed < 0)
- return probed;
- else if (!probed)
- return nrf52_probe(bank);
- else
- return ERROR_OK;
-}
-
-static int nrf52_wait_for_nvmc(struct nrf52_info *chip)
-{
- uint32_t ready;
- int res;
- int timeout = 100;
-
- do {
- res = target_read_u32(chip->target, NRF52_NVMC_READY, &ready);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read NVMC_READY register");
- return res;
- }
-
- if (ready == 0x00000001)
- return ERROR_OK;
-
- alive_sleep(1);
- } while (timeout--);
-
- LOG_DEBUG("Timed out waiting for NVMC_READY");
- return ERROR_FLASH_BUSY;
-}
-
-static int nrf52_nvmc_erase_enable(struct nrf52_info *chip)
-{
- int res;
- res = target_write_u32(chip->target,
- NRF52_NVMC_CONFIG,
- NRF52_NVMC_CONFIG_EEN);
-
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to enable erase operation");
- return res;
- }
-
- /*
- According to NVMC examples in Nordic SDK busy status must be
- checked after writing to NVMC_CONFIG
- */
- res = nrf52_wait_for_nvmc(chip);
- if (res != ERROR_OK)
- LOG_ERROR("Erase enable did not complete");
-
- return res;
-}
-
-static int nrf52_nvmc_write_enable(struct nrf52_info *chip)
-{
- int res;
- res = target_write_u32(chip->target,
- NRF52_NVMC_CONFIG,
- NRF52_NVMC_CONFIG_WEN);
-
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to enable write operation");
- return res;
- }
-
- /*
- According to NVMC examples in Nordic SDK busy status must be
- checked after writing to NVMC_CONFIG
- */
- res = nrf52_wait_for_nvmc(chip);
- if (res != ERROR_OK)
- LOG_ERROR("Write enable did not complete");
-
- return res;
-}
-
-static int nrf52_nvmc_read_only(struct nrf52_info *chip)
-{
- int res;
- res = target_write_u32(chip->target,
- NRF52_NVMC_CONFIG,
- NRF52_NVMC_CONFIG_REN);
-
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to enable read-only operation");
- return res;
- }
- /*
- According to NVMC examples in Nordic SDK busy status must be
- checked after writing to NVMC_CONFIG
- */
- res = nrf52_wait_for_nvmc(chip);
- if (res != ERROR_OK)
- LOG_ERROR("Read only enable did not complete");
-
- return res;
-}
-
-static int nrf52_nvmc_generic_erase(struct nrf52_info *chip,
- uint32_t erase_register, uint32_t erase_value)
-{
- int res;
-
- res = nrf52_nvmc_erase_enable(chip);
- if (res != ERROR_OK)
- goto error;
-
- res = target_write_u32(chip->target,
- erase_register,
- erase_value);
- if (res != ERROR_OK)
- goto set_read_only;
-
- res = nrf52_wait_for_nvmc(chip);
- if (res != ERROR_OK)
- goto set_read_only;
-
- return nrf52_nvmc_read_only(chip);
-
-set_read_only:
- nrf52_nvmc_read_only(chip);
-error:
- LOG_ERROR("Failed to erase reg: 0x%08"PRIx32" val: 0x%08"PRIx32,
- erase_register, erase_value);
- return ERROR_FAIL;
-}
-
-static int nrf52_protect_check(struct flash_bank *bank)
-{
- int res;
- uint32_t clenr0;
-
- /* UICR cannot be write protected so just return early */
- if (bank->base == NRF52_UICR_BASE)
- return ERROR_OK;
-
- struct nrf52_info *chip = bank->driver_priv;
-
- assert(chip != NULL);
-
- res = target_read_u32(chip->target, NRF52_FICR_CLENR0,
- &clenr0);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code region 0 size[FICR]");
- return res;
- }
-
- if (clenr0 == 0xFFFFFFFF) {
- res = target_read_u32(chip->target, NRF52_UICR_CLENR0,
- &clenr0);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code region 0 size[UICR]");
- return res;
- }
- }
-
- for (int i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_protected =
- clenr0 != 0xFFFFFFFF && bank->sectors[i].offset < clenr0;
-
- return ERROR_OK;
-}
-
-static int nrf52_protect(struct flash_bank *bank, int set, int first, int last)
-{
- int res;
- uint32_t clenr0, ppfc;
- struct nrf52_info *chip;
-
- /* UICR cannot be write protected so just bail out early */
- if (bank->base == NRF52_UICR_BASE)
- return ERROR_FAIL;
-
- res = nrf52_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- if (first != 0) {
- LOG_ERROR("Code region 0 must start at the begining of the bank");
- return ERROR_FAIL;
- }
-
- res = target_read_u32(chip->target, NRF52_FICR_PPFC,
- &ppfc);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read PPFC register");
- return res;
- }
-
- if ((ppfc & 0xFF) == 0x00) {
- LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings");
- return ERROR_FAIL;
- };
-
- res = target_read_u32(chip->target, NRF52_UICR_CLENR0,
- &clenr0);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code region 0 size[UICR]");
- return res;
- }
-
- if (clenr0 == 0xFFFFFFFF) {
- res = target_write_u32(chip->target, NRF52_UICR_CLENR0,
- clenr0);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't write code region 0 size[UICR]");
- return res;
- }
-
- } else {
- LOG_ERROR("You need to perform chip erase before changing the protection settings");
- }
-
- nrf52_protect_check(bank);
-
- return ERROR_OK;
-}
-
-static int nrf52_probe(struct flash_bank *bank)
-{
- uint32_t hwid;
- int res;
- struct nrf52_info *chip = bank->driver_priv;
-
- res = target_read_u32(chip->target, NRF52_FICR_CONFIGID, &hwid);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read CONFIGID register");
- return res;
- }
-
- hwid &= 0xFFFF; /* HWID is stored in the lower two
- * bytes of the CONFIGID register */
-
- const struct nrf52_device_spec *spec = NULL;
- for (size_t i = 0; i < ARRAY_SIZE(nrf52_known_devices_table); i++)
- if (hwid == nrf52_known_devices_table[i].hwid) {
- spec = &nrf52_known_devices_table[i];
- break;
- }
-
- if (!chip->bank[0].probed && !chip->bank[1].probed) {
- if (spec)
- LOG_INFO("nRF51822-%s(build code: %s) %ukB Flash",
- spec->variant, spec->build_code, spec->flash_size_kb);
- else
- LOG_WARNING("Unknown device (HWID 0x%08" PRIx32 ")", hwid);
- }
-
-
- if (bank->base == NRF52_FLASH_BASE) {
- res = target_read_u32(chip->target, NRF52_FICR_CODEPAGESIZE,
- &chip->code_page_size);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code page size");
- return res;
- }
-
- res = target_read_u32(chip->target, NRF52_FICR_CODESIZE,
- &chip->code_memory_size);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read code memory size");
- return res;
- }
-
- bank->size = chip->code_memory_size * chip->code_page_size;
- bank->num_sectors = bank->size / chip->code_page_size;
- bank->sectors = calloc(bank->num_sectors,
- sizeof((bank->sectors)[0]));
- if (!bank->sectors)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- unsigned int code_memory_size_kb = bank->size / 1024;
-
- if (spec && code_memory_size_kb != spec->flash_size_kb) {
- LOG_INFO("Chip's reported Flash capacity (%ukB) di not match expected one (%ukB)", code_memory_size_kb, spec->flash_size_kb);
- return ERROR_FAIL;
- }
-
- /* Fill out the sector information: all NRF51 sectors are the same size and
- * there is always a fixed number of them. */
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].size = chip->code_page_size;
- bank->sectors[i].offset = i * chip->code_page_size;
-
- /* mark as unknown */
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- nrf52_protect_check(bank);
-
- chip->bank[0].probed = true;
- } else {
- bank->size = NRF52_UICR_SIZE;
- bank->num_sectors = 1;
- bank->sectors = calloc(bank->num_sectors,
- sizeof((bank->sectors)[0]));
- if (!bank->sectors)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- bank->sectors[0].size = bank->size;
- bank->sectors[0].offset = 0;
-
- /* mark as unknown */
- bank->sectors[0].is_erased = 0;
- bank->sectors[0].is_protected = 0;
-
- chip->bank[1].probed = true;
- }
-
- return ERROR_OK;
-}
-
-static int nrf52_auto_probe(struct flash_bank *bank)
-{
- int probed = nrf52_bank_is_probed(bank);
-
- if (probed < 0)
- return probed;
- else if (probed)
- return ERROR_OK;
- else
- return nrf52_probe(bank);
-}
-
-static struct flash_sector *nrf52_find_sector_by_address(struct flash_bank *bank, uint32_t address)
-{
- struct nrf52_info *chip = bank->driver_priv;
-
- for (int i = 0; i < bank->num_sectors; i++)
- if (bank->sectors[i].offset <= address &&
- address < (bank->sectors[i].offset + chip->code_page_size))
- return &bank->sectors[i];
- return NULL;
-}
-
-static int nrf52_erase_all(struct nrf52_info *chip)
-{
- LOG_DEBUG("Erasing all non-volatile memory");
- return nrf52_nvmc_generic_erase(chip,
- NRF52_NVMC_ERASEALL,
- 0x00000001);
-}
-
-static int nrf52_erase_page(struct flash_bank *bank,
- struct nrf52_info *chip,
- struct flash_sector *sector)
-{
- int res;
-
- LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset);
- if (sector->is_protected) {
- LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset);
- return ERROR_FAIL;
- }
-
- if (bank->base == NRF52_UICR_BASE) {
- uint32_t ppfc;
- res = target_read_u32(chip->target, NRF52_FICR_PPFC,
- &ppfc);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read PPFC register");
- return res;
- }
-
- if ((ppfc & 0xFF) == 0xFF) {
- /* We can't erase the UICR. Double-check to
- see if it's already erased before complaining. */
- default_flash_blank_check(bank);
- if (sector->is_erased == 1)
- return ERROR_OK;
-
- LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region");
- return ERROR_FAIL;
- };
-
- res = nrf52_nvmc_generic_erase(chip,
- NRF52_NVMC_ERASEUICR,
- 0x00000001);
-
-
- } else {
- res = nrf52_nvmc_generic_erase(chip,
- NRF52_NVMC_ERASEPAGE,
- sector->offset);
- }
-
- if (res == ERROR_OK)
- sector->is_erased = 1;
-
- return res;
-}
-
-static const uint8_t nrf52_flash_write_code[] = {
- /* See contrib/loaders/flash/cortex-m0.S */
-/* <wait_fifo>: */
- 0x0d, 0x68, /* ldr r5, [r1, #0] */
- 0x00, 0x2d, /* cmp r5, #0 */
- 0x0b, 0xd0, /* beq.n 1e <exit> */
- 0x4c, 0x68, /* ldr r4, [r1, #4] */
- 0xac, 0x42, /* cmp r4, r5 */
- 0xf9, 0xd0, /* beq.n 0 <wait_fifo> */
- 0x20, 0xcc, /* ldmia r4!, {r5} */
- 0x20, 0xc3, /* stmia r3!, {r5} */
- 0x94, 0x42, /* cmp r4, r2 */
- 0x01, 0xd3, /* bcc.n 18 <no_wrap> */
- 0x0c, 0x46, /* mov r4, r1 */
- 0x08, 0x34, /* adds r4, #8 */
-/* <no_wrap>: */
- 0x4c, 0x60, /* str r4, [r1, #4] */
- 0x04, 0x38, /* subs r0, #4 */
- 0xf0, 0xd1, /* bne.n 0 <wait_fifo> */
-/* <exit>: */
- 0x00, 0xbe /* bkpt 0x0000 */
-};
-
-
-/* Start a low level flash write for the specified region */
-static int nrf52_ll_flash_write(struct nrf52_info *chip, uint32_t offset, const uint8_t *buffer, uint32_t bytes)
-{
- struct target *target = chip->target;
- uint32_t buffer_size = 8192;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = NRF52_FLASH_BASE + offset;
- struct reg_param reg_params[4];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
-
- LOG_DEBUG("Writing buffer to flash offset=0x%"PRIx32" bytes=0x%"PRIx32, offset, bytes);
- assert(bytes % 4 == 0);
-
- /* allocate working area with flash programming code */
- if (target_alloc_working_area(target, sizeof(nrf52_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, falling back to slow memory writes");
-
- for (; bytes > 0; bytes -= 4) {
- retval = target_write_memory(chip->target, offset, 4, 1, buffer);
- if (retval != ERROR_OK)
- return retval;
-
- retval = nrf52_wait_for_nvmc(chip);
- if (retval != ERROR_OK)
- return retval;
-
- offset += 4;
- buffer += 4;
- }
-
- return ERROR_OK;
- }
-
- LOG_WARNING("using fast async flash loader. This is currently supported");
- LOG_WARNING("only with ST-Link and CMSIS-DAP. If you have issues, add");
- LOG_WARNING("\"set WORKAREASIZE 0\" before sourcing nrf52.cfg to disable it");
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(nrf52_flash_write_code),
- nrf52_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
- if (buffer_size <= 256) {
- /* free working area, write algorithm already allocated */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("No large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* byte count */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer start */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT); /* target address */
-
- buf_set_u32(reg_params[0].value, 0, 32, bytes);
- buf_set_u32(reg_params[1].value, 0, 32, source->address);
- buf_set_u32(reg_params[2].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[3].value, 0, 32, address);
-
- retval = target_run_flash_async_algorithm(target, buffer, bytes/4, 4,
- 0, NULL,
- 4, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
-
- return retval;
-}
-
-/* Check and erase flash sectors in specified range then start a low level page write.
- start/end must be sector aligned.
-*/
-static int nrf52_write_pages(struct flash_bank *bank, uint32_t start, uint32_t end, const uint8_t *buffer)
-{
- int res = ERROR_FAIL;
- struct nrf52_info *chip = bank->driver_priv;
- struct flash_sector *sector;
- uint32_t offset;
-
- assert(start % chip->code_page_size == 0);
- assert(end % chip->code_page_size == 0);
-
- /* Erase all sectors */
- for (offset = start; offset < end; offset += chip->code_page_size) {
- sector = nrf52_find_sector_by_address(bank, offset);
- if (!sector) {
- LOG_ERROR("Invalid sector @ 0x%08"PRIx32, offset);
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- if (sector->is_protected) {
- LOG_ERROR("Can't erase protected sector @ 0x%08"PRIx32, offset);
- goto error;
- }
-
- if (sector->is_erased != 1) { /* 1 = erased, 0= not erased, -1 = unknown */
- res = nrf52_erase_page(bank, chip, sector);
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to erase sector @ 0x%08"PRIx32, sector->offset);
- goto error;
- }
- }
- sector->is_erased = 0;
- }
-
- res = nrf52_nvmc_write_enable(chip);
- if (res != ERROR_OK)
- goto error;
-
- res = nrf52_ll_flash_write(chip, start, buffer, (end - start));
- if (res != ERROR_OK)
- goto set_read_only;
-
- return nrf52_nvmc_read_only(chip);
-
-set_read_only:
- nrf52_nvmc_read_only(chip);
-error:
- LOG_ERROR("Failed to write to nrf52 flash");
- return res;
-}
-
-static int nrf52_erase(struct flash_bank *bank, int first, int last)
-{
- int res;
- struct nrf52_info *chip;
-
- res = nrf52_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- /* For each sector to be erased */
- for (int s = first; s <= last && res == ERROR_OK; s++)
- res = nrf52_erase_page(bank, chip, &bank->sectors[s]);
-
- return res;
-}
-
-static int nrf52_code_flash_write(struct flash_bank *bank,
- struct nrf52_info *chip,
- const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
-
- int res;
- /* Need to perform reads to fill any gaps we need to preserve in the first page,
- before the start of buffer, or in the last page, after the end of buffer */
- uint32_t first_page = offset/chip->code_page_size;
- uint32_t last_page = DIV_ROUND_UP(offset+count, chip->code_page_size);
-
- uint32_t first_page_offset = first_page * chip->code_page_size;
- uint32_t last_page_offset = last_page * chip->code_page_size;
-
- LOG_DEBUG("Padding write from 0x%08"PRIx32"-0x%08"PRIx32" as 0x%08"PRIx32"-0x%08"PRIx32,
- offset, offset+count, first_page_offset, last_page_offset);
-
- uint32_t page_cnt = last_page - first_page;
- uint8_t buffer_to_flash[page_cnt*chip->code_page_size];
-
- /* Fill in any space between start of first page and start of buffer */
- uint32_t pre = offset - first_page_offset;
- if (pre > 0) {
- res = target_read_memory(bank->target,
- first_page_offset,
- 1,
- pre,
- buffer_to_flash);
- if (res != ERROR_OK)
- return res;
- }
-
- /* Fill in main contents of buffer */
- memcpy(buffer_to_flash+pre, buffer, count);
-
- /* Fill in any space between end of buffer and end of last page */
- uint32_t post = last_page_offset - (offset+count);
- if (post > 0) {
- /* Retrieve the full row contents from Flash */
- res = target_read_memory(bank->target,
- offset + count,
- 1,
- post,
- buffer_to_flash+pre+count);
- if (res != ERROR_OK)
- return res;
- }
-
- return nrf52_write_pages(bank, first_page_offset, last_page_offset, buffer_to_flash);
-}
-
-static int nrf52_uicr_flash_write(struct flash_bank *bank,
- struct nrf52_info *chip,
- const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- int res;
- uint8_t uicr[NRF52_UICR_SIZE];
- struct flash_sector *sector = &bank->sectors[0];
-
- if ((offset + count) > NRF52_UICR_SIZE)
- return ERROR_FAIL;
-
- res = target_read_memory(bank->target,
- NRF52_UICR_BASE,
- 1,
- NRF52_UICR_SIZE,
- uicr);
-
- if (res != ERROR_OK)
- return res;
-
- if (sector->is_erased != 1) {
- res = nrf52_erase_page(bank, chip, sector);
- if (res != ERROR_OK)
- return res;
- }
-
- res = nrf52_nvmc_write_enable(chip);
- if (res != ERROR_OK)
- return res;
-
- memcpy(&uicr[offset], buffer, count);
-
- res = nrf52_ll_flash_write(chip, NRF52_UICR_BASE, uicr, NRF52_UICR_SIZE);
- if (res != ERROR_OK) {
- nrf52_nvmc_read_only(chip);
- return res;
- }
-
- return nrf52_nvmc_read_only(chip);
-}
-
-
-static int nrf52_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- int res;
- struct nrf52_info *chip;
-
- res = nrf52_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- return chip->bank[bank->bank_number].write(bank, chip, buffer, offset, count);
-}
-
-
-FLASH_BANK_COMMAND_HANDLER(nrf52_flash_bank_command)
-{
- static struct nrf52_info *chip;
-
- switch (bank->base) {
- case NRF52_FLASH_BASE:
- bank->bank_number = 0;
- break;
- case NRF52_UICR_BASE:
- bank->bank_number = 1;
- break;
- default:
- LOG_ERROR("Invalid bank address 0x%08" PRIx32, bank->base);
- return ERROR_FAIL;
- }
-
- if (!chip) {
- /* Create a new chip */
- chip = calloc(1, sizeof(*chip));
- if (!chip)
- return ERROR_FAIL;
-
- chip->target = bank->target;
- }
-
- switch (bank->base) {
- case NRF52_FLASH_BASE:
- chip->bank[bank->bank_number].write = nrf52_code_flash_write;
- break;
- case NRF52_UICR_BASE:
- chip->bank[bank->bank_number].write = nrf52_uicr_flash_write;
- break;
- }
-
- chip->bank[bank->bank_number].probed = false;
- bank->driver_priv = chip;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(nrf52_handle_mass_erase_command)
-{
- int res;
- struct flash_bank *bank = NULL;
- struct target *target = get_current_target(CMD_CTX);
-
- res = get_flash_bank_by_addr(target, NRF52_FLASH_BASE, true, &bank);
- if (res != ERROR_OK)
- return res;
-
- assert(bank != NULL);
-
- struct nrf52_info *chip;
-
- res = nrf52_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- uint32_t ppfc;
-
- res = target_read_u32(target, NRF52_FICR_PPFC,
- &ppfc);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read PPFC register");
- return res;
- }
-
- if ((ppfc & 0xFF) == 0x00) {
- LOG_ERROR("Code region 0 size was pre-programmed at the factory, "
- "mass erase command won't work.");
- return ERROR_FAIL;
- };
-
- res = nrf52_erase_all(chip);
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to erase the chip");
- nrf52_protect_check(bank);
- return res;
- }
-
- for (int i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- res = nrf52_protect_check(bank);
- if (res != ERROR_OK) {
- LOG_ERROR("Failed to check chip's write protection");
- return res;
- }
-
- res = get_flash_bank_by_addr(target, NRF52_UICR_BASE, true, &bank);
- if (res != ERROR_OK)
- return res;
-
- bank->sectors[0].is_erased = 1;
-
- return ERROR_OK;
-}
-
-static int nrf52_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- int res;
-
- struct nrf52_info *chip;
-
- res = nrf52_get_probed_chip_if_halted(bank, &chip);
- if (res != ERROR_OK)
- return res;
-
- static struct {
- const uint32_t address;
- uint32_t value;
- } ficr[] = {
- { .address = NRF52_FICR_CODEPAGESIZE },
- { .address = NRF52_FICR_CODESIZE },
- { .address = NRF52_FICR_CLENR0 },
- { .address = NRF52_FICR_PPFC },
- { .address = NRF52_FICR_NUMRAMBLOCK },
- { .address = NRF52_FICR_SIZERAMBLOCK0 },
- { .address = NRF52_FICR_SIZERAMBLOCK1 },
- { .address = NRF52_FICR_SIZERAMBLOCK2 },
- { .address = NRF52_FICR_SIZERAMBLOCK3 },
- { .address = NRF52_FICR_CONFIGID },
- { .address = NRF52_FICR_DEVICEID0 },
- { .address = NRF52_FICR_DEVICEID1 },
- { .address = NRF52_FICR_ER0 },
- { .address = NRF52_FICR_ER1 },
- { .address = NRF52_FICR_ER2 },
- { .address = NRF52_FICR_ER3 },
- { .address = NRF52_FICR_IR0 },
- { .address = NRF52_FICR_IR1 },
- { .address = NRF52_FICR_IR2 },
- { .address = NRF52_FICR_IR3 },
- { .address = NRF52_FICR_DEVICEADDRTYPE },
- { .address = NRF52_FICR_DEVICEADDR0 },
- { .address = NRF52_FICR_DEVICEADDR1 },
- };
-
- for (size_t i = 0; i < ARRAY_SIZE(ficr); i++) {
- res = target_read_u32(chip->target, ficr[i].address,
- &ficr[i].value);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read %" PRIx32, ficr[i].address);
- return res;
- }
- }
-
- snprintf(buf, buf_size,
- "\n[factory information control block]\n\n"
- "code page size: %"PRIu32"B\n"
- "code memory size: %"PRIu32"kB\n"
- "code region 0 size: %"PRIu32"kB\n"
- "pre-programmed code: %s\n"
- "number of ram blocks: %"PRIu32"\n"
- "ram block 0 size: %"PRIu32"B\n"
- "ram block 1 size: %"PRIu32"B\n"
- "ram block 2 size: %"PRIu32"B\n"
- "ram block 3 size: %"PRIu32 "B\n"
- "config id: %" PRIx32 "\n"
- "device id: 0x%"PRIx32"%08"PRIx32"\n"
- "encryption root: 0x%08"PRIx32"%08"PRIx32"%08"PRIx32"%08"PRIx32"\n"
- "identity root: 0x%08"PRIx32"%08"PRIx32"%08"PRIx32"%08"PRIx32"\n"
- "device address type: 0x%"PRIx32"\n"
- "device address: 0x%"PRIx32"%08"PRIx32"\n",
- ficr[0].value,
- ficr[1].value,
- (ficr[2].value == 0xFFFFFFFF) ? 0 : ficr[2].value / 1024,
- ((ficr[3].value & 0xFF) == 0x00) ? "present" : "not present",
- ficr[4].value,
- ficr[5].value,
- (ficr[6].value == 0xFFFFFFFF) ? 0 : ficr[6].value,
- (ficr[7].value == 0xFFFFFFFF) ? 0 : ficr[7].value,
- (ficr[8].value == 0xFFFFFFFF) ? 0 : ficr[8].value,
- ficr[9].value,
- ficr[10].value, ficr[11].value,
- ficr[12].value, ficr[13].value, ficr[14].value, ficr[15].value,
- ficr[16].value, ficr[17].value, ficr[18].value, ficr[19].value,
- ficr[20].value,
- ficr[21].value, ficr[22].value);
-
- return ERROR_OK;
-}
-
-static const struct command_registration nrf52_exec_command_handlers[] = {
- {
- .name = "mass_erase",
- .handler = nrf52_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .help = "Erase all flash contents of the chip.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration nrf52_command_handlers[] = {
- {
- .name = "nrf52",
- .mode = COMMAND_ANY,
- .help = "nrf52 flash command group",
- .usage = "",
- .chain = nrf52_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver nrf52_flash = {
- .name = "nrf52",
- .commands = nrf52_command_handlers,
- .flash_bank_command = nrf52_flash_bank_command,
- .info = nrf52_info,
- .erase = nrf52_erase,
- .protect = nrf52_protect,
- .write = nrf52_write,
- .read = default_flash_read,
- .probe = nrf52_probe,
- .auto_probe = nrf52_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = nrf52_protect_check,
-};
[03/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/jtag.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/jtag.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/jtag.c
deleted file mode 100755
index 9f45ea7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/jtag.c
+++ /dev/null
@@ -1,723 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#include "jtag.h"
-
-#include "io.h"
-#include "msgtypes.h"
-#include "common.h"
-
-#include <stdbool.h>
-
-/** Delay value for SCAN_IN operations with less than maximum TCK frequency */
-uint8_t delay_scan_in;
-
-/** Delay value for SCAN_OUT operations with less than maximum TCK frequency */
-uint8_t delay_scan_out;
-
-/** Delay value for SCAN_IO operations with less than maximum TCK frequency */
-uint8_t delay_scan_io;
-
-/** Delay value for CLOCK_TCK operations with less than maximum frequency */
-uint8_t delay_tck;
-
-/** Delay value for CLOCK_TMS operations with less than maximum frequency */
-uint8_t delay_tms;
-
-/**
- * Perform JTAG SCAN-IN operation at maximum TCK frequency.
- *
- * Dummy data is shifted into the JTAG chain via TDI, TDO data is sampled and
- * stored in the EP2 IN buffer.
- *
- * Maximum achievable TCK frequency is 182 kHz for ULINK clocked at 24 MHz.
- *
- * @param out_offset offset in OUT2BUF where payload data starts
- */
-void jtag_scan_in(uint8_t out_offset, uint8_t in_offset)
-{
- uint8_t scan_size_bytes, bits_last_byte;
- uint8_t tms_count_start, tms_count_end;
- uint8_t tms_sequence_start, tms_sequence_end;
- uint8_t tdo_data, i, j;
-
- uint8_t outb_buffer;
-
- /* Get parameters from OUT2BUF */
- scan_size_bytes = OUT2BUF[out_offset];
- bits_last_byte = OUT2BUF[out_offset + 1];
- tms_count_start = (OUT2BUF[out_offset + 2] >> 4) & 0x0F;
- tms_count_end = OUT2BUF[out_offset + 2] & 0x0F;
- tms_sequence_start = OUT2BUF[out_offset + 3];
- tms_sequence_end = OUT2BUF[out_offset + 4];
-
- if (tms_count_start > 0)
- jtag_clock_tms(tms_count_start, tms_sequence_start);
-
- outb_buffer = OUTB & ~(PIN_TDI | PIN_TCK | PIN_TMS);
-
- /* Shift all bytes except the last byte */
- for (i = 0; i < scan_size_bytes - 1; i++) {
- tdo_data = 0;
-
- for (j = 0; j < 8; j++) {
- OUTB = outb_buffer; /* TCK changes here */
- tdo_data = tdo_data >> 1;
- OUTB = (outb_buffer | PIN_TCK);
-
- if (GET_TDO())
- tdo_data |= 0x80;
- }
-
- /* Copy TDO data to IN2BUF */
- IN2BUF[i + in_offset] = tdo_data;
- }
-
- tdo_data = 0;
-
- /* Shift the last byte */
- for (j = 0; j < bits_last_byte; j++) {
- /* Assert TMS signal if requested and this is the last bit */
- if ((j == bits_last_byte - 1) && (tms_count_end > 0)) {
- outb_buffer |= PIN_TMS;
- tms_count_end--;
- tms_sequence_end = tms_sequence_end >> 1;
- }
-
- OUTB = outb_buffer; /* TCK changes here */
- tdo_data = tdo_data >> 1;
- OUTB = (outb_buffer | PIN_TCK);
-
- if (GET_TDO())
- tdo_data |= 0x80;
- }
- tdo_data = tdo_data >> (8 - bits_last_byte);
-
- /* Copy TDO data to IN2BUF */
- IN2BUF[i + in_offset] = tdo_data;
-
- /* Move to correct end state */
- if (tms_count_end > 0)
- jtag_clock_tms(tms_count_end, tms_sequence_end);
-}
-
-/**
- * Perform JTAG SCAN-IN operation at variable TCK frequency.
- *
- * Dummy data is shifted into the JTAG chain via TDI, TDO data is sampled and
- * stored in the EP2 IN buffer.
- *
- * Maximum achievable TCK frequency is 113 kHz for ULINK clocked at 24 MHz.
- *
- * @param out_offset offset in OUT2BUF where payload data starts
- */
-void jtag_slow_scan_in(uint8_t out_offset, uint8_t in_offset)
-{
- uint8_t scan_size_bytes, bits_last_byte;
- uint8_t tms_count_start, tms_count_end;
- uint8_t tms_sequence_start, tms_sequence_end;
- uint8_t tdo_data, i, j, k;
-
- uint8_t outb_buffer;
-
- /* Get parameters from OUT2BUF */
- scan_size_bytes = OUT2BUF[out_offset];
- bits_last_byte = OUT2BUF[out_offset + 1];
- tms_count_start = (OUT2BUF[out_offset + 2] >> 4) & 0x0F;
- tms_count_end = OUT2BUF[out_offset + 2] & 0x0F;
- tms_sequence_start = OUT2BUF[out_offset + 3];
- tms_sequence_end = OUT2BUF[out_offset + 4];
-
- if (tms_count_start > 0)
- jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
-
- outb_buffer = OUTB & ~(PIN_TDI | PIN_TCK | PIN_TMS);
-
- /* Shift all bytes except the last byte */
- for (i = 0; i < scan_size_bytes - 1; i++) {
- tdo_data = 0;
-
- for (j = 0; j < 8; j++) {
- OUTB = outb_buffer; /* TCK changes here */
- for (k = 0; k < delay_scan_in; k++)
- ;
- tdo_data = tdo_data >> 1;
-
- OUTB = (outb_buffer | PIN_TCK);
- for (k = 0; k < delay_scan_in; k++)
- ;
-
- if (GET_TDO())
- tdo_data |= 0x80;
- }
-
- /* Copy TDO data to IN2BUF */
- IN2BUF[i + in_offset] = tdo_data;
- }
-
- tdo_data = 0;
-
- /* Shift the last byte */
- for (j = 0; j < bits_last_byte; j++) {
- /* Assert TMS signal if requested and this is the last bit */
- if ((j == bits_last_byte - 1) && (tms_count_end > 0)) {
- outb_buffer |= PIN_TMS;
- tms_count_end--;
- tms_sequence_end = tms_sequence_end >> 1;
- }
-
- OUTB = outb_buffer; /* TCK changes here */
- for (k = 0; k < delay_scan_in; k++)
- ;
- tdo_data = tdo_data >> 1;
-
- OUTB = (outb_buffer | PIN_TCK);
- for (k = 0; k < delay_scan_in; k++)
- ;
-
- if (GET_TDO())
- tdo_data |= 0x80;
- }
- tdo_data = tdo_data >> (8 - bits_last_byte);
-
- /* Copy TDO data to IN2BUF */
- IN2BUF[i + in_offset] = tdo_data;
-
- /* Move to correct end state */
- if (tms_count_end > 0)
- jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
-}
-
-/**
- * Perform JTAG SCAN-OUT operation at maximum TCK frequency.
- *
- * Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
- * data is not sampled.
- * The TAP-FSM state is alyways left in the PAUSE-DR/PAUSE-IR state.
- *
- * Maximum achievable TCK frequency is 142 kHz for ULINK clocked at 24 MHz.
- *
- * @param out_offset offset in OUT2BUF where payload data starts
- */
-void jtag_scan_out(uint8_t out_offset)
-{
- uint8_t scan_size_bytes, bits_last_byte;
- uint8_t tms_count_start, tms_count_end;
- uint8_t tms_sequence_start, tms_sequence_end;
- uint8_t tdi_data, i, j;
-
- uint8_t outb_buffer;
-
- /* Get parameters from OUT2BUF */
- scan_size_bytes = OUT2BUF[out_offset];
- bits_last_byte = OUT2BUF[out_offset + 1];
- tms_count_start = (OUT2BUF[out_offset + 2] >> 4) & 0x0F;
- tms_count_end = OUT2BUF[out_offset + 2] & 0x0F;
- tms_sequence_start = OUT2BUF[out_offset + 3];
- tms_sequence_end = OUT2BUF[out_offset + 4];
-
- if (tms_count_start > 0)
- jtag_clock_tms(tms_count_start, tms_sequence_start);
-
- outb_buffer = OUTB & ~(PIN_TCK | PIN_TMS);
-
- /* Shift all bytes except the last byte */
- for (i = 0; i < scan_size_bytes - 1; i++) {
- tdi_data = OUT2BUF[i + out_offset + 5];
-
- for (j = 0; j < 8; j++) {
- if (tdi_data & 0x01)
- outb_buffer |= PIN_TDI;
- else
- outb_buffer &= ~PIN_TDI;
-
- OUTB = outb_buffer; /* TDI and TCK change here */
- tdi_data = tdi_data >> 1;
- OUTB = (outb_buffer | PIN_TCK);
- }
- }
-
- tdi_data = OUT2BUF[i + out_offset + 5];
-
- /* Shift the last byte */
- for (j = 0; j < bits_last_byte; j++) {
- if (tdi_data & 0x01)
- outb_buffer |= PIN_TDI;
- else
- outb_buffer &= ~PIN_TDI;
-
- /* Assert TMS signal if requested and this is the last bit */
- if ((j == bits_last_byte - 1) && (tms_count_end > 0)) {
- outb_buffer |= PIN_TMS;
- tms_count_end--;
- tms_sequence_end = tms_sequence_end >> 1;
- }
-
- OUTB = outb_buffer; /* TDI and TCK change here */
- tdi_data = tdi_data >> 1;
- OUTB = (outb_buffer | PIN_TCK);
- }
-
- /* Move to correct end state */
- if (tms_count_end > 0)
- jtag_clock_tms(tms_count_end, tms_sequence_end);
-}
-
-/**
- * Perform JTAG SCAN-OUT operation at maximum TCK frequency.
- *
- * Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
- * data is not sampled.
- * The TAP-FSM state is alyways left in the PAUSE-DR/PAUSE-IR state.
- *
- * Maximum achievable TCK frequency is 97 kHz for ULINK clocked at 24 MHz.
- *
- * @param out_offset offset in OUT2BUF where payload data starts
- */
-void jtag_slow_scan_out(uint8_t out_offset)
-{
- uint8_t scan_size_bytes, bits_last_byte;
- uint8_t tms_count_start, tms_count_end;
- uint8_t tms_sequence_start, tms_sequence_end;
- uint8_t tdi_data, i, j, k;
-
- uint8_t outb_buffer;
-
- /* Get parameters from OUT2BUF */
- scan_size_bytes = OUT2BUF[out_offset];
- bits_last_byte = OUT2BUF[out_offset + 1];
- tms_count_start = (OUT2BUF[out_offset + 2] >> 4) & 0x0F;
- tms_count_end = OUT2BUF[out_offset + 2] & 0x0F;
- tms_sequence_start = OUT2BUF[out_offset + 3];
- tms_sequence_end = OUT2BUF[out_offset + 4];
-
- if (tms_count_start > 0)
- jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
-
- outb_buffer = OUTB & ~(PIN_TCK | PIN_TMS);
-
- /* Shift all bytes except the last byte */
- for (i = 0; i < scan_size_bytes - 1; i++) {
- tdi_data = OUT2BUF[i + out_offset + 5];
-
- for (j = 0; j < 8; j++) {
- if (tdi_data & 0x01)
- outb_buffer |= PIN_TDI;
- else
- outb_buffer &= ~PIN_TDI;
-
- OUTB = outb_buffer; /* TDI and TCK change here */
- for (k = 0; k < delay_scan_out; k++)
- ;
- tdi_data = tdi_data >> 1;
-
- OUTB = (outb_buffer | PIN_TCK);
- for (k = 0; k < delay_scan_out; k++)
- ;
- }
- }
-
- tdi_data = OUT2BUF[i + out_offset + 5];
-
- /* Shift the last byte */
- for (j = 0; j < bits_last_byte; j++) {
- if (tdi_data & 0x01)
- outb_buffer |= PIN_TDI;
- else
- outb_buffer &= ~PIN_TDI;
-
- /* Assert TMS signal if requested and this is the last bit */
- if ((j == bits_last_byte - 1) && (tms_count_end > 0)) {
- outb_buffer |= PIN_TMS;
- tms_count_end--;
- tms_sequence_end = tms_sequence_end >> 1;
- }
-
- OUTB = outb_buffer; /* TDI and TCK change here */
- for (k = 0; k < delay_scan_out; k++)
- ;
- tdi_data = tdi_data >> 1;
-
- OUTB = (outb_buffer | PIN_TCK);
- for (k = 0; k < delay_scan_out; k++)
- ;
- }
-
- /* Move to correct end state */
- if (tms_count_end > 0)
- jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
-}
-
-/**
- * Perform bidirectional JTAG SCAN operation at maximum TCK frequency.
- *
- * Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
- * data is sampled and stored in the EP2 IN buffer.
- * The TAP-FSM state is alyways left in the PAUSE-DR/PAUSE-IR state.
- *
- * Maximum achievable TCK frequency is 100 kHz for ULINK clocked at 24 MHz.
- *
- * @param out_offset offset in OUT2BUF where payload data starts
- */
-void jtag_scan_io(uint8_t out_offset, uint8_t in_offset)
-{
- uint8_t scan_size_bytes, bits_last_byte;
- uint8_t tms_count_start, tms_count_end;
- uint8_t tms_sequence_start, tms_sequence_end;
- uint8_t tdi_data, tdo_data, i, j;
-
- uint8_t outb_buffer;
-
- /* Get parameters from OUT2BUF */
- scan_size_bytes = OUT2BUF[out_offset];
- bits_last_byte = OUT2BUF[out_offset + 1];
- tms_count_start = (OUT2BUF[out_offset + 2] >> 4) & 0x0F;
- tms_count_end = OUT2BUF[out_offset + 2] & 0x0F;
- tms_sequence_start = OUT2BUF[out_offset + 3];
- tms_sequence_end = OUT2BUF[out_offset + 4];
-
- if (tms_count_start > 0)
- jtag_clock_tms(tms_count_start, tms_sequence_start);
-
- outb_buffer = OUTB & ~(PIN_TCK | PIN_TMS);
-
- /* Shift all bytes except the last byte */
- for (i = 0; i < scan_size_bytes - 1; i++) {
- tdi_data = OUT2BUF[i + out_offset + 5];
- tdo_data = 0;
-
- for (j = 0; j < 8; j++) {
- if (tdi_data & 0x01)
- outb_buffer |= PIN_TDI;
- else
- outb_buffer &= ~PIN_TDI;
-
- OUTB = outb_buffer; /* TDI and TCK change here */
- tdi_data = tdi_data >> 1;
- OUTB = (outb_buffer | PIN_TCK);
- tdo_data = tdo_data >> 1;
-
- if (GET_TDO())
- tdo_data |= 0x80;
- }
-
- /* Copy TDO data to IN2BUF */
- IN2BUF[i + in_offset] = tdo_data;
- }
-
- tdi_data = OUT2BUF[i + out_offset + 5];
- tdo_data = 0;
-
- /* Shift the last byte */
- for (j = 0; j < bits_last_byte; j++) {
- if (tdi_data & 0x01)
- outb_buffer |= PIN_TDI;
- else
- outb_buffer &= ~PIN_TDI;
-
- /* Assert TMS signal if requested and this is the last bit */
- if ((j == bits_last_byte - 1) && (tms_count_end > 0)) {
- outb_buffer |= PIN_TMS;
- tms_count_end--;
- tms_sequence_end = tms_sequence_end >> 1;
- }
-
- OUTB = outb_buffer; /* TDI and TCK change here */
- tdi_data = tdi_data >> 1;
- OUTB = (outb_buffer | PIN_TCK);
- tdo_data = tdo_data >> 1;
-
- if (GET_TDO())
- tdo_data |= 0x80;
- }
- tdo_data = tdo_data >> (8 - bits_last_byte);
-
- /* Copy TDO data to IN2BUF */
- IN2BUF[i + in_offset] = tdo_data;
-
- /* Move to correct end state */
- if (tms_count_end > 0)
- jtag_clock_tms(tms_count_end, tms_sequence_end);
-}
-
-/**
- * Perform bidirectional JTAG SCAN operation at maximum TCK frequency.
- *
- * Data stored in EP2 OUT buffer is shifted into the JTAG chain via TDI, TDO
- * data is sampled and stored in the EP2 IN buffer.
- * The TAP-FSM state is alyways left in the PAUSE-DR/PAUSE-IR state.
- *
- * Maximum achievable TCK frequency is 78 kHz for ULINK clocked at 24 MHz.
- *
- * @param out_offset offset in OUT2BUF where payload data starts
- */
-void jtag_slow_scan_io(uint8_t out_offset, uint8_t in_offset)
-{
- uint8_t scan_size_bytes, bits_last_byte;
- uint8_t tms_count_start, tms_count_end;
- uint8_t tms_sequence_start, tms_sequence_end;
- uint8_t tdi_data, tdo_data, i, j, k;
-
- uint8_t outb_buffer;
-
- /* Get parameters from OUT2BUF */
- scan_size_bytes = OUT2BUF[out_offset];
- bits_last_byte = OUT2BUF[out_offset + 1];
- tms_count_start = (OUT2BUF[out_offset + 2] >> 4) & 0x0F;
- tms_count_end = OUT2BUF[out_offset + 2] & 0x0F;
- tms_sequence_start = OUT2BUF[out_offset + 3];
- tms_sequence_end = OUT2BUF[out_offset + 4];
-
- if (tms_count_start > 0)
- jtag_slow_clock_tms(tms_count_start, tms_sequence_start);
-
- outb_buffer = OUTB & ~(PIN_TCK | PIN_TMS);
-
- /* Shift all bytes except the last byte */
- for (i = 0; i < scan_size_bytes - 1; i++) {
- tdi_data = OUT2BUF[i + out_offset + 5];
- tdo_data = 0;
-
- for (j = 0; j < 8; j++) {
- if (tdi_data & 0x01)
- outb_buffer |= PIN_TDI;
- else
- outb_buffer &= ~PIN_TDI;
-
- OUTB = outb_buffer; /* TDI and TCK change here */
- for (k = 0; k < delay_scan_io; k++)
- ;
- tdi_data = tdi_data >> 1;
-
- OUTB = (outb_buffer | PIN_TCK);
- for (k = 0; k < delay_scan_io; k++)
- ;
- tdo_data = tdo_data >> 1;
-
- if (GET_TDO())
- tdo_data |= 0x80;
- }
-
- /* Copy TDO data to IN2BUF */
- IN2BUF[i + in_offset] = tdo_data;
- }
-
- tdi_data = OUT2BUF[i + out_offset + 5];
- tdo_data = 0;
-
- /* Shift the last byte */
- for (j = 0; j < bits_last_byte; j++) {
- if (tdi_data & 0x01)
- outb_buffer |= PIN_TDI;
- else
- outb_buffer &= ~PIN_TDI;
-
- /* Assert TMS signal if requested and this is the last bit */
- if ((j == bits_last_byte - 1) && (tms_count_end > 0)) {
- outb_buffer |= PIN_TMS;
- tms_count_end--;
- tms_sequence_end = tms_sequence_end >> 1;
- }
-
- OUTB = outb_buffer; /* TDI and TCK change here */
- for (k = 0; k < delay_scan_io; k++)
- ;
- tdi_data = tdi_data >> 1;
-
- OUTB = (outb_buffer | PIN_TCK);
- for (k = 0; k < delay_scan_io; k++)
- ;
- tdo_data = tdo_data >> 1;
-
- if (GET_TDO())
- tdo_data |= 0x80;
- }
- tdo_data = tdo_data >> (8 - bits_last_byte);
-
- /* Copy TDO data to IN2BUF */
- IN2BUF[i + in_offset] = tdo_data;
-
- /* Move to correct end state */
- if (tms_count_end > 0)
- jtag_slow_clock_tms(tms_count_end, tms_sequence_end);
-}
-
-/**
- * Generate TCK clock cycles.
- *
- * Maximum achievable TCK frequency is 375 kHz for ULINK clocked at 24 MHz.
- *
- * @param count number of TCK clock cyclces to generate.
- */
-void jtag_clock_tck(uint16_t count)
-{
- uint16_t i;
- uint8_t outb_buffer = OUTB & ~(PIN_TCK);
-
- for (i = 0; i < count; i++) {
- OUTB = outb_buffer;
- OUTB = outb_buffer | PIN_TCK;
- }
-}
-
-/**
- * Generate TCK clock cycles at variable frequency.
- *
- * Maximum achieveable TCK frequency is 166.6 kHz for ULINK clocked at 24 MHz.
- *
- * @param count number of TCK clock cyclces to generate.
- */
-void jtag_slow_clock_tck(uint16_t count)
-{
- uint16_t i;
- uint8_t j;
- uint8_t outb_buffer = OUTB & ~(PIN_TCK);
-
- for (i = 0; i < count; i++) {
- OUTB = outb_buffer;
- for (j = 0; j < delay_tck; j++)
- ;
- OUTB = outb_buffer | PIN_TCK;
- for (j = 0; j < delay_tck; j++)
- ;
- }
-}
-
-/**
- * Perform TAP FSM state transitions at maximum TCK frequency.
- *
- * Maximum achievable TCK frequency is 176 kHz for ULINK clocked at 24 MHz.
- *
- * @param count the number of state transitions to perform.
- * @param sequence the TMS pin levels for each state transition, starting with
- * the least-significant bit.
- */
-void jtag_clock_tms(uint8_t count, uint8_t sequence)
-{
- uint8_t outb_buffer = OUTB & ~(PIN_TCK);
- uint8_t i;
-
- for (i = 0; i < count; i++) {
- /* Set TMS pin according to sequence parameter */
- if (sequence & 0x1)
- outb_buffer |= PIN_TMS;
- else
- outb_buffer &= ~PIN_TMS;
-
- OUTB = outb_buffer;
- sequence = sequence >> 1;
- OUTB = outb_buffer | PIN_TCK;
- }
-}
-
-/**
- * Perform TAP-FSM state transitions at less than maximum TCK frequency.
- *
- * Maximum achievable TCK frequency is 117 kHz for ULINK clocked at 24 MHz.
- *
- * @param count the number of state transitions to perform.
- * @param sequence the TMS pin levels for each state transition, starting with
- * the least-significant bit.
- */
-void jtag_slow_clock_tms(uint8_t count, uint8_t sequence)
-{
- uint8_t outb_buffer = OUTB & ~(PIN_TCK);
- uint8_t i, j;
-
- for (i = 0; i < count; i++) {
- /* Set TMS pin according to sequence parameter */
- if (sequence & 0x1)
- outb_buffer |= PIN_TMS;
- else
- outb_buffer &= ~PIN_TMS;
-
- OUTB = outb_buffer;
- for (j = 0; j < delay_tms; j++)
- ;
- sequence = sequence >> 1;
- OUTB = outb_buffer | PIN_TCK;
- for (j = 0; j < delay_tms; j++)
- ;
- }
-}
-
-/**
- * Get current JTAG signal states.
- *
- * @return a 16-bit integer where the most-significant byte contains the state
- * of the JTAG input signals and the least-significant byte contains the state
- * of the JTAG output signals.
- */
-uint16_t jtag_get_signals(void)
-{
- uint8_t input_signal_state, output_signal_state;
-
- input_signal_state = 0;
- output_signal_state = 0;
-
- /* Get states of input pins */
- if (GET_TDO())
- input_signal_state |= SIGNAL_TDO;
- if (GET_BRKOUT())
- input_signal_state |= SIGNAL_BRKOUT;
- if (GET_TRAP())
- input_signal_state |= SIGNAL_TRAP;
- if (GET_RTCK()) {
- /* Using RTCK this way would be extremely slow,
- * implemented only for the sake of completeness */
- input_signal_state |= SIGNAL_RTCK;
- }
-
- /* Get states of output pins */
- output_signal_state = PINSB & MASK_PORTB_DIRECTION_OUT;
-
- return ((uint16_t)input_signal_state << 8) | ((uint16_t)output_signal_state);
-}
-
-/**
- * Set state of JTAG output signals.
- *
- * @param low signals which should be de-asserted.
- * @param high signals which should be asserted.
- */
-void jtag_set_signals(uint8_t low, uint8_t high)
-{
- OUTB &= ~(low & MASK_PORTB_DIRECTION_OUT);
- OUTB |= (high & MASK_PORTB_DIRECTION_OUT);
-}
-
-/**
- * Configure TCK delay parameters.
- *
- * @param scan_in number of delay cycles in scan_in operations.
- * @param scan_out number of delay cycles in scan_out operations.
- * @param scan_io number of delay cycles in scan_io operations.
- * @param tck number of delay cycles in clock_tck operations.
- * @param tms number of delay cycles in clock_tms operations.
- */
-void jtag_configure_tck_delay(uint8_t scan_in, uint8_t scan_out,
- uint8_t scan_io, uint8_t tck, uint8_t tms)
-{
- delay_scan_in = scan_in;
- delay_scan_out = scan_out;
- delay_scan_io = scan_io;
- delay_tck = tck;
- delay_tms = tms;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/main.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/main.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/main.c
deleted file mode 100755
index e4865f8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/main.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#include "main.h"
-
-#include "io.h"
-#include "usb.h"
-#include "protocol.h"
-
-extern void sudav_isr(void) __interrupt SUDAV_ISR;
-extern void sof_isr(void) __interrupt;
-extern void sutok_isr(void) __interrupt;
-extern void suspend_isr(void) __interrupt;
-extern void usbreset_isr(void) __interrupt;
-extern void ibn_isr(void) __interrupt;
-extern void ep0in_isr(void) __interrupt;
-extern void ep0out_isr(void) __interrupt;
-extern void ep1in_isr(void) __interrupt;
-extern void ep1out_isr(void) __interrupt;
-extern void ep2in_isr(void) __interrupt;
-extern void ep2out_isr(void) __interrupt;
-extern void ep3in_isr(void) __interrupt;
-extern void ep3out_isr(void) __interrupt;
-extern void ep4in_isr(void) __interrupt;
-extern void ep4out_isr(void) __interrupt;
-extern void ep5in_isr(void) __interrupt;
-extern void ep5out_isr(void) __interrupt;
-extern void ep6in_isr(void) __interrupt;
-extern void ep6out_isr(void) __interrupt;
-extern void ep7in_isr(void) __interrupt;
-extern void ep7out_isr(void) __interrupt;
-
-void io_init(void)
-{
- /* PORTxCFG register bits select alternate functions (1 == alternate function,
- * 0 == standard I/O)
- * OEx register bits turn on/off output buffer (1 == output, 0 == input)
- * OUTx register bits determine pin state of output
- * PINx register bits reflect pin state (high == 1, low == 0) */
-
- /* PORT A */
- PORTACFG = PIN_OE;
- OEA = PIN_U_OE | PIN_OE | PIN_RUN_LED | PIN_COM_LED;
- OUTA = PIN_RUN_LED | PIN_COM_LED;
-
- /* PORT B */
- PORTBCFG = 0x00;
- OEB = PIN_TDI | PIN_TMS | PIN_TCK | PIN_TRST | PIN_BRKIN | PIN_RESET
- | PIN_OCDSE;
-
- /* TRST and RESET signals are low-active but inverted by hardware, so we clear
- * these signals here! */
- OUTB = 0x00;
-
- /* PORT C */
- PORTCCFG = PIN_WR;
- OEC = PIN_TXD0 | PIN_WR;
- OUTC = 0x00;
-}
-
-int main(void)
-{
- io_init();
- usb_init();
-
- /* Enable Interrupts */
- EA = 1;
-
- /* Begin executing command(s). This function never returns. */
- command_loop();
-
- /* Never reached, but SDCC complains about missing return statement */
- return 0;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/protocol.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/protocol.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/protocol.c
deleted file mode 100755
index 5f7f984..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/protocol.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#include "protocol.h"
-#include "jtag.h"
-#include "delay.h"
-#include "usb.h"
-#include "io.h"
-#include "msgtypes.h"
-
-#include "reg_ezusb.h"
-
-/**
- * @file
- * Implementation of the OpenULINK communication protocol.
- *
- * The OpenULINK protocol uses one OUT and one IN endpoint. These two endpoints
- * are configured to use the maximum packet size for full-speed transfers,
- * 64 bytes. Commands always start with a command ID (see msgtypes.h for
- * command ID definitions) and contain zero or more payload data bytes in both
- * transfer directions (IN and OUT). The payload
- *
- * Almost all commands contain a fixed number of payload data bytes. The number
- * of payload data bytes for the IN and OUT direction does not need to be the
- * same.
- *
- * Multiple commands may be sent in one EP2 Bulk-OUT packet. Because the
- * OpenULINK firmware does not perform bounds checking for EP2 Bulk-IN packets,
- * the host MUST ensure that the commands sent in the OUT packet require a
- * maximum of 64 bytes of IN data.
- */
-
-/** Index in EP2 Bulk-OUT data buffer that contains the current command ID */
-volatile uint8_t cmd_id_index;
-
-/** Number of data bytes already in EP2 Bulk-IN buffer */
-volatile uint8_t payload_index_in;
-
-/**
- * Execute a SET_LEDS command.
- */
-void execute_set_led_command(void)
-{
- uint8_t led_state = OUT2BUF[cmd_id_index + 1];
-
- if (led_state & RUN_LED_ON)
- SET_RUN_LED();
-
- if (led_state & COM_LED_ON)
- SET_COM_LED();
-
- if (led_state & RUN_LED_OFF)
- CLEAR_RUN_LED();
-
- if (led_state & COM_LED_OFF)
- CLEAR_COM_LED();
-}
-
-/**
- * Executes one command and updates global command indexes.
- *
- * @return true if this command was the last command.
- * @return false if there are more commands within the current contents of the
- * Bulk EP2-OUT data buffer.
- */
-bool execute_command(void)
-{
- uint8_t usb_out_bytecount, usb_in_bytecount;
- uint16_t signal_state;
- uint16_t count;
-
- /* Most commands do not transfer IN data. To save code space, we write 0 to
- * usb_in_bytecount here, then modify it in the switch statement below where
- * neccessary */
- usb_in_bytecount = 0;
-
- switch (OUT2BUF[cmd_id_index] /* Command ID */) {
- case CMD_SCAN_IN:
- usb_out_bytecount = 5;
- usb_in_bytecount = OUT2BUF[cmd_id_index + 1];
- jtag_scan_in(cmd_id_index + 1, payload_index_in);
- break;
- case CMD_SCAN_OUT:
- usb_out_bytecount = OUT2BUF[cmd_id_index + 1] + 5;
- jtag_scan_out(cmd_id_index + 1);
- break;
- case CMD_SCAN_IO:
- usb_in_bytecount = OUT2BUF[cmd_id_index + 1];
- usb_out_bytecount = usb_in_bytecount + 5;
- jtag_scan_io(cmd_id_index + 1, payload_index_in);
- break;
- case CMD_CLOCK_TMS:
- usb_out_bytecount = 2;
- jtag_clock_tms(OUT2BUF[cmd_id_index + 1], OUT2BUF[cmd_id_index + 2]);
- break;
- case CMD_CLOCK_TCK:
- usb_out_bytecount = 2;
- count = (uint16_t)OUT2BUF[cmd_id_index + 1];
- count |= ((uint16_t)OUT2BUF[cmd_id_index + 2]) << 8;
- jtag_clock_tck(count);
- break;
- case CMD_SLOW_SCAN_IN:
- usb_out_bytecount = 5;
- usb_in_bytecount = OUT2BUF[cmd_id_index + 1];
- jtag_slow_scan_in(cmd_id_index + 1, payload_index_in);
- break;
- case CMD_SLOW_SCAN_OUT:
- usb_out_bytecount = OUT2BUF[cmd_id_index + 1] + 5;
- jtag_slow_scan_out(cmd_id_index + 1);
- break;
- case CMD_SLOW_SCAN_IO:
- usb_in_bytecount = OUT2BUF[cmd_id_index + 1];
- usb_out_bytecount = usb_in_bytecount + 5;
- jtag_slow_scan_io(cmd_id_index + 1, payload_index_in);
- break;
- case CMD_SLOW_CLOCK_TMS:
- usb_out_bytecount = 2;
- jtag_slow_clock_tms(OUT2BUF[cmd_id_index + 1], OUT2BUF[cmd_id_index + 2]);
- break;
- case CMD_SLOW_CLOCK_TCK:
- usb_out_bytecount = 2;
- count = (uint16_t)OUT2BUF[cmd_id_index + 1];
- count |= ((uint16_t)OUT2BUF[cmd_id_index + 2]) << 8;
- jtag_slow_clock_tck(count);
- break;
- case CMD_SLEEP_US:
- usb_out_bytecount = 2;
- count = (uint16_t)OUT2BUF[cmd_id_index + 1];
- count |= ((uint16_t)OUT2BUF[cmd_id_index + 2]) << 8;
- delay_us(count);
- break;
- case CMD_SLEEP_MS:
- usb_out_bytecount = 2;
- count = (uint16_t)OUT2BUF[cmd_id_index + 1];
- count |= ((uint16_t)OUT2BUF[cmd_id_index + 2]) << 8;
- delay_ms(count);
- break;
- case CMD_GET_SIGNALS:
- usb_out_bytecount = 0;
- usb_in_bytecount = 2;
- signal_state = jtag_get_signals();
- IN2BUF[payload_index_in] = (signal_state >> 8) & 0x00FF;
- IN2BUF[payload_index_in + 1] = signal_state & 0x00FF;
- break;
- case CMD_SET_SIGNALS:
- usb_out_bytecount = 2;
- jtag_set_signals(OUT2BUF[cmd_id_index + 1], OUT2BUF[cmd_id_index + 2]);
- break;
- case CMD_CONFIGURE_TCK_FREQ:
- usb_out_bytecount = 5;
- jtag_configure_tck_delay(
- OUT2BUF[cmd_id_index + 1], /* scan_in */
- OUT2BUF[cmd_id_index + 2], /* scan_out */
- OUT2BUF[cmd_id_index + 3], /* scan_io */
- OUT2BUF[cmd_id_index + 4], /* clock_tck */
- OUT2BUF[cmd_id_index + 5]); /* clock_tms */
- break;
- case CMD_SET_LEDS:
- usb_out_bytecount = 1;
- execute_set_led_command();
- break;
- case CMD_TEST:
- usb_out_bytecount = 1;
- /* Do nothing... This command is only used to test if the device is ready
- * to accept new commands */
- break;
- default:
- /* Should never be reached */
- usb_out_bytecount = 0;
- break;
- }
-
- /* Update EP2 Bulk-IN data byte count */
- payload_index_in += usb_in_bytecount;
-
- /* Determine if this was the last command */
- if ((cmd_id_index + usb_out_bytecount + 1) >= OUT2BC)
- return true;
- else {
- /* Not the last command, update cmd_id_index */
- cmd_id_index += (usb_out_bytecount + 1);
- return false;
- }
-}
-
-/**
- * Forever wait for commands and execute them as they arrive.
- */
-void command_loop(void)
-{
- bool last_command;
-
- while (1) {
- cmd_id_index = 0;
- payload_index_in = 0;
-
- /* Wait until host sends EP2 Bulk-OUT packet */
- while (!EP2_out)
- ;
- EP2_out = 0;
-
- /* Turn on COM LED to indicate command execution */
- SET_COM_LED();
-
- /* Execute the commands */
- last_command = false;
- while (last_command == false)
- last_command = execute_command();
-
- CLEAR_COM_LED();
-
- /* Send back EP2 Bulk-IN packet if required */
- if (payload_index_in > 0) {
- IN2BC = payload_index_in;
- while (!EP2_in)
- ;
- EP2_in = 0;
- }
-
- /* Re-arm EP2-OUT after command execution */
- OUT2BC = 0;
- }
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/usb.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/usb.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/usb.c
deleted file mode 100755
index 98ae67f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/src/usb.c
+++ /dev/null
@@ -1,564 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011-2013 by Martin Schmoelzer *
- * <ma...@student.tuwien.ac.at> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/**
- * @file
- * Defines USB descriptors, interrupt routines and helper functions.
- * To minimize code size, we make the following assumptions:
- * - The OpenULINK has exactly one configuration
- * - and exactly one alternate setting
- *
- * Therefore, we do not have to support the Set Configuration USB request.
- */
-
-#include "usb.h"
-#include "delay.h"
-#include "io.h"
-
-/* Also update external declarations in "include/usb.h" if making changes to
- * these variables! */
-volatile bool EP2_out;
-volatile bool EP2_in;
-
-volatile __xdata __at 0x7FE8 struct setup_data setup_data;
-
-/* Define number of endpoints (except Control Endpoint 0) in a central place.
- * Be sure to include the neccessary endpoint descriptors! */
-#define NUM_ENDPOINTS 2
-
-__code struct usb_device_descriptor device_descriptor = {
- .bLength = sizeof(struct usb_device_descriptor),
- .bDescriptorType = DESCRIPTOR_TYPE_DEVICE,
- .bcdUSB = 0x0110, /* BCD: 01.00 (Version 1.0 USB spec) */
- .bDeviceClass = 0xFF, /* 0xFF = vendor-specific */
- .bDeviceSubClass = 0xFF,
- .bDeviceProtocol = 0xFF,
- .bMaxPacketSize0 = 64,
- .idVendor = 0xC251,
- .idProduct = 0x2710,
- .bcdDevice = 0x0100,
- .iManufacturer = 1,
- .iProduct = 2,
- .iSerialNumber = 3,
- .bNumConfigurations = 1
-};
-
-/* WARNING: ALL config, interface and endpoint descriptors MUST be adjacent! */
-
-__code struct usb_config_descriptor config_descriptor = {
- .bLength = sizeof(struct usb_config_descriptor),
- .bDescriptorType = DESCRIPTOR_TYPE_CONFIGURATION,
- .wTotalLength = sizeof(struct usb_config_descriptor) +
- sizeof(struct usb_interface_descriptor) +
- (NUM_ENDPOINTS * sizeof(struct usb_endpoint_descriptor)),
- .bNumInterfaces = 1,
- .bConfigurationValue = 1,
- .iConfiguration = 4, /* String describing this configuration */
- .bmAttributes = 0x80, /* Only MSB set according to USB spec */
- .MaxPower = 50 /* 100 mA */
-};
-
-__code struct usb_interface_descriptor interface_descriptor00 = {
- .bLength = sizeof(struct usb_interface_descriptor),
- .bDescriptorType = DESCRIPTOR_TYPE_INTERFACE,
- .bInterfaceNumber = 0,
- .bAlternateSetting = 0,
- .bNumEndpoints = NUM_ENDPOINTS,
- .bInterfaceClass = 0xFF,
- .bInterfaceSubclass = 0xFF,
- .bInterfaceProtocol = 0xFF,
- .iInterface = 0
-};
-
-__code struct usb_endpoint_descriptor Bulk_EP2_IN_Endpoint_Descriptor = {
- .bLength = sizeof(struct usb_endpoint_descriptor),
- .bDescriptorType = 0x05,
- .bEndpointAddress = (2 | USB_DIR_IN),
- .bmAttributes = 0x02,
- .wMaxPacketSize = 64,
- .bInterval = 0
-};
-
-__code struct usb_endpoint_descriptor Bulk_EP2_OUT_Endpoint_Descriptor = {
- .bLength = sizeof(struct usb_endpoint_descriptor),
- .bDescriptorType = 0x05,
- .bEndpointAddress = (2 | USB_DIR_OUT),
- .bmAttributes = 0x02,
- .wMaxPacketSize = 64,
- .bInterval = 0
-};
-
-__code struct usb_language_descriptor language_descriptor = {
- .bLength = 4,
- .bDescriptorType = DESCRIPTOR_TYPE_STRING,
- .wLANGID = {0x0409 /* US English */}
-};
-
-__code struct usb_string_descriptor strManufacturer =
- STR_DESCR(9, 'O', 'p', 'e', 'n', 'U', 'L', 'I', 'N', 'K');
-
-__code struct usb_string_descriptor strProduct =
- STR_DESCR(9, 'O', 'p', 'e', 'n', 'U', 'L', 'I', 'N', 'K');
-
-__code struct usb_string_descriptor strSerialNumber =
- STR_DESCR(6, '0', '0', '0', '0', '0', '1');
-
-__code struct usb_string_descriptor strConfigDescr =
- STR_DESCR(12, 'J', 'T', 'A', 'G', ' ', 'A', 'd', 'a', 'p', 't', 'e', 'r');
-
-/* Table containing pointers to string descriptors */
-__code struct usb_string_descriptor *__code en_string_descriptors[4] = {
- &strManufacturer,
- &strProduct,
- &strSerialNumber,
- &strConfigDescr
-};
-
-void sudav_isr(void) __interrupt SUDAV_ISR
-{
- CLEAR_IRQ();
-
- usb_handle_setup_data();
-
- USBIRQ = SUDAVIR;
- EP0CS |= HSNAK;
-}
-
-void sof_isr(void) __interrupt SOF_ISR
-{
-}
-void sutok_isr(void) __interrupt SUTOK_ISR
-{
-}
-void suspend_isr(void) __interrupt SUSPEND_ISR
-{
-}
-void usbreset_isr(void) __interrupt USBRESET_ISR
-{
-}
-void ibn_isr(void) __interrupt IBN_ISR
-{
-}
-
-void ep0in_isr(void) __interrupt EP0IN_ISR
-{
-}
-void ep0out_isr(void) __interrupt EP0OUT_ISR
-{
-}
-void ep1in_isr(void) __interrupt EP1IN_ISR
-{
-}
-void ep1out_isr(void) __interrupt EP1OUT_ISR
-{
-}
-
-/**
- * EP2 IN: called after the transfer from uC->Host has finished: we sent data
- */
-void ep2in_isr(void) __interrupt EP2IN_ISR
-{
- EP2_in = 1;
-
- CLEAR_IRQ();
- IN07IRQ = IN2IR;/* Clear OUT2 IRQ */
-}
-
-/**
- * EP2 OUT: called after the transfer from Host->uC has finished: we got data
- */
-void ep2out_isr(void) __interrupt EP2OUT_ISR
-{
- EP2_out = 1;
-
- CLEAR_IRQ();
- OUT07IRQ = OUT2IR; /* Clear OUT2 IRQ */
-}
-
-void ep3in_isr(void) __interrupt EP3IN_ISR
-{
-}
-void ep3out_isr(void) __interrupt EP3OUT_ISR
-{
-}
-void ep4in_isr(void) __interrupt EP4IN_ISR
-{
-}
-void ep4out_isr(void) __interrupt EP4OUT_ISR
-{
-}
-void ep5in_isr(void) __interrupt EP5IN_ISR
-{
-}
-void ep5out_isr(void) __interrupt EP5OUT_ISR
-{
-}
-void ep6in_isr(void) __interrupt EP6IN_ISR
-{
-}
-void ep6out_isr(void) __interrupt EP6OUT_ISR
-{
-}
-void ep7in_isr(void) __interrupt EP7IN_ISR
-{
-}
-void ep7out_isr(void) __interrupt EP7OUT_ISR
-{
-}
-
-/**
- * Return the control/status register for an endpoint
- *
- * @param ep endpoint address
- * @return on success: pointer to Control & Status register for endpoint
- * specified in \a ep
- * @return on failure: NULL
- */
-__xdata uint8_t *usb_get_endpoint_cs_reg(uint8_t ep)
-{
- /* Mask direction bit */
- uint8_t ep_num = ep & 0x7F;
-
- switch (ep_num) {
- case 0:
- return &EP0CS;
- break;
- case 1:
- return ep & 0x80 ? &IN1CS : &OUT1CS;
- break;
- case 2:
- return ep & 0x80 ? &IN2CS : &OUT2CS;
- break;
- case 3:
- return ep & 0x80 ? &IN3CS : &OUT3CS;
- break;
- case 4:
- return ep & 0x80 ? &IN4CS : &OUT4CS;
- break;
- case 5:
- return ep & 0x80 ? &IN5CS : &OUT5CS;
- break;
- case 6:
- return ep & 0x80 ? &IN6CS : &OUT6CS;
- break;
- case 7:
- return ep & 0x80 ? &IN7CS : &OUT7CS;
- break;
- }
-
- return NULL;
-}
-
-void usb_reset_data_toggle(uint8_t ep)
-{
- /* TOGCTL register:
- +----+-----+-----+------+-----+-------+-------+-------+
- | Q | S | R | IO | 0 | EP2 | EP1 | EP0 |
- +----+-----+-----+------+-----+-------+-------+-------+
-
- To reset data toggle bits, we have to write the endpoint direction (IN/OUT)
- to the IO bit and the endpoint number to the EP2..EP0 bits. Then, in a
- separate write cycle, the R bit needs to be set.
- */
- uint8_t togctl_value = (ep & 0x80 >> 3) | (ep & 0x7);
-
- /* First step: Write EP number and direction bit */
- TOGCTL = togctl_value;
-
- /* Second step: Set R bit */
- togctl_value |= TOG_R;
- TOGCTL = togctl_value;
-}
-
-/**
- * Handle GET_STATUS request.
- *
- * @return on success: true
- * @return on failure: false
- */
-bool usb_handle_get_status(void)
-{
- uint8_t *ep_cs;
-
- switch (setup_data.bmRequestType) {
- case GS_DEVICE:
- /* Two byte response: Byte 0, Bit 0 = self-powered, Bit 1 = remote wakeup.
- * Byte 1: reserved, reset to zero */
- IN0BUF[0] = 0;
- IN0BUF[1] = 0;
-
- /* Send response */
- IN0BC = 2;
- break;
- case GS_INTERFACE:
- /* Always return two zero bytes according to USB 1.1 spec, p. 191 */
- IN0BUF[0] = 0;
- IN0BUF[1] = 0;
-
- /* Send response */
- IN0BC = 2;
- break;
- case GS_ENDPOINT:
- /* Get stall bit for endpoint specified in low byte of wIndex */
- ep_cs = usb_get_endpoint_cs_reg(setup_data.wIndex & 0xff);
-
- if (*ep_cs & EPSTALL)
- IN0BUF[0] = 0x01;
- else
- IN0BUF[0] = 0x00;
-
- /* Second byte sent has to be always zero */
- IN0BUF[1] = 0;
-
- /* Send response */
- IN0BC = 2;
- break;
- default:
- return false;
- break;
- }
-
- return true;
-}
-
-/**
- * Handle CLEAR_FEATURE request.
- *
- * @return on success: true
- * @return on failure: false
- */
-bool usb_handle_clear_feature(void)
-{
- __xdata uint8_t *ep_cs;
-
- switch (setup_data.bmRequestType) {
- case CF_DEVICE:
- /* Clear remote wakeup not supported: stall EP0 */
- STALL_EP0();
- break;
- case CF_ENDPOINT:
- if (setup_data.wValue == 0) {
- /* Unstall the endpoint specified in wIndex */
- ep_cs = usb_get_endpoint_cs_reg(setup_data.wIndex);
- if (!ep_cs)
- return false;
- *ep_cs &= ~EPSTALL;
- } else {
- /* Unsupported feature, stall EP0 */
- STALL_EP0();
- }
- break;
- default:
- /* Vendor commands... */
- }
-
- return true;
-}
-
-/**
- * Handle SET_FEATURE request.
- *
- * @return on success: true
- * @return on failure: false
- */
-bool usb_handle_set_feature(void)
-{
- __xdata uint8_t *ep_cs;
-
- switch (setup_data.bmRequestType) {
- case SF_DEVICE:
- if (setup_data.wValue == 2)
- return true;
- break;
- case SF_ENDPOINT:
- if (setup_data.wValue == 0) {
- /* Stall the endpoint specified in wIndex */
- ep_cs = usb_get_endpoint_cs_reg(setup_data.wIndex);
- if (!ep_cs)
- return false;
- *ep_cs |= EPSTALL;
- } else {
- /* Unsupported endpoint feature */
- return false;
- }
- break;
- default:
- /* Vendor commands... */
- break;
- }
-
- return true;
-}
-
-/**
- * Handle GET_DESCRIPTOR request.
- *
- * @return on success: true
- * @return on failure: false
- */
-bool usb_handle_get_descriptor(void)
-{
- __xdata uint8_t descriptor_type;
- __xdata uint8_t descriptor_index;
-
- descriptor_type = (setup_data.wValue & 0xff00) >> 8;
- descriptor_index = setup_data.wValue & 0x00ff;
-
- switch (descriptor_type) {
- case DESCRIPTOR_TYPE_DEVICE:
- SUDPTRH = HI8(&device_descriptor);
- SUDPTRL = LO8(&device_descriptor);
- break;
- case DESCRIPTOR_TYPE_CONFIGURATION:
- SUDPTRH = HI8(&config_descriptor);
- SUDPTRL = LO8(&config_descriptor);
- break;
- case DESCRIPTOR_TYPE_STRING:
- if (setup_data.wIndex == 0) {
- /* Supply language descriptor */
- SUDPTRH = HI8(&language_descriptor);
- SUDPTRL = LO8(&language_descriptor);
- } else if (setup_data.wIndex == 0x0409 /* US English */) {
- /* Supply string descriptor */
- SUDPTRH = HI8(en_string_descriptors[descriptor_index - 1]);
- SUDPTRL = LO8(en_string_descriptors[descriptor_index - 1]);
- } else
- return false;
- break;
- default:
- /* Unsupported descriptor type */
- return false;
- break;
- }
-
- return true;
-}
-
-/**
- * Handle SET_INTERFACE request.
- */
-void usb_handle_set_interface(void)
-{
- /* Reset Data Toggle */
- usb_reset_data_toggle(USB_DIR_IN | 2);
- usb_reset_data_toggle(USB_DIR_OUT | 2);
-
- /* Unstall & clear busy flag of all valid IN endpoints */
- IN2CS = 0 | EPBSY;
-
- /* Unstall all valid OUT endpoints, reset bytecounts */
- OUT2CS = 0;
- OUT2BC = 0;
-}
-
-/**
- * Handle the arrival of a USB Control Setup Packet.
- */
-void usb_handle_setup_data(void)
-{
- switch (setup_data.bRequest) {
- case GET_STATUS:
- if (!usb_handle_get_status())
- STALL_EP0();
- break;
- case CLEAR_FEATURE:
- if (!usb_handle_clear_feature())
- STALL_EP0();
- break;
- case 2: case 4:
- /* Reserved values */
- STALL_EP0();
- break;
- case SET_FEATURE:
- if (!usb_handle_set_feature())
- STALL_EP0();
- break;
- case SET_ADDRESS:
- /* Handled by USB core */
- break;
- case SET_DESCRIPTOR:
- /* Set Descriptor not supported. */
- STALL_EP0();
- break;
- case GET_DESCRIPTOR:
- if (!usb_handle_get_descriptor())
- STALL_EP0();
- break;
- case GET_CONFIGURATION:
- /* OpenULINK has only one configuration, return its index */
- IN0BUF[0] = config_descriptor.bConfigurationValue;
- IN0BC = 1;
- break;
- case SET_CONFIGURATION:
- /* OpenULINK has only one configuration -> nothing to do */
- break;
- case GET_INTERFACE:
- /* OpenULINK only has one interface, return its number */
- IN0BUF[0] = interface_descriptor00.bInterfaceNumber;
- IN0BC = 1;
- break;
- case SET_INTERFACE:
- usb_handle_set_interface();
- break;
- case SYNCH_FRAME:
- /* Isochronous endpoints not used -> nothing to do */
- break;
- default:
- /* Any other requests: do nothing */
- break;
- }
-}
-
-/**
- * USB initialization. Configures USB interrupts, endpoints and performs
- * ReNumeration.
- */
-void usb_init(void)
-{
- /* Mark endpoint 2 IN & OUT as valid */
- IN07VAL = IN2VAL;
- OUT07VAL = OUT2VAL;
-
- /* Make sure no isochronous endpoints are marked valid */
- INISOVAL = 0;
- OUTISOVAL = 0;
-
- /* Disable isochronous endpoints. This makes the isochronous data buffers
- * available as 8051 XDATA memory at address 0x2000 - 0x27FF */
- ISOCTL = ISODISAB;
-
- /* Enable USB Autovectoring */
- USBBAV |= AVEN;
-
- /* Enable SUDAV interrupt */
- USBIEN |= SUDAVIE;
-
- /* Enable EP2 OUT & IN interrupts */
- OUT07IEN = OUT2IEN;
- IN07IEN = IN2IEN;
-
- /* Enable USB interrupt (EIE register) */
- EUSB = 1;
-
- /* Perform ReNumeration */
- USBCS = DISCON | RENUM;
- delay_ms(200);
- USBCS = DISCOE | RENUM;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/ulink_firmware.hex
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/ulink_firmware.hex b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/ulink_firmware.hex
deleted file mode 100755
index efaea58..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/OpenULINK/ulink_firmware.hex
+++ /dev/null
@@ -1,347 +0,0 @@
-:040000000200713257
-:01000B0032C2
-:0100130032BA
-:01001B0032B2
-:0100230032AA
-:01002B0032A2
-:01003300329A
-:01003B003292
-:01004300328A
-:01004B003282
-:01005300327A
-:01005B003272
-:01006300326A
-:03006B000201107F
-:0300CA0002006EC3
-:03006E000201018B
-:1000CD00907F937404F0907F9C7495F0907F96745C
-:1000DD0090F0907F94E4F0907F9D747FF0907F97E7
-:1000ED00E4F0907F957440F0907F9E7442F0907F85
-:1000FD0098E4F0221200CD1204ADD2AF1208E090B8
-:10010D00000022C021C0E0C0F0C082C083C007C083
-:10011D0006C005C004C003C002C001C000C0D07538
-:10012D00D000AF9174EF5FF59112040C907FAB741A
-:10013D0001F0907FB4E04402F0D0D0D000D001D0D7
-:10014D0002D003D004D005D006D007D083D082D002
-:10015D00F0D0E0D02132323232323232323232C04D
-:10016D00E0C082C083C007C0D075D000D201AF916E
-:10017D0074EF5FF591907FA97404F0D0D0D007D0C3
-:10018D0083D082D0E032C0E0C082C083C007C0D02F
-:10019D0075D000D200AF9174EF5FF591907FAA7486
-:1001AD0004F0D0D0D007D083D082D0E032323232BA
-:1001BD0032323232323232AF82747F5FFE24F850E7
-:1001CD0003020278EE240A83F582EE240C83F58374
-:1001DD00E473EFF306192C3F52650101020202028E
-:1001ED000202907FB422EF30E7067DB67E7F800459
-:1001FD007DC67E7F8D828E8322EF30E7067DB87EB1
-:10020D007F80047DC87E7F8D828E8322EF30E7064E
-:10021D007DBA7E7F80047DCA7E7F8D828E8322EFA4
-:10022D0030E7067DBC7E7F80047DCC7E7F8D828E07
-:10023D008322EF30E7067DBE7E7F80047DCE7E7FFC
-:10024D008D828E8322EF30E7067DC07E7F80047D18
-:10025D00D07E7F8D828E8322EF30E7067EC27F7F38
-:10026D0080047ED27F7F8E828F832290000022AF0A
-:10027D008274105FFE74075F4206907FD7EEF074B4
-:10028D00204EF022907FE8E0C322907FE8E0FF60EF
-:10029D0005BF0246800A907FB4E0FF4401F0803A2A
-:1002AD00907FEAE0FEA3E0FF4E7027907FECE0FE2A
-:1002BD00A3E08E821201C4AE82AF83EE4F7002C3F3
-:1002CD00228E828F83E0FD5305FE8E828F83EDF0AB
-:1002DD008008907FB4E0FF4401F0D322907FE8E0E6
-:1002ED00FF6005BF02468010907FEAE0FEA3E0FFAD
-:1002FD00BE0239BF0036D322907FEAE0FEA3E0FFB5
-:10030D004E7027907FECE0FEA3E08E821201C4AE0A
-:10031D0082AF83EE4F7002C3228E828F83E0FD4346
-:10032D0005018E828F83EDF08002C322D322907F50
-:10033D00EAE0A3E0FF907FEAE0FDA3E07E00BF01CD
-:10034D0002800DBF02028021BF030280340203EC44
-:10035D007ED37F138F06907FD4EEF07ED37F137FF5
-:10036D0000907FD5EEF00203EE7EE57F138F0690B1
-:10037D007FD4EEF07EE57F137F00907FD5EEF08089
-:10038D0060907FECE0FEA3E0FF4E70187E057F14B9
-:10039D008F06907FD4EEF07E057F147F00907FD581
-:1003AD00EEF0803D907FECE0FEA3E0FFBE092EBF96
-:1003BD00042BED1475F002A42459F582741435F054
-:1003CD00F583E493FEA3E493FF8E048F058D0490D3
-:1003DD007FD4ECF07F00907FD5EEF08004C322C374
-:1003ED0022D32275828212027C75820212027C90C7
-:1003FD007FB87402F0907FC8E4F0907FC9F022902E
-:10040D007FE9E0FF24F3500122EFF5F0240B83F593
-:10041D0082E5F0241183F583E473414F5D655D72D0
-:10042D007B73889899A9AC0404040404040404049F
-:10043D0004040404120291500122907FB4E044019F
-:10044D00F022120297500122907FB4E04401F02275
-:10045D00907FB4E04401F0221202E94042907FB453
-:10046D00E04401F02222907FB4E04401F022120317
-:10047D003B402C907FB4E04401F0229013EAE493CA
-:10048D00907F00F0907FB57401F022229013F0E47C
-:10049D0093907F00F0907FB57401F0221203F0224B
-:1004AD00907FDE7404F0907FDF7404F0907FE0E4C1
-:1004BD00F0907FE1F0907FA17401F0907FAFE04468
-:1004CD0001F0907FAEE04401F0907FAD7404F090A8
-:1004DD007FAC7404F0D2E8907FD6740AF09000C817
-:0A04ED0012137C907FD67406F022F3
-:1013D30012011001FFFFFF4051C21027000101025B
-:1013E3000301090220000101048032090400000204
-:1013F300FFFFFF00070582024000000705020240CD
-:1014030000000403090414034F00700065006E001C
-:1014130055004C0049004E004B0014034F00700070
-:1014230065006E0055004C0049004E004B000E0352
-:101433003000300030003000300031001A034A0021
-:101443005400410047002000410064006100700027
-:0E14530074006500720009141D1431143F145A
-:1004F700E5080424C0F582E4347DF583E0FF30E1AC
-:1005070008907F96E0FE54EFF08F06EE30E00890FB
-:100517007F96E0FE547FF0EF30E308907F96E0FE91
-:100527004410F0EF30E208907F96E0FF4480F0221D
-:100537007F00E50824C0F582E4347DF583E0FE24DE
-:10054700D550030208A6EE240A83F582EE242F83F2
-:10055700F583E473B18AD7B0FAD3A6A6A6A6A6A652
-:10056700A6A6A6A6A6A6A6A6A6A6A6A6A6A6A6A624
-:10057700A6A6A6A621FA512A639CD5053493A205FF
-:1005870006050605060808080808080808080808F0
-:1005970008080808080808080808080808080806D6
-:1005A700060607070707080808087E05E508042464
-:1005B700C0F582E4347DF583E0FFE50804F5828524
-:1005C7000927C007C00612091DD006D0070208A8D0
-:1005D700E5080424C0F582E4347DF583E02405FEB4
-:1005E700E50804F582C007C006120BDED006D00767
-:1005F7000208A8E5080424C0F582E4347DF583E009
-:10060700FF2405FEE50804F58285093CC007C006FE
-:10061700120E79D006D0070208A87E02E508042446
-:10062700C0F582E4347DF583E0FD7402250824C01B
-:10063700F582E4347DF583E0F50A8D82C007C006B4
-:1006470012124AD006D0070208A87E02E508042441
-:10065700C0F582E4347DF583E0FC7D007402250853
-:1006670024C0F582E4347DF583E0FAE44204EA42EB
-:10067700058C828D83C007C0061211DDD006D00716
-:100687000208A87E05E5080424C0F582E4347DF558
-:1006970083E0FFE50804F58285092DC007C006122F
-:1006A7000A67D006D0070208A8E5080424C0F58227
-:1006B700E4347DF583E02405FEE50804F582C007F0
-:1006C700C006120D14D006D0070208A8E5080424B6
-:1006D700C0F582E4347DF583E0FF2405FEE50804D8
-:1006E700F582850943C007C006121013D006D0074C
-:1006F7000208A87E02E5080424C0F582E4347DF5EB
-:1007070083E0FB7402250824C0F582E4347DF58379
-:10071700E0F50A8B82C007C006121281D006D00707
-:100727000208A87E02E5080424C0F582E4347DF5BA
-:1007370083E0FC7D007402250824C0F582E4347D43
-:10074700F583E0FAE44204EA42058C828D83C00710
-:10075700C006121207D006D0070208A87E02E508D5
-:100767000424C0F582E4347DF583E0FC7D00740247
-:10077700250824C0F582E4347DF583E0FAE44204D9
-:10078700EA42058C828D83C007C006121349D00642
-:10079700D0070208A87E02E5080424C0F582E434E5
-:1007A7007DF583E0FC7D007402250824C0F582E412
-:1007B700347DF583E0FAE44204EA42058C828D83B6
-:1007C700C007C00612137CD006D0070208A87E0017
-:1007D7007F02C007C0061212CEAC82AD83D006D00E
-:1007E7000785098275837E8D03EBF0E509042400F4
-:1007F700F582E4347EF5837D00ECF00208A87E02E2
-:10080700E5080424C0F582E4347DF583E0FD740235
-:10081700250824C0F582E4347DF583E0F50A8D824E
-:10082700C007C006121311D006D00780747E05E5F5
-:10083700080424C0F582E4347DF583E0FD740225C5
-:100847000824C0F582E4347DF583E0F50A740325B6
-:100857000824C0F582E4347DF583E0F50B740425A4
-:100867000824C0F582E4347DF583E0F50C74052592
-:100877000824C0F582E4347DF583E0F50D8D82C050
-:1008870007C006121329D006D00780157E01C007BE
-:10089700C0061204F7D006D00780067E0180027ECC
-:1008A70000EF2509F509AD087F008E037C00EB2DCD
-:1008B700FDEC3FFF0DBD00010F907FC9E0FC7B0001
-:1008C700C3ED9CEF64808BF063F08095F04002D31A
-:1008D70022EE042508F508C32275080075090010E3
-:1008E700000280FB907F96E0FF547FF0C202200257
-:1008F70007120537920280F6907F96E0FF4480F05A
-:10090700E509600B907FB9E509F010010280FB90C3
-:100917007FC9E4F080C3E582FF24C0F582E4347D1B
-:10092700F583E0F528EF0424C0F582E4347DF583F0
-:10093700E0F52974022FFC24C0F582E4347DF583A9
-:10094700E0C4540FFB53030FEC24C0F582E4347D5D
-:10095700F583E0FC740F5CF52A74032F24C0F5823D
-:10096700E4347DF583E0FA74042F24C0F582E4347F
-:100977007DF583E0F52BEB60078A0A8B8212124A1A
-:10098700907F97E0FB5303F874044BFA7900A8288B
-:100997007C0018B8FF011C89067F00C3EE98EF643E
-:1009A700808CF063F08095F050347F007E00907F5C
-:1009B70097EBF0EFC313FF907F97EAF0907F99E0F2
-:1009C700FC30E5034307800EBE080040E1E5272918
-:1009D7002400F582E4347EF583EFF00980B0892C9A
-:1009E7007F00AC2A7A00C3EA95295040A8297900EC
-:1009F70018B8FF01198A057E00EDB50011EEB501A3
-:100A07000DEC600A4303021CE52BC313F52B907F03
-:100A170097EBF0EFC313FF907F9774044BF0907F31
-:100A270099E0FE30E5034307800A80BAAD297E00CE
-:100A37007408C39DFDE49EFE8DF005F0EF8002C3B0
-:100A470013D5F0FBFFE527252C2400F582E4347E3F
-:100A5700F583EFF0EC6008852B0A8C8202124A229C
-:100A6700E582FF24C0F582E4347DF583E0F52EEFBF
-:100A77000424C0F582E4347DF583E0F52F74022F5A
-:100A8700FC24C0F582E4347DF583E0C4540FFB53A6
-:100A9700030FEC24C0F582E4347DF583E0FC740F8A
-:100AA7005CF53074032F24C0F582E4347DF583E0D0
-:100AB700FA74042F24C0F582E4347DF583E0F53120
-:100AC700EB60078A0A8B82121281907F97E0FB53B3
-:100AD70003F874044BFA753200A82E7C0018B8FF8F
-:100AE700011CA9327E00C3E998EE64808CF063F0A4
-:100AF7008095F0504C7E007C00907F97EBF079005A
-:100B0700C3E9952250030980F7EEC313FE907F9740
-:100B1700EAF07900C3E9952250030980F7907F999D
-:100B2700E0F930E5034306800CBC080040CBE52D17
-:100B370025322400F582E4347EF583EEF005328019
-:100B4700987E00AA307900C3E9952F5056A82F7CCC
-:100B57000018B8FF011C89057F00EDB50011EFB53E
-:100B6700040DEA600A4303021AE531C313F5319015
-:100B77007F97EBF07F00C3EF952250030F80F7EECE
-:100B8700C313FE907F9774044BF07F00C3EF952249
-:100B970050030F80F7907F99E0FF30E5034306800D
-:100BA7000980A4AD2F7F007408C39DFDE49FFF8DCE
-:100BB700F005F0EE8002C313D5F0FBFEE52D2532DC
-:100BC7002400F582E4347EF583EEF0EA600885318F
-:100BD7000A8A8202128122E582FF24C0F582E43468
-:100BE7007DF583E0F533EF0424C0F582E4347DF529
-:100BF70083E0F53474022FFC24C0F582E4347DF5DC
-:100C070083E0C4540FFB53030FEC24C0F582E43494
-:100C17007DF583E0FC740F5CF53574032F24C0F574
-:100C270082E4347DF583E0FA74042F24C0F582E46E
-:100C3700347DF583E0F536EB600B8A0A8B82C007BB
-:100C470012124AD007907F97E0FB5303F97A00A866
-:100C5700337C0018B8FF011C8A017E00C3E998EEB7
-:100C670064808CF063F08095F05039EF2A240524D6
-:100C7700C0F582E4347DF583E0FE7C00EE30E005CC
-:100C870043030180068B0174FE59FB907F97EBF0BD
-:100C9700EEC313FE907F9774044BF00CBC08004022
-:100CA700DB0A80ABEF2A240524C0F582E4347DF506
-:100CB70083E0FEAF357C00C3EC95345044EE30E062
-:100CC7000543030180068B0274FE5AFBA9347A00A0
-:100CD70019B9FF011A8C007D00E8B50111EDB502C5
-:100CE7000DEF600A4303021FE536C313F536907F05
-:100CF70097EBF0EEC313FE907F9774044BF00C80D4
-:100D0700B6EF600885360A8F8202124A22E582F51D
-:100D17003724C0F582E4347DF583E0F538E5370400
-:100D270024C0F582E4347DF583E0F5397402253774
-:100D3700FC24C0F582E4347DF583E0C4540FFB53F3
-:100D4700030FEC24C0F582E4347DF583E0FC740FD7
-:100D57005CF53A7403253724C0F582E4347DF583C6
-:100D6700E0FA7404253724C0F582E4347DF583E086
-:100D7700F53BEB60078A0A8B82121281907F97E01E
-:100D8700FB5303F97A00A8387C0018B8FF011C8AC6
-:100D9700067F00C3EE98EF64808CF063F08095F0D7
-:100DA7005050E5372A240524C0F582E4347DF583C5
-:100DB700E0FF7E00EF30E00543030180068B0474FB
-:100DC700FE5CFB907F97EBF07C00C3EC9523500310
-:100DD7000C80F7EFC313FF907F9774044BF07C00F0
-:100DE700C3EC952350030C80F70EBE080040C50ADC
-:100DF7008094E5372A240524C0F582E4347DF58301
-:100E0700E0FFAE3A7C00C3EC9539505AEF30E0056D
-:100E170043030180068B0274FE5AFBA8397A001837
-:100E2700B8FF011A8C017D00E9B50011EDB5020D7F
-:100E3700EE600A4303021EE53BC313F53B907F9721
-:100E4700EBF07D00C3ED952350030D80F7EFC3133F
-:100E5700FF907F9774044BF07D00C3ED95235003FB
-:100E67000D80F70C80A0EE6008853B0A8E82021287
-:100E77008122E582FF24C0F582E4347DF583E0F525
-:100E87003DEF0424C0F582E4347DF583E0F53E743C
-:100E9700022FFC24C0F582E4347DF583E0C4540FAF
-:100EA700FB53030FEC24C0F582E4347DF583E0FCAB
-:100EB700740F5CF53F74032F24C0F582E4347DF58D
-:100EC70083E0FA74042F24C0F582E4347DF583E0CF
-:100ED700F540EB600B8A0A8B82C00712124AD007D3
-:100EE700907F97E0FB5303F97A00A83D7C0018B880
-:100EF700FF011C8A017E00C3E998EE64808CF063D1
-:100F0700F08095F0505CEF2A240524C0F582E43484
-:100F17007DF583E0F5417C007900E54130E005434C
-:100F2700030180068B0074FE58FB907F97EBF0E57A
-:100F370041C313F541907F9774044BF0ECC313FC46
-:100F4700907F99E0F830E50343048009B908004031
-:100F5700C9E53C2A2400F582E4347EF583ECF00AE7
-:100F670080888A01EF2A240524C0F582E4347DF5C0
-:100F770083E0F5417C00AF3F754200C3E542953EF3
-:100F87005057E54130E00543030180068B0074FEAE
-:100F970058FBA83E7D0018B8FF011DAA427E00EA53
-:100FA700B50011EEB5050DEF600A4303021FE540DA
-:100FB700C313F540907F97EBF0E541C313F54190DC
-:100FC7007F9774044BF0ECC313FC907F99E0FE30DD
-:100FD700E503430480054280A2AD3E7E007408C34A
-:100FE7009DFDE49EFE8DF005F0EC8002C313D5F065
-:100FF700FBFCE53C292400F582E4347EF583ECF024
-:10100700EF600885400A8F8202124A22E582F54482
-:1010170024C0F582E4347DF583E0F545E5440424F6
-:10102700C0F582E4347DF583E0F54674022544FC7F
-:1010370024C0F582E4347DF583E0C4540FFB5303E9
-:101047000FEC24C0F582E4347DF583E0FC740F5C7B
-:10105700F5477403254424C0F582E4347DF583E025
-:10106700FA7404254424C0F582E4347DF583E0F561
-:1010770048EB60078A0A8B82121281907F97E0FB08
-:101087005303F97A00A8457C0018B8FF011C8A06AB
-:101097007F00C3EE98EF64808CF063F08095F0508A
-:1010A70074E5442A240524C0F582E4347DF583E001
-:1010B700F5497E007C00E54930E0054303018006E1
-:1010C7008B0074FE58FB907F97EBF07800C3E89590
-:1010D7002450030880F7E549C313F549907F9774B7
-:1010E700044BF07800C3E8952450030880F7EEC35B
-:1010F70013FE907F99E0F830E5034306800CBC08A7
-:101107000040B3E5432A2400F582E4347EF583EEFC
-:10111700F00A02108C8A04E5442A240524C0F582CB
-:10112700E4347DF583E0F5497E00AA47754A00C39C
-:10113700E54A9546506DE54930E0054303018006D1
-:101147008B0174FE59FBA9467D0019B9FF011DA843
-:101157004A7F00E8B50111EFB5050DEA600A4303C0
-:10116700021AE548C313F548907F97EBF07F00C359
-:10117700EF952450030F80F7E549C313F549907F96
-:101187009774044BF07F00C3EF952450030F80F74B
-:10119700EEC313FE907F99E0FF30E5034306800519
-:1011A7004A808CAD467F007408C39DFDE49FFF8D88
-:1011B700F005F0EE8002C313D5F0FBFEE5432C24C7
-:1011C70000F582E4347EF583EEF0EA600885480A8C
-:1011D7008A8202128122AE82AF83907F97E0FD530D
-:1011E70005FB74044DFC7A007B00C3EA9EEB9F501D
-:1011F7000E907F97EDF0ECF00ABA00EE0B80EB2231
-:10120700AE82AF83907F97E0FD5305FB74044DFCDE
-:101217007A007B00C3EA9EEB9F5027907F97EDF003
-:101227007900C3E9952550030980F7907F97ECF083
-:101237007900C3E9952550030980F70ABA00D50B51
-:1012470080D222AF82907F97E0FE5306FB7D00C3DA
-:10125700ED9F5025E50A30E00543060280068E041F
-:1012670074FD5CFE907F97EEF0E50AC313F50A90D4
-:101277007F9774044EF00D80D622AF82907F97E05F
-:10128700FE5306FB7D00C3ED9F503BE50A30E005AA
-:1012970043060280068E0474FD5CFE907F97EEF095
-:1012A7007C00C3EC952650030C80F7E50AC313F5C1
-:1012B7000A907F9774044EF07C00C3EC9526500388
-:1012C7000C80F70D80C0227F00907F99E0FE30E50B
-:1012D700027F01907F99E0FE30E603430702907F8B
-:1012E7009AE0FE30E703430704907F9BE0FE30E57A
-:1012F70003430708907F9AE0FE53067F8F05E4FFBC
-:10130700FCEE4FF582EC4DF58322E582547FF4FF26
-:10131700907F97E05FF0747F550AFF907F97E04FCB
-:10132700F022858222850A23850B24850C25850DCD
-:10133700262200227E567F021EBEFF011FEE4F703F
-:10134700F722750A05750B001213A6AE82AF837CD0
-:10135700007D00C3EC9EED9F501AC007C006C00574
-:10136700C004121339D004D005D006D0070CBC0036
-:10137700E20D80DF22AE82AF837C007D00C3EC9E4E
-:10138700ED9F501AC007C006C005C00412133BD01A
-:0F13970004D005D006D0070CBC00E20D80DF2289
-:03004300021B009D
-:101B0000020110000201630002016400020165008D
-:101B1000020166000201670002016800020169001B
-:101B200002016A0002016B0002016C0002019300D5
-:101B30000201BA000201BB000201BC000201BD00AB
-:101B40000201BE000201BF000201C0000201C1008B
-:081B50000201C2000201C30002
-:1013A6007A10E4FBFCE58225E0F582E58333F583DC
-:1013B600EB33FBEC33FCEB950AF5F0EC950B4006B2
-:0913C600FCABF0438201DADD22E8
-:0600A000E478FFF6D8FD34
-:10007E007900E94400601B7A009014617800759253
-:10008E0020E493F2A308B800020592D9F4DAF275CF
-:02009E0092FFCF
-:1000A6007800E84400600A7900759220E4F309D8E4
-:1000B600FC7800E84400600C7900902000E4F0A38E
-:0400C600D8FCD9FA8F
-:0D00710075814A1213CFE582600302006E14
-:0413CF007582002201
-:00000001FF
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/amt_jtagaccel.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/amt_jtagaccel.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/amt_jtagaccel.c
deleted file mode 100755
index 5aacead..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/drivers/amt_jtagaccel.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/interface.h>
-
-#if PARPORT_USE_PPDEV == 1
-#include <linux/parport.h>
-#include <linux/ppdev.h>
-#include <sys/ioctl.h>
-#else /* not PARPORT_USE_PPDEV */
-#ifndef _WIN32
-#include <sys/io.h>
-#endif
-#endif
-
-#if PARPORT_USE_GIVEIO == 1
-#if IS_CYGWIN == 1
-#include <windows.h>
-#endif
-#endif
-
-/**
- * @file
- * Support the Amontec Chameleon POD with JTAG Accelerator support.
- * This is a parallel port JTAG adapter with a CPLD between the
- * parallel port and the JTAG connection. VHDL code running in the
- * CPLD significantly accelerates JTAG operations compared to the
- * bitbanging "Wiggler" style of most parallel port adapters.
- */
-
-/* configuration */
-static uint16_t amt_jtagaccel_port;
-
-/* interface variables
- */
-static uint8_t aw_control_rst;
-static uint8_t aw_control_fsm = 0x10;
-static uint8_t aw_control_baudrate = 0x20;
-
-static int rtck_enabled;
-
-#if PARPORT_USE_PPDEV == 1
-static int device_handle;
-
-static const int addr_mode = IEEE1284_MODE_EPP | IEEE1284_ADDR;
-
-/* FIXME do something sane when these ioctl/read/write calls fail. */
-
-#define AMT_AW(val) \
- do { \
- int __retval; \
- \
- __retval = ioctl(device_handle, PPSETMODE, &addr_mode); \
- assert(__retval >= 0); \
- __retval = write(device_handle, &val, 1); \
- assert(__retval >= 0); \
- } while (0)
-#define AMT_AR(val) \
- do { \
- int __retval; \
- \
- __retval = ioctl(device_handle, PPSETMODE, &addr_mode); \
- assert(__retval >= 0); \
- __retval = read(device_handle, &val, 1); \
- assert(__retval >= 0); \
- } while (0)
-
-static const int data_mode = IEEE1284_MODE_EPP | IEEE1284_DATA;
-
-#define AMT_DW(val) \
- do { \
- int __retval; \
- \
- __retval = ioctl(device_handle, PPSETMODE, &data_mode); \
- assert(__retval >= 0); \
- __retval = write(device_handle, &val, 1); \
- assert(__retval >= 0); \
- } while (0)
-#define AMT_DR(val) \
- do { \
- int __retval; \
- \
- __retval = ioctl(device_handle, PPSETMODE, &data_mode); \
- assert(__retval >= 0); \
- __retval = read(device_handle, &val, 1); \
- assert(__retval >= 0); \
- } while (0)
-
-#else
-
-#define AMT_AW(val) do { outb(val, amt_jtagaccel_port + 3); } while (0)
-#define AMT_AR(val) do { val = inb(amt_jtagaccel_port + 3); } while (0)
-#define AMT_DW(val) do { outb(val, amt_jtagaccel_port + 4); } while (0)
-#define AMT_DR(val) do { val = inb(amt_jtagaccel_port + 4); } while (0)
-
-#endif /* PARPORT_USE_PPDEV */
-
-/* tap_move[i][j]: tap movement command to go from state i to state j
- * 0: Test-Logic-Reset
- * 1: Run-Test/Idle
- * 2: Shift-DR
- * 3: Pause-DR
- * 4: Shift-IR
- * 5: Pause-IR
- */
-static const uint8_t amt_jtagaccel_tap_move[6][6][2] = {
- /* RESET IDLE DRSHIFT DRPAUSE IRSHIFT IRPAUSE */
- { {0x1f, 0x00}, {0x0f, 0x00}, {0x05, 0x00}, {0x0a, 0x00}, {0x06, 0x00}, {0x96, 0x00} }, /* RESET */
- { {0x1f, 0x00}, {0x00, 0x00}, {0x04, 0x00}, {0x05, 0x00}, {0x06, 0x00}, {0x0b, 0x00} }, /* IDLE */
- { {0x1f, 0x00}, {0x0d, 0x00}, {0x00, 0x00}, {0x01, 0x00}, {0x8f, 0x09}, {0x8f, 0x01} }, /* DRSHIFT */
- { {0x1f, 0x00}, {0x0c, 0x00}, {0x08, 0x00}, {0x00, 0x00}, {0x8f, 0x09}, {0x8f, 0x01} }, /* DRPAUSE */
- { {0x1f, 0x00}, {0x0d, 0x00}, {0x07, 0x00}, {0x97, 0x00}, {0x00, 0x00}, {0x01, 0x00} }, /* IRSHIFT */
- { {0x1f, 0x00}, {0x0c, 0x00}, {0x07, 0x00}, {0x97, 0x00}, {0x08, 0x00}, {0x00, 0x00} }, /* IRPAUSE */
-};
-
-static void amt_jtagaccel_reset(int trst, int srst)
-{
- if (trst == 1)
- aw_control_rst |= 0x4;
- else if (trst == 0)
- aw_control_rst &= ~0x4;
-
- if (srst == 1)
- aw_control_rst |= 0x1;
- else if (srst == 0)
- aw_control_rst &= ~0x1;
-
- AMT_AW(aw_control_rst);
-}
-
-static int amt_jtagaccel_speed(int speed)
-{
- aw_control_baudrate &= 0xf0;
- aw_control_baudrate |= speed & 0x0f;
- AMT_AW(aw_control_baudrate);
-
- return ERROR_OK;
-}
-
-static void amt_jtagaccel_end_state(tap_state_t state)
-{
- if (tap_is_state_stable(state))
- tap_set_end_state(state);
- else {
- LOG_ERROR("BUG: %i is not a valid end state", state);
- exit(-1);
- }
-}
-
-static void amt_wait_scan_busy(void)
-{
- int timeout = 4096;
- uint8_t ar_status;
-
- AMT_AR(ar_status);
- while (((ar_status) & 0x80) && (timeout-- > 0))
- AMT_AR(ar_status);
-
- if (ar_status & 0x80) {
- LOG_ERROR(
- "amt_jtagaccel timed out while waiting for end of scan, rtck was %s, last AR_STATUS: 0x%2.2x",
- (rtck_enabled) ? "enabled" : "disabled",
- ar_status);
- exit(-1);
- }
-}
-
-static void amt_jtagaccel_state_move(void)
-{
- uint8_t aw_scan_tms_5;
- uint8_t tms_scan[2];
-
- tap_state_t cur_state = tap_get_state();
- tap_state_t end_state = tap_get_end_state();
-
- tms_scan[0] = amt_jtagaccel_tap_move[tap_move_ndx(cur_state)][tap_move_ndx(end_state)][0];
- tms_scan[1] = amt_jtagaccel_tap_move[tap_move_ndx(cur_state)][tap_move_ndx(end_state)][1];
-
- aw_scan_tms_5 = 0x40 | (tms_scan[0] & 0x1f);
- AMT_AW(aw_scan_tms_5);
- int jtag_speed = 0;
- int retval = jtag_get_speed(&jtag_speed);
- assert(retval == ERROR_OK);
- if (jtag_speed > 3 || rtck_enabled)
- amt_wait_scan_busy();
-
- if (tms_scan[0] & 0x80) {
- aw_scan_tms_5 = 0x40 | (tms_scan[1] & 0x1f);
- AMT_AW(aw_scan_tms_5);
- if (jtag_speed > 3 || rtck_enabled)
- amt_wait_scan_busy();
- }
-
- tap_set_state(end_state);
-}
-
-static void amt_jtagaccel_runtest(int num_cycles)
-{
- int i = 0;
- uint8_t aw_scan_tms_5;
- uint8_t aw_scan_tms_1to4;
-
- tap_state_t saved_end_state = tap_get_end_state();
-
- /* only do a state_move when we're not already in IDLE */
- if (tap_get_state() != TAP_IDLE) {
- amt_jtagaccel_end_state(TAP_IDLE);
- amt_jtagaccel_state_move();
- }
-
- while (num_cycles - i >= 5) {
- aw_scan_tms_5 = 0x40;
- AMT_AW(aw_scan_tms_5);
- i += 5;
- }
-
- if (num_cycles - i > 0) {
- aw_scan_tms_1to4 = 0x80 | ((num_cycles - i - 1) & 0x3) << 4;
- AMT_AW(aw_scan_tms_1to4);
- }
-
- amt_jtagaccel_end_state(saved_end_state);
- if (tap_get_state() != tap_get_end_state())
- amt_jtagaccel_state_move();
-}
-
-static void amt_jtagaccel_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size)
-{
- int bits_left = scan_size;
- int bit_count = 0;
- tap_state_t saved_end_state = tap_get_end_state();
- uint8_t aw_tdi_option;
- uint8_t dw_tdi_scan;
- uint8_t dr_tdo;
- uint8_t aw_tms_scan;
- uint8_t tms_scan[2];
- int jtag_speed_var;
- int retval = jtag_get_speed(&jtag_speed_var);
- assert(retval == ERROR_OK);
-
- if (ir_scan)
- amt_jtagaccel_end_state(TAP_IRSHIFT);
- else
- amt_jtagaccel_end_state(TAP_DRSHIFT);
-
- /* Only move if we're not already there */
- if (tap_get_state() != tap_get_end_state())
- amt_jtagaccel_state_move();
-
- amt_jtagaccel_end_state(saved_end_state);
-
- /* handle unaligned bits at the beginning */
- if ((scan_size - 1) % 8) {
- aw_tdi_option = 0x30 | (((scan_size - 1) % 8) - 1);
- AMT_AW(aw_tdi_option);
-
- dw_tdi_scan = buf_get_u32(buffer, bit_count, (scan_size - 1) % 8) & 0xff;
- AMT_DW(dw_tdi_scan);
- if (jtag_speed_var > 3 || rtck_enabled)
- amt_wait_scan_busy();
-
- if ((type == SCAN_IN) || (type == SCAN_IO)) {
- AMT_DR(dr_tdo);
- dr_tdo = dr_tdo >> (8 - ((scan_size - 1) % 8));
- buf_set_u32(buffer, bit_count, (scan_size - 1) % 8, dr_tdo);
- }
-
- bit_count += (scan_size - 1) % 8;
- bits_left -= (scan_size - 1) % 8;
- }
-
- while (bits_left - 1 >= 8) {
- dw_tdi_scan = buf_get_u32(buffer, bit_count, 8) & 0xff;
- AMT_DW(dw_tdi_scan);
- if (jtag_speed_var > 3 || rtck_enabled)
- amt_wait_scan_busy();
-
- if ((type == SCAN_IN) || (type == SCAN_IO)) {
- AMT_DR(dr_tdo);
- buf_set_u32(buffer, bit_count, 8, dr_tdo);
- }
-
- bit_count += 8;
- bits_left -= 8;
- }
-
- tms_scan[0] =
- amt_jtagaccel_tap_move[tap_move_ndx(tap_get_state())][tap_move_ndx(tap_get_end_state())][0];
- tms_scan[1] =
- amt_jtagaccel_tap_move[tap_move_ndx(tap_get_state())][tap_move_ndx(tap_get_end_state())][1];
- aw_tms_scan = 0x40 | (tms_scan[0] & 0x1f) | (buf_get_u32(buffer, bit_count, 1) << 5);
- AMT_AW(aw_tms_scan);
- if (jtag_speed_var > 3 || rtck_enabled)
- amt_wait_scan_busy();
-
- if ((type == SCAN_IN) || (type == SCAN_IO)) {
- AMT_DR(dr_tdo);
- dr_tdo = dr_tdo >> 7;
- buf_set_u32(buffer, bit_count, 1, dr_tdo);
- }
-
- if (tms_scan[0] & 0x80) {
- aw_tms_scan = 0x40 | (tms_scan[1] & 0x1f);
- AMT_AW(aw_tms_scan);
- if (jtag_speed_var > 3 || rtck_enabled)
- amt_wait_scan_busy();
- }
- tap_set_state(tap_get_end_state());
-}
-
-static int amt_jtagaccel_execute_queue(void)
-{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
- int scan_size;
- enum scan_type type;
- uint8_t *buffer;
- int retval;
-
- /* return ERROR_OK, unless a jtag_read_buffer returns a failed check
- * that wasn't handled by a caller-provided error handler
- */
- retval = ERROR_OK;
-
- while (cmd) {
- switch (cmd->type) {
- case JTAG_RESET:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("reset trst: %i srst %i",
- cmd->cmd.reset->trst,
- cmd->cmd.reset->srst);
-#endif
- if (cmd->cmd.reset->trst == 1)
- tap_set_state(TAP_RESET);
- amt_jtagaccel_reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
- break;
- case JTAG_RUNTEST:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("runtest %i cycles, end in %i",
- cmd->cmd.runtest->num_cycles,
- cmd->cmd.runtest->end_state);
-#endif
- amt_jtagaccel_end_state(cmd->cmd.runtest->end_state);
- amt_jtagaccel_runtest(cmd->cmd.runtest->num_cycles);
- break;
- case JTAG_TLR_RESET:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
-#endif
- amt_jtagaccel_end_state(cmd->cmd.statemove->end_state);
- amt_jtagaccel_state_move();
- break;
- case JTAG_SCAN:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("scan end in %i", cmd->cmd.scan->end_state);
-#endif
- amt_jtagaccel_end_state(cmd->cmd.scan->end_state);
- scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
- type = jtag_scan_type(cmd->cmd.scan);
- amt_jtagaccel_scan(cmd->cmd.scan->ir_scan, type, buffer, scan_size);
- if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK)
- retval = ERROR_JTAG_QUEUE_FAILED;
- if (buffer)
- free(buffer);
- break;
- case JTAG_SLEEP:
-#ifdef _DEBUG_JTAG_IO_
- LOG_DEBUG("sleep %" PRIi32, cmd->cmd.sleep->us);
-#endif
- jtag_sleep(cmd->cmd.sleep->us);
- break;
- default:
- LOG_ERROR("BUG: unknown JTAG command type encountered");
- exit(-1);
- }
- cmd = cmd->next;
- }
-
- return retval;
-}
-
-#if PARPORT_USE_GIVEIO == 1
-int amt_jtagaccel_get_giveio_access(void)
-{
- HANDLE h;
- OSVERSIONINFO version;
-
- version.dwOSVersionInfoSize = sizeof version;
- if (!GetVersionEx(&version)) {
- errno = EINVAL;
- return -1;
- }
- if (version.dwPlatformId != VER_PLATFORM_WIN32_NT)
- return 0;
-
- h = CreateFile("\\\\.\\giveio",
- GENERIC_READ,
- 0,
- NULL,
- OPEN_EXISTING,
- FILE_ATTRIBUTE_NORMAL,
- NULL);
- if (h == INVALID_HANDLE_VALUE) {
- errno = ENODEV;
- return -1;
- }
-
- CloseHandle(h);
-
- return 0;
-}
-#endif
-
-static int amt_jtagaccel_init(void)
-{
-#if PARPORT_USE_PPDEV == 1
- char buffer[256];
- int i = 0;
- uint8_t control_port;
-#else
- uint8_t status_port;
-#endif
- uint8_t ar_status;
-
-#if PARPORT_USE_PPDEV == 1
- if (device_handle > 0) {
- LOG_ERROR("device is already opened");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- snprintf(buffer, 256, "/dev/parport%d", amt_jtagaccel_port);
- device_handle = open(buffer, O_RDWR);
-
- if (device_handle < 0) {
- LOG_ERROR(
- "cannot open device. check it exists and that user read and write rights are set");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- i = ioctl(device_handle, PPCLAIM);
- if (i < 0) {
- LOG_ERROR("cannot claim device");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- i = IEEE1284_MODE_EPP;
- i = ioctl(device_handle, PPSETMODE, &i);
- if (i < 0) {
- LOG_ERROR(" cannot set compatible mode to device");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- control_port = 0x00;
- i = ioctl(device_handle, PPWCONTROL, &control_port);
-
- control_port = 0x04;
- i = ioctl(device_handle, PPWCONTROL, &control_port);
-
-#else
- if (amt_jtagaccel_port == 0) {
- amt_jtagaccel_port = 0x378;
- LOG_WARNING("No parport port specified, using default '0x378' (LPT1)");
- }
-
-#if PARPORT_USE_GIVEIO == 1
- if (amt_jtagaccel_get_giveio_access() != 0) {
-#else /* PARPORT_USE_GIVEIO */
- if (ioperm(amt_jtagaccel_port, 5, 1) != 0) {
-#endif /* PARPORT_USE_GIVEIO */
- LOG_ERROR("missing privileges for direct i/o");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- /* prepare epp port
- * clear timeout */
- status_port = inb(amt_jtagaccel_port + 1);
- outb(status_port | 0x1, amt_jtagaccel_port + 1);
-
- /* reset epp port */
- outb(0x00, amt_jtagaccel_port + 2);
- outb(0x04, amt_jtagaccel_port + 2);
-#endif
-
- if (rtck_enabled) {
- /* set RTCK enable bit */
- aw_control_fsm |= 0x02;
- }
-
- /* enable JTAG port */
- aw_control_fsm |= 0x04;
- AMT_AW(aw_control_fsm);
-
- enum reset_types jtag_reset_config = jtag_get_reset_config();
- if (jtag_reset_config & RESET_TRST_OPEN_DRAIN)
- aw_control_rst &= ~0x8;
- else
- aw_control_rst |= 0x8;
-
- if (jtag_reset_config & RESET_SRST_PUSH_PULL)
- aw_control_rst &= ~0x2;
- else
- aw_control_rst |= 0x2;
-
- amt_jtagaccel_reset(0, 0);
-
- /* read status register */
- AMT_AR(ar_status);
- LOG_DEBUG("AR_STATUS: 0x%2.2x", ar_status);
-
- return ERROR_OK;
-}
-
-static int amt_jtagaccel_quit(void)
-{
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(amt_jtagaccel_handle_parport_port_command)
-{
- if (CMD_ARGC == 1) {
- /* only if the port wasn't overwritten by cmdline */
- if (amt_jtagaccel_port == 0) {
- uint16_t port;
- COMMAND_PARSE_NUMBER(u16, CMD_ARGV[0], port);
- amt_jtagaccel_port = port;
- } else {
- LOG_ERROR("The parport port was already configured!");
- return ERROR_FAIL;
- }
- }
-
- command_print(CMD_CTX, "parport port = %u", amt_jtagaccel_port);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(amt_jtagaccel_handle_rtck_command)
-{
- if (CMD_ARGC == 0) {
- command_print(CMD_CTX,
- "amt_jtagaccel RTCK feature %s",
- (rtck_enabled) ? "enabled" : "disabled");
- return ERROR_OK;
- } else {
- if (strcmp(CMD_ARGV[0], "enabled") == 0)
- rtck_enabled = 1;
- else
- rtck_enabled = 0;
- }
-
- return ERROR_OK;
-}
-
-static const struct command_registration amtjtagaccel_command_handlers[] = {
- {
- .name = "parport_port",
- .handler = &amt_jtagaccel_handle_parport_port_command,
- .mode = COMMAND_CONFIG,
- .help = "configure or display the parallel port to use",
- .usage = "[port_num]",
- },
- {
- /**
- * @todo Remove this "rtck" command; just use the standard
- * mechanism to enable/disable adaptive clocking. First
- * implement the standard mechanism and deprecate "rtck";
- * after a year or so, it'll be safe to remove this.
- */
- .name = "rtck",
- .handler = &amt_jtagaccel_handle_rtck_command,
- .mode = COMMAND_CONFIG,
- .help = "configure or display RTCK support",
- .usage = "[enable|disable]",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct jtag_interface amt_jtagaccel_interface = {
- .name = "amt_jtagaccel",
- .commands = amtjtagaccel_command_handlers,
-
- .init = amt_jtagaccel_init,
- .quit = amt_jtagaccel_quit,
- .speed = amt_jtagaccel_speed,
- .execute_queue = amt_jtagaccel_execute_queue,
-};
[19/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/numicro.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/numicro.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/numicro.c
deleted file mode 100755
index 8d8ed6e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/numicro.c
+++ /dev/null
@@ -1,1880 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by James K. Larson *
- * jlarson@pacifier.com *
- * *
- * Copyright (C) 2013 Cosmin Gorgovan *
- * cosmin [at] linux-geek [dot] org *
- * *
- * Copyright (C) 2014 Pawel Si *
- * stawel+openocd@gmail.com *
- * *
- * Copyright (C) 2015 Nemui Trinomius *
- * nemuisan_kawausogasuki@live.jp *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-#include <target/cortex_m.h>
-
-/* Nuvoton NuMicro register locations */
-#define NUMICRO_SYS_BASE 0x50000000
-#define NUMICRO_SYS_WRPROT 0x50000100
-#define NUMICRO_SYS_IPRSTC1 0x50000008
-
-#define NUMICRO_SYSCLK_BASE 0x50000200
-#define NUMICRO_SYSCLK_PWRCON 0x50000200
-#define NUMICRO_SYSCLK_CLKSEL0 0x50000210
-#define NUMICRO_SYSCLK_CLKDIV 0x50000218
-#define NUMICRO_SYSCLK_AHBCLK 0x50000204
-
-#define NUMICRO_FLASH_BASE 0x5000C000
-#define NUMICRO_FLASH_ISPCON 0x5000C000
-#define NUMICRO_FLASH_ISPADR 0x5000C004
-#define NUMICRO_FLASH_ISPDAT 0x5000C008
-#define NUMICRO_FLASH_ISPCMD 0x5000C00C
-#define NUMICRO_FLASH_ISPTRG 0x5000C010
-#define NUMICRO_FLASH_CHEAT 0x5000C01C /* Undocumented isp register(may be cheat register) */
-
-#define NUMICRO_SCS_BASE 0xE000E000
-#define NUMICRO_SCS_AIRCR 0xE000ED0C
-#define NUMICRO_SCS_DHCSR 0xE000EDF0
-#define NUMICRO_SCS_DEMCR 0xE000EDFC
-
-#define NUMICRO_APROM_BASE 0x00000000
-#define NUMICRO_DATA_BASE 0x0001F000
-#define NUMICRO_LDROM_BASE 0x00100000
-#define NUMICRO_CONFIG_BASE 0x00300000
-
-#define NUMICRO_CONFIG0 0x5000C000
-#define NUMICRO_CONFIG1 0x5000C004
-
-/* Command register bits */
-#define PWRCON_OSC22M (1 << 2)
-#define PWRCON_XTL12M (1 << 0)
-
-#define IPRSTC1_CPU_RST (1 << 1)
-#define IPRSTC1_CHIP_RST (1 << 0)
-
-#define AHBCLK_ISP_EN (1 << 2)
-#define AHBCLK_SRAM_EN (1 << 4)
-#define AHBCLK_TICK_EN (1 << 5)
-
-#define ISPCON_ISPEN (1 << 0)
-#define ISPCON_BS_AP (0 << 1)
-#define ISPCON_BS_LP (1 << 1)
-#define ISPCON_BS_MASK (1 << 1)
-#define ISPCON_APUEN (1 << 3)
-#define ISPCON_CFGUEN (1 << 4)
-#define ISPCON_LDUEN (1 << 5)
-#define ISPCON_ISPFF (1 << 6)
-
-#define CONFIG0_LOCK_MASK (1 << 1)
-
-/* isp commands */
-#define ISPCMD_READ 0x00
-#define ISPCMD_WRITE 0x21
-#define ISPCMD_ERASE 0x22
-#define ISPCMD_CHIPERASE 0x26 /* Undocumented isp "Chip-Erase" command */
-#define ISPCMD_READ_CID 0x0B
-#define ISPCMD_READ_DID 0x0C
-#define ISPCMD_READ_UID 0x04
-#define ISPCMD_VECMAP 0x2E
-#define ISPTRG_ISPGO (1 << 0)
-
-/* access unlock keys */
-#define REG_KEY1 0x59
-#define REG_KEY2 0x16
-#define REG_KEY3 0x88
-#define REG_LOCK 0x00
-
-/* flash pagesizes */
-#define NUMICRO_PAGESIZE 512
-/* flash MAX banks */
-#define NUMICRO_MAX_FLASH_BANKS 4
-
-/* flash bank structs */
-struct numicro_flash_bank_type {
- uint32_t base;
- uint32_t size;
-};
-
-/* part structs */
-struct numicro_cpu_type {
- char *partname;
- uint32_t partid;
- unsigned int n_banks;
- struct numicro_flash_bank_type bank[NUMICRO_MAX_FLASH_BANKS];
-};
-
-/* TODO : Support variable DataFlash region for 128kB Flash model */
-#define NUMICRO_BANKS_NUC100(aprom_size) \
- .n_banks = 4, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_DATA_BASE, 4*1024}, {NUMICRO_LDROM_BASE, 4*1024}, \
- {NUMICRO_CONFIG_BASE, 1024} }
-
-#define NUMICRO_BANKS_M051(aprom_size) \
- .n_banks = 4, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_DATA_BASE, 4*1024}, {NUMICRO_LDROM_BASE, 4*1024}, \
- {NUMICRO_CONFIG_BASE, 1024} }
-
-#define NUMICRO_BANKS_MINI51(aprom_size) \
- .n_banks = 3, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_LDROM_BASE, 2*1024}, {NUMICRO_CONFIG_BASE, 512} }
-
-#define NUMICRO_BANKS_NANO(aprom_size) \
- .n_banks = 4, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_DATA_BASE, 4*1024}, {NUMICRO_LDROM_BASE, 4*1024}, \
- {NUMICRO_CONFIG_BASE, 1024} }
-
-#define NUMICRO_BANKS_NUC400(aprom_size) \
- .n_banks = 4, \
- { {NUMICRO_APROM_BASE, (aprom_size)}, {NUMICRO_DATA_BASE, 4*1024}, {NUMICRO_LDROM_BASE, 16*1024}, \
- {NUMICRO_CONFIG_BASE, 1024} }
-
-
-static const struct numicro_cpu_type NuMicroParts[] = {
- /*PART NO*/ /*PART ID*/ /*Banks*/
- /* NUC100 Version B */
- {"NUC100LD2BN", 0x10010004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD1BN", 0x10010005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD0BN", 0x10010027, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LC2BN", 0x10010007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC1BN", 0x10010008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC0BN", 0x10010028, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LB2BN", 0x10010029, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100LB1BN", 0x10010030, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100LB0BN", 0x10010031, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100LA2BN", 0x10010032, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC100LA1BN", 0x10010033, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC100LA0BN", 0x10010034, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC100RD2BN", 0x10010013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD1BN", 0x10010014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD0BN", 0x10010035, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RC2BN", 0x10010016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC1BN", 0x10010017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC0BN", 0x10010036, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RB2BN", 0x10010037, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100RB1BN", 0x10010038, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100RB0BN", 0x10010039, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC100RA2BN", 0x10010040, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC100RA1BN", 0x10010041, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC100RA0BN", 0x10010042, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC100 Version C */
- {"NUC100LE3CN", 0x20010000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LE2CN", 0x20010001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LE1CN", 0x20010002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LD3CN", 0x20010003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD2CN", 0x20010004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD1CN", 0x20010005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LC3CN", 0x20010006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC2CN", 0x20010007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC1CN", 0x20010008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RE3CN", 0x20010009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RE2CN", 0x20010010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RE1CN", 0x20010011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RD3CN", 0x20010012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD2CN", 0x20010013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD1CN", 0x20010014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RC3CN", 0x20010015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC2CN", 0x20010016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC1CN", 0x20010017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VE3CN", 0x20010018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VE2CN", 0x20010019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VE1CN", 0x20010020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VD3CN", 0x20010021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD2CN", 0x20010022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD1CN", 0x20010023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VC3CN", 0x20010024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VC2CN", 0x20010025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VC1CN", 0x20010026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC100 Version B */
- {"NUC101YD2BN", 0x10010143, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101YD1BN", 0x10010144, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101YD0BN", 0x10010145, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101YC2BN", 0x10010146, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101YC1BN", 0x10010147, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101YC0BN", 0x10010148, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101YB2BN", 0x10010149, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101YB1BN", 0x10010150, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101YB0BN", 0x10010151, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101YA2BN", 0x10010152, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101YA1BN", 0x10010153, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101YA0BN", 0x10010154, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC101LD2BN", 0x10010104, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD1BN", 0x10010105, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD0BN", 0x10010127, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LC2BN", 0x10010107, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC1BN", 0x10010108, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC0BN", 0x10010128, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LB2BN", 0x10010129, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101LB1BN", 0x10010130, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101LB0BN", 0x10010131, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101LA2BN", 0x10010132, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101LA1BN", 0x10010133, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101LA0BN", 0x10010134, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC101RD2BN", 0x10010113, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD1BN", 0x10010114, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD0BN", 0x10010135, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RC2BN", 0x10010116, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC1BN", 0x10010117, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC0BN", 0x10010136, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RB2BN", 0x10010137, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101RB1BN", 0x10010138, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101RB0BN", 0x10010139, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC101RA2BN", 0x10010140, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101RA1BN", 0x10010141, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC101RA0BN", 0x10010142, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC101 Version C */
- {"NUC101LE3CN", 0x20010100, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LE2CN", 0x20010101, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LE1CN", 0x20010102, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LD3CN", 0x20010103, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD2CN", 0x20010104, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD1CN", 0x20010105, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LC3CN", 0x20010106, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC2CN", 0x20010107, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC1CN", 0x20010108, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RE3CN", 0x20010109, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RE2CN", 0x20010110, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RE1CN", 0x20010111, NUMICRO_BANKS_NUC100(128*1024)},
-
- {"NUC101RD3CN", 0x20010112, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD2CN", 0x20010113, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD1CN", 0x20010114, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RC3CN", 0x20010115, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC2CN", 0x20010116, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC1CN", 0x20010117, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VE3CN", 0x20010118, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VE2CN", 0x20010119, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VE1CN", 0x20010120, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VD3CN", 0x20010121, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VD2CN", 0x20010122, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VD1CN", 0x20010123, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VC3CN", 0x20010124, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VC2CN", 0x20010125, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VC1CN", 0x20010126, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC102 Version A */
- {"NUC102ZD2AN", 0x00010231, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102ZC1AN", 0x00010235, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102LD2AN", 0x00010204, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102LC1AN", 0x00010208, NUMICRO_BANKS_NUC100(32*1024)},
-
- {"NUC102RB3AN", 0x00010248, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102RB2AN", 0x00010249, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102RB1AN", 0x00010250, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102RA3AN", 0x00010251, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102RA2AN", 0x00010252, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102RA1AN", 0x00010253, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102VB3AN", 0x00010254, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102VB2AN", 0x00010255, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102VB1AN", 0x00010256, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102VA3AN", 0x00010257, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102VA2AN", 0x00010258, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102VA1AN", 0x00010259, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102LA0AN", 0x00010260, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102LB0AN", 0x00010261, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102LC0AN", 0x00010262, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102LD0AN", 0x00010263, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102RA0AN", 0x00010264, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102RB0AN", 0x00010265, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102RC0AN", 0x00010266, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102RD0AN", 0x00010267, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102VA0AN", 0x00010268, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102VB0AN", 0x00010269, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102VC0AN", 0x00010270, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102VD0AN", 0x00010271, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC102ZA0AN", 0x00010272, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC102ZB0AN", 0x00010273, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC102ZC0AN", 0x00010274, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC102ZD0AN", 0x00010275, NUMICRO_BANKS_NUC100(64*1024)},
-
- /* NUC102 Version A */
- {"NUC122LD2AN", 0x00012204, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122LD1AN", 0x00012205, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122LC2AN", 0x00012207, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122LC1AN", 0x00012208, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122RD2AN", 0x00012213, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122RD1AN", 0x00012214, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122RC2AN", 0x00012216, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122RC1AN", 0x00012217, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122SD2AN", 0x00012222, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122SD1AN", 0x00012223, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122SC2AN", 0x00012225, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122SC1AN", 0x00012226, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122ZD2AN", 0x00012231, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122ZD1AN", 0x00012232, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122ZC2AN", 0x00012234, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122ZC1AN", 0x00012235, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122ZB2AN", 0x00012237, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122ZB1AN", 0x00012238, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122ZA2AN", 0x00012240, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122ZA1AN", 0x00012241, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122LB2AN", 0x00012243, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122LB1AN", 0x00012244, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122LA2AN", 0x00012246, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122LA1AN", 0x00012247, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122RB2AN", 0x00012249, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122RB1AN", 0x00012250, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122RA2AN", 0x00012252, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122RA1AN", 0x00012253, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122SB2AN", 0x00012255, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122SB1AN", 0x00012256, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122SA2AN", 0x00012258, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122SA1AN", 0x00012259, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122LA0AN", 0x00012260, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122LB0AN", 0x00012261, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122LC0AN", 0x00012262, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122LD0AN", 0x00012263, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122RA0AN", 0x00012264, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122RB0AN", 0x00012265, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122RC0AN", 0x00012266, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122RD0AN", 0x00012267, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122SA0AN", 0x00012268, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122SB0AN", 0x00012269, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122SC0AN", 0x00012270, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122SD0AN", 0x00012271, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122ZA0AN", 0x00012272, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122ZB0AN", 0x00012273, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122ZC0AN", 0x00012274, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122ZD0AN", 0x00012275, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122YD2AN", 0x00012277, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122YD1AN", 0x00012278, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122YD0AN", 0x00012279, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC122YC2AN", 0x00012281, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122YC1AN", 0x00012282, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122YC0AN", 0x00012283, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC122YB2AN", 0x00012285, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122YB1AN", 0x00012286, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122YB0AN", 0x00012287, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC122YA2AN", 0x00012289, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122YA1AN", 0x00012290, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC122YA0AN", 0x00012291, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC120 Version C */
- {"NUC120LD2BN", 0x10012004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD1BN", 0x10012005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD0BN", 0x10012027, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LC2BN", 0x10012007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC1BN", 0x10012008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC0BN", 0x10012028, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LB2BN", 0x10012029, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120LB1BN", 0x10012030, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120LB0BN", 0x10012031, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120LA2BN", 0x10012032, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC120LA1BN", 0x10012033, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC120LA0BN", 0x10012034, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC120RD2BN", 0x10012013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD1BN", 0x10012014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD0BN", 0x10012035, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RC2BN", 0x10012016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC1BN", 0x10012017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC0BN", 0x10012036, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RB2BN", 0x10012037, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120RB1BN", 0x10012038, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120RB0BN", 0x10012039, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC120RA2BN", 0x10012040, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC120RA1BN", 0x10012041, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC120RA0BN", 0x10012042, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC120 Version C */
- {"NUC120LE3CN", 0x20012000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LE2CN", 0x20012001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LE1CN", 0x20012002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LD3CN", 0x20012003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD2CN", 0x20012004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD1CN", 0x20012005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LC3CN", 0x20012006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC2CN", 0x20012007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC1CN", 0x20012008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RE3CN", 0x20012009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RE2CN", 0x20012010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RE1CN", 0x20012011, NUMICRO_BANKS_NUC100(128*1024)},
-
- {"NUC120RD3CN", 0x20012012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD2CN", 0x20012013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD1CN", 0x20012014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RC3CN", 0x20012015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC2CN", 0x20012016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC1CN", 0x20012017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VE3CN", 0x20012018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VE2CN", 0x20012019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VE1CN", 0x20012020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VD3CN", 0x20012021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD2CN", 0x20012022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD1CN", 0x20012023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VC3CN", 0x20012024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VC2CN", 0x20012025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VC1CN", 0x20012026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC120 Version B */
- {"NUC130LD2BN", 0x10013004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD1BN", 0x10013005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD0BN", 0x10013027, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LC2BN", 0x10013007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC1BN", 0x10013008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC0BN", 0x10013028, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LB2BN", 0x10013029, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130LB1BN", 0x10013030, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130LB0BN", 0x10013031, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130LA2BN", 0x10013032, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC130LA1BN", 0x10013033, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC130LA0BN", 0x10013034, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC130RD2BN", 0x10013013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD1BN", 0x10013014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD0BN", 0x10013035, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RC2BN", 0x10013016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC1BN", 0x10013017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC0BN", 0x10013036, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RB2BN", 0x10013037, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130RB1BN", 0x10013038, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130RB0BN", 0x10013039, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC130RA2BN", 0x10013040, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC130RA1BN", 0x10013041, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC130RA0BN", 0x10013042, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC130 Version C */
- {"NUC130LE3CN", 0x20013000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LE2CN", 0x20013001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LE1CN", 0x20013002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LD3CN", 0x20013003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD2CN", 0x20013004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD1CN", 0x20013005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LC3CN", 0x20013006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC2CN", 0x20013007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC1CN", 0x20013008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RE3CN", 0x20013009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RE2CN", 0x20013010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RE1CN", 0x20013011, NUMICRO_BANKS_NUC100(128*1024)},
-
- {"NUC130RD3CN", 0x20013012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD2CN", 0x20013013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD1CN", 0x20013014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RC3CN", 0x20013015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC2CN", 0x20013016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC1CN", 0x20013017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VE3CN", 0x20013018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VE2CN", 0x20013019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VE1CN", 0x20013020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VD3CN", 0x20013021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VD2CN", 0x20013022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VD1CN", 0x20013023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VC3CN", 0x20013024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VC2CN", 0x20013025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VC1CN", 0x20013026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC140 Version B */
- {"NUC140LD2BN", 0x10014004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD1BN", 0x10014005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD0BN", 0x10014027, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LC2BN", 0x10014007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC1BN", 0x10014008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC0BN", 0x10014028, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LB2BN", 0x10014029, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140LB1BN", 0x10014030, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140LB0BN", 0x10014031, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140LA2BN", 0x10014032, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC140LA1BN", 0x10014033, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC140LA0BN", 0x10014034, NUMICRO_BANKS_NUC100(8*1024)},
-
- {"NUC140RD2BN", 0x10014013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD1BN", 0x10014014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD0BN", 0x10014035, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RC2BN", 0x10014016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC1BN", 0x10014017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC0BN", 0x10014036, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RB2BN", 0x10014037, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140RB1BN", 0x10014038, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140RB0BN", 0x10014039, NUMICRO_BANKS_NUC100(16*1024)},
- {"NUC140RA2BN", 0x10014040, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC140RA1BN", 0x10014041, NUMICRO_BANKS_NUC100(8*1024)},
- {"NUC140RA0BN", 0x10014042, NUMICRO_BANKS_NUC100(8*1024)},
-
- /* NUC140 Version C */
- {"NUC140LE3CN", 0x20014000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LE2CN", 0x20014001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LE1CN", 0x20014002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LD3CN", 0x20014003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD2CN", 0x20014004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD1CN", 0x20014005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LC3CN", 0x20014006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC2CN", 0x20014007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC1CN", 0x20014008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RE3CN", 0x20014009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RE2CN", 0x20014010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RE1CN", 0x20014011, NUMICRO_BANKS_NUC100(128*1024)},
-
- {"NUC140RD3CN", 0x20014012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD2CN", 0x20014013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD1CN", 0x20014014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RC3CN", 0x20014015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC2CN", 0x20014016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC1CN", 0x20014017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VE3CN", 0x20014018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VE2CN", 0x20014019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VE1CN", 0x20014020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VD3CN", 0x20014021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VD2CN", 0x20014022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VD1CN", 0x20014023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VC3CN", 0x20014024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VC2CN", 0x20014025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VC1CN", 0x20014026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC100 Version A */
- {"NUC100LE3AN", 0x00010000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LE2AN", 0x00010001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LE1AN", 0x00010002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100LD3AN", 0x00010003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD2AN", 0x00010004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD1AN", 0x00010005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LC3AN", 0x00010006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC2AN", 0x00010007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LC1AN", 0x00010008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RE3AN", 0x00010009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RE2AN", 0x00010010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RE1AN", 0x00010011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RD3AN", 0x00010012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD2AN", 0x00010013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD1AN", 0x00010014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RC3AN", 0x00010015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC2AN", 0x00010016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RC1AN", 0x00010017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VE3AN", 0x00010018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VE2AN", 0x00010019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VE1AN", 0x00010020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VD3AN", 0x00010021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD2AN", 0x00010022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD1AN", 0x00010023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VC3AN", 0x00010024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VC2AN", 0x00010025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100VC1AN", 0x00010026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC100 Version A */
- {"NUC101LE3AN", 0x00010100, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LE2AN", 0x00010101, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LE1AN", 0x00010102, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101LD3AN", 0x00010103, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD2AN", 0x00010104, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LD1AN", 0x00010105, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101LC3AN", 0x00010106, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC2AN", 0x00010107, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101LC1AN", 0x00010108, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RE3AN", 0x00010109, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RE2AN", 0x00010110, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RE1AN", 0x00010111, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101RD3AN", 0x00010112, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD2AN", 0x00010113, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RD1AN", 0x00010114, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101RC3AN", 0x00010115, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC2AN", 0x00010116, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101RC1AN", 0x00010117, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VE3AN", 0x00010118, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VE2AN", 0x00010119, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VE1AN", 0x00010120, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC101VD3AN", 0x00010121, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VD2AN", 0x00010122, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VD1AN", 0x00010123, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC101VC3AN", 0x00010124, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VC2AN", 0x00010125, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC101VC1AN", 0x00010126, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC120 Version A */
- {"NUC120LE3AN", 0x00012000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LE2AN", 0x00012001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LE1AN", 0x00012002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LD3AN", 0x00012003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD2AN", 0x00012004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD1AN", 0x00012005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LC3AN", 0x00012006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC2AN", 0x00012007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LC1AN", 0x00012008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RE3AN", 0x00012009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RE2AN", 0x00012010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RE1AN", 0x00012011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RD3AN", 0x00012012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD2AN", 0x00012013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD1AN", 0x00012014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RC3AN", 0x00012015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC2AN", 0x00012016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RC1AN", 0x00012017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VE3AN", 0x00012018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VE2AN", 0x00012019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VE1AN", 0x00012020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VD3AN", 0x00012021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD2AN", 0x00012022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD1AN", 0x00012023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VC3AN", 0x00012024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VC2AN", 0x00012025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120VC1AN", 0x00012026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC120 Version A */
- {"NUC130LE3AN", 0x00013000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LE2AN", 0x00013001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LE1AN", 0x00013002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130LD3AN", 0x00013003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD2AN", 0x00013004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LD1AN", 0x00013005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130LC3AN", 0x00013006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC2AN", 0x00013007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130LC1AN", 0x00013008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RE3AN", 0x00013009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RE2AN", 0x00013010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RE1AN", 0x00013011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RD3AN", 0x00013012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD2AN", 0x00013013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RD1AN", 0x00013014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130RC3AN", 0x00013015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC2AN", 0x00013016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130RC1AN", 0x00013017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VE3AN", 0x00013018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VE2AN", 0x00013019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VE1AN", 0x00013020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130VD3AN", 0x00013021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VD2AN", 0x00013022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VD1AN", 0x00013023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC130VC3AN", 0x00013024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VC2AN", 0x00013025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC130VC1AN", 0x00013026, NUMICRO_BANKS_NUC100(32*1024)},
-
- /* NUC140 Version A */
- {"NUC140LE3AN", 0x00014000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LE2AN", 0x00014001, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LE1AN", 0x00014002, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140LD3AN", 0x00014003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD2AN", 0x00014004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LD1AN", 0x00014005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140LC3AN", 0x00014006, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC2AN", 0x00014007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140LC1AN", 0x00014008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RE3AN", 0x00014009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RE2AN", 0x00014010, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RE1AN", 0x00014011, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140RD3AN", 0x00014012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD2AN", 0x00014013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RD1AN", 0x00014014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140RC3AN", 0x00014015, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC2AN", 0x00014016, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140RC1AN", 0x00014017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VE3AN", 0x00014018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VE2AN", 0x00014019, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VE1AN", 0x00014020, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC140VD3AN", 0x00014021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VD2AN", 0x00014022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VD1AN", 0x00014023, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC140VC3AN", 0x00014024, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VC2AN", 0x00014025, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC140VC1AN", 0x00014026, NUMICRO_BANKS_NUC100(32*1024)},
-
-
- /* M052 */
- {"M052LAN" , 0x00005200, NUMICRO_BANKS_M051(8*1024)},
- {"M052PAN" , 0x00005201, NUMICRO_BANKS_M051(8*1024)},
- {"M052YAN" , 0x00005202, NUMICRO_BANKS_M051(8*1024)},
- {"M052ZAN" , 0x00005203, NUMICRO_BANKS_M051(8*1024)},
-
- /* M054 */
- {"M054LAN" , 0x00005400, NUMICRO_BANKS_M051(16*1024)},
- {"M054PAN" , 0x00005401, NUMICRO_BANKS_M051(16*1024)},
- {"M054YAN" , 0x00005402, NUMICRO_BANKS_M051(16*1024)},
- {"M054ZAN" , 0x00005403, NUMICRO_BANKS_M051(16*1024)},
-
- /* M058 */
- {"M058LAN" , 0x00005800, NUMICRO_BANKS_M051(32*1024)},
- {"M058PAN" , 0x00005801, NUMICRO_BANKS_M051(32*1024)},
- {"M058YAN" , 0x00005802, NUMICRO_BANKS_M051(32*1024)},
- {"M058ZAN" , 0x00005803, NUMICRO_BANKS_M051(32*1024)},
-
- /* M0516 */
- {"M0516LAN" , 0x00005A00, NUMICRO_BANKS_M051(64*1024)},
- {"M0516PAN" , 0x00005A01, NUMICRO_BANKS_M051(64*1024)},
- {"M0516YAN" , 0x00005A02, NUMICRO_BANKS_M051(64*1024)},
- {"M0516ZAN" , 0x00005A03, NUMICRO_BANKS_M051(64*1024)},
- {"M051LBN" , 0x10005100, NUMICRO_BANKS_M051(4*1024)},
- {"M051PBN" , 0x10005101, NUMICRO_BANKS_M051(4*1024)},
- {"M051YBN" , 0x10005102, NUMICRO_BANKS_M051(4*1024)},
- {"M051ZBN" , 0x10005103, NUMICRO_BANKS_M051(4*1024)},
- {"M052LBN" , 0x10005200, NUMICRO_BANKS_M051(8*1024)},
- {"M052PBN" , 0x10005201, NUMICRO_BANKS_M051(8*1024)},
- {"M052YBN" , 0x10005202, NUMICRO_BANKS_M051(8*1024)},
- {"M052ZBN" , 0x10005203, NUMICRO_BANKS_M051(8*1024)},
- {"M054LBN" , 0x10005400, NUMICRO_BANKS_M051(16*1024)},
- {"M054PBN" , 0x10005401, NUMICRO_BANKS_M051(16*1024)},
- {"M054YBN" , 0x10005402, NUMICRO_BANKS_M051(16*1024)},
- {"M054ZBN" , 0x10005403, NUMICRO_BANKS_M051(16*1024)},
- {"M058LBN" , 0x10005800, NUMICRO_BANKS_M051(32*1024)},
- {"M058PBN" , 0x10005801, NUMICRO_BANKS_M051(32*1024)},
- {"M058YBN" , 0x10005802, NUMICRO_BANKS_M051(32*1024)},
- {"M058ZBN" , 0x10005803, NUMICRO_BANKS_M051(32*1024)},
- {"M0516LBN" , 0x10005A00, NUMICRO_BANKS_M051(64*1024)},
- {"M0516PBN" , 0x10005A01, NUMICRO_BANKS_M051(64*1024)},
- {"M0516YBN" , 0x10005A02, NUMICRO_BANKS_M051(64*1024)},
- {"M0516ZBN" , 0x10005A03, NUMICRO_BANKS_M051(64*1024)},
- {"M052LDN" , 0x20005200, NUMICRO_BANKS_M051(8*1024)},
- {"M054LDN" , 0x20005400, NUMICRO_BANKS_M051(16*1024)},
- {"M058LDN" , 0x20005800, NUMICRO_BANKS_M051(32*1024)},
- {"M0516LDN" , 0x20005A00, NUMICRO_BANKS_M051(64*1024)},
- {"M052ZDN" , 0x20005203, NUMICRO_BANKS_M051(8*1024)},
- {"M054ZDN" , 0x20005403, NUMICRO_BANKS_M051(16*1024)},
- {"M058ZDN" , 0x20005803, NUMICRO_BANKS_M051(32*1024)},
- {"M0516ZDN" , 0x20005A03, NUMICRO_BANKS_M051(64*1024)},
- {"M052TDN" , 0x20005204, NUMICRO_BANKS_M051(8*1024)},
- {"M054TDN" , 0x20005404, NUMICRO_BANKS_M051(16*1024)},
- {"M058TDN" , 0x20005804, NUMICRO_BANKS_M051(32*1024)},
- {"M0516TDN" , 0x20005A04, NUMICRO_BANKS_M051(64*1024)},
- {"M052XDN" , 0x20005205, NUMICRO_BANKS_M051(8*1024)},
- {"M054XDN" , 0x20005405, NUMICRO_BANKS_M051(16*1024)},
- {"M058XDN" , 0x20005805, NUMICRO_BANKS_M051(32*1024)},
- {"M0516XDN" , 0x20005A05, NUMICRO_BANKS_M051(64*1024)},
- {"M052LDE" , 0x30005200, NUMICRO_BANKS_M051(8*1024)},
- {"M054LDE" , 0x30005400, NUMICRO_BANKS_M051(16*1024)},
- {"M058LDE" , 0x30005800, NUMICRO_BANKS_M051(32*1024)},
- {"M0516LDE" , 0x30005A00, NUMICRO_BANKS_M051(64*1024)},
- {"M052ZDE" , 0x30005203, NUMICRO_BANKS_M051(8*1024)},
- {"M054ZDE" , 0x30005403, NUMICRO_BANKS_M051(16*1024)},
- {"M058ZDE" , 0x30005803, NUMICRO_BANKS_M051(32*1024)},
- {"M0516ZDE" , 0x30005A03, NUMICRO_BANKS_M051(64*1024)},
- {"M052TDE" , 0x30005204, NUMICRO_BANKS_M051(8*1024)},
- {"M054TDE" , 0x30005404, NUMICRO_BANKS_M051(16*1024)},
- {"M058TDE" , 0x30005804, NUMICRO_BANKS_M051(32*1024)},
- {"M0516TDE" , 0x30005A04, NUMICRO_BANKS_M051(64*1024)},
- {"M052XDE" , 0x30005205, NUMICRO_BANKS_M051(8*1024)},
- {"M054XDE" , 0x30005405, NUMICRO_BANKS_M051(16*1024)},
- {"M058XDE" , 0x30005805, NUMICRO_BANKS_M051(32*1024)},
- {"M0516XDE" , 0x30005A05, NUMICRO_BANKS_M051(64*1024)},
-
- /* Mini51 */
- {"MINI51LAN", 0x00205100, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51QAN", 0x00205101, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51 ", 0x00205102, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51ZAN", 0x00205103, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51TAN", 0x00205104, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI52LAN", 0x00205200, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52QAN", 0x00205201, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52 ", 0x00205202, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52ZAN", 0x00205203, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52TAN", 0x00205204, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI54LAN", 0x00205400, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54QAN", 0x00205401, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54 ", 0x00205402, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54ZAN", 0x00205403, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54TAN", 0x00205404, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI51LBN", 0x10205100, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51QBN", 0x10205101, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51 ", 0x10205102, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51ZBN", 0x10205103, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51TBN", 0x10205104, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI52LBN", 0x10205200, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52QBN", 0x10205201, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52 ", 0x10205202, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52ZBN", 0x10205203, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52TBN", 0x10205204, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI54LBN", 0x10205400, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54QBN", 0x10205401, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54 ", 0x10205402, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54ZBN" , 0x10205403, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54TBN" , 0x10205404, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI51LDE" , 0x20205100, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51QDE" , 0x20205101, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51 " , 0x20205102, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51ZDE" , 0x20205103, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51TDE" , 0x20205104, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI51FDE" , 0x20205105, NUMICRO_BANKS_MINI51(4*1024)},
- {"MINI52LDE" , 0x20205200, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52QDE" , 0x20205201, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52 " , 0x20205202, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52ZDE" , 0x20205203, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52TDE" , 0x20205204, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI52FDE" , 0x20205205, NUMICRO_BANKS_MINI51(8*1024)},
- {"MINI54LDE" , 0x20205400, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54QDE" , 0x20205401, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54 " , 0x20205402, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54ZDE" , 0x20205403, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54TDE" , 0x20205404, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI54FDE" , 0x20205405, NUMICRO_BANKS_MINI51(16*1024)},
- {"MINI55LDE" , 0x20205500, NUMICRO_BANKS_MINI51(16*1024)},
-
- /* NANO100 */
- {"NANO100VF3AN" , 0x00110000, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100VF2AN" , 0x00110001, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100RF3AN" , 0x00110002, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100RF2AN" , 0x00110003, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100LF3AN" , 0x00110004, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100LF2AN" , 0x00110005, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO100VE3AN" , 0x00110006, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100VE2AN" , 0x00110007, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100RE3AN" , 0x00110008, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100RE2AN" , 0x00110009, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100LE3AN" , 0x00110010, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100LE2AN" , 0x00110011, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100VD3AN" , 0x00110012, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VD2AN" , 0x00110013, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VD1AN" , 0x00110014, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100RD3AN" , 0x00110015, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100RD2AN" , 0x00110016, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100RD1AN" , 0x00110017, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD3AN" , 0x00110018, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD2AN" , 0x00110019, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD1AN" , 0x00110020, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VC2AN" , 0x00110021, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100VC1AN" , 0x00110022, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100RC2AN" , 0x00110023, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100RC1AN" , 0x00110024, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100LC2AN" , 0x00110025, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100LC1AN" , 0x00110026, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100VB1AN" , 0x00110027, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO100VB0AN" , 0x00110028, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO100RB1AN" , 0x00110029, NUMICRO_BANKS_NANO(16*1024)},
-
- {"NANO110VF3AN" , 0x00111000, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO110VF2AN" , 0x00111001, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO110RF3AN" , 0x00111002, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO110RF2AN" , 0x00111003, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO110VE3AN" , 0x00111006, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110VE2AN" , 0x00111007, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110RE3AN" , 0x00111008, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110RE2AN" , 0x00111009, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110VD3AN" , 0x00111012, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VD2AN" , 0x00111013, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VD1AN" , 0x00111014, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110RD3AN" , 0x00111015, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110RD2AN" , 0x00111016, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110RD1AN" , 0x00111017, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VC2AN" , 0x00111021, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110VC1AN" , 0x00111022, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110SC2AN" , 0x00111023, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110SC1AN" , 0x00111024, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120VF3AN" , 0x00112000, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120VF2AN" , 0x00112001, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120RF3AN" , 0x00112002, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120RF2AN" , 0x00112003, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120LF3AN" , 0x00112004, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120LF2AN" , 0x00112005, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO120VE3AN" , 0x00112006, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120VE2AN" , 0x00112007, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120RE3AN" , 0x00112008, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120RE2AN" , 0x00112009, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120LE3AN" , 0x00112010, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120LE2AN" , 0x00112011, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120VD3AN" , 0x00112012, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VD2AN" , 0x00112013, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VD1AN" , 0x00112014, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD3AN" , 0x00112015, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD2AN" , 0x00112016, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD1AN" , 0x00112017, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD3AN" , 0x00112018, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD2AN" , 0x00112019, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD1AN" , 0x00112020, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VC2AN" , 0x00112021, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120VC1AN" , 0x00112022, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120SC2AN" , 0x00112023, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120SC1AN" , 0x00112024, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120LC2AN" , 0x00112025, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120LC1AN" , 0x00112026, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130VF3AN" , 0x00113000, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO130VF2AN" , 0x00113001, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO130SF3AN" , 0x00113002, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO130SF2AN" , 0x00113003, NUMICRO_BANKS_NANO(256*1024)},
- {"NANO130VE3AN" , 0x00113006, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO130VE2AN" , 0x00113007, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO130SE3AN" , 0x00113008, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO130SE2AN" , 0x00113009, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO130VD3AN" , 0x00113012, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VD2AN" , 0x00113013, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VD1AN" , 0x00113014, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD3AN" , 0x00113015, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD2AN" , 0x00113016, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD1AN" , 0x00113017, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VC2AN" , 0x00113021, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130VC1AN" , 0x00113022, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130SC2AN" , 0x00113023, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130SC1AN" , 0x00113024, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100KE3BN" , 0x00110030, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100KE2BN" , 0x00110031, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100VE3BN" , 0x00110032, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100VE2BN" , 0x00110033, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100SE3BN" , 0x00110034, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100SE2BN" , 0x00110035, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100LE3BN" , 0x00110036, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100LE2BN" , 0x00110037, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO100KD3BN" , 0x00110038, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100KD2BN" , 0x00110039, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VD3BN" , 0x0011003A, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100VD2BN" , 0x0011003B, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100SD3BN" , 0x0011003C, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100SD2BN" , 0x0011003D, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD3BN" , 0x0011003E, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100LD2BN" , 0x0011003F, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO100KC2BN" , 0x00110040, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100VC2BN" , 0x00110041, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100SC2BN" , 0x00110042, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO100LC2BN" , 0x00110043, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110KE3BN" , 0x00111030, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110KE2BN" , 0x00111031, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110VE3BN" , 0x00111032, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110VE2BN" , 0x00111033, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110SE3BN" , 0x00111034, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110SE2BN" , 0x00111035, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110KD3BN" , 0x00111038, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110KD2BN" , 0x00111039, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VD3BN" , 0x0011103A, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110VD2BN" , 0x0011103B, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110SD3BN" , 0x0011103C, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110SD2BN" , 0x0011103D, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO110KC2BN" , 0x00111040, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110VC2BN" , 0x00111041, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110SC2BN" , 0x00111042, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120KE3BN" , 0x00112030, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120KE2BN" , 0x00112031, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120VE3BN" , 0x00112032, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120VE2BN" , 0x00112033, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120SE3BN" , 0x00112034, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120SE2BN" , 0x00112035, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120LE3BN" , 0x00112036, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120LE2BN" , 0x00112037, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO120KD3BN" , 0x00112038, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120KD2BN" , 0x00112039, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VD3BN" , 0x0011203A, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120VD2BN" , 0x0011203B, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD3BN" , 0x0011203C, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120SD2BN" , 0x0011203D, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD3BN" , 0x0011203E, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120LD2BN" , 0x0011203F, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO120KC2BN" , 0x00112040, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120VC2BN" , 0x00112041, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120SC2BN" , 0x00112042, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO120LC2BN" , 0x00112043, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130KE3BN" , 0x00113030, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130KE2BN" , 0x00113031, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130VE3BN" , 0x00113032, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130VE2BN" , 0x00113033, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130SE3BN" , 0x00113034, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130SE2BN" , 0x00113035, NUMICRO_BANKS_NANO(123*1024)},
- {"NANO130KD3BN" , 0x00113038, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130KD2BN" , 0x00113039, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VD3BN" , 0x0011303A, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130VD2BN" , 0x0011303B, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD3BN" , 0x0011303C, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130SD2BN" , 0x0011303D, NUMICRO_BANKS_NANO(64*1024)},
- {"NANO130KC2BN" , 0x00113040, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130VC2BN" , 0x00113041, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO130SC2BN" , 0x00113042, NUMICRO_BANKS_NANO(32*1024)},
- {"N512DC4" , 0x00100000, NUMICRO_BANKS_NANO(64*1024)},
- {"N512LC4" , 0x00100001, NUMICRO_BANKS_NANO(64*1024)},
- {"N512MC4" , 0x00100003, NUMICRO_BANKS_NANO(64*1024)},
-
- {"N512SC4" , 0x00100005, NUMICRO_BANKS_NANO(64*1024)},
- {"N512VD4" , 0x00100008, NUMICRO_BANKS_NANO(128*1024)},
- {"N512MD4" , 0x00100009, NUMICRO_BANKS_NANO(128*1024)},
- {"N512SD4" , 0x00100010, NUMICRO_BANKS_NANO(128*1024)},
- {"NANO110RC2BN" , 0x00111043, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO110RD3BN" , 0x00111045, NUMICRO_BANKS_NANO(64*1024)},
- {"TX110VE3BN" , 0x00111036, NUMICRO_BANKS_NANO(128*1024)},
-
- /* NANO102/NANO112 */
- {"NANO112LB0AN" , 0x00111201, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112LB1AN" , 0x00111202, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112LC1AN" , 0x00111203, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112LC2AN" , 0x00111204, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112SB0AN" , 0x00111205, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112SB1AN" , 0x00111206, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112SC1AN" , 0x00111207, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112SC2AN" , 0x00111208, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112RB0AN" , 0x00111209, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112RB1AN" , 0x00111210, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112RC1AN" , 0x00111211, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112RC2AN" , 0x00111212, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112VB0AN" , 0x00111213, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112VB1AN" , 0x00111214, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO112VC1AN" , 0x00111215, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO112VC2AN" , 0x00111216, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102ZB0AN" , 0x00110201, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102ZB1AN" , 0x00110202, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102ZC1AN" , 0x00110203, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102ZC2AN" , 0x00110204, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102LB0AN" , 0x00110205, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102LB1AN" , 0x00110206, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102LC1AN" , 0x00110207, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102LC2AN" , 0x00110208, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102SB0AN" , 0x00110209, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102SB1AN" , 0x00110210, NUMICRO_BANKS_NANO(16*1024)},
- {"NANO102SC1AN" , 0x00110211, NUMICRO_BANKS_NANO(32*1024)},
- {"NANO102SC2AN" , 0x00110212, NUMICRO_BANKS_NANO(32*1024)},
-
- /* NUC103/NUC105/NUC123 */
- {"NUC123SC2AN" , 0x00012305, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC123SD4AN" , 0x00012315, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC123LC2AN" , 0x00012325, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC103LC2AN" , 0x00010325, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC105LC2AN" , 0x00010525, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC123LD4AN" , 0x00012335, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC103LD4AN" , 0x00010335, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC105LD4AN" , 0x00010535, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC123ZC2AN" , 0x00012345, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC103ZC2AN" , 0x00010345, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC105ZC2AN" , 0x00010545, NUMICRO_BANKS_NUC100(36*1024)},
- {"NUC123ZD4AN" , 0x00012355, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC103ZD4AN" , 0x00010355, NUMICRO_BANKS_NUC100(68*1024)},
- {"NUC105ZD4AN" , 0x00010555, NUMICRO_BANKS_NUC100(68*1024)},
-
- /* NUC200 */
- {"NUC200LC2AN" , 0x00020007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200LD2AN" , 0x00020004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC200LE3AN" , 0x00020000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC200SC1AN" , 0x00020035, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200SD2AN" , 0x00020031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC200SE3AN" , 0x00020027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC200VE3AN" , 0x00020018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC220LC2AN" , 0x00022007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC220LD2AN" , 0x00022004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC220LE3AN" , 0x00022000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC220SC1AN" , 0x00022035, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC220SD2AN" , 0x00022031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC220SE3AN" , 0x00022027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC220VE3AN" , 0x00022018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230LC2AN" , 0x00023007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC230LD2AN" , 0x00023004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC230LE3AN" , 0x00023000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230SC1AN" , 0x00023035, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC230SD2AN" , 0x00023031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC230SE3AN" , 0x00023027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230VE3AN" , 0x00023018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240LC2AN" , 0x00024007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC240LD2AN" , 0x00024004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC240LE3AN" , 0x00024000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240SC1AN" , 0x00024035, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC240SD2AN" , 0x00024031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC240SE3AN" , 0x00024027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240VE3AN" , 0x00024018, NUMICRO_BANKS_NUC100(128*1024)},
-
- /* NUC200 NUC2XXAE */
- {"NUC230RC1AE" , 0x40013017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200LC2AE" , 0x10020007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200LD2AE" , 0x10020004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC200LE3AE" , 0x10020000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC200SC2AE" , 0x10020034, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC200SD2AE" , 0x10020031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC200SE3AE" , 0x10020027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC200VE3AE" , 0x10020018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230LC2AE" , 0x10023007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC230LD2AE" , 0x10023004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC230LE3AE" , 0x10023000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230SC2AE" , 0x10023034, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC230SD2AE" , 0x10023031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC230SE3AE" , 0x10023027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC230VE3AE" , 0x10023018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240LC2AE" , 0x10024007, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC240LD2AE" , 0x10024004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC240LE3AE" , 0x10024000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240SC2AE" , 0x10024034, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC240SD2AE" , 0x10024031, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC240SE3AE" , 0x10024027, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC240VE3AE" , 0x10024018, NUMICRO_BANKS_NUC100(128*1024)},
-
- /* NUC100 Version D */
- {"NUC100LC1DN" , 0x30010008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100LD1DN" , 0x30010005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD2DN" , 0x30010004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RC1DN" , 0x30010017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC100RD1DN" , 0x30010014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RD2DN" , 0x30010013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LD3DN" , 0x30010003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100LE3DN" , 0x30010000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100RD3DN" , 0x30010012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100RE3DN" , 0x30010009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC100VD2DN" , 0x30010022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VD3DN" , 0x30010021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC100VE3DN" , 0x30010018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120LC1DN" , 0x30012008, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120LD1DN" , 0x30012005, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD2DN" , 0x30012004, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RC1DN" , 0x30012017, NUMICRO_BANKS_NUC100(32*1024)},
- {"NUC120RD1DN" , 0x30012014, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RD2DN" , 0x30012013, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LD3DN" , 0x30012003, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120LE3DN" , 0x30012000, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120RD3DN" , 0x30012012, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120RE3DN" , 0x30012009, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC120VD2DN" , 0x30012022, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VD3DN" , 0x30012021, NUMICRO_BANKS_NUC100(64*1024)},
- {"NUC120VE3DN" , 0x30012018, NUMICRO_BANKS_NUC100(128*1024)},
- {"NUC130RC1DN" , 0x30013017, NUMICRO_BANKS_NUC100(32*1024)},
-
- {"UNKNOWN" , 0x00000000, NUMICRO_BANKS_NUC100(128*1024)},
-};
-
-/* Private bank information for NuMicro. */
-struct numicro_flash_bank {
- struct working_area *write_algorithm;
- int probed;
- const struct numicro_cpu_type *cpu;
-};
-
-/* Private methods */
-static int numicro_reg_unlock(struct target *target)
-{
- uint32_t is_protected;
- int retval = ERROR_OK;
-
- /* Check to see if NUC is register unlocked or not */
- retval = target_read_u32(target, NUMICRO_SYS_WRPROT, &is_protected);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("protected = 0x%08" PRIx32 "", is_protected);
- if (is_protected == 0) { /* means protected - so unlock it */
- /* unlock flash registers */
- retval = target_write_u32(target, NUMICRO_SYS_WRPROT, REG_KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, NUMICRO_SYS_WRPROT, REG_KEY2);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, NUMICRO_SYS_WRPROT, REG_KEY3);
- if (retval != ERROR_OK)
- return retval;
- }
- /* Check that unlock worked */
- retval = target_read_u32(target, NUMICRO_SYS_WRPROT, &is_protected);
- if (retval != ERROR_OK)
- return retval;
-
- if (is_protected == 1) { /* means unprotected */
- LOG_DEBUG("protection removed");
- } else {
- LOG_DEBUG("still protected!!");
- }
-
- return ERROR_OK;
-}
-
-static int numicro_init_isp(struct target *target)
-{
- uint32_t reg_stat;
- int retval = ERROR_OK;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = numicro_reg_unlock(target);
- if (retval != ERROR_OK)
- return retval;
-
- /* Enable ISP/SRAM/TICK Clock */
- retval = target_read_u32(target, NUMICRO_SYSCLK_AHBCLK, ®_stat);
- if (retval != ERROR_OK)
- return retval;
-
- reg_stat |= AHBCLK_ISP_EN | AHBCLK_SRAM_EN | AHBCLK_TICK_EN;
- retval = target_write_u32(target, NUMICRO_SYSCLK_AHBCLK, reg_stat);
- if (retval != ERROR_OK)
- return retval;
-
- /* Enable ISP */
- retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, ®_stat);
- if (retval != ERROR_OK)
- return retval;
-
- reg_stat |= ISPCON_ISPFF | ISPCON_LDUEN | ISPCON_APUEN | ISPCON_CFGUEN | ISPCON_ISPEN;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCON, reg_stat);
- if (retval != ERROR_OK)
- return retval;
-
- /* Write one to undocumented flash control register */
- retval = target_write_u32(target, NUMICRO_FLASH_CHEAT, 1);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static uint32_t numicro_fmc_cmd(struct target *target, uint32_t cmd, uint32_t addr, uint32_t wdata, uint32_t* rdata)
-{
- uint32_t timeout, status;
- int retval = ERROR_OK;
-
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD, cmd);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, NUMICRO_FLASH_ISPDAT, wdata);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, addr);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, NUMICRO_FLASH_ISPTRG, ISPTRG_ISPGO);
- if (retval != ERROR_OK)
- return retval;
-
- /* Wait for busy to clear - check the GO flag */
- timeout = 100;
- for (;;) {
- retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
- if ((status & (ISPTRG_ISPGO)) == 0)
- break;
- if (timeout-- <= 0) {
- LOG_DEBUG("timed out waiting for flash");
- return ERROR_FAIL;
- }
- busy_sleep(1); /* can use busy sleep for short times. */
- }
-
- retval = target_read_u32(target, NUMICRO_FLASH_ISPDAT, rdata);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-
-/* NuMicro Program-LongWord Microcodes */
-static const uint8_t numicro_flash_write_code[] = {
- /* Params:
- * r0 - workarea buffer / result
- * r1 - target address
- * r2 - wordcount
- * Clobbered:
- * r4 - tmp
- * r5 - tmp
- * r6 - tmp
- * r7 - tmp
- */
-
- /* .L1: */
- /* for(register uint32_t i=0;i<wcount;i++){ */
- 0x04, 0x1C, /* mov r4, r0 */
- 0x00, 0x23, /* mov r3, #0 */
- /* .L2: */
- 0x0D, 0x1A, /* sub r5, r1, r0 */
- 0x67, 0x19, /* add r7, r4, r7 */
- 0x93, 0x42, /* cmp r3, r2 */
- 0x0C, 0xD0, /* beq .L7 */
- /* .L4: */
- /* NUMICRO_FLASH_ISPADR = faddr; */
- 0x08, 0x4E, /* ldr r6, .L8 */
- 0x37, 0x60, /* str r7, [r6] */
- /* NUMICRO_FLASH_ISPDAT = *pLW; */
- 0x80, 0xCC, /* ldmia r4!, {r7} */
- 0x08, 0x4D, /* ldr r5, .L8+4 */
- 0x2F, 0x60, /* str r7, [r5] */
- /* faddr += 4; */
- /* pLW++; */
- /* Trigger write action */
- /* NUMICRO_FLASH_ISPTRG = ISPTRG_ISPGO; */
- 0x08, 0x4D, /* ldr r5, .L8+8 */
- 0x01, 0x26, /* mov r6, #1 */
- 0x2E, 0x60, /* str r6, [r5] */
- /* .L3: */
- /* while((NUMICRO_FLASH_ISPTRG & ISPTRG_ISPGO) == ISPTRG_ISPGO){}; */
- 0x2F, 0x68, /* ldr r7, [r5] */
- 0xFF, 0x07, /* lsl r7, r7, #31 */
- 0xFC, 0xD4, /* bmi .L3 */
-
- 0x01, 0x33, /* add r3, r3, #1 */
- 0xEE, 0xE7, /* b .L2 */
- /* .L7: */
- /* return (NUMICRO_FLASH_ISPCON & ISPCON_ISPFF); */
- 0x05, 0x4B, /* ldr r3, .L8+12 */
- 0x18, 0x68, /* ldr r0, [r3] */
- 0x40, 0x21, /* mov r1, #64 */
- 0x08, 0x40, /* and r0, r1 */
- /* .L9: */
- 0x00, 0xBE, /* bkpt #0 */
- /* .L8: */
- 0x04, 0xC0, 0x00, 0x50,/* .word 1342226436 */
- 0x08, 0xC0, 0x00, 0x50,/* .word 1342226440 */
- 0x10, 0xC0, 0x00, 0x50,/* .word 1342226448 */
- 0x00, 0xC0, 0x00, 0x50 /* .word 1342226432 */
-};
-/* Program LongWord Block Write */
-static int numicro_writeblock(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 1024; /* Default minimum value */
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[3];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* Params:
- * r0 - workarea buffer / result
- * r1 - target address
- * r2 - wordcount
- * Clobbered:
- * r4 - tmp
- * r5 - tmp
- * r6 - tmp
- * r7 - tmp
- */
-
- /* Increase buffer_size if needed */
- if (buffer_size < (target->working_area_size/2))
- buffer_size = (target->working_area_size/2);
-
- /* check code alignment */
- if (offset & 0x1) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* allocate working area with flash programming code */
- if (target_alloc_working_area(target, sizeof(numicro_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(numicro_flash_write_code), numicro_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 4;
- if (buffer_size <= 256) {
- /* free working area, write algorithm already allocated */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("No large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* *pLW (*buffer) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* faddr */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* number of words to program */
-
- struct armv7m_common *armv7m = target_to_armv7m(target);
- if (armv7m == NULL) {
- /* something is very wrong if armv7m is NULL */
- LOG_ERROR("unable to get armv7m target");
- return retval;
- }
-
- /* write code buffer and use Flash programming code within NuMicro */
- /* Set breakpoint to 0 with time-out of 1000 ms */
- while (count > 0) {
- uint32_t thisrun_count = (count > (buffer_size / 4)) ? (buffer_size / 4) : count;
-
- retval = target_write_buffer(target, source->address, thisrun_count * 4, buffer);
- if (retval != ERROR_OK)
- break;
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
-
- retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- write_algorithm->address, 0, 100000, &armv7m_info);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing NuMicro Flash programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- buffer += thisrun_count * 4;
- address += thisrun_count * 4;
- count -= thisrun_count;
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
- return retval;
-}
-
-/* Flash Lock checking - examines the lock bit. */
-static int numicro_protect_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- uint32_t set, config[2];
- int i, retval = ERROR_OK;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_INFO("Nuvoton NuMicro: Flash Lock Check...");
-
- retval = numicro_init_isp(target);
- if (retval != ERROR_OK)
- return retval;
-
- /* Read CONFIG0,CONFIG1 */
- numicro_fmc_cmd(target, ISPCMD_READ, NUMICRO_CONFIG0, 0 , &config[0]);
- numicro_fmc_cmd(target, ISPCMD_READ, NUMICRO_CONFIG1, 0 , &config[1]);
-
- LOG_DEBUG("CONFIG0: 0x%" PRIx32 ",CONFIG1: 0x%" PRIx32 "", config[0], config[1]);
-
- if ((config[0] & (1<<7)) == 0)
- LOG_INFO("CBS=0: Boot From LPROM");
- else
- LOG_INFO("CBS=1: Boot From APROM");
-
- if ((config[0] & CONFIG0_LOCK_MASK) == 0) {
-
- LOG_INFO("Flash is secure locked!");
- LOG_INFO("TO UNLOCK FLASH,EXECUTE chip_erase COMMAND!!");
- set = 1;
- } else {
- LOG_INFO("Flash is not locked!");
- set = 0;
- }
-
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_protected = set;
-
- return ERROR_OK;
-}
-
-
-static int numicro_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- uint32_t timeout, status;
- int i, retval = ERROR_OK;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_INFO("Nuvoton NuMicro: Sector Erase ... (%d to %d)", first, last);
-
- retval = numicro_init_isp(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD, ISPCMD_ERASE);
- if (retval != ERROR_OK)
- return retval;
-
- for (i = first; i <= last; i++) {
- LOG_DEBUG("erasing sector %d at address 0x%" PRIx32 "", i, bank->base + bank->sectors[i].offset);
- retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + bank->sectors[i].offset);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPTRG, ISPTRG_ISPGO); /* This is the only bit available */
- if (retval != ERROR_OK)
- return retval;
-
- /* wait for busy to clear - check the GO flag */
- timeout = 100;
- for (;;) {
- retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
- if (status == 0)
- break;
- if (timeout-- <= 0) {
- LOG_DEBUG("timed out waiting for flash");
- return ERROR_FAIL;
- }
- busy_sleep(1); /* can use busy sleep for short times. */
- }
-
- /* check for failure */
- retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, &status);
- if (retval != ERROR_OK)
- return retval;
- if ((status & ISPCON_ISPFF) != 0) {
- LOG_DEBUG("failure: 0x%" PRIx32 "", status);
- /* if bit is set, then must write to it to clear it. */
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCON, (status | ISPCON_ISPFF));
- if (retval != ERROR_OK)
- return retval;
- } else {
- bank->sectors[i].is_erased = 1;
- }
- }
-
- /* done, */
- LOG_DEBUG("Erase done.");
-
- return ERROR_OK;
-}
-
-/* The write routine stub. */
-static int numicro_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t timeout, status;
- uint8_t *new_buffer = NULL;
- int retval = ERROR_OK;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_INFO("Nuvoton NuMicro: Flash Write ...");
-
- retval = numicro_init_isp(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCMD, ISPCMD_WRITE);
- if (retval != ERROR_OK)
- return retval;
-
- if (count & 0x3) {
- uint32_t old_count = count;
- count = (old_count | 3) + 1;
- new_buffer = malloc(count);
- if (new_buffer == NULL) {
- LOG_ERROR("odd number of bytes to write and no memory "
- "for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("odd number of bytes to write (%d), extending to %d "
- "and padding with 0xff", old_count, count);
- memset(new_buffer, 0xff, count);
- buffer = memcpy(new_buffer, buffer, old_count);
- }
-
- uint32_t words_remaining = count / 4;
-
- /* try using a block write */
- retval = numicro_writeblock(bank, buffer, offset, words_remaining);
-
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single word accesses */
- LOG_WARNING("couldn't use block writes, falling back to single "
- "memory accesses");
-
- /* program command */
- for (uint32_t i = 0; i < count; i += 4) {
-
- LOG_DEBUG("write longword @ %08X", offset + i);
-
- uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
- memcpy(padding, buffer + i, MIN(4, count-i));
-
- retval = target_write_u32(target, NUMICRO_FLASH_ISPADR, bank->base + offset + i);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_memory(target, NUMICRO_FLASH_ISPDAT, 4, 1, padding);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, NUMICRO_FLASH_ISPTRG, ISPTRG_ISPGO);
- if (retval != ERROR_OK)
- return retval;
-
- /* wait for busy to clear - check the GO flag */
- timeout = 100;
- for (;;) {
- retval = target_read_u32(target, NUMICRO_FLASH_ISPTRG, &status);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
- if (status == 0)
- break;
- if (timeout-- <= 0) {
- LOG_DEBUG("timed out waiting for flash");
- return ERROR_FAIL;
- }
- busy_sleep(1); /* can use busy sleep for short times. */
- }
-
- }
- }
-
- /* check for failure */
- retval = target_read_u32(target, NUMICRO_FLASH_ISPCON, &status);
- if (retval != ERROR_OK)
- return retval;
- if ((status & ISPCON_ISPFF) != 0) {
- LOG_DEBUG("failure: 0x%" PRIx32 "", status);
- /* if bit is set, then must write to it to clear it. */
- retval = target_write_u32(target, NUMICRO_FLASH_ISPCON, (status | ISPCON_ISPFF));
- if (retval != ERROR_OK)
- return retval;
- } else {
- LOG_DEBUG("Write OK");
- }
-
- /* done. */
- LOG_DEBUG("Write done.");
-
- return ERROR_OK;
-}
-
-static int numicro_get_cpu_type(struct target *target, const struct numicro_cpu_type** cpu)
-{
- uint32_t part_id;
- int retval = ERROR_OK;
-
- /* Read NuMicro PartID */
- retval = target_read_u32(target, NUMICRO_SYS_BASE, &part_id);
- if (retval != ERROR_OK) {
- LOG_WARNING("NuMicro flash driver: Failed to Get PartID\n");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- LOG_INFO("Device ID: 0x%08" PRIx32 "", part_id);
- /* search part numbers */
- for (size_t i = 0; i < sizeof(NuMicroParts)/sizeof(NuMicroParts[0]); i++) {
- if (part_id == NuMicroParts[i].partid) {
- *cpu = &NuMicroParts[i];
- LOG_INFO("Device Name: %s", (*cpu)->partname);
- return ERROR_OK;
- }
- }
-
- return ERROR_FAIL;
-}
-
-static int numicro_get_flash_size(struct flash_bank *bank, const struct numicro_cpu_type *cpu, uint32_t *flash_size)
-{
- for (size_t i = 0; i < cpu->n_banks; i++) {
- if (bank->base == cpu->bank[i].base) {
- *flash_size = cpu->bank[i].size;
- LOG_INFO("bank base = 0x%08" PRIx32 ", size = 0x%08" PRIx32 "", bank->base, *flash_size);
- return ERROR_OK;
- }
- }
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-static int numicro_probe(struct flash_bank *bank)
-{
- uint32_t flash_size, offset = 0;
- int num_pages;
- const struct numicro_cpu_type *cpu;
- struct target *target = bank->target;
- int retval = ERROR_OK;
-
- retval = numicro_get_cpu_type(target, &cpu);
- if (retval != ERROR_OK) {
- LOG_WARNING("NuMicro flash driver: Failed to detect a known part\n");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- retval = numicro_get_flash_size(bank, cpu, &flash_size);
- if (retval != ERROR_OK) {
- LOG_WARNING("NuMicro flash driver: Failed to detect flash size\n");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- num_pages = flash_size / NUMICRO_PAGESIZE;
-
- bank->num_sectors = num_pages;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
- bank->size = flash_size;
-
- for (int i = 0; i < num_pages; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = NUMICRO_PAGESIZE;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 0;
- offset += NUMICRO_PAGESIZE;
- }
-
- struct numicro_flash_bank *numicro_info = bank->driver_priv;
- numicro_info->probed = true;
- numicro_info->cpu = cpu;
- LOG_DEBUG("Nuvoton NuMicro: Probed ...");
-
- return ERROR_OK;
-}
-
-/* Standard approach to autoprobing. */
-static int numicro_auto_probe(struct flash_bank *bank)
-{
- struct numicro_flash_bank *numicro_info = bank->driver_priv;
- if (numicro_info->probed)
- return ERROR_OK;
- return numicro_probe(bank);
-}
-
-
-/* This is the function called in the config file. */
-FLASH_BANK_COMMAND_HANDLER(numicro_flash_bank_command)
-{
- struct numicro_flash_bank *bank_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- LOG_DEBUG("add flash_bank numicro %s", bank->name);
-
- bank_info = malloc(sizeof(struct numicro_flash_bank));
-
- memset(bank_info, 0, sizeof(struct numicro_flash_bank));
-
- bank->driver_priv = bank_info;
-
- return ERROR_OK;
-
-}
-
-COMMAND_HANDLER(numicro_handle_read_isp_command)
-{
- uint32_t address;
- uint32_t ispdat;
- int retval = ERROR_OK;
-
- if (CMD_ARGC != 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
-
- struct target *target = get_current_target(CMD_CTX);
-
- retval = numicro_init_isp(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = numicro_fmc_cmd(target, ISPCMD_READ, address, 0, &ispdat);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_INFO("0x%08" PRIx32 ": 0x%08" PRIx32, address, ispdat);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(numicro_handle_write_isp_command)
-{
- uint32_t address;
- uint32_t ispdat, rdat;
- int retval = ERROR_OK;
-
- if (CMD_ARGC != 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], ispdat);
-
- struct target *target = get_current_target(CMD_CTX);
-
- retval = numicro_init_isp(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = numicro_fmc_cmd(target, ISPCMD_WRITE, address, ispdat, &rdat);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_INFO("0x%08" PRIx32 ": 0x%08" PRIx32, address, ispdat);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(numicro_handle_chip_erase_command)
-{
- int retval = ERROR_OK;
- uint32_t rdat;
-
- if (CMD_ARGC != 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct target *target = get_current_target(CMD_CTX);
-
- retval = numicro_init_isp(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = numicro_fmc_cmd(target, ISPCMD_CHIPERASE, 0, 0, &rdat);
- if (retval != ERROR_OK) {
- command_print(CMD_CTX, "numicro chip_erase failed");
- return retval;
- }
-
- command_print(CMD_CTX, "numicro chip_erase complete");
-
- return ERROR_OK;
-}
-
-static const struct command_registration numicro_exec_command_handlers[] = {
- {
- .name = "read_isp",
- .handler = numicro_handle_read_isp_command,
- .usage = "address",
- .mode = COMMAND_EXEC,
- .help = "read flash through ISP.",
- },
- {
- .name = "write_isp",
- .handler = numicro_handle_write_isp_command,
- .usage = "address value",
- .mode = COMMAND_EXEC,
- .help = "write flash through ISP.",
- },
- {
- .name = "chip_erase",
- .handler = numicro_handle_chip_erase_command,
- .mode = COMMAND_EXEC,
- .help = "chip erase through ISP.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration numicro_command_handlers[] = {
- {
- .name = "numicro",
- .mode = COMMAND_ANY,
- .help = "numicro flash command group",
- .usage = "",
- .chain = numicro_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver numicro_flash = {
- .name = "numicro",
- .commands = numicro_command_handlers,
- .flash_bank_command = numicro_flash_bank_command,
- .erase = numicro_erase,
- .write = numicro_write,
- .read = default_flash_read,
- .probe = numicro_probe,
- .auto_probe = numicro_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = numicro_protect_check,
-};
[22/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/niietcm4.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/niietcm4.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/niietcm4.c
deleted file mode 100755
index 9e32c01..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/niietcm4.c
+++ /dev/null
@@ -1,1743 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 by Bogdan Kolbov *
- * kolbov@niiet.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-#define FLASH_DRIVER_VER 0x00010000
-#define CHIPID_ADDR 0xF0000000
-#define K1921VK01T_ID 0x00000000
-
-/*==============================================================================
- * FLASH CONTROL REGS
- *==============================================================================
- */
-
-#define MAIN_MEM_TYPE 0
-#define INFO_MEM_TYPE 1
-#define SERVICE_MODE_ERASE_ADDR 0x80030164
-#define MAGIC_KEY 0xA442
-
-/*-- BOOTFLASH ---------------------------------------------------------------*/
-#define BOOTFLASH_BASE 0xA001C000
-#define FMA (BOOTFLASH_BASE + 0x00)
-#define FMD1 (BOOTFLASH_BASE + 0x04)
-#define FMC (BOOTFLASH_BASE + 0x08)
-#define FCIS (BOOTFLASH_BASE + 0x0C)
-#define FCIM (BOOTFLASH_BASE + 0x10)
-#define FCIC (BOOTFLASH_BASE + 0x14)
-#define FMD2 (BOOTFLASH_BASE + 0x50)
-#define FMD3 (BOOTFLASH_BASE + 0x54)
-#define FMD4 (BOOTFLASH_BASE + 0x58)
-
-
-/*---- FMC: Command register */
-#define FMC_WRITE (1<<0) /* Writing in main region */
-#define FMC_PAGE_ERASE (1<<1) /* Page erase the main region */
-#define FMC_FULL_ERASE (1<<2) /* Erase full flash */
-#define FMC_WRITE_IFB (1<<4) /* Writing in info region */
-#define FMC_PAGEERASE_IFB (1<<5) /* Erase page of info region */
-#define FMC_MAGIC_KEY (MAGIC_KEY<<16) /* Operation run command */
-
-/*---- FCIS: Status register */
-#define FCIS_OP_CMLT (1<<0) /* Completion flag operation */
-#define FCIS_OP_ERROR (1<<1) /* Flag operation error */
-
-/*---- FCIC: CLear status register */
-#define FCIC_CLR_OPCMLT (1<<0) /* Cleare completion flag in register FCIS */
-#define FCIC_CLR_OPERROR (1<<1) /* Cleare error flag in register FCIS */
-
-/*-- USERFLASH ---------------------------------------------------------------*/
-#define USERFLASH_PAGE_SIZE 256
-#define USERFLASH_PAGE_TOTALNUM 256
-
-#define USERFLASH_BASE 0xA0022000
-#define UFMA (USERFLASH_BASE + 0x00)
-#define UFMD (USERFLASH_BASE + 0x04)
-#define UFMC (USERFLASH_BASE + 0x08)
-#define UFCIS (USERFLASH_BASE + 0x0C)
-#define UFCIM (USERFLASH_BASE + 0x10)
-#define UFCIC (USERFLASH_BASE + 0x14)
-
-/*---- UFMC: Command register */
-#define UFMC_WRITE (1<<0) /* Writing in main region */
-#define UFMC_PAGE_ERASE (1<<1) /* Paged erase the main region */
-#define UFMC_FULL_ERASE (1<<2) /* Erase full flash */
-#define UFMC_READ (1<<3) /* Reading from main region */
-#define UFMC_WRITE_IFB (1<<4) /* Writing in info region */
-#define UFMC_PAGEERASE_IFB (1<<5) /* Erase page of info region */
-#define UFMC_READ_IFB (1<<6) /* Reading from info region */
-#define UFMC_MAGIC_KEY (MAGIC_KEY<<16) /* Operation run command */
-
-/*---- UFCIS: Status register */
-#define UFCIS_OP_CMLT (1<<0) /* Completion flag operation */
-#define UFCIS_OP_ERROR (1<<1) /* Flag operation error */
-
-/*---- UFCIC: CLear status register */
-#define UFCIC_CLR_OPCMLT (1<<0) /* Cleared completion flag in register FCIS */
-#define UFCIC_CLR_OPERROR (1<<1) /* Cleared error flag in register FCIS */
-
-/*---- In info userflash address space */
-#define INFOWORD0_ADDR 0x00
-#define INFOWORD0_BOOTFROM_IFB (1<<0) /* Boot from bootflash or bootflash_ifb */
-#define INFOWORD0_EN_GPIO (1<<1) /* Remap to 0x00000000 extmem or bootflash */
-#define INFOWORD0_BOOTFROM_IFB_POS 0
-#define INFOWORD0_EN_GPIO_POS 1
-#define INFOWORD0_EXTMEM_SEL_POS 3 /* Choose altfunc of gpio to work with extmem */
-
-#define INFOWORD1_ADDR 0x01
-#define INFOWORD1_PINNUM_POS 0 /* Choose gpio pin number to control extmem boot */
-#define INFOWORD1_PORTNUM_POS 4 /* Choose gpio port to control extmem boot */
-
-#define INFOWORD2_ADDR 0x02
-#define INFOWORD2_LOCK_IFB_BF (1<<0) /* Protect info part of bootflash */
-
-#define INFOWORD3_ADDR 0x03
-#define INFOWORD3_LOCK_IFB_UF (1<<0) /* Protect info part of userflash */
-
-#define BF_LOCK_ADDR 0x40
-#define UF_LOCK_ADDR 0x80
-
-/**
- * Private data for flash driver.
- */
-struct niietcm4_flash_bank {
- /* target params */
- bool probed;
- uint32_t chipid;
- char *chip_name;
- char chip_brief[4096];
- /* not mapped userflash params */
- uint32_t uflash_width;
- uint32_t uflash_size;
- uint32_t uflash_pagetotal;
- uint32_t uflash_info_size;
- uint32_t uflash_info_pagetotal;
- /* boot params */
- bool bflash_info_remap;
- char *extmem_boot_port;
- uint32_t extmem_boot_pin;
- uint32_t extmem_boot_altfunc;
- bool extmem_boot;
-};
-
-/*==============================================================================
- * HELPER FUNCTIONS
- *==============================================================================
- */
-
-/**
- * Wait while operation with bootflash being performed and check result status
- */
-static int niietcm4_opstatus_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- int retval;
- int timeout = 5000;
-
- uint32_t flash_status;
- retval = target_read_u32(target, FCIS, &flash_status);
- if (retval != ERROR_OK)
- return retval;
-
- while (flash_status == 0x00) {
- retval = target_read_u32(target, FCIS, &flash_status);
- if (retval != ERROR_OK)
- return retval;
- if (timeout-- <= 0) {
- LOG_ERROR("Bootflash operation timeout");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- busy_sleep(1); /* can use busy sleep for short times. */
- }
- if (flash_status == FCIS_OP_ERROR) {
- LOG_ERROR("Bootflash operation error");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- /* clear status */
- uint32_t flash_cmd = FCIC_CLR_OPCMLT | FCIC_CLR_OPERROR;
- retval = target_write_u32(target, FCIC, flash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- return retval;
-}
-
-/**
- * Wait while operation with userflash being performed and check result status
- */
-static int niietcm4_uopstatus_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- int retval;
- int timeout = 5000;
-
- uint32_t uflash_status;
- retval = target_read_u32(target, UFCIS, &uflash_status);
- if (retval != ERROR_OK)
- return retval;
-
- while (uflash_status == 0x00) {
- retval = target_read_u32(target, UFCIS, &uflash_status);
- if (retval != ERROR_OK)
- return retval;
- if (timeout-- <= 0) {
- LOG_ERROR("Userflash operation timeout");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- busy_sleep(1); /* can use busy sleep for short times. */
- }
- if (uflash_status == UFCIS_OP_ERROR) {
- LOG_ERROR("Userflash operation error");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- /* clear status */
- uint32_t uflash_cmd = UFCIC_CLR_OPCMLT | UFCIC_CLR_OPERROR;
- retval = target_write_u32(target, UFCIC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- return retval;
-}
-
-/**
- * Dump page of userflash region.
- * If we want to change some settings, we have to dump it full, because userflash is flash(not EEPROM).
- * And correct write to flash can be performed only after erase.
- * So without dump, changing one registers will clear others.
- */
-static int niietcm4_dump_uflash_page(struct flash_bank *bank, uint32_t *dump, int page_num, int mem_type)
-{
- struct target *target = bank->target;
- int i, retval;
-
- uint32_t uflash_cmd;
- if (mem_type == INFO_MEM_TYPE)
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
- else
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ;
-
- int first = page_num*USERFLASH_PAGE_SIZE;
- int last = first + USERFLASH_PAGE_SIZE;
-
- for (i = first; i < last; i++) {
- retval = target_write_u32(target, UFMA, i);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, UFMD, &dump[i]);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-/**
- * Load modified page dump to userflash region page.
- */
-static int niietcm4_load_uflash_page(struct flash_bank *bank, uint32_t *dump, int page_num, int mem_type)
-{
- struct target *target = bank->target;
- int i, retval;
-
- uint32_t uflash_cmd;
- if (mem_type == INFO_MEM_TYPE)
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_WRITE_IFB;
- else
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_WRITE;
-
- int first = page_num*USERFLASH_PAGE_SIZE;
- int last = first + USERFLASH_PAGE_SIZE;
-
- for (i = first; i < last; i++) {
- retval = target_write_u32(target, UFMA, i);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMD, dump[i]);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-/**
- * Erase one page of userflash info or main region
- */
-static int niietcm4_uflash_page_erase(struct flash_bank *bank, int page_num, int mem_type)
-{
- struct target *target = bank->target;
- int retval;
-
- uint32_t uflash_cmd;
- if (mem_type == INFO_MEM_TYPE)
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_PAGEERASE_IFB;
- else
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_PAGE_ERASE;
-
- retval = target_write_u32(target, UFMA, page_num*USERFLASH_PAGE_SIZE);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMD, 0xFF);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
- /* status check */
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return retval;
-}
-
-/**
- * Enable or disable protection of userflash pages
- */
-static int niietcm4_uflash_protect(struct flash_bank *bank, int mem_type, int set, int first, int last)
-{
- int retval;
- if (mem_type == INFO_MEM_TYPE) {
- /* read dump */
- uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
- retval = niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- /* modify dump */
- if (set)
- uflash_dump[INFOWORD2_ADDR] &= ~INFOWORD3_LOCK_IFB_UF;
- else
- uflash_dump[INFOWORD2_ADDR] |= INFOWORD3_LOCK_IFB_UF;
- /* erase page 0 userflash */
- retval = niietcm4_uflash_page_erase(bank, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- /* write dump to userflash */
- retval = niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- } else {
- /* read dump */
- uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
- retval = niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- /* modify dump */
- for (int i = first; i <= last; i++) {
- uint32_t reg_num = i/8;
- uint32_t bit_num = i%8;
- if (set)
- uflash_dump[UF_LOCK_ADDR+reg_num] &= ~(1<<bit_num);
- else
- uflash_dump[UF_LOCK_ADDR+reg_num] |= (1<<bit_num);
- }
- /* erase page 0 info userflash */
- retval = niietcm4_uflash_page_erase(bank, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- /* write dump to userflash */
- retval = niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-/*==============================================================================
- * FLASH COMMANDS
- *==============================================================================
- */
-COMMAND_HANDLER(niietcm4_handle_uflash_read_byte_command)
-{
- if (CMD_ARGC < 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- uint32_t uflash_addr;
- uint32_t uflash_cmd;
- uint32_t uflash_data;
-
- if (strcmp("info", CMD_ARGV[0]) == 0)
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
- else if (strcmp("main", CMD_ARGV[0]) == 0)
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], uflash_addr);
-
- retval = target_write_u32(target, UFMA, uflash_addr);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
- /* status check */
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, UFMD, &uflash_data);
- if (retval != ERROR_OK)
- return retval;
- command_print(CMD_CTX, "Read userflash %s region:\n"
- "address = 0x%04x,\n"
- "value = 0x%02x.", CMD_ARGV[0], uflash_addr, uflash_data);
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_uflash_write_byte_command)
-{
- if (CMD_ARGC < 4)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- uint32_t uflash_addr;
- uint32_t uflash_data;
- int mem_type;
-
- if (strcmp("info", CMD_ARGV[0]) == 0)
- mem_type = 1;
- else if (strcmp("main", CMD_ARGV[0]) == 0)
- mem_type = 0;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], uflash_addr);
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], uflash_data);
-
- int page_num = uflash_addr/USERFLASH_PAGE_SIZE;
-
- command_print(CMD_CTX, "Write userflash %s region:\n"
- "address = 0x%04x,\n"
- "value = 0x%02x.\n"
- "Please wait ... ", CMD_ARGV[0], uflash_addr, uflash_data);
- /* dump */
- uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
- niietcm4_dump_uflash_page(bank, uflash_dump, page_num, mem_type);
-
- /* modify dump */
- uflash_dump[uflash_addr%USERFLASH_PAGE_SIZE] = uflash_data;
-
- /* erase page userflash */
- niietcm4_uflash_page_erase(bank, page_num, mem_type);
-
- /* write dump to userflash */
- niietcm4_load_uflash_page(bank, uflash_dump, page_num, mem_type);
- command_print(CMD_CTX, "done!");
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_uflash_full_erase_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint32_t uflash_addr = 0;
- uint32_t uflash_data = 0xFF;
- uint32_t uflash_cmd = UFMC_MAGIC_KEY | UFMC_FULL_ERASE;
-
- retval = target_write_u32(target, UFMA, uflash_addr);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMD, uflash_data);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
- /* status check */
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- command_print(CMD_CTX, "Userflash full erase done!");
-
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_uflash_erase_command)
-{
- if (CMD_ARGC < 4)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- unsigned int first, last;
- int mem_type;
-
- if (strcmp("info", CMD_ARGV[0]) == 0)
- mem_type = 1;
- else if (strcmp("main", CMD_ARGV[0]) == 0)
- mem_type = 0;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], first);
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], last);
- for (unsigned int i = first; i <= last; i++) {
- retval = niietcm4_uflash_page_erase(bank, i, mem_type);
- if (retval != ERROR_OK)
- return retval;
- }
-
- command_print(CMD_CTX, "Erase %s userflash pages %d through %d done!", CMD_ARGV[0], first, last);
-
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_uflash_protect_check_command)
-{
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
-
- struct target *target = bank->target;
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- int mem_type;
- if (strcmp("info", CMD_ARGV[0]) == 0)
- mem_type = 1;
- else if (strcmp("main", CMD_ARGV[0]) == 0)
- mem_type = 0;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- int i, j;
- uint32_t uflash_addr;
- uint32_t uflash_cmd;
- uint32_t uflash_data;
-
- /* chose between main userflash and info userflash */
- if (mem_type == INFO_MEM_TYPE) {
- uflash_addr = INFOWORD3_ADDR;
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
- retval = target_write_u32(target, UFMA, uflash_addr);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- /* status check */
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, UFMD, &uflash_data);
- if (retval != ERROR_OK)
- return retval;
-
- if (uflash_data & INFOWORD3_LOCK_IFB_UF)
- command_print(CMD_CTX, "All sectors of info userflash are not protected!");
- else
- command_print(CMD_CTX, "All sectors of info userflash are protected!");
- } else {
- uflash_addr = UF_LOCK_ADDR;
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
- for (i = 0; i < USERFLASH_PAGE_TOTALNUM/8; i++) {
- retval = target_write_u32(target, UFMA, uflash_addr);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- /* status check */
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, UFMD, &uflash_data);
- if (retval != ERROR_OK)
- return retval;
-
- for (j = 0; j < 8; j++) {
- if (uflash_data & 0x1)
- command_print(CMD_CTX, "Userflash sector #%03d: 0x%04x (0x100) is not protected!",
- i*8+j, (i*8+j)*USERFLASH_PAGE_SIZE);
- else
- command_print(CMD_CTX, "Userflash sector #%03d: 0x%04x (0x100) is protected!",
- i*8+j, (i*8+j)*USERFLASH_PAGE_SIZE);
- uflash_data = uflash_data >> 1;
- }
- uflash_addr++;
- }
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_uflash_protect_command)
-{
- if (CMD_ARGC < 5)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- int mem_type;
- if (strcmp("info", CMD_ARGV[0]) == 0)
- mem_type = 1;
- else if (strcmp("main", CMD_ARGV[0]) == 0)
- mem_type = 0;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- unsigned int first, last;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], first);
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], last);
-
- int set;
- if (strcmp("on", CMD_ARGV[3]) == 0) {
- command_print(CMD_CTX, "Try to enable %s userflash sectors %d through %d protection. Please wait ... ",
- CMD_ARGV[0], first, last);
- set = 1;
- } else if (strcmp("off", CMD_ARGV[3]) == 0) {
- command_print(CMD_CTX, "Try to disable %s userflash sectors %d through %d protection. Please wait ... ",
- CMD_ARGV[0], first, last);
- set = 0;
- } else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- retval = niietcm4_uflash_protect(bank, mem_type, set, first, last);
- if (retval != ERROR_OK)
- return retval;
-
- command_print(CMD_CTX, "done!");
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_bflash_info_remap_command)
-{
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- int set;
- if (strcmp("on", CMD_ARGV[0]) == 0) {
- command_print(CMD_CTX, "Try to enable bootflash info region remap. Please wait ...");
- set = 1;
- } else if (strcmp("off", CMD_ARGV[0]) == 0) {
- command_print(CMD_CTX, "Try to disable bootflash info region remap. Please wait ...");
- set = 0;
- } else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* dump */
- uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
- niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
-
- /* modify dump */
- if (set)
- uflash_dump[INFOWORD0_ADDR] &= ~INFOWORD0_BOOTFROM_IFB;
- else
- uflash_dump[INFOWORD0_ADDR] |= INFOWORD0_BOOTFROM_IFB;
-
- /* erase page userflash */
- niietcm4_uflash_page_erase(bank, 0, 1);
-
- /* write dump to userflash */
- niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
- command_print(CMD_CTX, "done!");
-
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_extmem_cfg_command)
-{
- if (CMD_ARGC < 4)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- uint32_t port;
- if (strcmp("gpioa", CMD_ARGV[0]) == 0)
- port = 8;
- else if (strcmp("gpiob", CMD_ARGV[0]) == 0)
- port = 9;
- else if (strcmp("gpioc", CMD_ARGV[0]) == 0)
- port = 10;
- else if (strcmp("gpiod", CMD_ARGV[0]) == 0)
- port = 11;
- else if (strcmp("gpioe", CMD_ARGV[0]) == 0)
- port = 12;
- else if (strcmp("gpiof", CMD_ARGV[0]) == 0)
- port = 13;
- else if (strcmp("gpiog", CMD_ARGV[0]) == 0)
- port = 14;
- else if (strcmp("gpioh", CMD_ARGV[0]) == 0)
- port = 15;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- uint32_t pin;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], pin);
- if (pin > 15)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- uint32_t func;
- if (strcmp("func1", CMD_ARGV[2]) == 0)
- func = 0;
- else if (strcmp("func3", CMD_ARGV[2]) == 0)
- func = 3;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- command_print(CMD_CTX, "Try to configure external memory boot interface:\n"
- "port = %s\n"
- "pin = %s\n"
- "func = %s\n"
- "Please wait ...", CMD_ARGV[0], CMD_ARGV[1], CMD_ARGV[2]);
- /* dump */
- uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
- niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
-
- /* modify dump */
- uflash_dump[INFOWORD0_ADDR] &= ~(3<<INFOWORD0_EXTMEM_SEL_POS);
- uflash_dump[INFOWORD0_ADDR] |= func<<INFOWORD0_EXTMEM_SEL_POS;
- uflash_dump[INFOWORD1_ADDR] = (port<<INFOWORD1_PORTNUM_POS) | (pin<<INFOWORD1_PINNUM_POS);
-
- /* erase page userflash */
- niietcm4_uflash_page_erase(bank, 0, 1);
-
- /* write dump to userflash */
- niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
- command_print(CMD_CTX, "done!");
-
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_extmem_boot_command)
-{
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- int set;
-
- if (strcmp("on", CMD_ARGV[0]) == 0) {
- command_print(CMD_CTX, "Try to enable boot from external memory. Please wait ...");
- set = 1;
- } else if (strcmp("off", CMD_ARGV[0]) == 0) {
- command_print(CMD_CTX, "Try to disable boot from external memory. Please wait ...");
- set = 0;
- } else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* dump */
- uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
- niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
-
- /* modify dump */
- if (set)
- uflash_dump[INFOWORD0_ADDR] &= ~INFOWORD0_EN_GPIO;
- else
- uflash_dump[INFOWORD0_ADDR] |= INFOWORD0_EN_GPIO;
-
- /* erase page userflash */
- niietcm4_uflash_page_erase(bank, 0, 1);
-
- /* write dump to userflash */
- niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
- command_print(CMD_CTX, "done!");
-
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_service_mode_erase_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
- struct target *target = bank->target;
-
- command_print(CMD_CTX, "Try to perform service mode erase. Please wait ...");
-
- retval = target_write_u32(target, SERVICE_MODE_ERASE_ADDR, 1);
- if (retval != ERROR_OK)
- return retval;
-
- int timeout = 500;
- uint32_t status;
-
- retval = target_read_u32(target, SERVICE_MODE_ERASE_ADDR, &status);
- if (retval != ERROR_OK)
- return retval;
-
- while (status != 0x03) {
- retval = target_read_u32(target, SERVICE_MODE_ERASE_ADDR, &status);
- if (retval != ERROR_OK)
- return retval;
- if (timeout-- <= 0) {
- LOG_ERROR("Service mode erase timeout");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- busy_sleep(1); /* can use busy sleep for short times. */
- }
- command_print(CMD_CTX, "done! All data erased.");
-
- return retval;
-}
-
-COMMAND_HANDLER(niietcm4_handle_driver_info_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
-
- command_print(CMD_CTX, "niietcm4 flash driver\n"
- "version: %d.%d\n"
- "author: Bogdan Kolbov\n"
- "mail: kolbov@niiet.ru",
- FLASH_DRIVER_VER>>16,
- FLASH_DRIVER_VER&0xFFFF);
-
- return retval;
-}
-
-static const struct command_registration niietcm4_exec_command_handlers[] = {
- {
- .name = "uflash_read_byte",
- .handler = niietcm4_handle_uflash_read_byte_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('main'|'info') address",
- .help = "Read byte from main or info userflash region",
- },
- {
- .name = "uflash_write_byte",
- .handler = niietcm4_handle_uflash_write_byte_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('main'|'info') address value",
- .help = "Write byte to main or info userflash region",
- },
- {
- .name = "uflash_full_erase",
- .handler = niietcm4_handle_uflash_full_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Erase all userflash including info region",
- },
- {
- .name = "uflash_erase",
- .handler = niietcm4_handle_uflash_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('main'|'info') first_sector_num last_sector_num",
- .help = "Erase sectors of main or info userflash region, starting at sector first up to and including last.",
- },
- {
- .name = "uflash_protect_check",
- .handler = niietcm4_handle_uflash_protect_check_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('main'|'info')",
- .help = "Check sectors protect.",
- },
- {
- .name = "uflash_protect",
- .handler = niietcm4_handle_uflash_protect_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('main'|'info') first_sector_num last_sector_num ('on'|'off')",
- .help = "Protect sectors of main or info userflash region, starting at sector first up to and including last.",
- },
- {
- .name = "bflash_info_remap",
- .handler = niietcm4_handle_bflash_info_remap_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('on'|'off')",
- .help = "Enable remapping bootflash info region to 0x00000000 (or 0x40000000 if external memory boot used).",
- },
- {
- .name = "extmem_cfg",
- .handler = niietcm4_handle_extmem_cfg_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('gpioa'|'gpiob'|'gpioc'|'gpiod'|'gpioe'|'gpiof'|'gpiog'|'gpioh') pin_num ('func1'|'func3')",
- .help = "Configure external memory interface for boot.",
- },
- {
- .name = "extmem_boot",
- .handler = niietcm4_handle_extmem_boot_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('on'|'off')",
- .help = "Enable boot from external memory.",
- },
- {
- .name = "service_mode_erase",
- .handler = niietcm4_handle_service_mode_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Perform emergency erase of all flash (bootflash and userflash).",
- },
- {
- .name = "driver_info",
- .handler = niietcm4_handle_driver_info_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Show information about flash driver.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration niietcm4_command_handlers[] = {
- {
- .name = "niietcm4",
- .mode = COMMAND_ANY,
- .help = "niietcm4 flash command group",
- .usage = "",
- .chain = niietcm4_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-/*==============================================================================
- * FLASH INTERFACE
- *==============================================================================
- */
-
-FLASH_BANK_COMMAND_HANDLER(niietcm4_flash_bank_command)
-{
- struct niietcm4_flash_bank *niietcm4_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- niietcm4_info = malloc(sizeof(struct niietcm4_flash_bank));
-
- bank->driver_priv = niietcm4_info;
-
- /* information will be updated by probing */
- niietcm4_info->probed = false;
- niietcm4_info->chipid = 0;
- niietcm4_info->chip_name = NULL;
- niietcm4_info->uflash_width = 0;
- niietcm4_info->uflash_size = 0;
- niietcm4_info->uflash_pagetotal = 0;
- niietcm4_info->uflash_info_size = 0;
- niietcm4_info->uflash_info_pagetotal = 0;
- niietcm4_info->bflash_info_remap = false;
- niietcm4_info->extmem_boot_port = NULL;
- niietcm4_info->extmem_boot_pin = 0;
- niietcm4_info->extmem_boot_altfunc = 0;
- niietcm4_info->extmem_boot = false;
-
- return ERROR_OK;
-}
-
-static int niietcm4_protect_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
-
- int retval = ERROR_FLASH_OPERATION_FAILED;
- int set;
- uint32_t uflash_addr;
- uint32_t uflash_cmd;
- uint32_t uflash_data;
- /* chose between main bootflash and info bootflash */
- if (niietcm4_info->bflash_info_remap) {
- uflash_addr = INFOWORD2_ADDR;
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
- retval = target_write_u32(target, UFMA, uflash_addr);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- /* status check */
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, UFMD, &uflash_data);
- if (retval != ERROR_OK)
- return retval;
-
- if (uflash_data & INFOWORD2_LOCK_IFB_BF)
- set = 0;
- else
- set = 1;
- bank->sectors[0].is_protected = set;
- } else {
- uflash_addr = BF_LOCK_ADDR;
- uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
- for (int i = 0; i < bank->num_sectors/8; i++) {
- retval = target_write_u32(target, UFMA, uflash_addr);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- /* status check */
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, UFMD, &uflash_data);
- if (retval != ERROR_OK)
- return retval;
-
- for (int j = 0; j < 8; j++) {
- if (uflash_data & 0x1)
- set = 0;
- else
- set = 1;
- bank->sectors[i*8+j].is_protected = set;
- uflash_data = uflash_data >> 1;
- }
- uflash_addr++;
- }
- }
-
- return retval;
-}
-
-static int niietcm4_mass_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
-
- int retval;
- uint32_t flash_cmd;
-
- /* start mass erase */
- flash_cmd = FMC_MAGIC_KEY | FMC_FULL_ERASE;
- retval = target_write_u32(target, FMC, flash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- /* status check */
- retval = niietcm4_opstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return retval;
-}
-
-static int niietcm4_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
- int retval = ERROR_FLASH_OPERATION_FAILED;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first == 0) && (last == (bank->num_sectors - 1))) {
- retval = niietcm4_mass_erase(bank);
- return retval;
- }
-
- /* chose between main bootflash and info bootflash */
- uint32_t flash_cmd, flash_addr;
- if (niietcm4_info->bflash_info_remap)
- flash_cmd = FMC_MAGIC_KEY | FMC_PAGEERASE_IFB;
- else
- flash_cmd = FMC_MAGIC_KEY | FMC_PAGE_ERASE;
-
- /* erasing pages */
- unsigned int page_size = bank->size / bank->num_sectors;
- for (int i = first; i <= last; i++) {
- /* current page addr */
- flash_addr = i*page_size;
- retval = target_write_u32(target, FMA, flash_addr);
- if (retval != ERROR_OK)
- return retval;
-
- /* start erase */
- retval = target_write_u32(target, FMC, flash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- /* status check */
- retval = niietcm4_opstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
-
- bank->sectors[i].is_erased = 1;
- }
-
- return retval;
-}
-
-static int niietcm4_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct target *target = bank->target;
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
-
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_INFO("Plese wait ..."); /* it`s quite a long process */
- /* chose between main bootflash and info bootflash */
- if (niietcm4_info->bflash_info_remap) {
- /* dump */
- uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
- retval = niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- /* modify dump */
- if (set)
- uflash_dump[INFOWORD2_ADDR] &= ~INFOWORD2_LOCK_IFB_BF;
- else
- uflash_dump[INFOWORD2_ADDR] |= INFOWORD2_LOCK_IFB_BF;
- /* erase page 0 userflash */
- retval = niietcm4_uflash_page_erase(bank, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- /* write dump to userflash */
- retval = niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- } else {
- /* read dump*/
- uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
- retval = niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- /* modify dump */
- for (int i = first; i <= last; i++) {
- uint32_t reg_num = i/8;
- uint32_t bit_num = i%8;
- if (set)
- uflash_dump[BF_LOCK_ADDR+reg_num] &= ~(1<<bit_num);
- else
- uflash_dump[BF_LOCK_ADDR+reg_num] |= (1<<bit_num);
- }
- /* erase page 0 info userflash */
- retval = niietcm4_uflash_page_erase(bank, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- /* write dump to userflash */
- retval = niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-static int niietcm4_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
- uint32_t buffer_size = 32768 + 8; /* 8 bytes for rp and wp */
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[5];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* see contrib/loaders/flash/k1921vk01t.S for src */
- static const uint8_t niietcm4_flash_write_code[] = {
- 0x14, 0x4f, 0x16, 0x68, 0x00, 0x2e, 0x23, 0xd0, 0x55, 0x68, 0xb5, 0x42, 0xf9, 0xd0, 0x2e, 0x68,
- 0x7e, 0x60, 0x04, 0x35, 0x2e, 0x68, 0x3e, 0x65, 0x04, 0x35, 0x2e, 0x68, 0x7e, 0x65, 0x04, 0x35,
- 0x2e, 0x68, 0xbe, 0x65, 0x04, 0x35, 0x3c, 0x60, 0x10, 0x34, 0xb8, 0x60, 0xfe, 0x68, 0x00, 0x2e,
- 0xfc, 0xd0, 0x02, 0x2e, 0x0a, 0xd0, 0x01, 0x26, 0x7e, 0x61, 0x9d, 0x42, 0x01, 0xd3, 0x15, 0x46,
- 0x08, 0x35, 0x55, 0x60, 0x01, 0x39, 0x00, 0x29, 0x02, 0xd0, 0xda, 0xe7, 0x00, 0x20, 0x50, 0x60,
- 0x30, 0x46, 0x00, 0xbe, 0x00, 0xc0, 0x01, 0xa0
- };
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(niietcm4_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(niietcm4_flash_write_code), niietcm4_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- buffer_size &= ~15UL; /* Make sure it's 16 byte aligned */
- buffer_size += 8; /* And 8 bytes for WP and RP */
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* write_cmd base (in), status (out) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (128bit) */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer start */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[4], "r4", 32, PARAM_IN_OUT); /* target address */
-
- uint32_t flash_cmd;
- if (niietcm4_info->bflash_info_remap)
- flash_cmd = FMC_MAGIC_KEY | FMC_WRITE_IFB;
- else
- flash_cmd = FMC_MAGIC_KEY | FMC_WRITE;
-
- buf_set_u32(reg_params[0].value, 0, 32, flash_cmd);
- buf_set_u32(reg_params[1].value, 0, 32, count);
- buf_set_u32(reg_params[2].value, 0, 32, source->address);
- buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[4].value, 0, 32, address);
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- retval = target_run_flash_async_algorithm(target, buffer, count, 16,
- 0, NULL,
- 5, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- if (retval == ERROR_FLASH_OPERATION_FAILED)
- LOG_ERROR("flash write failed at address 0x%"PRIx32,
- buf_get_u32(reg_params[4].value, 0, 32));
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return retval;
-}
-
-static int niietcm4_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
- uint8_t *new_buffer = NULL;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0xF) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-word alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* If there's an odd number of words, the data has to be padded. Duplicate
- * the buffer and use the normal code path with a single block write since
- * it's probably cheaper than to special case the last odd write using
- * discrete accesses. */
-
- int rem = count % 16;
- if (rem) {
- new_buffer = malloc(count + 16 - rem);
- if (new_buffer == NULL) {
- LOG_ERROR("Odd number of words to write and no memory for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("Odd number of words to write, padding with 0xFFFFFFFF");
- buffer = memcpy(new_buffer, buffer, count);
- while (rem < 16) {
- new_buffer[count++] = 0xff;
- rem++;
- }
- }
-
- int retval;
-
- /* try using block write */
- retval = niietcm4_write_block(bank, buffer, offset, count/16);
- uint32_t flash_addr, flash_cmd, flash_data;
-
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single halfword accesses */
- LOG_WARNING("Can't use block writes, falling back to single memory accesses");
- LOG_INFO("Plese wait ..."); /* it`s quite a long process */
-
- /* chose between main bootflash and info bootflash */
- if (niietcm4_info->bflash_info_remap)
- flash_cmd = FMC_MAGIC_KEY | FMC_WRITE_IFB;
- else
- flash_cmd = FMC_MAGIC_KEY | FMC_WRITE;
-
- /* write 16 bytes per try */
- for (unsigned int i = 0; i < count; i += 16) {
- /* current addr */
- LOG_INFO("%d byte of %d", i, count);
- flash_addr = offset + i;
- retval = target_write_u32(target, FMA, flash_addr);
- if (retval != ERROR_OK)
- goto free_buffer;
-
- /* Prepare data (4 words) */
- uint32_t value[4];
- memcpy(&value, buffer + i*16, 4*sizeof(uint32_t));
-
- /* place in reg 16 bytes of data */
- flash_data = value[0];
- retval = target_write_u32(target, FMD1, flash_data);
- if (retval != ERROR_OK)
- goto free_buffer;
- flash_data = value[1];
- retval = target_write_u32(target, FMD2, flash_data);
- if (retval != ERROR_OK)
- goto free_buffer;
- flash_data = value[2];
- retval = target_write_u32(target, FMD3, flash_data);
- if (retval != ERROR_OK)
- goto free_buffer;
- flash_data = value[3];
- retval = target_write_u32(target, FMD4, flash_data);
- if (retval != ERROR_OK)
- goto free_buffer;
-
- /* write start */
- retval = target_write_u32(target, FMC, flash_cmd);
- if (retval != ERROR_OK)
- goto free_buffer;
-
- /* status check */
- retval = niietcm4_opstatus_check(bank);
- if (retval != ERROR_OK)
- goto free_buffer;
- }
-
- }
-
-free_buffer:
- if (new_buffer)
- free(new_buffer);
-
- return retval;
-}
-
-static int niietcm4_probe_k1921vk01t(struct flash_bank *bank)
-{
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
- struct target *target = bank->target;
- int retval;
-
- niietcm4_info->chip_name = "K1921VK01T";
-
- /* check if we in service mode */
- uint32_t service_mode;
- retval = target_read_u32(target, 0x80017000, &service_mode);
- if (retval != ERROR_OK)
- return retval;
- service_mode = (service_mode>>2) & 0x1;
-
- if (!service_mode) {
- niietcm4_info->uflash_width = 8;
- niietcm4_info->uflash_size = 0x10000;
- niietcm4_info->uflash_pagetotal = 256;
- niietcm4_info->uflash_info_size = 0x200;
- niietcm4_info->uflash_info_pagetotal = 2;
-
- uint32_t uflash_data[2];
- uint32_t uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
- for (int i = 0; i < 2; i++) {
- retval = target_write_u32(target, UFMA, i);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, UFMC, uflash_cmd);
- if (retval != ERROR_OK)
- return retval;
- /* status check */
- retval = niietcm4_uopstatus_check(bank);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, UFMD, &uflash_data[i]);
- if (retval != ERROR_OK)
- return retval;
- }
-
- int boot_from_ifb = (uflash_data[0]>>INFOWORD0_BOOTFROM_IFB_POS) & 0x1;
- int en_gpio = (uflash_data[0]>>INFOWORD0_EN_GPIO_POS) & 0x1;
- int extmem_sel = (uflash_data[0]>>INFOWORD0_EXTMEM_SEL_POS) & 0x3;
- int pinnum = (uflash_data[1]>>INFOWORD1_PINNUM_POS) & 0xF;
- int portnum = (uflash_data[1]>>INFOWORD1_PORTNUM_POS) & 0x7;
-
- if (boot_from_ifb)
- niietcm4_info->bflash_info_remap = false;
- else
- niietcm4_info->bflash_info_remap = true;
- if (extmem_sel == 0x2)
- niietcm4_info->extmem_boot_altfunc = 3;
- else
- niietcm4_info->extmem_boot_altfunc = 1;
- if (portnum == 0x0)
- niietcm4_info->extmem_boot_port = "GPIOA";
- else if (portnum == 0x1)
- niietcm4_info->extmem_boot_port = "GPIOB";
- else if (portnum == 0x2)
- niietcm4_info->extmem_boot_port = "GPIOC";
- else if (portnum == 0x3)
- niietcm4_info->extmem_boot_port = "GPIOD";
- else if (portnum == 0x4)
- niietcm4_info->extmem_boot_port = "GPIOE";
- else if (portnum == 0x5)
- niietcm4_info->extmem_boot_port = "GPIOF";
- else if (portnum == 0x6)
- niietcm4_info->extmem_boot_port = "GPIOG";
- else if (portnum == 0x7)
- niietcm4_info->extmem_boot_port = "GPIOH";
- else
- niietcm4_info->extmem_boot_port = "not defined";
- if (en_gpio)
- niietcm4_info->extmem_boot = false;
- else
- niietcm4_info->extmem_boot = true;
- niietcm4_info->extmem_boot_pin = pinnum;
-
- /* check state of extmem boot en pin, if "high", extmem remapped to 0x00000000 */
- uint32_t extmem_boot_port_data;
- retval = target_read_u32(target, 0x80010000 + 0x1000*portnum, &extmem_boot_port_data);
- if (retval != ERROR_OK)
- return retval;
- int extmem_boot_pin_data = (extmem_boot_port_data>>pinnum) & 0x1;
-
- uint32_t extmem_base;
- uint32_t bflash_base;
- if (extmem_boot_pin_data && niietcm4_info->extmem_boot) {
- extmem_base = 0x00000000;
- bflash_base = 0x40000000;
- } else {
- extmem_base = 0x40000000;
- bflash_base = 0x00000000;
- }
-
- uint32_t bflash_size = 0x100000;
- uint32_t bflash_pages = 128;
- uint32_t bflash_info_size = 0x2000;
- uint32_t bflash_info_pages = 1;
- if (niietcm4_info->bflash_info_remap) {
- bflash_base += 0x2000;
- bflash_size -= 0x2000;
- bflash_pages--;
- bank->size = bflash_info_size;
- bank->num_sectors = bflash_info_pages;
- } else {
- bank->size = bflash_size;
- bank->num_sectors = bflash_pages;
- }
-
- char info_bootflash_addr_str[64];
- if (niietcm4_info->bflash_info_remap)
- snprintf(info_bootflash_addr_str, sizeof(info_bootflash_addr_str), "0x%08x base adress", bank->base);
- else
- snprintf(info_bootflash_addr_str, sizeof(info_bootflash_addr_str), "not maped to global adress space");
-
- snprintf(niietcm4_info->chip_brief,
- sizeof(niietcm4_info->chip_brief),
- "\n"
- "MEMORY CONFIGURATION\n"
- "Bootflash :\n"
- " %d kB total\n"
- " %d pages %d kB each\n"
- " 0x%08x base adress\n"
- "%s"
- "Info bootflash :\n"
- " %d kB total\n"
- " %d pages %d kB each\n"
- " %s\n"
- "%s"
- "Userflash :\n"
- " %d kB total\n"
- " %d pages %d B each\n"
- " %d bit cells\n"
- " not maped to global adress space\n"
- "Info userflash :\n"
- " %d B total\n"
- " %d pages of %d B each\n"
- " %d bit cells\n"
- " not maped to global adress space\n"
- "RAM :\n"
- " 192 kB total\n"
- " 0x20000000 base adress\n"
- "External memory :\n"
- " 8/16 bit address space\n"
- " 0x%08x base adress\n"
- "\n"
- "INFOWORD STATUS\n"
- "Bootflash info region remap :\n"
- " %s\n"
- "External memory boot port :\n"
- " %s\n"
- "External memory boot pin :\n"
- " %d\n"
- "External memory interface alternative function :\n"
- " %d\n"
- "Option boot from external memory :\n"
- " %s\n",
- bflash_size/1024,
- bflash_pages,
- (bflash_size/bflash_pages)/1024,
- bflash_base,
- niietcm4_info->bflash_info_remap ? "" : " this flash will be used for debugging, writing and etc\n",
- bflash_info_size/1024,
- bflash_info_pages,
- (bflash_info_size/bflash_info_pages)/1024,
- info_bootflash_addr_str,
- niietcm4_info->bflash_info_remap ? " this flash will be used for debugging, writing and etc\n" : "",
- niietcm4_info->uflash_size/1024,
- niietcm4_info->uflash_pagetotal,
- niietcm4_info->uflash_size/niietcm4_info->uflash_pagetotal,
- niietcm4_info->uflash_width,
- niietcm4_info->uflash_info_size,
- niietcm4_info->uflash_info_pagetotal,
- niietcm4_info->uflash_info_size/niietcm4_info->uflash_info_pagetotal,
- niietcm4_info->uflash_width,
- extmem_base,
- niietcm4_info->bflash_info_remap ? "enable" : "disable",
- niietcm4_info->extmem_boot_port,
- niietcm4_info->extmem_boot_pin,
- niietcm4_info->extmem_boot_altfunc,
- niietcm4_info->extmem_boot ? "enable" : "disable");
- } else{
- bank->size = 0x100000;
- bank->num_sectors = 128;
-
- sprintf(niietcm4_info->chip_brief,
- "\n"
- "H[2] was HIGH while startup. Device entered service mode.\n"
- "All flashes were locked.\n"
- "If you want to perform emergency erase (erase all flashes),\n"
- "please use \"service_mode_erase\" command and reset device.\n"
- "Do not forget to pull H[2] down while reset for returning to normal operation mode.\n"
- );
- }
-
- return retval;
-}
-
-static int niietcm4_probe(struct flash_bank *bank)
-{
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
- struct target *target = bank->target;
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
- uint32_t retval;
- uint32_t chipid;
-
- retval = target_read_u32(target, CHIPID_ADDR, &chipid);
- if (retval != ERROR_OK) {
- chipid = K1921VK01T_ID;
- LOG_INFO("unknown chipid, assuming K1921VK01T");
- }
-
- if (chipid == K1921VK01T_ID)
- niietcm4_probe_k1921vk01t(bank);
-
- int page_total = bank->num_sectors;
- int page_size = bank->size / page_total;
-
- bank->sectors = malloc(sizeof(struct flash_sector) * page_total);
-
- for (int i = 0; i < page_total; i++) {
- bank->sectors[i].offset = i * page_size;
- bank->sectors[i].size = page_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- niietcm4_info->probed = true;
-
- return ERROR_OK;
-}
-
-static int niietcm4_auto_probe(struct flash_bank *bank)
-{
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
- if (niietcm4_info->probed)
- return ERROR_OK;
- return niietcm4_probe(bank);
-}
-
-static int get_niietcm4_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct niietcm4_flash_bank *niietcm4_info = bank->driver_priv;
- LOG_INFO("\nNIIET Cortex M4F %s\n%s", niietcm4_info->chip_name, niietcm4_info->chip_brief);
- snprintf(buf, buf_size, " ");
-
- return ERROR_OK;
-}
-
-
-struct flash_driver niietcm4_flash = {
- .name = "niietcm4",
- .usage = "flash bank <name> niietcm4 <base> <size> 0 0 <target#>",
- .commands = niietcm4_command_handlers,
- .flash_bank_command = niietcm4_flash_bank_command,
- .erase = niietcm4_erase,
- .protect = niietcm4_protect,
- .write = niietcm4_write,
- .read = default_flash_read,
- .probe = niietcm4_probe,
- .auto_probe = niietcm4_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = niietcm4_protect_check,
- .info = get_niietcm4_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/non_cfi.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/non_cfi.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/non_cfi.c
deleted file mode 100755
index 7636a36..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/non_cfi.c
+++ /dev/null
@@ -1,562 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2009 Michael Schwingen *
- * michael@schwingen.org *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "cfi.h"
-#include "non_cfi.h"
-
-#define KB 1024
-#define MB (1024*1024)
-#define ERASE_REGION(num, size) (((size/256) << 16) | (num-1))
-
-/* non-CFI compatible flashes */
-static const struct non_cfi non_cfi_flashes[] = {
- {
- .mfr = CFI_MFR_SST,
- .id = 0xd4,
- .pri_id = 0x02,
- .dev_size = 64*KB,
- .interface_desc = 0x0, /* x8 only device */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(16, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0xd5,
- .pri_id = 0x02,
- .dev_size = 128*KB,
- .interface_desc = 0x0, /* x8 only device */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(32, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0xd6,
- .pri_id = 0x02,
- .dev_size = 256*KB,
- .interface_desc = 0x0, /* x8 only device */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(64, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0xd7,
- .pri_id = 0x02,
- .dev_size = 512*KB,
- .interface_desc = 0x0, /* x8 only device */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(128, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_AMD, /* Spansion AM29LV040B */
- .id = 0x4f,
- .pri_id = 0x02,
- .dev_size = 512*KB,
- .interface_desc = 0x0, /* x8 only device */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(8, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0x2780,
- .pri_id = 0x02,
- .dev_size = 512*KB,
- .interface_desc = 0x2, /* x8 or x16 device */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(128, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_ST,
- .id = 0xd6, /* ST29F400BB */
- .pri_id = 0x02,
- .dev_size = 512*KB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(7, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_ST,
- .id = 0xd5, /* ST29F400BT */
- .pri_id = 0x02,
- .dev_size = 512*KB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(7, 64*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 16*KB)
- }
- },
-
- /* SST 39VF* do not support DQ5 status polling - this currently is
- only supported by the host algorithm, not by the target code using
- the work area.
- Only true for 8-bit and 32-bit wide memories. 16-bit wide memories
- without DQ5 status polling are supported by the target code.
- */
- {
- .mfr = CFI_MFR_SST,
- .id = 0x2782, /* SST39xF160 */
- .pri_id = 0x02,
- .dev_size = 2*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(512, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0x2783, /* SST39VF320 */
- .pri_id = 0x02,
- .dev_size = 4*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(1024, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0x234b, /* SST39VF1601 */
- .pri_id = 0x02,
- .dev_size = 2*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(512, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0x274b, /* SST39WF1601 */
- .pri_id = 0x02,
- .dev_size = 2*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(512, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0x234a, /* SST39VF1602 */
- .pri_id = 0x02,
- .dev_size = 2*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(512, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0x235b, /* SST39VF3201 */
- .pri_id = 0x02,
- .dev_size = 4*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(1024, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0x235a, /* SST39VF3202 */
- .pri_id = 0x02,
- .dev_size = 4*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(1024, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_SST,
- .id = 0x236d, /* SST39VF6401B */
- .pri_id = 0x02,
- .dev_size = 8*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ6_DQ7,
- .num_erase_regions = 1,
- .erase_region_info = {
- ERASE_REGION(2048, 4*KB)
- }
- },
- {
- .mfr = CFI_MFR_AMD,
- .id = 0x22ab, /* AM29F400BB */
- .pri_id = 0x02,
- .dev_size = 512*KB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(7, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_AMD,
- .id = 0x2223, /* AM29F400BT */
- .pri_id = 0x02,
- .dev_size = 512*KB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(7, 64*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 16*KB)
- }
- },
- {
- .mfr = CFI_MFR_FUJITSU,
- .id = 0x226b, /* AM29SL800DB */
- .pri_id = 0x02,
- .dev_size = 1*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(15, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_FUJITSU,
- .id = 0x22ea, /* MBM29SL800TE */
- .pri_id = 0x02,
- .dev_size = 1*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(15, 64*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 16*KB)
- }
- },
- {
- .mfr = CFI_MFR_FUJITSU,
- .id = 0xba, /* 29LV400BC */
- .pri_id = 0x02,
- .dev_size = 512*KB,
- .interface_desc = 0x1, /* x8 or x16 device w/ nBYTE */
- .max_buf_write_size = 0x00,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(7, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_AMIC,
- .id = 0xb31a, /* A29L800A */
- .pri_id = 0x02,
- .dev_size = 1*MB,
- .interface_desc = 0x2,
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(15, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_MX,
- .id = 0x225b, /* MX29LV800B */
- .pri_id = 0x02,
- .dev_size = 1*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(15, 64*KB)
- }
- },
-
- {
- .mfr = CFI_MFR_MX,
- .id = 0x2249, /* MX29LV160AB: 2MB */
- .pri_id = 0x02,
- .dev_size = 2*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(31, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_MX,
- .id = 0x22C4, /* MX29LV160AT: 2MB */
- .pri_id = 0x02,
- .dev_size = 2*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(31, 64*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 16*KB)
- }
- },
- {
- .mfr = CFI_MFR_EON,
- .id = 0x225b, /* EN29LV800BB */
- .pri_id = 0x02,
- .dev_size = 1*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(15, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_ATMEL,
- .id = 0x00c0, /* Atmel 49BV1614 */
- .pri_id = 0x02,
- .dev_size = 2*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 3,
- .erase_region_info = {
- ERASE_REGION(8, 8*KB),
- ERASE_REGION(2, 32*KB),
- ERASE_REGION(30, 64*KB)
- }
- },
- {
- .mfr = CFI_MFR_ATMEL,
- .id = 0xC2, /* Atmel 49BV1614T */
- .pri_id = 0x02,
- .dev_size = 2*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 3,
- .erase_region_info = {
- ERASE_REGION(30, 64*KB),
- ERASE_REGION(2, 32*KB),
- ERASE_REGION(8, 8*KB)
- }
- },
- {
- .mfr = CFI_MFR_AMD,
- .id = 0x225b, /* S29AL008D */
- .pri_id = 0x02,
- .dev_size = 1*MB,
- .interface_desc = 0x2, /* x8 or x16 device with nBYTE */
- .max_buf_write_size = 0x0,
- .status_poll_mask = CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7,
- .num_erase_regions = 4,
- .erase_region_info = {
- ERASE_REGION(1, 16*KB),
- ERASE_REGION(2, 8*KB),
- ERASE_REGION(1, 32*KB),
- ERASE_REGION(15, 64*KB)
- }
- },
- {
- .mfr = 0,
- .id = 0,
- }
-};
-
-void cfi_fixup_non_cfi(struct flash_bank *bank)
-{
- unsigned int mask;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- const struct non_cfi *non_cfi = non_cfi_flashes;
-
- if (cfi_info->x16_as_x8)
- mask = 0xFF;
- else
- mask = 0xFFFF;
-
- for (non_cfi = non_cfi_flashes; non_cfi->mfr; non_cfi++) {
- if ((cfi_info->manufacturer == non_cfi->mfr)
- && (cfi_info->device_id == (non_cfi->id & mask)))
- break;
- }
-
- /* only fixup jedec flashs found in table */
- if (!non_cfi->mfr)
- return;
-
- cfi_info->not_cfi = 1;
-
- /* fill in defaults for non-critical data */
- cfi_info->vcc_min = 0x0;
- cfi_info->vcc_max = 0x0;
- cfi_info->vpp_min = 0x0;
- cfi_info->vpp_max = 0x0;
- /* these are used for timeouts - use vales that should be long enough
- for normal operation. */
- cfi_info->word_write_timeout_typ = 0x0a;
- cfi_info->buf_write_timeout_typ = 0x0d;
- cfi_info->block_erase_timeout_typ = 0x0d;
- cfi_info->chip_erase_timeout_typ = 0x10;
- cfi_info->word_write_timeout_max = 0x0;
- cfi_info->buf_write_timeout_max = 0x0;
- cfi_info->block_erase_timeout_max = 0x0;
- cfi_info->chip_erase_timeout_max = 0x0;
-
- cfi_info->qry[0] = 'Q';
- cfi_info->qry[1] = 'R';
- cfi_info->qry[2] = 'Y';
-
- cfi_info->pri_id = non_cfi->pri_id;
- cfi_info->pri_addr = 0x0;
- cfi_info->alt_id = 0x0;
- cfi_info->alt_addr = 0x0;
- cfi_info->alt_ext = NULL;
-
- cfi_info->interface_desc = non_cfi->interface_desc;
- cfi_info->max_buf_write_size = non_cfi->max_buf_write_size;
- cfi_info->status_poll_mask = non_cfi->status_poll_mask;
- cfi_info->num_erase_regions = non_cfi->num_erase_regions;
- size_t erase_region_info_size = sizeof(*cfi_info->erase_region_info) *
- cfi_info->num_erase_regions;
- cfi_info->erase_region_info = malloc(erase_region_info_size);
- memcpy(cfi_info->erase_region_info,
- non_cfi->erase_region_info, erase_region_info_size);
- cfi_info->dev_size = non_cfi->dev_size;
-
- if (cfi_info->pri_id == 0x2) {
- struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
-
- pri_ext->pri[0] = 'P';
- pri_ext->pri[1] = 'R';
- pri_ext->pri[2] = 'I';
-
- pri_ext->major_version = '1';
- pri_ext->minor_version = '0';
-
- pri_ext->SiliconRevision = 0x0;
- pri_ext->EraseSuspend = 0x0;
- pri_ext->BlkProt = 0x0;
- pri_ext->TmpBlkUnprotect = 0x0;
- pri_ext->BlkProtUnprot = 0x0;
- pri_ext->SimultaneousOps = 0x0;
- pri_ext->BurstMode = 0x0;
- pri_ext->PageMode = 0x0;
- pri_ext->VppMin = 0x0;
- pri_ext->VppMax = 0x0;
- pri_ext->TopBottom = 0x0;
-
- pri_ext->_unlock1 = 0x5555;
- pri_ext->_unlock2 = 0x2AAA;
- pri_ext->_reversed_geometry = 0;
-
- cfi_info->pri_ext = pri_ext;
- } else if ((cfi_info->pri_id == 0x1) || (cfi_info->pri_id == 0x3)) {
- LOG_ERROR("BUG: non-CFI flashes using the Intel commandset are not yet supported");
- exit(-1);
- }
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/non_cfi.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/non_cfi.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/non_cfi.h
deleted file mode 100755
index e23ab7e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/non_cfi.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef NON_CFI_H
-#define NON_CFI_H
-
-struct non_cfi {
- uint16_t mfr;
- uint16_t id;
- uint16_t pri_id;
- uint32_t dev_size;
- uint16_t interface_desc;
- uint16_t max_buf_write_size;
- uint8_t num_erase_regions;
- uint32_t erase_region_info[6];
- uint8_t status_poll_mask;
-};
-
-void cfi_fixup_non_cfi(struct flash_bank *bank);
-
-#endif /* NON_CFI_H */
[14/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str7x.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str7x.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str7x.c
deleted file mode 100755
index d8a4cd4..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str7x.c
+++ /dev/null
@@ -1,817 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2010 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <target/arm.h>
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-
-/* Flash registers */
-
-#define FLASH_CR0 0x00000000
-#define FLASH_CR1 0x00000004
-#define FLASH_DR0 0x00000008
-#define FLASH_DR1 0x0000000C
-#define FLASH_AR 0x00000010
-#define FLASH_ER 0x00000014
-#define FLASH_NVWPAR 0x0000DFB0
-#define FLASH_NVAPR0 0x0000DFB8
-#define FLASH_NVAPR1 0x0000DFBC
-
-/* FLASH_CR0 register bits */
-
-#define FLASH_WMS 0x80000000
-#define FLASH_SUSP 0x40000000
-#define FLASH_WPG 0x20000000
-#define FLASH_DWPG 0x10000000
-#define FLASH_SER 0x08000000
-#define FLASH_SPR 0x01000000
-#define FLASH_BER 0x04000000
-#define FLASH_MER 0x02000000
-#define FLASH_LOCK 0x00000010
-#define FLASH_BSYA1 0x00000004
-#define FLASH_BSYA0 0x00000002
-
-/* FLASH_CR1 register bits */
-
-#define FLASH_B1S 0x02000000
-#define FLASH_B0S 0x01000000
-#define FLASH_B1F1 0x00020000
-#define FLASH_B1F0 0x00010000
-#define FLASH_B0F7 0x00000080
-#define FLASH_B0F6 0x00000040
-#define FLASH_B0F5 0x00000020
-#define FLASH_B0F4 0x00000010
-#define FLASH_B0F3 0x00000008
-#define FLASH_B0F2 0x00000004
-#define FLASH_B0F1 0x00000002
-#define FLASH_B0F0 0x00000001
-
-/* FLASH_ER register bits */
-
-#define FLASH_WPF 0x00000100
-#define FLASH_RESER 0x00000080
-#define FLASH_SEQER 0x00000040
-#define FLASH_10ER 0x00000008
-#define FLASH_PGER 0x00000004
-#define FLASH_ERER 0x00000002
-#define FLASH_ERR 0x00000001
-
-
-struct str7x_flash_bank {
- uint32_t *sector_bits;
- uint32_t disable_bit;
- uint32_t busy_bits;
- uint32_t register_base;
-};
-
-struct str7x_mem_layout {
- uint32_t sector_start;
- uint32_t sector_size;
- uint32_t sector_bit;
-};
-
-enum str7x_status_codes {
- STR7X_CMD_SUCCESS = 0,
- STR7X_INVALID_COMMAND = 1,
- STR7X_SRC_ADDR_ERROR = 2,
- STR7X_DST_ADDR_ERROR = 3,
- STR7X_SRC_ADDR_NOT_MAPPED = 4,
- STR7X_DST_ADDR_NOT_MAPPED = 5,
- STR7X_COUNT_ERROR = 6,
- STR7X_INVALID_SECTOR = 7,
- STR7X_SECTOR_NOT_BLANK = 8,
- STR7X_SECTOR_NOT_PREPARED = 9,
- STR7X_COMPARE_ERROR = 10,
- STR7X_BUSY = 11
-};
-
-static const struct str7x_mem_layout mem_layout_str7bank0[] = {
- {0x00000000, 0x02000, 0x01},
- {0x00002000, 0x02000, 0x02},
- {0x00004000, 0x02000, 0x04},
- {0x00006000, 0x02000, 0x08},
- {0x00008000, 0x08000, 0x10},
- {0x00010000, 0x10000, 0x20},
- {0x00020000, 0x10000, 0x40},
- {0x00030000, 0x10000, 0x80}
-};
-
-static const struct str7x_mem_layout mem_layout_str7bank1[] = {
- {0x00000000, 0x02000, 0x10000},
- {0x00002000, 0x02000, 0x20000}
-};
-
-static int str7x_get_flash_adr(struct flash_bank *bank, uint32_t reg)
-{
- struct str7x_flash_bank *str7x_info = bank->driver_priv;
- return str7x_info->register_base | reg;
-}
-
-static int str7x_build_block_list(struct flash_bank *bank)
-{
- struct str7x_flash_bank *str7x_info = bank->driver_priv;
-
- int i;
- int num_sectors;
- int b0_sectors = 0, b1_sectors = 0;
-
- switch (bank->size) {
- case 16 * 1024:
- b1_sectors = 2;
- break;
- case 64 * 1024:
- b0_sectors = 5;
- break;
- case 128 * 1024:
- b0_sectors = 6;
- break;
- case 256 * 1024:
- b0_sectors = 8;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
-
- num_sectors = b0_sectors + b1_sectors;
-
- bank->num_sectors = num_sectors;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
- str7x_info->sector_bits = malloc(sizeof(uint32_t) * num_sectors);
-
- num_sectors = 0;
-
- for (i = 0; i < b0_sectors; i++) {
- bank->sectors[num_sectors].offset = mem_layout_str7bank0[i].sector_start;
- bank->sectors[num_sectors].size = mem_layout_str7bank0[i].sector_size;
- bank->sectors[num_sectors].is_erased = -1;
- /* the reset_init handler marks all the sectors unprotected,
- * matching hardware after reset; keep the driver in sync
- */
- bank->sectors[num_sectors].is_protected = 0;
- str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank0[i].sector_bit;
- }
-
- for (i = 0; i < b1_sectors; i++) {
- bank->sectors[num_sectors].offset = mem_layout_str7bank1[i].sector_start;
- bank->sectors[num_sectors].size = mem_layout_str7bank1[i].sector_size;
- bank->sectors[num_sectors].is_erased = -1;
- /* the reset_init handler marks all the sectors unprotected,
- * matching hardware after reset; keep the driver in sync
- */
- bank->sectors[num_sectors].is_protected = 0;
- str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank1[i].sector_bit;
- }
-
- return ERROR_OK;
-}
-
-/* flash bank str7x <base> <size> 0 0 <target#> <str71_variant>
- */
-FLASH_BANK_COMMAND_HANDLER(str7x_flash_bank_command)
-{
- struct str7x_flash_bank *str7x_info;
-
- if (CMD_ARGC < 7)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- str7x_info = malloc(sizeof(struct str7x_flash_bank));
- bank->driver_priv = str7x_info;
-
- /* set default bits for str71x flash */
- str7x_info->busy_bits = (FLASH_LOCK | FLASH_BSYA1 | FLASH_BSYA0);
- str7x_info->disable_bit = (1 << 1);
-
- if (strcmp(CMD_ARGV[6], "STR71x") == 0)
- str7x_info->register_base = 0x40100000;
- else if (strcmp(CMD_ARGV[6], "STR73x") == 0) {
- str7x_info->register_base = 0x80100000;
- str7x_info->busy_bits = (FLASH_LOCK | FLASH_BSYA0);
- } else if (strcmp(CMD_ARGV[6], "STR75x") == 0) {
- str7x_info->register_base = 0x20100000;
- str7x_info->disable_bit = (1 << 0);
- } else {
- LOG_ERROR("unknown STR7x variant: '%s'", CMD_ARGV[6]);
- free(str7x_info);
- return ERROR_FLASH_BANK_INVALID;
- }
-
- str7x_build_block_list(bank);
-
- return ERROR_OK;
-}
-
-/* wait for flash to become idle or report errors.
-
- FIX!!! what's the maximum timeout??? The documentation doesn't
- state any maximum time.... by inspection it seems > 1000ms is to be
- expected.
-
- 10000ms is long enough that it should cover anything, yet not
- quite be equivalent to an infinite loop.
-
- */
-static int str7x_waitbusy(struct flash_bank *bank)
-{
- int err;
- int i;
- struct target *target = bank->target;
- struct str7x_flash_bank *str7x_info = bank->driver_priv;
-
- for (i = 0 ; i < 10000; i++) {
- uint32_t retval;
- err = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval);
- if (err != ERROR_OK)
- return err;
-
- if ((retval & str7x_info->busy_bits) == 0)
- return ERROR_OK;
-
- alive_sleep(1);
- }
- LOG_ERROR("Timed out waiting for str7x flash");
- return ERROR_FAIL;
-}
-
-
-static int str7x_result(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- uint32_t flash_flags;
-
- int retval;
- retval = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &flash_flags);
- if (retval != ERROR_OK)
- return retval;
-
- if (flash_flags & FLASH_WPF) {
- LOG_ERROR("str7x hw write protection set");
- retval = ERROR_FAIL;
- }
- if (flash_flags & FLASH_RESER) {
- LOG_ERROR("str7x suspended program erase not resumed");
- retval = ERROR_FAIL;
- }
- if (flash_flags & FLASH_10ER) {
- LOG_ERROR("str7x trying to set bit to 1 when it is already 0");
- retval = ERROR_FAIL;
- }
- if (flash_flags & FLASH_PGER) {
- LOG_ERROR("str7x program error");
- retval = ERROR_FAIL;
- }
- if (flash_flags & FLASH_ERER) {
- LOG_ERROR("str7x erase error");
- retval = ERROR_FAIL;
- }
- if (retval == ERROR_OK) {
- if (flash_flags & FLASH_ERR) {
- /* this should always be set if one of the others are set... */
- LOG_ERROR("str7x write operation failed / bad setup");
- retval = ERROR_FAIL;
- }
- }
-
- return retval;
-}
-
-static int str7x_protect_check(struct flash_bank *bank)
-{
- struct str7x_flash_bank *str7x_info = bank->driver_priv;
- struct target *target = bank->target;
-
- int i;
- uint32_t flash_flags;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int retval;
- retval = target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVWPAR), &flash_flags);
- if (retval != ERROR_OK)
- return retval;
-
- for (i = 0; i < bank->num_sectors; i++) {
- if (flash_flags & str7x_info->sector_bits[i])
- bank->sectors[i].is_protected = 0;
- else
- bank->sectors[i].is_protected = 1;
- }
-
- return ERROR_OK;
-}
-
-static int str7x_erase(struct flash_bank *bank, int first, int last)
-{
- struct str7x_flash_bank *str7x_info = bank->driver_priv;
- struct target *target = bank->target;
-
- int i;
- uint32_t cmd;
- uint32_t sectors = 0;
- int err;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- for (i = first; i <= last; i++)
- sectors |= str7x_info->sector_bits[i];
-
- LOG_DEBUG("sectors: 0x%" PRIx32 "", sectors);
-
- /* clear FLASH_ER register */
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
- if (err != ERROR_OK)
- return err;
-
- cmd = FLASH_SER;
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- if (err != ERROR_OK)
- return err;
-
- cmd = sectors;
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
- if (err != ERROR_OK)
- return err;
-
- cmd = FLASH_SER | FLASH_WMS;
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- if (err != ERROR_OK)
- return err;
-
- err = str7x_waitbusy(bank);
- if (err != ERROR_OK)
- return err;
-
- err = str7x_result(bank);
- if (err != ERROR_OK)
- return err;
-
- for (i = first; i <= last; i++)
- bank->sectors[i].is_erased = 1;
-
- return ERROR_OK;
-}
-
-static int str7x_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct str7x_flash_bank *str7x_info = bank->driver_priv;
- struct target *target = bank->target;
- int i;
- uint32_t cmd;
- uint32_t protect_blocks;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- protect_blocks = 0xFFFFFFFF;
-
- if (set) {
- for (i = first; i <= last; i++)
- protect_blocks &= ~(str7x_info->sector_bits[i]);
- }
-
- /* clear FLASH_ER register */
- int err;
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
- if (err != ERROR_OK)
- return err;
-
- cmd = FLASH_SPR;
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- if (err != ERROR_OK)
- return err;
-
- cmd = str7x_get_flash_adr(bank, FLASH_NVWPAR);
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), cmd);
- if (err != ERROR_OK)
- return err;
-
- cmd = protect_blocks;
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd);
- if (err != ERROR_OK)
- return err;
-
- cmd = FLASH_SPR | FLASH_WMS;
- err = target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- if (err != ERROR_OK)
- return err;
-
- err = str7x_waitbusy(bank);
- if (err != ERROR_OK)
- return err;
-
- err = str7x_result(bank);
- if (err != ERROR_OK)
- return err;
-
- return ERROR_OK;
-}
-
-static int str7x_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct str7x_flash_bank *str7x_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t buffer_size = 32768;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[6];
- struct arm_algorithm arm_algo;
- int retval = ERROR_OK;
-
- /* see contib/loaders/flash/str7x.s for src */
-
- static const uint32_t str7x_flash_write_code[] = {
- /* write: */
- 0xe3a04201, /* mov r4, #0x10000000 */
- 0xe5824000, /* str r4, [r2, #0x0] */
- 0xe5821010, /* str r1, [r2, #0x10] */
- 0xe4904004, /* ldr r4, [r0], #4 */
- 0xe5824008, /* str r4, [r2, #0x8] */
- 0xe4904004, /* ldr r4, [r0], #4 */
- 0xe582400c, /* str r4, [r2, #0xc] */
- 0xe3a04209, /* mov r4, #0x90000000 */
- 0xe5824000, /* str r4, [r2, #0x0] */
- /* busy: */
- 0xe5924000, /* ldr r4, [r2, #0x0] */
- 0xe1140005, /* tst r4, r5 */
- 0x1afffffc, /* bne busy */
- 0xe5924014, /* ldr r4, [r2, #0x14] */
- 0xe31400ff, /* tst r4, #0xff */
- 0x03140c01, /* tsteq r4, #0x100 */
- 0x1a000002, /* bne exit */
- 0xe2811008, /* add r1, r1, #0x8 */
- 0xe2533001, /* subs r3, r3, #1 */
- 0x1affffec, /* bne write */
- /* exit: */
- 0xeafffffe, /* b exit */
- };
-
- /* flash write code */
- if (target_alloc_working_area_try(target, sizeof(str7x_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- uint8_t code[sizeof(str7x_flash_write_code)];
- target_buffer_set_u32_array(target, code, ARRAY_SIZE(str7x_flash_write_code),
- str7x_flash_write_code);
- target_write_buffer(target, write_algorithm->address, sizeof(code), code);
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- arm_algo.common_magic = ARM_COMMON_MAGIC;
- arm_algo.core_mode = ARM_MODE_SVC;
- arm_algo.core_state = ARM_STATE_ARM;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
- init_reg_param(®_params[4], "r4", 32, PARAM_IN);
- init_reg_param(®_params[5], "r5", 32, PARAM_OUT);
-
- while (count > 0) {
- uint32_t thisrun_count = (count > (buffer_size / 8)) ? (buffer_size / 8) : count;
-
- target_write_buffer(target, source->address, thisrun_count * 8, buffer);
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, str7x_get_flash_adr(bank, FLASH_CR0));
- buf_set_u32(reg_params[3].value, 0, 32, thisrun_count);
- buf_set_u32(reg_params[5].value, 0, 32, str7x_info->busy_bits);
-
- retval = target_run_algorithm(target, 0, NULL, 6, reg_params,
- write_algorithm->address,
- write_algorithm->address + (sizeof(str7x_flash_write_code) - 4),
- 10000, &arm_algo);
- if (retval != ERROR_OK)
- break;
-
- if (buf_get_u32(reg_params[4].value, 0, 32) != 0x00) {
- retval = str7x_result(bank);
- break;
- }
-
- buffer += thisrun_count * 8;
- address += thisrun_count * 8;
- count -= thisrun_count;
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
- destroy_reg_param(®_params[5]);
-
- return retval;
-}
-
-static int str7x_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t dwords_remaining = (count / 8);
- uint32_t bytes_remaining = (count & 0x00000007);
- uint32_t address = bank->base + offset;
- uint32_t bytes_written = 0;
- uint32_t cmd;
- int retval;
- uint32_t check_address = offset;
- int i;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x7) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- for (i = 0; i < bank->num_sectors; i++) {
- uint32_t sec_start = bank->sectors[i].offset;
- uint32_t sec_end = sec_start + bank->sectors[i].size;
-
- /* check if destination falls within the current sector */
- if ((check_address >= sec_start) && (check_address < sec_end)) {
- /* check if destination ends in the current sector */
- if (offset + count < sec_end)
- check_address = offset + count;
- else
- check_address = sec_end;
- }
- }
-
- if (check_address != offset + count)
- return ERROR_FLASH_DST_OUT_OF_BANK;
-
- /* clear FLASH_ER register */
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
-
- /* multiple dwords (8-byte) to be programmed? */
- if (dwords_remaining > 0) {
- /* try using a block write */
- retval = str7x_write_block(bank, buffer, offset, dwords_remaining);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single dword accesses */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
- } else {
- return retval;
- }
- } else {
- buffer += dwords_remaining * 8;
- address += dwords_remaining * 8;
- dwords_remaining = 0;
- }
- }
-
- while (dwords_remaining > 0) {
- /* command */
- cmd = FLASH_DWPG;
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
-
- /* address */
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address);
-
- /* data word 1 */
- target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0),
- 4, 1, buffer + bytes_written);
- bytes_written += 4;
-
- /* data word 2 */
- target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1),
- 4, 1, buffer + bytes_written);
- bytes_written += 4;
-
- /* start programming cycle */
- cmd = FLASH_DWPG | FLASH_WMS;
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
-
- int err;
- err = str7x_waitbusy(bank);
- if (err != ERROR_OK)
- return err;
-
- err = str7x_result(bank);
- if (err != ERROR_OK)
- return err;
-
- dwords_remaining--;
- address += 8;
- }
-
- if (bytes_remaining) {
- uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
-
- /* copy the last remaining bytes into the write buffer */
- memcpy(last_dword, buffer+bytes_written, bytes_remaining);
-
- /* command */
- cmd = FLASH_DWPG;
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
-
- /* address */
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address);
-
- /* data word 1 */
- target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0),
- 4, 1, last_dword);
-
- /* data word 2 */
- target_write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1),
- 4, 1, last_dword + 4);
-
- /* start programming cycle */
- cmd = FLASH_DWPG | FLASH_WMS;
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
-
- int err;
- err = str7x_waitbusy(bank);
- if (err != ERROR_OK)
- return err;
-
- err = str7x_result(bank);
- if (err != ERROR_OK)
- return err;
- }
-
- return ERROR_OK;
-}
-
-static int str7x_probe(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-#if 0
-COMMAND_HANDLER(str7x_handle_part_id_command)
-{
- return ERROR_OK;
-}
-#endif
-
-static int get_str7x_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- /* Setting the write protection on a sector is a permanent change but it
- * can be disabled temporarily. FLASH_NVWPAR reflects the permanent
- * protection state of the sectors, not the temporary.
- */
- snprintf(buf, buf_size, "STR7x flash protection info is only valid after a power cycle, "
- "clearing the protection is only temporary and may not be reflected in the current "
- "info returned.");
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str7x_handle_disable_jtag_command)
-{
- struct target *target = NULL;
- struct str7x_flash_bank *str7x_info = NULL;
-
- uint32_t flash_cmd;
- uint16_t ProtectionLevel = 0;
- uint16_t ProtectionRegs;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str7x_info = bank->driver_priv;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* first we get protection status */
- uint32_t reg;
- target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR0), ®);
-
- if (!(reg & str7x_info->disable_bit))
- ProtectionLevel = 1;
-
- target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVAPR1), ®);
- ProtectionRegs = ~(reg >> 16);
-
- while (((ProtectionRegs) != 0) && (ProtectionLevel < 16)) {
- ProtectionRegs >>= 1;
- ProtectionLevel++;
- }
-
- if (ProtectionLevel == 0) {
- flash_cmd = FLASH_SPR;
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFB8);
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), 0xFFFFFFFD);
- flash_cmd = FLASH_SPR | FLASH_WMS;
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
- } else {
- flash_cmd = FLASH_SPR;
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), 0x4010DFBC);
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0),
- ~(1 << (15 + ProtectionLevel)));
- flash_cmd = FLASH_SPR | FLASH_WMS;
- target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), flash_cmd);
- }
-
- return ERROR_OK;
-}
-
-static const struct command_registration str7x_exec_command_handlers[] = {
- {
- .name = "disable_jtag",
- .usage = "<bank>",
- .handler = str7x_handle_disable_jtag_command,
- .mode = COMMAND_EXEC,
- .help = "disable jtag access",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration str7x_command_handlers[] = {
- {
- .name = "str7x",
- .mode = COMMAND_ANY,
- .help = "str7x flash command group",
- .usage = "",
- .chain = str7x_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver str7x_flash = {
- .name = "str7x",
- .commands = str7x_command_handlers,
- .flash_bank_command = str7x_flash_bank_command,
- .erase = str7x_erase,
- .protect = str7x_protect,
- .write = str7x_write,
- .read = default_flash_read,
- .probe = str7x_probe,
- .auto_probe = str7x_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = str7x_protect_check,
- .info = get_str7x_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str9x.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str9x.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str9x.c
deleted file mode 100755
index b3f08b0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str9x.c
+++ /dev/null
@@ -1,684 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- *
- * Copyright (C) 2008 by Oyvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <target/arm966e.h>
-#include <target/algorithm.h>
-
-/* Flash registers */
-
-#define FLASH_BBSR 0x54000000 /* Boot Bank Size Register */
-#define FLASH_NBBSR 0x54000004 /* Non-Boot Bank Size Register */
-#define FLASH_BBADR 0x5400000C /* Boot Bank Base Address Register */
-#define FLASH_NBBADR 0x54000010 /* Non-Boot Bank Base Address Register */
-#define FLASH_CR 0x54000018 /* Control Register */
-#define FLASH_SR 0x5400001C /* Status Register */
-#define FLASH_BCE5ADDR 0x54000020 /* BC Fifth Entry Target Address Register */
-
-struct str9x_flash_bank {
- uint32_t *sector_bits;
- int variant;
- int bank1;
-};
-
-enum str9x_status_codes {
- STR9X_CMD_SUCCESS = 0,
- STR9X_INVALID_COMMAND = 1,
- STR9X_SRC_ADDR_ERROR = 2,
- STR9X_DST_ADDR_ERROR = 3,
- STR9X_SRC_ADDR_NOT_MAPPED = 4,
- STR9X_DST_ADDR_NOT_MAPPED = 5,
- STR9X_COUNT_ERROR = 6,
- STR9X_INVALID_SECTOR = 7,
- STR9X_SECTOR_NOT_BLANK = 8,
- STR9X_SECTOR_NOT_PREPARED = 9,
- STR9X_COMPARE_ERROR = 10,
- STR9X_BUSY = 11
-};
-
-static uint32_t bank1start = 0x00080000;
-
-static int str9x_build_block_list(struct flash_bank *bank)
-{
- struct str9x_flash_bank *str9x_info = bank->driver_priv;
-
- int i;
- int num_sectors;
- int b0_sectors = 0, b1_sectors = 0;
- uint32_t offset = 0;
-
- /* set if we have large flash str9 */
- str9x_info->variant = 0;
- str9x_info->bank1 = 0;
-
- switch (bank->size) {
- case (256 * 1024):
- b0_sectors = 4;
- break;
- case (512 * 1024):
- b0_sectors = 8;
- break;
- case (1024 * 1024):
- bank1start = 0x00100000;
- str9x_info->variant = 1;
- b0_sectors = 16;
- break;
- case (2048 * 1024):
- bank1start = 0x00200000;
- str9x_info->variant = 1;
- b0_sectors = 32;
- break;
- case (128 * 1024):
- str9x_info->variant = 1;
- str9x_info->bank1 = 1;
- b1_sectors = 8;
- bank1start = bank->base;
- break;
- case (32 * 1024):
- str9x_info->bank1 = 1;
- b1_sectors = 4;
- bank1start = bank->base;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
-
- num_sectors = b0_sectors + b1_sectors;
-
- bank->num_sectors = num_sectors;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
- str9x_info->sector_bits = malloc(sizeof(uint32_t) * num_sectors);
-
- num_sectors = 0;
-
- for (i = 0; i < b0_sectors; i++) {
- bank->sectors[num_sectors].offset = offset;
- bank->sectors[num_sectors].size = 0x10000;
- offset += bank->sectors[i].size;
- bank->sectors[num_sectors].is_erased = -1;
- bank->sectors[num_sectors].is_protected = 1;
- str9x_info->sector_bits[num_sectors++] = (1 << i);
- }
-
- for (i = 0; i < b1_sectors; i++) {
- bank->sectors[num_sectors].offset = offset;
- bank->sectors[num_sectors].size = str9x_info->variant == 0 ? 0x2000 : 0x4000;
- offset += bank->sectors[i].size;
- bank->sectors[num_sectors].is_erased = -1;
- bank->sectors[num_sectors].is_protected = 1;
- if (str9x_info->variant)
- str9x_info->sector_bits[num_sectors++] = (1 << i);
- else
- str9x_info->sector_bits[num_sectors++] = (1 << (i + 8));
- }
-
- return ERROR_OK;
-}
-
-/* flash bank str9x <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(str9x_flash_bank_command)
-{
- struct str9x_flash_bank *str9x_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- str9x_info = malloc(sizeof(struct str9x_flash_bank));
- bank->driver_priv = str9x_info;
-
- str9x_build_block_list(bank);
-
- return ERROR_OK;
-}
-
-static int str9x_protect_check(struct flash_bank *bank)
-{
- int retval;
- struct str9x_flash_bank *str9x_info = bank->driver_priv;
- struct target *target = bank->target;
-
- int i;
- uint32_t adr;
- uint32_t status = 0;
- uint16_t hstatus = 0;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* read level one protection */
-
- if (str9x_info->variant) {
- if (str9x_info->bank1) {
- adr = bank1start + 0x18;
- retval = target_write_u16(target, adr, 0x90);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u16(target, adr, &hstatus);
- if (retval != ERROR_OK)
- return retval;
- status = hstatus;
- } else {
- adr = bank1start + 0x14;
- retval = target_write_u16(target, adr, 0x90);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u32(target, adr, &status);
- if (retval != ERROR_OK)
- return retval;
- }
- } else {
- adr = bank1start + 0x10;
- retval = target_write_u16(target, adr, 0x90);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_u16(target, adr, &hstatus);
- if (retval != ERROR_OK)
- return retval;
- status = hstatus;
- }
-
- /* read array command */
- retval = target_write_u16(target, adr, 0xFF);
- if (retval != ERROR_OK)
- return retval;
-
- for (i = 0; i < bank->num_sectors; i++) {
- if (status & str9x_info->sector_bits[i])
- bank->sectors[i].is_protected = 1;
- else
- bank->sectors[i].is_protected = 0;
- }
-
- return ERROR_OK;
-}
-
-static int str9x_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- int i;
- uint32_t adr;
- uint8_t status;
- uint8_t erase_cmd;
- int total_timeout;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Check if we can erase whole bank */
- if ((first == 0) && (last == (bank->num_sectors - 1))) {
- /* Optimize to run erase bank command instead of sector */
- erase_cmd = 0x80;
- /* Add timeout duration since erase bank takes more time */
- total_timeout = 1000 * bank->num_sectors;
- } else {
- /* Erase sector command */
- erase_cmd = 0x20;
- total_timeout = 1000;
- }
-
- /* this is so the compiler can *know* */
- assert(total_timeout > 0);
-
- for (i = first; i <= last; i++) {
- int retval;
- adr = bank->base + bank->sectors[i].offset;
-
- /* erase sectors or block */
- retval = target_write_u16(target, adr, erase_cmd);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u16(target, adr, 0xD0);
- if (retval != ERROR_OK)
- return retval;
-
- /* get status */
- retval = target_write_u16(target, adr, 0x70);
- if (retval != ERROR_OK)
- return retval;
-
- int timeout;
- for (timeout = 0; timeout < total_timeout; timeout++) {
- retval = target_read_u8(target, adr, &status);
- if (retval != ERROR_OK)
- return retval;
- if (status & 0x80)
- break;
- alive_sleep(1);
- }
- if (timeout == total_timeout) {
- LOG_ERROR("erase timed out");
- return ERROR_FAIL;
- }
-
- /* clear status, also clear read array */
- retval = target_write_u16(target, adr, 0x50);
- if (retval != ERROR_OK)
- return retval;
-
- /* read array command */
- retval = target_write_u16(target, adr, 0xFF);
- if (retval != ERROR_OK)
- return retval;
-
- if (status & 0x22) {
- LOG_ERROR("error erasing flash bank, status: 0x%x", status);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* If we ran erase bank command, we are finished */
- if (erase_cmd == 0x80)
- break;
- }
-
- for (i = first; i <= last; i++)
- bank->sectors[i].is_erased = 1;
-
- return ERROR_OK;
-}
-
-static int str9x_protect(struct flash_bank *bank,
- int set, int first, int last)
-{
- struct target *target = bank->target;
- int i;
- uint32_t adr;
- uint8_t status;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- for (i = first; i <= last; i++) {
- /* Level One Protection */
-
- adr = bank->base + bank->sectors[i].offset;
-
- target_write_u16(target, adr, 0x60);
- if (set)
- target_write_u16(target, adr, 0x01);
- else
- target_write_u16(target, adr, 0xD0);
-
- /* query status */
- target_read_u8(target, adr, &status);
-
- /* clear status, also clear read array */
- target_write_u16(target, adr, 0x50);
-
- /* read array command */
- target_write_u16(target, adr, 0xFF);
- }
-
- return ERROR_OK;
-}
-
-static int str9x_write_block(struct flash_bank *bank,
- const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 32768;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[4];
- struct arm_algorithm arm_algo;
- int retval = ERROR_OK;
-
- /* see contib/loaders/flash/str9x.s for src */
-
- static const uint32_t str9x_flash_write_code[] = {
- /* write: */
- 0xe3c14003, /* bic r4, r1, #3 */
- 0xe3a03040, /* mov r3, #0x40 */
- 0xe1c430b0, /* strh r3, [r4, #0] */
- 0xe0d030b2, /* ldrh r3, [r0], #2 */
- 0xe0c130b2, /* strh r3, [r1], #2 */
- 0xe3a03070, /* mov r3, #0x70 */
- 0xe1c430b0, /* strh r3, [r4, #0] */
- /* busy: */
- 0xe5d43000, /* ldrb r3, [r4, #0] */
- 0xe3130080, /* tst r3, #0x80 */
- 0x0afffffc, /* beq busy */
- 0xe3a05050, /* mov r5, #0x50 */
- 0xe1c450b0, /* strh r5, [r4, #0] */
- 0xe3a050ff, /* mov r5, #0xFF */
- 0xe1c450b0, /* strh r5, [r4, #0] */
- 0xe3130012, /* tst r3, #0x12 */
- 0x1a000001, /* bne exit */
- 0xe2522001, /* subs r2, r2, #1 */
- 0x1affffed, /* bne write */
- /* exit: */
- 0xe1200070, /* bkpt #0 */
- };
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(str9x_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- uint8_t code[sizeof(str9x_flash_write_code)];
- target_buffer_set_u32_array(target, code, ARRAY_SIZE(str9x_flash_write_code),
- str9x_flash_write_code);
- target_write_buffer(target, write_algorithm->address, sizeof(code), code);
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- arm_algo.common_magic = ARM_COMMON_MAGIC;
- arm_algo.core_mode = ARM_MODE_SVC;
- arm_algo.core_state = ARM_STATE_ARM;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_IN);
-
- while (count > 0) {
- uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
-
- target_write_buffer(target, source->address, thisrun_count * 2, buffer);
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
-
- retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
- write_algorithm->address,
- 0, 10000, &arm_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("error executing str9x flash write algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- if (buf_get_u32(reg_params[3].value, 0, 32) != 0x80) {
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- buffer += thisrun_count * 2;
- address += thisrun_count * 2;
- count -= thisrun_count;
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
-
- return retval;
-}
-
-static int str9x_write(struct flash_bank *bank,
- const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t words_remaining = (count / 2);
- uint32_t bytes_remaining = (count & 0x00000001);
- uint32_t address = bank->base + offset;
- uint32_t bytes_written = 0;
- uint8_t status;
- int retval;
- uint32_t check_address = offset;
- uint32_t bank_adr;
- int i;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x1) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- for (i = 0; i < bank->num_sectors; i++) {
- uint32_t sec_start = bank->sectors[i].offset;
- uint32_t sec_end = sec_start + bank->sectors[i].size;
-
- /* check if destination falls within the current sector */
- if ((check_address >= sec_start) && (check_address < sec_end)) {
- /* check if destination ends in the current sector */
- if (offset + count < sec_end)
- check_address = offset + count;
- else
- check_address = sec_end;
- }
- }
-
- if (check_address != offset + count)
- return ERROR_FLASH_DST_OUT_OF_BANK;
-
- /* multiple half words (2-byte) to be programmed? */
- if (words_remaining > 0) {
- /* try using a block write */
- retval = str9x_write_block(bank, buffer, offset, words_remaining);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single dword accesses */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
- } else if (retval == ERROR_FLASH_OPERATION_FAILED) {
- LOG_ERROR("flash writing failed");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- } else {
- buffer += words_remaining * 2;
- address += words_remaining * 2;
- words_remaining = 0;
- }
- }
-
- while (words_remaining > 0) {
- bank_adr = address & ~0x03;
-
- /* write data command */
- target_write_u16(target, bank_adr, 0x40);
- target_write_memory(target, address, 2, 1, buffer + bytes_written);
-
- /* get status command */
- target_write_u16(target, bank_adr, 0x70);
-
- int timeout;
- for (timeout = 0; timeout < 1000; timeout++) {
- target_read_u8(target, bank_adr, &status);
- if (status & 0x80)
- break;
- alive_sleep(1);
- }
- if (timeout == 1000) {
- LOG_ERROR("write timed out");
- return ERROR_FAIL;
- }
-
- /* clear status reg and read array */
- target_write_u16(target, bank_adr, 0x50);
- target_write_u16(target, bank_adr, 0xFF);
-
- if (status & 0x10)
- return ERROR_FLASH_OPERATION_FAILED;
- else if (status & 0x02)
- return ERROR_FLASH_OPERATION_FAILED;
-
- bytes_written += 2;
- words_remaining--;
- address += 2;
- }
-
- if (bytes_remaining) {
- uint8_t last_halfword[2] = {0xff, 0xff};
-
- /* copy the last remaining bytes into the write buffer */
- memcpy(last_halfword, buffer+bytes_written, bytes_remaining);
-
- bank_adr = address & ~0x03;
-
- /* write data command */
- target_write_u16(target, bank_adr, 0x40);
- target_write_memory(target, address, 2, 1, last_halfword);
-
- /* query status command */
- target_write_u16(target, bank_adr, 0x70);
-
- int timeout;
- for (timeout = 0; timeout < 1000; timeout++) {
- target_read_u8(target, bank_adr, &status);
- if (status & 0x80)
- break;
- alive_sleep(1);
- }
- if (timeout == 1000) {
- LOG_ERROR("write timed out");
- return ERROR_FAIL;
- }
-
- /* clear status reg and read array */
- target_write_u16(target, bank_adr, 0x50);
- target_write_u16(target, bank_adr, 0xFF);
-
- if (status & 0x10)
- return ERROR_FLASH_OPERATION_FAILED;
- else if (status & 0x02)
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int str9x_probe(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-#if 0
-COMMAND_HANDLER(str9x_handle_part_id_command)
-{
- return ERROR_OK;
-}
-#endif
-
-COMMAND_HANDLER(str9x_handle_flash_config_command)
-{
- struct target *target = NULL;
-
- if (CMD_ARGC < 5)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- uint32_t bbsr, nbbsr, bbadr, nbbadr;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], bbsr);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], nbbsr);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], bbadr);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[4], nbbadr);
-
- target = bank->target;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* config flash controller */
- target_write_u32(target, FLASH_BBSR, bbsr);
- target_write_u32(target, FLASH_NBBSR, nbbsr);
- target_write_u32(target, FLASH_BBADR, bbadr >> 2);
- target_write_u32(target, FLASH_NBBADR, nbbadr >> 2);
-
- /* set bit 18 instruction TCM order as per flash programming manual */
- arm966e_write_cp15(target, 62, 0x40000);
-
- /* enable flash bank 1 */
- target_write_u32(target, FLASH_CR, 0x18);
- return ERROR_OK;
-}
-
-static const struct command_registration str9x_config_command_handlers[] = {
- {
- .name = "flash_config",
- .handler = str9x_handle_flash_config_command,
- .mode = COMMAND_EXEC,
- .help = "Configure str9x flash controller, prior to "
- "programming the flash.",
- .usage = "bank_id BBSR NBBSR BBADR NBBADR",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration str9x_command_handlers[] = {
- {
- .name = "str9x",
- .mode = COMMAND_ANY,
- .help = "str9x flash command group",
- .usage = "",
- .chain = str9x_config_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver str9x_flash = {
- .name = "str9x",
- .commands = str9x_command_handlers,
- .flash_bank_command = str9x_flash_bank_command,
- .erase = str9x_erase,
- .protect = str9x_protect,
- .write = str9x_write,
- .read = default_flash_read,
- .probe = str9x_probe,
- .auto_probe = str9x_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = str9x_protect_check,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str9xpec.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str9xpec.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str9xpec.c
deleted file mode 100755
index f0af53a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/str9xpec.c
+++ /dev/null
@@ -1,1212 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <target/arm7_9_common.h>
-
-/* ISC commands */
-
-#define ISC_IDCODE 0xFE
-#define ISC_MFG_READ 0x4C
-#define ISC_CONFIGURATION 0x07
-#define ISC_ENABLE 0x0C
-#define ISC_DISABLE 0x0F
-#define ISC_NOOP 0x10
-#define ISC_ADDRESS_SHIFT 0x11
-#define ISC_CLR_STATUS 0x13
-#define ISC_PROGRAM 0x20
-#define ISC_PROGRAM_SECURITY 0x22
-#define ISC_PROGRAM_UC 0x23
-#define ISC_ERASE 0x30
-#define ISC_READ 0x50
-#define ISC_BLANK_CHECK 0x60
-
-/* ISC_DEFAULT bit definitions */
-
-#define ISC_STATUS_SECURITY 0x40
-#define ISC_STATUS_INT_ERROR 0x30
-#define ISC_STATUS_MODE 0x08
-#define ISC_STATUS_BUSY 0x04
-#define ISC_STATUS_ERROR 0x03
-
-/* Option bytes definitions */
-
-#define STR9XPEC_OPT_CSMAPBIT 48
-#define STR9XPEC_OPT_LVDTHRESBIT 49
-#define STR9XPEC_OPT_LVDSELBIT 50
-#define STR9XPEC_OPT_LVDWARNBIT 51
-#define STR9XPEC_OPT_OTPBIT 63
-
-enum str9xpec_status_codes {
- STR9XPEC_INVALID_COMMAND = 1,
- STR9XPEC_ISC_SUCCESS = 2,
- STR9XPEC_ISC_DISABLED = 3,
- STR9XPEC_ISC_INTFAIL = 32,
-};
-
-struct str9xpec_flash_controller {
- struct jtag_tap *tap;
- uint32_t *sector_bits;
- int chain_pos;
- int isc_enable;
- uint8_t options[8];
-};
-
-static int str9xpec_erase_area(struct flash_bank *bank, int first, int last);
-static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector);
-static int str9xpec_write_options(struct flash_bank *bank);
-
-static int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state)
-{
- if (tap == NULL)
- return ERROR_TARGET_INVALID;
-
- if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr) {
- struct scan_field field;
-
- field.num_bits = tap->ir_length;
- void *t = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
- field.out_value = t;
- buf_set_u32(t, 0, field.num_bits, new_instr);
- field.in_value = NULL;
-
- jtag_add_ir_scan(tap, &field, end_state);
-
- free(t);
- }
-
- return ERROR_OK;
-}
-
-static uint8_t str9xpec_isc_status(struct jtag_tap *tap)
-{
- struct scan_field field;
- uint8_t status;
-
- if (str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE) != ERROR_OK)
- return ISC_STATUS_ERROR;
-
- field.num_bits = 8;
- field.out_value = NULL;
- field.in_value = &status;
-
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
- jtag_execute_queue();
-
- LOG_DEBUG("status: 0x%2.2x", status);
-
- if (status & ISC_STATUS_SECURITY)
- LOG_INFO("Device Security Bit Set");
-
- return status;
-}
-
-static int str9xpec_isc_enable(struct flash_bank *bank)
-{
- uint8_t status;
- struct jtag_tap *tap;
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- tap = str9xpec_info->tap;
-
- if (str9xpec_info->isc_enable)
- return ERROR_OK;
-
- /* enter isc mode */
- if (str9xpec_set_instr(tap, ISC_ENABLE, TAP_IDLE) != ERROR_OK)
- return ERROR_TARGET_INVALID;
-
- /* check ISC status */
- status = str9xpec_isc_status(tap);
- if (status & ISC_STATUS_MODE) {
- /* we have entered isc mode */
- str9xpec_info->isc_enable = 1;
- LOG_DEBUG("ISC_MODE Enabled");
- }
-
- return ERROR_OK;
-}
-
-static int str9xpec_isc_disable(struct flash_bank *bank)
-{
- uint8_t status;
- struct jtag_tap *tap;
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- tap = str9xpec_info->tap;
-
- if (!str9xpec_info->isc_enable)
- return ERROR_OK;
-
- if (str9xpec_set_instr(tap, ISC_DISABLE, TAP_IDLE) != ERROR_OK)
- return ERROR_TARGET_INVALID;
-
- /* delay to handle aborts */
- jtag_add_sleep(50);
-
- /* check ISC status */
- status = str9xpec_isc_status(tap);
- if (!(status & ISC_STATUS_MODE)) {
- /* we have left isc mode */
- str9xpec_info->isc_enable = 0;
- LOG_DEBUG("ISC_MODE Disabled");
- }
-
- return ERROR_OK;
-}
-
-static int str9xpec_read_config(struct flash_bank *bank)
-{
- struct scan_field field;
- uint8_t status;
- struct jtag_tap *tap;
-
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- tap = str9xpec_info->tap;
-
- LOG_DEBUG("ISC_CONFIGURATION");
-
- /* execute ISC_CONFIGURATION command */
- str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_IRPAUSE);
-
- field.num_bits = 64;
- field.out_value = NULL;
- field.in_value = str9xpec_info->options;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
- jtag_execute_queue();
-
- status = str9xpec_isc_status(tap);
-
- return status;
-}
-
-static int str9xpec_build_block_list(struct flash_bank *bank)
-{
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- int i;
- int num_sectors;
- int b0_sectors = 0, b1_sectors = 0;
- uint32_t offset = 0;
- int b1_size = 0x2000;
-
- switch (bank->size) {
- case (256 * 1024):
- b0_sectors = 4;
- break;
- case (512 * 1024):
- b0_sectors = 8;
- break;
- case (1024 * 1024):
- b0_sectors = 16;
- break;
- case (2048 * 1024):
- b0_sectors = 32;
- break;
- case (128 * 1024):
- b1_size = 0x4000;
- b1_sectors = 8;
- break;
- case (32 * 1024):
- b1_sectors = 4;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
-
- num_sectors = b0_sectors + b1_sectors;
-
- bank->num_sectors = num_sectors;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
- str9xpec_info->sector_bits = malloc(sizeof(uint32_t) * num_sectors);
-
- num_sectors = 0;
-
- for (i = 0; i < b0_sectors; i++) {
- bank->sectors[num_sectors].offset = offset;
- bank->sectors[num_sectors].size = 0x10000;
- offset += bank->sectors[i].size;
- bank->sectors[num_sectors].is_erased = -1;
- bank->sectors[num_sectors].is_protected = 1;
- str9xpec_info->sector_bits[num_sectors++] = i;
- }
-
- for (i = 0; i < b1_sectors; i++) {
- bank->sectors[num_sectors].offset = offset;
- bank->sectors[num_sectors].size = b1_size;
- offset += bank->sectors[i].size;
- bank->sectors[num_sectors].is_erased = -1;
- bank->sectors[num_sectors].is_protected = 1;
- str9xpec_info->sector_bits[num_sectors++] = i + 32;
- }
-
- return ERROR_OK;
-}
-
-/* flash bank str9x <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(str9xpec_flash_bank_command)
-{
- struct str9xpec_flash_controller *str9xpec_info;
- struct arm *arm = NULL;
- struct arm7_9_common *arm7_9 = NULL;
- struct arm_jtag *jtag_info = NULL;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- str9xpec_info = malloc(sizeof(struct str9xpec_flash_controller));
- bank->driver_priv = str9xpec_info;
-
- /* REVISIT verify that the jtag position of flash controller is
- * right after *THIS* core, which must be a STR9xx core ...
- */
- arm = bank->target->arch_info;
- arm7_9 = arm->arch_info;
- jtag_info = &arm7_9->jtag_info;
-
- /* The core is the next tap after the flash controller in the chain */
- str9xpec_info->tap = jtag_tap_by_position(jtag_info->tap->abs_chain_position - 1);
- str9xpec_info->isc_enable = 0;
-
- str9xpec_build_block_list(bank);
-
- /* clear option byte register */
- buf_set_u32(str9xpec_info->options, 0, 64, 0);
-
- return ERROR_OK;
-}
-
-static int str9xpec_blank_check(struct flash_bank *bank, int first, int last)
-{
- struct scan_field field;
- uint8_t status;
- struct jtag_tap *tap;
- int i;
- uint8_t *buffer = NULL;
-
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- tap = str9xpec_info->tap;
-
- if (!str9xpec_info->isc_enable)
- str9xpec_isc_enable(bank);
-
- if (!str9xpec_info->isc_enable)
- return ERROR_FLASH_OPERATION_FAILED;
-
- buffer = calloc(DIV_ROUND_UP(64, 8), 1);
-
- LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last);
-
- for (i = first; i <= last; i++)
- buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
-
- /* execute ISC_BLANK_CHECK command */
- str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_IRPAUSE);
-
- field.num_bits = 64;
- field.out_value = buffer;
- field.in_value = NULL;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
- jtag_add_sleep(40000);
-
- /* read blank check result */
- field.num_bits = 64;
- field.out_value = NULL;
- field.in_value = buffer;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
- jtag_execute_queue();
-
- status = str9xpec_isc_status(tap);
-
- for (i = first; i <= last; i++) {
- if (buf_get_u32(buffer, str9xpec_info->sector_bits[i], 1))
- bank->sectors[i].is_erased = 0;
- else
- bank->sectors[i].is_erased = 1;
- }
-
- free(buffer);
-
- str9xpec_isc_disable(bank);
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
- return ERROR_OK;
-}
-
-static int str9xpec_protect_check(struct flash_bank *bank)
-{
- uint8_t status;
- int i;
-
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- status = str9xpec_read_config(bank);
-
- for (i = 0; i < bank->num_sectors; i++) {
- if (buf_get_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1))
- bank->sectors[i].is_protected = 1;
- else
- bank->sectors[i].is_protected = 0;
- }
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
- return ERROR_OK;
-}
-
-static int str9xpec_erase_area(struct flash_bank *bank, int first, int last)
-{
- struct scan_field field;
- uint8_t status;
- struct jtag_tap *tap;
- int i;
- uint8_t *buffer = NULL;
-
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- tap = str9xpec_info->tap;
-
- if (!str9xpec_info->isc_enable)
- str9xpec_isc_enable(bank);
-
- if (!str9xpec_info->isc_enable)
- return ISC_STATUS_ERROR;
-
- buffer = calloc(DIV_ROUND_UP(64, 8), 1);
-
- LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last);
-
- /* last bank: 0xFF signals a full erase (unlock complete device) */
- /* last bank: 0xFE signals a option byte erase */
- if (last == 0xFF) {
- for (i = 0; i < 64; i++)
- buf_set_u32(buffer, i, 1, 1);
- } else if (last == 0xFE)
- buf_set_u32(buffer, 49, 1, 1);
- else {
- for (i = first; i <= last; i++)
- buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
- }
-
- LOG_DEBUG("ISC_ERASE");
-
- /* execute ISC_ERASE command */
- str9xpec_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
-
- field.num_bits = 64;
- field.out_value = buffer;
- field.in_value = NULL;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
- jtag_execute_queue();
-
- jtag_add_sleep(10);
-
- /* wait for erase completion */
- while (!((status = str9xpec_isc_status(tap)) & ISC_STATUS_BUSY))
- alive_sleep(1);
-
- free(buffer);
-
- str9xpec_isc_disable(bank);
-
- return status;
-}
-
-static int str9xpec_erase(struct flash_bank *bank, int first, int last)
-{
- int status;
-
- status = str9xpec_erase_area(bank, first, last);
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- return ERROR_OK;
-}
-
-static int str9xpec_lock_device(struct flash_bank *bank)
-{
- struct scan_field field;
- uint8_t status;
- struct jtag_tap *tap;
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- str9xpec_info = bank->driver_priv;
- tap = str9xpec_info->tap;
-
- if (!str9xpec_info->isc_enable)
- str9xpec_isc_enable(bank);
-
- if (!str9xpec_info->isc_enable)
- return ISC_STATUS_ERROR;
-
- /* set security address */
- str9xpec_set_address(bank, 0x80);
-
- /* execute ISC_PROGRAM command */
- str9xpec_set_instr(tap, ISC_PROGRAM_SECURITY, TAP_IDLE);
-
- str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
-
- do {
- field.num_bits = 8;
- field.out_value = NULL;
- field.in_value = &status;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
- jtag_execute_queue();
-
- } while (!(status & ISC_STATUS_BUSY));
-
- str9xpec_isc_disable(bank);
-
- return status;
-}
-
-static int str9xpec_unlock_device(struct flash_bank *bank)
-{
- uint8_t status;
-
- status = str9xpec_erase_area(bank, 0, 255);
-
- return status;
-}
-
-static int str9xpec_protect(struct flash_bank *bank, int set, int first, int last)
-{
- uint8_t status;
- int i;
-
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- status = str9xpec_read_config(bank);
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last);
-
- /* last bank: 0xFF signals a full device protect */
- if (last == 0xFF) {
- if (set)
- status = str9xpec_lock_device(bank);
- else {
- /* perform full erase to unlock device */
- status = str9xpec_unlock_device(bank);
- }
- } else {
- for (i = first; i <= last; i++) {
- if (set)
- buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1);
- else
- buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 0);
- }
-
- status = str9xpec_write_options(bank);
- }
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- return ERROR_OK;
-}
-
-static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector)
-{
- struct jtag_tap *tap;
- struct scan_field field;
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
-
- tap = str9xpec_info->tap;
-
- /* set flash controller address */
- str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_IRPAUSE);
-
- field.num_bits = 8;
- field.out_value = §or;
- field.in_value = NULL;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
-
- return ERROR_OK;
-}
-
-static int str9xpec_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
- uint32_t dwords_remaining = (count / 8);
- uint32_t bytes_remaining = (count & 0x00000007);
- uint32_t bytes_written = 0;
- uint8_t status;
- uint32_t check_address = offset;
- struct jtag_tap *tap;
- struct scan_field field;
- uint8_t *scanbuf;
- int i;
- int first_sector = 0;
- int last_sector = 0;
-
- tap = str9xpec_info->tap;
-
- if (!str9xpec_info->isc_enable)
- str9xpec_isc_enable(bank);
-
- if (!str9xpec_info->isc_enable)
- return ERROR_FLASH_OPERATION_FAILED;
-
- if (offset & 0x7) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- for (i = 0; i < bank->num_sectors; i++) {
- uint32_t sec_start = bank->sectors[i].offset;
- uint32_t sec_end = sec_start + bank->sectors[i].size;
-
- /* check if destination falls within the current sector */
- if ((check_address >= sec_start) && (check_address < sec_end)) {
- /* check if destination ends in the current sector */
- if (offset + count < sec_end)
- check_address = offset + count;
- else
- check_address = sec_end;
- }
-
- if ((offset >= sec_start) && (offset < sec_end))
- first_sector = i;
-
- if ((offset + count >= sec_start) && (offset + count < sec_end))
- last_sector = i;
- }
-
- if (check_address != offset + count)
- return ERROR_FLASH_DST_OUT_OF_BANK;
-
- LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
-
- scanbuf = calloc(DIV_ROUND_UP(64, 8), 1);
-
- LOG_DEBUG("ISC_PROGRAM");
-
- for (i = first_sector; i <= last_sector; i++) {
- str9xpec_set_address(bank, str9xpec_info->sector_bits[i]);
-
- dwords_remaining = dwords_remaining < (bank->sectors[i].size/8)
- ? dwords_remaining : (bank->sectors[i].size/8);
-
- while (dwords_remaining > 0) {
- str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
-
- field.num_bits = 64;
- field.out_value = (buffer + bytes_written);
- field.in_value = NULL;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
-
- /* small delay before polling */
- jtag_add_sleep(50);
-
- str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
-
- do {
- field.num_bits = 8;
- field.out_value = NULL;
- field.in_value = scanbuf;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
- jtag_execute_queue();
-
- status = buf_get_u32(scanbuf, 0, 8);
-
- } while (!(status & ISC_STATUS_BUSY));
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
- return ERROR_FLASH_OPERATION_FAILED; */
-
- dwords_remaining--;
- bytes_written += 8;
- }
- }
-
- if (bytes_remaining) {
- uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
-
- /* copy the last remaining bytes into the write buffer */
- memcpy(last_dword, buffer+bytes_written, bytes_remaining);
-
- str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
-
- field.num_bits = 64;
- field.out_value = last_dword;
- field.in_value = NULL;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
-
- /* small delay before polling */
- jtag_add_sleep(50);
-
- str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
-
- do {
- field.num_bits = 8;
- field.out_value = NULL;
- field.in_value = scanbuf;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
- jtag_execute_queue();
-
- status = buf_get_u32(scanbuf, 0, 8);
-
- } while (!(status & ISC_STATUS_BUSY));
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
- return ERROR_FLASH_OPERATION_FAILED; */
- }
-
- free(scanbuf);
-
- str9xpec_isc_disable(bank);
-
- return ERROR_OK;
-}
-
-static int str9xpec_probe(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_part_id_command)
-{
- struct scan_field field;
- uint8_t *buffer = NULL;
- struct jtag_tap *tap;
- uint32_t idcode;
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str9xpec_info = bank->driver_priv;
- tap = str9xpec_info->tap;
-
- buffer = calloc(DIV_ROUND_UP(32, 8), 1);
-
- str9xpec_set_instr(tap, ISC_IDCODE, TAP_IRPAUSE);
-
- field.num_bits = 32;
- field.out_value = NULL;
- field.in_value = buffer;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
- jtag_execute_queue();
-
- idcode = buf_get_u32(buffer, 0, 32);
-
- command_print(CMD_CTX, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
-
- free(buffer);
-
- return ERROR_OK;
-}
-
-static int str9xpec_erase_check(struct flash_bank *bank)
-{
- return str9xpec_blank_check(bank, 0, bank->num_sectors - 1);
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_options_read_command)
-{
- uint8_t status;
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str9xpec_info = bank->driver_priv;
-
- status = str9xpec_read_config(bank);
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* boot bank */
- if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1))
- command_print(CMD_CTX, "CS Map: bank1");
- else
- command_print(CMD_CTX, "CS Map: bank0");
-
- /* OTP lock */
- if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_OTPBIT, 1))
- command_print(CMD_CTX, "OTP Lock: OTP Locked");
- else
- command_print(CMD_CTX, "OTP Lock: OTP Unlocked");
-
- /* LVD Threshold */
- if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1))
- command_print(CMD_CTX, "LVD Threshold: 2.7v");
- else
- command_print(CMD_CTX, "LVD Threshold: 2.4v");
-
- /* LVD reset warning */
- if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1))
- command_print(CMD_CTX, "LVD Reset Warning: VDD or VDDQ Inputs");
- else
- command_print(CMD_CTX, "LVD Reset Warning: VDD Input Only");
-
- /* LVD reset select */
- if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1))
- command_print(CMD_CTX, "LVD Reset Selection: VDD or VDDQ Inputs");
- else
- command_print(CMD_CTX, "LVD Reset Selection: VDD Input Only");
-
- return ERROR_OK;
-}
-
-static int str9xpec_write_options(struct flash_bank *bank)
-{
- struct scan_field field;
- uint8_t status;
- struct jtag_tap *tap;
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- str9xpec_info = bank->driver_priv;
- tap = str9xpec_info->tap;
-
- /* erase config options first */
- status = str9xpec_erase_area(bank, 0xFE, 0xFE);
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return status;
-
- if (!str9xpec_info->isc_enable)
- str9xpec_isc_enable(bank);
-
- if (!str9xpec_info->isc_enable)
- return ISC_STATUS_ERROR;
-
- /* according to data 64th bit has to be set */
- buf_set_u32(str9xpec_info->options, 63, 1, 1);
-
- /* set option byte address */
- str9xpec_set_address(bank, 0x50);
-
- /* execute ISC_PROGRAM command */
- str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
-
- field.num_bits = 64;
- field.out_value = str9xpec_info->options;
- field.in_value = NULL;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
-
- /* small delay before polling */
- jtag_add_sleep(50);
-
- str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
-
- do {
- field.num_bits = 8;
- field.out_value = NULL;
- field.in_value = &status;
-
- jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
- jtag_execute_queue();
-
- } while (!(status & ISC_STATUS_BUSY));
-
- str9xpec_isc_disable(bank);
-
- return status;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_options_write_command)
-{
- uint8_t status;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- status = str9xpec_write_options(bank);
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- command_print(CMD_CTX, "str9xpec write options complete.\n"
- "INFO: a reset or power cycle is required "
- "for the new settings to take effect.");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_options_cmap_command)
-{
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str9xpec_info = bank->driver_priv;
-
- if (strcmp(CMD_ARGV[1], "bank1") == 0)
- buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 1);
- else
- buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 0);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_options_lvdthd_command)
-{
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str9xpec_info = bank->driver_priv;
-
- if (strcmp(CMD_ARGV[1], "2.7v") == 0)
- buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 1);
- else
- buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 0);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_options_lvdsel_command)
-{
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str9xpec_info = bank->driver_priv;
-
- if (strcmp(CMD_ARGV[1], "vdd_vddq") == 0)
- buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 1);
- else
- buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 0);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_options_lvdwarn_command)
-{
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str9xpec_info = bank->driver_priv;
-
- if (strcmp(CMD_ARGV[1], "vdd_vddq") == 0)
- buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 1);
- else
- buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 0);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_lock_command)
-{
- uint8_t status;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- status = str9xpec_lock_device(bank);
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_unlock_command)
-{
- uint8_t status;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- status = str9xpec_unlock_device(bank);
-
- if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
- return ERROR_FLASH_OPERATION_FAILED;
-
- command_print(CMD_CTX, "str9xpec unlocked.\n"
- "INFO: a reset or power cycle is required "
- "for the new settings to take effect.");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command)
-{
- struct jtag_tap *tap0;
- struct jtag_tap *tap1;
- struct jtag_tap *tap2;
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str9xpec_info = bank->driver_priv;
-
- /* remove arm core from chain - enter turbo mode */
- tap0 = str9xpec_info->tap;
- if (tap0 == NULL) {
- /* things are *WRONG* */
- command_print(CMD_CTX, "**STR9FLASH** (tap0) invalid chain?");
- return ERROR_FAIL;
- }
- tap1 = tap0->next_tap;
- if (tap1 == NULL) {
- /* things are *WRONG* */
- command_print(CMD_CTX, "**STR9FLASH** (tap1) invalid chain?");
- return ERROR_FAIL;
- }
- tap2 = tap1->next_tap;
- if (tap2 == NULL) {
- /* things are *WRONG* */
- command_print(CMD_CTX, "**STR9FLASH** (tap2) invalid chain?");
- return ERROR_FAIL;
- }
-
- /* enable turbo mode - TURBO-PROG-ENABLE */
- str9xpec_set_instr(tap2, 0xD, TAP_IDLE);
- retval = jtag_execute_queue();
- if (retval != ERROR_OK)
- return retval;
-
- /* modify scan chain - str9 core has been removed */
- tap1->enabled = 0;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(str9xpec_handle_flash_disable_turbo_command)
-{
- struct jtag_tap *tap;
- struct str9xpec_flash_controller *str9xpec_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- str9xpec_info = bank->driver_priv;
- tap = str9xpec_info->tap;
-
- if (tap == NULL)
- return ERROR_FAIL;
-
- /* exit turbo mode via RESET */
- str9xpec_set_instr(tap, ISC_NOOP, TAP_IDLE);
- jtag_add_tlr();
- jtag_execute_queue();
-
- /* restore previous scan chain */
- if (tap->next_tap)
- tap->next_tap->enabled = 1;
-
- return ERROR_OK;
-}
-
-static const struct command_registration str9xpec_config_command_handlers[] = {
- {
- .name = "enable_turbo",
- .usage = "<bank>",
- .handler = str9xpec_handle_flash_enable_turbo_command,
- .mode = COMMAND_EXEC,
- .help = "enable str9xpec turbo mode",
- },
- {
- .name = "disable_turbo",
- .usage = "<bank>",
- .handler = str9xpec_handle_flash_disable_turbo_command,
- .mode = COMMAND_EXEC,
- .help = "disable str9xpec turbo mode",
- },
- {
- .name = "options_cmap",
- .usage = "<bank> <bank0 | bank1>",
- .handler = str9xpec_handle_flash_options_cmap_command,
- .mode = COMMAND_EXEC,
- .help = "configure str9xpec boot sector",
- },
- {
- .name = "options_lvdthd",
- .usage = "<bank> <2.4v | 2.7v>",
- .handler = str9xpec_handle_flash_options_lvdthd_command,
- .mode = COMMAND_EXEC,
- .help = "configure str9xpec lvd threshold",
- },
- {
- .name = "options_lvdsel",
- .usage = "<bank> <vdd | vdd_vddq>",
- .handler = str9xpec_handle_flash_options_lvdsel_command,
- .mode = COMMAND_EXEC,
- .help = "configure str9xpec lvd selection",
- },
- {
- .name = "options_lvdwarn",
- .usage = "<bank> <vdd | vdd_vddq>",
- .handler = str9xpec_handle_flash_options_lvdwarn_command,
- .mode = COMMAND_EXEC,
- .help = "configure str9xpec lvd warning",
- },
- {
- .name = "options_read",
- .usage = "<bank>",
- .handler = str9xpec_handle_flash_options_read_command,
- .mode = COMMAND_EXEC,
- .help = "read str9xpec options",
- },
- {
- .name = "options_write",
- .usage = "<bank>",
- .handler = str9xpec_handle_flash_options_write_command,
- .mode = COMMAND_EXEC,
- .help = "write str9xpec options",
- },
- {
- .name = "lock",
- .usage = "<bank>",
- .handler = str9xpec_handle_flash_lock_command,
- .mode = COMMAND_EXEC,
- .help = "lock str9xpec device",
- },
- {
- .name = "unlock",
- .usage = "<bank>",
- .handler = str9xpec_handle_flash_unlock_command,
- .mode = COMMAND_EXEC,
- .help = "unlock str9xpec device",
- },
- {
- .name = "part_id",
- .handler = str9xpec_handle_part_id_command,
- .mode = COMMAND_EXEC,
- .help = "print part id of str9xpec flash bank <num>",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration str9xpec_command_handlers[] = {
- {
- .name = "str9xpec",
- .mode = COMMAND_ANY,
- .help = "str9xpec flash command group",
- .usage = "",
- .chain = str9xpec_config_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver str9xpec_flash = {
- .name = "str9xpec",
- .commands = str9xpec_command_handlers,
- .flash_bank_command = str9xpec_flash_bank_command,
- .erase = str9xpec_erase,
- .protect = str9xpec_protect,
- .write = str9xpec_write,
- .read = default_flash_read,
- .probe = str9xpec_probe,
- .auto_probe = str9xpec_probe,
- .erase_check = str9xpec_erase_check,
- .protect_check = str9xpec_protect_check,
-};
[25/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/kinetis_ke.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/kinetis_ke.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/kinetis_ke.c
deleted file mode 100755
index 593443c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/kinetis_ke.c
+++ /dev/null
@@ -1,1311 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 by Ivan Meleca *
- * ivan@artekit.eu *
- * *
- * Modified from kinetis.c *
- * *
- * Copyright (C) 2011 by Mathias Kuester *
- * kesmtp@freenet.de *
- * *
- * Copyright (C) 2011 sleep(5) ltd *
- * tomas@sleepfive.com *
- * *
- * Copyright (C) 2012 by Christopher D. Kilgour *
- * techie at whiterocker.com *
- * *
- * Copyright (C) 2013 Nemui Trinomius *
- * nemuisan_kawausogasuki@live.jp *
- * *
- * Copyright (C) 2015 Tomas Vanek *
- * vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "jtag/interface.h"
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-#include <target/cortex_m.h>
-
-/* Addresses */
-#define SIM_SRSID 0x40048000
-#define ICS_C1 0x40064000
-#define ICS_C2 0x40064001
-#define ICS_C3 0x40064002
-#define ICS_C4 0x40064003
-#define ICS_S 0x40064004
-#define SIM_BUSDIV 0x40048018
-#define SIM_CLKDIV_KE06 0x40048024
-#define SIM_CLKDIV_KE04_44_64_80 0x40048024
-#define SIM_CLKDIV_KE04_16_20_24 0x4004801C
-#define WDOG_CS1 0x40052000
-
-#define ICS_C2_BDIV_MASK 0xE0
-#define ICS_C2_BDIV_SHIFT 5
-#define ICS_C2_BDIV(x) (((uint8_t)(((uint8_t)(x))<<ICS_C2_BDIV_SHIFT))&ICS_C2_BDIV_MASK)
-#define ICS_S_LOCK_MASK 0x40
-#define ICS_C4_SCFTRIM_MASK 0x1
-#define SIM_CLKDIV_OUTDIV2_MASK 0x1000000
-#define FTMRX_FCLKDIV_FDIV_MASK 0x3F
-#define FTMRX_FCLKDIV_FDIV_SHIFT 0
-#define FTMRX_FCLKDIV_FDIV(x) (((uint8_t)(((uint8_t)(x))<<FTMRX_FCLKDIV_FDIV_SHIFT))&FTMRX_FCLKDIV_FDIV_MASK)
-#define FTMRX_FCLKDIV_FDIVLCK_MASK 0x40
-#define FTMRX_FCLKDIV_FDIVLCK_SHIFT 6
-#define FTMRX_FCLKDIV_FDIVLD_MASK 0x80
-#define FTMRX_FCLKDIV_FDIVLD_SHIFT 7
-#define FTMRX_FSTAT_CCIF_MASK 0x80
-#define FTMRX_FSTAT_MGSTAT0_MASK 0x01
-#define FTMRX_FSTAT_MGSTAT1_MASK 0x02
-
-/* Commands */
-#define FTMRX_CMD_ALLERASED 0x01
-#define FTMRX_CMD_BLOCKERASED 0x02
-#define FTMRX_CMD_SECTIONERASED 0x03
-#define FTMRX_CMD_READONCE 0x04
-#define FTMRX_CMD_PROGFLASH 0x06
-#define FTMRX_CMD_PROGONCE 0x07
-#define FTMRX_CMD_ERASEALL 0x08
-#define FTMRX_CMD_ERASEBLOCK 0x09
-#define FTMRX_CMD_ERASESECTOR 0x0A
-#define FTMRX_CMD_UNSECURE 0x0B
-#define FTMRX_CMD_VERIFYACCESS 0x0C
-#define FTMRX_CMD_SETMARGINLVL 0x0D
-#define FTMRX_CMD_SETFACTORYLVL 0x0E
-#define FTMRX_CMD_CONFIGNVM 0x0F
-
-/* Error codes */
-#define FTMRX_ERROR_ACCERR 0x20
-#define FTMRX_ERROR_FPVIOL 0x10
-
-#define KINETIS_KE_SRSID_FAMID(x) ((x >> 28) & 0x0F)
-#define KINETIS_KE_SRSID_SUBFAMID(x) ((x >> 24) & 0x0F)
-#define KINETIS_KE_SRSID_PINCOUNT(x) ((x >> 16) & 0x0F)
-
-#define KINETIS_KE_SRSID_KEX2 0x02
-#define KINETIS_KE_SRSID_KEX4 0x04
-#define KINETIS_KE_SRSID_KEX6 0x06
-
-struct kinetis_ke_flash_bank {
- uint32_t sector_size;
- uint32_t protection_size;
-
- uint32_t sim_srsid;
- uint32_t ftmrx_fclkdiv_addr;
- uint32_t ftmrx_fccobix_addr;
- uint32_t ftmrx_fstat_addr;
- uint32_t ftmrx_fprot_addr;
- uint32_t ftmrx_fccobhi_addr;
- uint32_t ftmrx_fccoblo_addr;
-};
-
-#define MDM_REG_STAT 0x00
-#define MDM_REG_CTRL 0x04
-#define MDM_REG_ID 0xfc
-
-#define MDM_STAT_FMEACK (1<<0)
-#define MDM_STAT_FREADY (1<<1)
-#define MDM_STAT_SYSSEC (1<<2)
-#define MDM_STAT_SYSRES (1<<3)
-#define MDM_STAT_FMEEN (1<<5)
-#define MDM_STAT_BACKDOOREN (1<<6)
-#define MDM_STAT_LPEN (1<<7)
-#define MDM_STAT_VLPEN (1<<8)
-#define MDM_STAT_LLSMODEXIT (1<<9)
-#define MDM_STAT_VLLSXMODEXIT (1<<10)
-#define MDM_STAT_CORE_HALTED (1<<16)
-#define MDM_STAT_CORE_SLEEPDEEP (1<<17)
-#define MDM_STAT_CORESLEEPING (1<<18)
-
-#define MEM_CTRL_FMEIP (1<<0)
-#define MEM_CTRL_DBG_DIS (1<<1)
-#define MEM_CTRL_DBG_REQ (1<<2)
-#define MEM_CTRL_SYS_RES_REQ (1<<3)
-#define MEM_CTRL_CORE_HOLD_RES (1<<4)
-#define MEM_CTRL_VLLSX_DBG_REQ (1<<5)
-#define MEM_CTRL_VLLSX_DBG_ACK (1<<6)
-#define MEM_CTRL_VLLSX_STAT_ACK (1<<7)
-
-#define MDM_ACCESS_TIMEOUT 3000 /* iterations */
-
-static int kinetis_ke_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
-{
- int retval;
- LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
-
- retval = dap_queue_ap_write(dap_ap(dap, 1), reg, value);
- if (retval != ERROR_OK) {
- LOG_DEBUG("MDM: failed to queue a write request");
- return retval;
- }
-
- retval = dap_run(dap);
- if (retval != ERROR_OK) {
- LOG_DEBUG("MDM: dap_run failed");
- return retval;
- }
-
- return ERROR_OK;
-}
-
-static int kinetis_ke_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
-{
- int retval;
- retval = dap_queue_ap_read(dap_ap(dap, 1), reg, result);
- if (retval != ERROR_OK) {
- LOG_DEBUG("MDM: failed to queue a read request");
- return retval;
- }
-
- retval = dap_run(dap);
- if (retval != ERROR_OK) {
- LOG_DEBUG("MDM: dap_run failed");
- return retval;
- }
-
- LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32, reg, *result);
- return ERROR_OK;
-}
-
-static int kinetis_ke_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value)
-{
- uint32_t val;
- int retval;
- int timeout = MDM_ACCESS_TIMEOUT;
-
- do {
- retval = kinetis_ke_mdm_read_register(dap, reg, &val);
- if (retval != ERROR_OK || (val & mask) == value)
- return retval;
-
- alive_sleep(1);
- } while (timeout--);
-
- LOG_DEBUG("MDM: polling timed out");
- return ERROR_FAIL;
-}
-
-static int kinetis_ke_prepare_flash(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct kinetis_ke_flash_bank *kinfo = bank->driver_priv;
- uint8_t c2, c3, c4, s = 0;
- uint16_t trim_value = 0;
- uint16_t timeout = 0;
- uint32_t bus_clock = 0;
- uint32_t bus_reg_val = 0;
- uint32_t bus_reg_addr = 0;
- uint32_t flash_clk_div;
- uint8_t fclkdiv;
- int result;
-
- /*
- * The RM states that the flash clock has to be set to 1MHz for writing and
- * erasing operations (otherwise it can damage the flash).
- * This function configures the entire clock tree to make sure we
- * run at the specified clock. We'll set FEI mode running from the ~32KHz
- * internal clock. So we need to:
- * - Trim internal clock.
- * - Configure the divider for ICSOUTCLK (ICS module).
- * - Configure the divider to get a bus clock (SIM module).
- * - Configure the flash clock that depends on the bus clock.
- *
- * For MKE02_40 and MKE02_20 we set ICSOUTCLK = 20MHz and bus clock = 20MHz.
- * For MKE04 and MKE06 we run at ICSOUTCLK = 48MHz and bus clock = 24MHz.
- */
-
- /*
- * Trim internal clock
- */
- switch (KINETIS_KE_SRSID_SUBFAMID(kinfo->sim_srsid)) {
-
- case KINETIS_KE_SRSID_KEX2:
- /* Both KE02_20 and KE02_40 should get the same trim value */
- trim_value = 0x4C;
- break;
-
- case KINETIS_KE_SRSID_KEX4:
- trim_value = 0x54;
- break;
-
- case KINETIS_KE_SRSID_KEX6:
- trim_value = 0x58;
- break;
- }
-
- result = target_read_u8(target, ICS_C4, &c4);
- if (result != ERROR_OK)
- return result;
-
- c3 = trim_value;
- c4 = (c4 & ~(ICS_C4_SCFTRIM_MASK)) | ((trim_value >> 8) & 0x01);
-
- result = target_write_u8(target, ICS_C3, c3);
- if (result != ERROR_OK)
- return result;
-
- result = target_write_u8(target, ICS_C4, c4);
- if (result != ERROR_OK)
- return result;
-
- result = target_read_u8(target, ICS_S, &s);
- if (result != ERROR_OK)
- return result;
-
- /* Wait */
- while (!(s & ICS_S_LOCK_MASK)) {
-
- if (timeout <= 1000) {
- timeout++;
- alive_sleep(1);
- } else {
- return ERROR_FAIL;
- }
-
- result = target_read_u8(target, ICS_S, &s);
- if (result != ERROR_OK)
- return result;
- }
-
- /* ... trim done ... */
-
- /*
- * Configure SIM (bus clock)
- */
- switch (KINETIS_KE_SRSID_SUBFAMID(kinfo->sim_srsid)) {
-
- /* KE02 sub-family operates on SIM_BUSDIV */
- case KINETIS_KE_SRSID_KEX2:
- bus_reg_val = 0;
- bus_reg_addr = SIM_BUSDIV;
- bus_clock = 20000000;
- break;
-
- /* KE04 and KE06 sub-family operates on SIM_CLKDIV
- * Clocks are divided by:
- * DIV1 = core clock = 48MHz
- * DIV2 = bus clock = 24Mhz
- * DIV3 = timer clocks
- * So we need to configure SIM_CLKDIV, DIV1 and DIV2 value
- */
- case KINETIS_KE_SRSID_KEX4:
- /* KE04 devices have the SIM_CLKDIV register at a different offset
- * depending on the pin count. */
- switch (KINETIS_KE_SRSID_PINCOUNT(kinfo->sim_srsid)) {
-
- /* 16, 20 and 24 pins */
- case 1:
- case 2:
- case 3:
- bus_reg_addr = SIM_CLKDIV_KE04_16_20_24;
- break;
-
- /* 44, 64 and 80 pins */
- case 5:
- case 7:
- case 8:
- bus_reg_addr = SIM_CLKDIV_KE04_44_64_80;
- break;
-
- default:
- LOG_ERROR("KE04 - Unknown pin count");
- return ERROR_FAIL;
- }
-
- bus_reg_val = SIM_CLKDIV_OUTDIV2_MASK;
- bus_clock = 24000000;
- break;
-
- case KINETIS_KE_SRSID_KEX6:
- bus_reg_val = SIM_CLKDIV_OUTDIV2_MASK;
- bus_reg_addr = SIM_CLKDIV_KE06;
- bus_clock = 24000000;
- break;
- }
-
- result = target_write_u32(target, bus_reg_addr, bus_reg_val);
- if (result != ERROR_OK)
- return result;
-
- /*
- * Configure ICS to FEI (internal source)
- */
- result = target_read_u8(target, ICS_C2, &c2);
- if (result != ERROR_OK)
- return result;
-
- c2 &= ~ICS_C2_BDIV_MASK;
-
- switch (KINETIS_KE_SRSID_SUBFAMID(kinfo->sim_srsid)) {
-
- case KINETIS_KE_SRSID_KEX2:
- /* Note: since there are two KE02 types, the KE02_40 @ 40MHz and the
- * KE02_20 @ 20MHz, we divide here the ~40MHz ICSFLLCLK down to 20MHz,
- * for compatibility.
- */
- c2 |= ICS_C2_BDIV(1);
- break;
-
- case KINETIS_KE_SRSID_KEX4:
- case KINETIS_KE_SRSID_KEX6:
- /* For KE04 and KE06, the ICSFLLCLK can be 48MHz. */
- c2 |= ICS_C2_BDIV(0);
- break;
- }
-
- result = target_write_u8(target, ICS_C2, c2);
- if (result != ERROR_OK)
- return result;
-
- /* Internal clock as reference (IREFS = 1) */
- result = target_write_u8(target, ICS_C1, 4);
- if (result != ERROR_OK)
- return result;
-
- /* Wait for FLL to lock */
- result = target_read_u8(target, ICS_S, &s);
- if (result != ERROR_OK)
- return result;
-
- while (!(s & ICS_S_LOCK_MASK)) {
-
- if (timeout <= 1000) {
- timeout++;
- alive_sleep(1);
- } else {
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- result = target_read_u8(target, ICS_S, &s);
- if (result != ERROR_OK)
- return result;
- }
-
- /*
- * Configure flash clock to 1MHz.
- */
- flash_clk_div = bus_clock / 1000000L - 1;
-
- /* Check if the FCLKDIV register is locked */
- result = target_read_u8(target, kinfo->ftmrx_fclkdiv_addr, &fclkdiv);
- if (result != ERROR_OK)
- return result;
-
- if (!(fclkdiv & FTMRX_FCLKDIV_FDIVLCK_MASK)) {
- /* Unlocked. Check if the register was configured, and if so, if it has the right value */
- if ((fclkdiv & FTMRX_FCLKDIV_FDIVLD_MASK) &&
- ((fclkdiv & FTMRX_FCLKDIV_FDIV_MASK) != FTMRX_FCLKDIV_FDIV(flash_clk_div))) {
- LOG_WARNING("Flash clock was already set and contains an invalid value.");
- LOG_WARNING("Please reset the target.");
- return ERROR_FAIL;
- }
-
- /* Finally, configure the flash clock */
- fclkdiv = (fclkdiv & ~(FTMRX_FCLKDIV_FDIV_MASK)) | FTMRX_FCLKDIV_FDIV(flash_clk_div);
- result = target_write_u8(target, kinfo->ftmrx_fclkdiv_addr, fclkdiv);
- if (result != ERROR_OK)
- return result;
- } else {
- /* Locked. Check if the current value is correct. */
- if ((fclkdiv & FTMRX_FCLKDIV_FDIV_MASK) != FTMRX_FCLKDIV_FDIV(flash_clk_div)) {
- LOG_WARNING("Flash clock register is locked and contains an invalid value.");
- LOG_WARNING("Please reset the target.");
- return ERROR_FAIL;
- }
- }
-
- LOG_INFO("Flash clock ready");
- return ERROR_OK;
-}
-
-int kinetis_ke_stop_watchdog(struct target *target)
-{
- struct working_area *watchdog_algorithm;
- struct armv7m_algorithm armv7m_info;
- int retval;
- uint8_t cs1;
-
- static const uint8_t watchdog_code[] = {
-#include "../../../contrib/loaders/flash/kinetis_ke/kinetis_ke_watchdog.inc"
- };
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Check if the watchdog is enabled */
- retval = target_read_u8(target, WDOG_CS1, &cs1);
- if (retval != ERROR_OK)
- return retval;
-
- if (!(cs1 & 0x80)) {
- /* Already stopped */
- return ERROR_OK;
- }
-
- /* allocate working area with watchdog code */
- if (target_alloc_working_area(target, sizeof(watchdog_code), &watchdog_algorithm) != ERROR_OK) {
- LOG_WARNING("No working area available for watchdog algorithm");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, watchdog_algorithm->address,
- sizeof(watchdog_code), watchdog_code);
- if (retval != ERROR_OK)
- return retval;
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- retval = target_run_algorithm(target, 0, NULL, 0, NULL,
- watchdog_algorithm->address, 0, 100000, &armv7m_info);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing Kinetis KE watchdog algorithm");
- retval = ERROR_FAIL;
- } else {
- LOG_INFO("Watchdog stopped");
- }
-
- target_free_working_area(target, watchdog_algorithm);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(kinetis_ke_disable_wdog_handler)
-{
- struct target *target = get_current_target(CMD_CTX);
-
- if (CMD_ARGC > 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- return kinetis_ke_stop_watchdog(target);
-}
-
-COMMAND_HANDLER(kinetis_ke_mdm_mass_erase)
-{
- struct target *target = get_current_target(CMD_CTX);
- struct cortex_m_common *cortex_m = target_to_cm(target);
- struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
-
- if (!dap) {
- LOG_ERROR("Cannot perform mass erase with a high-level adapter");
- return ERROR_FAIL;
- }
-
- int retval;
-
- /* According to chapter 18.3.7.2 of the KE02 reference manual */
-
- /* assert SRST */
- if (jtag_get_reset_config() & RESET_HAS_SRST)
- adapter_assert_reset();
-
- /*
- * 1. Reset the device by asserting RESET pin or DAP_CTRL[3]
- */
- retval = kinetis_ke_mdm_write_register(dap, MDM_REG_CTRL, MEM_CTRL_SYS_RES_REQ);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * ... Read the MDM-AP status register until the Flash Ready bit sets...
- */
- retval = kinetis_ke_mdm_poll_register(dap, MDM_REG_STAT,
- MDM_STAT_FREADY | MDM_STAT_SYSRES,
- MDM_STAT_FREADY);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM : flash ready timeout");
- return retval;
- }
-
- /*
- * 2. Set DAP_CTRL[0] bit to invoke debug mass erase via SWD
- * 3. Release reset by deasserting RESET pin or DAP_CTRL[3] bit via SWD.
- */
- retval = kinetis_ke_mdm_write_register(dap, MDM_REG_CTRL, MEM_CTRL_FMEIP);
- if (retval != ERROR_OK)
- return retval;
-
- /* As a sanity check make sure that device started mass erase procedure */
- retval = kinetis_ke_mdm_poll_register(dap, MDM_REG_STAT,
- MDM_STAT_FMEACK, MDM_STAT_FMEACK);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * 4. Wait till DAP_CTRL[0] bit is cleared (after mass erase completes,
- * DAP_CTRL[0] bit is cleared automatically).
- */
- retval = kinetis_ke_mdm_poll_register(dap, MDM_REG_CTRL,
- MEM_CTRL_FMEIP,
- 0);
- if (retval != ERROR_OK)
- return retval;
-
- if (jtag_get_reset_config() & RESET_HAS_SRST)
- adapter_deassert_reset();
-
- return ERROR_OK;
-}
-
-static const uint32_t kinetis_ke_known_mdm_ids[] = {
- 0x001C0020, /* Kinetis-L/M/V/E/KE Series */
-};
-
-/*
- * This function implements the procedure to connect to
- * SWD/JTAG on Kinetis K and L series of devices as it is described in
- * AN4835 "Production Flash Programming Best Practices for Kinetis K-
- * and L-series MCUs" Section 4.1.1
- */
-COMMAND_HANDLER(kinetis_ke_check_flash_security_status)
-{
- struct target *target = get_current_target(CMD_CTX);
- struct cortex_m_common *cortex_m = target_to_cm(target);
- struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
-
- if (!dap) {
- LOG_WARNING("Cannot check flash security status with a high-level adapter");
- return ERROR_OK;
- }
-
- uint32_t val;
- int retval;
-
- /*
- * ... The MDM-AP ID register can be read to verify that the
- * connection is working correctly...
- */
- retval = kinetis_ke_mdm_read_register(dap, MDM_REG_ID, &val);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM: failed to read ID register");
- goto fail;
- }
-
- bool found = false;
- for (size_t i = 0; i < ARRAY_SIZE(kinetis_ke_known_mdm_ids); i++) {
- if (val == kinetis_ke_known_mdm_ids[i]) {
- found = true;
- break;
- }
- }
-
- if (!found)
- LOG_WARNING("MDM: unknown ID %08" PRIX32, val);
-
- /*
- * ... Read the MDM-AP status register until the Flash Ready bit sets...
- */
- retval = kinetis_ke_mdm_poll_register(dap, MDM_REG_STAT,
- MDM_STAT_FREADY,
- MDM_STAT_FREADY);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM: flash ready timeout");
- goto fail;
- }
-
- /*
- * ... Read the System Security bit to determine if security is enabled.
- * If System Security = 0, then proceed. If System Security = 1, then
- * communication with the internals of the processor, including the
- * flash, will not be possible without issuing a mass erase command or
- * unsecuring the part through other means (backdoor key unlock)...
- */
- retval = kinetis_ke_mdm_read_register(dap, MDM_REG_STAT, &val);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM: failed to read MDM_REG_STAT");
- goto fail;
- }
-
- if (val & MDM_STAT_SYSSEC) {
- jtag_poll_set_enabled(false);
-
- LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
- LOG_WARNING("**** ****");
- LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that, ****");
- LOG_WARNING("**** with exception for very basic communication, JTAG/SWD ****");
- LOG_WARNING("**** interface will NOT work. In order to restore its ****");
- LOG_WARNING("**** functionality please issue 'kinetis_ke mdm mass_erase' ****");
- LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD. ****");
- LOG_WARNING("**** ****");
- LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
- } else {
- LOG_INFO("MDM: Chip is unsecured. Continuing.");
- jtag_poll_set_enabled(true);
- }
-
- return ERROR_OK;
-
-fail:
- LOG_ERROR("MDM: Failed to check security status of the MCU. Cannot proceed further");
- jtag_poll_set_enabled(false);
- return retval;
-}
-
-FLASH_BANK_COMMAND_HANDLER(kinetis_ke_flash_bank_command)
-{
- struct kinetis_ke_flash_bank *bank_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- LOG_INFO("add flash_bank kinetis_ke %s", bank->name);
-
- bank_info = malloc(sizeof(struct kinetis_ke_flash_bank));
-
- memset(bank_info, 0, sizeof(struct kinetis_ke_flash_bank));
-
- bank->driver_priv = bank_info;
-
- return ERROR_OK;
-}
-
-/* Kinetis Program-LongWord Microcodes */
-static uint8_t kinetis_ke_flash_write_code[] = {
-#include "../../../contrib/loaders/flash/kinetis_ke/kinetis_ke_flash.inc"
-};
-
-static int kinetis_ke_write_words(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t words)
-{
- struct kinetis_ke_flash_bank *kinfo = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t ram_buffer_size = 512 + 16;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[4];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
- uint32_t flash_code_size;
-
- LOG_INFO("Kinetis KE: FLASH Write ...");
-
- /* allocate working area with flash programming code */
- if (target_alloc_working_area(target, sizeof(kinetis_ke_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* Patch the FTMRx registers addresses */
- flash_code_size = sizeof(kinetis_ke_flash_write_code);
- buf_set_u32(&kinetis_ke_flash_write_code[flash_code_size-16], 0, 32, kinfo->ftmrx_fstat_addr);
- buf_set_u32(&kinetis_ke_flash_write_code[flash_code_size-12], 0, 32, kinfo->ftmrx_fccobix_addr);
- buf_set_u32(&kinetis_ke_flash_write_code[flash_code_size-8], 0, 32, kinfo->ftmrx_fccobhi_addr);
- buf_set_u32(&kinetis_ke_flash_write_code[flash_code_size-4], 0, 32, kinfo->ftmrx_fccoblo_addr);
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(kinetis_ke_flash_write_code), kinetis_ke_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- if (target_alloc_working_area(target, ram_buffer_size, &source) != ERROR_OK) {
- /* free working area, write algorithm already allocated */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("No large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
-
- buf_set_u32(reg_params[0].value, 0, 32, address);
- buf_set_u32(reg_params[1].value, 0, 32, words);
- buf_set_u32(reg_params[2].value, 0, 32, source->address);
- buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size);
-
- retval = target_run_flash_async_algorithm(target, buffer, words, 4,
- 0, NULL,
- 4, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- if (retval == ERROR_FLASH_OPERATION_FAILED) {
- if (buf_get_u32(reg_params[0].value, 0, 32) & FTMRX_ERROR_ACCERR)
- LOG_ERROR("flash access error");
-
- if (buf_get_u32(reg_params[0].value, 0, 32) & FTMRX_ERROR_FPVIOL)
- LOG_ERROR("flash protection violation");
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
-
- return retval;
-}
-
-static int kinetis_ke_protect(struct flash_bank *bank, int set, int first, int last)
-{
- LOG_WARNING("kinetis_ke_protect not supported yet");
- /* FIXME: TODO */
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- return ERROR_FLASH_BANK_INVALID;
-}
-
-static int kinetis_ke_protect_check(struct flash_bank *bank)
-{
- struct kinetis_ke_flash_bank *kinfo = bank->driver_priv;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int result;
- uint8_t fprot;
- uint8_t fpopen, fpldis, fphdis;
- uint8_t fphs, fpls;
- uint32_t lprot_size = 0, hprot_size = 0;
- uint32_t lprot_to = 0, hprot_from = 0;
-
- /* read protection register */
- result = target_read_u8(bank->target, kinfo->ftmrx_fprot_addr, &fprot);
-
- if (result != ERROR_OK)
- return result;
-
- fpopen = fprot & 0x80;
- fpldis = fprot & 0x04;
- fphdis = fprot & 0x20;
- fphs = (fprot >> 3) & 0x03;
- fpls = fprot & 0x03;
-
- /* Fully unprotected? */
- if (fpopen && fpldis && fphdis) {
- LOG_WARNING("No flash protection found.");
-
- for (uint32_t i = 0; i < (uint32_t) bank->num_sectors; i++)
- bank->sectors[i].is_protected = 0;
-
- kinfo->protection_size = 0;
- } else {
- LOG_WARNING("Flash protected. FPOPEN=%i FPLDIS=%i FPHDIS=%i FPLS=%i FPHS=%i", \
- fpopen ? 1 : 0, fpldis ? 1 : 0, fphdis ? 1 : 0, fpls, fphs);
-
- /* Retrieve which region is protected and how much */
- if (fpopen) {
- if (fpldis == 0)
- lprot_size = (kinfo->sector_size * 4) << fpls;
-
- if (fphdis == 0)
- hprot_size = (kinfo->sector_size * 2) << fphs;
- } else {
- if (fpldis == 1)
- lprot_size = (kinfo->sector_size * 4) << fpls;
-
- if (fphdis == 1)
- hprot_size = (kinfo->sector_size * 2) << fphs;
- }
-
- kinfo->protection_size = lprot_size + hprot_size;
-
- /* lprot_to indicates up to where the lower region is protected */
- lprot_to = lprot_size / kinfo->sector_size;
-
- /* hprot_from indicates from where the upper region is protected */
- hprot_from = (0x8000 - hprot_size) / kinfo->sector_size;
-
- for (uint32_t i = 0; i < (uint32_t) bank->num_sectors; i++) {
-
- /* Check if the sector is in the lower region */
- if (bank->sectors[i].offset < 0x4000) {
- /* Compare the sector start address against lprot_to */
- if (lprot_to && (i < lprot_to))
- bank->sectors[i].is_protected = 1;
- else
- bank->sectors[i].is_protected = 0;
-
- /* Check if the sector is between the lower and upper region
- * OR after the upper region */
- } else if (bank->sectors[i].offset < 0x6000 || bank->sectors[i].offset >= 0x8000) {
- /* If fpopen is 1 then these regions are protected */
- if (fpopen)
- bank->sectors[i].is_protected = 0;
- else
- bank->sectors[i].is_protected = 1;
-
- /* Check if the sector is in the upper region */
- } else if (bank->sectors[i].offset < 0x8000) {
- if (hprot_from && (i > hprot_from))
- bank->sectors[i].is_protected = 1;
- else
- bank->sectors[i].is_protected = 0;
- }
- }
- }
-
- return ERROR_OK;
-}
-
-static int kinetis_ke_ftmrx_command(struct flash_bank *bank, uint8_t count,
- uint8_t *FCCOBIX, uint8_t *FCCOBHI, uint8_t *FCCOBLO, uint8_t *fstat)
-{
- uint8_t i;
- int result;
- struct target *target = bank->target;
- struct kinetis_ke_flash_bank *kinfo = bank->driver_priv;
- uint32_t timeout = 0;
-
- /* Clear error flags */
- result = target_write_u8(target, kinfo->ftmrx_fstat_addr, 0x30);
- if (result != ERROR_OK)
- return result;
-
- for (i = 0; i < count; i++) {
- /* Write index */
- result = target_write_u8(target, kinfo->ftmrx_fccobix_addr, FCCOBIX[i]);
- if (result != ERROR_OK)
- return result;
-
- /* Write high part */
- result = target_write_u8(target, kinfo->ftmrx_fccobhi_addr, FCCOBHI[i]);
- if (result != ERROR_OK)
- return result;
-
- /* Write low part (that is not always required) */
- if (FCCOBLO) {
- result = target_write_u8(target, kinfo->ftmrx_fccoblo_addr, FCCOBLO[i]);
- if (result != ERROR_OK)
- return result;
- }
- }
-
- /* Launch the command */
- result = target_write_u8(target, kinfo->ftmrx_fstat_addr, 0x80);
- if (result != ERROR_OK)
- return result;
-
- /* Wait for it to finish */
- result = target_read_u8(target, kinfo->ftmrx_fstat_addr, fstat);
- if (result != ERROR_OK)
- return result;
-
- while (!(*fstat & FTMRX_FSTAT_CCIF_MASK)) {
- if (timeout <= 1000) {
- timeout++;
- alive_sleep(1);
- } else {
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- result = target_read_u8(target, kinfo->ftmrx_fstat_addr, fstat);
- if (result != ERROR_OK)
- return result;
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(kinetis_ke_securing_test)
-{
- int result;
- struct target *target = get_current_target(CMD_CTX);
- struct flash_bank *bank = NULL;
- uint32_t address;
-
- uint8_t FCCOBIX[2], FCCOBHI[2], FCCOBLO[2], fstat;
-
- result = get_flash_bank_by_addr(target, 0x00000000, true, &bank);
- if (result != ERROR_OK)
- return result;
-
- assert(bank != NULL);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- address = bank->base + 0x00000400;
-
- FCCOBIX[0] = 0;
- FCCOBHI[0] = FTMRX_CMD_ERASESECTOR;
- FCCOBLO[0] = address >> 16;
-
- FCCOBIX[1] = 1;
- FCCOBHI[1] = address >> 8;
- FCCOBLO[1] = address;
-
- return kinetis_ke_ftmrx_command(bank, 2, FCCOBIX, FCCOBHI, FCCOBLO, &fstat);
-}
-
-static int kinetis_ke_erase(struct flash_bank *bank, int first, int last)
-{
- int result, i;
- uint8_t FCCOBIX[2], FCCOBHI[2], FCCOBLO[2], fstat;
- bool fcf_erased = false;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first > bank->num_sectors) || (last > bank->num_sectors))
- return ERROR_FLASH_OPERATION_FAILED;
-
- result = kinetis_ke_prepare_flash(bank);
- if (result != ERROR_OK)
- return result;
-
- for (i = first; i <= last; i++) {
- FCCOBIX[0] = 0;
- FCCOBHI[0] = FTMRX_CMD_ERASESECTOR;
- FCCOBLO[0] = (bank->base + bank->sectors[i].offset) >> 16;
-
- FCCOBIX[1] = 1;
- FCCOBHI[1] = (bank->base + bank->sectors[i].offset) >> 8;
- FCCOBLO[1] = (bank->base + bank->sectors[i].offset);
-
- result = kinetis_ke_ftmrx_command(bank, 2, FCCOBIX, FCCOBHI, FCCOBLO, &fstat);
-
- if (result != ERROR_OK) {
- LOG_WARNING("erase sector %d failed", i);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- bank->sectors[i].is_erased = 1;
-
- if (i == 2)
- fcf_erased = true;
- }
-
- if (fcf_erased) {
- LOG_WARNING
- ("flash configuration field erased, please reset the device");
- }
-
- return ERROR_OK;
-}
-
-static int kinetis_ke_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- int result;
- uint8_t *new_buffer = NULL;
- uint32_t words = count / 4;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset > bank->size)
- return ERROR_FLASH_BANK_INVALID;
-
- if (offset & 0x3) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks the required alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- result = kinetis_ke_stop_watchdog(bank->target);
- if (result != ERROR_OK)
- return result;
-
- result = kinetis_ke_prepare_flash(bank);
- if (result != ERROR_OK)
- return result;
-
- if (count & 0x3) {
- uint32_t old_count = count;
- count = (old_count | 3) + 1;
- new_buffer = malloc(count);
- if (new_buffer == NULL) {
- LOG_ERROR("odd number of bytes to write and no memory "
- "for padding buffer");
- return ERROR_FAIL;
- }
-
- LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " "
- "and padding with 0xff", old_count, count);
-
- memset(new_buffer, 0xff, count);
- buffer = memcpy(new_buffer, buffer, old_count);
- words++;
- }
-
- result = kinetis_ke_write_words(bank, buffer, offset, words);
- free(new_buffer);
-
- return result;
-}
-
-static int kinetis_ke_probe(struct flash_bank *bank)
-{
- int result, i;
- uint32_t offset = 0;
- struct target *target = bank->target;
- struct kinetis_ke_flash_bank *kinfo = bank->driver_priv;
-
- result = target_read_u32(target, SIM_SRSID, &kinfo->sim_srsid);
- if (result != ERROR_OK)
- return result;
-
- if (KINETIS_KE_SRSID_FAMID(kinfo->sim_srsid) != 0x00) {
- LOG_ERROR("Unsupported KE family");
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
-
- switch (KINETIS_KE_SRSID_SUBFAMID(kinfo->sim_srsid)) {
- case KINETIS_KE_SRSID_KEX2:
- LOG_INFO("KE02 sub-family");
- break;
-
- case KINETIS_KE_SRSID_KEX4:
- LOG_INFO("KE04 sub-family");
- break;
-
- case KINETIS_KE_SRSID_KEX6:
- LOG_INFO("KE06 sub-family");
- break;
-
- default:
- LOG_ERROR("Unsupported KE sub-family");
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
-
- /* We can only retrieve the ke0x part, but there is no way to know
- * the flash size, so assume the maximum flash size for the entire
- * sub family.
- */
- bank->base = 0x00000000;
- kinfo->sector_size = 512;
-
- switch (KINETIS_KE_SRSID_SUBFAMID(kinfo->sim_srsid)) {
-
- case KINETIS_KE_SRSID_KEX2:
- /* Max. 64KB */
- bank->size = 0x00010000;
- bank->num_sectors = 128;
-
- /* KE02 uses the FTMRH flash controller,
- * and registers have a different offset from the
- * FTMRE flash controller. Sort this out here.
- */
- kinfo->ftmrx_fclkdiv_addr = 0x40020000;
- kinfo->ftmrx_fccobix_addr = 0x40020002;
- kinfo->ftmrx_fstat_addr = 0x40020006;
- kinfo->ftmrx_fprot_addr = 0x40020008;
- kinfo->ftmrx_fccobhi_addr = 0x4002000A;
- kinfo->ftmrx_fccoblo_addr = 0x4002000B;
- break;
-
- case KINETIS_KE_SRSID_KEX6:
- case KINETIS_KE_SRSID_KEX4:
- /* Max. 128KB */
- bank->size = 0x00020000;
- bank->num_sectors = 256;
-
- /* KE04 and KE06 use the FTMRE flash controller,
- * and registers have a different offset from the
- * FTMRH flash controller. Sort this out here.
- */
- kinfo->ftmrx_fclkdiv_addr = 0x40020003;
- kinfo->ftmrx_fccobix_addr = 0x40020001;
- kinfo->ftmrx_fstat_addr = 0x40020005;
- kinfo->ftmrx_fprot_addr = 0x4002000B;
- kinfo->ftmrx_fccobhi_addr = 0x40020009;
- kinfo->ftmrx_fccoblo_addr = 0x40020008;
- break;
- }
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- assert(bank->num_sectors > 0);
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = kinfo->sector_size;
- offset += kinfo->sector_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- return ERROR_OK;
-}
-
-static int kinetis_ke_auto_probe(struct flash_bank *bank)
-{
- struct kinetis_ke_flash_bank *kinfo = bank->driver_priv;
-
- if (kinfo->sim_srsid)
- return ERROR_OK;
-
- return kinetis_ke_probe(bank);
-}
-
-static int kinetis_ke_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- (void) snprintf(buf, buf_size,
- "%s driver for flash bank %s at 0x%8.8" PRIx32 "",
- bank->driver->name, bank->name, bank->base);
-
- return ERROR_OK;
-}
-
-static int kinetis_ke_blank_check(struct flash_bank *bank)
-{
- uint8_t FCCOBIX[3], FCCOBHI[3], FCCOBLO[3], fstat;
- uint16_t longwords = 0;
- int result;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- result = kinetis_ke_prepare_flash(bank);
- if (result != ERROR_OK)
- return result;
-
- /* check if whole bank is blank */
- FCCOBIX[0] = 0;
- FCCOBHI[0] = FTMRX_CMD_ALLERASED;
-
- result = kinetis_ke_ftmrx_command(bank, 1, FCCOBIX, FCCOBHI, NULL, &fstat);
-
- if (result != ERROR_OK)
- return result;
-
- if (fstat & (FTMRX_FSTAT_MGSTAT0_MASK | FTMRX_FSTAT_MGSTAT1_MASK)) {
- /* the whole bank is not erased, check sector-by-sector */
- int i;
-
- for (i = 0; i < bank->num_sectors; i++) {
- FCCOBIX[0] = 0;
- FCCOBHI[0] = FTMRX_CMD_SECTIONERASED;
- FCCOBLO[0] = (bank->base + bank->sectors[i].offset) >> 16;
-
- FCCOBIX[1] = 1;
- FCCOBHI[1] = (bank->base + bank->sectors[i].offset) >> 8;
- FCCOBLO[1] = (bank->base + bank->sectors[i].offset);
-
- longwords = 128;
-
- FCCOBIX[2] = 2;
- FCCOBHI[2] = longwords >> 8;
- FCCOBLO[2] = longwords;
-
- result = kinetis_ke_ftmrx_command(bank, 3, FCCOBIX, FCCOBHI, FCCOBLO, &fstat);
-
- if (result == ERROR_OK) {
- bank->sectors[i].is_erased = !(fstat & (FTMRX_FSTAT_MGSTAT0_MASK | FTMRX_FSTAT_MGSTAT1_MASK));
- } else {
- LOG_DEBUG("Ignoring errored PFlash sector blank-check");
- bank->sectors[i].is_erased = -1;
- }
- }
- } else {
- /* the whole bank is erased, update all sectors */
- int i;
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
- }
-
- return ERROR_OK;
-}
-
-static const struct command_registration kinetis_ke_security_command_handlers[] = {
- {
- .name = "check_security",
- .mode = COMMAND_EXEC,
- .help = "",
- .usage = "",
- .handler = kinetis_ke_check_flash_security_status,
- },
- {
- .name = "mass_erase",
- .mode = COMMAND_EXEC,
- .help = "",
- .usage = "",
- .handler = kinetis_ke_mdm_mass_erase,
- },
- {
- .name = "test_securing",
- .mode = COMMAND_EXEC,
- .help = "",
- .usage = "",
- .handler = kinetis_ke_securing_test,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration kinetis_ke_exec_command_handlers[] = {
- {
- .name = "mdm",
- .mode = COMMAND_ANY,
- .help = "",
- .usage = "",
- .chain = kinetis_ke_security_command_handlers,
- },
- {
- .name = "disable_wdog",
- .mode = COMMAND_EXEC,
- .help = "Disable the watchdog timer",
- .usage = "",
- .handler = kinetis_ke_disable_wdog_handler,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration kinetis_ke_command_handler[] = {
- {
- .name = "kinetis_ke",
- .mode = COMMAND_ANY,
- .help = "Kinetis KE NAND flash controller commands",
- .usage = "",
- .chain = kinetis_ke_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver kinetis_ke_flash = {
- .name = "kinetis_ke",
- .commands = kinetis_ke_command_handler,
- .flash_bank_command = kinetis_ke_flash_bank_command,
- .erase = kinetis_ke_erase,
- .protect = kinetis_ke_protect,
- .write = kinetis_ke_write,
- .read = default_flash_read,
- .probe = kinetis_ke_probe,
- .auto_probe = kinetis_ke_auto_probe,
- .erase_check = kinetis_ke_blank_check,
- .protect_check = kinetis_ke_protect_check,
- .info = kinetis_ke_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc2000.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc2000.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc2000.c
deleted file mode 100755
index cc10a3b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc2000.c
+++ /dev/null
@@ -1,1575 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * LPC1700 support Copyright (C) 2009 by Audrius Urmanavicius *
- * didele.deze@gmail.com *
- * *
- * LPC1100 variant and auto-probing support Copyright (C) 2014 *
- * by Cosmin Gorgovan cosmin [at] linux-geek [dot] org *
- * *
- * LPC800/LPC1500/LPC54100 support Copyright (C) 2013/2014 *
- * by Nemui Trinomius *
- * nemuisan_kawausogasuki@live.jp *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/arm_opcodes.h>
-#include <target/armv7m.h>
-
-/**
- * @file
- * flash programming support for NXP LPC8xx,LPC1xxx,LPC4xxx,LP5410x and LPC2xxx devices.
- *
- * @todo Provide a way to update CCLK after declaring the flash bank. The value which is correct after chip reset will
- * rarely still work right after the clocks switch to use the PLL (e.g. 4MHz --> 100 MHz).
- */
-/*
- * currently supported devices:
- * variant 1 (lpc2000_v1):
- * - 2104 | 5 | 6
- * - 2114 | 9
- * - 2124 | 9
- * - 2194
- * - 2212 | 4
- * - 2292 | 4
- *
- * variant 2 (lpc2000_v2):
- * - 213x
- * - 214x
- * - 2101 | 2 | 3
- * - 2364 | 6 | 8
- * - 2378
- *
- * lpc1700:
- * - 175x
- * - 176x (tested with LPC1768)
- * - 177x
- * - 178x (tested with LPC1788)
- *
- * lpc4000: (lpc1700's alias)
- * - 407x
- * - 408x (tested with LPC4088)
- *
- * lpc4300: (also available as lpc1800 - alias)
- * - 43x2 | 3 | 5 | 7 (tested with LPC4337/LPC4357)
- * - 18x2 | 3 | 5 | 7
- *
- * lpc800:
- * - 810 | 1 | 2 (tested with LPC810/LPC811/LPC812)
- * - 822 | 4 (tested with LPC824)
- *
- * lpc1100:
- * - 11xx
- * - 11Axx
- * - 11Cxx
- * - 11Dxx
- * - 11Exx
- * - 11Uxx (tested with LPC11U34)
- * - 131x
- * - 134x
- *
- * lpc1500:
- * - 15x7 | 8 | 9 (tested with LPC1549)
- *
- * lpc54100:
- * - 54101 | 2 (tested with LPC54102)
- *
- * The auto variant auto-detects parts from the following series:
- * - 11xx
- * - 11Axx
- * - 11Cxx
- * - 11Dxx
- * - 11Exx
- * - 11Uxx
- * - 131x
- * - 134x
- * - 175x
- * - 176x
- * - 177x
- * - 178x
- * - 407x
- * - 408x
- * - 81x
- * - 82x
- */
-
-/* Part IDs for autodetection */
-/* A script which can automatically extract part ids from user manuals is available here:
- * https://github.com/lgeek/lpc_part_ids
- */
-#define LPC1110_1 0x0A07102B
-#define LPC1110_2 0x1A07102B
-#define LPC1111_002_1 0x0A16D02B
-#define LPC1111_002_2 0x1A16D02B
-#define LPC1111_101_1 0x041E502B
-#define LPC1111_101_2 0x2516D02B
-#define LPC1111_103_1 0x00010013
-#define LPC1111_201_1 0x0416502B
-#define LPC1111_201_2 0x2516902B
-#define LPC1111_203_1 0x00010012
-#define LPC1112_101_1 0x042D502B
-#define LPC1112_101_2 0x2524D02B
-#define LPC1112_102_1 0x0A24902B
-#define LPC1112_102_2 0x1A24902B
-#define LPC1112_103_1 0x00020023
-#define LPC1112_201_1 0x0425502B
-#define LPC1112_201_2 0x2524902B
-#define LPC1112_203_1 0x00020022
-#define LPC1113_201_1 0x0434502B
-#define LPC1113_201_2 0x2532902B
-#define LPC1113_203_1 0x00030032
-#define LPC1113_301_1 0x0434102B
-#define LPC1113_301_2 0x2532102B
-#define LPC1113_303_1 0x00030030
-#define LPC1114_102_1 0x0A40902B
-#define LPC1114_102_2 0x1A40902B
-#define LPC1114_201_1 0x0444502B
-#define LPC1114_201_2 0x2540902B
-#define LPC1114_203_1 0x00040042
-#define LPC1114_301_1 0x0444102B
-#define LPC1114_301_2 0x2540102B
-#define LPC1114_303_1 0x00040040
-#define LPC1114_323_1 0x00040060
-#define LPC1114_333_1 0x00040070
-#define LPC1115_303_1 0x00050080
-
-#define LPC11A02_1 0x4D4C802B
-#define LPC11A04_1 0x4D80002B
-#define LPC11A11_001_1 0x455EC02B
-#define LPC11A12_101_1 0x4574802B
-#define LPC11A13_201_1 0x458A402B
-#define LPC11A14_301_1 0x35A0002B
-#define LPC11A14_301_2 0x45A0002B
-
-#define LPC11C12_301_1 0x1421102B
-#define LPC11C14_301_1 0x1440102B
-#define LPC11C22_301_1 0x1431102B
-#define LPC11C24_301_1 0x1430102B
-
-#define LPC11E11_101 0x293E902B
-#define LPC11E12_201 0x2954502B
-#define LPC11E13_301 0x296A102B
-#define LPC11E14_401 0x2980102B
-#define LPC11E36_501 0x00009C41
-#define LPC11E37_401 0x00007C45
-#define LPC11E37_501 0x00007C41
-
-#define LPC11U12_201_1 0x095C802B
-#define LPC11U12_201_2 0x295C802B
-#define LPC11U13_201_1 0x097A802B
-#define LPC11U13_201_2 0x297A802B
-#define LPC11U14_201_1 0x0998802B
-#define LPC11U14_201_2 0x2998802B
-#define LPC11U23_301 0x2972402B
-#define LPC11U24_301 0x2988402B
-#define LPC11U24_401 0x2980002B
-#define LPC11U34_311 0x0003D440
-#define LPC11U34_421 0x0001CC40
-#define LPC11U35_401 0x0001BC40
-#define LPC11U35_501 0x0000BC40
-#define LPC11U36_401 0x00019C40
-#define LPC11U37_401 0x00017C40
-#define LPC11U37H_401 0x00007C44
-#define LPC11U37_501 0x00007C40
-
-#define LPC11E66 0x0000DCC1
-#define LPC11E67 0x0000BC81
-#define LPC11E68 0x00007C01
-
-#define LPC11U66 0x0000DCC8
-#define LPC11U67_1 0x0000BC88
-#define LPC11U67_2 0x0000BC80
-#define LPC11U68_1 0x00007C08
-#define LPC11U68_2 0x00007C00
-
-#define LPC1311 0x2C42502B
-#define LPC1311_1 0x1816902B
-#define LPC1313 0x2C40102B
-#define LPC1313_1 0x1830102B
-#define LPC1315 0x3A010523
-#define LPC1316 0x1A018524
-#define LPC1317 0x1A020525
-#define LPC1342 0x3D01402B
-#define LPC1343 0x3D00002B
-#define LPC1343_1 0x3000002B
-#define LPC1345 0x28010541
-#define LPC1346 0x08018542
-#define LPC1347 0x08020543
-
-#define LPC1751_1 0x25001110
-#define LPC1751_2 0x25001118
-#define LPC1752 0x25001121
-#define LPC1754 0x25011722
-#define LPC1756 0x25011723
-#define LPC1758 0x25013F37
-#define LPC1759 0x25113737
-#define LPC1763 0x26012033
-#define LPC1764 0x26011922
-#define LPC1765 0x26013733
-#define LPC1766 0x26013F33
-#define LPC1767 0x26012837
-#define LPC1768 0x26013F37
-#define LPC1769 0x26113F37
-#define LPC1774 0x27011132
-#define LPC1776 0x27191F43
-#define LPC1777 0x27193747
-#define LPC1778 0x27193F47
-#define LPC1785 0x281D1743
-#define LPC1786 0x281D1F43
-#define LPC1787 0x281D3747
-#define LPC1788 0x281D3F47
-
-#define LPC4072 0x47011121
-#define LPC4074 0x47011132
-#define LPC4076 0x47191F43
-#define LPC4078 0x47193F47
-#define LPC4088 0x481D3F47
-
-#define LPC810_021 0x00008100
-#define LPC811_001 0x00008110
-#define LPC812_101 0x00008120
-#define LPC812_101_1 0x00008121
-#define LPC812_101_2 0x00008122
-#define LPC812_101_3 0x00008123
-
-#define LPC822_101 0x00008221
-#define LPC822_101_1 0x00008222
-#define LPC824_201 0x00008241
-#define LPC824_201_1 0x00008242
-
-#define IAP_CODE_LEN 0x34
-
-typedef enum {
- lpc2000_v1,
- lpc2000_v2,
- lpc1700,
- lpc4300,
- lpc800,
- lpc1100,
- lpc1500,
- lpc54100,
- lpc_auto,
-} lpc2000_variant;
-
-struct lpc2000_flash_bank {
- lpc2000_variant variant;
- uint32_t cclk;
- int cmd51_dst_boundary;
- int calc_checksum;
- uint32_t cmd51_max_buffer;
- int checksum_vector;
- uint32_t iap_max_stack;
- uint32_t lpc4300_bank;
- bool probed;
-};
-
-enum lpc2000_status_codes {
- LPC2000_CMD_SUCCESS = 0,
- LPC2000_INVALID_COMMAND = 1,
- LPC2000_SRC_ADDR_ERROR = 2,
- LPC2000_DST_ADDR_ERROR = 3,
- LPC2000_SRC_ADDR_NOT_MAPPED = 4,
- LPC2000_DST_ADDR_NOT_MAPPED = 5,
- LPC2000_COUNT_ERROR = 6,
- LPC2000_INVALID_SECTOR = 7,
- LPC2000_SECTOR_NOT_BLANK = 8,
- LPC2000_SECTOR_NOT_PREPARED = 9,
- LPC2000_COMPARE_ERROR = 10,
- LPC2000_BUSY = 11,
- LPC2000_PARAM_ERROR = 12,
- LPC2000_ADDR_ERROR = 13,
- LPC2000_ADDR_NOT_MAPPED = 14,
- LPC2000_CMD_NOT_LOCKED = 15,
- LPC2000_INVALID_CODE = 16,
- LPC2000_INVALID_BAUD_RATE = 17,
- LPC2000_INVALID_STOP_BIT = 18,
- LPC2000_CRP_ENABLED = 19,
- LPC2000_INVALID_FLASH_UNIT = 20,
- LPC2000_USER_CODE_CHECKSUM = 21,
- LCP2000_ERROR_SETTING_ACTIVE_PARTITION = 22,
-};
-
-static int lpc2000_build_sector_list(struct flash_bank *bank)
-{
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
- uint32_t offset = 0;
-
- /* default to a 4096 write buffer */
- lpc2000_info->cmd51_max_buffer = 4096;
-
- if (lpc2000_info->variant == lpc2000_v1) {
- lpc2000_info->cmd51_dst_boundary = 512;
- lpc2000_info->checksum_vector = 5;
- lpc2000_info->iap_max_stack = 128;
-
- /* variant 1 has different layout for 128kb and 256kb flashes */
- if (bank->size == 128 * 1024) {
- bank->num_sectors = 16;
- bank->sectors = malloc(sizeof(struct flash_sector) * 16);
- for (int i = 0; i < 16; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 8 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
- } else if (bank->size == 256 * 1024) {
- bank->num_sectors = 18;
- bank->sectors = malloc(sizeof(struct flash_sector) * 18);
-
- for (int i = 0; i < 8; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 8 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
- for (int i = 8; i < 10; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 64 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
- for (int i = 10; i < 18; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 8 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
- } else {
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
- } else if (lpc2000_info->variant == lpc2000_v2) {
- lpc2000_info->cmd51_dst_boundary = 256;
- lpc2000_info->checksum_vector = 5;
- lpc2000_info->iap_max_stack = 128;
-
- /* variant 2 has a uniform layout, only number of sectors differs */
- switch (bank->size) {
- case 4 * 1024:
- lpc2000_info->cmd51_max_buffer = 1024;
- bank->num_sectors = 1;
- break;
- case 8 * 1024:
- lpc2000_info->cmd51_max_buffer = 1024;
- bank->num_sectors = 2;
- break;
- case 16 * 1024:
- bank->num_sectors = 4;
- break;
- case 32 * 1024:
- bank->num_sectors = 8;
- break;
- case 64 * 1024:
- bank->num_sectors = 9;
- break;
- case 128 * 1024:
- bank->num_sectors = 11;
- break;
- case 256 * 1024:
- bank->num_sectors = 15;
- break;
- case 500 * 1024:
- bank->num_sectors = 27;
- break;
- case 512 * 1024:
- case 504 * 1024:
- bank->num_sectors = 28;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- break;
- }
-
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (int i = 0; i < bank->num_sectors; i++) {
- if (i < 8) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 4 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- } else if (i < 22) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 32 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- } else if (i < 28) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 4 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
- }
- } else if (lpc2000_info->variant == lpc1700) {
- lpc2000_info->cmd51_dst_boundary = 256;
- lpc2000_info->checksum_vector = 7;
- lpc2000_info->iap_max_stack = 128;
-
- switch (bank->size) {
- case 4 * 1024:
- lpc2000_info->cmd51_max_buffer = 256;
- bank->num_sectors = 1;
- break;
- case 8 * 1024:
- lpc2000_info->cmd51_max_buffer = 512;
- bank->num_sectors = 2;
- break;
- case 16 * 1024:
- lpc2000_info->cmd51_max_buffer = 512;
- bank->num_sectors = 4;
- break;
- case 32 * 1024:
- lpc2000_info->cmd51_max_buffer = 1024;
- bank->num_sectors = 8;
- break;
- case 64 * 1024:
- bank->num_sectors = 16;
- break;
- case 128 * 1024:
- bank->num_sectors = 18;
- break;
- case 256 * 1024:
- bank->num_sectors = 22;
- break;
- case 512 * 1024:
- bank->num_sectors = 30;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
-
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- /* sectors 0-15 are 4kB-sized, 16 and above are 32kB-sized for LPC17xx/LPC40xx devices */
- bank->sectors[i].size = (i < 16) ? 4 * 1024 : 32 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
- } else if (lpc2000_info->variant == lpc4300) {
- lpc2000_info->cmd51_dst_boundary = 512;
- lpc2000_info->checksum_vector = 7;
- lpc2000_info->iap_max_stack = 208;
-
- switch (bank->size) {
- case 256 * 1024:
- bank->num_sectors = 11;
- break;
- case 384 * 1024:
- bank->num_sectors = 13;
- break;
- case 512 * 1024:
- bank->num_sectors = 15;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
-
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- /* sectors 0-7 are 8kB-sized, 8 and above are 64kB-sized for LPC43xx devices */
- bank->sectors[i].size = (i < 8) ? 8 * 1024 : 64 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- } else if (lpc2000_info->variant == lpc800) {
- lpc2000_info->cmd51_dst_boundary = 64;
- lpc2000_info->checksum_vector = 7;
- lpc2000_info->iap_max_stack = 208; /* 148byte for LPC81x,208byte for LPC82x. */
- lpc2000_info->cmd51_max_buffer = 256; /* smallest MCU in the series, LPC810, has 1 kB of SRAM */
-
- switch (bank->size) {
- case 4 * 1024:
- bank->num_sectors = 4;
- break;
- case 8 * 1024:
- bank->num_sectors = 8;
- break;
- case 16 * 1024:
- bank->num_sectors = 16;
- break;
- case 32 * 1024:
- lpc2000_info->cmd51_max_buffer = 1024; /* For LPC824, has 8kB of SRAM */
- bank->num_sectors = 32;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
-
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- /* all sectors are 1kB-sized for LPC8xx devices */
- bank->sectors[i].size = 1 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- } else if (lpc2000_info->variant == lpc1100) {
- lpc2000_info->cmd51_dst_boundary = 256;
- lpc2000_info->checksum_vector = 7;
- lpc2000_info->iap_max_stack = 128;
-
- if ((bank->size % (4 * 1024)) != 0) {
- LOG_ERROR("BUG: unknown bank->size encountered,\nLPC1100 flash size must be a multiple of 4096");
- exit(-1);
- }
- lpc2000_info->cmd51_max_buffer = 512; /* smallest MCU in the series, LPC1110, has 1 kB of SRAM */
- bank->num_sectors = bank->size / 4096;
-
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- /* all sectors are 4kB-sized */
- bank->sectors[i].size = 4 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- } else if (lpc2000_info->variant == lpc1500) {
- lpc2000_info->cmd51_dst_boundary = 256;
- lpc2000_info->checksum_vector = 7;
- lpc2000_info->iap_max_stack = 128;
-
- switch (bank->size) {
- case 64 * 1024:
- bank->num_sectors = 16;
- break;
- case 128 * 1024:
- bank->num_sectors = 32;
- break;
- case 256 * 1024:
- bank->num_sectors = 64;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
-
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- /* all sectors are 4kB-sized */
- bank->sectors[i].size = 4 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- } else if (lpc2000_info->variant == lpc54100) {
- lpc2000_info->cmd51_dst_boundary = 256;
- lpc2000_info->checksum_vector = 7;
- lpc2000_info->iap_max_stack = 128;
-
- switch (bank->size) {
- case 256 * 1024:
- bank->num_sectors = 8;
- break;
- case 512 * 1024:
- bank->num_sectors = 16;
- break;
- default:
- LOG_ERROR("BUG: unknown bank->size encountered");
- exit(-1);
- }
-
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- /* all sectors are 32kB-sized */
- bank->sectors[i].size = 32 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- } else {
- LOG_ERROR("BUG: unknown lpc2000_info->variant encountered");
- exit(-1);
- }
-
- return ERROR_OK;
-}
-
-/* this function allocates and initializes working area used for IAP algorithm
- * uses 52 + max IAP stack bytes working area
- * 0x0 to 0x7: jump gate (BX to thumb state, b -2 to wait)
- * 0x8 to 0x1f: command parameter table (1+5 words)
- * 0x20 to 0x33: command result table (1+4 words)
- * 0x34 to 0xb3|0x104: stack
- * (128b needed for lpc1xxx/2000/5410x, 208b for lpc43xx/lpc82x and 148b for lpc81x)
- */
-
-static int lpc2000_iap_working_area_init(struct flash_bank *bank, struct working_area **iap_working_area)
-{
- struct target *target = bank->target;
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
-
- if (target_alloc_working_area(target, IAP_CODE_LEN + lpc2000_info->iap_max_stack, iap_working_area) != ERROR_OK) {
- LOG_ERROR("no working area specified, can't write LPC2000 internal flash");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- uint8_t jump_gate[8];
-
- /* write IAP code to working area */
- switch (lpc2000_info->variant) {
- case lpc800:
- case lpc1100:
- case lpc1500:
- case lpc1700:
- case lpc4300:
- case lpc54100:
- case lpc_auto:
- target_buffer_set_u32(target, jump_gate, ARMV4_5_T_BX(12));
- target_buffer_set_u32(target, jump_gate + 4, ARMV5_T_BKPT(0));
- break;
- case lpc2000_v1:
- case lpc2000_v2:
- target_buffer_set_u32(target, jump_gate, ARMV4_5_BX(12));
- target_buffer_set_u32(target, jump_gate + 4, ARMV4_5_B(0xfffffe, 0));
- break;
- default:
- LOG_ERROR("BUG: unknown lpc2000_info->variant encountered");
- exit(-1);
- }
-
- int retval = target_write_memory(target, (*iap_working_area)->address, 4, 2, jump_gate);
- if (retval != ERROR_OK) {
- LOG_ERROR("Write memory at address 0x%8.8" PRIx32 " failed (check work_area definition)",
- (*iap_working_area)->address);
- target_free_working_area(target, *iap_working_area);
- }
-
- return retval;
-}
-
-/* call LPC8xx/LPC1xxx/LPC4xxx/LPC5410x/LPC2000 IAP function */
-
-static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_working_area, int code,
- uint32_t param_table[5], uint32_t result_table[4])
-{
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
- struct target *target = bank->target;
-
- struct arm_algorithm arm_algo; /* for LPC2000 */
- struct armv7m_algorithm armv7m_info; /* for LPC8xx/LPC1xxx/LPC4xxx/LPC5410x */
- uint32_t iap_entry_point = 0; /* to make compiler happier */
-
- switch (lpc2000_info->variant) {
- case lpc800:
- case lpc1100:
- case lpc1700:
- case lpc_auto:
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
- iap_entry_point = 0x1fff1ff1;
- break;
- case lpc1500:
- case lpc54100:
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
- iap_entry_point = 0x03000205;
- break;
- case lpc2000_v1:
- case lpc2000_v2:
- arm_algo.common_magic = ARM_COMMON_MAGIC;
- arm_algo.core_mode = ARM_MODE_SVC;
- arm_algo.core_state = ARM_STATE_ARM;
- iap_entry_point = 0x7ffffff1;
- break;
- case lpc4300:
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
- /* read out IAP entry point from ROM driver table at 0x10400100 */
- target_read_u32(target, 0x10400100, &iap_entry_point);
- break;
- default:
- LOG_ERROR("BUG: unknown lpc2000->variant encountered");
- exit(-1);
- }
-
- struct mem_param mem_params[2];
-
- /* command parameter table */
- init_mem_param(&mem_params[0], iap_working_area->address + 8, 6 * 4, PARAM_OUT);
- target_buffer_set_u32(target, mem_params[0].value, code);
- target_buffer_set_u32(target, mem_params[0].value + 0x04, param_table[0]);
- target_buffer_set_u32(target, mem_params[0].value + 0x08, param_table[1]);
- target_buffer_set_u32(target, mem_params[0].value + 0x0c, param_table[2]);
- target_buffer_set_u32(target, mem_params[0].value + 0x10, param_table[3]);
- target_buffer_set_u32(target, mem_params[0].value + 0x14, param_table[4]);
-
- struct reg_param reg_params[5];
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- buf_set_u32(reg_params[0].value, 0, 32, iap_working_area->address + 0x08);
-
- /* command result table */
- init_mem_param(&mem_params[1], iap_working_area->address + 0x20, 5 * 4, PARAM_IN);
-
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- buf_set_u32(reg_params[1].value, 0, 32, iap_working_area->address + 0x20);
-
- /* IAP entry point */
- init_reg_param(®_params[2], "r12", 32, PARAM_OUT);
- buf_set_u32(reg_params[2].value, 0, 32, iap_entry_point);
-
- switch (lpc2000_info->variant) {
- case lpc800:
- case lpc1100:
- case lpc1500:
- case lpc1700:
- case lpc4300:
- case lpc54100:
- case lpc_auto:
- /* IAP stack */
- init_reg_param(®_params[3], "sp", 32, PARAM_OUT);
- buf_set_u32(reg_params[3].value, 0, 32,
- iap_working_area->address + IAP_CODE_LEN + lpc2000_info->iap_max_stack);
-
- /* return address */
- init_reg_param(®_params[4], "lr", 32, PARAM_OUT);
- buf_set_u32(reg_params[4].value, 0, 32, (iap_working_area->address + 0x04) | 1);
- /* bit0 of LR = 1 to return in Thumb mode */
-
- target_run_algorithm(target, 2, mem_params, 5, reg_params, iap_working_area->address, 0, 10000,
- &armv7m_info);
- break;
- case lpc2000_v1:
- case lpc2000_v2:
- /* IAP stack */
- init_reg_param(®_params[3], "sp_svc", 32, PARAM_OUT);
- buf_set_u32(reg_params[3].value, 0, 32,
- iap_working_area->address + IAP_CODE_LEN + lpc2000_info->iap_max_stack);
-
- /* return address */
- init_reg_param(®_params[4], "lr_svc", 32, PARAM_OUT);
- buf_set_u32(reg_params[4].value, 0, 32, iap_working_area->address + 0x04);
-
- target_run_algorithm(target, 2, mem_params, 5, reg_params, iap_working_area->address,
- iap_working_area->address + 0x4, 10000, &arm_algo);
- break;
- default:
- LOG_ERROR("BUG: unknown lpc2000->variant encountered");
- exit(-1);
- }
-
- int status_code = target_buffer_get_u32(target, mem_params[1].value);
- result_table[0] = target_buffer_get_u32(target, mem_params[1].value + 0x04);
- result_table[1] = target_buffer_get_u32(target, mem_params[1].value + 0x08);
- result_table[2] = target_buffer_get_u32(target, mem_params[1].value + 0x0c);
- result_table[3] = target_buffer_get_u32(target, mem_params[1].value + 0x10);
-
- LOG_DEBUG("IAP command = %i (0x%8.8" PRIx32 ", 0x%8.8" PRIx32 ", 0x%8.8" PRIx32 ", 0x%8.8" PRIx32 ", 0x%8.8" PRIx32
- ") completed with result = %8.8x",
- code, param_table[0], param_table[1], param_table[2], param_table[3], param_table[4], status_code);
-
- destroy_mem_param(&mem_params[0]);
- destroy_mem_param(&mem_params[1]);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return status_code;
-}
-
-static int lpc2000_iap_blank_check(struct flash_bank *bank, int first, int last)
-{
- if ((first < 0) || (last >= bank->num_sectors))
- return ERROR_FLASH_SECTOR_INVALID;
-
- uint32_t param_table[5] = {0};
- uint32_t result_table[4];
- struct working_area *iap_working_area;
-
- int retval = lpc2000_iap_working_area_init(bank, &iap_working_area);
-
- if (retval != ERROR_OK)
- return retval;
-
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
- if (lpc2000_info->variant == lpc4300)
- param_table[2] = lpc2000_info->lpc4300_bank;
-
- for (int i = first; i <= last && retval == ERROR_OK; i++) {
- /* check single sector */
- param_table[0] = param_table[1] = i;
- int status_code = lpc2000_iap_call(bank, iap_working_area, 53, param_table, result_table);
-
- switch (status_code) {
- case ERROR_FLASH_OPERATION_FAILED:
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- case LPC2000_CMD_SUCCESS:
- bank->sectors[i].is_erased = 1;
- break;
- case LPC2000_SECTOR_NOT_BLANK:
- bank->sectors[i].is_erased = 0;
- break;
- case LPC2000_INVALID_SECTOR:
- bank->sectors[i].is_erased = 0;
- break;
- case LPC2000_BUSY:
- retval = ERROR_FLASH_BUSY;
- break;
- default:
- LOG_ERROR("BUG: unknown LPC2000 status code %i", status_code);
- exit(-1);
- }
- }
-
- struct target *target = bank->target;
- target_free_working_area(target, iap_working_area);
-
- return retval;
-}
-
-/*
- * flash bank lpc2000 <base> <size> 0 0 <target#> <lpc_variant> <cclk> [calc_checksum]
- */
-FLASH_BANK_COMMAND_HANDLER(lpc2000_flash_bank_command)
-{
- if (CMD_ARGC < 8)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct lpc2000_flash_bank *lpc2000_info = calloc(1, sizeof(*lpc2000_info));
- lpc2000_info->probed = false;
-
- bank->driver_priv = lpc2000_info;
-
- if (strcmp(CMD_ARGV[6], "lpc2000_v1") == 0) {
- lpc2000_info->variant = lpc2000_v1;
- } else if (strcmp(CMD_ARGV[6], "lpc2000_v2") == 0) {
- lpc2000_info->variant = lpc2000_v2;
- } else if (strcmp(CMD_ARGV[6], "lpc1700") == 0 || strcmp(CMD_ARGV[6], "lpc4000") == 0) {
- lpc2000_info->variant = lpc1700;
- } else if (strcmp(CMD_ARGV[6], "lpc1800") == 0 || strcmp(CMD_ARGV[6], "lpc4300") == 0) {
- lpc2000_info->variant = lpc4300;
- } else if (strcmp(CMD_ARGV[6], "lpc800") == 0) {
- lpc2000_info->variant = lpc800;
- } else if (strcmp(CMD_ARGV[6], "lpc1100") == 0) {
- lpc2000_info->variant = lpc1100;
- } else if (strcmp(CMD_ARGV[6], "lpc1500") == 0) {
- lpc2000_info->variant = lpc1500;
- } else if (strcmp(CMD_ARGV[6], "lpc54100") == 0) {
- lpc2000_info->variant = lpc54100;
- } else if (strcmp(CMD_ARGV[6], "auto") == 0) {
- lpc2000_info->variant = lpc_auto;
- } else {
- LOG_ERROR("unknown LPC2000 variant: %s", CMD_ARGV[6]);
- free(lpc2000_info);
- return ERROR_FLASH_BANK_INVALID;
- }
-
- /* Maximum size required for the IAP stack.
- This value only gets used when probing, only for auto, lpc1100 and lpc1700.
- We use the maximum size for any part supported by the driver(!) to be safe
- in case the auto variant is mistakenly used on a MCU from one of the series
- for which we don't support auto-probing. */
- lpc2000_info->iap_max_stack = 208;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[7], lpc2000_info->cclk);
- lpc2000_info->calc_checksum = 0;
-
- uint32_t temp_base = 0;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], temp_base);
- if (temp_base >= 0x1B000000)
- lpc2000_info->lpc4300_bank = 1; /* bank B */
- else
- lpc2000_info->lpc4300_bank = 0; /* bank A */
-
- if (CMD_ARGC >= 9) {
- if (strcmp(CMD_ARGV[8], "calc_checksum") == 0)
- lpc2000_info->calc_checksum = 1;
- }
-
- return ERROR_OK;
-}
-
-static int lpc2000_erase(struct flash_bank *bank, int first, int last)
-{
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
- uint32_t param_table[5] = {0};
-
- param_table[0] = first;
- param_table[1] = last;
-
- if (lpc2000_info->variant == lpc4300)
- param_table[2] = lpc2000_info->lpc4300_bank;
- else
- param_table[2] = lpc2000_info->cclk;
-
- uint32_t result_table[4];
- struct working_area *iap_working_area;
-
- int retval = lpc2000_iap_working_area_init(bank, &iap_working_area);
-
- if (retval != ERROR_OK)
- return retval;
-
- if (lpc2000_info->variant == lpc4300)
- /* Init IAP Anyway */
- lpc2000_iap_call(bank, iap_working_area, 49, param_table, result_table);
-
- /* Prepare sectors */
- int status_code = lpc2000_iap_call(bank, iap_working_area, 50, param_table, result_table);
- switch (status_code) {
- case ERROR_FLASH_OPERATION_FAILED:
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- case LPC2000_CMD_SUCCESS:
- break;
- case LPC2000_INVALID_SECTOR:
- retval = ERROR_FLASH_SECTOR_INVALID;
- break;
- default:
- LOG_WARNING("lpc2000 prepare sectors returned %i", status_code);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- if (retval == ERROR_OK) {
- /* Erase sectors */
- param_table[2] = lpc2000_info->cclk;
- if (lpc2000_info->variant == lpc4300)
- param_table[3] = lpc2000_info->lpc4300_bank;
-
- status_code = lpc2000_iap_call(bank, iap_working_area, 52, param_table, result_table);
- switch (status_code) {
- case ERROR_FLASH_OPERATION_FAILED:
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- case LPC2000_CMD_SUCCESS:
- break;
- case LPC2000_INVALID_SECTOR:
- retval = ERROR_FLASH_SECTOR_INVALID;
- break;
- default:
- LOG_WARNING("lpc2000 erase sectors returned %i", status_code);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
- }
-
- struct target *target = bank->target;
- target_free_working_area(target, iap_working_area);
-
- return retval;
-}
-
-static int lpc2000_protect(struct flash_bank *bank, int set, int first, int last)
-{
- /* can't protect/unprotect on the lpc2000 */
- return ERROR_OK;
-}
-
-static int lpc2000_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset + count > bank->size)
- return ERROR_FLASH_DST_OUT_OF_BANK;
-
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
-
- uint32_t dst_min_alignment = lpc2000_info->cmd51_dst_boundary;
-
- if (offset % dst_min_alignment) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required alignment 0x%" PRIx32, offset, dst_min_alignment);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- int first_sector = 0;
- int last_sector = 0;
-
- for (int i = 0; i < bank->num_sectors; i++) {
- if (offset >= bank->sectors[i].offset)
- first_sector = i;
- if (offset + DIV_ROUND_UP(count, dst_min_alignment) * dst_min_alignment > bank->sectors[i].offset)
- last_sector = i;
- }
-
- LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
-
- /* check if exception vectors should be flashed */
- if ((offset == 0) && (count >= 0x20) && lpc2000_info->calc_checksum) {
- assert(lpc2000_info->checksum_vector < 8);
- uint32_t checksum = 0;
- for (int i = 0; i < 8; i++) {
- LOG_DEBUG("Vector 0x%2.2x: 0x%8.8" PRIx32, i * 4, buf_get_u32(buffer + (i * 4), 0, 32));
- if (i != lpc2000_info->checksum_vector)
- checksum += buf_get_u32(buffer + (i * 4), 0, 32);
- }
- checksum = 0 - checksum;
- LOG_DEBUG("checksum: 0x%8.8" PRIx32, checksum);
-
- uint32_t original_value = buf_get_u32(buffer + (lpc2000_info->checksum_vector * 4), 0, 32);
- if (original_value != checksum) {
- LOG_WARNING("Verification will fail since checksum in image (0x%8.8" PRIx32 ") to be written to flash is "
- "different from calculated vector checksum (0x%8.8" PRIx32 ").", original_value, checksum);
- LOG_WARNING("To remove this warning modify build tools on developer PC to inject correct LPC vector "
- "checksum.");
- }
-
- /* FIXME: WARNING! This code is broken because it modifies the callers buffer in place. */
- buf_set_u32((uint8_t *)buffer + (lpc2000_info->checksum_vector * 4), 0, 32, checksum);
- }
-
- struct working_area *iap_working_area;
-
- int retval = lpc2000_iap_working_area_init(bank, &iap_working_area);
-
- if (retval != ERROR_OK)
- return retval;
-
- struct working_area *download_area;
-
- /* allocate a working area */
- if (target_alloc_working_area(target, lpc2000_info->cmd51_max_buffer, &download_area) != ERROR_OK) {
- LOG_ERROR("no working area specified, can't write LPC2000 internal flash");
- target_free_working_area(target, iap_working_area);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- uint32_t bytes_remaining = count;
- uint32_t bytes_written = 0;
- uint32_t param_table[5] = {0};
- uint32_t result_table[4];
-
- if (lpc2000_info->variant == lpc4300)
- /* Init IAP Anyway */
- lpc2000_iap_call(bank, iap_working_area, 49, param_table, result_table);
-
- while (bytes_remaining > 0) {
- uint32_t thisrun_bytes;
- if (bytes_remaining >= lpc2000_info->cmd51_max_buffer)
- thisrun_bytes = lpc2000_info->cmd51_max_buffer;
- else
- thisrun_bytes = lpc2000_info->cmd51_dst_boundary;
-
- /* Prepare sectors */
- param_table[0] = first_sector;
- param_table[1] = last_sector;
-
- if (lpc2000_info->variant == lpc4300)
- param_table[2] = lpc2000_info->lpc4300_bank;
- else
- param_table[2] = lpc2000_info->cclk;
-
- int status_code = lpc2000_iap_call(bank, iap_working_area, 50, param_table, result_table);
- switch (status_code) {
- case ERROR_FLASH_OPERATION_FAILED:
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- case LPC2000_CMD_SUCCESS:
- break;
- case LPC2000_INVALID_SECTOR:
- retval = ERROR_FLASH_SECTOR_INVALID;
- break;
- default:
- LOG_WARNING("lpc2000 prepare sectors returned %i", status_code);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- /* Exit if error occured */
- if (retval != ERROR_OK)
- break;
-
- if (bytes_remaining >= thisrun_bytes) {
- retval = target_write_buffer(bank->target, download_area->address, thisrun_bytes, buffer + bytes_written);
- if (retval != ERROR_OK) {
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
- } else {
- uint8_t *last_buffer = malloc(thisrun_bytes);
- memcpy(last_buffer, buffer + bytes_written, bytes_remaining);
- memset(last_buffer + bytes_remaining, 0xff, thisrun_bytes - bytes_remaining);
- target_write_buffer(bank->target, download_area->address, thisrun_bytes, last_buffer);
- free(last_buffer);
- }
-
- LOG_DEBUG("writing 0x%" PRIx32 " bytes to address 0x%" PRIx32, thisrun_bytes,
- bank->base + offset + bytes_written);
-
- /* Write data */
- param_table[0] = bank->base + offset + bytes_written;
- param_table[1] = download_area->address;
- param_table[2] = thisrun_bytes;
- param_table[3] = lpc2000_info->cclk;
- status_code = lpc2000_iap_call(bank, iap_working_area, 51, param_table, result_table);
- switch (status_code) {
- case ERROR_FLASH_OPERATION_FAILED:
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- case LPC2000_CMD_SUCCESS:
- break;
- case LPC2000_INVALID_SECTOR:
- retval = ERROR_FLASH_SECTOR_INVALID;
- break;
- default:
- LOG_WARNING("lpc2000 returned %i", status_code);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- /* Exit if error occured */
- if (retval != ERROR_OK)
- break;
-
- if (bytes_remaining > thisrun_bytes)
- bytes_remaining -= thisrun_bytes;
- else
- bytes_remaining = 0;
- bytes_written += thisrun_bytes;
- }
-
- target_free_working_area(target, iap_working_area);
- target_free_working_area(target, download_area);
-
- return retval;
-}
-
-static int get_lpc2000_part_id(struct flash_bank *bank, uint32_t *part_id)
-{
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint32_t param_table[5] = {0};
- uint32_t result_table[4];
- struct working_area *iap_working_area;
-
- int retval = lpc2000_iap_working_area_init(bank, &iap_working_area);
-
- if (retval != ERROR_OK)
- return retval;
-
- /* The status seems to be bogus with the part ID command on some IAP
- firmwares, so ignore it. */
- lpc2000_iap_call(bank, iap_working_area, 54, param_table, result_table);
-
- struct target *target = bank->target;
- target_free_working_area(target, iap_working_area);
-
- /* If the result is zero, the command probably didn't work out. */
- if (result_table[0] == 0)
- return LPC2000_INVALID_COMMAND;
-
- *part_id = result_table[0];
- return LPC2000_CMD_SUCCESS;
-}
-
-static int lpc2000_auto_probe_flash(struct flash_bank *bank)
-{
- uint32_t part_id;
- int retval;
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = get_lpc2000_part_id(bank, &part_id);
- if (retval != LPC2000_CMD_SUCCESS) {
- LOG_ERROR("Could not get part ID");
- return retval;
- }
-
- switch (part_id) {
- case LPC1110_1:
- case LPC1110_2:
- lpc2000_info->variant = lpc1100;
- bank->size = 4 * 1024;
- break;
-
- case LPC1111_002_1:
- case LPC1111_002_2:
- case LPC1111_101_1:
- case LPC1111_101_2:
- case LPC1111_103_1:
- case LPC1111_201_1:
- case LPC1111_201_2:
- case LPC1111_203_1:
- case LPC11A11_001_1:
- case LPC11E11_101:
- case LPC1311:
- case LPC1311_1:
- lpc2000_info->variant = lpc1100;
- bank->size = 8 * 1024;
- break;
-
- case LPC1112_101_1:
- case LPC1112_101_2:
- case LPC1112_102_1:
- case LPC1112_102_2:
- case LPC1112_103_1:
- case LPC1112_201_1:
- case LPC1112_201_2:
- case LPC1112_203_1:
- case LPC11A02_1:
- case LPC11C12_301_1:
- case LPC11C22_301_1:
- case LPC11A12_101_1:
- case LPC11E12_201:
- case LPC11U12_201_1:
- case LPC11U12_201_2:
- case LPC1342:
- lpc2000_info->variant = lpc1100;
- bank->size = 16 * 1024;
- break;
-
- case LPC1113_201_1:
- case LPC1113_201_2:
- case LPC1113_203_1:
- case LPC1113_301_1:
- case LPC1113_301_2:
- case LPC1113_303_1:
- case LPC11A13_201_1:
- case LPC11E13_301:
- case LPC11U13_201_1:
- case LPC11U13_201_2:
- case LPC11U23_301:
- lpc2000_info->variant = lpc1100;
- bank->size = 24 * 1024;
- break;
-
- case LPC1114_102_1:
- case LPC1114_102_2:
- case LPC1114_201_1:
- case LPC1114_201_2:
- case LPC1114_203_1:
- case LPC1114_301_1:
- case LPC1114_301_2:
- case LPC1114_303_1:
- case LPC11A04_1:
- case LPC11A14_301_1:
- case LPC11A14_301_2:
- case LPC11C14_301_1:
- case LPC11C24_301_1:
- case LPC11E14_401:
- case LPC11U14_201_1:
- case LPC11U14_201_2:
- case LPC11U24_301:
- case LPC11U24_401:
- case LPC1313:
- case LPC1313_1:
- case LPC1315:
- case LPC1343:
- case LPC1343_1:
- case LPC1345:
- lpc2000_info->variant = lpc1100;
- bank->size = 32 * 1024;
- break;
-
- case LPC1751_1:
- case LPC1751_2:
- lpc2000_info->variant = lpc1700;
- bank->size = 32 * 1024;
- break;
-
- case LPC11U34_311:
- lpc2000_info->variant = lpc1100;
- bank->size = 40 * 1024;
- break;
-
- case LPC1114_323_1:
- case LPC11U34_421:
- case LPC1316:
- case LPC1346:
- lpc2000_info->variant = lpc1100;
- bank->size = 48 * 1024;
- break;
-
- case LPC1114_333_1:
- lpc2000_info->variant = lpc1100;
- bank->size = 56 * 1024;
- break;
-
- case LPC1115_303_1:
- case LPC11U35_401:
- case LPC11U35_501:
- case LPC11E66:
- case LPC11U66:
- case LPC1317:
- case LPC1347:
- lpc2000_info->variant = lpc1100;
- bank->size = 64 * 1024;
- break;
-
- case LPC1752:
- case LPC4072:
- lpc2000_info->variant = lpc1700;
- bank->size = 64 * 1024;
- break;
-
- case LPC11E36_501:
- case LPC11U36_401:
- lpc2000_info->variant = lpc1100;
- bank->size = 96 * 1024;
- break;
-
- case LPC11E37_401:
- case LPC11E37_501:
- case LPC11U37_401:
- case LPC11U37H_401:
- case LPC11U37_501:
- case LPC11E67:
- case LPC11E68:
- case LPC11U67_1:
- case LPC11U67_2:
- lpc2000_info->variant = lpc1100;
- bank->size = 128 * 1024;
- break;
-
- case LPC1754:
- case LPC1764:
- case LPC1774:
- case LPC4074:
- lpc2000_info->variant = lpc1700;
- bank->size = 128 * 1024;
- break;
-
- case LPC11U68_1:
- case LPC11U68_2:
- lpc2000_info->variant = lpc1100;
- bank->size = 256 * 1024;
- break;
-
- case LPC1756:
- case LPC1763:
- case LPC1765:
- case LPC1766:
- case LPC1776:
- case LPC1785:
- case LPC1786:
- case LPC4076:
- lpc2000_info->variant = lpc1700;
- bank->size = 256 * 1024;
- break;
-
- case LPC1758:
- case LPC1759:
- case LPC1767:
- case LPC1768:
- case LPC1769:
- case LPC1777:
- case LPC1778:
- case LPC1787:
- case LPC1788:
- case LPC4078:
- case LPC4088:
- lpc2000_info->variant = lpc1700;
- bank->size = 512 * 1024;
- break;
-
- case LPC810_021:
- lpc2000_info->variant = lpc800;
- bank->size = 4 * 1024;
- break;
-
- case LPC811_001:
- lpc2000_info->variant = lpc800;
- bank->size = 8 * 1024;
- break;
-
- case LPC812_101:
- case LPC812_101_1:
- case LPC812_101_2:
- case LPC812_101_3:
- case LPC822_101:
- case LPC822_101_1:
- lpc2000_info->variant = lpc800;
- bank->size = 16 * 1024;
- break;
-
- case LPC824_201:
- case LPC824_201_1:
- lpc2000_info->variant = lpc800;
- bank->size = 32 * 1024;
- break;
-
- default:
- LOG_ERROR("BUG: unknown Part ID encountered: 0x%" PRIx32, part_id);
- exit(-1);
- }
-
- return ERROR_OK;
-}
-
-static int lpc2000_probe(struct flash_bank *bank)
-{
- int status;
- uint32_t part_id;
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
-
- if (!lpc2000_info->probed) {
- if (lpc2000_info->variant == lpc_auto) {
- status = lpc2000_auto_probe_flash(bank);
- if (status != ERROR_OK)
- return status;
- } else if (lpc2000_info->variant == lpc1100 || lpc2000_info->variant == lpc1700) {
- status = get_lpc2000_part_id(bank, &part_id);
- if (status == LPC2000_CMD_SUCCESS)
- LOG_INFO("If auto-detection fails for this part, please email "
- "openocd-devel@lists.sourceforge.net, citing part id 0x%" PRIx32 ".\n", part_id);
- }
-
- lpc2000_build_sector_list(bank);
- lpc2000_info->probed = true;
- }
-
- return ERROR_OK;
-}
-
-static int lpc2000_erase_check(struct flash_bank *bank)
-{
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- return lpc2000_iap_blank_check(bank, 0, bank->num_sectors - 1);
-}
-
-static int lpc2000_protect_check(struct flash_bank *bank)
-{
- /* sectors are always protected */
- return ERROR_OK;
-}
-
-static int get_lpc2000_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct lpc2000_flash_bank *lpc2000_info = bank->driver_priv;
-
- snprintf(buf, buf_size, "lpc2000 flash driver variant: %i, clk: %" PRIi32 "kHz", lpc2000_info->variant,
- lpc2000_info->cclk);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(lpc2000_handle_part_id_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint32_t part_id;
- int status_code = get_lpc2000_part_id(bank, &part_id);
- if (status_code != 0x0) {
- if (status_code == ERROR_FLASH_OPERATION_FAILED) {
- command_print(CMD_CTX, "no sufficient working area specified, can't access LPC2000 IAP interface");
- } else
- command_print(CMD_CTX, "lpc2000 IAP returned status code %i", status_code);
- } else
- command_print(CMD_CTX, "lpc2000 part id: 0x%8.8" PRIx32, part_id);
-
- return retval;
-}
-
-static const struct command_registration lpc2000_exec_command_handlers[] = {
- {
- .name = "part_id",
- .handler = lpc2000_handle_part_id_command,
- .mode = COMMAND_EXEC,
- .help = "print part id of lpc2000 flash bank <num>",
- .usage = "<bank>",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration lpc2000_command_handlers[] = {
- {
- .name = "lpc2000",
- .mode = COMMAND_ANY,
- .help = "lpc2000 flash command group",
- .usage = "",
- .chain = lpc2000_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver lpc2000_flash = {
- .name = "lpc2000",
- .commands = lpc2000_command_handlers,
- .flash_bank_command = lpc2000_flash_bank_command,
- .erase = lpc2000_erase,
- .protect = lpc2000_protect,
- .write = lpc2000_write,
- .read = default_flash_read,
- .probe = lpc2000_probe,
- .auto_probe = lpc2000_probe,
- .erase_check = lpc2000_erase_check,
- .protect_check = lpc2000_protect_check,
- .info = get_lpc2000_info,
-};
[23/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpcspifi.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpcspifi.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpcspifi.c
deleted file mode 100755
index 6390149..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpcspifi.c
+++ /dev/null
@@ -1,982 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2012 by George Harris *
- * george@luminairecoffee.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "spi.h"
-#include <jtag/jtag.h>
-#include <helper/time_support.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-/* Offsets from ssp_base into config & data registers */
-#define SSP_CR0 (0x00) /* Control register 0 */
-#define SSP_CR1 (0x04) /* Control register 1 */
-#define SSP_DATA (0x08) /* Data register (TX and RX) */
-#define SSP_SR (0x0C) /* Status register */
-#define SSP_CPSR (0x10) /* Clock prescale register */
-
-/* Status register fields */
-#define SSP_BSY (0x00000010)
-
-/* Timeout in ms */
-#define SSP_CMD_TIMEOUT (100)
-#define SSP_PROBE_TIMEOUT (100)
-#define SSP_MAX_TIMEOUT (3000)
-
-/* Size of the stack to alloc in the working area for the execution of
- * the ROM spifi_init() function */
-#define SPIFI_INIT_STACK_SIZE 512
-
-struct lpcspifi_flash_bank {
- int probed;
- uint32_t ssp_base;
- uint32_t io_base;
- uint32_t ioconfig_base;
- uint32_t bank_num;
- uint32_t max_spi_clock_mhz;
- const struct flash_device *dev;
-};
-
-struct lpcspifi_target {
- char *name;
- uint32_t tap_idcode;
- uint32_t spifi_base;
- uint32_t ssp_base;
- uint32_t io_base;
- uint32_t ioconfig_base; /* base address for the port word pin registers */
-};
-
-static const struct lpcspifi_target target_devices[] = {
- /* name, tap_idcode, spifi_base, ssp_base, io_base, ioconfig_base */
- { "LPC43xx/18xx", 0x4ba00477, 0x14000000, 0x40083000, 0x400F4000, 0x40086000 },
- { NULL, 0, 0, 0, 0, 0 }
-};
-
-/* flash_bank lpcspifi <base> <size> <chip_width> <bus_width> <target>
- */
-FLASH_BANK_COMMAND_HANDLER(lpcspifi_flash_bank_command)
-{
- struct lpcspifi_flash_bank *lpcspifi_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- lpcspifi_info = malloc(sizeof(struct lpcspifi_flash_bank));
- if (lpcspifi_info == NULL) {
- LOG_ERROR("not enough memory");
- return ERROR_FAIL;
- }
-
- bank->driver_priv = lpcspifi_info;
- lpcspifi_info->probed = 0;
-
- return ERROR_OK;
-}
-
-static inline int ioconfig_write_reg(struct target *target, uint32_t ioconfig_base, uint32_t offset, uint32_t value)
-{
- return target_write_u32(target, ioconfig_base + offset, value);
-}
-
-static inline int ssp_write_reg(struct target *target, uint32_t ssp_base, uint32_t offset, uint32_t value)
-{
- return target_write_u32(target, ssp_base + offset, value);
-}
-
-static inline int io_write_reg(struct target *target, uint32_t io_base, uint32_t offset, uint32_t value)
-{
- return target_write_u32(target, io_base + offset, value);
-}
-
-static inline int ssp_read_reg(struct target *target, uint32_t ssp_base, uint32_t offset, uint32_t *value)
-{
- return target_read_u32(target, ssp_base + offset, value);
-}
-
-static int ssp_setcs(struct target *target, uint32_t io_base, unsigned int value)
-{
- return io_write_reg(target, io_base, 0x12ac, value ? 0xffffffff : 0x00000000);
-}
-
-/* Poll the SSP busy flag. When this comes back as 0, the transfer is complete
- * and the controller is idle. */
-static int poll_ssp_busy(struct target *target, uint32_t ssp_base, int timeout)
-{
- long long endtime;
- uint32_t value;
- int retval;
-
- retval = ssp_read_reg(target, ssp_base, SSP_SR, &value);
- if ((retval == ERROR_OK) && (value & SSP_BSY) == 0)
- return ERROR_OK;
- else if (retval != ERROR_OK)
- return retval;
-
- endtime = timeval_ms() + timeout;
- do {
- alive_sleep(1);
- retval = ssp_read_reg(target, ssp_base, SSP_SR, &value);
- if ((retval == ERROR_OK) && (value & SSP_BSY) == 0)
- return ERROR_OK;
- else if (retval != ERROR_OK)
- return retval;
- } while (timeval_ms() < endtime);
-
- LOG_ERROR("Timeout while polling BSY");
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-/* Un-initialize the ssp module and initialize the SPIFI module */
-static int lpcspifi_set_hw_mode(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t ssp_base = lpcspifi_info->ssp_base;
- struct armv7m_algorithm armv7m_info;
- struct working_area *spifi_init_algorithm;
- struct reg_param reg_params[2];
- int retval = ERROR_OK;
-
- LOG_DEBUG("Uninitializing LPC43xx SSP");
- /* Turn off the SSP module */
- retval = ssp_write_reg(target, ssp_base, SSP_CR1, 0x00000000);
- if (retval != ERROR_OK)
- return retval;
-
- /* see contrib/loaders/flash/lpcspifi_init.S for src */
- static const uint8_t spifi_init_code[] = {
- 0x4f, 0xea, 0x00, 0x08, 0xa1, 0xb0, 0x00, 0xaf,
- 0x4f, 0xf4, 0xc0, 0x43, 0xc4, 0xf2, 0x08, 0x03,
- 0x4f, 0xf0, 0xf3, 0x02, 0xc3, 0xf8, 0x8c, 0x21,
- 0x4f, 0xf4, 0xc0, 0x43, 0xc4, 0xf2, 0x08, 0x03,
- 0x4f, 0xf4, 0xc0, 0x42, 0xc4, 0xf2, 0x08, 0x02,
- 0x4f, 0xf4, 0xc0, 0x41, 0xc4, 0xf2, 0x08, 0x01,
- 0x4f, 0xf4, 0xc0, 0x40, 0xc4, 0xf2, 0x08, 0x00,
- 0x4f, 0xf0, 0xd3, 0x04, 0xc0, 0xf8, 0x9c, 0x41,
- 0x20, 0x46, 0xc1, 0xf8, 0x98, 0x01, 0x01, 0x46,
- 0xc2, 0xf8, 0x94, 0x11, 0xc3, 0xf8, 0x90, 0x11,
- 0x4f, 0xf4, 0xc0, 0x43, 0xc4, 0xf2, 0x08, 0x03,
- 0x4f, 0xf0, 0x13, 0x02, 0xc3, 0xf8, 0xa0, 0x21,
- 0x40, 0xf2, 0x18, 0x13, 0xc1, 0xf2, 0x40, 0x03,
- 0x1b, 0x68, 0x1c, 0x68, 0x40, 0xf2, 0xb4, 0x30,
- 0xc1, 0xf2, 0x00, 0x00, 0x4f, 0xf0, 0x03, 0x01,
- 0x4f, 0xf0, 0xc0, 0x02, 0x4f, 0xea, 0x08, 0x03,
- 0xa0, 0x47, 0x00, 0xf0, 0x00, 0xb8, 0x00, 0xbe
- };
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
-
- LOG_DEBUG("Allocating working area for SPIFI init algorithm");
- /* Get memory for spifi initialization algorithm */
- retval = target_alloc_working_area(target, sizeof(spifi_init_code)
- + SPIFI_INIT_STACK_SIZE, &spifi_init_algorithm);
- if (retval != ERROR_OK) {
- LOG_ERROR("Insufficient working area to initialize SPIFI "\
- "module. You must allocate at least %zdB of working "\
- "area in order to use this driver.",
- sizeof(spifi_init_code) + SPIFI_INIT_STACK_SIZE
- );
-
- return retval;
- }
-
- LOG_DEBUG("Writing algorithm to working area at 0x%08" PRIx32,
- spifi_init_algorithm->address);
- /* Write algorithm to working area */
- retval = target_write_buffer(target,
- spifi_init_algorithm->address,
- sizeof(spifi_init_code),
- spifi_init_code
- );
-
- if (retval != ERROR_OK) {
- target_free_working_area(target, spifi_init_algorithm);
- return retval;
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* spifi clk speed */
- /* the spifi_init() rom API makes use of the stack */
- init_reg_param(®_params[1], "sp", 32, PARAM_OUT);
-
- /* For now, the algorithm will set up the SPIFI module
- * @ the IRC clock speed. In the future, it could be made
- * a bit smarter to use other clock sources if the user has
- * already configured them in order to speed up memory-
- * mapped reads. */
- buf_set_u32(reg_params[0].value, 0, 32, 12);
- /* valid stack pointer */
- buf_set_u32(reg_params[1].value, 0, 32, (spifi_init_algorithm->address +
- sizeof(spifi_init_code) + SPIFI_INIT_STACK_SIZE) & ~7UL);
-
- /* Run the algorithm */
- LOG_DEBUG("Running SPIFI init algorithm");
- retval = target_run_algorithm(target, 0 , NULL, 2, reg_params,
- spifi_init_algorithm->address,
- spifi_init_algorithm->address + sizeof(spifi_init_code) - 2,
- 1000, &armv7m_info);
-
- if (retval != ERROR_OK)
- LOG_ERROR("Error executing SPIFI init algorithm");
-
- target_free_working_area(target, spifi_init_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
-
- return retval;
-}
-
-/* Initialize the ssp module */
-static int lpcspifi_set_sw_mode(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t ssp_base = lpcspifi_info->ssp_base;
- uint32_t io_base = lpcspifi_info->io_base;
- uint32_t ioconfig_base = lpcspifi_info->ioconfig_base;
- int retval = ERROR_OK;
-
- /* Re-initialize SPIFI. There are a couple of errata on this, so this makes
- sure that nothing's in an unhappy state. */
- retval = lpcspifi_set_hw_mode(bank);
-
- /* If we couldn't initialize hardware mode, don't even bother continuing */
- if (retval != ERROR_OK)
- return retval;
-
- /* Initialize the pins */
- retval = ioconfig_write_reg(target, ioconfig_base, 0x194, 0x00000040);
- if (retval == ERROR_OK)
- retval = ioconfig_write_reg(target, ioconfig_base, 0x1a0, 0x00000044);
- if (retval == ERROR_OK)
- retval = ioconfig_write_reg(target, ioconfig_base, 0x190, 0x00000040);
- if (retval == ERROR_OK)
- retval = ioconfig_write_reg(target, ioconfig_base, 0x19c, 0x000000ed);
- if (retval == ERROR_OK)
- retval = ioconfig_write_reg(target, ioconfig_base, 0x198, 0x000000ed);
- if (retval == ERROR_OK)
- retval = ioconfig_write_reg(target, ioconfig_base, 0x18c, 0x000000ea);
-
- /* Set CS high & as an output */
- if (retval == ERROR_OK)
- retval = io_write_reg(target, io_base, 0x12ac, 0xffffffff);
- if (retval == ERROR_OK)
- retval = io_write_reg(target, io_base, 0x2014, 0x00000800);
-
- /* Initialize the module */
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_CR0, 0x00000007);
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_CR1, 0x00000000);
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_CPSR, 0x00000008);
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_CR1, 0x00000002);
-
- /* If something didn't work out, attempt to return SPIFI to HW mode */
- if (retval != ERROR_OK)
- lpcspifi_set_hw_mode(bank);
-
- return retval;
-}
-
-/* Read the status register of the external SPI flash chip. */
-static int read_status_reg(struct flash_bank *bank, uint32_t *status)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t ssp_base = lpcspifi_info->ssp_base;
- uint32_t io_base = lpcspifi_info->io_base;
- uint32_t value;
- int retval = ERROR_OK;
-
- retval = ssp_setcs(target, io_base, 0);
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_DATA, SPIFLASH_READ_STATUS);
- if (retval == ERROR_OK)
- retval = poll_ssp_busy(target, ssp_base, SSP_CMD_TIMEOUT);
- if (retval == ERROR_OK)
- retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
- /* Dummy write to clock in the register */
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_DATA, 0x00);
- if (retval == ERROR_OK)
- retval = poll_ssp_busy(target, ssp_base, SSP_CMD_TIMEOUT);
- if (retval == ERROR_OK)
- retval = ssp_setcs(target, io_base, 1);
-
- if (retval == ERROR_OK)
- retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
- if (retval == ERROR_OK)
- *status = value;
-
- return retval;
-}
-
-/* check for BSY bit in flash status register */
-/* timeout in ms */
-static int wait_till_ready(struct flash_bank *bank, int timeout)
-{
- uint32_t status;
- int retval;
- long long endtime;
-
- endtime = timeval_ms() + timeout;
- do {
- /* read flash status register */
- retval = read_status_reg(bank, &status);
- if (retval != ERROR_OK)
- return retval;
-
- if ((status & SPIFLASH_BSY_BIT) == 0)
- return ERROR_OK;
- alive_sleep(1);
- } while (timeval_ms() < endtime);
-
- LOG_ERROR("timeout waiting for flash to finish write/erase operation");
- return ERROR_FAIL;
-}
-
-/* Send "write enable" command to SPI flash chip. */
-static int lpcspifi_write_enable(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t ssp_base = lpcspifi_info->ssp_base;
- uint32_t io_base = lpcspifi_info->io_base;
- uint32_t status, value;
- int retval = ERROR_OK;
-
- retval = ssp_setcs(target, io_base, 0);
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_DATA, SPIFLASH_WRITE_ENABLE);
- if (retval == ERROR_OK)
- retval = poll_ssp_busy(target, ssp_base, SSP_CMD_TIMEOUT);
- if (retval == ERROR_OK)
- retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
- if (retval == ERROR_OK)
- retval = ssp_setcs(target, io_base, 1);
-
- /* read flash status register */
- if (retval == ERROR_OK)
- retval = read_status_reg(bank, &status);
- if (retval != ERROR_OK)
- return retval;
-
- /* Check write enabled */
- if ((status & SPIFLASH_WE_BIT) == 0) {
- LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32, status);
- return ERROR_FAIL;
- }
-
- return retval;
-}
-
-static int lpcspifi_bulk_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t ssp_base = lpcspifi_info->ssp_base;
- uint32_t io_base = lpcspifi_info->io_base;
- uint32_t value;
- int retval = ERROR_OK;
-
- retval = lpcspifi_set_sw_mode(bank);
-
- if (retval == ERROR_OK)
- retval = lpcspifi_write_enable(bank);
-
- /* send SPI command "bulk erase" */
- if (retval == ERROR_OK)
- ssp_setcs(target, io_base, 0);
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_DATA, lpcspifi_info->dev->chip_erase_cmd);
- if (retval == ERROR_OK)
- retval = poll_ssp_busy(target, ssp_base, SSP_CMD_TIMEOUT);
- if (retval == ERROR_OK)
- retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
- if (retval == ERROR_OK)
- retval = ssp_setcs(target, io_base, 1);
-
- /* poll flash BSY for self-timed bulk erase */
- if (retval == ERROR_OK)
- retval = wait_till_ready(bank, bank->num_sectors*SSP_MAX_TIMEOUT);
-
- return retval;
-}
-
-static int lpcspifi_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- struct reg_param reg_params[4];
- struct armv7m_algorithm armv7m_info;
- struct working_area *erase_algorithm;
- int retval = ERROR_OK;
- int sector;
-
- LOG_DEBUG("erase from sector %d to sector %d", first, last);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
- LOG_ERROR("Flash sector invalid");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- if (!(lpcspifi_info->probed)) {
- LOG_ERROR("Flash bank not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- for (sector = first; sector <= last; sector++) {
- if (bank->sectors[sector].is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
- return ERROR_FAIL;
- }
- }
-
- /* If we're erasing the entire chip and the flash supports
- * it, use a bulk erase instead of going sector-by-sector. */
- if (first == 0 && last == (bank->num_sectors - 1)
- && lpcspifi_info->dev->chip_erase_cmd != lpcspifi_info->dev->erase_cmd) {
- LOG_DEBUG("Chip supports the bulk erase command."\
- " Will use bulk erase instead of sector-by-sector erase.");
- retval = lpcspifi_bulk_erase(bank);
-
- if (retval == ERROR_OK) {
- retval = lpcspifi_set_hw_mode(bank);
- return retval;
- } else
- LOG_WARNING("Bulk flash erase failed. Falling back to sector-by-sector erase.");
- }
-
- retval = lpcspifi_set_hw_mode(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* see contrib/loaders/flash/lpcspifi_erase.S for src */
- static const uint8_t lpcspifi_flash_erase_code[] = {
- 0x4f, 0xf4, 0xc0, 0x4a, 0xc4, 0xf2, 0x08, 0x0a,
- 0x4f, 0xf0, 0xea, 0x08, 0xca, 0xf8, 0x8c, 0x81,
- 0x4f, 0xf0, 0x40, 0x08, 0xca, 0xf8, 0x90, 0x81,
- 0x4f, 0xf0, 0x40, 0x08, 0xca, 0xf8, 0x94, 0x81,
- 0x4f, 0xf0, 0xed, 0x08, 0xca, 0xf8, 0x98, 0x81,
- 0x4f, 0xf0, 0xed, 0x08, 0xca, 0xf8, 0x9c, 0x81,
- 0x4f, 0xf0, 0x44, 0x08, 0xca, 0xf8, 0xa0, 0x81,
- 0x4f, 0xf4, 0xc0, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
- 0x4f, 0xf4, 0x00, 0x68, 0xca, 0xf8, 0x14, 0x80,
- 0x4f, 0xf4, 0x80, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
- 0x4f, 0xf0, 0xff, 0x08, 0xca, 0xf8, 0xab, 0x80,
- 0x4f, 0xf0, 0x00, 0x0a, 0xc4, 0xf2, 0x05, 0x0a,
- 0x4f, 0xf0, 0x00, 0x08, 0xc0, 0xf2, 0x00, 0x18,
- 0xca, 0xf8, 0x94, 0x80, 0x4f, 0xf4, 0x00, 0x5a,
- 0xc4, 0xf2, 0x05, 0x0a, 0x4f, 0xf0, 0x01, 0x08,
- 0xca, 0xf8, 0x00, 0x87, 0x4f, 0xf4, 0x40, 0x5a,
- 0xc4, 0xf2, 0x08, 0x0a, 0x4f, 0xf0, 0x07, 0x08,
- 0xca, 0xf8, 0x00, 0x80, 0x4f, 0xf0, 0x02, 0x08,
- 0xca, 0xf8, 0x10, 0x80, 0xca, 0xf8, 0x04, 0x80,
- 0x00, 0xf0, 0x52, 0xf8, 0x4f, 0xf0, 0x06, 0x09,
- 0x00, 0xf0, 0x3b, 0xf8, 0x00, 0xf0, 0x48, 0xf8,
- 0x00, 0xf0, 0x4a, 0xf8, 0x4f, 0xf0, 0x05, 0x09,
- 0x00, 0xf0, 0x33, 0xf8, 0x4f, 0xf0, 0x00, 0x09,
- 0x00, 0xf0, 0x2f, 0xf8, 0x00, 0xf0, 0x3c, 0xf8,
- 0x19, 0xf0, 0x02, 0x0f, 0x00, 0xf0, 0x45, 0x80,
- 0x00, 0xf0, 0x3a, 0xf8, 0x4f, 0xea, 0x02, 0x09,
- 0x00, 0xf0, 0x23, 0xf8, 0x4f, 0xea, 0x10, 0x49,
- 0x00, 0xf0, 0x1f, 0xf8, 0x4f, 0xea, 0x10, 0x29,
- 0x00, 0xf0, 0x1b, 0xf8, 0x4f, 0xea, 0x00, 0x09,
- 0x00, 0xf0, 0x17, 0xf8, 0x00, 0xf0, 0x24, 0xf8,
- 0x00, 0xf0, 0x26, 0xf8, 0x4f, 0xf0, 0x05, 0x09,
- 0x00, 0xf0, 0x0f, 0xf8, 0x4f, 0xf0, 0x00, 0x09,
- 0x00, 0xf0, 0x0b, 0xf8, 0x00, 0xf0, 0x18, 0xf8,
- 0x19, 0xf0, 0x01, 0x0f, 0x7f, 0xf4, 0xf0, 0xaf,
- 0x01, 0x39, 0xf9, 0xb1, 0x18, 0x44, 0xff, 0xf7,
- 0xbf, 0xbf, 0x4f, 0xf4, 0x40, 0x5a, 0xc4, 0xf2,
- 0x08, 0x0a, 0xca, 0xf8, 0x08, 0x90, 0xda, 0xf8,
- 0x0c, 0x90, 0x19, 0xf0, 0x10, 0x0f, 0x7f, 0xf4,
- 0xfa, 0xaf, 0xda, 0xf8, 0x08, 0x90, 0x70, 0x47,
- 0x4f, 0xf0, 0xff, 0x08, 0x00, 0xf0, 0x02, 0xb8,
- 0x4f, 0xf0, 0x00, 0x08, 0x4f, 0xf4, 0x80, 0x4a,
- 0xc4, 0xf2, 0x0f, 0x0a, 0xca, 0xf8, 0xab, 0x80,
- 0x70, 0x47, 0x00, 0x20, 0x00, 0xbe, 0xff, 0xff
- };
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
-
- /* Get memory for spifi initialization algorithm */
- retval = target_alloc_working_area(target, sizeof(lpcspifi_flash_erase_code),
- &erase_algorithm);
- if (retval != ERROR_OK) {
- LOG_ERROR("Insufficient working area. You must configure a working"\
- " area of at least %zdB in order to erase SPIFI flash.",
- sizeof(lpcspifi_flash_erase_code));
- return retval;
- }
-
- /* Write algorithm to working area */
- retval = target_write_buffer(target, erase_algorithm->address,
- sizeof(lpcspifi_flash_erase_code), lpcspifi_flash_erase_code);
- if (retval != ERROR_OK) {
- target_free_working_area(target, erase_algorithm);
- return retval;
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* Start address */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* Sector count */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* Erase command */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* Sector size */
-
- buf_set_u32(reg_params[0].value, 0, 32, bank->sectors[first].offset);
- buf_set_u32(reg_params[1].value, 0, 32, last - first + 1);
- buf_set_u32(reg_params[2].value, 0, 32, lpcspifi_info->dev->erase_cmd);
- buf_set_u32(reg_params[3].value, 0, 32, bank->sectors[first].size);
-
- /* Run the algorithm */
- retval = target_run_algorithm(target, 0 , NULL, 4, reg_params,
- erase_algorithm->address,
- erase_algorithm->address + sizeof(lpcspifi_flash_erase_code) - 4,
- 3000*(last - first + 1), &armv7m_info);
-
- if (retval != ERROR_OK)
- LOG_ERROR("Error executing flash erase algorithm");
-
- target_free_working_area(target, erase_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
-
- retval = lpcspifi_set_hw_mode(bank);
-
- return retval;
-}
-
-static int lpcspifi_protect(struct flash_bank *bank, int set,
- int first, int last)
-{
- int sector;
-
- for (sector = first; sector <= last; sector++)
- bank->sectors[sector].is_protected = set;
- return ERROR_OK;
-}
-
-static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t page_size, fifo_size;
- struct working_area *fifo;
- struct reg_param reg_params[5];
- struct armv7m_algorithm armv7m_info;
- struct working_area *write_algorithm;
- int sector;
- int retval = ERROR_OK;
-
- LOG_DEBUG("offset=0x%08" PRIx32 " count=0x%08" PRIx32,
- offset, count);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset + count > lpcspifi_info->dev->size_in_bytes) {
- LOG_WARNING("Writes past end of flash. Extra data discarded.");
- count = lpcspifi_info->dev->size_in_bytes - offset;
- }
-
- /* Check sector protection */
- for (sector = 0; sector < bank->num_sectors; sector++) {
- /* Start offset in or before this sector? */
- /* End offset in or behind this sector? */
- if ((offset <
- (bank->sectors[sector].offset + bank->sectors[sector].size))
- && ((offset + count - 1) >= bank->sectors[sector].offset)
- && bank->sectors[sector].is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
- return ERROR_FAIL;
- }
- }
-
- page_size = lpcspifi_info->dev->pagesize;
-
- retval = lpcspifi_set_hw_mode(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* see contrib/loaders/flash/lpcspifi_write.S for src */
- static const uint8_t lpcspifi_flash_write_code[] = {
- 0x4f, 0xf4, 0xc0, 0x4a, 0xc4, 0xf2, 0x08, 0x0a,
- 0x4f, 0xf0, 0xea, 0x08, 0xca, 0xf8, 0x8c, 0x81,
- 0x4f, 0xf0, 0x40, 0x08, 0xca, 0xf8, 0x90, 0x81,
- 0x4f, 0xf0, 0x40, 0x08, 0xca, 0xf8, 0x94, 0x81,
- 0x4f, 0xf0, 0xed, 0x08, 0xca, 0xf8, 0x98, 0x81,
- 0x4f, 0xf0, 0xed, 0x08, 0xca, 0xf8, 0x9c, 0x81,
- 0x4f, 0xf0, 0x44, 0x08, 0xca, 0xf8, 0xa0, 0x81,
- 0x4f, 0xf4, 0xc0, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
- 0x4f, 0xf4, 0x00, 0x68, 0xca, 0xf8, 0x14, 0x80,
- 0x4f, 0xf4, 0x80, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
- 0x4f, 0xf0, 0xff, 0x08, 0xca, 0xf8, 0xab, 0x80,
- 0x4f, 0xf0, 0x00, 0x0a, 0xc4, 0xf2, 0x05, 0x0a,
- 0x4f, 0xf0, 0x00, 0x08, 0xc0, 0xf2, 0x00, 0x18,
- 0xca, 0xf8, 0x94, 0x80, 0x4f, 0xf4, 0x00, 0x5a,
- 0xc4, 0xf2, 0x05, 0x0a, 0x4f, 0xf0, 0x01, 0x08,
- 0xca, 0xf8, 0x00, 0x87, 0x4f, 0xf4, 0x40, 0x5a,
- 0xc4, 0xf2, 0x08, 0x0a, 0x4f, 0xf0, 0x07, 0x08,
- 0xca, 0xf8, 0x00, 0x80, 0x4f, 0xf0, 0x02, 0x08,
- 0xca, 0xf8, 0x10, 0x80, 0xca, 0xf8, 0x04, 0x80,
- 0x4f, 0xf0, 0x00, 0x0b, 0xa3, 0x44, 0x93, 0x45,
- 0x7f, 0xf6, 0xfc, 0xaf, 0x00, 0xf0, 0x6a, 0xf8,
- 0x4f, 0xf0, 0x06, 0x09, 0x00, 0xf0, 0x53, 0xf8,
- 0x00, 0xf0, 0x60, 0xf8, 0x00, 0xf0, 0x62, 0xf8,
- 0x4f, 0xf0, 0x05, 0x09, 0x00, 0xf0, 0x4b, 0xf8,
- 0x4f, 0xf0, 0x00, 0x09, 0x00, 0xf0, 0x47, 0xf8,
- 0x00, 0xf0, 0x54, 0xf8, 0x19, 0xf0, 0x02, 0x0f,
- 0x00, 0xf0, 0x5d, 0x80, 0x00, 0xf0, 0x52, 0xf8,
- 0x4f, 0xf0, 0x02, 0x09, 0x00, 0xf0, 0x3b, 0xf8,
- 0x4f, 0xea, 0x12, 0x49, 0x00, 0xf0, 0x37, 0xf8,
- 0x4f, 0xea, 0x12, 0x29, 0x00, 0xf0, 0x33, 0xf8,
- 0x4f, 0xea, 0x02, 0x09, 0x00, 0xf0, 0x2f, 0xf8,
- 0xd0, 0xf8, 0x00, 0x80, 0xb8, 0xf1, 0x00, 0x0f,
- 0x00, 0xf0, 0x47, 0x80, 0x47, 0x68, 0x47, 0x45,
- 0x3f, 0xf4, 0xf6, 0xaf, 0x17, 0xf8, 0x01, 0x9b,
- 0x00, 0xf0, 0x21, 0xf8, 0x8f, 0x42, 0x28, 0xbf,
- 0x00, 0xf1, 0x08, 0x07, 0x47, 0x60, 0x01, 0x3b,
- 0xbb, 0xb3, 0x02, 0xf1, 0x01, 0x02, 0x93, 0x45,
- 0x7f, 0xf4, 0xe6, 0xaf, 0x00, 0xf0, 0x22, 0xf8,
- 0xa3, 0x44, 0x00, 0xf0, 0x23, 0xf8, 0x4f, 0xf0,
- 0x05, 0x09, 0x00, 0xf0, 0x0c, 0xf8, 0x4f, 0xf0,
- 0x00, 0x09, 0x00, 0xf0, 0x08, 0xf8, 0x00, 0xf0,
- 0x15, 0xf8, 0x19, 0xf0, 0x01, 0x0f, 0x7f, 0xf4,
- 0xf0, 0xaf, 0xff, 0xf7, 0xa7, 0xbf, 0x4f, 0xf4,
- 0x40, 0x5a, 0xc4, 0xf2, 0x08, 0x0a, 0xca, 0xf8,
- 0x08, 0x90, 0xda, 0xf8, 0x0c, 0x90, 0x19, 0xf0,
- 0x10, 0x0f, 0x7f, 0xf4, 0xfa, 0xaf, 0xda, 0xf8,
- 0x08, 0x90, 0x70, 0x47, 0x4f, 0xf0, 0xff, 0x08,
- 0x00, 0xf0, 0x02, 0xb8, 0x4f, 0xf0, 0x00, 0x08,
- 0x4f, 0xf4, 0x80, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
- 0xca, 0xf8, 0xab, 0x80, 0x70, 0x47, 0x00, 0x20,
- 0x50, 0x60, 0xff, 0xf7, 0xef, 0xff, 0x30, 0x46,
- 0x00, 0xbe, 0xff, 0xff
- };
-
- if (target_alloc_working_area(target, sizeof(lpcspifi_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_ERROR("Insufficient working area. You must configure"\
- " a working area > %zdB in order to write to SPIFI flash.",
- sizeof(lpcspifi_flash_write_code));
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(lpcspifi_flash_write_code),
- lpcspifi_flash_write_code);
- if (retval != ERROR_OK) {
- target_free_working_area(target, write_algorithm);
- return retval;
- }
-
- /* FIFO allocation */
- fifo_size = target_get_working_area_avail(target);
-
- if (fifo_size == 0) {
- /* if we already allocated the writing code but failed to get fifo
- * space, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_ERROR("Insufficient working area. Please allocate at least"\
- " %zdB of working area to enable flash writes.",
- sizeof(lpcspifi_flash_write_code) + 1
- );
-
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- } else if (fifo_size < page_size)
- LOG_WARNING("Working area size is limited; flash writes may be"\
- " slow. Increase working area size to at least %zdB"\
- " to reduce write times.",
- (size_t)(sizeof(lpcspifi_flash_write_code) + page_size)
- );
- else if (fifo_size > 0x2000) /* Beyond this point, we start to get diminishing returns */
- fifo_size = 0x2000;
-
- if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
- target_free_working_area(target, write_algorithm);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* target address */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* count (halfword-16bit) */
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* page size */
-
- buf_set_u32(reg_params[0].value, 0, 32, fifo->address);
- buf_set_u32(reg_params[1].value, 0, 32, fifo->address + fifo->size);
- buf_set_u32(reg_params[2].value, 0, 32, offset);
- buf_set_u32(reg_params[3].value, 0, 32, count);
- buf_set_u32(reg_params[4].value, 0, 32, page_size);
-
- retval = target_run_flash_async_algorithm(target, buffer, count, 1,
- 0, NULL,
- 5, reg_params,
- fifo->address, fifo->size,
- write_algorithm->address, 0,
- &armv7m_info
- );
-
- if (retval != ERROR_OK)
- LOG_ERROR("Error executing flash write algorithm");
-
- target_free_working_area(target, fifo);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- /* Switch to HW mode before return to prompt */
- retval = lpcspifi_set_hw_mode(bank);
- return retval;
-}
-
-/* Return ID of flash device */
-/* On exit, SW mode is kept */
-static int lpcspifi_read_flash_id(struct flash_bank *bank, uint32_t *id)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t ssp_base = lpcspifi_info->ssp_base;
- uint32_t io_base = lpcspifi_info->io_base;
- uint32_t value;
- uint8_t id_buf[3] = {0, 0, 0};
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_DEBUG("Getting ID");
- retval = lpcspifi_set_sw_mode(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* poll WIP */
- if (retval == ERROR_OK)
- retval = wait_till_ready(bank, SSP_PROBE_TIMEOUT);
-
- /* Send SPI command "read ID" */
- if (retval == ERROR_OK)
- retval = ssp_setcs(target, io_base, 0);
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_DATA, SPIFLASH_READ_ID);
- if (retval == ERROR_OK)
- retval = poll_ssp_busy(target, ssp_base, SSP_CMD_TIMEOUT);
- if (retval == ERROR_OK)
- retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
-
- /* Dummy write to clock in data */
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_DATA, 0x00);
- if (retval == ERROR_OK)
- retval = poll_ssp_busy(target, ssp_base, SSP_CMD_TIMEOUT);
- if (retval == ERROR_OK)
- retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
- if (retval == ERROR_OK)
- id_buf[0] = value;
-
- /* Dummy write to clock in data */
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_DATA, 0x00);
- if (retval == ERROR_OK)
- retval = poll_ssp_busy(target, ssp_base, SSP_CMD_TIMEOUT);
- if (retval == ERROR_OK)
- retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
- if (retval == ERROR_OK)
- id_buf[1] = value;
-
- /* Dummy write to clock in data */
- if (retval == ERROR_OK)
- retval = ssp_write_reg(target, ssp_base, SSP_DATA, 0x00);
- if (retval == ERROR_OK)
- retval = poll_ssp_busy(target, ssp_base, SSP_CMD_TIMEOUT);
- if (retval == ERROR_OK)
- retval = ssp_read_reg(target, ssp_base, SSP_DATA, &value);
- if (retval == ERROR_OK)
- id_buf[2] = value;
-
- if (retval == ERROR_OK)
- retval = ssp_setcs(target, io_base, 1);
- if (retval == ERROR_OK)
- *id = id_buf[2] << 16 | id_buf[1] << 8 | id_buf[0];
-
- return retval;
-}
-
-static int lpcspifi_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- uint32_t ssp_base;
- uint32_t io_base;
- uint32_t ioconfig_base;
- struct flash_sector *sectors;
- uint32_t id = 0; /* silence uninitialized warning */
- const struct lpcspifi_target *target_device;
- int retval;
-
- /* If we've already probed, we should be fine to skip this time. */
- if (lpcspifi_info->probed)
- return ERROR_OK;
- lpcspifi_info->probed = 0;
-
- for (target_device = target_devices ; target_device->name ; ++target_device)
- if (target_device->tap_idcode == target->tap->idcode)
- break;
- if (!target_device->name) {
- LOG_ERROR("Device ID 0x%" PRIx32 " is not known as SPIFI capable",
- target->tap->idcode);
- return ERROR_FAIL;
- }
-
- ssp_base = target_device->ssp_base;
- io_base = target_device->io_base;
- ioconfig_base = target_device->ioconfig_base;
- lpcspifi_info->ssp_base = ssp_base;
- lpcspifi_info->io_base = io_base;
- lpcspifi_info->ioconfig_base = ioconfig_base;
- lpcspifi_info->bank_num = bank->bank_number;
-
- LOG_DEBUG("Valid SPIFI on device %s at address 0x%" PRIx32,
- target_device->name, bank->base);
-
- /* read and decode flash ID; returns in SW mode */
- retval = lpcspifi_read_flash_id(bank, &id);
- if (retval != ERROR_OK)
- return retval;
-
- retval = lpcspifi_set_hw_mode(bank);
- if (retval != ERROR_OK)
- return retval;
-
- lpcspifi_info->dev = NULL;
- for (const struct flash_device *p = flash_devices; p->name ; p++)
- if (p->device_id == id) {
- lpcspifi_info->dev = p;
- break;
- }
-
- if (!lpcspifi_info->dev) {
- LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
- return ERROR_FAIL;
- }
-
- LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")",
- lpcspifi_info->dev->name, lpcspifi_info->dev->device_id);
-
- /* Set correct size value */
- bank->size = lpcspifi_info->dev->size_in_bytes;
-
- /* create and fill sectors array */
- bank->num_sectors =
- lpcspifi_info->dev->size_in_bytes / lpcspifi_info->dev->sectorsize;
- sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- if (sectors == NULL) {
- LOG_ERROR("not enough memory");
- return ERROR_FAIL;
- }
-
- for (int sector = 0; sector < bank->num_sectors; sector++) {
- sectors[sector].offset = sector * lpcspifi_info->dev->sectorsize;
- sectors[sector].size = lpcspifi_info->dev->sectorsize;
- sectors[sector].is_erased = -1;
- sectors[sector].is_protected = 0;
- }
-
- bank->sectors = sectors;
-
- lpcspifi_info->probed = 1;
- return ERROR_OK;
-}
-
-static int lpcspifi_auto_probe(struct flash_bank *bank)
-{
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
- if (lpcspifi_info->probed)
- return ERROR_OK;
- return lpcspifi_probe(bank);
-}
-
-static int lpcspifi_protect_check(struct flash_bank *bank)
-{
- /* Nothing to do. Protection is only handled in SW. */
- return ERROR_OK;
-}
-
-static int get_lpcspifi_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
-
- if (!(lpcspifi_info->probed)) {
- snprintf(buf, buf_size,
- "\nSPIFI flash bank not probed yet\n");
- return ERROR_OK;
- }
-
- snprintf(buf, buf_size, "\nSPIFI flash information:\n"
- " Device \'%s\' (ID 0x%08" PRIx32 ")\n",
- lpcspifi_info->dev->name, lpcspifi_info->dev->device_id);
-
- return ERROR_OK;
-}
-
-struct flash_driver lpcspifi_flash = {
- .name = "lpcspifi",
- .flash_bank_command = lpcspifi_flash_bank_command,
- .erase = lpcspifi_erase,
- .protect = lpcspifi_protect,
- .write = lpcspifi_write,
- .read = default_flash_read,
- .probe = lpcspifi_probe,
- .auto_probe = lpcspifi_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = lpcspifi_protect_check,
- .info = get_lpcspifi_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/mdr.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/mdr.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/mdr.c
deleted file mode 100755
index c402e64..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/mdr.c
+++ /dev/null
@@ -1,630 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * *
- * Copyright (C) 2013 by Paul Fertser *
- * fercerpav@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-#define MD_RST_CLK 0x40020000
-#define MD_PER_CLOCK (MD_RST_CLK + 0x1C)
-#define MD_PER_CLOCK_EEPROM (1 << 3)
-#define MD_PER_CLOCK_RST_CLK (1 << 4)
-
-#define FLASH_REG_BASE 0x40018000
-#define FLASH_CMD (FLASH_REG_BASE + 0x00)
-#define FLASH_ADR (FLASH_REG_BASE + 0x04)
-#define FLASH_DI (FLASH_REG_BASE + 0x08)
-#define FLASH_DO (FLASH_REG_BASE + 0x0C)
-#define FLASH_KEY (FLASH_REG_BASE + 0x10)
-
-#define FLASH_NVSTR (1 << 13)
-#define FLASH_PROG (1 << 12)
-#define FLASH_MAS1 (1 << 11)
-#define FLASH_ERASE (1 << 10)
-#define FLASH_IFREN (1 << 9)
-#define FLASH_SE (1 << 8)
-#define FLASH_YE (1 << 7)
-#define FLASH_XE (1 << 6)
-#define FLASH_RD (1 << 2)
-#define FLASH_WR (1 << 1)
-#define FLASH_CON (1 << 0)
-#define FLASH_DELAY_MASK (7 << 3)
-
-#define KEY 0x8AAA5551
-
-struct mdr_flash_bank {
- int probed;
- unsigned int mem_type;
- unsigned int page_count;
- unsigned int sec_count;
-};
-
-/* flash bank <name> mdr <base> <size> 0 0 <target#> <type> <page_count> <sec_count> */
-FLASH_BANK_COMMAND_HANDLER(mdr_flash_bank_command)
-{
- struct mdr_flash_bank *mdr_info;
-
- if (CMD_ARGC < 9)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- mdr_info = malloc(sizeof(struct mdr_flash_bank));
-
- bank->driver_priv = mdr_info;
- mdr_info->probed = 0;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[6], mdr_info->mem_type);
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[7], mdr_info->page_count);
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[8], mdr_info->sec_count);
- return ERROR_OK;
-}
-
-static int mdr_protect_check(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-static int mdr_mass_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct mdr_flash_bank *mdr_info = bank->driver_priv;
- uint32_t flash_cmd;
- int retval;
- unsigned int i;
-
- retval = target_read_u32(target, FLASH_CMD, &flash_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- for (i = 0; i < mdr_info->sec_count; i++) {
- retval = target_write_u32(target, FLASH_ADR, i << 2);
- if (retval != ERROR_OK)
- return retval;
-
- flash_cmd |= FLASH_XE | FLASH_MAS1 | FLASH_ERASE;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- return retval;
- flash_cmd |= FLASH_NVSTR;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- return retval;
- flash_cmd &= ~FLASH_ERASE;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- return retval;
- flash_cmd &= ~(FLASH_XE | FLASH_MAS1 | FLASH_NVSTR);
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-static int mdr_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- struct mdr_flash_bank *mdr_info = bank->driver_priv;
- int i, retval, retval2;
- unsigned int j;
- uint32_t flash_cmd, cur_per_clock;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = target_read_u32(target, MD_PER_CLOCK, &cur_per_clock);
- if (retval != ERROR_OK)
- return retval;
-
- if (!(cur_per_clock & 0x10)) {
- LOG_ERROR("Target needs reset before flash operations");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- retval = target_write_u32(target, MD_PER_CLOCK, cur_per_clock | MD_PER_CLOCK_EEPROM);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, FLASH_KEY, KEY);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, FLASH_CMD, &flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- /* Switch on register access */
- flash_cmd = (flash_cmd & FLASH_DELAY_MASK) | FLASH_CON;
- if (mdr_info->mem_type)
- flash_cmd |= FLASH_IFREN;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- if ((first == 0) && (last == (bank->num_sectors - 1))) {
- retval = mdr_mass_erase(bank);
- goto reset_pg_and_lock;
- }
-
- unsigned int page_size = bank->size / mdr_info->page_count;
- for (i = first; i <= last; i++) {
- for (j = 0; j < mdr_info->sec_count; j++) {
- retval = target_write_u32(target, FLASH_ADR, (i * page_size) | (j << 2));
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- flash_cmd |= FLASH_XE | FLASH_ERASE;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- flash_cmd |= FLASH_NVSTR;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- flash_cmd &= ~FLASH_ERASE;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- flash_cmd &= ~(FLASH_XE | FLASH_NVSTR);
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- }
- bank->sectors[i].is_erased = 1;
- }
-
-reset_pg_and_lock:
- flash_cmd &= FLASH_DELAY_MASK;
- retval2 = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval == ERROR_OK)
- retval = retval2;
-
- retval2 = target_write_u32(target, FLASH_KEY, 0);
- if (retval == ERROR_OK)
- retval = retval2;
-
- return retval;
-}
-
-static int mdr_protect(struct flash_bank *bank, int set, int first, int last)
-{
- return ERROR_OK;
-}
-
-static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[5];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* see contrib/loaders/flash/mdr32fx.S for src */
- static const uint8_t mdr32fx_flash_write_code[] = {
- 0x07, 0x68, 0x16, 0x68, 0x00, 0x2e, 0x2e, 0xd0, 0x55, 0x68, 0xb5, 0x42,
- 0xf9, 0xd0, 0x2e, 0x68, 0x44, 0x60, 0x86, 0x60, 0x17, 0x4e, 0x37, 0x43,
- 0x07, 0x60, 0x05, 0x26, 0x00, 0xf0, 0x25, 0xf8, 0x15, 0x4e, 0x37, 0x43,
- 0x07, 0x60, 0x0d, 0x26, 0x00, 0xf0, 0x1f, 0xf8, 0x80, 0x26, 0x37, 0x43,
- 0x07, 0x60, 0x3d, 0x26, 0x00, 0xf0, 0x19, 0xf8, 0x80, 0x26, 0xb7, 0x43,
- 0x07, 0x60, 0x0f, 0x4e, 0xb7, 0x43, 0x07, 0x60, 0x05, 0x26, 0x00, 0xf0,
- 0x10, 0xf8, 0x0d, 0x4e, 0xb7, 0x43, 0x07, 0x60, 0x04, 0x35, 0x04, 0x34,
- 0x9d, 0x42, 0x01, 0xd3, 0x15, 0x46, 0x08, 0x35, 0x55, 0x60, 0x01, 0x39,
- 0x00, 0x29, 0x00, 0xd0, 0xcd, 0xe7, 0x30, 0x46, 0x00, 0xbe, 0x01, 0x3e,
- 0x00, 0x2e, 0xfc, 0xd1, 0x70, 0x47, 0x00, 0x00, 0x40, 0x10, 0x00, 0x00,
- 0x00, 0x20, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x40, 0x20, 0x00, 0x00
- };
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(mdr32fx_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(mdr32fx_flash_write_code), mdr32fx_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (32bit) */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer start */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[4], "r4", 32, PARAM_IN_OUT); /* target address */
-
- buf_set_u32(reg_params[0].value, 0, 32, FLASH_REG_BASE);
- buf_set_u32(reg_params[1].value, 0, 32, count);
- buf_set_u32(reg_params[2].value, 0, 32, source->address);
- buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[4].value, 0, 32, address);
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- retval = target_run_flash_async_algorithm(target, buffer, count, 4,
- 0, NULL,
- 5, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- if (retval == ERROR_FLASH_OPERATION_FAILED)
- LOG_ERROR("flash write failed at address 0x%"PRIx32,
- buf_get_u32(reg_params[4].value, 0, 32));
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return retval;
-}
-
-static int mdr_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct mdr_flash_bank *mdr_info = bank->driver_priv;
- uint8_t *new_buffer = NULL;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x3) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* If there's an odd number of bytes, the data has to be padded. Duplicate
- * the buffer and use the normal code path with a single block write since
- * it's probably cheaper than to special case the last odd write using
- * discrete accesses. */
- int rem = count % 4;
- if (rem) {
- new_buffer = malloc(count + rem);
- if (new_buffer == NULL) {
- LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("odd number of bytes to write, padding with 0xff");
- buffer = memcpy(new_buffer, buffer, count);
- while (rem--)
- new_buffer[count++] = 0xff;
- }
-
- uint32_t flash_cmd, cur_per_clock;
- int retval, retval2;
-
- retval = target_read_u32(target, MD_PER_CLOCK, &cur_per_clock);
- if (retval != ERROR_OK)
- goto free_buffer;
-
- if (!(cur_per_clock & MD_PER_CLOCK_RST_CLK)) {
- /* Something's very wrong if the RST_CLK module is not clocked */
- LOG_ERROR("Target needs reset before flash operations");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto free_buffer;
- }
-
- retval = target_write_u32(target, MD_PER_CLOCK, cur_per_clock | MD_PER_CLOCK_EEPROM);
- if (retval != ERROR_OK)
- goto free_buffer;
-
- retval = target_write_u32(target, FLASH_KEY, KEY);
- if (retval != ERROR_OK)
- goto free_buffer;
-
- retval = target_read_u32(target, FLASH_CMD, &flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- /* Switch on register access */
- flash_cmd = (flash_cmd & FLASH_DELAY_MASK) | FLASH_CON;
- if (mdr_info->mem_type)
- flash_cmd |= FLASH_IFREN;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- /* try using block write */
- retval = mdr_write_block(bank, buffer, offset, count/4);
-
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single halfword accesses */
- LOG_WARNING("Can't use block writes, falling back to single memory accesses");
-
- unsigned int page_size = bank->size / mdr_info->page_count;
- unsigned int page_mask = page_size - 1;
- while (count > 0) {
- unsigned int i, j;
- unsigned int cur_page = offset & ~page_mask;
- unsigned int bytes_to_write = cur_page + page_size - offset;
- if (count < bytes_to_write)
- bytes_to_write = count;
-
- /*LOG_INFO("Selecting next page: %08x", cur_page);*/
-
- for (i = 0; i < mdr_info->sec_count; i++) {
- retval = target_write_u32(target, FLASH_ADR, offset + i*4);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- /*LOG_INFO("Selecting page/sector: %08x", offset + i*4);*/
-
- flash_cmd |= FLASH_XE | FLASH_PROG;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- flash_cmd |= FLASH_NVSTR;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- for (j = 0;
- (((offset + j + i*4) & ~page_mask) == cur_page) &&
- (j + i*4 < count);
- j += mdr_info->sec_count*4) {
- uint32_t value;
- memcpy(&value, buffer + j + i*4, sizeof(uint32_t));
- retval = target_write_u32(target, FLASH_DI, value);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- /*LOG_INFO("Writing to addr %08x", offset + j + i*4);*/
- retval = target_write_u32(target, FLASH_ADR, offset + j + i*4);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- flash_cmd |= FLASH_YE;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- flash_cmd &= ~FLASH_YE;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- }
- flash_cmd &= ~FLASH_NVSTR;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- flash_cmd &= ~(FLASH_XE | FLASH_PROG);
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- }
-
- buffer += bytes_to_write;
- offset += bytes_to_write;
- count -= bytes_to_write;
- }
- }
-
-reset_pg_and_lock:
- flash_cmd &= FLASH_DELAY_MASK;
- retval2 = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval == ERROR_OK)
- retval = retval2;
-
- retval2 = target_write_u32(target, FLASH_KEY, 0);
- if (retval == ERROR_OK)
- retval = retval2;
-
-free_buffer:
- if (new_buffer)
- free(new_buffer);
-
- return retval;
-}
-
-static int mdr_read(struct flash_bank *bank, uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct mdr_flash_bank *mdr_info = bank->driver_priv;
- int retval, retval2;
-
- if (!mdr_info->mem_type)
- return default_flash_read(bank, buffer, offset, count);
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x3) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- if (count & 0x3) {
- LOG_ERROR("count 0x%" PRIx32 " breaks required 4-byte alignment", count);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- uint32_t flash_cmd, cur_per_clock;
-
- retval = target_read_u32(target, MD_PER_CLOCK, &cur_per_clock);
- if (retval != ERROR_OK)
- goto err;
-
- if (!(cur_per_clock & MD_PER_CLOCK_RST_CLK)) {
- /* Something's very wrong if the RST_CLK module is not clocked */
- LOG_ERROR("Target needs reset before flash operations");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err;
- }
-
- retval = target_write_u32(target, MD_PER_CLOCK, cur_per_clock | MD_PER_CLOCK_EEPROM);
- if (retval != ERROR_OK)
- goto err;
-
- retval = target_write_u32(target, FLASH_KEY, KEY);
- if (retval != ERROR_OK)
- goto err;
-
- retval = target_read_u32(target, FLASH_CMD, &flash_cmd);
- if (retval != ERROR_OK)
- goto err_lock;
-
- /* Switch on register access */
- flash_cmd = (flash_cmd & FLASH_DELAY_MASK) | FLASH_CON | FLASH_IFREN;
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- for (uint32_t i = 0; i < count; i += 4) {
- retval = target_write_u32(target, FLASH_ADR, offset + i);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- retval = target_write_u32(target, FLASH_CMD, flash_cmd |
- FLASH_XE | FLASH_YE | FLASH_SE);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- uint32_t buf;
- retval = target_read_u32(target, FLASH_DO, &buf);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- buf_set_u32(buffer, i * 8, 32, buf);
-
- retval = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- }
-
-reset_pg_and_lock:
- flash_cmd &= FLASH_DELAY_MASK;
- retval2 = target_write_u32(target, FLASH_CMD, flash_cmd);
- if (retval == ERROR_OK)
- retval = retval2;
-
-err_lock:
- retval2 = target_write_u32(target, FLASH_KEY, 0);
- if (retval == ERROR_OK)
- retval = retval2;
-
-err:
- return retval;
-}
-
-static int mdr_probe(struct flash_bank *bank)
-{
- struct mdr_flash_bank *mdr_info = bank->driver_priv;
- unsigned int page_count, page_size, i;
-
- page_count = mdr_info->page_count;
- page_size = bank->size / page_count;
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->num_sectors = page_count;
- bank->sectors = malloc(sizeof(struct flash_sector) * page_count);
-
- for (i = 0; i < page_count; i++) {
- bank->sectors[i].offset = i * page_size;
- bank->sectors[i].size = page_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 0;
- }
-
- mdr_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int mdr_auto_probe(struct flash_bank *bank)
-{
- struct mdr_flash_bank *mdr_info = bank->driver_priv;
- if (mdr_info->probed)
- return ERROR_OK;
- return mdr_probe(bank);
-}
-
-static int get_mdr_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct mdr_flash_bank *mdr_info = bank->driver_priv;
- snprintf(buf, buf_size, "MDR32Fx - %s",
- mdr_info->mem_type ? "info memory" : "main memory");
-
- return ERROR_OK;
-}
-
-struct flash_driver mdr_flash = {
- .name = "mdr",
- .usage = "flash bank <name> mdr <base> <size> 0 0 <target#> <type> <page_count> <sec_count>\n"
- "<type>: 0 for main memory, 1 for info memory",
- .flash_bank_command = mdr_flash_bank_command,
- .erase = mdr_erase,
- .protect = mdr_protect,
- .write = mdr_write,
- .read = mdr_read,
- .probe = mdr_probe,
- .auto_probe = mdr_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = mdr_protect_check,
- .info = get_mdr_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/mrvlqspi.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/mrvlqspi.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/mrvlqspi.c
deleted file mode 100755
index 21fc91b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/mrvlqspi.c
+++ /dev/null
@@ -1,961 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2014 by Mahavir Jain <mj...@marvell.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- * *
- ***************************************************************************/
-
- /*
- * This is QSPI flash controller driver for Marvell's Wireless
- * Microcontroller platform.
- *
- * For more information please refer,
- * https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "spi.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-#define QSPI_R_EN (0x0)
-#define QSPI_W_EN (0x1)
-#define QSPI_SS_DISABLE (0x0)
-#define QSPI_SS_ENABLE (0x1)
-#define WRITE_DISBALE (0x0)
-#define WRITE_ENABLE (0x1)
-
-#define QSPI_TIMEOUT (1000)
-#define FIFO_FLUSH_TIMEOUT (1000)
-#define BLOCK_ERASE_TIMEOUT (1000)
-#define CHIP_ERASE_TIMEOUT (10000)
-
-#define SS_EN (1 << 0)
-#define XFER_RDY (1 << 1)
-#define RFIFO_EMPTY (1 << 4)
-#define WFIFO_EMPTY (1 << 6)
-#define WFIFO_FULL (1 << 7)
-#define FIFO_FLUSH (1 << 9)
-#define RW_EN (1 << 13)
-#define XFER_STOP (1 << 14)
-#define XFER_START (1 << 15)
-#define CONF_MASK (0x7)
-#define CONF_OFFSET (10)
-
-#define INS_WRITE_ENABLE 0x06
-#define INS_WRITE_DISABLE 0x04
-#define INS_READ_STATUS 0x05
-#define INS_PAGE_PROGRAM 0x02
-
-#define CNTL 0x0 /* QSPI_BASE + 0x0 */
-#define CONF 0x4
-#define DOUT 0x8
-#define DIN 0xc
-#define INSTR 0x10
-#define ADDR 0x14
-#define RDMODE 0x18
-#define HDRCNT 0x1c
-#define DINCNT 0x20
-
-struct mrvlqspi_flash_bank {
- int probed;
- uint32_t reg_base;
- uint32_t bank_num;
- const struct flash_device *dev;
-};
-
-static inline uint32_t mrvlqspi_get_reg(struct flash_bank *bank, uint32_t reg)
-{
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
- return reg + mrvlqspi_info->reg_base;
-}
-
-static inline int mrvlqspi_set_din_cnt(struct flash_bank *bank, uint32_t count)
-{
- struct target *target = bank->target;
-
- return target_write_u32(target, mrvlqspi_get_reg(bank, DINCNT), count);
-}
-
-static inline int mrvlqspi_set_addr(struct flash_bank *bank, uint32_t addr)
-{
- struct target *target = bank->target;
-
- return target_write_u32(target, mrvlqspi_get_reg(bank, ADDR), addr);
-}
-
-static inline int mrvlqspi_set_instr(struct flash_bank *bank, uint32_t instr)
-{
- struct target *target = bank->target;
-
- return target_write_u32(target, mrvlqspi_get_reg(bank, INSTR), instr);
-}
-
-static inline int mrvlqspi_set_hdr_cnt(struct flash_bank *bank, uint32_t hdr_cnt)
-{
- struct target *target = bank->target;
-
- return target_write_u32(target, mrvlqspi_get_reg(bank, HDRCNT), hdr_cnt);
-}
-
-static int mrvlqspi_set_conf(struct flash_bank *bank, uint32_t conf_val)
-{
- int retval;
- uint32_t regval;
- struct target *target = bank->target;
-
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CONF), ®val);
- if (retval != ERROR_OK)
- return retval;
-
- regval &= ~(CONF_MASK << CONF_OFFSET);
- regval |= (conf_val << CONF_OFFSET);
-
- return target_write_u32(target,
- mrvlqspi_get_reg(bank, CONF), regval);
-}
-
-static int mrvlqspi_set_ss_state(struct flash_bank *bank, bool state, int timeout)
-{
- int retval;
- uint32_t regval;
- struct target *target = bank->target;
-
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CNTL), ®val);
- if (retval != ERROR_OK)
- return retval;
-
- if (state)
- regval |= SS_EN;
- else
- regval &= ~(SS_EN);
-
- retval = target_write_u32(target,
- mrvlqspi_get_reg(bank, CNTL), regval);
- if (retval != ERROR_OK)
- return retval;
-
- /* wait for xfer_ready to set */
- for (;;) {
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CNTL), ®val);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%08" PRIx32, regval);
- if ((regval & XFER_RDY) == XFER_RDY)
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
- return ERROR_OK;
-}
-
-static int mrvlqspi_start_transfer(struct flash_bank *bank, bool rw_mode)
-{
- int retval;
- uint32_t regval;
- struct target *target = bank->target;
-
- retval = mrvlqspi_set_ss_state(bank, QSPI_SS_ENABLE, QSPI_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CONF), ®val);
- if (retval != ERROR_OK)
- return retval;
-
- if (rw_mode)
- regval |= RW_EN;
- else
- regval &= ~(RW_EN);
-
- regval |= XFER_START;
-
- retval = target_write_u32(target,
- mrvlqspi_get_reg(bank, CONF), regval);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int mrvlqspi_stop_transfer(struct flash_bank *bank)
-{
- int retval;
- uint32_t regval;
- struct target *target = bank->target;
- int timeout = QSPI_TIMEOUT;
-
- /* wait for xfer_ready and wfifo_empty to set */
- for (;;) {
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CNTL), ®val);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%08" PRIx32, regval);
- if ((regval & (XFER_RDY | WFIFO_EMPTY)) ==
- (XFER_RDY | WFIFO_EMPTY))
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
-
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CONF), ®val);
- if (retval != ERROR_OK)
- return retval;
-
- regval |= XFER_STOP;
-
- retval = target_write_u32(target,
- mrvlqspi_get_reg(bank, CONF), regval);
- if (retval != ERROR_OK)
- return retval;
-
- /* wait for xfer_start to reset */
- for (;;) {
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CONF), ®val);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%08" PRIx32, regval);
- if ((regval & XFER_START) == 0)
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
-
- retval = mrvlqspi_set_ss_state(bank, QSPI_SS_DISABLE, QSPI_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int mrvlqspi_fifo_flush(struct flash_bank *bank, int timeout)
-{
- int retval;
- uint32_t val;
- struct target *target = bank->target;
-
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CONF), &val);
- if (retval != ERROR_OK)
- return retval;
-
- val |= FIFO_FLUSH;
-
- retval = target_write_u32(target,
- mrvlqspi_get_reg(bank, CONF), val);
- if (retval != ERROR_OK)
- return retval;
-
- /* wait for fifo_flush to clear */
- for (;;) {
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CONF), &val);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%08" PRIX32, val);
- if ((val & FIFO_FLUSH) == 0)
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
- return ERROR_OK;
-}
-
-static int mrvlqspi_read_byte(struct flash_bank *bank, uint8_t *data)
-{
- int retval;
- uint32_t val;
- struct target *target = bank->target;
-
- /* wait for rfifo_empty to reset */
- for (;;) {
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, CNTL), &val);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%08" PRIx32, val);
- if ((val & RFIFO_EMPTY) == 0)
- break;
- usleep(10);
- }
-
- retval = target_read_u32(target,
- mrvlqspi_get_reg(bank, DIN), &val);
- if (retval != ERROR_OK)
- return retval;
-
- *data = val & 0xFF;
-
- return ERROR_OK;
-}
-
-static int mrvlqspi_flash_busy_status(struct flash_bank *bank, int timeout)
-{
- uint8_t val;
- int retval;
-
- /* Flush read/write fifo's */
- retval = mrvlqspi_fifo_flush(bank, FIFO_FLUSH_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction/addr count value */
- retval = mrvlqspi_set_hdr_cnt(bank, 0x1);
- if (retval != ERROR_OK)
- return retval;
-
- /* Read flash status register in continuous manner */
- retval = mrvlqspi_set_din_cnt(bank, 0x0);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction */
- retval = mrvlqspi_set_instr(bank, INS_READ_STATUS);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set data and addr pin length */
- retval = mrvlqspi_set_conf(bank, 0x0);
- if (retval != ERROR_OK)
- return retval;
-
- /* Enable read mode transfer */
- retval = mrvlqspi_start_transfer(bank, QSPI_R_EN);
- if (retval != ERROR_OK)
- return retval;
-
- for (;;) {
- retval = mrvlqspi_read_byte(bank, &val);
- if (retval != ERROR_OK)
- return retval;
- if (!(val & 0x1))
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
-
- return mrvlqspi_stop_transfer(bank);
-}
-
-static int mrvlqspi_set_write_status(struct flash_bank *bank, bool mode)
-{
- int retval;
- uint32_t instr;
-
- /* Flush read/write fifo's */
- retval = mrvlqspi_fifo_flush(bank, FIFO_FLUSH_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction/addr count value */
- retval = mrvlqspi_set_hdr_cnt(bank, 0x1);
- if (retval != ERROR_OK)
- return retval;
-
- if (mode)
- instr = INS_WRITE_ENABLE;
- else
- instr = INS_WRITE_DISABLE;
-
- /* Set instruction */
- retval = mrvlqspi_set_instr(bank, instr);
- if (retval != ERROR_OK)
- return retval;
-
- retval = mrvlqspi_start_transfer(bank, QSPI_W_EN);
- if (retval != ERROR_OK)
- return retval;
-
- retval = mrvlqspi_stop_transfer(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return retval;
-}
-
-static int mrvlqspi_read_id(struct flash_bank *bank, uint32_t *id)
-{
- uint8_t id_buf[3] = {0, 0, 0};
- int retval, i;
-
- LOG_DEBUG("Getting ID");
-
- /* Flush read/write fifo's */
- retval = mrvlqspi_fifo_flush(bank, FIFO_FLUSH_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction/addr count value */
- retval = mrvlqspi_set_hdr_cnt(bank, 0x1);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set count for number of bytes to read */
- retval = mrvlqspi_set_din_cnt(bank, 0x3);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction */
- retval = mrvlqspi_set_instr(bank, SPIFLASH_READ_ID);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set data and addr pin length */
- retval = mrvlqspi_set_conf(bank, 0x0);
- if (retval != ERROR_OK)
- return retval;
-
- retval = mrvlqspi_start_transfer(bank, QSPI_R_EN);
- if (retval != ERROR_OK)
- return retval;
-
- for (i = 0; i < 3; i++) {
- retval = mrvlqspi_read_byte(bank, &id_buf[i]);
- if (retval != ERROR_OK)
- return retval;
- }
-
- LOG_DEBUG("ID is 0x%02" PRIx8 " 0x%02" PRIx8 " 0x%02" PRIx8,
- id_buf[0], id_buf[1], id_buf[2]);
- retval = mrvlqspi_set_ss_state(bank, QSPI_SS_DISABLE, QSPI_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- *id = id_buf[2] << 16 | id_buf[1] << 8 | id_buf[0];
- return ERROR_OK;
-}
-
-static int mrvlqspi_block_erase(struct flash_bank *bank, uint32_t offset)
-{
- int retval;
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
-
- /* Set flash write enable */
- retval = mrvlqspi_set_write_status(bank, WRITE_ENABLE);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction/addr count value */
- retval = mrvlqspi_set_hdr_cnt(bank, (0x1 | (0x3 << 4)));
- if (retval != ERROR_OK)
- return retval;
-
- /* Set read offset address */
- retval = mrvlqspi_set_addr(bank, offset);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction */
- retval = mrvlqspi_set_instr(bank, mrvlqspi_info->dev->erase_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- retval = mrvlqspi_start_transfer(bank, QSPI_W_EN);
- if (retval != ERROR_OK)
- return retval;
-
- retval = mrvlqspi_stop_transfer(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return mrvlqspi_flash_busy_status(bank, BLOCK_ERASE_TIMEOUT);
-}
-
-static int mrvlqspi_bulk_erase(struct flash_bank *bank)
-{
- int retval;
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
-
- /* Set flash write enable */
- retval = mrvlqspi_set_write_status(bank, WRITE_ENABLE);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction */
- retval = mrvlqspi_set_instr(bank, mrvlqspi_info->dev->chip_erase_cmd);
- if (retval != ERROR_OK)
- return retval;
-
- retval = mrvlqspi_start_transfer(bank, QSPI_W_EN);
- if (retval != ERROR_OK)
- return retval;
-
- retval = mrvlqspi_stop_transfer(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return mrvlqspi_flash_busy_status(bank, CHIP_ERASE_TIMEOUT);
-}
-
-static int mrvlqspi_flash_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
- int retval = ERROR_OK;
- int sector;
-
- LOG_DEBUG("erase from sector %d to sector %d", first, last);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
- LOG_ERROR("Flash sector invalid");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- if (!(mrvlqspi_info->probed)) {
- LOG_ERROR("Flash bank not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- for (sector = first; sector <= last; sector++) {
- if (bank->sectors[sector].is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
- return ERROR_FAIL;
- }
- }
-
- /* If we're erasing the entire chip and the flash supports
- * it, use a bulk erase instead of going sector-by-sector. */
- if (first == 0 && last == (bank->num_sectors - 1)
- && mrvlqspi_info->dev->chip_erase_cmd !=
- mrvlqspi_info->dev->erase_cmd) {
- LOG_DEBUG("Chip supports the bulk erase command."\
- " Will use bulk erase instead of sector-by-sector erase.");
- retval = mrvlqspi_bulk_erase(bank);
- if (retval == ERROR_OK) {
- return retval;
- } else
- LOG_WARNING("Bulk flash erase failed."
- " Falling back to sector-by-sector erase.");
- }
-
- for (sector = first; sector <= last; sector++) {
- retval = mrvlqspi_block_erase(bank,
- sector * mrvlqspi_info->dev->sectorsize);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
- int retval = ERROR_OK;
- uint32_t page_size, fifo_size;
- struct working_area *fifo;
- struct reg_param reg_params[6];
- struct armv7m_algorithm armv7m_info;
- struct working_area *write_algorithm;
- int sector;
-
- LOG_DEBUG("offset=0x%08" PRIx32 " count=0x%08" PRIx32,
- offset, count);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset + count > mrvlqspi_info->dev->size_in_bytes) {
- LOG_WARNING("Writes past end of flash. Extra data discarded.");
- count = mrvlqspi_info->dev->size_in_bytes - offset;
- }
-
- /* Check sector protection */
- for (sector = 0; sector < bank->num_sectors; sector++) {
- /* Start offset in or before this sector? */
- /* End offset in or behind this sector? */
- if ((offset <
- (bank->sectors[sector].offset + bank->sectors[sector].size))
- && ((offset + count - 1) >= bank->sectors[sector].offset)
- && bank->sectors[sector].is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
- return ERROR_FAIL;
- }
- }
-
- page_size = mrvlqspi_info->dev->pagesize;
-
- /* See contrib/loaders/flash/mrvlqspi.S for src */
- static const uint8_t mrvlqspi_flash_write_code[] = {
- 0x4f, 0xf0, 0x00, 0x0a, 0xa2, 0x44, 0x92, 0x45,
- 0x7f, 0xf6, 0xfc, 0xaf, 0x00, 0xf0, 0x6b, 0xf8,
- 0x5f, 0xf0, 0x01, 0x08, 0xc5, 0xf8, 0x1c, 0x80,
- 0x5f, 0xf0, 0x06, 0x08, 0xc5, 0xf8, 0x10, 0x80,
- 0x5f, 0xf0, 0x01, 0x09, 0x00, 0xf0, 0x6b, 0xf8,
- 0x00, 0xf0, 0x7d, 0xf8, 0x5f, 0xf0, 0x31, 0x08,
- 0xc5, 0xf8, 0x1c, 0x80, 0x90, 0x46, 0xc5, 0xf8,
- 0x14, 0x80, 0x5f, 0xf0, 0x02, 0x08, 0xc5, 0xf8,
- 0x10, 0x80, 0x5f, 0xf0, 0x01, 0x09, 0x00, 0xf0,
- 0x5a, 0xf8, 0xd0, 0xf8, 0x00, 0x80, 0xb8, 0xf1,
- 0x00, 0x0f, 0x00, 0xf0, 0x8b, 0x80, 0x47, 0x68,
- 0x47, 0x45, 0x3f, 0xf4, 0xf6, 0xaf, 0x17, 0xf8,
- 0x01, 0x9b, 0x00, 0xf0, 0x30, 0xf8, 0x8f, 0x42,
- 0x28, 0xbf, 0x00, 0xf1, 0x08, 0x07, 0x47, 0x60,
- 0x01, 0x3b, 0x00, 0x2b, 0x00, 0xf0, 0x05, 0x80,
- 0x02, 0xf1, 0x01, 0x02, 0x92, 0x45, 0x7f, 0xf4,
- 0xe4, 0xaf, 0x00, 0xf0, 0x50, 0xf8, 0xa2, 0x44,
- 0x00, 0xf0, 0x2d, 0xf8, 0x5f, 0xf0, 0x01, 0x08,
- 0xc5, 0xf8, 0x1c, 0x80, 0x5f, 0xf0, 0x00, 0x08,
- 0xc5, 0xf8, 0x20, 0x80, 0x5f, 0xf0, 0x05, 0x08,
- 0xc5, 0xf8, 0x10, 0x80, 0x5f, 0xf0, 0x00, 0x09,
- 0x00, 0xf0, 0x29, 0xf8, 0x00, 0xf0, 0x13, 0xf8,
- 0x09, 0xf0, 0x01, 0x09, 0xb9, 0xf1, 0x00, 0x0f,
- 0xf8, 0xd1, 0x00, 0xf0, 0x34, 0xf8, 0x00, 0x2b,
- 0xa4, 0xd1, 0x00, 0xf0, 0x53, 0xb8, 0xd5, 0xf8,
- 0x00, 0x80, 0x5f, 0xea, 0x08, 0x68, 0xfa, 0xd4,
- 0xc5, 0xf8, 0x08, 0x90, 0x70, 0x47, 0xd5, 0xf8,
- 0x00, 0x80, 0x5f, 0xea, 0xc8, 0x68, 0xfa, 0xd4,
- 0xd5, 0xf8, 0x0c, 0x90, 0x70, 0x47, 0xd5, 0xf8,
- 0x04, 0x80, 0x48, 0xf4, 0x00, 0x78, 0xc5, 0xf8,
- 0x04, 0x80, 0xd5, 0xf8, 0x04, 0x80, 0x5f, 0xea,
- 0x88, 0x58, 0xfa, 0xd4, 0x70, 0x47, 0xd5, 0xf8,
- 0x00, 0x80, 0x48, 0xf0, 0x01, 0x08, 0xc5, 0xf8,
- 0x00, 0x80, 0xd5, 0xf8, 0x00, 0x80, 0x5f, 0xea,
- 0x88, 0x78, 0xfa, 0xd5, 0xd5, 0xf8, 0x04, 0x80,
- 0x69, 0xf3, 0x4d, 0x38, 0x48, 0xf4, 0x00, 0x48,
- 0xc5, 0xf8, 0x04, 0x80, 0x70, 0x47, 0xd5, 0xf8,
- 0x00, 0x80, 0x5f, 0xea, 0x88, 0x78, 0xfa, 0xd5,
- 0xd5, 0xf8, 0x00, 0x80, 0x5f, 0xea, 0x48, 0x68,
- 0xfa, 0xd5, 0xd5, 0xf8, 0x04, 0x80, 0x48, 0xf4,
- 0x80, 0x48, 0xc5, 0xf8, 0x04, 0x80, 0xd5, 0xf8,
- 0x04, 0x80, 0x5f, 0xea, 0x08, 0x48, 0xfa, 0xd4,
- 0xd5, 0xf8, 0x00, 0x80, 0x28, 0xf0, 0x01, 0x08,
- 0xc5, 0xf8, 0x00, 0x80, 0xd5, 0xf8, 0x00, 0x80,
- 0x5f, 0xea, 0x88, 0x78, 0xfa, 0xd5, 0x70, 0x47,
- 0x00, 0x20, 0x50, 0x60, 0x30, 0x46, 0x00, 0xbe
- };
-
- if (target_alloc_working_area(target, sizeof(mrvlqspi_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_ERROR("Insufficient working area. You must configure"\
- " a working area > %zdB in order to write to SPIFI flash.",
- sizeof(mrvlqspi_flash_write_code));
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(mrvlqspi_flash_write_code),
- mrvlqspi_flash_write_code);
- if (retval != ERROR_OK) {
- target_free_working_area(target, write_algorithm);
- return retval;
- }
-
- /* FIFO allocation */
- fifo_size = target_get_working_area_avail(target);
-
- if (fifo_size == 0) {
- /* if we already allocated the writing code but failed to get fifo
- * space, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_ERROR("Insufficient working area. Please allocate at least"\
- " %zdB of working area to enable flash writes.",
- sizeof(mrvlqspi_flash_write_code) + 1
- );
-
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- } else if (fifo_size < page_size)
- LOG_WARNING("Working area size is limited; flash writes may be"\
- " slow. Increase working area size to at least %zdB"\
- " to reduce write times.",
- (size_t)(sizeof(mrvlqspi_flash_write_code) + page_size)
- );
-
- if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
- target_free_working_area(target, write_algorithm);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* target address */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* count (halfword-16bit) */
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* page size */
- init_reg_param(®_params[5], "r5", 32, PARAM_OUT); /* qspi base address */
-
- buf_set_u32(reg_params[0].value, 0, 32, fifo->address);
- buf_set_u32(reg_params[1].value, 0, 32, fifo->address + fifo->size);
- buf_set_u32(reg_params[2].value, 0, 32, offset);
- buf_set_u32(reg_params[3].value, 0, 32, count);
- buf_set_u32(reg_params[4].value, 0, 32, page_size);
- buf_set_u32(reg_params[5].value, 0, 32, (uint32_t) mrvlqspi_info->reg_base);
-
- retval = target_run_flash_async_algorithm(target, buffer, count, 1,
- 0, NULL,
- 6, reg_params,
- fifo->address, fifo->size,
- write_algorithm->address, 0,
- &armv7m_info
- );
-
- if (retval != ERROR_OK)
- LOG_ERROR("Error executing flash write algorithm");
-
- target_free_working_area(target, fifo);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
- destroy_reg_param(®_params[5]);
-
- return retval;
-}
-
-int mrvlqspi_flash_read(struct flash_bank *bank, uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
- int retval;
- uint32_t i;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!(mrvlqspi_info->probed)) {
- LOG_ERROR("Flash bank not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- /* Flush read/write fifo's */
- retval = mrvlqspi_fifo_flush(bank, FIFO_FLUSH_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction/addr count value */
- retval = mrvlqspi_set_hdr_cnt(bank, (0x1 | (0x3 << 4)));
- if (retval != ERROR_OK)
- return retval;
-
- /* Set count for number of bytes to read */
- retval = mrvlqspi_set_din_cnt(bank, count);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set read address */
- retval = mrvlqspi_set_addr(bank, offset);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set instruction */
- retval = mrvlqspi_set_instr(bank, SPIFLASH_READ);
- if (retval != ERROR_OK)
- return retval;
-
- /* Set data and addr pin length */
- retval = mrvlqspi_set_conf(bank, 0x0);
- if (retval != ERROR_OK)
- return retval;
-
- retval = mrvlqspi_start_transfer(bank, QSPI_R_EN);
- if (retval != ERROR_OK)
- return retval;
-
- for (i = 0; i < count; i++) {
- retval = mrvlqspi_read_byte(bank, &buffer[i]);
- if (retval != ERROR_OK)
- return retval;
- }
-
- retval = mrvlqspi_set_ss_state(bank, QSPI_SS_DISABLE, QSPI_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int mrvlqspi_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
- uint32_t id = 0;
- int retval;
- struct flash_sector *sectors;
-
- /* If we've already probed, we should be fine to skip this time. */
- if (mrvlqspi_info->probed)
- return ERROR_OK;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- mrvlqspi_info->probed = 0;
- mrvlqspi_info->bank_num = bank->bank_number;
-
- /* Read flash JEDEC ID */
- retval = mrvlqspi_read_id(bank, &id);
- if (retval != ERROR_OK)
- return retval;
-
- mrvlqspi_info->dev = NULL;
- for (const struct flash_device *p = flash_devices; p->name ; p++)
- if (p->device_id == id) {
- mrvlqspi_info->dev = p;
- break;
- }
-
- if (!mrvlqspi_info->dev) {
- LOG_ERROR("Unknown flash device ID 0x%08" PRIx32, id);
- return ERROR_FAIL;
- }
-
- LOG_INFO("Found flash device \'%s\' ID 0x%08" PRIx32,
- mrvlqspi_info->dev->name, mrvlqspi_info->dev->device_id);
-
- /* Set correct size value */
- bank->size = mrvlqspi_info->dev->size_in_bytes;
-
- /* create and fill sectors array */
- bank->num_sectors = mrvlqspi_info->dev->size_in_bytes /
- mrvlqspi_info->dev->sectorsize;
- sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- if (sectors == NULL) {
- LOG_ERROR("not enough memory");
- return ERROR_FAIL;
- }
-
- for (int sector = 0; sector < bank->num_sectors; sector++) {
- sectors[sector].offset =
- sector * mrvlqspi_info->dev->sectorsize;
- sectors[sector].size = mrvlqspi_info->dev->sectorsize;
- sectors[sector].is_erased = -1;
- sectors[sector].is_protected = 0;
- }
-
- bank->sectors = sectors;
- mrvlqspi_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int mrvlqspi_auto_probe(struct flash_bank *bank)
-{
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
- if (mrvlqspi_info->probed)
- return ERROR_OK;
- return mrvlqspi_probe(bank);
-}
-
-static int mrvlqspi_flash_erase_check(struct flash_bank *bank)
-{
- /* Not implemented yet */
- return ERROR_OK;
-}
-
-static int mrvlqspi_protect_check(struct flash_bank *bank)
-{
- /* Not implemented yet */
- return ERROR_OK;
-}
-
-int mrvlqspi_get_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct mrvlqspi_flash_bank *mrvlqspi_info = bank->driver_priv;
-
- if (!(mrvlqspi_info->probed)) {
- snprintf(buf, buf_size,
- "\nQSPI flash bank not probed yet\n");
- return ERROR_OK;
- }
-
- snprintf(buf, buf_size, "\nQSPI flash information:\n"
- " Device \'%s\' ID 0x%08" PRIx32 "\n",
- mrvlqspi_info->dev->name, mrvlqspi_info->dev->device_id);
-
- return ERROR_OK;
-}
-
-FLASH_BANK_COMMAND_HANDLER(mrvlqspi_flash_bank_command)
-{
- struct mrvlqspi_flash_bank *mrvlqspi_info;
-
- if (CMD_ARGC < 7)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- mrvlqspi_info = malloc(sizeof(struct mrvlqspi_flash_bank));
- if (mrvlqspi_info == NULL) {
- LOG_ERROR("not enough memory");
- return ERROR_FAIL;
- }
-
- /* Get QSPI controller register map base address */
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], mrvlqspi_info->reg_base);
- bank->driver_priv = mrvlqspi_info;
- mrvlqspi_info->probed = 0;
-
- return ERROR_OK;
-}
-
-struct flash_driver mrvlqspi_flash = {
- .name = "mrvlqspi",
- .flash_bank_command = mrvlqspi_flash_bank_command,
- .erase = mrvlqspi_flash_erase,
- .protect = NULL,
- .write = mrvlqspi_flash_write,
- .read = mrvlqspi_flash_read,
- .probe = mrvlqspi_probe,
- .auto_probe = mrvlqspi_auto_probe,
- .erase_check = mrvlqspi_flash_erase_check,
- .protect_check = mrvlqspi_protect_check,
- .info = mrvlqspi_get_info,
-};
[40/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/at91sam9.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/at91sam9.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/at91sam9.c
deleted file mode 100755
index 3f4e5e2..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/at91sam9.c
+++ /dev/null
@@ -1,724 +0,0 @@
-/*
- * Copyright (C) 2009 by Dean Glazeski
- * dnglaze@gmail.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <target/arm.h>
-#include <helper/log.h>
-#include "imp.h"
-#include "arm_io.h"
-
-#define AT91C_PIOx_SODR (0x30) /**< Offset to PIO SODR. */
-#define AT91C_PIOx_CODR (0x34) /**< Offset to PIO CODR. */
-#define AT91C_PIOx_PDSR (0x3C) /**< Offset to PIO PDSR. */
-#define AT91C_ECCx_CR (0x00) /**< Offset to ECC CR. */
-#define AT91C_ECCx_SR (0x08) /**< Offset to ECC SR. */
-#define AT91C_ECCx_PR (0x0C) /**< Offset to ECC PR. */
-#define AT91C_ECCx_NPR (0x10) /**< Offset to ECC NPR. */
-
-/**
- * Representation of a pin on an AT91SAM9 chip.
- */
-struct at91sam9_pin {
- /** Address of the PIO controller. */
- uint32_t pioc;
-
- /** Pin number. */
- uint32_t num;
-};
-
-/**
- * Private data for the controller that is stored in the NAND device structure.
- */
-struct at91sam9_nand {
- /** Address of the ECC controller for NAND. */
- uint32_t ecc;
-
- /** Address data is written to. */
- uint32_t data;
-
- /** Address commands are written to. */
- uint32_t cmd;
-
- /** Address addresses are written to. */
- uint32_t addr;
-
- /** I/O structure for hosted reads/writes. */
- struct arm_nand_data io;
-
- /** Pin representing the ready/~busy line. */
- struct at91sam9_pin busy;
-
- /** Pin representing the chip enable. */
- struct at91sam9_pin ce;
-};
-
-/**
- * Checks if the target is halted and prints an error message if it isn't.
- *
- * @param target Target to be checked.
- * @param label String label for where function is called from.
- * @return True if the target is halted.
- */
-static int at91sam9_halted(struct target *target, const char *label)
-{
- if (target->state == TARGET_HALTED)
- return true;
-
- LOG_ERROR("Target must be halted to use NAND controller (%s)", label);
- return false;
-}
-
-/**
- * Initialize the AT91SAM9 NAND controller.
- *
- * @param nand NAND device the controller is attached to.
- * @return Success or failure of initialization.
- */
-static int at91sam9_init(struct nand_device *nand)
-{
- struct target *target = nand->target;
-
- if (!at91sam9_halted(target, "init"))
- return ERROR_NAND_OPERATION_FAILED;
-
- return ERROR_OK;
-}
-
-/**
- * Enable NAND device attached to a controller.
- *
- * @param info NAND controller information for controlling NAND device.
- * @return Success or failure of the enabling.
- */
-static int at91sam9_enable(struct nand_device *nand)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- return target_write_u32(target, info->ce.pioc + AT91C_PIOx_CODR, 1 << info->ce.num);
-}
-
-/**
- * Disable NAND device attached to a controller.
- *
- * @param info NAND controller information for controlling NAND device.
- * @return Success or failure of the disabling.
- */
-static int at91sam9_disable(struct nand_device *nand)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- return target_write_u32(target, info->ce.pioc + AT91C_PIOx_SODR, 1 << info->ce.num);
-}
-
-/**
- * Send a command to the NAND device.
- *
- * @param nand NAND device to write the command to.
- * @param command Command to be written.
- * @return Success or failure of writing the command.
- */
-static int at91sam9_command(struct nand_device *nand, uint8_t command)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (!at91sam9_halted(target, "command"))
- return ERROR_NAND_OPERATION_FAILED;
-
- at91sam9_enable(nand);
-
- return target_write_u8(target, info->cmd, command);
-}
-
-/**
- * Reset the AT91SAM9 NAND controller.
- *
- * @param nand NAND device to be reset.
- * @return Success or failure of reset.
- */
-static int at91sam9_reset(struct nand_device *nand)
-{
- if (!at91sam9_halted(nand->target, "reset"))
- return ERROR_NAND_OPERATION_FAILED;
-
- return at91sam9_disable(nand);
-}
-
-/**
- * Send an address to the NAND device attached to an AT91SAM9 NAND controller.
- *
- * @param nand NAND device to send the address to.
- * @param address Address to be sent.
- * @return Success or failure of sending the address.
- */
-static int at91sam9_address(struct nand_device *nand, uint8_t address)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (!at91sam9_halted(nand->target, "address"))
- return ERROR_NAND_OPERATION_FAILED;
-
- return target_write_u8(target, info->addr, address);
-}
-
-/**
- * Read data directly from the NAND device attached to an AT91SAM9 NAND
- * controller.
- *
- * @param nand NAND device to read from.
- * @param data Pointer to where the data should be put.
- * @return Success or failure of reading the data.
- */
-static int at91sam9_read_data(struct nand_device *nand, void *data)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (!at91sam9_halted(nand->target, "read data"))
- return ERROR_NAND_OPERATION_FAILED;
-
- return target_read_u8(target, info->data, data);
-}
-
-/**
- * Write data directly to the NAND device attached to an AT91SAM9 NAND
- * controller.
- *
- * @param nand NAND device to be written to.
- * @param data Data to be written.
- * @return Success or failure of the data write.
- */
-static int at91sam9_write_data(struct nand_device *nand, uint16_t data)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (!at91sam9_halted(target, "write data"))
- return ERROR_NAND_OPERATION_FAILED;
-
- return target_write_u8(target, info->data, data);
-}
-
-/**
- * Determine if the NAND device is ready by looking at the ready/~busy pin.
- *
- * @param nand NAND device to check.
- * @param timeout Time in milliseconds to wait for NAND to be ready.
- * @return True if the NAND is ready in the timeout period.
- */
-static int at91sam9_nand_ready(struct nand_device *nand, int timeout)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t status;
-
- if (!at91sam9_halted(target, "nand ready"))
- return 0;
-
- do {
- target_read_u32(target, info->busy.pioc + AT91C_PIOx_PDSR, &status);
-
- if (status & (1 << info->busy.num))
- return 1;
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-/**
- * Read a block of data from the NAND device attached to an AT91SAM9. This
- * utilizes the ARM hosted NAND read function.
- *
- * @param nand NAND device to read from.
- * @param data Pointer to where the read data should be placed.
- * @param size Size of the data being read.
- * @return Success or failure of the hosted read.
- */
-static int at91sam9_read_block_data(struct nand_device *nand, uint8_t *data, int size)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct arm_nand_data *io = &info->io;
- int status;
-
- if (!at91sam9_halted(nand->target, "read block"))
- return ERROR_NAND_OPERATION_FAILED;
-
- io->chunk_size = nand->page_size;
- status = arm_nandread(io, data, size);
-
- return status;
-}
-
-/**
- * Write a block of data to a NAND device attached to an AT91SAM9. This uses
- * the ARM hosted write function to write the data.
- *
- * @param nand NAND device to write to.
- * @param data Data to be written to device.
- * @param size Size of the data being written.
- * @return Success or failure of the hosted write.
- */
-static int at91sam9_write_block_data(struct nand_device *nand, uint8_t *data, int size)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct arm_nand_data *io = &info->io;
- int status;
-
- if (!at91sam9_halted(nand->target, "write block"))
- return ERROR_NAND_OPERATION_FAILED;
-
- io->chunk_size = nand->page_size;
- status = arm_nandwrite(io, data, size);
-
- return status;
-}
-
-/**
- * Initialize the ECC controller on the AT91SAM9.
- *
- * @param target Target to configure ECC on.
- * @param info NAND controller information for where the ECC is.
- * @return Success or failure of initialization.
- */
-static int at91sam9_ecc_init(struct target *target, struct at91sam9_nand *info)
-{
- if (!info->ecc) {
- LOG_ERROR("ECC controller address must be set when not reading raw NAND data");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* reset ECC parity registers */
- return target_write_u32(target, info->ecc + AT91C_ECCx_CR, 1);
-}
-
-/**
- * Initialize an area for the OOB based on whether a user is requesting the OOB
- * data. This determines the size of the OOB and allocates the space in case
- * the user has not requested the OOB data.
- *
- * @param nand NAND device we are creating an OOB for.
- * @param oob Pointer to the user supplied OOB area.
- * @param size Size of the OOB.
- * @return Pointer to an area to store OOB data.
- */
-static uint8_t *at91sam9_oob_init(struct nand_device *nand, uint8_t *oob, uint32_t *size)
-{
- if (!oob) {
- /* user doesn't want OOB, allocate it */
- if (nand->page_size == 512)
- *size = 16;
- else if (nand->page_size == 2048)
- *size = 64;
-
- oob = malloc(*size);
- if (!oob) {
- LOG_ERROR("Unable to allocate space for OOB");
- return NULL;
- }
-
- memset(oob, 0xFF, *size);
- }
-
- return oob;
-}
-
-/**
- * Reads a page from an AT91SAM9 NAND controller and verifies using 1-bit ECC
- * controller on chip. This makes an attempt to correct any errors that are
- * encountered while reading the page of data.
- *
- * @param nand NAND device to read from
- * @param page Page to be read.
- * @param data Pointer to where data should be read to.
- * @param data_size Size of the data to be read.
- * @param oob Pointer to where OOB data should be read to.
- * @param oob_size Size of the OOB data to be read.
- * @return Success or failure of reading the NAND page.
- */
-static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
-{
- int retval;
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- uint8_t *oob_data;
- uint32_t status;
-
- retval = at91sam9_ecc_init(target, info);
- if (ERROR_OK != retval)
- return retval;
-
- retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
- if (ERROR_OK != retval)
- return retval;
-
- if (data) {
- retval = nand_read_data_page(nand, data, data_size);
- if (ERROR_OK != retval)
- return retval;
- }
-
- oob_data = at91sam9_oob_init(nand, oob, &oob_size);
- retval = nand_read_data_page(nand, oob_data, oob_size);
- if (ERROR_OK == retval && data) {
- target_read_u32(target, info->ecc + AT91C_ECCx_SR, &status);
- if (status & 1) {
- LOG_ERROR("Error detected!");
- if (status & 4)
- LOG_ERROR("Multiple errors encountered; unrecoverable!");
- else {
- /* attempt recovery */
- uint32_t parity;
-
- target_read_u32(target,
- info->ecc + AT91C_ECCx_PR,
- &parity);
- uint32_t word = (parity & 0x0000FFF0) >> 4;
- uint32_t bit = parity & 0x0F;
-
- data[word] ^= (0x1) << bit;
- LOG_INFO("Data word %d, bit %d corrected.",
- (unsigned) word,
- (unsigned) bit);
- }
- }
-
- if (status & 2) {
- /* we could write back correct ECC data */
- LOG_ERROR("Error in ECC bytes detected");
- }
- }
-
- if (!oob) {
- /* if it wasn't asked for, free it */
- free(oob_data);
- }
-
- return retval;
-}
-
-/**
- * Write a page of data including 1-bit ECC information to a NAND device
- * attached to an AT91SAM9 controller. If there is OOB data to be written,
- * this will ignore the computed ECC from the ECC controller.
- *
- * @param nand NAND device to write to.
- * @param page Page to write.
- * @param data Pointer to data being written.
- * @param data_size Size of the data being written.
- * @param oob Pointer to OOB data being written.
- * @param oob_size Size of the OOB data.
- * @return Success or failure of the page write.
- */
-static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
-{
- struct at91sam9_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
- uint8_t *oob_data = oob;
- uint32_t parity, nparity;
-
- retval = at91sam9_ecc_init(target, info);
- if (ERROR_OK != retval)
- return retval;
-
- retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
- if (ERROR_OK != retval)
- return retval;
-
- if (data) {
- retval = nand_write_data_page(nand, data, data_size);
- if (ERROR_OK != retval) {
- LOG_ERROR("Unable to write data to NAND device");
- return retval;
- }
- }
-
- oob_data = at91sam9_oob_init(nand, oob, &oob_size);
-
- if (!oob) {
- /* no OOB given, so read in the ECC parity from the ECC controller */
- target_read_u32(target, info->ecc + AT91C_ECCx_PR, &parity);
- target_read_u32(target, info->ecc + AT91C_ECCx_NPR, &nparity);
-
- oob_data[0] = (uint8_t) parity;
- oob_data[1] = (uint8_t) (parity >> 8);
- oob_data[2] = (uint8_t) nparity;
- oob_data[3] = (uint8_t) (nparity >> 8);
- }
-
- retval = nand_write_data_page(nand, oob_data, oob_size);
-
- if (!oob)
- free(oob_data);
-
- if (ERROR_OK != retval) {
- LOG_ERROR("Unable to write OOB data to NAND");
- return retval;
- }
-
- retval = nand_write_finish(nand);
-
- return retval;
-}
-
-/**
- * Handle the initial NAND device command for AT91SAM9 controllers. This
- * initializes much of the controller information struct to be ready for future
- * reads and writes.
- */
-NAND_DEVICE_COMMAND_HANDLER(at91sam9_nand_device_command)
-{
- unsigned long chip = 0, ecc = 0;
- struct at91sam9_nand *info = NULL;
-
- LOG_DEBUG("AT91SAM9 NAND Device Command");
-
- if (CMD_ARGC < 3 || CMD_ARGC > 4) {
- LOG_ERROR("parameters: %s target chip_addr", CMD_ARGV[0]);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], chip);
- if (chip == 0) {
- LOG_ERROR("invalid NAND chip address: %s", CMD_ARGV[2]);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (CMD_ARGC == 4) {
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[3], ecc);
- if (ecc == 0) {
- LOG_ERROR("invalid ECC controller address: %s", CMD_ARGV[3]);
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- info = calloc(1, sizeof(*info));
- if (!info) {
- LOG_ERROR("unable to allocate space for controller private data");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- info->data = chip;
- info->cmd = chip | (1 << 22);
- info->addr = chip | (1 << 21);
- info->ecc = ecc;
-
- nand->controller_priv = info;
- info->io.target = nand->target;
- info->io.data = info->data;
- info->io.op = ARM_NAND_NONE;
-
- return ERROR_OK;
-}
-
-/**
- * Handle the AT91SAM9 CLE command for specifying the address line to use for
- * writing commands to a NAND device.
- */
-COMMAND_HANDLER(handle_at91sam9_cle_command)
-{
- struct nand_device *nand = NULL;
- struct at91sam9_nand *info = NULL;
- unsigned num, address_line;
-
- if (CMD_ARGC != 2) {
- command_print(CMD_CTX, "incorrect number of arguments for 'at91sam9 cle' command");
- return ERROR_OK;
- }
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
- nand = get_nand_device_by_num(num);
- if (!nand) {
- command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- info = nand->controller_priv;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], address_line);
- info->cmd = info->data | (1 << address_line);
-
- return ERROR_OK;
-}
-
-/**
- * Handle the AT91SAM9 ALE command for specifying the address line to use for
- * writing addresses to the NAND device.
- */
-COMMAND_HANDLER(handle_at91sam9_ale_command)
-{
- struct nand_device *nand = NULL;
- struct at91sam9_nand *info = NULL;
- unsigned num, address_line;
-
- if (CMD_ARGC != 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
- nand = get_nand_device_by_num(num);
- if (!nand) {
- command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
-
- info = nand->controller_priv;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], address_line);
- info->addr = info->data | (1 << address_line);
-
- return ERROR_OK;
-}
-
-/**
- * Handle the AT91SAM9 RDY/~BUSY command for specifying the pin that watches the
- * RDY/~BUSY line from the NAND device.
- */
-COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
-{
- struct nand_device *nand = NULL;
- struct at91sam9_nand *info = NULL;
- unsigned num, base_pioc, pin_num;
-
- if (CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
- nand = get_nand_device_by_num(num);
- if (!nand) {
- command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
-
- info = nand->controller_priv;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], base_pioc);
- info->busy.pioc = base_pioc;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], pin_num);
- info->busy.num = pin_num;
-
- return ERROR_OK;
-}
-
-/**
- * Handle the AT91SAM9 CE command for specifying the pin that is used to enable
- * or disable the NAND device.
- */
-COMMAND_HANDLER(handle_at91sam9_ce_command)
-{
- struct nand_device *nand = NULL;
- struct at91sam9_nand *info = NULL;
- unsigned num, base_pioc, pin_num;
-
- if (CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
- nand = get_nand_device_by_num(num);
- if (!nand) {
- command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
-
- info = nand->controller_priv;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[1], base_pioc);
- info->ce.pioc = base_pioc;
-
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], pin_num);
- info->ce.num = pin_num;
-
- return ERROR_OK;
-}
-
-static const struct command_registration at91sam9_sub_command_handlers[] = {
- {
- .name = "cle",
- .handler = handle_at91sam9_cle_command,
- .mode = COMMAND_CONFIG,
- .help = "set command latch enable address line (default is 22)",
- .usage = "bank_id address_line",
- },
- {
- .name = "ale",
- .handler = handle_at91sam9_ale_command,
- .mode = COMMAND_CONFIG,
- .help = "set address latch enable address line (default is 21)",
- .usage = "bank_id address_line",
- },
- {
- .name = "rdy_busy",
- .handler = handle_at91sam9_rdy_busy_command,
- .mode = COMMAND_CONFIG,
- .help = "set the GPIO input pin connected to "
- "the RDY/~BUSY signal (no default)",
- .usage = "bank_id pio_base_addr pin_num",
- },
- {
- .name = "ce",
- .handler = handle_at91sam9_ce_command,
- .mode = COMMAND_CONFIG,
- .help = "set the GPIO output pin connected to "
- "the chip enable signal (no default)",
- .usage = "bank_id pio_base_addr pin_num",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration at91sam9_command_handler[] = {
- {
- .name = "at91sam9",
- .mode = COMMAND_ANY,
- .help = "AT91SAM9 NAND flash controller commands",
- .usage = "",
- .chain = at91sam9_sub_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-/**
- * Structure representing the AT91SAM9 NAND controller.
- */
-struct nand_flash_controller at91sam9_nand_controller = {
- .name = "at91sam9",
- .nand_device_command = at91sam9_nand_device_command,
- .commands = at91sam9_command_handler,
- .init = at91sam9_init,
- .command = at91sam9_command,
- .reset = at91sam9_reset,
- .address = at91sam9_address,
- .read_data = at91sam9_read_data,
- .write_data = at91sam9_write_data,
- .nand_ready = at91sam9_nand_ready,
- .read_block_data = at91sam9_read_block_data,
- .write_block_data = at91sam9_write_block_data,
- .read_page = at91sam9_read_page,
- .write_page = at91sam9_write_page,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/core.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/core.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/core.c
deleted file mode 100755
index 815c766..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/core.c
+++ /dev/null
@@ -1,878 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2002 Thomas Gleixner <tg...@linutronix.de> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * Partially based on drivers/mtd/nand_ids.c from Linux. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-
-/* configured NAND devices and NAND Flash command handler */
-struct nand_device *nand_devices;
-
-void nand_device_add(struct nand_device *c)
-{
- if (nand_devices) {
- struct nand_device *p = nand_devices;
- while (p && p->next)
- p = p->next;
- p->next = c;
- } else
- nand_devices = c;
-}
-
-
-/* Chip ID list
- *
- * Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
- * options, name
- *
- * Pagesize; 0, 256, 512
- * 0 get this information from the extended chip ID
- * 256 256 Byte page size
- * 512 512 Byte page size
- */
-static struct nand_info nand_flash_ids[] = {
- /* Vendor Specific Entries */
- { NAND_MFR_SAMSUNG, 0xD5, 8192, 2048, 0x100000, LP_OPTIONS,
- "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
- { NAND_MFR_SAMSUNG, 0xD7, 8192, 4096, 0x100000, LP_OPTIONS,
- "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
-
- /* start "museum" IDs */
- { 0x0, 0x6e, 256, 1, 0x1000, 0, "NAND 1MiB 5V 8-bit"},
- { 0x0, 0x64, 256, 2, 0x1000, 0, "NAND 2MiB 5V 8-bit"},
- { 0x0, 0x6b, 512, 4, 0x2000, 0, "NAND 4MiB 5V 8-bit"},
- { 0x0, 0xe8, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
- { 0x0, 0xec, 256, 1, 0x1000, 0, "NAND 1MiB 3.3V 8-bit"},
- { 0x0, 0xea, 256, 2, 0x1000, 0, "NAND 2MiB 3.3V 8-bit"},
- { 0x0, 0xd5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
- { 0x0, 0xe3, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
- { 0x0, 0xe5, 512, 4, 0x2000, 0, "NAND 4MiB 3.3V 8-bit"},
- { 0x0, 0xd6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
-
- { 0x0, 0x39, 512, 8, 0x2000, 0, "NAND 8MiB 1.8V 8-bit"},
- { 0x0, 0xe6, 512, 8, 0x2000, 0, "NAND 8MiB 3.3V 8-bit"},
- { 0x0, 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
- { 0x0, 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
- /* end "museum" IDs */
-
- { 0x0, 0x33, 512, 16, 0x4000, 0, "NAND 16MiB 1.8V 8-bit"},
- { 0x0, 0x73, 512, 16, 0x4000, 0, "NAND 16MiB 3.3V 8-bit"},
- { 0x0, 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 1.8V 16-bit"},
- { 0x0, 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 3.3V 16-bit"},
-
- { 0x0, 0x35, 512, 32, 0x4000, 0, "NAND 32MiB 1.8V 8-bit"},
- { 0x0, 0x75, 512, 32, 0x4000, 0, "NAND 32MiB 3.3V 8-bit"},
- { 0x0, 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 1.8V 16-bit"},
- { 0x0, 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 3.3V 16-bit"},
-
- { 0x0, 0x36, 512, 64, 0x4000, 0, "NAND 64MiB 1.8V 8-bit"},
- { 0x0, 0x76, 512, 64, 0x4000, 0, "NAND 64MiB 3.3V 8-bit"},
- { 0x0, 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 1.8V 16-bit"},
- { 0x0, 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 3.3V 16-bit"},
-
- { 0x0, 0x78, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
- { 0x0, 0x39, 512, 128, 0x4000, 0, "NAND 128MiB 1.8V 8-bit"},
- { 0x0, 0x79, 512, 128, 0x4000, 0, "NAND 128MiB 3.3V 8-bit"},
- { 0x0, 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
- { 0x0, 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
- { 0x0, 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
- { 0x0, 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
-
- { 0x0, 0x71, 512, 256, 0x4000, 0, "NAND 256MiB 3.3V 8-bit"},
-
- { 0x0, 0xA2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 1.8V 8-bit"},
- { 0x0, 0xF2, 0, 64, 0, LP_OPTIONS, "NAND 64MiB 3.3V 8-bit"},
- { 0x0, 0xB2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 1.8V 16-bit"},
- { 0x0, 0xC2, 0, 64, 0, LP_OPTIONS16, "NAND 64MiB 3.3V 16-bit"},
-
- { 0x0, 0xA1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 1.8V 8-bit"},
- { 0x0, 0xF1, 0, 128, 0, LP_OPTIONS, "NAND 128MiB 3.3V 8-bit"},
- { 0x0, 0xB1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 1.8V 16-bit"},
- { 0x0, 0xC1, 0, 128, 0, LP_OPTIONS16, "NAND 128MiB 3.3V 16-bit"},
-
- { 0x0, 0xAA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 1.8V 8-bit"},
- { 0x0, 0xDA, 0, 256, 0, LP_OPTIONS, "NAND 256MiB 3.3V 8-bit"},
- { 0x0, 0xBA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 1.8V 16-bit"},
- { 0x0, 0xCA, 0, 256, 0, LP_OPTIONS16, "NAND 256MiB 3.3V 16-bit"},
-
- { 0x0, 0xAC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 1.8V 8-bit"},
- { 0x0, 0xDC, 0, 512, 0, LP_OPTIONS, "NAND 512MiB 3.3V 8-bit"},
- { 0x0, 0xBC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 1.8V 16-bit"},
- { 0x0, 0xCC, 0, 512, 0, LP_OPTIONS16, "NAND 512MiB 3.3V 16-bit"},
-
- { 0x0, 0xA3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 1.8V 8-bit"},
- { 0x0, 0xD3, 0, 1024, 0, LP_OPTIONS, "NAND 1GiB 3.3V 8-bit"},
- { 0x0, 0xB3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 1.8V 16-bit"},
- { 0x0, 0xC3, 0, 1024, 0, LP_OPTIONS16, "NAND 1GiB 3.3V 16-bit"},
-
- { 0x0, 0xA5, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 1.8V 8-bit"},
- { 0x0, 0xD5, 0, 8192, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
- { 0x0, 0xB5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 1.8V 16-bit"},
- { 0x0, 0xC5, 0, 2048, 0, LP_OPTIONS16, "NAND 2GiB 3.3V 16-bit"},
-
- { 0x0, 0x48, 0, 2048, 0, LP_OPTIONS, "NAND 2GiB 3.3V 8-bit"},
-
- {0, 0, 0, 0, 0, 0, NULL}
-};
-
-/* Manufacturer ID list
- */
-static struct nand_manufacturer nand_manuf_ids[] = {
- {0x0, "unknown"},
- {NAND_MFR_TOSHIBA, "Toshiba"},
- {NAND_MFR_SAMSUNG, "Samsung"},
- {NAND_MFR_FUJITSU, "Fujitsu"},
- {NAND_MFR_NATIONAL, "National"},
- {NAND_MFR_RENESAS, "Renesas"},
- {NAND_MFR_STMICRO, "ST Micro"},
- {NAND_MFR_HYNIX, "Hynix"},
- {NAND_MFR_MICRON, "Micron"},
- {0x0, NULL},
-};
-
-/*
- * Define default oob placement schemes for large and small page devices
- */
-
-#if 0
-static struct nand_ecclayout nand_oob_8 = {
- .eccbytes = 3,
- .eccpos = {0, 1, 2},
- .oobfree = {
- {.offset = 3,
- .length = 2},
- {.offset = 6,
- .length = 2}
- }
-};
-#endif
-
-/**
- * Returns the flash bank specified by @a name, which matches the
- * driver name and a suffix (option) specify the driver-specific
- * bank number. The suffix consists of the '.' and the driver-specific
- * bank number: when two davinci banks are defined, then 'davinci.1' refers
- * to the second (e.g. DM355EVM).
- */
-static struct nand_device *get_nand_device_by_name(const char *name)
-{
- unsigned requested = get_flash_name_index(name);
- unsigned found = 0;
-
- struct nand_device *nand;
- for (nand = nand_devices; NULL != nand; nand = nand->next) {
- if (strcmp(nand->name, name) == 0)
- return nand;
- if (!flash_driver_name_matches(nand->controller->name, name))
- continue;
- if (++found < requested)
- continue;
- return nand;
- }
- return NULL;
-}
-
-struct nand_device *get_nand_device_by_num(int num)
-{
- struct nand_device *p;
- int i = 0;
-
- for (p = nand_devices; p; p = p->next) {
- if (i++ == num)
- return p;
- }
-
- return NULL;
-}
-
-COMMAND_HELPER(nand_command_get_device, unsigned name_index,
- struct nand_device **nand)
-{
- const char *str = CMD_ARGV[name_index];
- *nand = get_nand_device_by_name(str);
- if (*nand)
- return ERROR_OK;
-
- unsigned num;
- COMMAND_PARSE_NUMBER(uint, str, num);
- *nand = get_nand_device_by_num(num);
- if (!*nand) {
- command_print(CMD_CTX, "NAND flash device '%s' not found", str);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- return ERROR_OK;
-}
-
-int nand_build_bbt(struct nand_device *nand, int first, int last)
-{
- uint32_t page;
- int i;
- int pages_per_block = (nand->erase_size / nand->page_size);
- uint8_t oob[6];
- int ret;
-
- if ((first < 0) || (first >= nand->num_blocks))
- first = 0;
-
- if ((last >= nand->num_blocks) || (last == -1))
- last = nand->num_blocks - 1;
-
- page = first * pages_per_block;
- for (i = first; i <= last; i++) {
- ret = nand_read_page(nand, page, NULL, 0, oob, 6);
- if (ret != ERROR_OK)
- return ret;
-
- if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
- || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
- ((nand->page_size == 2048) && (oob[0] != 0xff)))) {
- LOG_WARNING("bad block: %i", i);
- nand->blocks[i].is_bad = 1;
- } else
- nand->blocks[i].is_bad = 0;
-
- page += pages_per_block;
- }
-
- return ERROR_OK;
-}
-
-int nand_read_status(struct nand_device *nand, uint8_t *status)
-{
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
-
- /* Send read status command */
- nand->controller->command(nand, NAND_CMD_STATUS);
-
- alive_sleep(1);
-
- /* read status */
- if (nand->device->options & NAND_BUSWIDTH_16) {
- uint16_t data;
- nand->controller->read_data(nand, &data);
- *status = data & 0xff;
- } else
- nand->controller->read_data(nand, status);
-
- return ERROR_OK;
-}
-
-static int nand_poll_ready(struct nand_device *nand, int timeout)
-{
- uint8_t status;
-
- nand->controller->command(nand, NAND_CMD_STATUS);
- do {
- if (nand->device->options & NAND_BUSWIDTH_16) {
- uint16_t data;
- nand->controller->read_data(nand, &data);
- status = data & 0xff;
- } else
- nand->controller->read_data(nand, &status);
- if (status & NAND_STATUS_READY)
- break;
- alive_sleep(1);
- } while (timeout--);
-
- return (status & NAND_STATUS_READY) != 0;
-}
-
-int nand_probe(struct nand_device *nand)
-{
- uint8_t manufacturer_id, device_id;
- uint8_t id_buff[6];
- int retval;
- int i;
-
- /* clear device data */
- nand->device = NULL;
- nand->manufacturer = NULL;
-
- /* clear device parameters */
- nand->bus_width = 0;
- nand->address_cycles = 0;
- nand->page_size = 0;
- nand->erase_size = 0;
-
- /* initialize controller (device parameters are zero, use controller default) */
- retval = nand->controller->init(nand);
- if (retval != ERROR_OK) {
- switch (retval) {
- case ERROR_NAND_OPERATION_FAILED:
- LOG_DEBUG("controller initialization failed");
- return ERROR_NAND_OPERATION_FAILED;
- case ERROR_NAND_OPERATION_NOT_SUPPORTED:
- LOG_ERROR(
- "BUG: controller reported that it doesn't support default parameters");
- return ERROR_NAND_OPERATION_FAILED;
- default:
- LOG_ERROR("BUG: unknown controller initialization failure");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- nand->controller->command(nand, NAND_CMD_RESET);
- nand->controller->reset(nand);
-
- nand->controller->command(nand, NAND_CMD_READID);
- nand->controller->address(nand, 0x0);
-
- if (nand->bus_width == 8) {
- nand->controller->read_data(nand, &manufacturer_id);
- nand->controller->read_data(nand, &device_id);
- } else {
- uint16_t data_buf;
- nand->controller->read_data(nand, &data_buf);
- manufacturer_id = data_buf & 0xff;
- nand->controller->read_data(nand, &data_buf);
- device_id = data_buf & 0xff;
- }
-
- for (i = 0; nand_flash_ids[i].name; i++) {
- if (nand_flash_ids[i].id == device_id &&
- (nand_flash_ids[i].mfr_id == manufacturer_id ||
- nand_flash_ids[i].mfr_id == 0)) {
- nand->device = &nand_flash_ids[i];
- break;
- }
- }
-
- for (i = 0; nand_manuf_ids[i].name; i++) {
- if (nand_manuf_ids[i].id == manufacturer_id) {
- nand->manufacturer = &nand_manuf_ids[i];
- break;
- }
- }
-
- if (!nand->manufacturer) {
- nand->manufacturer = &nand_manuf_ids[0];
- nand->manufacturer->id = manufacturer_id;
- }
-
- if (!nand->device) {
- LOG_ERROR(
- "unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
- manufacturer_id,
- device_id);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
-
- /* initialize device parameters */
-
- /* bus width */
- if (nand->device->options & NAND_BUSWIDTH_16)
- nand->bus_width = 16;
- else
- nand->bus_width = 8;
-
- /* Do we need extended device probe information? */
- if (nand->device->page_size == 0 ||
- nand->device->erase_size == 0) {
- if (nand->bus_width == 8) {
- nand->controller->read_data(nand, id_buff + 3);
- nand->controller->read_data(nand, id_buff + 4);
- nand->controller->read_data(nand, id_buff + 5);
- } else {
- uint16_t data_buf;
-
- nand->controller->read_data(nand, &data_buf);
- id_buff[3] = data_buf;
-
- nand->controller->read_data(nand, &data_buf);
- id_buff[4] = data_buf;
-
- nand->controller->read_data(nand, &data_buf);
- id_buff[5] = data_buf >> 8;
- }
- }
-
- /* page size */
- if (nand->device->page_size == 0)
- nand->page_size = 1 << (10 + (id_buff[4] & 3));
- else if (nand->device->page_size == 256) {
- LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
- return ERROR_NAND_OPERATION_FAILED;
- } else
- nand->page_size = nand->device->page_size;
-
- /* number of address cycles */
- if (nand->page_size <= 512) {
- /* small page devices */
- if (nand->device->chip_size <= 32)
- nand->address_cycles = 3;
- else if (nand->device->chip_size <= 8*1024)
- nand->address_cycles = 4;
- else {
- LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
- nand->address_cycles = 5;
- }
- } else {
- /* large page devices */
- if (nand->device->chip_size <= 128)
- nand->address_cycles = 4;
- else if (nand->device->chip_size <= 32*1024)
- nand->address_cycles = 5;
- else {
- LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
- nand->address_cycles = 6;
- }
- }
-
- /* erase size */
- if (nand->device->erase_size == 0) {
- switch ((id_buff[4] >> 4) & 3) {
- case 0:
- nand->erase_size = 64 << 10;
- break;
- case 1:
- nand->erase_size = 128 << 10;
- break;
- case 2:
- nand->erase_size = 256 << 10;
- break;
- case 3:
- nand->erase_size = 512 << 10;
- break;
- }
- } else
- nand->erase_size = nand->device->erase_size;
-
- /* initialize controller, but leave parameters at the controllers default */
- retval = nand->controller->init(nand);
- if (retval != ERROR_OK) {
- switch (retval) {
- case ERROR_NAND_OPERATION_FAILED:
- LOG_DEBUG("controller initialization failed");
- return ERROR_NAND_OPERATION_FAILED;
- case ERROR_NAND_OPERATION_NOT_SUPPORTED:
- LOG_ERROR(
- "controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
- nand->bus_width,
- nand->address_cycles,
- nand->page_size);
- return ERROR_NAND_OPERATION_FAILED;
- default:
- LOG_ERROR("BUG: unknown controller initialization failure");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
- nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
-
- for (i = 0; i < nand->num_blocks; i++) {
- nand->blocks[i].size = nand->erase_size;
- nand->blocks[i].offset = i * nand->erase_size;
- nand->blocks[i].is_erased = -1;
- nand->blocks[i].is_bad = -1;
- }
-
- return ERROR_OK;
-}
-
-int nand_erase(struct nand_device *nand, int first_block, int last_block)
-{
- int i;
- uint32_t page;
- uint8_t status;
- int retval;
-
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
-
- if ((first_block < 0) || (last_block >= nand->num_blocks))
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* make sure we know if a block is bad before erasing it */
- for (i = first_block; i <= last_block; i++) {
- if (nand->blocks[i].is_bad == -1) {
- nand_build_bbt(nand, i, last_block);
- break;
- }
- }
-
- for (i = first_block; i <= last_block; i++) {
- /* Send erase setup command */
- nand->controller->command(nand, NAND_CMD_ERASE1);
-
- page = i * (nand->erase_size / nand->page_size);
-
- /* Send page address */
- if (nand->page_size <= 512) {
- /* row */
- nand->controller->address(nand, page & 0xff);
- nand->controller->address(nand, (page >> 8) & 0xff);
-
- /* 3rd cycle only on devices with more than 32 MiB */
- if (nand->address_cycles >= 4)
- nand->controller->address(nand, (page >> 16) & 0xff);
-
- /* 4th cycle only on devices with more than 8 GiB */
- if (nand->address_cycles >= 5)
- nand->controller->address(nand, (page >> 24) & 0xff);
- } else {
- /* row */
- nand->controller->address(nand, page & 0xff);
- nand->controller->address(nand, (page >> 8) & 0xff);
-
- /* 3rd cycle only on devices with more than 128 MiB */
- if (nand->address_cycles >= 5)
- nand->controller->address(nand, (page >> 16) & 0xff);
- }
-
- /* Send erase confirm command */
- nand->controller->command(nand, NAND_CMD_ERASE2);
-
- retval = nand->controller->nand_ready ?
- nand->controller->nand_ready(nand, 1000) :
- nand_poll_ready(nand, 1000);
- if (!retval) {
- LOG_ERROR("timeout waiting for NAND flash block erase to complete");
- return ERROR_NAND_OPERATION_TIMEOUT;
- }
-
- retval = nand_read_status(nand, &status);
- if (retval != ERROR_OK) {
- LOG_ERROR("couldn't read status");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & 0x1) {
- LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
- (nand->blocks[i].is_bad == 1)
- ? "bad " : "",
- i, status);
- /* continue; other blocks might still be erasable */
- }
-
- nand->blocks[i].is_erased = 1;
- }
-
- return ERROR_OK;
-}
-
-#if 0
-static int nand_read_plain(struct nand_device *nand,
- uint32_t address,
- uint8_t *data,
- uint32_t data_size)
-{
- uint8_t *page;
-
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
-
- if (address % nand->page_size) {
- LOG_ERROR("reads need to be page aligned");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- page = malloc(nand->page_size);
-
- while (data_size > 0) {
- uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
- uint32_t page_address;
-
-
- page_address = address / nand->page_size;
-
- nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
-
- memcpy(data, page, thisrun_size);
-
- address += thisrun_size;
- data += thisrun_size;
- data_size -= thisrun_size;
- }
-
- free(page);
-
- return ERROR_OK;
-}
-
-static int nand_write_plain(struct nand_device *nand,
- uint32_t address,
- uint8_t *data,
- uint32_t data_size)
-{
- uint8_t *page;
-
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
-
- if (address % nand->page_size) {
- LOG_ERROR("writes need to be page aligned");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- page = malloc(nand->page_size);
-
- while (data_size > 0) {
- uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
- uint32_t page_address;
-
- memset(page, 0xff, nand->page_size);
- memcpy(page, data, thisrun_size);
-
- page_address = address / nand->page_size;
-
- nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
-
- address += thisrun_size;
- data += thisrun_size;
- data_size -= thisrun_size;
- }
-
- free(page);
-
- return ERROR_OK;
-}
-#endif
-
-int nand_write_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- uint32_t block;
-
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
-
- block = page / (nand->erase_size / nand->page_size);
- if (nand->blocks[block].is_erased == 1)
- nand->blocks[block].is_erased = 0;
-
- if (nand->use_raw || nand->controller->write_page == NULL)
- return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
- else
- return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
-}
-
-int nand_read_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
-
- if (nand->use_raw || nand->controller->read_page == NULL)
- return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
- else
- return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
-}
-
-int nand_page_command(struct nand_device *nand, uint32_t page,
- uint8_t cmd, bool oob_only)
-{
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
-
- if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
- cmd = NAND_CMD_READOOB;
-
- nand->controller->command(nand, cmd);
-
- if (nand->page_size <= 512) {
- /* small page device */
-
- /* column (always 0, we start at the beginning of a page/OOB area) */
- nand->controller->address(nand, 0x0);
-
- /* row */
- nand->controller->address(nand, page & 0xff);
- nand->controller->address(nand, (page >> 8) & 0xff);
-
- /* 4th cycle only on devices with more than 32 MiB */
- if (nand->address_cycles >= 4)
- nand->controller->address(nand, (page >> 16) & 0xff);
-
- /* 5th cycle only on devices with more than 8 GiB */
- if (nand->address_cycles >= 5)
- nand->controller->address(nand, (page >> 24) & 0xff);
- } else {
- /* large page device */
-
- /* column (0 when we start at the beginning of a page,
- * or 2048 for the beginning of OOB area)
- */
- nand->controller->address(nand, 0x0);
- if (oob_only)
- nand->controller->address(nand, 0x8);
- else
- nand->controller->address(nand, 0x0);
-
- /* row */
- nand->controller->address(nand, page & 0xff);
- nand->controller->address(nand, (page >> 8) & 0xff);
-
- /* 5th cycle only on devices with more than 128 MiB */
- if (nand->address_cycles >= 5)
- nand->controller->address(nand, (page >> 16) & 0xff);
-
- /* large page devices need a start command if reading */
- if (NAND_CMD_READ0 == cmd)
- nand->controller->command(nand, NAND_CMD_READSTART);
- }
-
- if (nand->controller->nand_ready) {
- if (!nand->controller->nand_ready(nand, 100))
- return ERROR_NAND_OPERATION_TIMEOUT;
- } else {
- /* nand_poll_read() cannot be used during nand read */
- alive_sleep(1);
- }
-
- return ERROR_OK;
-}
-
-int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
-{
- int retval = ERROR_NAND_NO_BUFFER;
-
- if (nand->controller->read_block_data != NULL)
- retval = (nand->controller->read_block_data)(nand, data, size);
-
- if (ERROR_NAND_NO_BUFFER == retval) {
- uint32_t i;
- int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
-
- retval = ERROR_OK;
- for (i = 0; retval == ERROR_OK && i < size; i += incr) {
- retval = nand->controller->read_data(nand, data);
- data += incr;
- }
- }
-
- return retval;
-}
-
-int nand_read_page_raw(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- int retval;
-
- retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
- if (ERROR_OK != retval)
- return retval;
-
- if (data)
- nand_read_data_page(nand, data, data_size);
-
- if (oob)
- nand_read_data_page(nand, oob, oob_size);
-
- return ERROR_OK;
-}
-
-int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
-{
- int retval = ERROR_NAND_NO_BUFFER;
-
- if (nand->controller->write_block_data != NULL)
- retval = (nand->controller->write_block_data)(nand, data, size);
-
- if (ERROR_NAND_NO_BUFFER == retval) {
- bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
- uint32_t incr = is16bit ? 2 : 1;
- uint16_t write_data;
- uint32_t i;
-
- for (i = 0; i < size; i += incr) {
- if (is16bit)
- write_data = le_to_h_u16(data);
- else
- write_data = *data;
-
- retval = nand->controller->write_data(nand, write_data);
- if (ERROR_OK != retval)
- break;
-
- data += incr;
- }
- }
-
- return retval;
-}
-
-int nand_write_finish(struct nand_device *nand)
-{
- int retval;
- uint8_t status;
-
- nand->controller->command(nand, NAND_CMD_PAGEPROG);
-
- retval = nand->controller->nand_ready ?
- nand->controller->nand_ready(nand, 100) :
- nand_poll_ready(nand, 100);
- if (!retval)
- return ERROR_NAND_OPERATION_TIMEOUT;
-
- retval = nand_read_status(nand, &status);
- if (ERROR_OK != retval) {
- LOG_ERROR("couldn't read status");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & NAND_STATUS_FAIL) {
- LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
- status);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-int nand_write_page_raw(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- int retval;
-
- retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
- if (ERROR_OK != retval)
- return retval;
-
- if (data) {
- retval = nand_write_data_page(nand, data, data_size);
- if (ERROR_OK != retval) {
- LOG_ERROR("Unable to write data to NAND device");
- return retval;
- }
- }
-
- if (oob) {
- retval = nand_write_data_page(nand, oob, oob_size);
- if (ERROR_OK != retval) {
- LOG_ERROR("Unable to write OOB data to NAND device");
- return retval;
- }
- }
-
- return nand_write_finish(nand);
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/core.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/core.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/core.h
deleted file mode 100755
index 308859b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/core.h
+++ /dev/null
@@ -1,234 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * Partially based on linux/include/linux/mtd/nand.h *
- * Copyright (C) 2000 David Woodhouse <dw...@mvhi.com> *
- * Copyright (C) 2000 Steven J. Hill <sj...@realitydiluted.com> *
- * Copyright (C) 2000 Thomas Gleixner <tg...@linutronix.de> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FLASH_NAND_CORE_H
-#define FLASH_NAND_CORE_H
-
-#include <flash/common.h>
-
-/**
- * Representation of a single NAND block in a NAND device.
- */
-struct nand_block {
- /** Offset to the block. */
- uint32_t offset;
-
- /** Size of the block. */
- uint32_t size;
-
- /** True if the block has been erased. */
- int is_erased;
-
- /** True if the block is bad. */
- int is_bad;
-};
-
-struct nand_oobfree {
- int offset;
- int length;
-};
-
-struct nand_ecclayout {
- int eccbytes;
- int eccpos[64];
- int oobavail;
- struct nand_oobfree oobfree[2];
-};
-
-struct nand_device {
- const char *name;
- struct target *target;
- struct nand_flash_controller *controller;
- void *controller_priv;
- struct nand_manufacturer *manufacturer;
- struct nand_info *device;
- int bus_width;
- int address_cycles;
- int page_size;
- int erase_size;
- int use_raw;
- int num_blocks;
- struct nand_block *blocks;
- struct nand_device *next;
-};
-
-/* NAND Flash Manufacturer ID Codes
- */
-enum {
- NAND_MFR_TOSHIBA = 0x98,
- NAND_MFR_SAMSUNG = 0xec,
- NAND_MFR_FUJITSU = 0x04,
- NAND_MFR_NATIONAL = 0x8f,
- NAND_MFR_RENESAS = 0x07,
- NAND_MFR_STMICRO = 0x20,
- NAND_MFR_HYNIX = 0xad,
- NAND_MFR_MICRON = 0x2c,
-};
-
-struct nand_manufacturer {
- int id;
- const char *name;
-};
-
-struct nand_info {
- int mfr_id;
- int id;
- int page_size;
- int chip_size;
- int erase_size;
- int options;
- const char *name;
-};
-
-/* Option constants for bizarre disfunctionality and real features
- */
-enum {
- /* Chip can not auto increment pages */
- NAND_NO_AUTOINCR = 0x00000001,
-
- /* Buswitdh is 16 bit */
- NAND_BUSWIDTH_16 = 0x00000002,
-
- /* Device supports partial programming without padding */
- NAND_NO_PADDING = 0x00000004,
-
- /* Chip has cache program function */
- NAND_CACHEPRG = 0x00000008,
-
- /* Chip has copy back function */
- NAND_COPYBACK = 0x00000010,
-
- /* AND Chip which has 4 banks and a confusing page / block
- * assignment. See Renesas datasheet for further information */
- NAND_IS_AND = 0x00000020,
-
- /* Chip has a array of 4 pages which can be read without
- * additional ready /busy waits */
- NAND_4PAGE_ARRAY = 0x00000040,
-
- /* Chip requires that BBT is periodically rewritten to prevent
- * bits from adjacent blocks from 'leaking' in altering data.
- * This happens with the Renesas AG-AND chips, possibly others. */
- BBT_AUTO_REFRESH = 0x00000080,
-
- /* Chip does not require ready check on read. True
- * for all large page devices, as they do not support
- * autoincrement.*/
- NAND_NO_READRDY = 0x00000100,
-
- /* Options valid for Samsung large page devices */
- NAND_SAMSUNG_LP_OPTIONS = (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK),
-
- /* Options for new chips with large page size. The pagesize and the
- * erasesize is determined from the extended id bytes
- */
- LP_OPTIONS = (NAND_SAMSUNG_LP_OPTIONS | NAND_NO_READRDY | NAND_NO_AUTOINCR),
- LP_OPTIONS16 = (LP_OPTIONS | NAND_BUSWIDTH_16),
-};
-
-enum {
- /* Standard NAND flash commands */
- NAND_CMD_READ0 = 0x0,
- NAND_CMD_READ1 = 0x1,
- NAND_CMD_RNDOUT = 0x5,
- NAND_CMD_PAGEPROG = 0x10,
- NAND_CMD_READOOB = 0x50,
- NAND_CMD_ERASE1 = 0x60,
- NAND_CMD_STATUS = 0x70,
- NAND_CMD_STATUS_MULTI = 0x71,
- NAND_CMD_SEQIN = 0x80,
- NAND_CMD_RNDIN = 0x85,
- NAND_CMD_READID = 0x90,
- NAND_CMD_ERASE2 = 0xd0,
- NAND_CMD_RESET = 0xff,
-
- /* Extended commands for large page devices */
- NAND_CMD_READSTART = 0x30,
- NAND_CMD_RNDOUTSTART = 0xE0,
- NAND_CMD_CACHEDPROG = 0x15,
-};
-
-/* Status bits */
-enum {
- NAND_STATUS_FAIL = 0x01,
- NAND_STATUS_FAIL_N1 = 0x02,
- NAND_STATUS_TRUE_READY = 0x20,
- NAND_STATUS_READY = 0x40,
- NAND_STATUS_WP = 0x80,
-};
-
-/* OOB (spare) data formats */
-enum oob_formats {
- NAND_OOB_NONE = 0x0, /* no OOB data at all */
- NAND_OOB_RAW = 0x1, /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for
- *2048b page sizes) */
- NAND_OOB_ONLY = 0x2, /* only OOB data */
- NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */
- NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */
- NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */
- NAND_OOB_JFFS2 = 0x100, /* when writing, use JFFS2 OOB layout */
- NAND_OOB_YAFFS2 = 0x100,/* when writing, use YAFFS2 OOB layout */
-};
-
-
-struct nand_device *get_nand_device_by_num(int num);
-
-int nand_page_command(struct nand_device *nand, uint32_t page,
- uint8_t cmd, bool oob_only);
-
-int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size);
-int nand_write_data_page(struct nand_device *nand,
- uint8_t *data, uint32_t size);
-
-int nand_write_finish(struct nand_device *nand);
-
-int nand_read_page_raw(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
-int nand_write_page_raw(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
-
-int nand_read_status(struct nand_device *nand, uint8_t *status);
-
-int nand_calculate_ecc(struct nand_device *nand,
- const uint8_t *dat, uint8_t *ecc_code);
-int nand_calculate_ecc_kw(struct nand_device *nand,
- const uint8_t *dat, uint8_t *ecc_code);
-
-int nand_register_commands(struct command_context *cmd_ctx);
-
-/** helper for parsing a nand device command argument string */
-COMMAND_HELPER(nand_command_get_device, unsigned name_index,
- struct nand_device **nand);
-
-
-#define ERROR_NAND_DEVICE_INVALID (-1100)
-#define ERROR_NAND_OPERATION_FAILED (-1101)
-#define ERROR_NAND_OPERATION_TIMEOUT (-1102)
-#define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103)
-#define ERROR_NAND_DEVICE_NOT_PROBED (-1104)
-#define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105)
-#define ERROR_NAND_NO_BUFFER (-1106)
-
-#endif /* FLASH_NAND_CORE_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/davinci.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/davinci.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/davinci.c
deleted file mode 100755
index c88046d..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/davinci.c
+++ /dev/null
@@ -1,795 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by David Brownell *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * DaVinci family NAND controller support for OpenOCD.
- *
- * This driver uses hardware ECC (1-bit or 4-bit) unless
- * the chip is accessed in "raw" mode.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "arm_io.h"
-#include <target/target.h>
-
-enum ecc {
- HWECC1, /* all controllers support 1-bit ECC */
- HWECC4, /* newer chips also have 4-bit ECC hardware */
- HWECC4_INFIX, /* avoid this layout, except maybe for boot code */
-};
-
-struct davinci_nand {
- uint8_t chipsel; /* chipselect 0..3 == CS2..CS5 */
- uint8_t eccmode;
-
- /* Async EMIF controller base */
- uint32_t aemif;
-
- /* NAND chip addresses */
- uint32_t data; /* without CLE or ALE */
- uint32_t cmd; /* with CLE */
- uint32_t addr; /* with ALE */
-
- /* write acceleration */
- struct arm_nand_data io;
-
- /* page i/o for the relevant flavor of hardware ECC */
- int (*read_page)(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
- int (*write_page)(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size);
-};
-
-#define NANDFCR 0x60 /* flash control register */
-#define NANDFSR 0x64 /* flash status register */
-#define NANDFECC 0x70 /* 1-bit ECC data, CS0, 1st of 4 */
-#define NAND4BITECCLOAD 0xbc /* 4-bit ECC, load saved values */
-#define NAND4BITECC 0xc0 /* 4-bit ECC data, 1st of 4 */
-#define NANDERRADDR 0xd0 /* 4-bit ECC err addr, 1st of 2 */
-#define NANDERRVAL 0xd8 /* 4-bit ECC err value, 1st of 2 */
-
-static int halted(struct target *target, const char *label)
-{
- if (target->state == TARGET_HALTED)
- return true;
-
- LOG_ERROR("Target must be halted to use NAND controller (%s)", label);
- return false;
-}
-
-static int davinci_init(struct nand_device *nand)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t nandfcr;
-
- if (!halted(target, "init"))
- return ERROR_NAND_OPERATION_FAILED;
-
- /* We require something else to have configured AEMIF to talk
- * to NAND chip in this range (including timings and width).
- */
- target_read_u32(target, info->aemif + NANDFCR, &nandfcr);
- if (!(nandfcr & (1 << info->chipsel))) {
- LOG_ERROR("chip address %08" PRIx32 " not NAND-enabled?", info->data);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* REVISIT verify: AxCR must be in 8-bit mode, since that's all we
- * tested. 16 bit support should work too; but not with 4-bit ECC.
- */
-
- return ERROR_OK;
-}
-
-static int davinci_reset(struct nand_device *nand)
-{
- return ERROR_OK;
-}
-
-static int davinci_nand_ready(struct nand_device *nand, int timeout)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t nandfsr;
-
- /* NOTE: return code is zero/error, else success; not ERROR_* */
-
- if (!halted(target, "ready"))
- return 0;
-
- do {
- target_read_u32(target, info->aemif + NANDFSR, &nandfsr);
-
- if (nandfsr & 0x01)
- return 1;
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-static int davinci_command(struct nand_device *nand, uint8_t command)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (!halted(target, "command"))
- return ERROR_NAND_OPERATION_FAILED;
-
- target_write_u8(target, info->cmd, command);
- return ERROR_OK;
-}
-
-static int davinci_address(struct nand_device *nand, uint8_t address)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (!halted(target, "address"))
- return ERROR_NAND_OPERATION_FAILED;
-
- target_write_u8(target, info->addr, address);
- return ERROR_OK;
-}
-
-static int davinci_write_data(struct nand_device *nand, uint16_t data)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (!halted(target, "write_data"))
- return ERROR_NAND_OPERATION_FAILED;
-
- target_write_u8(target, info->data, data);
- return ERROR_OK;
-}
-
-static int davinci_read_data(struct nand_device *nand, void *data)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (!halted(target, "read_data"))
- return ERROR_NAND_OPERATION_FAILED;
-
- target_read_u8(target, info->data, data);
- return ERROR_OK;
-}
-
-/* REVISIT a bit of native code should let block reads be MUCH faster */
-
-static int davinci_read_block_data(struct nand_device *nand,
- uint8_t *data, int data_size)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t nfdata = info->data;
- uint32_t tmp;
-
- if (!halted(target, "read_block"))
- return ERROR_NAND_OPERATION_FAILED;
-
- while (data_size >= 4) {
- target_read_u32(target, nfdata, &tmp);
-
- data[0] = tmp;
- data[1] = tmp >> 8;
- data[2] = tmp >> 16;
- data[3] = tmp >> 24;
-
- data_size -= 4;
- data += 4;
- }
-
- while (data_size > 0) {
- target_read_u8(target, nfdata, data);
-
- data_size -= 1;
- data += 1;
- }
-
- return ERROR_OK;
-}
-
-static int davinci_write_block_data(struct nand_device *nand,
- uint8_t *data, int data_size)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t nfdata = info->data;
- uint32_t tmp;
- int status;
-
- if (!halted(target, "write_block"))
- return ERROR_NAND_OPERATION_FAILED;
-
- /* try the fast way first */
- status = arm_nandwrite(&info->io, data, data_size);
- if (status != ERROR_NAND_NO_BUFFER)
- return status;
-
- /* else do it slowly */
- while (data_size >= 4) {
- tmp = le_to_h_u32(data);
- target_write_u32(target, nfdata, tmp);
-
- data_size -= 4;
- data += 4;
- }
-
- while (data_size > 0) {
- target_write_u8(target, nfdata, *data);
-
- data_size -= 1;
- data += 1;
- }
-
- return ERROR_OK;
-}
-
-static int davinci_write_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
-{
- struct davinci_nand *info = nand->controller_priv;
- uint8_t *ooballoc = NULL;
- int status;
-
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
- if (!halted(nand->target, "write_page"))
- return ERROR_NAND_OPERATION_FAILED;
-
- /* Always write both data and OOB ... we are not "raw" I/O! */
- if (!data) {
- LOG_ERROR("Missing NAND data; try 'nand raw_access enable'");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* If we're not given OOB, write 0xff where we don't write ECC codes. */
- switch (nand->page_size) {
- case 512:
- oob_size = 16;
- break;
- case 2048:
- oob_size = 64;
- break;
- case 4096:
- oob_size = 128;
- break;
- default:
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (!oob) {
- ooballoc = malloc(oob_size);
- if (!ooballoc)
- return ERROR_NAND_OPERATION_FAILED;
- oob = ooballoc;
- memset(oob, 0x0ff, oob_size);
- }
-
- /* REVISIT avoid wasting SRAM: unless nand->use_raw is set,
- * use 512 byte chunks. Read side support will often want
- * to include oob_size ...
- */
- info->io.chunk_size = nand->page_size;
-
- status = info->write_page(nand, page, data, data_size, oob, oob_size);
- free(ooballoc);
- return status;
-}
-
-static int davinci_read_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
-{
- struct davinci_nand *info = nand->controller_priv;
-
- if (!nand->device)
- return ERROR_NAND_DEVICE_NOT_PROBED;
- if (!halted(nand->target, "read_page"))
- return ERROR_NAND_OPERATION_FAILED;
-
- return info->read_page(nand, page, data, data_size, oob, oob_size);
-}
-
-static void davinci_write_pagecmd(struct nand_device *nand, uint8_t cmd, uint32_t page)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- int page3 = nand->address_cycles - (nand->page_size == 512);
-
- /* write command ({page,otp}x{read,program} */
- target_write_u8(target, info->cmd, cmd);
-
- /* column address (beginning-of-page) */
- target_write_u8(target, info->addr, 0);
- if (nand->page_size > 512)
- target_write_u8(target, info->addr, 0);
-
- /* page address */
- target_write_u8(target, info->addr, page);
- target_write_u8(target, info->addr, page >> 8);
- if (page3)
- target_write_u8(target, info->addr, page >> 16);
- if (page3 == 2)
- target_write_u8(target, info->addr, page >> 24);
-}
-
-static int davinci_seek_column(struct nand_device *nand, uint16_t column)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
-
- /* Random read, we must have issued a page read already */
- target_write_u8(target, info->cmd, NAND_CMD_RNDOUT);
-
- target_write_u8(target, info->addr, column);
-
- if (nand->page_size > 512) {
- target_write_u8(target, info->addr, column >> 8);
- target_write_u8(target, info->cmd, NAND_CMD_RNDOUTSTART);
- }
-
- if (!davinci_nand_ready(nand, 100))
- return ERROR_NAND_OPERATION_TIMEOUT;
-
- return ERROR_OK;
-}
-
-static int davinci_writepage_tail(struct nand_device *nand,
- uint8_t *oob, uint32_t oob_size)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- uint8_t status;
-
- if (oob_size)
- davinci_write_block_data(nand, oob, oob_size);
-
- /* non-cachemode page program */
- target_write_u8(target, info->cmd, NAND_CMD_PAGEPROG);
-
- if (!davinci_nand_ready(nand, 100))
- return ERROR_NAND_OPERATION_TIMEOUT;
-
- if (nand_read_status(nand, &status) != ERROR_OK) {
- LOG_ERROR("couldn't read status");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & NAND_STATUS_FAIL) {
- LOG_ERROR("write operation failed, status: 0x%02x", status);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-/*
- * All DaVinci family chips support 1-bit ECC on a per-chipselect basis.
- */
-static int davinci_write_page_ecc1(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
-{
- unsigned oob_offset;
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- const uint32_t fcr_addr = info->aemif + NANDFCR;
- const uint32_t ecc1_addr = info->aemif + NANDFECC + (4 * info->chipsel);
- uint32_t fcr, ecc1;
-
- /* Write contiguous ECC bytes starting at specified offset.
- * NOTE: Linux reserves twice as many bytes as we need; and
- * for 16-bit OOB, those extra bytes are discontiguous.
- */
- switch (nand->page_size) {
- case 512:
- oob_offset = 0;
- break;
- case 2048:
- oob_offset = 40;
- break;
- default:
- oob_offset = 80;
- break;
- }
-
- davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
-
- /* scrub any old ECC state */
- target_read_u32(target, ecc1_addr, &ecc1);
-
- target_read_u32(target, fcr_addr, &fcr);
- fcr |= 1 << (8 + info->chipsel);
-
- do {
- /* set "start csX 1bit ecc" bit */
- target_write_u32(target, fcr_addr, fcr);
-
- /* write 512 bytes */
- davinci_write_block_data(nand, data, 512);
- data += 512;
- data_size -= 512;
-
- /* read the ecc, pack to 3 bytes, and invert so the ecc
- * in an erased block is correct
- */
- target_read_u32(target, ecc1_addr, &ecc1);
- ecc1 = (ecc1 & 0x0fff) | ((ecc1 & 0x0fff0000) >> 4);
- ecc1 = ~ecc1;
-
- /* save correct ECC code into oob data */
- oob[oob_offset++] = (uint8_t)(ecc1);
- oob[oob_offset++] = (uint8_t)(ecc1 >> 8);
- oob[oob_offset++] = (uint8_t)(ecc1 >> 16);
-
- } while (data_size);
-
- /* write OOB into spare area */
- return davinci_writepage_tail(nand, oob, oob_size);
-}
-
-/*
- * Preferred "new style" ECC layout for use with 4-bit ECC. This somewhat
- * slows down large page reads done with error correction (since the OOB
- * is read first, so its ECC data can be used incrementally), but the
- * manufacturer bad block markers are safe. Contrast: old "infix" style.
- */
-static int davinci_write_page_ecc4(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
-{
- static const uint8_t ecc512[] = {
- 0, 1, 2, 3, 4, /* 5== mfr badblock */
- 6, 7, /* 8..12 for BBT or JFFS2 */ 13, 14, 15,
- };
- static const uint8_t ecc2048[] = {
- 24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
- 34, 35, 36, 37, 38, 39, 40, 41, 42, 43,
- 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
- 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
- };
- static const uint8_t ecc4096[] = {
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,
- 58, 59, 60, 61, 62, 63, 64, 65, 66, 67,
- 68, 69, 70, 71, 72, 73, 74, 75, 76, 77,
- 78, 79, 80, 81, 82, 83, 84, 85, 86, 87,
- 88, 89, 90, 91, 92, 93, 94, 95, 96, 97,
- 98, 99, 100, 101, 102, 103, 104, 105, 106, 107,
- 108, 109, 110, 111, 112, 113, 114, 115, 116, 117,
- 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
- };
-
- struct davinci_nand *info = nand->controller_priv;
- const uint8_t *l;
- struct target *target = nand->target;
- const uint32_t fcr_addr = info->aemif + NANDFCR;
- const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
- uint32_t fcr, ecc4;
-
- /* Use the same ECC layout Linux uses. For small page chips
- * it's a bit cramped.
- *
- * NOTE: at this writing, 4KB pages have issues in Linux
- * because they need more than 64 bytes of ECC data, which
- * the standard ECC logic can't handle.
- */
- switch (nand->page_size) {
- case 512:
- l = ecc512;
- break;
- case 2048:
- l = ecc2048;
- break;
- default:
- l = ecc4096;
- break;
- }
-
- davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
-
- /* scrub any old ECC state */
- target_read_u32(target, info->aemif + NANDERRVAL, &ecc4);
-
- target_read_u32(target, fcr_addr, &fcr);
- fcr &= ~(0x03 << 4);
- fcr |= (1 << 12) | (info->chipsel << 4);
-
- do {
- uint32_t raw_ecc[4], *p;
- int i;
-
- /* start 4bit ecc on csX */
- target_write_u32(target, fcr_addr, fcr);
-
- /* write 512 bytes */
- davinci_write_block_data(nand, data, 512);
- data += 512;
- data_size -= 512;
-
- /* read the ecc, then save it into 10 bytes in the oob */
- for (i = 0; i < 4; i++) {
- target_read_u32(target, ecc4_addr + 4 * i, &raw_ecc[i]);
- raw_ecc[i] &= 0x03ff03ff;
- }
- for (i = 0, p = raw_ecc; i < 2; i++, p += 2) {
- oob[*l++] = p[0] & 0xff;
- oob[*l++] = ((p[0] >> 8) & 0x03) | ((p[0] >> 14) & 0xfc);
- oob[*l++] = ((p[0] >> 22) & 0x0f) | ((p[1] << 4) & 0xf0);
- oob[*l++] = ((p[1] >> 4) & 0x3f) | ((p[1] >> 10) & 0xc0);
- oob[*l++] = (p[1] >> 18) & 0xff;
- }
-
- } while (data_size);
-
- /* write OOB into spare area */
- return davinci_writepage_tail(nand, oob, oob_size);
-}
-
-/*
- * "Infix" OOB ... like Linux ECC_HW_SYNDROME. Avoided because it trashes
- * manufacturer bad block markers, except on small page chips. Once you
- * write to a page using this scheme, you need specialized code to update
- * it (code which ignores now-invalid bad block markers).
- *
- * This is needed *only* to support older firmware. Older ROM Boot Loaders
- * need it to read their second stage loader (UBL) into SRAM, but from then
- * on the whole system can use the cleaner non-infix layouts. Systems with
- * older second stage loaders (ABL/U-Boot, etc) or other system software
- * (MVL 4.x/5.x kernels, filesystems, etc) may need it more generally.
- */
-static int davinci_write_page_ecc4infix(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
-{
- struct davinci_nand *info = nand->controller_priv;
- struct target *target = nand->target;
- const uint32_t fcr_addr = info->aemif + NANDFCR;
- const uint32_t ecc4_addr = info->aemif + NAND4BITECC;
- uint32_t fcr, ecc4;
-
- davinci_write_pagecmd(nand, NAND_CMD_SEQIN, page);
-
- /* scrub any old ECC state */
- target_read_u32(target, info->aemif + NANDERRVAL, &ecc4);
-
- target_read_u32(target, fcr_addr, &fcr);
- fcr &= ~(0x03 << 4);
- fcr |= (1 << 12) | (info->chipsel << 4);
-
- do {
- uint32_t raw_ecc[4], *p;
- uint8_t *l;
- int i;
-
- /* start 4bit ecc on csX */
- target_write_u32(target, fcr_addr, fcr);
-
- /* write 512 bytes */
- davinci_write_block_data(nand, data, 512);
- data += 512;
- data_size -= 512;
-
- /* read the ecc */
- for (i = 0; i < 4; i++) {
- target_read_u32(target, ecc4_addr + 4 * i, &raw_ecc[i]);
- raw_ecc[i] &= 0x03ff03ff;
- }
-
- /* skip 6 bytes of prepad, then pack 10 packed ecc bytes */
- for (i = 0, l = oob + 6, p = raw_ecc; i < 2; i++, p += 2) {
- *l++ = p[0] & 0xff;
- *l++ = ((p[0] >> 8) & 0x03) | ((p[0] >> 14) & 0xfc);
- *l++ = ((p[0] >> 22) & 0x0f) | ((p[1] << 4) & 0xf0);
- *l++ = ((p[1] >> 4) & 0x3f) | ((p[1] >> 10) & 0xc0);
- *l++ = (p[1] >> 18) & 0xff;
- }
-
- /* write this "out-of-band" data -- infix */
- davinci_write_block_data(nand, oob, 16);
- oob += 16;
- oob_size -= 16;
-
- } while (data_size);
-
- /* the last data and OOB writes included the spare area */
- return davinci_writepage_tail(nand, NULL, 0);
-}
-
-static int davinci_read_page_ecc4infix(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
-{
- int read_size;
- int want_col, at_col;
- int ret;
-
- davinci_write_pagecmd(nand, NAND_CMD_READ0, page);
-
- /* large page devices need a start command */
- if (nand->page_size > 512)
- davinci_command(nand, NAND_CMD_READSTART);
-
- if (!davinci_nand_ready(nand, 100))
- return ERROR_NAND_OPERATION_TIMEOUT;
-
- /* NOTE: not bothering to compute and use ECC data for now */
-
- want_col = 0;
- at_col = 0;
- while ((data && data_size) || (oob && oob_size)) {
-
- if (data && data_size) {
- if (want_col != at_col) {
- /* Reads are slow, so seek past them when we can */
- ret = davinci_seek_column(nand, want_col);
- if (ret != ERROR_OK)
- return ret;
- at_col = want_col;
- }
- /* read 512 bytes or data_size, whichever is smaller*/
- read_size = data_size > 512 ? 512 : data_size;
- davinci_read_block_data(nand, data, read_size);
- data += read_size;
- data_size -= read_size;
- at_col += read_size;
- }
- want_col += 512;
-
- if (oob && oob_size) {
- if (want_col != at_col) {
- ret = davinci_seek_column(nand, want_col);
- if (ret != ERROR_OK)
- return ret;
- at_col = want_col;
- }
- /* read this "out-of-band" data -- infix */
- read_size = oob_size > 16 ? 16 : oob_size;
- davinci_read_block_data(nand, oob, read_size);
- oob += read_size;
- oob_size -= read_size;
- at_col += read_size;
- }
- want_col += 16;
- }
- return ERROR_OK;
-}
-
-NAND_DEVICE_COMMAND_HANDLER(davinci_nand_device_command)
-{
- struct davinci_nand *info;
- unsigned long chip, aemif;
- enum ecc eccmode;
- int chipsel;
-
- /* arguments:
- * - "davinci"
- * - target
- * - nand chip address
- * - ecc mode
- * - aemif address
- * Plus someday, optionally, ALE and CLE masks.
- */
- if (CMD_ARGC < 5)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], chip);
- if (chip == 0) {
- LOG_ERROR("Invalid NAND chip address %s", CMD_ARGV[2]);
- goto fail;
- }
-
- if (strcmp(CMD_ARGV[3], "hwecc1") == 0)
- eccmode = HWECC1;
- else if (strcmp(CMD_ARGV[3], "hwecc4") == 0)
- eccmode = HWECC4;
- else if (strcmp(CMD_ARGV[3], "hwecc4_infix") == 0)
- eccmode = HWECC4_INFIX;
- else {
- LOG_ERROR("Invalid ecc mode %s", CMD_ARGV[3]);
- goto fail;
- }
-
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[4], aemif);
- if (aemif == 0) {
- LOG_ERROR("Invalid AEMIF controller address %s", CMD_ARGV[4]);
- goto fail;
- }
-
- /* REVISIT what we'd *like* to do is look up valid ranges using
- * target-specific declarations, and not even need to pass the
- * AEMIF controller address.
- */
- if (aemif == 0x01e00000 /* dm6446, dm357 */
- || aemif == 0x01e10000 /* dm335, dm355 */
- || aemif == 0x01d10000 /* dm365 */
- ) {
- if (chip < 0x02000000 || chip >= 0x0a000000) {
- LOG_ERROR("NAND address %08lx out of range?", chip);
- goto fail;
- }
- chipsel = (chip - 0x02000000) >> 25;
- } else {
- LOG_ERROR("unrecognized AEMIF controller address %08lx", aemif);
- goto fail;
- }
-
- info = calloc(1, sizeof *info);
- if (info == NULL)
- goto fail;
-
- info->eccmode = eccmode;
- info->chipsel = chipsel;
- info->aemif = aemif;
- info->data = chip;
- info->cmd = chip | 0x10;
- info->addr = chip | 0x08;
-
- nand->controller_priv = info;
-
- info->io.target = nand->target;
- info->io.data = info->data;
- info->io.op = ARM_NAND_NONE;
-
- /* NOTE: for now we don't do any error correction on read.
- * Nothing else in OpenOCD currently corrects read errors,
- * and in any case it's *writing* that we care most about.
- */
- info->read_page = nand_read_page_raw;
-
- switch (eccmode) {
- case HWECC1:
- /* ECC_HW, 1-bit corrections, 3 bytes ECC per 512 data bytes */
- info->write_page = davinci_write_page_ecc1;
- break;
- case HWECC4:
- /* ECC_HW, 4-bit corrections, 10 bytes ECC per 512 data bytes */
- info->write_page = davinci_write_page_ecc4;
- break;
- case HWECC4_INFIX:
- /* Same 4-bit ECC HW, with problematic page/ecc layout */
- info->read_page = davinci_read_page_ecc4infix;
- info->write_page = davinci_write_page_ecc4infix;
- break;
- }
-
- return ERROR_OK;
-
-fail:
- return ERROR_NAND_OPERATION_FAILED;
-}
-
-struct nand_flash_controller davinci_nand_controller = {
- .name = "davinci",
- .usage = "chip_addr hwecc_mode aemif_addr",
- .nand_device_command = davinci_nand_device_command,
- .init = davinci_init,
- .reset = davinci_reset,
- .command = davinci_command,
- .address = davinci_address,
- .write_data = davinci_write_data,
- .read_data = davinci_read_data,
- .write_page = davinci_write_page,
- .read_page = davinci_read_page,
- .write_block_data = davinci_write_block_data,
- .read_block_data = davinci_read_block_data,
- .nand_ready = davinci_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.c
deleted file mode 100755
index 49e13c0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2007,2008 �yvind Harboe <oy...@zylin.com> *
- * Copyright (C) 2008 by Spencer Oliver <sp...@spen-soft.co.uk> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-#include "core.h"
-#include "driver.h"
-
-/* NAND flash controller
- */
-extern struct nand_flash_controller nonce_nand_controller;
-extern struct nand_flash_controller davinci_nand_controller;
-extern struct nand_flash_controller lpc3180_nand_controller;
-extern struct nand_flash_controller lpc32xx_nand_controller;
-extern struct nand_flash_controller orion_nand_controller;
-extern struct nand_flash_controller s3c2410_nand_controller;
-extern struct nand_flash_controller s3c2412_nand_controller;
-extern struct nand_flash_controller s3c2440_nand_controller;
-extern struct nand_flash_controller s3c2443_nand_controller;
-extern struct nand_flash_controller s3c6400_nand_controller;
-extern struct nand_flash_controller mxc_nand_flash_controller;
-extern struct nand_flash_controller imx31_nand_flash_controller;
-extern struct nand_flash_controller at91sam9_nand_controller;
-extern struct nand_flash_controller nuc910_nand_controller;
-
-/* extern struct nand_flash_controller boundary_scan_nand_controller; */
-
-static struct nand_flash_controller *nand_flash_controllers[] = {
- &nonce_nand_controller,
- &davinci_nand_controller,
- &lpc3180_nand_controller,
- &lpc32xx_nand_controller,
- &orion_nand_controller,
- &s3c2410_nand_controller,
- &s3c2412_nand_controller,
- &s3c2440_nand_controller,
- &s3c2443_nand_controller,
- &s3c6400_nand_controller,
- &mxc_nand_flash_controller,
- &imx31_nand_flash_controller,
- &at91sam9_nand_controller,
- &nuc910_nand_controller,
-/* &boundary_scan_nand_controller, */
- NULL
-};
-
-struct nand_flash_controller *nand_driver_find_by_name(const char *name)
-{
- for (unsigned i = 0; nand_flash_controllers[i]; i++) {
- struct nand_flash_controller *controller = nand_flash_controllers[i];
- if (strcmp(name, controller->name) == 0)
- return controller;
- }
- return NULL;
-}
-int nand_driver_walk(nand_driver_walker_t f, void *x)
-{
- for (unsigned i = 0; nand_flash_controllers[i]; i++) {
- int retval = (*f)(nand_flash_controllers[i], x);
- if (ERROR_OK != retval)
- return retval;
- }
- return ERROR_OK;
-}
[41/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/guess-rev.sh
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/guess-rev.sh b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/guess-rev.sh
deleted file mode 100755
index 7adbe28..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/guess-rev.sh
+++ /dev/null
@@ -1,83 +0,0 @@
-#!/bin/sh
-#
-# This scripts adds local version information from the version
-# control systems git, mercurial (hg) and subversion (svn).
-#
-# Copied from Linux 2.6.32 scripts/setlocalversion and modified
-# slightly to work better for OpenOCD.
-#
-
-usage() {
- echo "Usage: $0 [srctree]" >&2
- exit 1
-}
-
-cd "${1:-.}" || usage
-
-# Check for git and a git repo.
-if head=`git rev-parse --verify --short HEAD 2>/dev/null`; then
-
- # If we are at a tagged commit (like "v2.6.30-rc6"), we ignore it,
- # because this version is defined in the top level Makefile.
- if [ -z "`git describe --exact-match 2>/dev/null`" ]; then
-
- # If we are past a tagged commit (like "v2.6.30-rc5-302-g72357d5"),
- # we pretty print it.
- if atag="`git describe 2>/dev/null`"; then
- echo "$atag" | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}'
-
- # If we don't have a tag at all we print -g{commitish}.
- else
- printf '%s%s' -g $head
- fi
- fi
-
- # Is this git on svn?
- if git config --get svn-remote.svn.url >/dev/null; then
- printf -- '-svn%s' "`git svn find-rev $head`"
- fi
-
- # Update index only on r/w media
- [ -w . ] && git update-index --refresh --unmerged > /dev/null
-
- # Check for uncommitted changes
- if git diff-index --name-only HEAD | grep -v "^scripts/package" \
- | read dummy; then
- printf '%s' -dirty
- fi
-
- # All done with git
- exit
-fi
-
-# Check for mercurial and a mercurial repo.
-if hgid=`hg id 2>/dev/null`; then
- tag=`printf '%s' "$hgid" | cut -d' ' -f2`
-
- # Do we have an untagged version?
- if [ -z "$tag" -o "$tag" = tip ]; then
- id=`printf '%s' "$hgid" | sed 's/[+ ].*//'`
- printf '%s%s' -hg "$id"
- fi
-
- # Are there uncommitted changes?
- # These are represented by + after the changeset id.
- case "$hgid" in
- *+|*+\ *) printf '%s' -dirty ;;
- esac
-
- # All done with mercurial
- exit
-fi
-
-# Check for svn and a svn repo.
-if rev=`svn info 2>/dev/null | grep '^Last Changed Rev'`; then
- rev=`echo $rev | awk '{print $NF}'`
- printf -- '-svn%s' "$rev"
-
- # All done with svn
- exit
-fi
-
-# There's no reecognized repository; we must be a snapshot.
-printf -- '-snapshot'
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/jimtcl
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/jimtcl b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/jimtcl
deleted file mode 160000
index 3d21683..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/jimtcl
+++ /dev/null
@@ -1 +0,0 @@
-Subproject commit 3d2168352d3d2125ef0a70bd34c6af025687a5e7
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/Makefile.am
deleted file mode 100755
index 26e02d0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/Makefile.am
+++ /dev/null
@@ -1,116 +0,0 @@
-include $(top_srcdir)/common.mk
-
-SUBDIRS = \
- jtag \
- helper \
- target \
- transport \
- flash \
- svf \
- xsvf \
- pld \
- server \
- rtos
-
-noinst_LTLIBRARIES = libopenocd.la
-bin_PROGRAMS = openocd
-
-MAINFILE = main.c
-
-openocd_SOURCES = $(MAINFILE)
-openocd_LDADD = libopenocd.la
-
-if INTERNAL_JIMTCL
-openocd_LDADD += $(top_builddir)/jimtcl/libjim.a
-else
-openocd_LDADD += -ljim
-endif
-
-if ULINK
-openocd_LDADD += -lm
-endif
-
-libopenocd_la_SOURCES = \
- hello.c \
- openocd.c
-
-noinst_HEADERS = \
- hello.h \
- openocd.h
-
-libopenocd_la_CPPFLAGS = -DPKGBLDDATE=\"`date +%F-%R`\"
-
-# banner output includes RELSTR appended to $VERSION from the configure script
-# guess-rev.sh returns either a repository version ID or "-snapshot"
-if RELEASE
-libopenocd_la_CPPFLAGS += -DRELSTR=\"\"
-libopenocd_la_CPPFLAGS += -DGITVERSION=\"\"
-else
-libopenocd_la_CPPFLAGS += -DRELSTR=\"`$(top_srcdir)/guess-rev.sh $(top_srcdir)`\"
-libopenocd_la_CPPFLAGS += -DGITVERSION=\"`cd $(top_srcdir) && git describe`\"
-endif
-
-# add default CPPFLAGS
-libopenocd_la_CPPFLAGS += $(AM_CPPFLAGS) $(CPPFLAGS)
-
-# the library search path.
-libopenocd_la_LDFLAGS = $(all_libraries)
-
-if IS_MINGW
-MINGWLDADD = -lws2_32
-else
-MINGWLDADD =
-endif
-
-libopenocd_la_LIBADD = \
- $(top_builddir)/src/xsvf/libxsvf.la \
- $(top_builddir)/src/svf/libsvf.la \
- $(top_builddir)/src/pld/libpld.la \
- $(top_builddir)/src/jtag/libjtag.la \
- $(top_builddir)/src/transport/libtransport.la \
- $(top_builddir)/src/flash/libflash.la \
- $(top_builddir)/src/target/libtarget.la \
- $(top_builddir)/src/server/libserver.la \
- $(top_builddir)/src/rtos/librtos.la \
- $(top_builddir)/src/helper/libhelper.la \
- $(LIBFTDI_LIBS) $(MINGWLDADD) \
- $(HIDAPI_LIBS) $(LIBUSB0_LIBS) $(LIBUSB1_LIBS)
-
-STARTUP_TCL_SRCS = \
- $(srcdir)/helper/startup.tcl \
- $(srcdir)/jtag/startup.tcl \
- $(srcdir)/target/startup.tcl \
- $(srcdir)/flash/startup.tcl \
- $(srcdir)/server/startup.tcl
-
-EXTRA_DIST = $(STARTUP_TCL_SRCS)
-
-BUILT_SOURCES = startup_tcl.inc
-
-startup.tcl: $(STARTUP_TCL_SRCS)
- cat $^ > $@
-
-BIN2C = $(top_srcdir)/src/helper/bin2char.sh
-
-# Convert .tcl to c-array
-startup_tcl.inc: startup.tcl $(BIN2C)
- $(BIN2C) < $< > $@ || { rm -f $@; false; }
-
-# add generated files to make clean list
-CLEANFILES = startup.tcl startup_tcl.inc
-
-# we do not want generated file in the dist
-dist-hook:
- rm -f $(distdir)/startup_tcl.inc
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
-
-# The "quick" target builds executables & reinstalls the executables
-# Primary use: developer types to quicken the edit/compile/debug
-# cycle. by not requiring a "full build and full install". Note the
-# assumption is: You are only rebuilding the EXE.... and everything
-# else is/was previously installed.
-#
-# use at your own risk
-quick: all install-binPROGRAMS
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/Makefile.am
deleted file mode 100755
index ece4018..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/Makefile.am
+++ /dev/null
@@ -1,23 +0,0 @@
-include $(top_srcdir)/common.mk
-
-SUBDIRS = \
- nor \
- nand
-
-METASOURCES = AUTO
-noinst_LTLIBRARIES = libflash.la
-libflash_la_SOURCES = \
- common.c \
- mflash.c
-
-libflash_la_LIBADD = \
- $(top_builddir)/src/flash/nor/libocdflashnor.la \
- $(top_builddir)/src/flash/nand/libocdflashnand.la
-
-noinst_HEADERS = \
- common.h \
- mflash.h
-
-EXTRA_DIST = startup.tcl
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/common.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/common.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/common.c
deleted file mode 100755
index 878667b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/common.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "common.h"
-#include <helper/log.h>
-
-unsigned get_flash_name_index(const char *name)
-{
- const char *name_index = strrchr(name, '.');
- if (NULL == name_index)
- return 0;
- if (name_index[1] < '0' || name_index[1] > '9')
- return ~0U;
- unsigned requested;
- int retval = parse_uint(name_index + 1, &requested);
- /* detect parsing error by forcing past end of bank list */
- return (ERROR_OK == retval) ? requested : ~0U;
-}
-
-bool flash_driver_name_matches(const char *name, const char *expected)
-{
- unsigned blen = strlen(name);
- /* only match up to the length of the driver name... */
- if (strncmp(name, expected, blen) != 0)
- return false;
-
- /* ...then check that name terminates at this spot. */
- return expected[blen] == '.' || expected[blen] == '\0';
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/common.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/common.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/common.h
deleted file mode 100755
index 6e32c55..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/common.h
+++ /dev/null
@@ -1,50 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FLASH_COMMON_H
-#define FLASH_COMMON_H
-
-#include <helper/log.h>
-
-/**
- * Parses the optional '.index' portion of a flash bank identifier.
- * @param name The desired driver name, passed by the user.
- * @returns The parsed index request, or 0 if not present. If the
- * name provides a suffix but it does not parse as an unsigned integer,
- * the routine returns ~0U. This will prevent further matching.
- */
-unsigned get_flash_name_index(const char *name);
-/**
- * Attempt to match the @c expected name with the @c name of a driver.
- * @param name The name of the driver (from the bank's device structure).
- * @param expected The expected driver name, passed by the user.
- */
-bool flash_driver_name_matches(const char *name, const char *expected);
-
-#define ERROR_FLASH_BANK_INVALID (-900)
-#define ERROR_FLASH_SECTOR_INVALID (-901)
-#define ERROR_FLASH_OPERATION_FAILED (-902)
-#define ERROR_FLASH_DST_OUT_OF_BANK (-903)
-#define ERROR_FLASH_DST_BREAKS_ALIGNMENT (-904)
-#define ERROR_FLASH_BUSY (-905)
-#define ERROR_FLASH_SECTOR_NOT_ERASED (-906)
-#define ERROR_FLASH_BANK_NOT_PROBED (-907)
-#define ERROR_FLASH_OPER_UNSUPPORTED (-908)
-
-#endif /* FLASH_COMMON_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/mflash.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/mflash.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/mflash.c
deleted file mode 100755
index d3a3ace..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/mflash.c
+++ /dev/null
@@ -1,1451 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007-2008 by unsik Kim <do...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "mflash.h"
-#include <target/target.h>
-#include <helper/time_support.h>
-#include <helper/fileio.h>
-#include <helper/log.h>
-
-static int s3c2440_set_gpio_to_output(struct mflash_gpio_num gpio);
-static int s3c2440_set_gpio_output_val(struct mflash_gpio_num gpio, uint8_t val);
-static int pxa270_set_gpio_to_output(struct mflash_gpio_num gpio);
-static int pxa270_set_gpio_output_val(struct mflash_gpio_num gpio, uint8_t val);
-
-static struct mflash_bank *mflash_bank;
-
-static struct mflash_gpio_drv pxa270_gpio = {
- .name = "pxa270",
- .set_gpio_to_output = pxa270_set_gpio_to_output,
- .set_gpio_output_val = pxa270_set_gpio_output_val
-};
-
-static struct mflash_gpio_drv s3c2440_gpio = {
- .name = "s3c2440",
- .set_gpio_to_output = s3c2440_set_gpio_to_output,
- .set_gpio_output_val = s3c2440_set_gpio_output_val
-};
-
-static struct mflash_gpio_drv *mflash_gpio[] = {
- &pxa270_gpio,
- &s3c2440_gpio,
- NULL
-};
-
-#define PXA270_GAFR0_L 0x40E00054
-#define PXA270_GAFR3_U 0x40E00070
-#define PXA270_GAFR3_U_RESERVED_BITS 0xfffc0000u
-#define PXA270_GPDR0 0x40E0000C
-#define PXA270_GPDR3 0x40E0010C
-#define PXA270_GPDR3_RESERVED_BITS 0xfe000000u
-#define PXA270_GPSR0 0x40E00018
-#define PXA270_GPCR0 0x40E00024
-
-static int pxa270_set_gpio_to_output(struct mflash_gpio_num gpio)
-{
- uint32_t addr, value, mask;
- struct target *target = mflash_bank->target;
- int ret;
-
- /* remove alternate function. */
- mask = 0x3u << (gpio.num & 0xF)*2;
-
- addr = PXA270_GAFR0_L + (gpio.num >> 4) * 4;
-
- ret = target_read_u32(target, addr, &value);
- if (ret != ERROR_OK)
- return ret;
-
- value &= ~mask;
- if (addr == PXA270_GAFR3_U)
- value &= ~PXA270_GAFR3_U_RESERVED_BITS;
-
- ret = target_write_u32(target, addr, value);
- if (ret != ERROR_OK)
- return ret;
-
- /* set direction to output */
- mask = 0x1u << (gpio.num & 0x1F);
-
- addr = PXA270_GPDR0 + (gpio.num >> 5) * 4;
-
- ret = target_read_u32(target, addr, &value);
- if (ret != ERROR_OK)
- return ret;
-
- value |= mask;
- if (addr == PXA270_GPDR3)
- value &= ~PXA270_GPDR3_RESERVED_BITS;
-
- ret = target_write_u32(target, addr, value);
- return ret;
-}
-
-static int pxa270_set_gpio_output_val(struct mflash_gpio_num gpio, uint8_t val)
-{
- uint32_t addr, value, mask;
- struct target *target = mflash_bank->target;
- int ret;
-
- mask = 0x1u << (gpio.num & 0x1F);
-
- if (val)
- addr = PXA270_GPSR0 + (gpio.num >> 5) * 4;
- else
- addr = PXA270_GPCR0 + (gpio.num >> 5) * 4;
-
- ret = target_read_u32(target, addr, &value);
- if (ret != ERROR_OK)
- return ret;
-
- value |= mask;
-
- ret = target_write_u32(target, addr, value);
-
- return ret;
-}
-
-#define S3C2440_GPACON 0x56000000
-#define S3C2440_GPADAT 0x56000004
-#define S3C2440_GPJCON 0x560000d0
-#define S3C2440_GPJDAT 0x560000d4
-
-static int s3c2440_set_gpio_to_output(struct mflash_gpio_num gpio)
-{
- uint32_t data, mask, gpio_con;
- struct target *target = mflash_bank->target;
- int ret;
-
- if (gpio.port[0] >= 'a' && gpio.port[0] <= 'h')
- gpio_con = S3C2440_GPACON + (gpio.port[0] - 'a') * 0x10;
- else if (gpio.port[0] == 'j')
- gpio_con = S3C2440_GPJCON;
- else {
- LOG_ERROR("mflash: invalid port %d%s", gpio.num, gpio.port);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- ret = target_read_u32(target, gpio_con, &data);
-
- if (ret == ERROR_OK) {
- if (gpio.port[0] == 'a') {
- mask = 1 << gpio.num;
- data &= ~mask;
- } else {
- mask = 3 << gpio.num * 2;
- data &= ~mask;
- data |= (1 << gpio.num * 2);
- }
-
- ret = target_write_u32(target, gpio_con, data);
- }
- return ret;
-}
-
-static int s3c2440_set_gpio_output_val(struct mflash_gpio_num gpio, uint8_t val)
-{
- uint32_t data, mask, gpio_dat;
- struct target *target = mflash_bank->target;
- int ret;
-
- if (gpio.port[0] >= 'a' && gpio.port[0] <= 'h')
- gpio_dat = S3C2440_GPADAT + (gpio.port[0] - 'a') * 0x10;
- else if (gpio.port[0] == 'j')
- gpio_dat = S3C2440_GPJDAT;
- else {
- LOG_ERROR("mflash: invalid port %d%s", gpio.num, gpio.port);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- ret = target_read_u32(target, gpio_dat, &data);
-
- if (ret == ERROR_OK) {
- mask = 1 << gpio.num;
- if (val)
- data |= mask;
- else
- data &= ~mask;
-
- ret = target_write_u32(target, gpio_dat, data);
- }
- return ret;
-}
-
-static int mg_hdrst(uint8_t level)
-{
- return mflash_bank->gpio_drv->set_gpio_output_val(mflash_bank->rst_pin, level);
-}
-
-static int mg_init_gpio(void)
-{
- int ret;
- struct mflash_gpio_drv *gpio_drv = mflash_bank->gpio_drv;
-
- ret = gpio_drv->set_gpio_to_output(mflash_bank->rst_pin);
- if (ret != ERROR_OK)
- return ret;
-
- ret = gpio_drv->set_gpio_output_val(mflash_bank->rst_pin, 1);
-
- return ret;
-}
-
-static int mg_dsk_wait(mg_io_type_wait wait_local, uint32_t time_var)
-{
- uint8_t status, error;
- struct target *target = mflash_bank->target;
- uint32_t mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
- int ret;
- long long t = 0;
-
- struct duration bench;
- duration_start(&bench);
-
- while (time_var) {
-
- ret = target_read_u8(target, mg_task_reg + MG_REG_STATUS, &status);
- if (ret != ERROR_OK)
- return ret;
-
- if (status & mg_io_rbit_status_busy) {
- if (wait_local == mg_io_wait_bsy)
- return ERROR_OK;
- } else {
- switch (wait_local) {
- case mg_io_wait_not_bsy:
- return ERROR_OK;
- case mg_io_wait_rdy_noerr:
- if (status & mg_io_rbit_status_ready)
- return ERROR_OK;
- break;
- case mg_io_wait_drq_noerr:
- if (status & mg_io_rbit_status_data_req)
- return ERROR_OK;
- break;
- default:
- break;
- }
-
- /* Now we check the error condition! */
- if (status & mg_io_rbit_status_error) {
- ret = target_read_u8(target, mg_task_reg + MG_REG_ERROR, &error);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_ERROR("mflash: io error 0x%02x", error);
-
- return ERROR_MG_IO;
- }
-
- switch (wait_local) {
- case mg_io_wait_rdy:
- if (status & mg_io_rbit_status_ready)
- return ERROR_OK;
-
- case mg_io_wait_drq:
- if (status & mg_io_rbit_status_data_req)
- return ERROR_OK;
-
- default:
- break;
- }
- }
-
- ret = duration_measure(&bench);
- if (ERROR_OK == ret)
- t = duration_elapsed(&bench) * 1000.0;
- else
- LOG_ERROR("mflash: duration measurement failed: %d", ret);
-
- if (t > time_var)
- break;
- }
-
- LOG_ERROR("mflash: timeout occured");
- return ERROR_MG_TIMEOUT;
-}
-
-static int mg_dsk_srst(uint8_t on)
-{
- struct target *target = mflash_bank->target;
- uint32_t mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
- uint8_t value;
- int ret;
-
- ret = target_read_u8(target, mg_task_reg + MG_REG_DRV_CTRL, &value);
- if (ret != ERROR_OK)
- return ret;
-
- if (on)
- value |= (mg_io_rbit_devc_srst);
- else
- value &= ~mg_io_rbit_devc_srst;
-
- ret = target_write_u8(target, mg_task_reg + MG_REG_DRV_CTRL, value);
- return ret;
-}
-
-static int mg_dsk_io_cmd(uint32_t sect_num, uint32_t cnt, uint8_t cmd)
-{
- struct target *target = mflash_bank->target;
- uint32_t mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
- uint8_t value;
- int ret;
-
- ret = mg_dsk_wait(mg_io_wait_rdy_noerr, MG_OEM_DISK_WAIT_TIME_NORMAL);
- if (ret != ERROR_OK)
- return ret;
-
- value = mg_io_rval_dev_drv_master | mg_io_rval_dev_lba_mode | ((sect_num >> 24) & 0xf);
-
- ret = target_write_u8(target, mg_task_reg + MG_REG_DRV_HEAD, value);
- ret |= target_write_u8(target, mg_task_reg + MG_REG_SECT_CNT, (uint8_t)cnt);
- ret |= target_write_u8(target, mg_task_reg + MG_REG_SECT_NUM, (uint8_t)sect_num);
- ret |= target_write_u8(target, mg_task_reg + MG_REG_CYL_LOW, (uint8_t)(sect_num >> 8));
- ret |= target_write_u8(target, mg_task_reg + MG_REG_CYL_HIGH, (uint8_t)(sect_num >> 16));
-
- if (ret != ERROR_OK)
- return ret;
-
- return target_write_u8(target, mg_task_reg + MG_REG_COMMAND, cmd);
-}
-
-static int mg_dsk_drv_info(void)
-{
- struct target *target = mflash_bank->target;
- uint32_t mg_buff = mflash_bank->base + MG_BUFFER_OFFSET;
- int ret;
-
- ret = mg_dsk_io_cmd(0, 1, mg_io_cmd_identify);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_dsk_wait(mg_io_wait_drq, MG_OEM_DISK_WAIT_TIME_NORMAL);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_INFO("mflash: read drive info");
-
- if (!mflash_bank->drv_info)
- mflash_bank->drv_info = malloc(sizeof(struct mg_drv_info));
-
- ret = target_read_memory(target, mg_buff, 2,
- sizeof(mg_io_type_drv_info) >> 1,
- (uint8_t *)&mflash_bank->drv_info->drv_id);
- if (ret != ERROR_OK)
- return ret;
-
- mflash_bank->drv_info->tot_sects =
- (uint32_t)(mflash_bank->drv_info->drv_id.total_user_addressable_sectors_hi << 16)
- + mflash_bank->drv_info->drv_id.total_user_addressable_sectors_lo;
-
- return target_write_u8(target,
- mflash_bank->base + MG_REG_OFFSET + MG_REG_COMMAND,
- mg_io_cmd_confirm_read);
-}
-
-static int mg_mflash_rst(void)
-{
- int ret;
-
- ret = mg_init_gpio();
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_hdrst(0);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_dsk_wait(mg_io_wait_bsy, MG_OEM_DISK_WAIT_TIME_LONG);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_hdrst(1);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_dsk_wait(mg_io_wait_not_bsy, MG_OEM_DISK_WAIT_TIME_LONG);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_dsk_srst(1);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_dsk_wait(mg_io_wait_bsy, MG_OEM_DISK_WAIT_TIME_LONG);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_dsk_srst(0);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_dsk_wait(mg_io_wait_not_bsy, MG_OEM_DISK_WAIT_TIME_LONG);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_INFO("mflash: reset ok");
-
- return ERROR_OK;
-}
-
-static int mg_mflash_probe(void)
-{
- int ret = mg_mflash_rst();
- if (ret != ERROR_OK)
- return ret;
-
- return mg_dsk_drv_info();
-}
-
-COMMAND_HANDLER(mg_probe_cmd)
-{
- int ret;
-
- ret = mg_mflash_probe();
-
- if (ret == ERROR_OK) {
- command_print(CMD_CTX,
- "mflash (total %" PRIu32 " sectors) found at 0x%8.8" PRIx32 "",
- mflash_bank->drv_info->tot_sects,
- mflash_bank->base);
- }
-
- return ret;
-}
-
-static int mg_mflash_do_read_sects(void *buff, uint32_t sect_num, uint32_t sect_cnt)
-{
- uint32_t i, address;
- int ret;
- struct target *target = mflash_bank->target;
- uint8_t *buff_ptr = buff;
-
- ret = mg_dsk_io_cmd(sect_num, sect_cnt, mg_io_cmd_read);
- if (ret != ERROR_OK)
- return ret;
-
- address = mflash_bank->base + MG_BUFFER_OFFSET;
-
- struct duration bench;
- duration_start(&bench);
-
- for (i = 0; i < sect_cnt; i++) {
- ret = mg_dsk_wait(mg_io_wait_drq, MG_OEM_DISK_WAIT_TIME_NORMAL);
- if (ret != ERROR_OK)
- return ret;
-
- ret = target_read_memory(target, address, 2, MG_MFLASH_SECTOR_SIZE / 2, buff_ptr);
- if (ret != ERROR_OK)
- return ret;
-
- buff_ptr += MG_MFLASH_SECTOR_SIZE;
-
- ret = target_write_u8(target,
- mflash_bank->base + MG_REG_OFFSET + MG_REG_COMMAND,
- mg_io_cmd_confirm_read);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_DEBUG("mflash: %" PRIu32 " (0x%8.8" PRIx32 ") sector read", sect_num + i,
- (sect_num + i) * MG_MFLASH_SECTOR_SIZE);
-
- ret = duration_measure(&bench);
- if ((ERROR_OK == ret) && (duration_elapsed(&bench) > 3)) {
- LOG_INFO("mflash: read %" PRIu32 "'th sectors", sect_num + i);
- duration_start(&bench);
- }
- }
-
- return mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_NORMAL);
-}
-
-static int mg_mflash_read_sects(void *buff, uint32_t sect_num, uint32_t sect_cnt)
-{
- uint32_t quotient, residue, i;
- uint8_t *buff_ptr = buff;
- int ret = ERROR_OK;
-
- quotient = sect_cnt >> 8;
- residue = sect_cnt % 256;
-
- for (i = 0; i < quotient; i++) {
- LOG_DEBUG("mflash: sect num : %" PRIu32 " buff : %p",
- sect_num, buff_ptr);
- ret = mg_mflash_do_read_sects(buff_ptr, sect_num, 256);
- if (ret != ERROR_OK)
- return ret;
-
- sect_num += 256;
- buff_ptr += 256 * MG_MFLASH_SECTOR_SIZE;
- }
-
- if (residue) {
- LOG_DEBUG("mflash: sect num : %" PRIx32 " buff : %p",
- sect_num, buff_ptr);
- return mg_mflash_do_read_sects(buff_ptr, sect_num, residue);
- }
-
- return ret;
-}
-
-static int mg_mflash_do_write_sects(void *buff, uint32_t sect_num, uint32_t sect_cnt,
- uint8_t cmd)
-{
- uint32_t i, address;
- int ret;
- struct target *target = mflash_bank->target;
- uint8_t *buff_ptr = buff;
-
- ret = mg_dsk_io_cmd(sect_num, sect_cnt, cmd);
- if (ret != ERROR_OK)
- return ret;
-
- address = mflash_bank->base + MG_BUFFER_OFFSET;
-
- struct duration bench;
- duration_start(&bench);
-
- for (i = 0; i < sect_cnt; i++) {
- ret = mg_dsk_wait(mg_io_wait_drq, MG_OEM_DISK_WAIT_TIME_NORMAL);
- if (ret != ERROR_OK)
- return ret;
-
- ret = target_write_memory(target, address, 2, MG_MFLASH_SECTOR_SIZE / 2, buff_ptr);
- if (ret != ERROR_OK)
- return ret;
-
- buff_ptr += MG_MFLASH_SECTOR_SIZE;
-
- ret = target_write_u8(target,
- mflash_bank->base + MG_REG_OFFSET + MG_REG_COMMAND,
- mg_io_cmd_confirm_write);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_DEBUG("mflash: %" PRIu32 " (0x%8.8" PRIx32 ") sector write", sect_num + i,
- (sect_num + i) * MG_MFLASH_SECTOR_SIZE);
-
- ret = duration_measure(&bench);
- if ((ERROR_OK == ret) && (duration_elapsed(&bench) > 3)) {
- LOG_INFO("mflash: wrote %" PRIu32 "'th sectors", sect_num + i);
- duration_start(&bench);
- }
- }
-
- if (cmd == mg_io_cmd_write)
- ret = mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_NORMAL);
- else
- ret = mg_dsk_wait(mg_io_wait_rdy, MG_OEM_DISK_WAIT_TIME_LONG);
-
- return ret;
-}
-
-static int mg_mflash_write_sects(void *buff, uint32_t sect_num, uint32_t sect_cnt)
-{
- uint32_t quotient, residue, i;
- uint8_t *buff_ptr = buff;
- int ret = ERROR_OK;
-
- quotient = sect_cnt >> 8;
- residue = sect_cnt % 256;
-
- for (i = 0; i < quotient; i++) {
- LOG_DEBUG("mflash: sect num : %" PRIu32 "buff : %p", sect_num,
- buff_ptr);
- ret = mg_mflash_do_write_sects(buff_ptr, sect_num, 256, mg_io_cmd_write);
- if (ret != ERROR_OK)
- return ret;
-
- sect_num += 256;
- buff_ptr += 256 * MG_MFLASH_SECTOR_SIZE;
- }
-
- if (residue) {
- LOG_DEBUG("mflash: sect num : %" PRIu32 " buff : %p", sect_num,
- buff_ptr);
- return mg_mflash_do_write_sects(buff_ptr, sect_num, residue, mg_io_cmd_write);
- }
-
- return ret;
-}
-
-static int mg_mflash_read(uint32_t addr, uint8_t *buff, uint32_t len)
-{
- uint8_t *buff_ptr = buff;
- uint8_t sect_buff[MG_MFLASH_SECTOR_SIZE];
- uint32_t cur_addr, next_sec_addr, end_addr, cnt, sect_num;
- int ret = ERROR_OK;
-
- cnt = 0;
- cur_addr = addr;
- end_addr = addr + len;
-
- if (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK) {
-
- next_sec_addr = (cur_addr + MG_MFLASH_SECTOR_SIZE) & ~MG_MFLASH_SECTOR_SIZE_MASK;
- sect_num = cur_addr >> MG_MFLASH_SECTOR_SIZE_SHIFT;
- ret = mg_mflash_read_sects(sect_buff, sect_num, 1);
- if (ret != ERROR_OK)
- return ret;
-
- if (end_addr < next_sec_addr) {
- memcpy(buff_ptr,
- sect_buff + (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK),
- end_addr - cur_addr);
- LOG_DEBUG(
- "mflash: copies %" PRIu32 " byte from sector offset 0x%8.8" PRIx32 "",
- end_addr - cur_addr,
- cur_addr);
- cur_addr = end_addr;
- } else {
- memcpy(buff_ptr,
- sect_buff + (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK),
- next_sec_addr - cur_addr);
- LOG_DEBUG(
- "mflash: copies %" PRIu32 " byte from sector offset 0x%8.8" PRIx32 "",
- next_sec_addr - cur_addr,
- cur_addr);
- buff_ptr += (next_sec_addr - cur_addr);
- cur_addr = next_sec_addr;
- }
- }
-
- if (cur_addr < end_addr) {
-
- sect_num = cur_addr >> MG_MFLASH_SECTOR_SIZE_SHIFT;
- next_sec_addr = cur_addr + MG_MFLASH_SECTOR_SIZE;
-
- while (next_sec_addr <= end_addr) {
- cnt++;
- next_sec_addr += MG_MFLASH_SECTOR_SIZE;
- }
-
- if (cnt) {
- ret = mg_mflash_read_sects(buff_ptr, sect_num, cnt);
- if (ret != ERROR_OK)
- return ret;
- }
-
- buff_ptr += cnt * MG_MFLASH_SECTOR_SIZE;
- cur_addr += cnt * MG_MFLASH_SECTOR_SIZE;
-
- if (cur_addr < end_addr) {
-
- sect_num = cur_addr >> MG_MFLASH_SECTOR_SIZE_SHIFT;
- ret = mg_mflash_read_sects(sect_buff, sect_num, 1);
- if (ret != ERROR_OK)
- return ret;
-
- memcpy(buff_ptr, sect_buff, end_addr - cur_addr);
- LOG_DEBUG("mflash: copies %u byte", (unsigned)(end_addr - cur_addr));
- }
- }
-
- return ret;
-}
-
-static int mg_mflash_write(uint32_t addr, uint8_t *buff, uint32_t len)
-{
- uint8_t *buff_ptr = buff;
- uint8_t sect_buff[MG_MFLASH_SECTOR_SIZE];
- uint32_t cur_addr, next_sec_addr, end_addr, cnt, sect_num;
- int ret = ERROR_OK;
-
- cnt = 0;
- cur_addr = addr;
- end_addr = addr + len;
-
- if (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK) {
-
- next_sec_addr = (cur_addr + MG_MFLASH_SECTOR_SIZE) & ~MG_MFLASH_SECTOR_SIZE_MASK;
- sect_num = cur_addr >> MG_MFLASH_SECTOR_SIZE_SHIFT;
- ret = mg_mflash_read_sects(sect_buff, sect_num, 1);
- if (ret != ERROR_OK)
- return ret;
-
- if (end_addr < next_sec_addr) {
- memcpy(sect_buff + (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK),
- buff_ptr,
- end_addr - cur_addr);
- LOG_DEBUG(
- "mflash: copies %" PRIu32 " byte to sector offset 0x%8.8" PRIx32 "",
- end_addr - cur_addr,
- cur_addr);
- cur_addr = end_addr;
- } else {
- memcpy(sect_buff + (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK),
- buff_ptr,
- next_sec_addr - cur_addr);
- LOG_DEBUG(
- "mflash: copies %" PRIu32 " byte to sector offset 0x%8.8" PRIx32 "",
- next_sec_addr - cur_addr,
- cur_addr);
- buff_ptr += (next_sec_addr - cur_addr);
- cur_addr = next_sec_addr;
- }
-
- ret = mg_mflash_write_sects(sect_buff, sect_num, 1);
- if (ret != ERROR_OK)
- return ret;
- }
-
- if (cur_addr < end_addr) {
-
- sect_num = cur_addr >> MG_MFLASH_SECTOR_SIZE_SHIFT;
- next_sec_addr = cur_addr + MG_MFLASH_SECTOR_SIZE;
-
- while (next_sec_addr <= end_addr) {
- cnt++;
- next_sec_addr += MG_MFLASH_SECTOR_SIZE;
- }
-
- if (cnt) {
- ret = mg_mflash_write_sects(buff_ptr, sect_num, cnt);
- if (ret != ERROR_OK)
- return ret;
- }
-
- buff_ptr += cnt * MG_MFLASH_SECTOR_SIZE;
- cur_addr += cnt * MG_MFLASH_SECTOR_SIZE;
-
- if (cur_addr < end_addr) {
-
- sect_num = cur_addr >> MG_MFLASH_SECTOR_SIZE_SHIFT;
- ret = mg_mflash_read_sects(sect_buff, sect_num, 1);
- if (ret != ERROR_OK)
- return ret;
-
- memcpy(sect_buff, buff_ptr, end_addr - cur_addr);
- LOG_DEBUG("mflash: copies %" PRIu32 " byte", end_addr - cur_addr);
- ret = mg_mflash_write_sects(sect_buff, sect_num, 1);
- }
- }
-
- return ret;
-}
-
-COMMAND_HANDLER(mg_write_cmd)
-{
- uint32_t address, cnt, res, i;
- uint8_t *buffer;
- struct fileio *fileio;
- int ret;
-
- if (CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], address);
-
- ret = fileio_open(&fileio, CMD_ARGV[1], FILEIO_READ, FILEIO_BINARY);
- if (ret != ERROR_OK)
- return ret;
-
- size_t filesize;
- buffer = malloc(MG_FILEIO_CHUNK);
- if (!buffer) {
- fileio_close(fileio);
- return ERROR_FAIL;
- }
- int retval = fileio_size(fileio, &filesize);
- if (retval != ERROR_OK) {
- fileio_close(fileio);
- free(buffer);
- return retval;
- }
-
- cnt = filesize / MG_FILEIO_CHUNK;
- res = filesize % MG_FILEIO_CHUNK;
-
- struct duration bench;
- duration_start(&bench);
-
- size_t buf_cnt;
- for (i = 0; i < cnt; i++) {
- ret = fileio_read(fileio, MG_FILEIO_CHUNK, buffer, &buf_cnt);
- if (ret != ERROR_OK)
- goto mg_write_cmd_err;
- ret = mg_mflash_write(address, buffer, MG_FILEIO_CHUNK);
- if (ret != ERROR_OK)
- goto mg_write_cmd_err;
- address += MG_FILEIO_CHUNK;
- }
-
- if (res) {
- ret = fileio_read(fileio, res, buffer, &buf_cnt);
- if (ret != ERROR_OK)
- goto mg_write_cmd_err;
- ret = mg_mflash_write(address, buffer, res);
- if (ret != ERROR_OK)
- goto mg_write_cmd_err;
- }
-
- if (duration_measure(&bench) == ERROR_OK) {
- command_print(CMD_CTX, "wrote %zu bytes from file %s "
- "in %fs (%0.3f kB/s)", filesize, CMD_ARGV[1],
- duration_elapsed(&bench), duration_kbps(&bench, filesize));
- }
-
- free(buffer);
- fileio_close(fileio);
-
- return ERROR_OK;
-
-mg_write_cmd_err:
- free(buffer);
- fileio_close(fileio);
-
- return ret;
-}
-
-COMMAND_HANDLER(mg_dump_cmd)
-{
- uint32_t address, size, cnt, res, i;
- uint8_t *buffer;
- struct fileio *fileio;
- int ret;
-
- if (CMD_ARGC != 4)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], address);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], size);
-
- ret = fileio_open(&fileio, CMD_ARGV[1], FILEIO_WRITE, FILEIO_BINARY);
- if (ret != ERROR_OK)
- return ret;
-
- buffer = malloc(MG_FILEIO_CHUNK);
- if (!buffer) {
- fileio_close(fileio);
- return ERROR_FAIL;
- }
-
- cnt = size / MG_FILEIO_CHUNK;
- res = size % MG_FILEIO_CHUNK;
-
- struct duration bench;
- duration_start(&bench);
-
- size_t size_written;
- for (i = 0; i < cnt; i++) {
- ret = mg_mflash_read(address, buffer, MG_FILEIO_CHUNK);
- if (ret != ERROR_OK)
- goto mg_dump_cmd_err;
- ret = fileio_write(fileio, MG_FILEIO_CHUNK, buffer, &size_written);
- if (ret != ERROR_OK)
- goto mg_dump_cmd_err;
- address += MG_FILEIO_CHUNK;
- }
-
- if (res) {
- ret = mg_mflash_read(address, buffer, res);
- if (ret != ERROR_OK)
- goto mg_dump_cmd_err;
- ret = fileio_write(fileio, res, buffer, &size_written);
- if (ret != ERROR_OK)
- goto mg_dump_cmd_err;
- }
-
- if (duration_measure(&bench) == ERROR_OK) {
- command_print(CMD_CTX, "dump image (address 0x%8.8" PRIx32 " "
- "size %" PRIu32 ") to file %s in %fs (%0.3f kB/s)",
- address, size, CMD_ARGV[1],
- duration_elapsed(&bench), duration_kbps(&bench, size));
- }
-
- free(buffer);
- fileio_close(fileio);
-
- return ERROR_OK;
-
-mg_dump_cmd_err:
- free(buffer);
- fileio_close(fileio);
-
- return ret;
-}
-
-static int mg_set_feature(mg_feature_id feature, mg_feature_val config)
-{
- struct target *target = mflash_bank->target;
- uint32_t mg_task_reg = mflash_bank->base + MG_REG_OFFSET;
- int ret;
-
- ret = mg_dsk_wait(mg_io_wait_rdy_noerr, MG_OEM_DISK_WAIT_TIME_NORMAL);
- if (ret != ERROR_OK)
- return ret;
-
- ret = target_write_u8(target, mg_task_reg + MG_REG_FEATURE, feature);
- ret |= target_write_u8(target, mg_task_reg + MG_REG_SECT_CNT, config);
- ret |= target_write_u8(target, mg_task_reg + MG_REG_COMMAND,
- mg_io_cmd_set_feature);
-
- return ret;
-}
-
-static int mg_is_valid_pll(double XIN, int N, double CLK_OUT, int NO)
-{
- double v1 = XIN / N;
- double v2 = CLK_OUT * NO;
-
- if (v1 < 1000000 || v1 > 15000000 || v2 < 100000000 || v2 > 500000000)
- return ERROR_MG_INVALID_PLL;
-
- return ERROR_OK;
-}
-
-static int mg_pll_get_M(unsigned short feedback_div)
-{
- int i, M;
-
- for (i = 1, M = 0; i < 512; i <<= 1, feedback_div >>= 1)
- M += (feedback_div & 1) * i;
-
- return M + 2;
-}
-
-static int mg_pll_get_N(unsigned char input_div)
-{
- int i, N;
-
- for (i = 1, N = 0; i < 32; i <<= 1, input_div >>= 1)
- N += (input_div & 1) * i;
-
- return N + 2;
-}
-
-static int mg_pll_get_NO(unsigned char output_div)
-{
- int i, NO;
-
- for (i = 0, NO = 1; i < 2; ++i, output_div >>= 1)
- if (output_div & 1)
- NO = NO << 1;
-
- return NO;
-}
-
-static double mg_do_calc_pll(double XIN, mg_pll_t *p_pll_val, int is_approximate)
-{
- unsigned short i;
- unsigned char j, k;
- int M, N, NO;
- double CLK_OUT;
- double DIV = 1;
- double ROUND = 0;
-
- if (is_approximate) {
- DIV = 1000000;
- ROUND = 500000;
- }
-
- for (i = 0; i < MG_PLL_MAX_FEEDBACKDIV_VAL; ++i) {
- M = mg_pll_get_M(i);
-
- for (j = 0; j < MG_PLL_MAX_INPUTDIV_VAL; ++j) {
- N = mg_pll_get_N(j);
-
- for (k = 0; k < MG_PLL_MAX_OUTPUTDIV_VAL; ++k) {
- NO = mg_pll_get_NO(k);
-
- CLK_OUT = XIN * ((double)M / N) / NO;
-
- if ((int)((CLK_OUT + ROUND) / DIV)
- == (int)(MG_PLL_CLK_OUT / DIV)) {
- if (mg_is_valid_pll(XIN, N, CLK_OUT, NO) == ERROR_OK) {
- p_pll_val->lock_cyc =
- (int)(XIN * MG_PLL_STD_LOCKCYCLE /
- MG_PLL_STD_INPUTCLK);
- p_pll_val->feedback_div = i;
- p_pll_val->input_div = j;
- p_pll_val->output_div = k;
-
- return CLK_OUT;
- }
- }
- }
- }
- }
-
- return 0;
-}
-
-static double mg_calc_pll(double XIN, mg_pll_t *p_pll_val)
-{
- double CLK_OUT;
-
- CLK_OUT = mg_do_calc_pll(XIN, p_pll_val, 0);
-
- if (!CLK_OUT)
- return mg_do_calc_pll(XIN, p_pll_val, 1);
- else
- return CLK_OUT;
-}
-
-static int mg_verify_interface(void)
-{
- uint16_t buff[MG_MFLASH_SECTOR_SIZE >> 1];
- uint16_t i, j;
- uint32_t address = mflash_bank->base + MG_BUFFER_OFFSET;
- struct target *target = mflash_bank->target;
- int ret;
-
- for (j = 0; j < 10; j++) {
- for (i = 0; i < MG_MFLASH_SECTOR_SIZE >> 1; i++)
- buff[i] = i;
-
- ret = target_write_memory(target, address, 2,
- MG_MFLASH_SECTOR_SIZE / 2, (uint8_t *)buff);
- if (ret != ERROR_OK)
- return ret;
-
- memset(buff, 0xff, MG_MFLASH_SECTOR_SIZE);
-
- ret = target_read_memory(target, address, 2,
- MG_MFLASH_SECTOR_SIZE / 2, (uint8_t *)buff);
- if (ret != ERROR_OK)
- return ret;
-
- for (i = 0; i < MG_MFLASH_SECTOR_SIZE >> 1; i++) {
- if (buff[i] != i) {
- LOG_ERROR("mflash: verify interface fail");
- return ERROR_MG_INTERFACE;
- }
- }
- }
-
- LOG_INFO("mflash: verify interface ok");
- return ret;
-}
-
-static const char g_strSEG_SerialNum[20] = {
- 'G', 'm', 'n', 'i', '-', 'e', 'e', 'S', 'g', 'a', 'e', 'l',
- 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
-};
-
-static const char g_strSEG_FWRev[8] = {
- 'F', 'X', 'L', 'T', '2', 'v', '0', '.'
-};
-
-static const char g_strSEG_ModelNum[40] = {
- 'F', 'X', 'A', 'L', 'H', 'S', '2', 0x20, '0', '0', 's', '7',
- 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
- 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20,
- 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20
-};
-
-static void mg_gen_ataid(mg_io_type_drv_info *pSegIdDrvInfo)
-{
- /* b15 is ATA device(0) , b7 is Removable Media Device */
- pSegIdDrvInfo->general_configuration = 0x045A;
- /* 128MB : Cylinder=> 977 , Heads=> 8 , Sectors=> 32
- * 256MB : Cylinder=> 980 , Heads=> 16 , Sectors=> 32
- * 384MB : Cylinder=> 745 , Heads=> 16 , Sectors=> 63
- */
- pSegIdDrvInfo->number_of_cylinders = 0x02E9;
- pSegIdDrvInfo->reserved1 = 0x0;
- pSegIdDrvInfo->number_of_heads = 0x10;
- pSegIdDrvInfo->unformatted_bytes_per_track = 0x0;
- pSegIdDrvInfo->unformatted_bytes_per_sector = 0x0;
- pSegIdDrvInfo->sectors_per_track = 0x3F;
- pSegIdDrvInfo->vendor_unique1[0] = 0x000B;
- pSegIdDrvInfo->vendor_unique1[1] = 0x7570;
- pSegIdDrvInfo->vendor_unique1[2] = 0x8888;
-
- memcpy(pSegIdDrvInfo->serial_number, g_strSEG_SerialNum, 20);
- /* 0x2 : dual buffer */
- pSegIdDrvInfo->buffer_type = 0x2;
- /* buffer size : 2KB */
- pSegIdDrvInfo->buffer_sector_size = 0x800;
- pSegIdDrvInfo->number_of_ecc_bytes = 0;
-
- memcpy(pSegIdDrvInfo->firmware_revision, g_strSEG_FWRev, 8);
-
- memcpy(pSegIdDrvInfo->model_number, g_strSEG_ModelNum, 40);
-
- pSegIdDrvInfo->maximum_block_transfer = 0x4;
- pSegIdDrvInfo->vendor_unique2 = 0x0;
- pSegIdDrvInfo->dword_io = 0x00;
- /* b11 : IORDY support(PIO Mode 4), b10 : Disable/Enbale IORDY
- * b9 : LBA support, b8 : DMA mode support
- */
- pSegIdDrvInfo->capabilities = 0x1 << 9;
-
- pSegIdDrvInfo->reserved2 = 0x4000;
- pSegIdDrvInfo->vendor_unique3 = 0x00;
- /* PIOMode-2 support */
- pSegIdDrvInfo->pio_cycle_timing_mode = 0x02;
- pSegIdDrvInfo->vendor_unique4 = 0x00;
- /* MultiWord-2 support */
- pSegIdDrvInfo->dma_cycle_timing_mode = 0x00;
- /* b1 : word64~70 is valid
- * b0 : word54~58 are valid and reflect the current numofcyls,heads,sectors
- * b2 : If device supports Ultra DMA , set to one to vaildate word88
- */
- pSegIdDrvInfo->translation_fields_valid = (0x1 << 1) | (0x1 << 0);
- pSegIdDrvInfo->number_of_current_cylinders = 0x02E9;
- pSegIdDrvInfo->number_of_current_heads = 0x10;
- pSegIdDrvInfo->current_sectors_per_track = 0x3F;
- pSegIdDrvInfo->current_sector_capacity_lo = 0x7570;
- pSegIdDrvInfo->current_sector_capacity_hi = 0x000B;
-
- pSegIdDrvInfo->multi_sector_count = 0x04;
- /* b8 : Multiple secotr setting valid , b[7:0] num of secotrs per block */
- pSegIdDrvInfo->multi_sector_setting_valid = 0x01;
- pSegIdDrvInfo->total_user_addressable_sectors_lo = 0x7570;
- pSegIdDrvInfo->total_user_addressable_sectors_hi = 0x000B;
- pSegIdDrvInfo->single_dma_modes_supported = 0x00;
- pSegIdDrvInfo->single_dma_transfer_active = 0x00;
- /* b2 :Multi-word DMA mode 2, b1 : Multi-word DMA mode 1 */
- pSegIdDrvInfo->multi_dma_modes_supported = (0x1 << 0);
- /* b2 :Multi-word DMA mode 2, b1 : Multi-word DMA mode 1 */
- pSegIdDrvInfo->multi_dma_transfer_active = (0x1 << 0);
- /* b0 : PIO Mode-3 support, b1 : PIO Mode-4 support */
- pSegIdDrvInfo->adv_pio_mode = 0x00;
- /* 480(0x1E0)nsec for Multi-word DMA mode0
- * 150(0x96) nsec for Multi-word DMA mode1
- * 120(0x78) nsec for Multi-word DMA mode2
- */
- pSegIdDrvInfo->min_dma_cyc = 0x1E0;
- pSegIdDrvInfo->recommend_dma_cyc = 0x1E0;
- pSegIdDrvInfo->min_pio_cyc_no_iordy = 0x1E0;
- pSegIdDrvInfo->min_pio_cyc_with_iordy = 0x1E0;
- memset(pSegIdDrvInfo->reserved3, 0x00, 22);
- /* b7 : ATA/ATAPI-7 ,b6 : ATA/ATAPI-6 ,b5 : ATA/ATAPI-5,b4 : ATA/ATAPI-4 */
- pSegIdDrvInfo->major_ver_num = 0x7E;
- /* 0x1C : ATA/ATAPI-6 T13 1532D revision1 */
- pSegIdDrvInfo->minor_ver_num = 0x19;
- /* NOP/READ BUFFER/WRITE BUFFER/Power management feature set support */
- pSegIdDrvInfo->feature_cmd_set_suprt0 = 0x7068;
- /* Features/command set is valid/Advanced Pwr management/CFA feature set
- * not support
- */
- pSegIdDrvInfo->feature_cmd_set_suprt1 = 0x400C;
- pSegIdDrvInfo->feature_cmd_set_suprt2 = 0x4000;
- /* READ/WRITE BUFFER/PWR Management enable */
- pSegIdDrvInfo->feature_cmd_set_en0 = 0x7000;
- /* CFA feature is disabled / Advancde power management disable */
- pSegIdDrvInfo->feature_cmd_set_en1 = 0x0;
- pSegIdDrvInfo->feature_cmd_set_en2 = 0x4000;
- pSegIdDrvInfo->reserved4 = 0x0;
- /* 0x1 * 2minutes */
- pSegIdDrvInfo->req_time_for_security_er_done = 0x19;
- pSegIdDrvInfo->req_time_for_enhan_security_er_done = 0x19;
- /* Advanced power management level 1 */
- pSegIdDrvInfo->adv_pwr_mgm_lvl_val = 0x0;
- pSegIdDrvInfo->reserved5 = 0x0;
- memset(pSegIdDrvInfo->reserved6, 0x00, 68);
- /* Security mode feature is disabled */
- pSegIdDrvInfo->security_stas = 0x0;
- memset(pSegIdDrvInfo->vendor_uniq_bytes, 0x00, 62);
- /* CFA power mode 1 support in maximum 200mA */
- pSegIdDrvInfo->cfa_pwr_mode = 0x0100;
- memset(pSegIdDrvInfo->reserved7, 0x00, 190);
-}
-
-static int mg_storage_config(void)
-{
- uint8_t buff[512];
- int ret;
-
- ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd);
- if (ret != ERROR_OK)
- return ret;
-
- mg_gen_ataid((mg_io_type_drv_info *)(void *)buff);
-
- ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_stgdrvinfo);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_INFO("mflash: storage config ok");
- return ret;
-}
-
-static int mg_boot_config(void)
-{
- uint8_t buff[512];
- int ret;
-
- ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd);
- if (ret != ERROR_OK)
- return ret;
-
- memset(buff, 0xff, 512);
-
- buff[0] = mg_op_mode_snd; /* operation mode */
- buff[1] = MG_UNLOCK_OTP_AREA;
- buff[2] = 4; /* boot size */
- *((uint32_t *)(void *)(buff + 4)) = 0; /* XIP size */
-
- ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_update_xipinfo);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_INFO("mflash: boot config ok");
- return ret;
-}
-
-static int mg_set_pll(mg_pll_t *pll)
-{
- uint8_t buff[512];
- int ret;
-
- memset(buff, 0xff, 512);
- /* PLL Lock cycle and Feedback 9bit Divider */
- memcpy(buff, &pll->lock_cyc, sizeof(uint32_t));
- memcpy(buff + 4, &pll->feedback_div, sizeof(uint16_t));
- buff[6] = pll->input_div; /* PLL Input 5bit Divider */
- buff[7] = pll->output_div; /* PLL Output Divider */
-
- ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_mflash_do_write_sects(buff, 0, 1, mg_vcmd_wr_pll);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_INFO("mflash: set pll ok");
- return ret;
-}
-
-static int mg_erase_nand(void)
-{
- int ret;
-
- ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_vcmd);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_mflash_do_write_sects(NULL, 0, 0, mg_vcmd_purge_nand);
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_set_feature(mg_feature_id_transmode, mg_feature_val_trans_default);
- if (ret != ERROR_OK)
- return ret;
-
- LOG_INFO("mflash: erase nand ok");
- return ret;
-}
-
-COMMAND_HANDLER(mg_config_cmd)
-{
- double fin, fout;
- mg_pll_t pll;
- int ret;
-
- ret = mg_verify_interface();
- if (ret != ERROR_OK)
- return ret;
-
- ret = mg_mflash_rst();
- if (ret != ERROR_OK)
- return ret;
-
- switch (CMD_ARGC) {
- case 2:
- if (!strcmp(CMD_ARGV[1], "boot"))
- return mg_boot_config();
- else if (!strcmp(CMD_ARGV[1], "storage"))
- return mg_storage_config();
- else
- return ERROR_COMMAND_NOTFOUND;
- break;
- case 3:
- if (!strcmp(CMD_ARGV[1], "pll")) {
- unsigned long freq;
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], freq);
- fin = freq;
-
- if (fin > MG_PLL_CLK_OUT) {
- LOG_ERROR("mflash: input freq. is too large");
- return ERROR_MG_INVALID_OSC;
- }
-
- fout = mg_calc_pll(fin, &pll);
-
- if (!fout) {
- LOG_ERROR("mflash: cannot generate valid pll");
- return ERROR_MG_INVALID_PLL;
- }
-
- LOG_INFO("mflash: Fout=%" PRIu32 " Hz, feedback=%u,"
- "indiv=%u, outdiv=%u, lock=%u",
- (uint32_t)fout, pll.feedback_div,
- pll.input_div, pll.output_div,
- pll.lock_cyc);
-
- ret = mg_erase_nand();
- if (ret != ERROR_OK)
- return ret;
-
- return mg_set_pll(&pll);
- } else
- return ERROR_COMMAND_NOTFOUND;
- break;
- default:
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-}
-
-static const struct command_registration mflash_exec_command_handlers[] = {
- {
- .name = "probe",
- .handler = mg_probe_cmd,
- .mode = COMMAND_EXEC,
- .help = "Detect bank configuration information",
- },
- {
- .name = "write",
- .handler = mg_write_cmd,
- .mode = COMMAND_EXEC,
- /* FIXME bank_num is unused */
- .usage = "bank_num filename address",
- .help = "Write binary file at the specified address.",
- },
- {
- .name = "dump",
- .handler = mg_dump_cmd,
- .mode = COMMAND_EXEC,
- /* FIXME bank_num is unused */
- .usage = "bank_num filename address size",
- .help = "Write specified number of bytes from a binary file "
- "to the specified, address.",
- },
- {
- .name = "config",
- .handler = mg_config_cmd,
- .mode = COMMAND_EXEC,
- .help = "Configure MFLASH options.",
- .usage = "('boot'|'storage'|'pll' frequency)",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static int mflash_init_drivers(struct command_context *cmd_ctx)
-{
- if (!mflash_bank)
- return ERROR_OK;
- return register_commands(cmd_ctx, NULL, mflash_exec_command_handlers);
-}
-
-COMMAND_HANDLER(handle_mflash_init_command)
-{
- if (CMD_ARGC != 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- static bool mflash_initialized;
- if (mflash_initialized) {
- LOG_INFO("'mflash init' has already been called");
- return ERROR_OK;
- }
- mflash_initialized = true;
-
- LOG_DEBUG("Initializing mflash devices...");
- return mflash_init_drivers(CMD_CTX);
-}
-
-COMMAND_HANDLER(mg_bank_cmd)
-{
- struct target *target;
- int i;
-
- if (CMD_ARGC < 4)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- target = get_target(CMD_ARGV[3]);
- if (target == NULL) {
- LOG_ERROR("target '%s' not defined", CMD_ARGV[3]);
- return ERROR_FAIL;
- }
-
- mflash_bank = calloc(sizeof(struct mflash_bank), 1);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], mflash_bank->base);
- /** @todo Verify how this parsing should work, then document it. */
- char *str;
- mflash_bank->rst_pin.num = strtoul(CMD_ARGV[2], &str, 0);
- if (*str)
- mflash_bank->rst_pin.port[0] = (uint16_t)
- tolower((unsigned)str[0]);
-
- mflash_bank->target = target;
-
- for (i = 0; mflash_gpio[i]; i++) {
- if (!strcmp(mflash_gpio[i]->name, CMD_ARGV[0]))
- mflash_bank->gpio_drv = mflash_gpio[i];
- }
-
- if (!mflash_bank->gpio_drv) {
- LOG_ERROR("%s is unsupported soc", CMD_ARGV[0]);
- return ERROR_MG_UNSUPPORTED_SOC;
- }
-
- return ERROR_OK;
-}
-
-static const struct command_registration mflash_config_command_handlers[] = {
- {
- .name = "bank",
- .handler = mg_bank_cmd,
- .mode = COMMAND_CONFIG,
- .help = "configure a mflash device bank",
- .usage = "soc_type base_addr pin_id target",
- },
- {
- .name = "init",
- .mode = COMMAND_CONFIG,
- .handler = handle_mflash_init_command,
- .help = "initialize mflash devices",
- .usage = ""
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration mflash_command_handler[] = {
- {
- .name = "mflash",
- .mode = COMMAND_ANY,
- .help = "mflash command group",
- .usage = "",
- .chain = mflash_config_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-int mflash_register_commands(struct command_context *cmd_ctx)
-{
- return register_commands(cmd_ctx, NULL, mflash_command_handler);
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/mflash.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/mflash.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/mflash.h
deleted file mode 100755
index 6f46c7b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/mflash.h
+++ /dev/null
@@ -1,291 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007-2008 by unsik Kim <do...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef _MFLASH_H
-#define _MFLASH_H
-
-struct command_context;
-
-typedef unsigned long mg_io_uint32;
-typedef unsigned short mg_io_uint16;
-typedef unsigned char mg_io_uint8;
-
-struct mflash_gpio_num {
- char port[2];
- signed short num;
-};
-
-struct mflash_gpio_drv {
- const char *name;
- int (*set_gpio_to_output)(struct mflash_gpio_num gpio);
- int (*set_gpio_output_val)(struct mflash_gpio_num gpio, uint8_t val);
-};
-
-typedef struct _mg_io_type_drv_info {
-
- mg_io_uint16 general_configuration; /* 00 */
- mg_io_uint16 number_of_cylinders; /* 01 */
- mg_io_uint16 reserved1; /* 02 */
- mg_io_uint16 number_of_heads; /* 03 */
- mg_io_uint16 unformatted_bytes_per_track; /* 04 */
- mg_io_uint16 unformatted_bytes_per_sector; /* 05 */
- mg_io_uint16 sectors_per_track; /* 06 */
- mg_io_uint16 vendor_unique1[3]; /* 07/08/09 */
-
- mg_io_uint8 serial_number[20]; /* 10~19 */
-
- mg_io_uint16 buffer_type; /* 20 */
- mg_io_uint16 buffer_sector_size; /* 21 */
- mg_io_uint16 number_of_ecc_bytes; /* 22 */
-
- mg_io_uint8 firmware_revision[8]; /* 23~26 */
- mg_io_uint8 model_number[40]; /* 27 */
-
- mg_io_uint8 maximum_block_transfer; /* 47 low byte */
- mg_io_uint8 vendor_unique2; /* 47 high byte */
- mg_io_uint16 dword_io; /* 48 */
-
- mg_io_uint16 capabilities; /* 49 */
- mg_io_uint16 reserved2; /* 50 */
-
- mg_io_uint8 vendor_unique3; /* 51 low byte */
- mg_io_uint8 pio_cycle_timing_mode; /* 51 high byte */
- mg_io_uint8 vendor_unique4; /* 52 low byte */
- mg_io_uint8 dma_cycle_timing_mode; /* 52 high byte */
- mg_io_uint16 translation_fields_valid; /* 53 (low bit) */
- mg_io_uint16 number_of_current_cylinders; /* 54 */
- mg_io_uint16 number_of_current_heads; /* 55 */
- mg_io_uint16 current_sectors_per_track; /* 56 */
- mg_io_uint16 current_sector_capacity_lo; /* 57 & 58 */
- mg_io_uint16 current_sector_capacity_hi; /* 57 & 58 */
- mg_io_uint8 multi_sector_count; /* 59 low */
- mg_io_uint8 multi_sector_setting_valid; /* 59 high (low bit) */
-
- mg_io_uint16 total_user_addressable_sectors_lo; /* 60 & 61 */
- mg_io_uint16 total_user_addressable_sectors_hi; /* 60 & 61 */
-
- mg_io_uint8 single_dma_modes_supported; /* 62 low byte */
- mg_io_uint8 single_dma_transfer_active; /* 62 high byte */
- mg_io_uint8 multi_dma_modes_supported; /* 63 low byte */
- mg_io_uint8 multi_dma_transfer_active; /* 63 high byte */
- mg_io_uint16 adv_pio_mode;
- mg_io_uint16 min_dma_cyc;
- mg_io_uint16 recommend_dma_cyc;
- mg_io_uint16 min_pio_cyc_no_iordy;
- mg_io_uint16 min_pio_cyc_with_iordy;
- mg_io_uint8 reserved3[22];
- mg_io_uint16 major_ver_num;
- mg_io_uint16 minor_ver_num;
- mg_io_uint16 feature_cmd_set_suprt0;
- mg_io_uint16 feature_cmd_set_suprt1;
- mg_io_uint16 feature_cmd_set_suprt2;
- mg_io_uint16 feature_cmd_set_en0;
- mg_io_uint16 feature_cmd_set_en1;
- mg_io_uint16 feature_cmd_set_en2;
- mg_io_uint16 reserved4;
- mg_io_uint16 req_time_for_security_er_done;
- mg_io_uint16 req_time_for_enhan_security_er_done;
- mg_io_uint16 adv_pwr_mgm_lvl_val;
- mg_io_uint16 reserved5;
- mg_io_uint16 re_of_hw_rst;
- mg_io_uint8 reserved6[68];
- mg_io_uint16 security_stas;
- mg_io_uint8 vendor_uniq_bytes[62];
- mg_io_uint16 cfa_pwr_mode;
- mg_io_uint8 reserved7[186];
-
- mg_io_uint16 scts_per_secure_data_unit;
- mg_io_uint16 integrity_word;
-
-} mg_io_type_drv_info;
-
-typedef struct _mg_pll_t {
- unsigned int lock_cyc;
- unsigned short feedback_div; /* 9bit divider */
- unsigned char input_div; /* 5bit divider */
- unsigned char output_div; /* 2bit divider */
-} mg_pll_t;
-
-struct mg_drv_info {
- mg_io_type_drv_info drv_id;
- uint32_t tot_sects;
-};
-
-struct mflash_bank {
- uint32_t base;
-
- struct mflash_gpio_num rst_pin;
-
- struct mflash_gpio_drv *gpio_drv;
- struct target *target;
- struct mg_drv_info *drv_info;
-};
-
-int mflash_register_commands(struct command_context *cmd_ctx);
-
-#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */
-#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1)
-#define MG_MFLASH_SECTOR_SIZE_SHIFT (9)
-
-#define MG_BUFFER_OFFSET 0x8000
-#define MG_REG_OFFSET 0xC000
-#define MG_REG_FEATURE 0x2 /* write case */
-#define MG_REG_ERROR 0x2 /* read case */
-#define MG_REG_SECT_CNT 0x4
-#define MG_REG_SECT_NUM 0x6
-#define MG_REG_CYL_LOW 0x8
-#define MG_REG_CYL_HIGH 0xA
-#define MG_REG_DRV_HEAD 0xC
-#define MG_REG_COMMAND 0xE /* write case */
-#define MG_REG_STATUS 0xE /* read case */
-#define MG_REG_DRV_CTRL 0x10
-#define MG_REG_BURST_CTRL 0x12
-
-#define MG_OEM_DISK_WAIT_TIME_LONG 15000 /* msec */
-#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */
-#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */
-
-#define MG_PLL_CLK_OUT 66000000.0 /* 66Mhz */
-#define MG_PLL_MAX_FEEDBACKDIV_VAL 512
-#define MG_PLL_MAX_INPUTDIV_VAL 32
-#define MG_PLL_MAX_OUTPUTDIV_VAL 4
-
-#define MG_PLL_STD_INPUTCLK 12000000.0 /* 12Mhz */
-#define MG_PLL_STD_LOCKCYCLE 10000
-
-#define MG_UNLOCK_OTP_AREA 0xFF
-
-#define MG_FILEIO_CHUNK 1048576
-
-#define ERROR_MG_IO (-1600)
-#define ERROR_MG_TIMEOUT (-1601)
-#define ERROR_MG_INVALID_PLL (-1603)
-#define ERROR_MG_INTERFACE (-1604)
-#define ERROR_MG_INVALID_OSC (-1605)
-#define ERROR_MG_UNSUPPORTED_SOC (-1606)
-
-typedef enum _mg_io_type_wait {
-
- mg_io_wait_bsy = 1,
- mg_io_wait_not_bsy = 2,
- mg_io_wait_rdy = 3,
- mg_io_wait_drq = 4, /* wait for data request */
- mg_io_wait_drq_noerr = 5, /* wait for DRQ but ignore the error status bit */
- mg_io_wait_rdy_noerr = 6 /* wait for ready, but ignore error status bit */
-
-} mg_io_type_wait;
-
-/*= "Status Register" bit masks. */
-typedef enum _mg_io_type_rbit_status {
-
- mg_io_rbit_status_error = 0x01, /* error bit in status register */
- mg_io_rbit_status_corrected_error = 0x04, /* corrected error in status register */
- mg_io_rbit_status_data_req = 0x08, /* data request bit in status register */
- mg_io_rbit_status_seek_done = 0x10, /* DSC - Drive Seek Complete */
- mg_io_rbit_status_write_fault = 0x20, /* DWF - Drive Write Fault */
- mg_io_rbit_status_ready = 0x40,
- mg_io_rbit_status_busy = 0x80
-
-} mg_io_type_rbit_status;
-
-/*= "Error Register" bit masks. */
-typedef enum _mg_io_type_rbit_error {
-
- mg_io_rbit_err_general = 0x01,
- mg_io_rbit_err_aborted = 0x04,
- mg_io_rbit_err_bad_sect_num = 0x10,
- mg_io_rbit_err_uncorrectable = 0x40,
- mg_io_rbit_err_bad_block = 0x80
-
-} mg_io_type_rbit_error;
-
-/* = "Device Control Register" bit. */
-typedef enum _mg_io_type_rbit_devc {
-
- mg_io_rbit_devc_intr = 0x02, /* interrupt enable bit (1:disable, 0:enable) */
- mg_io_rbit_devc_srst = 0x04 /* softwrae reset bit (1:assert, 0:de-assert) */
-
-} mg_io_type_rbit_devc;
-
-/* "Drive Select/Head Register" values. */
-typedef enum _mg_io_type_rval_dev {
-
- mg_io_rval_dev_must_be_on = 0x80, /* These 1 bits are always on */
- mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on), /* Master */
- mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */
- mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */
- mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */
- mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on)
-
-} mg_io_type_rval_dev;
-
-typedef enum _mg_io_type_cmd {
- mg_io_cmd_read = 0x20,
- mg_io_cmd_write = 0x30,
-
- mg_io_cmd_setmul = 0xC6,
- mg_io_cmd_readmul = 0xC4,
- mg_io_cmd_writemul = 0xC5,
-
- mg_io_cmd_idle = 0x97, /* 0xE3 */
- mg_io_cmd_idle_immediate = 0x95, /* 0xE1 */
-
- mg_io_cmd_setsleep = 0x99, /* 0xE6 */
- mg_io_cmd_stdby = 0x96, /* 0xE2 */
- mg_io_cmd_stdby_immediate = 0x94, /* 0xE0 */
-
- mg_io_cmd_identify = 0xEC,
- mg_io_cmd_set_feature = 0xEF,
-
- mg_io_cmd_confirm_write = 0x3C,
- mg_io_cmd_confirm_read = 0x40,
- mg_io_cmd_wakeup = 0xC3
-
-} mg_io_type_cmd;
-
-typedef enum _mg_feature_id {
- mg_feature_id_transmode = 0x3
-} mg_feature_id;
-
-typedef enum _mg_feature_val {
- mg_feature_val_trans_default = 0x0,
- mg_feature_val_trans_vcmd = 0x3,
- mg_feature_val_trand_vcmds = 0x2
-} mg_feature_val;
-
-typedef enum _mg_vcmd {
- mg_vcmd_update_xipinfo = 0xFA, /* FWPATCH commmand through IOM I/O */
- mg_vcmd_verify_fwpatch = 0xFB, /* FWPATCH commmand through IOM I/O */
- mg_vcmd_update_stgdrvinfo = 0xFC, /* IOM identificatin info program command */
- mg_vcmd_prep_fwpatch = 0xFD, /* FWPATCH commmand through IOM I/O */
- mg_vcmd_exe_fwpatch = 0xFE, /* FWPATCH commmand through IOM I/O */
- mg_vcmd_wr_pll = 0x8B,
- mg_vcmd_purge_nand = 0x8C, /* Only for Seagle */
- mg_vcmd_lock_otp = 0x8D,
- mg_vcmd_rd_otp = 0x8E,
- mg_vcmd_wr_otp = 0x8F
-} mg_vcmd;
-
-typedef enum _mg_opmode {
- mg_op_mode_xip = 1, /* TRUE XIP */
- mg_op_mode_snd = 2, /* BOOT + Storage */
- mg_op_mode_stg = 0 /* Only Storage */
-} mg_opmode;
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/Makefile.am
deleted file mode 100755
index 2ddd096..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/Makefile.am
+++ /dev/null
@@ -1,46 +0,0 @@
-include $(top_srcdir)/common.mk
-
-noinst_LTLIBRARIES = libocdflashnand.la
-
-libocdflashnand_la_SOURCES = \
- ecc.c \
- ecc_kw.c \
- core.c \
- fileio.c \
- tcl.c \
- arm_io.c \
- $(NAND_DRIVERS) \
- driver.c
-
-NAND_DRIVERS = \
- nonce.c \
- davinci.c \
- lpc3180.c \
- lpc32xx.c \
- mxc.c \
- mx3.c \
- orion.c \
- s3c24xx.c \
- s3c2410.c \
- s3c2412.c \
- s3c2440.c \
- s3c2443.c \
- s3c6400.c \
- at91sam9.c \
- nuc910.c
-
-noinst_HEADERS = \
- arm_io.h \
- core.h \
- driver.h \
- fileio.h \
- imp.h \
- lpc3180.h \
- lpc32xx.h \
- mxc.h \
- mx3.h \
- s3c24xx.h \
- s3c24xx_regs.h \
- nuc910.h
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/arm_io.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/arm_io.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/arm_io.c
deleted file mode 100755
index d54958a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/arm_io.c
+++ /dev/null
@@ -1,301 +0,0 @@
-/*
- * Copyright (C) 2009 by Marvell Semiconductors, Inc.
- * Written by Nicolas Pitre <nico at marvell.com>
- *
- * Copyright (C) 2009 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "core.h"
-#include "arm_io.h"
-#include <helper/binarybuffer.h>
-#include <target/arm.h>
-#include <target/armv7m.h>
-#include <target/algorithm.h>
-
-/**
- * Copies code to a working area. This will allocate room for the code plus the
- * additional amount requested if the working area pointer is null.
- *
- * @param target Pointer to the target to copy code to
- * @param code Pointer to the code area to be copied
- * @param code_size Size of the code being copied
- * @param additional Size of the additional area to be allocated in addition to
- * code
- * @param area Pointer to a pointer to a working area to copy code to
- * @return Success or failure of the operation
- */
-static int arm_code_to_working_area(struct target *target,
- const uint32_t *code, unsigned code_size,
- unsigned additional, struct working_area **area)
-{
- uint8_t code_buf[code_size];
- int retval;
- unsigned size = code_size + additional;
-
- /* REVISIT this assumes size doesn't ever change.
- * That's usually correct; but there are boards with
- * both large and small page chips, where it won't be...
- */
-
- /* make sure we have a working area */
- if (NULL == *area) {
- retval = target_alloc_working_area(target, size, area);
- if (retval != ERROR_OK) {
- LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size);
- return ERROR_NAND_NO_BUFFER;
- }
- }
-
- /* buffer code in target endianness */
- target_buffer_set_u32_array(target, code_buf, code_size / 4, code);
-
- /* copy code to work area */
- retval = target_write_memory(target, (*area)->address,
- 4, code_size / 4, code_buf);
-
- return retval;
-}
-
-/**
- * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
- * For now this supports ARMv4,ARMv5 and ARMv7-M cores.
- *
- * Enhancements to target_run_algorithm() could enable:
- * - ARMv6 and ARMv7 cores in ARM mode
- *
- * Different code fragments could handle:
- * - 16-bit wide data (needs different setup)
- *
- * @param nand Pointer to the arm_nand_data struct that defines the I/O
- * @param data Pointer to the data to be copied to flash
- * @param size Size of the data being copied
- * @return Success or failure of the operation
- */
-int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
-{
- struct target *target = nand->target;
- struct arm_algorithm armv4_5_algo;
- struct armv7m_algorithm armv7m_algo;
- void *arm_algo;
- struct arm *arm = target->arch_info;
- struct reg_param reg_params[3];
- uint32_t target_buf;
- uint32_t exit_var = 0;
- int retval;
-
- /* Inputs:
- * r0 NAND data address (byte wide)
- * r1 buffer address
- * r2 buffer length
- */
- static const uint32_t code_armv4_5[] = {
- 0xe4d13001, /* s: ldrb r3, [r1], #1 */
- 0xe5c03000, /* strb r3, [r0] */
- 0xe2522001, /* subs r2, r2, #1 */
- 0x1afffffb, /* bne s */
-
- /* exit: ARMv4 needs hardware breakpoint */
- 0xe1200070, /* e: bkpt #0 */
- };
-
- /* Inputs:
- * r0 NAND data address (byte wide)
- * r1 buffer address
- * r2 buffer length
- *
- * see contrib/loaders/flash/armv7m_io.s for src
- */
- static const uint32_t code_armv7m[] = {
- 0x3b01f811,
- 0x3a017003,
- 0xaffaf47f,
- 0xbf00be00,
- };
-
- int target_code_size = 0;
- const uint32_t *target_code_src = NULL;
-
- /* set up algorithm */
- if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
- arm_algo = &armv7m_algo;
- target_code_size = sizeof(code_armv7m);
- target_code_src = code_armv7m;
- } else {
- armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
- armv4_5_algo.core_mode = ARM_MODE_SVC;
- armv4_5_algo.core_state = ARM_STATE_ARM;
- arm_algo = &armv4_5_algo;
- target_code_size = sizeof(code_armv4_5);
- target_code_src = code_armv4_5;
- }
-
- if (nand->op != ARM_NAND_WRITE || !nand->copy_area) {
- retval = arm_code_to_working_area(target, target_code_src, target_code_size,
- nand->chunk_size, &nand->copy_area);
- if (retval != ERROR_OK)
- return retval;
- }
-
- nand->op = ARM_NAND_WRITE;
-
- /* copy data to work area */
- target_buf = nand->copy_area->address + target_code_size;
- retval = target_write_buffer(target, target_buf, size, data);
- if (retval != ERROR_OK)
- return retval;
-
- /* set up parameters */
- init_reg_param(®_params[0], "r0", 32, PARAM_IN);
- init_reg_param(®_params[1], "r1", 32, PARAM_IN);
- init_reg_param(®_params[2], "r2", 32, PARAM_IN);
-
- buf_set_u32(reg_params[0].value, 0, 32, nand->data);
- buf_set_u32(reg_params[1].value, 0, 32, target_buf);
- buf_set_u32(reg_params[2].value, 0, 32, size);
-
- /* armv4 must exit using a hardware breakpoint */
- if (arm->is_armv4)
- exit_var = nand->copy_area->address + target_code_size - 4;
-
- /* use alg to write data from work area to NAND chip */
- retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- nand->copy_area->address, exit_var, 1000, arm_algo);
- if (retval != ERROR_OK)
- LOG_ERROR("error executing hosted NAND write");
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
- return retval;
-}
-
-/**
- * Uses an on-chip algorithm for an ARM device to read from a NAND device and
- * store the data into the host machine's memory.
- *
- * @param nand Pointer to the arm_nand_data struct that defines the I/O
- * @param data Pointer to the data buffer to store the read data
- * @param size Amount of data to be stored to the buffer.
- * @return Success or failure of the operation
- */
-int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
-{
- struct target *target = nand->target;
- struct arm_algorithm armv4_5_algo;
- struct armv7m_algorithm armv7m_algo;
- void *arm_algo;
- struct arm *arm = target->arch_info;
- struct reg_param reg_params[3];
- uint32_t target_buf;
- uint32_t exit_var = 0;
- int retval;
-
- /* Inputs:
- * r0 buffer address
- * r1 NAND data address (byte wide)
- * r2 buffer length
- */
- static const uint32_t code_armv4_5[] = {
- 0xe5d13000, /* s: ldrb r3, [r1] */
- 0xe4c03001, /* strb r3, [r0], #1 */
- 0xe2522001, /* subs r2, r2, #1 */
- 0x1afffffb, /* bne s */
-
- /* exit: ARMv4 needs hardware breakpoint */
- 0xe1200070, /* e: bkpt #0 */
- };
-
- /* Inputs:
- * r0 buffer address
- * r1 NAND data address (byte wide)
- * r2 buffer length
- *
- * see contrib/loaders/flash/armv7m_io.s for src
- */
- static const uint32_t code_armv7m[] = {
- 0xf800780b,
- 0x3a013b01,
- 0xaffaf47f,
- 0xbf00be00,
- };
-
- int target_code_size = 0;
- const uint32_t *target_code_src = NULL;
-
- /* set up algorithm */
- if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
- arm_algo = &armv7m_algo;
- target_code_size = sizeof(code_armv7m);
- target_code_src = code_armv7m;
- } else {
- armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
- armv4_5_algo.core_mode = ARM_MODE_SVC;
- armv4_5_algo.core_state = ARM_STATE_ARM;
- arm_algo = &armv4_5_algo;
- target_code_size = sizeof(code_armv4_5);
- target_code_src = code_armv4_5;
- }
-
- /* create the copy area if not yet available */
- if (nand->op != ARM_NAND_READ || !nand->copy_area) {
- retval = arm_code_to_working_area(target, target_code_src, target_code_size,
- nand->chunk_size, &nand->copy_area);
- if (retval != ERROR_OK)
- return retval;
- }
-
- nand->op = ARM_NAND_READ;
- target_buf = nand->copy_area->address + target_code_size;
-
- /* set up parameters */
- init_reg_param(®_params[0], "r0", 32, PARAM_IN);
- init_reg_param(®_params[1], "r1", 32, PARAM_IN);
- init_reg_param(®_params[2], "r2", 32, PARAM_IN);
-
- buf_set_u32(reg_params[0].value, 0, 32, target_buf);
- buf_set_u32(reg_params[1].value, 0, 32, nand->data);
- buf_set_u32(reg_params[2].value, 0, 32, size);
-
- /* armv4 must exit using a hardware breakpoint */
- if (arm->is_armv4)
- exit_var = nand->copy_area->address + target_code_size - 4;
-
- /* use alg to write data from NAND chip to work area */
- retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- nand->copy_area->address, exit_var, 1000, arm_algo);
- if (retval != ERROR_OK)
- LOG_ERROR("error executing hosted NAND read");
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
- /* read from work area to the host's memory */
- retval = target_read_buffer(target, target_buf, size, data);
-
- return retval;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/arm_io.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/arm_io.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/arm_io.h
deleted file mode 100755
index 0ee79a7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/arm_io.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright (C) 2009 by David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-#ifndef __ARM_NANDIO_H
-#define __ARM_NANDIO_H
-
-/**
- * Available operational states the arm_nand_data struct can be in.
- */
-enum arm_nand_op {
- ARM_NAND_NONE, /**< No operation performed. */
- ARM_NAND_READ, /**< Read operation performed. */
- ARM_NAND_WRITE, /**< Write operation performed. */
-};
-
-/**
- * The arm_nand_data struct is used for defining NAND I/O operations on an ARM
- * core.
- */
-struct arm_nand_data {
- /** Target is proxy for some ARM core. */
- struct target *target;
-
- /** The copy area holds code loop and data for I/O operations. */
- struct working_area *copy_area;
-
- /** The chunk size is the page size or ECC chunk. */
- unsigned chunk_size;
-
- /** Where data is read from or written to. */
- uint32_t data;
-
- /** Last operation executed using this struct. */
- enum arm_nand_op op;
-
- /* currently implicit: data width == 8 bits (not 16) */
-};
-
-int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size);
-int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size);
-
-#endif /* __ARM_NANDIO_H */
[07/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_transport.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_transport.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_transport.c
deleted file mode 100755
index 4c2f343..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_transport.c
+++ /dev/null
@@ -1,387 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-/* project specific includes */
-#include <jtag/interface.h>
-#include <jtag/tcl.h>
-#include <transport/transport.h>
-#include <target/target.h>
-#include <jtag/aice/aice_interface.h>
-#include <jtag/aice/aice_transport.h>
-
-/* */
-static int jim_newtap_expected_id(Jim_Nvp *n, Jim_GetOptInfo *goi,
- struct jtag_tap *pTap)
-{
- jim_wide w;
- int e = Jim_GetOpt_Wide(goi, &w);
- if (e != JIM_OK) {
- Jim_SetResultFormatted(goi->interp, "option: %s bad parameter",
- n->name);
- return e;
- }
-
- unsigned expected_len = sizeof(uint32_t) * pTap->expected_ids_cnt;
- uint32_t *new_expected_ids = malloc(expected_len + sizeof(uint32_t));
- if (new_expected_ids == NULL) {
- Jim_SetResultFormatted(goi->interp, "no memory");
- return JIM_ERR;
- }
-
- memcpy(new_expected_ids, pTap->expected_ids, expected_len);
-
- new_expected_ids[pTap->expected_ids_cnt] = w;
-
- free(pTap->expected_ids);
- pTap->expected_ids = new_expected_ids;
- pTap->expected_ids_cnt++;
-
- return JIM_OK;
-}
-
-#define NTAP_OPT_EXPECTED_ID 0
-
-/* */
-static int jim_aice_newtap_cmd(Jim_GetOptInfo *goi)
-{
- struct jtag_tap *pTap;
- int x;
- int e;
- Jim_Nvp *n;
- char *cp;
- const Jim_Nvp opts[] = {
- {.name = "-expected-id", .value = NTAP_OPT_EXPECTED_ID},
- {.name = NULL, .value = -1},
- };
-
- pTap = calloc(1, sizeof(struct jtag_tap));
- if (!pTap) {
- Jim_SetResultFormatted(goi->interp, "no memory");
- return JIM_ERR;
- }
-
- /*
- * we expect CHIP + TAP + OPTIONS
- * */
- if (goi->argc < 3) {
- Jim_SetResultFormatted(goi->interp,
- "Missing CHIP TAP OPTIONS ....");
- free(pTap);
- return JIM_ERR;
- }
-
- const char *tmp;
- Jim_GetOpt_String(goi, &tmp, NULL);
- pTap->chip = strdup(tmp);
-
- Jim_GetOpt_String(goi, &tmp, NULL);
- pTap->tapname = strdup(tmp);
-
- /* name + dot + name + null */
- x = strlen(pTap->chip) + 1 + strlen(pTap->tapname) + 1;
- cp = malloc(x);
- sprintf(cp, "%s.%s", pTap->chip, pTap->tapname);
- pTap->dotted_name = cp;
-
- LOG_DEBUG("Creating New Tap, Chip: %s, Tap: %s, Dotted: %s, %d params",
- pTap->chip, pTap->tapname, pTap->dotted_name, goi->argc);
-
- while (goi->argc) {
- e = Jim_GetOpt_Nvp(goi, opts, &n);
- if (e != JIM_OK) {
- Jim_GetOpt_NvpUnknown(goi, opts, 0);
- free(cp);
- free(pTap);
- return e;
- }
- LOG_DEBUG("Processing option: %s", n->name);
- switch (n->value) {
- case NTAP_OPT_EXPECTED_ID:
- e = jim_newtap_expected_id(n, goi, pTap);
- if (JIM_OK != e) {
- free(cp);
- free(pTap);
- return e;
- }
- break;
- } /* switch (n->value) */
- } /* while (goi->argc) */
-
- /* default is enabled-after-reset */
- pTap->enabled = !pTap->disabled_after_reset;
-
- jtag_tap_init(pTap);
- return JIM_OK;
-}
-
-/* */
-static int jim_aice_newtap(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
-{
- Jim_GetOptInfo goi;
- Jim_GetOpt_Setup(&goi, interp, argc - 1, argv + 1);
- return jim_aice_newtap_cmd(&goi);
-}
-
-/* */
-COMMAND_HANDLER(handle_aice_init_command)
-{
- if (CMD_ARGC != 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- static bool jtag_initialized;
- if (jtag_initialized) {
- LOG_INFO("'jtag init' has already been called");
- return ERROR_OK;
- }
- jtag_initialized = true;
-
- LOG_DEBUG("Initializing jtag devices...");
- return jtag_init(CMD_CTX);
-}
-
-static int jim_aice_arp_init(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
-{
- LOG_DEBUG("No implement: jim_aice_arp_init");
-
- return JIM_OK;
-}
-
-/* */
-static int aice_init_reset(struct command_context *cmd_ctx)
-{
- LOG_DEBUG("Initializing with hard TRST+SRST reset");
-
- int retval;
- enum reset_types jtag_reset_config = jtag_get_reset_config();
-
- jtag_add_reset(1, 0); /* TAP_RESET */
- if (jtag_reset_config & RESET_HAS_SRST) {
- jtag_add_reset(1, 1);
- if ((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0)
- jtag_add_reset(0, 1);
- }
- jtag_add_reset(0, 0);
- retval = jtag_execute_queue();
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-/* */
-static int jim_aice_arp_init_reset(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
-{
- int e = ERROR_OK;
- Jim_GetOptInfo goi;
- Jim_GetOpt_Setup(&goi, interp, argc - 1, argv + 1);
- if (goi.argc != 0) {
- Jim_WrongNumArgs(goi.interp, 1, goi.argv - 1, "(no params)");
- return JIM_ERR;
- }
- struct command_context *context = current_command_context(interp);
- e = aice_init_reset(context);
-
- if (e != ERROR_OK) {
- Jim_Obj *eObj = Jim_NewIntObj(goi.interp, e);
- Jim_SetResultFormatted(goi.interp, "error: %#s", eObj);
- Jim_FreeNewObj(goi.interp, eObj);
- return JIM_ERR;
- }
- return JIM_OK;
-}
-
-static int jim_aice_names(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
-{
- Jim_GetOptInfo goi;
- Jim_GetOpt_Setup(&goi, interp, argc - 1, argv + 1);
- if (goi.argc != 0) {
- Jim_WrongNumArgs(goi.interp, 1, goi.argv, "Too many parameters");
- return JIM_ERR;
- }
- Jim_SetResult(goi.interp, Jim_NewListObj(goi.interp, NULL, 0));
- struct jtag_tap *tap;
-
- for (tap = jtag_all_taps(); tap; tap = tap->next_tap)
- Jim_ListAppendElement(goi.interp,
- Jim_GetResult(goi.interp),
- Jim_NewStringObj(goi.interp,
- tap->dotted_name, -1));
-
- return JIM_OK;
-}
-
-/* */
-static const struct command_registration
-aice_transport_jtag_subcommand_handlers[] = {
- {
- .name = "init",
- .mode = COMMAND_ANY,
- .handler = handle_aice_init_command,
- .help = "initialize jtag scan chain",
- .usage = ""
- },
- {
- .name = "arp_init",
- .mode = COMMAND_ANY,
- .jim_handler = jim_aice_arp_init,
- .help = "Validates JTAG scan chain against the list of "
- "declared TAPs.",
- },
- {
- .name = "arp_init-reset",
- .mode = COMMAND_ANY,
- .jim_handler = jim_aice_arp_init_reset,
- .help = "Uses TRST and SRST to try resetting everything on "
- "the JTAG scan chain, then performs 'jtag arp_init'."
- },
- {
- .name = "newtap",
- .mode = COMMAND_CONFIG,
- .jim_handler = jim_aice_newtap,
- .help = "Create a new TAP instance named basename.tap_type, "
- "and appends it to the scan chain.",
- .usage = "basename tap_type ['-expected_id' number]"
- },
- {
- .name = "tapisenabled",
- .mode = COMMAND_EXEC,
- .jim_handler = jim_jtag_tap_enabler,
- .help = "Returns a Tcl boolean (0/1) indicating whether "
- "the TAP is enabled (1) or not (0).",
- .usage = "tap_name",
- },
- {
- .name = "tapenable",
- .mode = COMMAND_EXEC,
- .jim_handler = jim_jtag_tap_enabler,
- .help = "Try to enable the specified TAP using the "
- "'tap-enable' TAP event.",
- .usage = "tap_name",
- },
- {
- .name = "tapdisable",
- .mode = COMMAND_EXEC,
- .jim_handler = jim_jtag_tap_enabler,
- .help = "Try to disable the specified TAP using the "
- "'tap-disable' TAP event.",
- .usage = "tap_name",
- },
- {
- .name = "configure",
- .mode = COMMAND_EXEC,
- .jim_handler = jim_jtag_configure,
- .help = "Provide a Tcl handler for the specified "
- "TAP event.",
- .usage = "tap_name '-event' event_name handler",
- },
- {
- .name = "cget",
- .mode = COMMAND_EXEC,
- .jim_handler = jim_jtag_configure,
- .help = "Return any Tcl handler for the specified "
- "TAP event.",
- .usage = "tap_name '-event' event_name",
- },
- {
- .name = "names",
- .mode = COMMAND_ANY,
- .jim_handler = jim_aice_names,
- .help = "Returns list of all JTAG tap names.",
- },
-
- COMMAND_REGISTRATION_DONE
-};
-
-/* */
-static const struct command_registration aice_transport_command_handlers[] = {
- {
- .name = "jtag",
- .mode = COMMAND_ANY,
- .usage = "",
- .chain = aice_transport_jtag_subcommand_handlers,
- },
- COMMAND_REGISTRATION_DONE
-
-};
-
-/* */
-static int aice_transport_register_commands(struct command_context *cmd_ctx)
-{
- return register_commands(cmd_ctx, NULL,
- aice_transport_command_handlers);
-}
-
-/* */
-static int aice_transport_init(struct command_context *cmd_ctx)
-{
- LOG_DEBUG("aice_transport_init");
- struct target *t = get_current_target(cmd_ctx);
- struct transport *transport;
-
- if (!t) {
- LOG_ERROR("no current target");
- return ERROR_FAIL;
- }
-
- transport = get_current_transport();
-
- if (!transport) {
- LOG_ERROR("no transport selected");
- return ERROR_FAIL;
- }
-
- LOG_DEBUG("current transport %s", transport->name);
-
- return aice_init_targets();
-}
-
-/* */
-static int aice_transport_select(struct command_context *ctx)
-{
- LOG_DEBUG("aice_transport_select");
-
- int retval;
-
- retval = aice_transport_register_commands(ctx);
-
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static struct transport aice_jtag_transport = {
- .name = "aice_jtag",
- .select = aice_transport_select,
- .init = aice_transport_init,
-};
-
-const char *aice_transports[] = { "aice_jtag", NULL };
-
-static void aice_constructor(void) __attribute__((constructor));
-static void aice_constructor(void)
-{
- transport_register(&aice_jtag_transport);
-}
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_transport.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_transport.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_transport.h
deleted file mode 100755
index e93d131..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_transport.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef _AICE_TRANSPORT_
-#define _AICE_TRANSPORT_
-
-extern const char *aice_transports[];
-
-#endif
[42/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/openocd.texi
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/openocd.texi b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/openocd.texi
deleted file mode 100755
index 3e249c0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/openocd.texi
+++ /dev/null
@@ -1,9748 +0,0 @@
-\input texinfo @c -*-texinfo-*-
-@c %**start of header
-@setfilename openocd.info
-@settitle OpenOCD User's Guide
-@dircategory Development
-@direntry
-* OpenOCD: (openocd). OpenOCD User's Guide
-@end direntry
-@paragraphindent 0
-@c %**end of header
-
-@include version.texi
-
-@copying
-
-This User's Guide documents
-release @value{VERSION},
-dated @value{UPDATED},
-of the Open On-Chip Debugger (OpenOCD).
-
-@itemize @bullet
-@item Copyright @copyright{} 2008 The OpenOCD Project
-@item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
-@item Copyright @copyright{} 2008-2010 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
-@item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
-@item Copyright @copyright{} 2009-2010 David Brownell
-@end itemize
-
-@quotation
-Permission is granted to copy, distribute and/or modify this document
-under the terms of the GNU Free Documentation License, Version 1.2 or
-any later version published by the Free Software Foundation; with no
-Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
-Texts. A copy of the license is included in the section entitled ``GNU
-Free Documentation License''.
-@end quotation
-@end copying
-
-@titlepage
-@titlefont{@emph{Open On-Chip Debugger:}}
-@sp 1
-@title OpenOCD User's Guide
-@subtitle for release @value{VERSION}
-@subtitle @value{UPDATED}
-
-@page
-@vskip 0pt plus 1filll
-@insertcopying
-@end titlepage
-
-@summarycontents
-@contents
-
-@ifnottex
-@node Top
-@top OpenOCD User's Guide
-
-@insertcopying
-@end ifnottex
-
-@menu
-* About:: About OpenOCD
-* Developers:: OpenOCD Developer Resources
-* Debug Adapter Hardware:: Debug Adapter Hardware
-* About Jim-Tcl:: About Jim-Tcl
-* Running:: Running OpenOCD
-* OpenOCD Project Setup:: OpenOCD Project Setup
-* Config File Guidelines:: Config File Guidelines
-* Daemon Configuration:: Daemon Configuration
-* Debug Adapter Configuration:: Debug Adapter Configuration
-* Reset Configuration:: Reset Configuration
-* TAP Declaration:: TAP Declaration
-* CPU Configuration:: CPU Configuration
-* Flash Commands:: Flash Commands
-* Flash Programming:: Flash Programming
-* PLD/FPGA Commands:: PLD/FPGA Commands
-* General Commands:: General Commands
-* Architecture and Core Commands:: Architecture and Core Commands
-* JTAG Commands:: JTAG Commands
-* Boundary Scan Commands:: Boundary Scan Commands
-* Utility Commands:: Utility Commands
-* TFTP:: TFTP
-* GDB and OpenOCD:: Using GDB and OpenOCD
-* Tcl Scripting API:: Tcl Scripting API
-* FAQ:: Frequently Asked Questions
-* Tcl Crash Course:: Tcl Crash Course
-* License:: GNU Free Documentation License
-
-@comment DO NOT use the plain word ``Index'', reason: CYGWIN filename
-@comment case issue with ``Index.html'' and ``index.html''
-@comment Occurs when creating ``--html --no-split'' output
-@comment This fix is based on: http://sourceware.org/ml/binutils/2006-05/msg00215.html
-* OpenOCD Concept Index:: Concept Index
-* Command and Driver Index:: Command and Driver Index
-@end menu
-
-@node About
-@unnumbered About
-@cindex about
-
-OpenOCD was created by Dominic Rath as part of a 2005 diploma thesis written
-at the University of Applied Sciences Augsburg (@uref{http://www.hs-augsburg.de}).
-Since that time, the project has grown into an active open-source project,
-supported by a diverse community of software and hardware developers from
-around the world.
-
-@section What is OpenOCD?
-@cindex TAP
-@cindex JTAG
-
-The Open On-Chip Debugger (OpenOCD) aims to provide debugging,
-in-system programming and boundary-scan testing for embedded target
-devices.
-
-It does so with the assistance of a @dfn{debug adapter}, which is
-a small hardware module which helps provide the right kind of
-electrical signaling to the target being debugged. These are
-required since the debug host (on which OpenOCD runs) won't
-usually have native support for such signaling, or the connector
-needed to hook up to the target.
-
-Such debug adapters support one or more @dfn{transport} protocols,
-each of which involves different electrical signaling (and uses
-different messaging protocols on top of that signaling). There
-are many types of debug adapter, and little uniformity in what
-they are called. (There are also product naming differences.)
-
-These adapters are sometimes packaged as discrete dongles, which
-may generically be called @dfn{hardware interface dongles}.
-Some development boards also integrate them directly, which may
-let the development board connect directly to the debug
-host over USB (and sometimes also to power it over USB).
-
-For example, a @dfn{JTAG Adapter} supports JTAG
-signaling, and is used to communicate
-with JTAG (IEEE 1149.1) compliant TAPs on your target board.
-A @dfn{TAP} is a ``Test Access Port'', a module which processes
-special instructions and data. TAPs are daisy-chained within and
-between chips and boards. JTAG supports debugging and boundary
-scan operations.
-
-There are also @dfn{SWD Adapters} that support Serial Wire Debug (SWD)
-signaling to communicate with some newer ARM cores, as well as debug
-adapters which support both JTAG and SWD transports. SWD supports only
-debugging, whereas JTAG also supports boundary scan operations.
-
-For some chips, there are also @dfn{Programming Adapters} supporting
-special transports used only to write code to flash memory, without
-support for on-chip debugging or boundary scan.
-(At this writing, OpenOCD does not support such non-debug adapters.)
-
-
-@b{Dongles:} OpenOCD currently supports many types of hardware dongles:
-USB-based, parallel port-based, and other standalone boxes that run
-OpenOCD internally. @xref{Debug Adapter Hardware}.
-
-@b{GDB Debug:} It allows ARM7 (ARM7TDMI and ARM720t), ARM9 (ARM920T,
-ARM922T, ARM926EJ--S, ARM966E--S), XScale (PXA25x, IXP42x), Cortex-M3
-(Stellaris LM3, ST STM32 and Energy Micro EFM32) and Intel Quark (x10xx)
-based cores to be debugged via the GDB protocol.
-
-@b{Flash Programming:} Flash writing is supported for external
-CFI-compatible NOR flashes (Intel and AMD/Spansion command set) and several
-internal flashes (LPC1700, LPC1800, LPC2000, LPC4300, AT91SAM7, AT91SAM3U,
-STR7x, STR9x, LM3, STM32x and EFM32). Preliminary support for various NAND flash
-controllers (LPC3180, Orion, S3C24xx, more) is included.
-
-@section OpenOCD Web Site
-
-The OpenOCD web site provides the latest public news from the community:
-
-@uref{http://openocd.org/}
-
-@section Latest User's Guide:
-
-The user's guide you are now reading may not be the latest one
-available. A version for more recent code may be available.
-Its HTML form is published regularly at:
-
-@uref{http://openocd.org/doc/html/index.html}
-
-PDF form is likewise published at:
-
-@uref{http://openocd.org/doc/pdf/openocd.pdf}
-
-@section OpenOCD User's Forum
-
-There is an OpenOCD forum (phpBB) hosted by SparkFun,
-which might be helpful to you. Note that if you want
-anything to come to the attention of developers, you
-should post it to the OpenOCD Developer Mailing List
-instead of this forum.
-
-@uref{http://forum.sparkfun.com/viewforum.php?f=18}
-
-@section OpenOCD User's Mailing List
-
-The OpenOCD User Mailing List provides the primary means of
-communication between users:
-
-@uref{https://lists.sourceforge.net/mailman/listinfo/openocd-user}
-
-@section OpenOCD IRC
-
-Support can also be found on irc:
-@uref{irc://irc.freenode.net/openocd}
-
-@node Developers
-@chapter OpenOCD Developer Resources
-@cindex developers
-
-If you are interested in improving the state of OpenOCD's debugging and
-testing support, new contributions will be welcome. Motivated developers
-can produce new target, flash or interface drivers, improve the
-documentation, as well as more conventional bug fixes and enhancements.
-
-The resources in this chapter are available for developers wishing to explore
-or expand the OpenOCD source code.
-
-@section OpenOCD Git Repository
-
-During the 0.3.x release cycle, OpenOCD switched from Subversion to
-a Git repository hosted at SourceForge. The repository URL is:
-
-@uref{git://git.code.sf.net/p/openocd/code}
-
-or via http
-
-@uref{http://git.code.sf.net/p/openocd/code}
-
-You may prefer to use a mirror and the HTTP protocol:
-
-@uref{http://repo.or.cz/r/openocd.git}
-
-With standard Git tools, use @command{git clone} to initialize
-a local repository, and @command{git pull} to update it.
-There are also gitweb pages letting you browse the repository
-with a web browser, or download arbitrary snapshots without
-needing a Git client:
-
-@uref{http://repo.or.cz/w/openocd.git}
-
-The @file{README} file contains the instructions for building the project
-from the repository or a snapshot.
-
-Developers that want to contribute patches to the OpenOCD system are
-@b{strongly} encouraged to work against mainline.
-Patches created against older versions may require additional
-work from their submitter in order to be updated for newer releases.
-
-@section Doxygen Developer Manual
-
-During the 0.2.x release cycle, the OpenOCD project began
-providing a Doxygen reference manual. This document contains more
-technical information about the software internals, development
-processes, and similar documentation:
-
-@uref{http://openocd.org/doc/doxygen/html/index.html}
-
-This document is a work-in-progress, but contributions would be welcome
-to fill in the gaps. All of the source files are provided in-tree,
-listed in the Doxyfile configuration at the top of the source tree.
-
-@section Gerrit Review System
-
-All changes in the OpenOCD Git repository go through the web-based Gerrit
-Code Review System:
-
-@uref{http://openocd.zylin.com/}
-
-After a one-time registration and repository setup, anyone can push commits
-from their local Git repository directly into Gerrit.
-All users and developers are encouraged to review, test, discuss and vote
-for changes in Gerrit. The feedback provides the basis for a maintainer to
-eventually submit the change to the main Git repository.
-
-The @file{HACKING} file, also available as the Patch Guide in the Doxygen
-Developer Manual, contains basic information about how to connect a
-repository to Gerrit, prepare and push patches. Patch authors are expected to
-maintain their changes while they're in Gerrit, respond to feedback and if
-necessary rework and push improved versions of the change.
-
-@section OpenOCD Developer Mailing List
-
-The OpenOCD Developer Mailing List provides the primary means of
-communication between developers:
-
-@uref{https://lists.sourceforge.net/mailman/listinfo/openocd-devel}
-
-@section OpenOCD Bug Tracker
-
-The OpenOCD Bug Tracker is hosted on SourceForge:
-
-@uref{http://bugs.openocd.org/}
-
-
-@node Debug Adapter Hardware
-@chapter Debug Adapter Hardware
-@cindex dongles
-@cindex FTDI
-@cindex wiggler
-@cindex zy1000
-@cindex printer port
-@cindex USB Adapter
-@cindex RTCK
-
-Defined: @b{dongle}: A small device that plugs into a computer and serves as
-an adapter .... [snip]
-
-In the OpenOCD case, this generally refers to @b{a small adapter} that
-attaches to your computer via USB or the parallel port. One
-exception is the Ultimate Solutions ZY1000, packaged as a small box you
-attach via an ethernet cable. The ZY1000 has the advantage that it does not
-require any drivers to be installed on the developer PC. It also has
-a built in web interface. It supports RTCK/RCLK or adaptive clocking
-and has a built-in relay to power cycle targets remotely.
-
-
-@section Choosing a Dongle
-
-There are several things you should keep in mind when choosing a dongle.
-
-@enumerate
-@item @b{Transport} Does it support the kind of communication that you need?
-OpenOCD focusses mostly on JTAG. Your version may also support
-other ways to communicate with target devices.
-@item @b{Voltage} What voltage is your target - 1.8, 2.8, 3.3, or 5V?
-Does your dongle support it? You might need a level converter.
-@item @b{Pinout} What pinout does your target board use?
-Does your dongle support it? You may be able to use jumper
-wires, or an "octopus" connector, to convert pinouts.
-@item @b{Connection} Does your computer have the USB, parallel, or
-Ethernet port needed?
-@item @b{RTCK} Do you expect to use it with ARM chips and boards with
-RTCK support (also known as ``adaptive clocking'')?
-@end enumerate
-
-@section Stand-alone JTAG Probe
-
-The ZY1000 from Ultimate Solutions is technically not a dongle but a
-stand-alone JTAG probe that, unlike most dongles, doesn't require any drivers
-running on the developer's host computer.
-Once installed on a network using DHCP or a static IP assignment, users can
-access the ZY1000 probe locally or remotely from any host with access to the
-IP address assigned to the probe.
-The ZY1000 provides an intuitive web interface with direct access to the
-OpenOCD debugger.
-Users may also run a GDBSERVER directly on the ZY1000 to take full advantage
-of GCC & GDB to debug any distribution of embedded Linux or NetBSD running on
-the target.
-The ZY1000 supports RTCK & RCLK or adaptive clocking and has a built-in relay
-to power cycle the target remotely.
-
-For more information, visit:
-
-@b{ZY1000} See: @url{http://www.ultsol.com/index.php/component/content/article/8/210-zylin-zy1000-main}
-
-@section USB FT2232 Based
-
-There are many USB JTAG dongles on the market, many of them based
-on a chip from ``Future Technology Devices International'' (FTDI)
-known as the FTDI FT2232; this is a USB full speed (12 Mbps) chip.
-See: @url{http://www.ftdichip.com} for more information.
-In summer 2009, USB high speed (480 Mbps) versions of these FTDI
-chips started to become available in JTAG adapters. Around 2012, a new
-variant appeared - FT232H - this is a single-channel version of FT2232H.
-(Adapters using those high speed FT2232H or FT232H chips may support adaptive
-clocking.)
-
-The FT2232 chips are flexible enough to support some other
-transport options, such as SWD or the SPI variants used to
-program some chips. They have two communications channels,
-and one can be used for a UART adapter at the same time the
-other one is used to provide a debug adapter.
-
-Also, some development boards integrate an FT2232 chip to serve as
-a built-in low-cost debug adapter and USB-to-serial solution.
-
-@itemize @bullet
-@item @b{usbjtag}
-@* Link @url{http://elk.informatik.fh-augsburg.de/hhweb/doc/openocd/usbjtag/usbjtag.html}
-@item @b{jtagkey}
-@* See: @url{http://www.amontec.com/jtagkey.shtml}
-@item @b{jtagkey2}
-@* See: @url{http://www.amontec.com/jtagkey2.shtml}
-@item @b{oocdlink}
-@* See: @url{http://www.oocdlink.com} By Joern Kaipf
-@item @b{signalyzer}
-@* See: @url{http://www.signalyzer.com}
-@item @b{Stellaris Eval Boards}
-@* See: @url{http://www.ti.com} - The Stellaris eval boards
-bundle FT2232-based JTAG and SWD support, which can be used to debug
-the Stellaris chips. Using separate JTAG adapters is optional.
-These boards can also be used in a "pass through" mode as JTAG adapters
-to other target boards, disabling the Stellaris chip.
-@item @b{TI/Luminary ICDI}
-@* See: @url{http://www.ti.com} - TI/Luminary In-Circuit Debug
-Interface (ICDI) Boards are included in Stellaris LM3S9B9x
-Evaluation Kits. Like the non-detachable FT2232 support on the other
-Stellaris eval boards, they can be used to debug other target boards.
-@item @b{olimex-jtag}
-@* See: @url{http://www.olimex.com}
-@item @b{Flyswatter/Flyswatter2}
-@* See: @url{http://www.tincantools.com}
-@item @b{turtelizer2}
-@* See:
-@uref{http://www.ethernut.de/en/hardware/turtelizer/index.html, Turtelizer 2}, or
-@url{http://www.ethernut.de}
-@item @b{comstick}
-@* Link: @url{http://www.hitex.com/index.php?id=383}
-@item @b{stm32stick}
-@* Link @url{http://www.hitex.com/stm32-stick}
-@item @b{axm0432_jtag}
-@* Axiom AXM-0432 Link @url{http://www.axman.com} - NOTE: This JTAG does not appear
-to be available anymore as of April 2012.
-@item @b{cortino}
-@* Link @url{http://www.hitex.com/index.php?id=cortino}
-@item @b{dlp-usb1232h}
-@* Link @url{http://www.dlpdesign.com/usb/usb1232h.shtml}
-@item @b{digilent-hs1}
-@* Link @url{http://www.digilentinc.com/Products/Detail.cfm?Prod=JTAG-HS1}
-@item @b{opendous}
-@* Link @url{http://code.google.com/p/opendous/wiki/JTAG} FT2232H-based
-(OpenHardware).
-@item @b{JTAG-lock-pick Tiny 2}
-@* Link @url{http://www.distortec.com/jtag-lock-pick-tiny-2} FT232H-based
-
-@item @b{GW16042}
-@* Link: @url{http://shop.gateworks.com/index.php?route=product/product&path=70_80&product_id=64}
-FT2232H-based
-
-@end itemize
-@section USB-JTAG / Altera USB-Blaster compatibles
-
-These devices also show up as FTDI devices, but are not
-protocol-compatible with the FT2232 devices. They are, however,
-protocol-compatible among themselves. USB-JTAG devices typically consist
-of a FT245 followed by a CPLD that understands a particular protocol,
-or emulates this protocol using some other hardware.
-
-They may appear under different USB VID/PID depending on the particular
-product. The driver can be configured to search for any VID/PID pair
-(see the section on driver commands).
-
-@itemize
-@item @b{USB-JTAG} Kolja Waschk's USB Blaster-compatible adapter
-@* Link: @url{http://ixo-jtag.sourceforge.net/}
-@item @b{Altera USB-Blaster}
-@* Link: @url{http://www.altera.com/literature/ug/ug_usb_blstr.pdf}
-@end itemize
-
-@section USB J-Link based
-There are several OEM versions of the SEGGER @b{J-Link} adapter. It is
-an example of a microcontroller based JTAG adapter, it uses an
-AT91SAM764 internally.
-
-@itemize @bullet
-@item @b{SEGGER J-Link}
-@* Link: @url{http://www.segger.com/jlink.html}
-@item @b{Atmel SAM-ICE} (Only works with Atmel chips!)
-@* Link: @url{http://www.atmel.com/tools/atmelsam-ice.aspx}
-@item @b{IAR J-Link}
-@end itemize
-
-@section USB RLINK based
-Raisonance has an adapter called @b{RLink}. It exists in a stripped-down form on the STM32 Primer,
-permanently attached to the JTAG lines. It also exists on the STM32 Primer2, but that is wired for
-SWD and not JTAG, thus not supported.
-
-@itemize @bullet
-@item @b{Raisonance RLink}
-@* Link: @url{http://www.mcu-raisonance.com/~rlink-debugger-programmer__@/microcontrollers__tool~tool__T018:4cn9ziz4bnx6.html}
-@item @b{STM32 Primer}
-@* Link: @url{http://www.stm32circle.com/resources/stm32primer.php}
-@item @b{STM32 Primer2}
-@* Link: @url{http://www.stm32circle.com/resources/stm32primer2.php}
-@end itemize
-
-@section USB ST-LINK based
-ST Micro has an adapter called @b{ST-LINK}.
-They only work with ST Micro chips, notably STM32 and STM8.
-
-@itemize @bullet
-@item @b{ST-LINK}
-@* This is available standalone and as part of some kits, eg. STM32VLDISCOVERY.
-@* Link: @url{http://www.st.com/internet/evalboard/product/219866.jsp}
-@item @b{ST-LINK/V2}
-@* This is available standalone and as part of some kits, eg. STM32F4DISCOVERY.
-@* Link: @url{http://www.st.com/internet/evalboard/product/251168.jsp}
-@end itemize
-
-For info the original ST-LINK enumerates using the mass storage usb class; however,
-its implementation is completely broken. The result is this causes issues under Linux.
-The simplest solution is to get Linux to ignore the ST-LINK using one of the following methods:
-@itemize @bullet
-@item modprobe -r usb-storage && modprobe usb-storage quirks=483:3744:i
-@item add "options usb-storage quirks=483:3744:i" to /etc/modprobe.conf
-@end itemize
-
-@section USB TI/Stellaris ICDI based
-Texas Instruments has an adapter called @b{ICDI}.
-It is not to be confused with the FTDI based adapters that were originally fitted to their
-evaluation boards. This is the adapter fitted to the Stellaris LaunchPad.
-
-@section USB CMSIS-DAP based
-ARM has released a interface standard called CMSIS-DAP that simplifies connecting
-debuggers to ARM Cortex based targets @url{http://www.keil.com/support/man/docs/dapdebug/dapdebug_introduction.htm}.
-
-@section USB Other
-@itemize @bullet
-@item @b{USBprog}
-@* Link: @url{http://shop.embedded-projects.net/} - which uses an Atmel MEGA32 and a UBN9604
-
-@item @b{USB - Presto}
-@* Link: @url{http://tools.asix.net/prg_presto.htm}
-
-@item @b{Versaloon-Link}
-@* Link: @url{http://www.versaloon.com}
-
-@item @b{ARM-JTAG-EW}
-@* Link: @url{http://www.olimex.com/dev/arm-jtag-ew.html}
-
-@item @b{Buspirate}
-@* Link: @url{http://dangerousprototypes.com/bus-pirate-manual/}
-
-@item @b{opendous}
-@* Link: @url{http://code.google.com/p/opendous-jtag/} - which uses an AT90USB162
-
-@item @b{estick}
-@* Link: @url{http://code.google.com/p/estick-jtag/}
-
-@item @b{Keil ULINK v1}
-@* Link: @url{http://www.keil.com/ulink1/}
-@end itemize
-
-@section IBM PC Parallel Printer Port Based
-
-The two well-known ``JTAG Parallel Ports'' cables are the Xilinx DLC5
-and the Macraigor Wiggler. There are many clones and variations of
-these on the market.
-
-Note that parallel ports are becoming much less common, so if you
-have the choice you should probably avoid these adapters in favor
-of USB-based ones.
-
-@itemize @bullet
-
-@item @b{Wiggler} - There are many clones of this.
-@* Link: @url{http://www.macraigor.com/wiggler.htm}
-
-@item @b{DLC5} - From XILINX - There are many clones of this
-@* Link: Search the web for: ``XILINX DLC5'' - it is no longer
-produced, PDF schematics are easily found and it is easy to make.
-
-@item @b{Amontec - JTAG Accelerator}
-@* Link: @url{http://www.amontec.com/jtag_accelerator.shtml}
-
-@item @b{Wiggler2}
-@* Link: @url{http://www.ccac.rwth-aachen.de/~michaels/index.php/hardware/armjtag}
-
-@item @b{Wiggler_ntrst_inverted}
-@* Yet another variation - See the source code, src/jtag/parport.c
-
-@item @b{old_amt_wiggler}
-@* Unknown - probably not on the market today
-
-@item @b{arm-jtag}
-@* Link: Most likely @url{http://www.olimex.com/dev/arm-jtag.html} [another wiggler clone]
-
-@item @b{chameleon}
-@* Link: @url{http://www.amontec.com/chameleon.shtml}
-
-@item @b{Triton}
-@* Unknown.
-
-@item @b{Lattice}
-@* ispDownload from Lattice Semiconductor
-@url{http://www.latticesemi.com/lit/docs/@/devtools/dlcable.pdf}
-
-@item @b{flashlink}
-@* From ST Microsystems;
-@* Link: @url{http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATA_BRIEF/DM00039500.pdf}
-
-@end itemize
-
-@section Other...
-@itemize @bullet
-
-@item @b{ep93xx}
-@* An EP93xx based Linux machine using the GPIO pins directly.
-
-@item @b{at91rm9200}
-@* Like the EP93xx - but an ATMEL AT91RM9200 based solution using the GPIO pins on the chip.
-
-@item @b{bcm2835gpio}
-@* A BCM2835-based board (e.g. Raspberry Pi) using the GPIO pins of the expansion header.
-
-@item @b{jtag_vpi}
-@* A JTAG driver acting as a client for the JTAG VPI server interface.
-@* Link: @url{http://github.com/fjullien/jtag_vpi}
-
-@end itemize
-
-@node About Jim-Tcl
-@chapter About Jim-Tcl
-@cindex Jim-Tcl
-@cindex tcl
-
-OpenOCD uses a small ``Tcl Interpreter'' known as Jim-Tcl.
-This programming language provides a simple and extensible
-command interpreter.
-
-All commands presented in this Guide are extensions to Jim-Tcl.
-You can use them as simple commands, without needing to learn
-much of anything about Tcl.
-Alternatively, you can write Tcl programs with them.
-
-You can learn more about Jim at its website, @url{http://jim.tcl.tk}.
-There is an active and responsive community, get on the mailing list
-if you have any questions. Jim-Tcl maintainers also lurk on the
-OpenOCD mailing list.
-
-@itemize @bullet
-@item @b{Jim vs. Tcl}
-@* Jim-Tcl is a stripped down version of the well known Tcl language,
-which can be found here: @url{http://www.tcl.tk}. Jim-Tcl has far
-fewer features. Jim-Tcl is several dozens of .C files and .H files and
-implements the basic Tcl command set. In contrast: Tcl 8.6 is a
-4.2 MB .zip file containing 1540 files.
-
-@item @b{Missing Features}
-@* Our practice has been: Add/clone the real Tcl feature if/when
-needed. We welcome Jim-Tcl improvements, not bloat. Also there
-are a large number of optional Jim-Tcl features that are not
-enabled in OpenOCD.
-
-@item @b{Scripts}
-@* OpenOCD configuration scripts are Jim-Tcl Scripts. OpenOCD's
-command interpreter today is a mixture of (newer)
-Jim-Tcl commands, and the (older) original command interpreter.
-
-@item @b{Commands}
-@* At the OpenOCD telnet command line (or via the GDB monitor command) one
-can type a Tcl for() loop, set variables, etc.
-Some of the commands documented in this guide are implemented
-as Tcl scripts, from a @file{startup.tcl} file internal to the server.
-
-@item @b{Historical Note}
-@* Jim-Tcl was introduced to OpenOCD in spring 2008. Fall 2010,
-before OpenOCD 0.5 release, OpenOCD switched to using Jim-Tcl
-as a Git submodule, which greatly simplified upgrading Jim-Tcl
-to benefit from new features and bugfixes in Jim-Tcl.
-
-@item @b{Need a crash course in Tcl?}
-@*@xref{Tcl Crash Course}.
-@end itemize
-
-@node Running
-@chapter Running
-@cindex command line options
-@cindex logfile
-@cindex directory search
-
-Properly installing OpenOCD sets up your operating system to grant it access
-to the debug adapters. On Linux, this usually involves installing a file
-in @file{/etc/udev/rules.d,} so OpenOCD has permissions. An example rules file
-that works for many common adapters is shipped with OpenOCD in the
-@file{contrib} directory. MS-Windows needs
-complex and confusing driver configuration for every peripheral. Such issues
-are unique to each operating system, and are not detailed in this User's Guide.
-
-Then later you will invoke the OpenOCD server, with various options to
-tell it how each debug session should work.
-The @option{--help} option shows:
-@verbatim
-bash$ openocd --help
-
---help | -h display this help
---version | -v display OpenOCD version
---file | -f use configuration file <name>
---search | -s dir to search for config files and scripts
---debug | -d set debug level <0-3>
---log_output | -l redirect log output to file <name>
---command | -c run <command>
-@end verbatim
-
-If you don't give any @option{-f} or @option{-c} options,
-OpenOCD tries to read the configuration file @file{openocd.cfg}.
-To specify one or more different
-configuration files, use @option{-f} options. For example:
-
-@example
-openocd -f config1.cfg -f config2.cfg -f config3.cfg
-@end example
-
-Configuration files and scripts are searched for in
-@enumerate
-@item the current directory,
-@item any search dir specified on the command line using the @option{-s} option,
-@item any search dir specified using the @command{add_script_search_dir} command,
-@item @file{$HOME/.openocd} (not on Windows),
-@item a directory in the @env{OPENOCD_SCRIPTS} environment variable (if set),
-@item the site wide script library @file{$pkgdatadir/site} and
-@item the OpenOCD-supplied script library @file{$pkgdatadir/scripts}.
-@end enumerate
-The first found file with a matching file name will be used.
-
-@quotation Note
-Don't try to use configuration script names or paths which
-include the "#" character. That character begins Tcl comments.
-@end quotation
-
-@section Simple setup, no customization
-
-In the best case, you can use two scripts from one of the script
-libraries, hook up your JTAG adapter, and start the server ... and
-your JTAG setup will just work "out of the box". Always try to
-start by reusing those scripts, but assume you'll need more
-customization even if this works. @xref{OpenOCD Project Setup}.
-
-If you find a script for your JTAG adapter, and for your board or
-target, you may be able to hook up your JTAG adapter then start
-the server with some variation of one of the following:
-
-@example
-openocd -f interface/ADAPTER.cfg -f board/MYBOARD.cfg
-openocd -f interface/ftdi/ADAPTER.cfg -f board/MYBOARD.cfg
-@end example
-
-You might also need to configure which reset signals are present,
-using @option{-c 'reset_config trst_and_srst'} or something similar.
-If all goes well you'll see output something like
-
-@example
-Open On-Chip Debugger 0.4.0 (2010-01-14-15:06)
-For bug reports, read
- http://openocd.org/doc/doxygen/bugs.html
-Info : JTAG tap: lm3s.cpu tap/device found: 0x3ba00477
- (mfg: 0x23b, part: 0xba00, ver: 0x3)
-@end example
-
-Seeing that "tap/device found" message, and no warnings, means
-the JTAG communication is working. That's a key milestone, but
-you'll probably need more project-specific setup.
-
-@section What OpenOCD does as it starts
-
-OpenOCD starts by processing the configuration commands provided
-on the command line or, if there were no @option{-c command} or
-@option{-f file.cfg} options given, in @file{openocd.cfg}.
-@xref{configurationstage,,Configuration Stage}.
-At the end of the configuration stage it verifies the JTAG scan
-chain defined using those commands; your configuration should
-ensure that this always succeeds.
-Normally, OpenOCD then starts running as a daemon.
-Alternatively, commands may be used to terminate the configuration
-stage early, perform work (such as updating some flash memory),
-and then shut down without acting as a daemon.
-
-Once OpenOCD starts running as a daemon, it waits for connections from
-clients (Telnet, GDB, Other) and processes the commands issued through
-those channels.
-
-If you are having problems, you can enable internal debug messages via
-the @option{-d} option.
-
-Also it is possible to interleave Jim-Tcl commands w/config scripts using the
-@option{-c} command line switch.
-
-To enable debug output (when reporting problems or working on OpenOCD
-itself), use the @option{-d} command line switch. This sets the
-@option{debug_level} to "3", outputting the most information,
-including debug messages. The default setting is "2", outputting only
-informational messages, warnings and errors. You can also change this
-setting from within a telnet or gdb session using @command{debug_level<n>}
-(@pxref{debuglevel,,debug_level}).
-
-You can redirect all output from the daemon to a file using the
-@option{-l <logfile>} switch.
-
-Note! OpenOCD will launch the GDB & telnet server even if it can not
-establish a connection with the target. In general, it is possible for
-the JTAG controller to be unresponsive until the target is set up
-correctly via e.g. GDB monitor commands in a GDB init script.
-
-@node OpenOCD Project Setup
-@chapter OpenOCD Project Setup
-
-To use OpenOCD with your development projects, you need to do more than
-just connect the JTAG adapter hardware (dongle) to your development board
-and start the OpenOCD server.
-You also need to configure your OpenOCD server so that it knows
-about your adapter and board, and helps your work.
-You may also want to connect OpenOCD to GDB, possibly
-using Eclipse or some other GUI.
-
-@section Hooking up the JTAG Adapter
-
-Today's most common case is a dongle with a JTAG cable on one side
-(such as a ribbon cable with a 10-pin or 20-pin IDC connector)
-and a USB cable on the other.
-Instead of USB, some cables use Ethernet;
-older ones may use a PC parallel port, or even a serial port.
-
-@enumerate
-@item @emph{Start with power to your target board turned off},
-and nothing connected to your JTAG adapter.
-If you're particularly paranoid, unplug power to the board.
-It's important to have the ground signal properly set up,
-unless you are using a JTAG adapter which provides
-galvanic isolation between the target board and the
-debugging host.
-
-@item @emph{Be sure it's the right kind of JTAG connector.}
-If your dongle has a 20-pin ARM connector, you need some kind
-of adapter (or octopus, see below) to hook it up to
-boards using 14-pin or 10-pin connectors ... or to 20-pin
-connectors which don't use ARM's pinout.
-
-In the same vein, make sure the voltage levels are compatible.
-Not all JTAG adapters have the level shifters needed to work
-with 1.2 Volt boards.
-
-@item @emph{Be certain the cable is properly oriented} or you might
-damage your board. In most cases there are only two possible
-ways to connect the cable.
-Connect the JTAG cable from your adapter to the board.
-Be sure it's firmly connected.
-
-In the best case, the connector is keyed to physically
-prevent you from inserting it wrong.
-This is most often done using a slot on the board's male connector
-housing, which must match a key on the JTAG cable's female connector.
-If there's no housing, then you must look carefully and
-make sure pin 1 on the cable hooks up to pin 1 on the board.
-Ribbon cables are frequently all grey except for a wire on one
-edge, which is red. The red wire is pin 1.
-
-Sometimes dongles provide cables where one end is an ``octopus'' of
-color coded single-wire connectors, instead of a connector block.
-These are great when converting from one JTAG pinout to another,
-but are tedious to set up.
-Use these with connector pinout diagrams to help you match up the
-adapter signals to the right board pins.
-
-@item @emph{Connect the adapter's other end} once the JTAG cable is connected.
-A USB, parallel, or serial port connector will go to the host which
-you are using to run OpenOCD.
-For Ethernet, consult the documentation and your network administrator.
-
-For USB-based JTAG adapters you have an easy sanity check at this point:
-does the host operating system see the JTAG adapter? If you're running
-Linux, try the @command{lsusb} command. If that host is an
-MS-Windows host, you'll need to install a driver before OpenOCD works.
-
-@item @emph{Connect the adapter's power supply, if needed.}
-This step is primarily for non-USB adapters,
-but sometimes USB adapters need extra power.
-
-@item @emph{Power up the target board.}
-Unless you just let the magic smoke escape,
-you're now ready to set up the OpenOCD server
-so you can use JTAG to work with that board.
-
-@end enumerate
-
-Talk with the OpenOCD server using
-telnet (@code{telnet localhost 4444} on many systems) or GDB.
-@xref{GDB and OpenOCD}.
-
-@section Project Directory
-
-There are many ways you can configure OpenOCD and start it up.
-
-A simple way to organize them all involves keeping a
-single directory for your work with a given board.
-When you start OpenOCD from that directory,
-it searches there first for configuration files, scripts,
-files accessed through semihosting,
-and for code you upload to the target board.
-It is also the natural place to write files,
-such as log files and data you download from the board.
-
-@section Configuration Basics
-
-There are two basic ways of configuring OpenOCD, and
-a variety of ways you can mix them.
-Think of the difference as just being how you start the server:
-
-@itemize
-@item Many @option{-f file} or @option{-c command} options on the command line
-@item No options, but a @dfn{user config file}
-in the current directory named @file{openocd.cfg}
-@end itemize
-
-Here is an example @file{openocd.cfg} file for a setup
-using a Signalyzer FT2232-based JTAG adapter to talk to
-a board with an Atmel AT91SAM7X256 microcontroller:
-
-@example
-source [find interface/signalyzer.cfg]
-
-# GDB can also flash my flash!
-gdb_memory_map enable
-gdb_flash_program enable
-
-source [find target/sam7x256.cfg]
-@end example
-
-Here is the command line equivalent of that configuration:
-
-@example
-openocd -f interface/signalyzer.cfg \
- -c "gdb_memory_map enable" \
- -c "gdb_flash_program enable" \
- -f target/sam7x256.cfg
-@end example
-
-You could wrap such long command lines in shell scripts,
-each supporting a different development task.
-One might re-flash the board with a specific firmware version.
-Another might set up a particular debugging or run-time environment.
-
-@quotation Important
-At this writing (October 2009) the command line method has
-problems with how it treats variables.
-For example, after @option{-c "set VAR value"}, or doing the
-same in a script, the variable @var{VAR} will have no value
-that can be tested in a later script.
-@end quotation
-
-Here we will focus on the simpler solution: one user config
-file, including basic configuration plus any TCL procedures
-to simplify your work.
-
-@section User Config Files
-@cindex config file, user
-@cindex user config file
-@cindex config file, overview
-
-A user configuration file ties together all the parts of a project
-in one place.
-One of the following will match your situation best:
-
-@itemize
-@item Ideally almost everything comes from configuration files
-provided by someone else.
-For example, OpenOCD distributes a @file{scripts} directory
-(probably in @file{/usr/share/openocd/scripts} on Linux).
-Board and tool vendors can provide these too, as can individual
-user sites; the @option{-s} command line option lets you say
-where to find these files. (@xref{Running}.)
-The AT91SAM7X256 example above works this way.
-
-Three main types of non-user configuration file each have their
-own subdirectory in the @file{scripts} directory:
-
-@enumerate
-@item @b{interface} -- one for each different debug adapter;
-@item @b{board} -- one for each different board
-@item @b{target} -- the chips which integrate CPUs and other JTAG TAPs
-@end enumerate
-
-Best case: include just two files, and they handle everything else.
-The first is an interface config file.
-The second is board-specific, and it sets up the JTAG TAPs and
-their GDB targets (by deferring to some @file{target.cfg} file),
-declares all flash memory, and leaves you nothing to do except
-meet your deadline:
-
-@example
-source [find interface/olimex-jtag-tiny.cfg]
-source [find board/csb337.cfg]
-@end example
-
-Boards with a single microcontroller often won't need more
-than the target config file, as in the AT91SAM7X256 example.
-That's because there is no external memory (flash, DDR RAM), and
-the board differences are encapsulated by application code.
-
-@item Maybe you don't know yet what your board looks like to JTAG.
-Once you know the @file{interface.cfg} file to use, you may
-need help from OpenOCD to discover what's on the board.
-Once you find the JTAG TAPs, you can just search for appropriate
-target and board
-configuration files ... or write your own, from the bottom up.
-@xref{autoprobing,,Autoprobing}.
-
-@item You can often reuse some standard config files but
-need to write a few new ones, probably a @file{board.cfg} file.
-You will be using commands described later in this User's Guide,
-and working with the guidelines in the next chapter.
-
-For example, there may be configuration files for your JTAG adapter
-and target chip, but you need a new board-specific config file
-giving access to your particular flash chips.
-Or you might need to write another target chip configuration file
-for a new chip built around the Cortex M3 core.
-
-@quotation Note
-When you write new configuration files, please submit
-them for inclusion in the next OpenOCD release.
-For example, a @file{board/newboard.cfg} file will help the
-next users of that board, and a @file{target/newcpu.cfg}
-will help support users of any board using that chip.
-@end quotation
-
-@item
-You may may need to write some C code.
-It may be as simple as supporting a new FT2232 or parport
-based adapter; a bit more involved, like a NAND or NOR flash
-controller driver; or a big piece of work like supporting
-a new chip architecture.
-@end itemize
-
-Reuse the existing config files when you can.
-Look first in the @file{scripts/boards} area, then @file{scripts/targets}.
-You may find a board configuration that's a good example to follow.
-
-When you write config files, separate the reusable parts
-(things every user of that interface, chip, or board needs)
-from ones specific to your environment and debugging approach.
-@itemize
-
-@item
-For example, a @code{gdb-attach} event handler that invokes
-the @command{reset init} command will interfere with debugging
-early boot code, which performs some of the same actions
-that the @code{reset-init} event handler does.
-
-@item
-Likewise, the @command{arm9 vector_catch} command (or
-@cindex vector_catch
-its siblings @command{xscale vector_catch}
-and @command{cortex_m vector_catch}) can be a timesaver
-during some debug sessions, but don't make everyone use that either.
-Keep those kinds of debugging aids in your user config file,
-along with messaging and tracing setup.
-(@xref{softwaredebugmessagesandtracing,,Software Debug Messages and Tracing}.)
-
-@item
-You might need to override some defaults.
-For example, you might need to move, shrink, or back up the target's
-work area if your application needs much SRAM.
-
-@item
-TCP/IP port configuration is another example of something which
-is environment-specific, and should only appear in
-a user config file. @xref{tcpipports,,TCP/IP Ports}.
-@end itemize
-
-@section Project-Specific Utilities
-
-A few project-specific utility
-routines may well speed up your work.
-Write them, and keep them in your project's user config file.
-
-For example, if you are making a boot loader work on a
-board, it's nice to be able to debug the ``after it's
-loaded to RAM'' parts separately from the finicky early
-code which sets up the DDR RAM controller and clocks.
-A script like this one, or a more GDB-aware sibling,
-may help:
-
-@example
-proc ramboot @{ @} @{
- # Reset, running the target's "reset-init" scripts
- # to initialize clocks and the DDR RAM controller.
- # Leave the CPU halted.
- reset init
-
- # Load CONFIG_SKIP_LOWLEVEL_INIT version into DDR RAM.
- load_image u-boot.bin 0x20000000
-
- # Start running.
- resume 0x20000000
-@}
-@end example
-
-Then once that code is working you will need to make it
-boot from NOR flash; a different utility would help.
-Alternatively, some developers write to flash using GDB.
-(You might use a similar script if you're working with a flash
-based microcontroller application instead of a boot loader.)
-
-@example
-proc newboot @{ @} @{
- # Reset, leaving the CPU halted. The "reset-init" event
- # proc gives faster access to the CPU and to NOR flash;
- # "reset halt" would be slower.
- reset init
-
- # Write standard version of U-Boot into the first two
- # sectors of NOR flash ... the standard version should
- # do the same lowlevel init as "reset-init".
- flash protect 0 0 1 off
- flash erase_sector 0 0 1
- flash write_bank 0 u-boot.bin 0x0
- flash protect 0 0 1 on
-
- # Reboot from scratch using that new boot loader.
- reset run
-@}
-@end example
-
-You may need more complicated utility procedures when booting
-from NAND.
-That often involves an extra bootloader stage,
-running from on-chip SRAM to perform DDR RAM setup so it can load
-the main bootloader code (which won't fit into that SRAM).
-
-Other helper scripts might be used to write production system images,
-involving considerably more than just a three stage bootloader.
-
-@section Target Software Changes
-
-Sometimes you may want to make some small changes to the software
-you're developing, to help make JTAG debugging work better.
-For example, in C or assembly language code you might
-use @code{#ifdef JTAG_DEBUG} (or its converse) around code
-handling issues like:
-
-@itemize @bullet
-
-@item @b{Watchdog Timers}...
-Watchog timers are typically used to automatically reset systems if
-some application task doesn't periodically reset the timer. (The
-assumption is that the system has locked up if the task can't run.)
-When a JTAG debugger halts the system, that task won't be able to run
-and reset the timer ... potentially causing resets in the middle of
-your debug sessions.
-
-It's rarely a good idea to disable such watchdogs, since their usage
-needs to be debugged just like all other parts of your firmware.
-That might however be your only option.
-
-Look instead for chip-specific ways to stop the watchdog from counting
-while the system is in a debug halt state. It may be simplest to set
-that non-counting mode in your debugger startup scripts. You may however
-need a different approach when, for example, a motor could be physically
-damaged by firmware remaining inactive in a debug halt state. That might
-involve a type of firmware mode where that "non-counting" mode is disabled
-at the beginning then re-enabled at the end; a watchdog reset might fire
-and complicate the debug session, but hardware (or people) would be
-protected.@footnote{Note that many systems support a "monitor mode" debug
-that is a somewhat cleaner way to address such issues. You can think of
-it as only halting part of the system, maybe just one task,
-instead of the whole thing.
-At this writing, January 2010, OpenOCD based debugging does not support
-monitor mode debug, only "halt mode" debug.}
-
-@item @b{ARM Semihosting}...
-@cindex ARM semihosting
-When linked with a special runtime library provided with many
-toolchains@footnote{See chapter 8 "Semihosting" in
-@uref{http://infocenter.arm.com/help/topic/com.arm.doc.dui0203i/DUI0203I_rvct_developer_guide.pdf,
-ARM DUI 0203I}, the "RealView Compilation Tools Developer Guide".
-The CodeSourcery EABI toolchain also includes a semihosting library.},
-your target code can use I/O facilities on the debug host. That library
-provides a small set of system calls which are handled by OpenOCD.
-It can let the debugger provide your system console and a file system,
-helping with early debugging or providing a more capable environment
-for sometimes-complex tasks like installing system firmware onto
-NAND or SPI flash.
-
-@item @b{ARM Wait-For-Interrupt}...
-Many ARM chips synchronize the JTAG clock using the core clock.
-Low power states which stop that core clock thus prevent JTAG access.
-Idle loops in tasking environments often enter those low power states
-via the @code{WFI} instruction (or its coprocessor equivalent, before ARMv7).
-
-You may want to @emph{disable that instruction} in source code,
-or otherwise prevent using that state,
-to ensure you can get JTAG access at any time.@footnote{As a more
-polite alternative, some processors have special debug-oriented
-registers which can be used to change various features including
-how the low power states are clocked while debugging.
-The STM32 DBGMCU_CR register is an example; at the cost of extra
-power consumption, JTAG can be used during low power states.}
-For example, the OpenOCD @command{halt} command may not
-work for an idle processor otherwise.
-
-@item @b{Delay after reset}...
-Not all chips have good support for debugger access
-right after reset; many LPC2xxx chips have issues here.
-Similarly, applications that reconfigure pins used for
-JTAG access as they start will also block debugger access.
-
-To work with boards like this, @emph{enable a short delay loop}
-the first thing after reset, before "real" startup activities.
-For example, one second's delay is usually more than enough
-time for a JTAG debugger to attach, so that
-early code execution can be debugged
-or firmware can be replaced.
-
-@item @b{Debug Communications Channel (DCC)}...
-Some processors include mechanisms to send messages over JTAG.
-Many ARM cores support these, as do some cores from other vendors.
-(OpenOCD may be able to use this DCC internally, speeding up some
-operations like writing to memory.)
-
-Your application may want to deliver various debugging messages
-over JTAG, by @emph{linking with a small library of code}
-provided with OpenOCD and using the utilities there to send
-various kinds of message.
-@xref{softwaredebugmessagesandtracing,,Software Debug Messages and Tracing}.
-
-@end itemize
-
-@section Target Hardware Setup
-
-Chip vendors often provide software development boards which
-are highly configurable, so that they can support all options
-that product boards may require. @emph{Make sure that any
-jumpers or switches match the system configuration you are
-working with.}
-
-Common issues include:
-
-@itemize @bullet
-
-@item @b{JTAG setup} ...
-Boards may support more than one JTAG configuration.
-Examples include jumpers controlling pullups versus pulldowns
-on the nTRST and/or nSRST signals, and choice of connectors
-(e.g. which of two headers on the base board,
-or one from a daughtercard).
-For some Texas Instruments boards, you may need to jumper the
-EMU0 and EMU1 signals (which OpenOCD won't currently control).
-
-@item @b{Boot Modes} ...
-Complex chips often support multiple boot modes, controlled
-by external jumpers. Make sure this is set up correctly.
-For example many i.MX boards from NXP need to be jumpered
-to "ATX mode" to start booting using the on-chip ROM, when
-using second stage bootloader code stored in a NAND flash chip.
-
-Such explicit configuration is common, and not limited to
-booting from NAND. You might also need to set jumpers to
-start booting using code loaded from an MMC/SD card; external
-SPI flash; Ethernet, UART, or USB links; NOR flash; OneNAND
-flash; some external host; or various other sources.
-
-
-@item @b{Memory Addressing} ...
-Boards which support multiple boot modes may also have jumpers
-to configure memory addressing. One board, for example, jumpers
-external chipselect 0 (used for booting) to address either
-a large SRAM (which must be pre-loaded via JTAG), NOR flash,
-or NAND flash. When it's jumpered to address NAND flash, that
-board must also be told to start booting from on-chip ROM.
-
-Your @file{board.cfg} file may also need to be told this jumper
-configuration, so that it can know whether to declare NOR flash
-using @command{flash bank} or instead declare NAND flash with
-@command{nand device}; and likewise which probe to perform in
-its @code{reset-init} handler.
-
-A closely related issue is bus width. Jumpers might need to
-distinguish between 8 bit or 16 bit bus access for the flash
-used to start booting.
-
-@item @b{Peripheral Access} ...
-Development boards generally provide access to every peripheral
-on the chip, sometimes in multiple modes (such as by providing
-multiple audio codec chips).
-This interacts with software
-configuration of pin multiplexing, where for example a
-given pin may be routed either to the MMC/SD controller
-or the GPIO controller. It also often interacts with
-configuration jumpers. One jumper may be used to route
-signals to an MMC/SD card slot or an expansion bus (which
-might in turn affect booting); others might control which
-audio or video codecs are used.
-
-@end itemize
-
-Plus you should of course have @code{reset-init} event handlers
-which set up the hardware to match that jumper configuration.
-That includes in particular any oscillator or PLL used to clock
-the CPU, and any memory controllers needed to access external
-memory and peripherals. Without such handlers, you won't be
-able to access those resources without working target firmware
-which can do that setup ... this can be awkward when you're
-trying to debug that target firmware. Even if there's a ROM
-bootloader which handles a few issues, it rarely provides full
-access to all board-specific capabilities.
-
-
-@node Config File Guidelines
-@chapter Config File Guidelines
-
-This chapter is aimed at any user who needs to write a config file,
-including developers and integrators of OpenOCD and any user who
-needs to get a new board working smoothly.
-It provides guidelines for creating those files.
-
-You should find the following directories under
-@t{$(INSTALLDIR)/scripts}, with config files maintained upstream. Use
-them as-is where you can; or as models for new files.
-@itemize @bullet
-@item @file{interface} ...
-These are for debug adapters. Files that specify configuration to use
-specific JTAG, SWD and other adapters go here.
-@item @file{board} ...
-Think Circuit Board, PWA, PCB, they go by many names. Board files
-contain initialization items that are specific to a board.
-
-They reuse target configuration files, since the same
-microprocessor chips are used on many boards,
-but support for external parts varies widely. For
-example, the SDRAM initialization sequence for the board, or the type
-of external flash and what address it uses. Any initialization
-sequence to enable that external flash or SDRAM should be found in the
-board file. Boards may also contain multiple targets: two CPUs; or
-a CPU and an FPGA.
-@item @file{target} ...
-Think chip. The ``target'' directory represents the JTAG TAPs
-on a chip
-which OpenOCD should control, not a board. Two common types of targets
-are ARM chips and FPGA or CPLD chips.
-When a chip has multiple TAPs (maybe it has both ARM and DSP cores),
-the target config file defines all of them.
-@item @emph{more} ... browse for other library files which may be useful.
-For example, there are various generic and CPU-specific utilities.
-@end itemize
-
-The @file{openocd.cfg} user config
-file may override features in any of the above files by
-setting variables before sourcing the target file, or by adding
-commands specific to their situation.
-
-@section Interface Config Files
-
-The user config file
-should be able to source one of these files with a command like this:
-
-@example
-source [find interface/FOOBAR.cfg]
-@end example
-
-A preconfigured interface file should exist for every debug adapter
-in use today with OpenOCD.
-That said, perhaps some of these config files
-have only been used by the developer who created it.
-
-A separate chapter gives information about how to set these up.
-@xref{Debug Adapter Configuration}.
-Read the OpenOCD source code (and Developer's Guide)
-if you have a new kind of hardware interface
-and need to provide a driver for it.
-
-@section Board Config Files
-@cindex config file, board
-@cindex board config file
-
-The user config file
-should be able to source one of these files with a command like this:
-
-@example
-source [find board/FOOBAR.cfg]
-@end example
-
-The point of a board config file is to package everything
-about a given board that user config files need to know.
-In summary the board files should contain (if present)
-
-@enumerate
-@item One or more @command{source [find target/...cfg]} statements
-@item NOR flash configuration (@pxref{norconfiguration,,NOR Configuration})
-@item NAND flash configuration (@pxref{nandconfiguration,,NAND Configuration})
-@item Target @code{reset} handlers for SDRAM and I/O configuration
-@item JTAG adapter reset configuration (@pxref{Reset Configuration})
-@item All things that are not ``inside a chip''
-@end enumerate
-
-Generic things inside target chips belong in target config files,
-not board config files. So for example a @code{reset-init} event
-handler should know board-specific oscillator and PLL parameters,
-which it passes to target-specific utility code.
-
-The most complex task of a board config file is creating such a
-@code{reset-init} event handler.
-Define those handlers last, after you verify the rest of the board
-configuration works.
-
-@subsection Communication Between Config files
-
-In addition to target-specific utility code, another way that
-board and target config files communicate is by following a
-convention on how to use certain variables.
-
-The full Tcl/Tk language supports ``namespaces'', but Jim-Tcl does not.
-Thus the rule we follow in OpenOCD is this: Variables that begin with
-a leading underscore are temporary in nature, and can be modified and
-used at will within a target configuration file.
-
-Complex board config files can do the things like this,
-for a board with three chips:
-
-@example
-# Chip #1: PXA270 for network side, big endian
-set CHIPNAME network
-set ENDIAN big
-source [find target/pxa270.cfg]
-# on return: _TARGETNAME = network.cpu
-# other commands can refer to the "network.cpu" target.
-$_TARGETNAME configure .... events for this CPU..
-
-# Chip #2: PXA270 for video side, little endian
-set CHIPNAME video
-set ENDIAN little
-source [find target/pxa270.cfg]
-# on return: _TARGETNAME = video.cpu
-# other commands can refer to the "video.cpu" target.
-$_TARGETNAME configure .... events for this CPU..
-
-# Chip #3: Xilinx FPGA for glue logic
-set CHIPNAME xilinx
-unset ENDIAN
-source [find target/spartan3.cfg]
-@end example
-
-That example is oversimplified because it doesn't show any flash memory,
-or the @code{reset-init} event handlers to initialize external DRAM
-or (assuming it needs it) load a configuration into the FPGA.
-Such features are usually needed for low-level work with many boards,
-where ``low level'' implies that the board initialization software may
-not be working. (That's a common reason to need JTAG tools. Another
-is to enable working with microcontroller-based systems, which often
-have no debugging support except a JTAG connector.)
-
-Target config files may also export utility functions to board and user
-config files. Such functions should use name prefixes, to help avoid
-naming collisions.
-
-Board files could also accept input variables from user config files.
-For example, there might be a @code{J4_JUMPER} setting used to identify
-what kind of flash memory a development board is using, or how to set
-up other clocks and peripherals.
-
-@subsection Variable Naming Convention
-@cindex variable names
-
-Most boards have only one instance of a chip.
-However, it should be easy to create a board with more than
-one such chip (as shown above).
-Accordingly, we encourage these conventions for naming
-variables associated with different @file{target.cfg} files,
-to promote consistency and
-so that board files can override target defaults.
-
-Inputs to target config files include:
-
-@itemize @bullet
-@item @code{CHIPNAME} ...
-This gives a name to the overall chip, and is used as part of
-tap identifier dotted names.
-While the default is normally provided by the chip manufacturer,
-board files may need to distinguish between instances of a chip.
-@item @code{ENDIAN} ...
-By default @option{little} - although chips may hard-wire @option{big}.
-Chips that can't change endianness don't need to use this variable.
-@item @code{CPUTAPID} ...
-When OpenOCD examines the JTAG chain, it can be told verify the
-chips against the JTAG IDCODE register.
-The target file will hold one or more defaults, but sometimes the
-chip in a board will use a different ID (perhaps a newer revision).
-@end itemize
-
-Outputs from target config files include:
-
-@itemize @bullet
-@item @code{_TARGETNAME} ...
-By convention, this variable is created by the target configuration
-script. The board configuration file may make use of this variable to
-configure things like a ``reset init'' script, or other things
-specific to that board and that target.
-If the chip has 2 targets, the names are @code{_TARGETNAME0},
-@code{_TARGETNAME1}, ... etc.
-@end itemize
-
-@subsection The reset-init Event Handler
-@cindex event, reset-init
-@cindex reset-init handler
-
-Board config files run in the OpenOCD configuration stage;
-they can't use TAPs or targets, since they haven't been
-fully set up yet.
-This means you can't write memory or access chip registers;
-you can't even verify that a flash chip is present.
-That's done later in event handlers, of which the target @code{reset-init}
-handler is one of the most important.
-
-Except on microcontrollers, the basic job of @code{reset-init} event
-handlers is setting up flash and DRAM, as normally handled by boot loaders.
-Microcontrollers rarely use boot loaders; they run right out of their
-on-chip flash and SRAM memory. But they may want to use one of these
-handlers too, if just for developer convenience.
-
-@quotation Note
-Because this is so very board-specific, and chip-specific, no examples
-are included here.
-Instead, look at the board config files distributed with OpenOCD.
-If you have a boot loader, its source code will help; so will
-configuration files for other JTAG tools
-(@pxref{translatingconfigurationfiles,,Translating Configuration Files}).
-@end quotation
-
-Some of this code could probably be shared between different boards.
-For example, setting up a DRAM controller often doesn't differ by
-much except the bus width (16 bits or 32?) and memory timings, so a
-reusable TCL procedure loaded by the @file{target.cfg} file might take
-those as parameters.
-Similarly with oscillator, PLL, and clock setup;
-and disabling the watchdog.
-Structure the code cleanly, and provide comments to help
-the next developer doing such work.
-(@emph{You might be that next person} trying to reuse init code!)
-
-The last thing normally done in a @code{reset-init} handler is probing
-whatever flash memory was configured. For most chips that needs to be
-done while the associated target is halted, either because JTAG memory
-access uses the CPU or to prevent conflicting CPU access.
-
-@subsection JTAG Clock Rate
-
-Before your @code{reset-init} handler has set up
-the PLLs and clocking, you may need to run with
-a low JTAG clock rate.
-@xref{jtagspeed,,JTAG Speed}.
-Then you'd increase that rate after your handler has
-made it possible to use the faster JTAG clock.
-When the initial low speed is board-specific, for example
-because it depends on a board-specific oscillator speed, then
-you should probably set it up in the board config file;
-if it's target-specific, it belongs in the target config file.
-
-For most ARM-based processors the fastest JTAG clock@footnote{A FAQ
-@uref{http://www.arm.com/support/faqdev/4170.html} gives details.}
-is one sixth of the CPU clock; or one eighth for ARM11 cores.
-Consult chip documentation to determine the peak JTAG clock rate,
-which might be less than that.
-
-@quotation Warning
-On most ARMs, JTAG clock detection is coupled to the core clock, so
-software using a @option{wait for interrupt} operation blocks JTAG access.
-Adaptive clocking provides a partial workaround, but a more complete
-solution just avoids using that instruction with JTAG debuggers.
-@end quotation
-
-If both the chip and the board support adaptive clocking,
-use the @command{jtag_rclk}
-command, in case your board is used with JTAG adapter which
-also supports it. Otherwise use @command{adapter_khz}.
-Set the slow rate at the beginning of the reset sequence,
-and the faster rate as soon as the clocks are at full speed.
-
-@anchor{theinitboardprocedure}
-@subsection The init_board procedure
-@cindex init_board procedure
-
-The concept of @code{init_board} procedure is very similar to @code{init_targets}
-(@xref{theinittargetsprocedure,,The init_targets procedure}.) - it's a replacement of ``linear''
-configuration scripts. This procedure is meant to be executed when OpenOCD enters run stage
-(@xref{enteringtherunstage,,Entering the Run Stage},) after @code{init_targets}. The idea to have
-separate @code{init_targets} and @code{init_board} procedures is to allow the first one to configure
-everything target specific (internal flash, internal RAM, etc.) and the second one to configure
-everything board specific (reset signals, chip frequency, reset-init event handler, external memory, etc.).
-Additionally ``linear'' board config file will most likely fail when target config file uses
-@code{init_targets} scheme (``linear'' script is executed before @code{init} and @code{init_targets} - after),
-so separating these two configuration stages is very convenient, as the easiest way to overcome this
-problem is to convert board config file to use @code{init_board} procedure. Board config scripts don't
-need to override @code{init_targets} defined in target config files when they only need to add some specifics.
-
-Just as @code{init_targets}, the @code{init_board} procedure can be overridden by ``next level'' script (which sources
-the original), allowing greater code reuse.
-
-@example
-### board_file.cfg ###
-
-# source target file that does most of the config in init_targets
-source [find target/target.cfg]
-
-proc enable_fast_clock @{@} @{
- # enables fast on-board clock source
- # configures the chip to use it
-@}
-
-# initialize only board specifics - reset, clock, adapter frequency
-proc init_board @{@} @{
- reset_config trst_and_srst trst_pulls_srst
-
- $_TARGETNAME configure -event reset-init @{
- adapter_khz 1
- enable_fast_clock
- adapter_khz 10000
- @}
-@}
-@end example
-
-@section Target Config Files
-@cindex config file, target
-@cindex target config file
-
-Board config files communicate with target config files using
-naming conventions as described above, and may source one or
-more target config files like this:
-
-@example
-source [find target/FOOBAR.cfg]
-@end example
-
-The point of a target config file is to package everything
-about a given chip that board config files need to know.
-In summary the target files should contain
-
-@enumerate
-@item Set defaults
-@item Add TAPs to the scan chain
-@item Add CPU targets (includes GDB support)
-@item CPU/Chip/CPU-Core specific features
-@item On-Chip flash
-@end enumerate
-
-As a rule of thumb, a target file sets up only one chip.
-For a microcontroller, that will often include a single TAP,
-which is a CPU needing a GDB target, and its on-chip flash.
-
-More complex chips may include multiple TAPs, and the target
-config file may need to define them all before OpenOCD
-can talk to the chip.
-For example, some phone chips have JTAG scan chains that include
-an ARM core for operating system use, a DSP,
-another ARM core embedded in an image processing engine,
-and other processing engines.
-
-@subsection Default Value Boiler Plate Code
-
-All target configuration files should start with code like this,
-letting board config files express environment-specific
-differences in how things should be set up.
-
-@example
-# Boards may override chip names, perhaps based on role,
-# but the default should match what the vendor uses
-if @{ [info exists CHIPNAME] @} @{
- set _CHIPNAME $CHIPNAME
-@} else @{
- set _CHIPNAME sam7x256
-@}
-
-# ONLY use ENDIAN with targets that can change it.
-if @{ [info exists ENDIAN] @} @{
- set _ENDIAN $ENDIAN
-@} else @{
- set _ENDIAN little
-@}
-
-# TAP identifiers may change as chips mature, for example with
-# new revision fields (the "3" here). Pick a good default; you
-# can pass several such identifiers to the "jtag newtap" command.
-if @{ [info exists CPUTAPID ] @} @{
- set _CPUTAPID $CPUTAPID
-@} else @{
- set _CPUTAPID 0x3f0f0f0f
-@}
-@end example
-@c but 0x3f0f0f0f is for an str73x part ...
-
-@emph{Remember:} Board config files may include multiple target
-config files, or the same target file multiple times
-(changing at least @code{CHIPNAME}).
-
-Likewise, the target configuration file should define
-@code{_TARGETNAME} (or @code{_TARGETNAME0} etc) and
-use it later on when defining debug targets:
-
-@example
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
-@end example
-
-@subsection Adding TAPs to the Scan Chain
-After the ``defaults'' are set up,
-add the TAPs on each chip to the JTAG scan chain.
-@xref{TAP Declaration}, and the naming convention
-for taps.
-
-In the simplest case the chip has only one TAP,
-probably for a CPU or FPGA.
-The config file for the Atmel AT91SAM7X256
-looks (in part) like this:
-
-@example
-jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
-@end example
-
-A board with two such at91sam7 chips would be able
-to source such a config file twice, with different
-values for @code{CHIPNAME}, so
-it adds a different TAP each time.
-
-If there are nonzero @option{-expected-id} values,
-OpenOCD attempts to verify the actual tap id against those values.
-It will issue error messages if there is mismatch, which
-can help to pinpoint problems in OpenOCD configurations.
-
-@example
-JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f
- (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
-ERROR: Tap: sam7x256.cpu - Expected id: 0x12345678, Got: 0x3f0f0f0f
-ERROR: expected: mfg: 0x33c, part: 0x2345, ver: 0x1
-ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x3
-@end example
-
-There are more complex examples too, with chips that have
-multiple TAPs. Ones worth looking at include:
-
-@itemize
-@item @file{target/omap3530.cfg} -- with disabled ARM and DSP,
-plus a JRC to enable them
-@item @file{target/str912.cfg} -- with flash, CPU, and boundary scan
-@item @file{target/ti_dm355.cfg} -- with ETM, ARM, and JRC (this JRC
-is not currently used)
-@end itemize
-
-@subsection Add CPU targets
-
-After adding a TAP for a CPU, you should set it up so that
-GDB and other commands can use it.
-@xref{CPU Configuration}.
-For the at91sam7 example above, the command can look like this;
-note that @code{$_ENDIAN} is not needed, since OpenOCD defaults
-to little endian, and this chip doesn't support changing that.
-
-@example
-set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
-@end example
-
-Work areas are small RAM areas associated with CPU targets.
-They are used by OpenOCD to speed up downloads,
-and to download small snippets of code to program flash chips.
-If the chip includes a form of ``on-chip-ram'' - and many do - define
-a work area if you can.
-Again using the at91sam7 as an example, this can look like:
-
-@example
-$_TARGETNAME configure -work-area-phys 0x00200000 \
- -work-area-size 0x4000 -work-area-backup 0
-@end example
-
-@anchor{definecputargetsworkinginsmp}
-@subsection Define CPU targets working in SMP
-@cindex SMP
-After setting targets, you can define a list of targets working in SMP.
-
-@example
-set _TARGETNAME_1 $_CHIPNAME.cpu1
-set _TARGETNAME_2 $_CHIPNAME.cpu2
-target create $_TARGETNAME_1 cortex_a -chain-position $_CHIPNAME.dap \
--coreid 0 -dbgbase $_DAP_DBG1
-target create $_TARGETNAME_2 cortex_a -chain-position $_CHIPNAME.dap \
--coreid 1 -dbgbase $_DAP_DBG2
-#define 2 targets working in smp.
-target smp $_CHIPNAME.cpu2 $_CHIPNAME.cpu1
-@end example
-In the above example on cortex_a, 2 cpus are working in SMP.
-In SMP only one GDB instance is created and :
-@itemize @bullet
-@item a set of hardware breakpoint sets the same breakpoint on all targets in the list.
-@item halt command triggers the halt of all targets in the list.
-@item resume command triggers the write context and the restart of all targets in the list.
-@item following a breakpoint: the target stopped by the breakpoint is displayed to the GDB session.
-@item dedicated GDB serial protocol packets are implemented for switching/retrieving the target
-displayed by the GDB session @pxref{usingopenocdsmpwithgdb,,Using OpenOCD SMP with GDB}.
-@end itemize
-
-The SMP behaviour can be disabled/enabled dynamically. On cortex_a following
-command have been implemented.
-@itemize @bullet
-@item cortex_a smp_on : enable SMP mode, behaviour is as described above.
-@item cortex_a smp_off : disable SMP mode, the current target is the one
-displayed in the GDB session, only this target is now controlled by GDB
-session. This behaviour is useful during system boot up.
-@item cortex_a smp_gdb : display/fix the core id displayed in GDB session see
-following example.
-@end itemize
-
-@example
->cortex_a smp_gdb
-gdb coreid 0 -> -1
-#0 : coreid 0 is displayed to GDB ,
-#-> -1 : next resume triggers a real resume
-> cortex_a smp_gdb 1
-gdb coreid 0 -> 1
-#0 :coreid 0 is displayed to GDB ,
-#->1 : next resume displays coreid 1 to GDB
-> resume
-> cortex_a smp_gdb
-gdb coreid 1 -> 1
-#1 :coreid 1 is displayed to GDB ,
-#->1 : next resume displays coreid 1 to GDB
-> cortex_a smp_gdb -1
-gdb coreid 1 -> -1
-#1 :coreid 1 is displayed to GDB,
-#->-1 : next resume triggers a real resume
-@end example
-
-
-@subsection Chip Reset Setup
-
-As a rule, you should put the @command{reset_config} command
-into the board file. Most things you think you know about a
-chip can be tweaked by the board.
-
-Some chips have specific ways the TRST and SRST signals are
-managed. In the unusual case that these are @emph{chip specific}
-and can never be changed by board wiring, they could go here.
-For example, some chips can't support JTAG debugging without
-both signals.
-
-Provide a @code{reset-assert} event handler if you can.
-Such a handler uses JTAG operations to reset the target,
-letting this target config be used in systems which don't
-provide the optional SRST signal, or on systems where you
-don't want to reset all targets at once.
-Such a handler might write to chip registers to force a reset,
-use a JRC to do that (preferable -- the target may be wedged!),
-or force a watchdog timer to trigger.
-(For Cortex-M targets, this is not necessary. The target
-driver knows how to use trigger an NVIC reset when SRST is
-not available.)
-
-Some chips need special attention during reset handling if
-they're going to be used with JTAG.
-An example might be needing to send some commands right
-after the target's TAP has been reset, providing a
-@code{reset-deassert-post} event handler that writes a chip
-register to report that JTAG debugging is being done.
-Another would be reconfiguring the watchdog so that it stops
-counting while the core is halted in the debugger.
-
-JTAG clocking constraints often change during reset, and in
-some cases target config files (rather than board config files)
-are the right places to handle some of those issues.
-For example, immediately after reset most chips run using a
-slower clock than they will use later.
-That means that after reset (and potentially, as OpenOCD
-first starts up) they must use a slower JTAG clock rate
-than they will use later.
-@xref{jtagspeed,,JTAG Speed}.
-
-@quotation Important
-When you are debugging code that runs right after chip
-reset, getting these issues right is critical.
-In particular, if you see intermittent failures when
-OpenOCD verifies the scan chain after reset,
-look at how you are setting up JTAG clocking.
-@end quotation
-
-@anchor{theinittargetsprocedure}
-@subsection The init_targets procedure
-@cindex init_targets procedure
-
-Target config files can either be ``linear'' (script executed line-by-line when parsed in
-configuration stage, @xref{configurationstage,,Configuration Stage},) or they can contain a special
-procedure called @code{init_targets}, which will be executed when entering run stage
-(after parsing all config files or after @code{init} command, @xref{enteringtherunstage,,Entering the Run Stage}.)
-Such procedure can be overriden by ``next level'' script (which sources the original).
-This concept faciliates code reuse when basic target config files provide generic configuration
-procedures and @code{init_targets} procedure, which can then be sourced and enchanced or changed in
-a ``more specific'' target config file. This is not possible with ``linear'' config scripts,
-because sourcing them executes every initialization commands they provide.
-
-@example
-### generic_file.cfg ###
-
-proc setup_my_chip @{chip_name flash_size ram_size@} @{
- # basic initialization procedure ...
-@}
-
-proc init_targets @{@} @{
- # initializes generic chip with 4kB of flash and 1kB of RAM
- setup_my_chip MY_GENERIC_CHIP 4096 1024
-@}
-
-### specific_file.cfg ###
-
-source [find target/generic_file.cfg]
-
-proc init_targets @{@} @{
- # initializes specific chip with 128kB of flash and 64kB of RAM
- setup_my_chip MY_CHIP_WITH_128K_FLASH_64KB_RAM 131072 65536
-@}
-@end example
-
-The easiest way to convert ``linear'' config files to @code{init_targets} version is to
-enclose every line of ``code'' (i.e. not @code{source} commands, procedures, etc.) in this procedure.
-
-For an example of this scheme see LPC2000 target config files.
-
-The @code{init_boards} procedure is a similar concept concerning board config files
-(@xref{theinitboardprocedure,,The init_board procedure}.)
-
-@anchor{theinittargeteventsprocedure}
-@subsection The init_target_events procedure
-@cindex init_target_events procedure
-
-A special procedure called @code{init_target_events} is run just after
-@code{init_targets} (@xref{theinittargetsprocedure,,The init_targets
-procedure}.) and before @code{init_board}
-(@xref{theinitboardprocedure,,The init_board procedure}.) It is used
-to set up default target events for the targets that do not have those
-events already assigned.
-
-@subsection ARM Core Specific Hacks
-
-If the chip has a DCC, enable it. If the chip is an ARM9 with some
-special high speed download features - enable it.
-
-If present, the MMU, the MPU and the CACHE should be disabled.
-
-Some ARM cores are equipped with trace support, which permits
-examination of the instruction and data bus activity. Trace
-activity is controlled through an ``Embedded Trace Module'' (ETM)
-on one of the core's scan chains. The ETM emits voluminous data
-through a ``trace port''. (@xref{armhardwaretracing,,ARM Hardware Tracing}.)
-If you are using an external trace port,
-configure it in your board config file.
-If you are using an on-chip ``Embedded Trace Buffer'' (ETB),
-configure it in your target config file.
-
-@example
-etm config $_TARGETNAME 16 normal full etb
-etb config $_TARGETNAME $_CHIPNAME.etb
-@end example
-
-@subsection Internal Flash Configuration
-
-This applies @b{ONLY TO MICROCONTROLLERS} that have flash built in.
-
-@b{Never ever} in the ``target configuration file'' define any type of
-flash that is external to the chip. (For example a BOOT flash on
-Chip Select 0.) Such flash information goes in a board file - not
-the TARGET (chip) file.
-
-Examples:
-@itemize @bullet
-@item at91sam7x256 - has 256K flash YES enable it.
-@item str912 - has flash internal YES enable it.
-@item imx27 - uses boot flash on CS0 - it goes in the board file.
-@item pxa270 - again - CS0 flash - it goes in the board file.
-@end itemize
-
-@anchor{translatingconfigurationfiles}
-@section Translating Configuration Files
-@cindex translation
-If you have a configuration file for another hardware debugger
-or toolset (Abatron, BDI2000, BDI3000, CCS,
-Lauterbach, SEGGER, Macraigor, etc.), translating
-it into OpenOCD syntax is often quite straightforward. The most tricky
-part of creating a configuration script is oftentimes the reset init
-sequence where e.g. PLLs, DRAM and the like is set up.
-
-One trick that you can use when translating is to write small
-Tcl procedures to translate the syntax into OpenOCD syntax. This
-can avoid manual translation errors and make it easier to
-convert other scripts later on.
-
-Example of transforming quirky arguments to a simple search and
-replace job:
-
-@example
-# Lauterbach syntax(?)
-#
-# Data.Set c15:0x042f %long 0x40000015
-#
-# OpenOCD syntax when using procedure below.
-#
-# setc15 0x01 0x00050078
-
-proc setc15 @{regs value@} @{
- global TARGETNAME
-
- echo [format "set p15 0x%04x, 0x%08x" $regs $value]
-
- arm mcr 15 [expr ($regs>>12)&0x7] \
- [expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] \
- [expr ($regs>>8)&0x7] $value
-@}
-@end example
-
-
-
-@node Daemon Configuration
-@chapter Daemon Configuration
-@cindex initialization
-The commands here are commonly found in the openocd.cfg file and are
-used to specify what TCP/IP ports are used, and how GDB should be
-supported.
-
-@anchor{configurationstage}
-@section Configuration Stage
-@cindex configuration stage
-@cindex config command
-
-When the OpenOCD server process starts up, it enters a
-@emph{configuration stage} which is the only time that
-certain commands, @emph{configuration commands}, may be issued.
-Normally, configuration commands are only available
-inside startup scripts.
-
-In this manual, the definition of a configuration command is
-presented as a @emph{Config Command}, not as a @emph{Command}
-which may be issued interactively.
-The runtime @command{help} command also highlights configuration
-commands, and those which may be issued at any time.
-
-Those configuration commands include declaration of TAPs,
-flash banks,
-the interface used for JTAG communication,
-and other basic setup.
-The server must leave the configuration stage before it
-may access or activate TAPs.
-After it leaves this stage, configuration commands may no
-longer be issued.
-
-@anchor{enteringtherunstage}
-@section Entering the Run Stage
-
-The first thing OpenOCD does after leaving the configuration
-stage is to verify that it can talk to the scan chain
-(list of TAPs) which has been configured.
-It will warn if it doesn't find TAPs it expects to find,
-or finds TAPs that aren't supposed to be there.
-You should see no errors at this point.
-If you see errors, resolve them by correcting the
-commands you used to configure the server.
-Common errors include using an initial JTAG speed that's too
-fast, and not providing the right IDCODE values for the TAPs
-on the scan chain.
-
-Once OpenOCD has entered the run stage, a number of commands
-become available.
-A number of these relate to the debug targets you may have declared.
-For example, the @command{mww} command will not be available until
-a target has been successfuly instantiated.
-If you want to use those commands, you may need to force
-entry to the run stage.
-
-@deffn {Config Command} init
-This command terminates the configuration stage and
-enters the run stage. This helps when you need to have
-the startup scripts manage tasks such as resetting the target,
-programming flash, etc. To reset the CPU upon startup, add "init" and
-"reset" at the end of the config script or at the end of the OpenOCD
-command line using the @option{-c} command line switch.
-
-If this command does not appear in any startup/configuration file
-OpenOCD executes the command for you after processing all
-configuration files and/or command line options.
-
-@b{NOTE:} This command normally occurs at or near the end of your
-openocd.cfg file to force OpenOCD to ``initialize'' and make the
-targets ready. For example: If your openocd.cfg file needs to
-read/write memory on your target, @command{init} must occur before
-the memory read/write commands. This includes @command{nand probe}.
-@end deffn
-
-@deffn {Overridable Procedure} jtag_init
-This is invoked at server startup to verify that it can talk
-to the scan chain (list of TAPs) which has been configured.
-
-The default implementation first tries @command{jtag arp_init},
-which uses only a lightweight JTAG reset before examining the
-scan chain.
-If that fails, it tries again, using a harder reset
-from the overridable procedure @command{init_reset}.
-
-Implementations must have verified the JTAG scan chain before
-they return.
-This is done by calling @command{jtag arp_init}
-(or @command{jtag arp_init-reset}).
-@end deffn
-
-@anchor{tcpipports}
-@section TCP/IP Ports
-@cindex TCP port
-@cindex server
-@cindex port
-@cindex security
-The OpenOCD server accepts remote commands in several syntaxes.
-Each syntax uses a different TCP/IP port, which you may specify
-only during configuration (before those ports are opened).
-
-For reasons including security, you may wish to prevent remote
-access using one or more of these ports.
-In such cases, just specify the relevant port number as zero.
-If you disable all access through TCP/IP, you will need to
-use the command line @option{-pipe} option.
-
-@deffn {Command} gdb_port [number]
-@cindex GDB server
-Normally gdb listens to a TCP/IP port, but GDB can also
-communicate via pipes(stdin/out or named pipes). The name
-"gdb_port" stuck because it covers probably more than 90% of
-the normal use cases.
-
-No arguments reports GDB port. "pipe" means listen to stdin
-output to stdout, an integer is base port number, "disable"
-disables the gdb server.
-
-When using "pipe", also use log_output to redirect the log
-output to a file so as not to flood the stdin/out pipes.
-
-The -p/--pipe option is deprecated and a warning is printed
-as it is equivalent to passing in -c "gdb_port pipe; log_output openocd.log".
-
-Any other string is interpreted as named pipe to listen to.
-Output pipe is the same name as input pipe, but with 'o' appended,
-e.g. /var/gdb, /var/gdbo.
-
-The GDB port for the first target will be the base port, the
-second target will listen on gdb_port + 1, and so on.
-When not specified during the configuration stage,
-the port @var{number} defaults to 3333.
-
-Note: when using "gdb_port pipe", increasing the default remote timeout in
-gdb (with 'set remotetimeout') is recommended. An insufficient timeout may
-cause initialization to fail with "Unknown remote qXfer reply: OK".
-
-@end deffn
-
-@deffn {Command} tcl_port [number]
-Specify or query the port used for a simplified RPC
-connection that can be used by clients to issue TCL commands and get the
-output from the Tcl engine.
-Intended as a machine interface.
-When not specified during the configuration stage,
-the port @var{number} defaults to 6666.
-
-@end deffn
-
-@deffn {Command} telnet_port [number]
-Specify or query the
-port on which to listen for incoming telnet connections.
-This port is intended for interaction with one human through TCL commands.
-When not specified during the configuration stage,
-the port @var{number} defaults to 4444.
-When specified as zero, this port is not activated.
-@end deffn
-
-@anchor{gdbconfiguration}
-@section GDB Configuration
-@cindex GDB
-@cindex GDB configuration
-You can reconfigure some GDB behaviors if needed.
-The ones listed here are static and global.
-@xref{targetconfiguration,,Target Configuration}, about configuring individual targets.
-@xref{targetevents,,Target Events}, about configuring target-specific event handling.
-
-@anchor{gdbbreakpointoverride}
-@deffn {Command} gdb_breakpoint_override [@option{hard}|@option{soft}|@option{disable}]
-Force breakpoint type for gdb @command{break} commands.
-This option supports GDB GUIs which don't
-distinguish hard versus soft breakpoints, if the default OpenOCD and
-GDB behaviour is not sufficient. GDB normally uses hardware
-breakpoints if the memory map has been set up for flash regions.
-@end deffn
-
-@anchor{gdbflashprogram}
-@deffn {Config Command} gdb_flash_program (@option{enable}|@option{disable})
-Set to @option{enable} to cause OpenOCD to program the flash memory when a
-vFlash packet is received.
-The default behaviour is @option{enable}.
-@end deffn
-
-@deffn {Config Command} gdb_memory_map (@option{enable}|@option{disable})
-Set to @option{enable} to cause OpenOCD to send the memory configuration to GDB when
-requested. GDB will then know when to set hardware breakpoints, and program flash
-using the GDB load command. @command{gdb_flash_program enable} must also be enabled
-for flash programming to work.
-Default behaviour is @option{enable}.
-@xref{gdbflashprogram,,gdb_flash_program}.
-@end deffn
-
-@deffn {Config Command} gdb_report_data_abort (@option{enable}|@option{disable})
-Specifies whether data aborts cause an error to be reported
-by GDB memory read packets.
-The default behaviour is @option{disable};
-use @option{enable} see these errors reported.
-@end deffn
-
-@deffn {Config Command} gdb_target_description (@option{enable}|@option{disable})
-Set to @option{enable} to cause OpenOCD to send the target descriptions to gdb via qXfer:features:read packet.
-The default behaviour is @option{enable}.
-@end deffn
-
-@deffn {Command} gdb_save_tdesc
-Saves the target descripton file to the local file system.
-
-The file name is @i{target_name}.xml.
-@end deffn
-
-@anchor{eventpolling}
-@section Event Polling
-
-Hardware debuggers are parts of asynchronous systems,
-where significant events can happen at any time.
-The OpenOCD server needs to detect some of these events,
-so it can report them to through TCL command line
-or to GDB.
-
-Examples of such events include:
-
-@itemize
-@item One of the targets can stop running ... maybe it triggers
-a code breakpoint or data watchpoint, or halts itself.
-@item Messages may be sent over ``debug message'' channels ... many
-targets support such messages sent over JTAG,
-for receipt by the person debugging or tools.
-@item Loss of power ... some adapters can detect these events.
-@item Resets not issued through JTAG ... such reset sources
-can include button presses or other system hardware, sometimes
-including the target itself (perhaps through a watchdog).
-@item Debug instrumentation sometimes supports event triggering
-such as ``trace buffer full'' (so it can quickly be emptied)
-or other signals (to correlate with code behavior).
-@en
<TRUNCATED>
[24/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc288x.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc288x.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc288x.c
deleted file mode 100755
index 89f79e3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc288x.c
+++ /dev/null
@@ -1,438 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2008 by *
- * Karl RobinSod <ka...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/***************************************************************************
-* There are some things to notice
-*
-* You need to unprotect flash sectors each time you connect the OpenOCD
-* Dumping 1MB takes about 60 Seconds
-* Full erase (sectors 0-22 inclusive) takes 2-4 seconds
-* Writing 1MB takes 88 seconds
-*
- ***************************************************************************/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-
-#define LOAD_TIMER_ERASE 0
-#define LOAD_TIMER_WRITE 1
-
-#define FLASH_PAGE_SIZE 512
-
-/* LPC288X control registers */
-#define DBGU_CIDR 0x8000507C
-/* LPC288X flash registers */
-#define F_CTRL 0x80102000 /* Flash control register R/W 0x5 */
-#define F_STAT 0x80102004 /* Flash status register RO 0x45 */
-#define F_PROG_TIME 0x80102008 /* Flash program time register R/W 0 */
-#define F_WAIT 0x80102010 /* Flash read wait state register R/W 0xC004 */
-#define F_CLK_TIME 0x8010201C /* Flash clock divider for 66 kHz generation R/W 0
- **/
-#define F_INTEN_CLR 0x80102FD8 /* Clear interrupt enable bits WO - */
-#define F_INTEN_SET 0x80102FDC /* Set interrupt enable bits WO - */
-#define F_INT_STAT 0x80102FE0 /* Interrupt status bits RO 0 */
-#define F_INTEN 0x80102FE4 /* Interrupt enable bits RO 0 */
-#define F_INT_CLR 0x80102FE8 /* Clear interrupt status bits WO */
-#define F_INT_SET 0x80102FEC /* Set interrupt status bits WO - */
-#define FLASH_PD 0x80005030 /* Allows turning off the Flash memory for power
- *savings. R/W 1*/
-#define FLASH_INIT 0x80005034 /* Monitors Flash readiness, such as recovery from
- *Power Down mode. R/W -*/
-
-/* F_CTRL bits */
-#define FC_CS 0x0001
-#define FC_FUNC 0x0002
-#define FC_WEN 0x0004
-#define FC_RD_LATCH 0x0020
-#define FC_PROTECT 0x0080
-#define FC_SET_DATA 0x0400
-#define FC_RSSL 0x0800
-#define FC_PROG_REQ 0x1000
-#define FC_CLR_BUF 0x4000
-#define FC_LOAD_REQ 0x8000
-/* F_STAT bits */
-#define FS_DONE 0x0001
-#define FS_PROGGNT 0x0002
-#define FS_RDY 0x0004
-#define FS_ERR 0x0020
-/* F_PROG_TIME */
-#define FPT_TIME_MASK 0x7FFF
-
-#define FPT_ENABLE 0x8000
-/* F_WAIT */
-#define FW_WAIT_STATES_MASK 0x00FF
-#define FW_SET_MASK 0xC000
-
-/* F_CLK_TIME */
-#define FCT_CLK_DIV_MASK 0x0FFF
-
-struct lpc288x_flash_bank {
- uint32_t working_area;
- uint32_t working_area_size;
-
- /* chip id register */
- uint32_t cidr;
- const char *target_name;
- uint32_t cclk;
-
- uint32_t sector_size_break;
-};
-
-static uint32_t lpc288x_wait_status_busy(struct flash_bank *bank, int timeout);
-static void lpc288x_load_timer(int erase, struct target *target);
-static void lpc288x_set_flash_clk(struct flash_bank *bank);
-static uint32_t lpc288x_system_ready(struct flash_bank *bank);
-
-static uint32_t lpc288x_wait_status_busy(struct flash_bank *bank, int timeout)
-{
- uint32_t status;
- struct target *target = bank->target;
- do {
- alive_sleep(1);
- timeout--;
- target_read_u32(target, F_STAT, &status);
- } while (((status & FS_DONE) == 0) && timeout);
-
- if (timeout == 0) {
- LOG_DEBUG("Timedout!");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- return ERROR_OK;
-}
-
-/* Read device id register and fill in driver info structure */
-static int lpc288x_read_part_info(struct flash_bank *bank)
-{
- struct lpc288x_flash_bank *lpc288x_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t cidr;
-
- int i = 0;
- uint32_t offset;
-
- if (lpc288x_info->cidr == 0x0102100A)
- return ERROR_OK;/* already probed, multiple probes may cause memory leak, not
- *allowed */
-
- /* Read and parse chip identification register */
- target_read_u32(target, DBGU_CIDR, &cidr);
-
- if (cidr != 0x0102100A) {
- LOG_WARNING("Cannot identify target as an LPC288X (%08" PRIx32 ")", cidr);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- lpc288x_info->cidr = cidr;
- lpc288x_info->sector_size_break = 0x000F0000;
- lpc288x_info->target_name = "LPC288x";
-
- /* setup the sector info... */
- offset = bank->base;
- bank->num_sectors = 23;
- bank->sectors = malloc(sizeof(struct flash_sector) * 23);
-
- for (i = 0; i < 15; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 64 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
- for (i = 15; i < 23; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 8 * 1024;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- return ERROR_OK;
-}
-
-static int lpc288x_protect_check(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-/* flash_bank LPC288x 0 0 0 0 <target#> <cclk> */
-FLASH_BANK_COMMAND_HANDLER(lpc288x_flash_bank_command)
-{
- struct lpc288x_flash_bank *lpc288x_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- lpc288x_info = malloc(sizeof(struct lpc288x_flash_bank));
- bank->driver_priv = lpc288x_info;
-
- /* part wasn't probed for info yet */
- lpc288x_info->cidr = 0;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], lpc288x_info->cclk);
-
- return ERROR_OK;
-}
-
-/* The frequency is the AHB clock frequency divided by (CLK_DIV �3) + 1.
- * This must be programmed such that the Flash Programming clock frequency is 66 kHz � 20%.
- * AHB = 12 MHz ?
- * 12000000/66000 = 182
- * CLK_DIV = 60 ? */
-static void lpc288x_set_flash_clk(struct flash_bank *bank)
-{
- uint32_t clk_time;
- struct lpc288x_flash_bank *lpc288x_info = bank->driver_priv;
- clk_time = (lpc288x_info->cclk / 66000) / 3;
- target_write_u32(bank->target, F_CTRL, FC_CS | FC_WEN);
- target_write_u32(bank->target, F_CLK_TIME, clk_time);
-}
-
-/* AHB tcyc (in ns) 83 ns
- * LOAD_TIMER_ERASE FPT_TIME = ((400,000,000 / AHB tcyc (in ns)) - 2) / 512
- * = 9412 (9500) (AN10548 9375)
- * LOAD_TIMER_WRITE FPT_TIME = ((1,000,000 / AHB tcyc (in ns)) - 2) / 512
- * = 23 (75) (AN10548 72 - is this wrong?)
- * TODO: Sort out timing calcs ;) */
-static void lpc288x_load_timer(int erase, struct target *target)
-{
- if (erase == LOAD_TIMER_ERASE)
- target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 9500);
- else
- target_write_u32(target, F_PROG_TIME, FPT_ENABLE | 75);
-}
-
-static uint32_t lpc288x_system_ready(struct flash_bank *bank)
-{
- struct lpc288x_flash_bank *lpc288x_info = bank->driver_priv;
- if (lpc288x_info->cidr == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
- return ERROR_OK;
-}
-
-static int lpc288x_erase_check(struct flash_bank *bank)
-{
- uint32_t status = lpc288x_system_ready(bank); /* probed? halted? */
- if (status != ERROR_OK) {
- LOG_INFO("Processor not halted/not probed");
- return status;
- }
-
- return ERROR_OK;
-}
-
-static int lpc288x_erase(struct flash_bank *bank, int first, int last)
-{
- uint32_t status;
- int sector;
- struct target *target = bank->target;
-
- status = lpc288x_system_ready(bank); /* probed? halted? */
- if (status != ERROR_OK)
- return status;
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
- LOG_INFO("Bad sector range");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- /* Configure the flash controller timing */
- lpc288x_set_flash_clk(bank);
-
- for (sector = first; sector <= last; sector++) {
- if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
-
- lpc288x_load_timer(LOAD_TIMER_ERASE, target);
-
- target_write_u32(target, bank->sectors[sector].offset, 0x00);
-
- target_write_u32(target, F_CTRL, FC_PROG_REQ | FC_PROTECT | FC_CS);
- }
- if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
- return ERROR_OK;
-}
-
-static int lpc288x_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- uint8_t page_buffer[FLASH_PAGE_SIZE];
- uint32_t status, source_offset, dest_offset;
- struct target *target = bank->target;
- uint32_t bytes_remaining = count;
- uint32_t first_sector, last_sector, sector, page;
- int i;
-
- /* probed? halted? */
- status = lpc288x_system_ready(bank);
- if (status != ERROR_OK)
- return status;
-
- /* Initialise search indices */
- first_sector = last_sector = 0xffffffff;
-
- /* validate the write range... */
- for (i = 0; i < bank->num_sectors; i++) {
- if ((offset >= bank->sectors[i].offset) &&
- (offset < (bank->sectors[i].offset + bank->sectors[i].size)) &&
- (first_sector == 0xffffffff)) {
- first_sector = i;
- /* all writes must start on a sector boundary... */
- if (offset % bank->sectors[i].size) {
- LOG_INFO(
- "offset 0x%" PRIx32 " breaks required alignment 0x%" PRIx32 "",
- offset,
- bank->sectors[i].size);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
- }
- if (((offset + count) > bank->sectors[i].offset) &&
- ((offset + count) <= (bank->sectors[i].offset + bank->sectors[i].size)) &&
- (last_sector == 0xffffffff))
- last_sector = i;
- }
-
- /* Range check... */
- if (first_sector == 0xffffffff || last_sector == 0xffffffff) {
- LOG_INFO("Range check failed %" PRIx32 " %" PRIx32 "", offset, count);
- return ERROR_FLASH_DST_OUT_OF_BANK;
- }
-
- /* Configure the flash controller timing */
- lpc288x_set_flash_clk(bank);
-
- /* initialise the offsets */
- source_offset = 0;
- dest_offset = 0;
-
- for (sector = first_sector; sector <= last_sector; sector++) {
- for (page = 0; page < bank->sectors[sector].size / FLASH_PAGE_SIZE; page++) {
- if (bytes_remaining == 0) {
- count = 0;
- memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
- } else if (bytes_remaining < FLASH_PAGE_SIZE) {
- count = bytes_remaining;
- memset(page_buffer, 0xFF, FLASH_PAGE_SIZE);
- memcpy(page_buffer, &buffer[source_offset], count);
- } else {
- count = FLASH_PAGE_SIZE;
- memcpy(page_buffer, &buffer[source_offset], count);
- }
-
- /* Wait for flash to become ready */
- if (lpc288x_wait_status_busy(bank, 1000) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* fill flash data latches with 1's */
- target_write_u32(target, F_CTRL, FC_CS | FC_SET_DATA | FC_WEN | FC_FUNC);
-
- target_write_u32(target, F_CTRL, FC_CS | FC_WEN | FC_FUNC);
-
- if (target_write_buffer(target, offset + dest_offset, FLASH_PAGE_SIZE,
- page_buffer) != ERROR_OK) {
- LOG_INFO("Write to flash buffer failed");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- dest_offset += FLASH_PAGE_SIZE;
- source_offset += count;
- bytes_remaining -= count;
-
- lpc288x_load_timer(LOAD_TIMER_WRITE, target);
-
- target_write_u32(target, F_CTRL, FC_PROG_REQ | FC_PROTECT | FC_FUNC |
- FC_CS);
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc288x_probe(struct flash_bank *bank)
-{
- /* we only deal with LPC2888 so flash config is fixed */
- struct lpc288x_flash_bank *lpc288x_info = bank->driver_priv;
- int retval;
-
- if (lpc288x_info->cidr != 0)
- return ERROR_OK;/* already probed */
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = lpc288x_read_part_info(bank);
- if (retval != ERROR_OK)
- return retval;
- return ERROR_OK;
-}
-
-static int lpc288x_protect(struct flash_bank *bank, int set, int first, int last)
-{
- int lockregion, status;
- uint32_t value;
- struct target *target = bank->target;
-
- /* probed? halted? */
- status = lpc288x_system_ready(bank);
- if (status != ERROR_OK)
- return status;
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors))
- return ERROR_FLASH_SECTOR_INVALID;
-
- /* Configure the flash controller timing */
- lpc288x_set_flash_clk(bank);
-
- for (lockregion = first; lockregion <= last; lockregion++) {
- if (set) {
- /* write an odd value to base addy to protect... */
- value = 0x01;
- } else {
- /* write an even value to base addy to unprotect... */
- value = 0x00;
- }
- target_write_u32(target, bank->sectors[lockregion].offset, value);
- target_write_u32(target, F_CTRL, FC_LOAD_REQ | FC_PROTECT | FC_WEN | FC_FUNC |
- FC_CS);
- }
-
- return ERROR_OK;
-}
-
-struct flash_driver lpc288x_flash = {
- .name = "lpc288x",
- .flash_bank_command = lpc288x_flash_bank_command,
- .erase = lpc288x_erase,
- .protect = lpc288x_protect,
- .write = lpc288x_write,
- .read = default_flash_read,
- .probe = lpc288x_probe,
- .auto_probe = lpc288x_probe,
- .erase_check = lpc288x_erase_check,
- .protect_check = lpc288x_protect_check,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc2900.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc2900.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc2900.c
deleted file mode 100755
index 328232e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/lpc2900.c
+++ /dev/null
@@ -1,1603 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by *
- * Rolf Meeser <ro...@yahoo.de> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/arm.h>
-#include <target/image.h>
-
-/* 1024 bytes */
-#define KiB 1024
-
-/* Some flash constants */
-#define FLASH_PAGE_SIZE 512 /* bytes */
-#define FLASH_ERASE_TIME 100000 /* microseconds */
-#define FLASH_PROGRAM_TIME 1000 /* microseconds */
-
-/* Chip ID / Feature Registers */
-#define CHIPID 0xE0000000 /* Chip ID */
-#define FEAT0 0xE0000100 /* Chip feature 0 */
-#define FEAT1 0xE0000104 /* Chip feature 1 */
-#define FEAT2 0xE0000108 /* Chip feature 2 (contains flash size indicator) */
-#define FEAT3 0xE000010C /* Chip feature 3 */
-
-#define EXPECTED_CHIPID 0x209CE02B /* Chip ID of all LPC2900 devices */
-
-/* Flash/EEPROM Control Registers */
-#define FCTR 0x20200000 /* Flash control */
-#define FPTR 0x20200008 /* Flash program-time */
-#define FTCTR 0x2020000C /* Flash test control */
-#define FBWST 0x20200010 /* Flash bridge wait-state */
-#define FCRA 0x2020001C /* Flash clock divider */
-#define FMSSTART 0x20200020 /* Flash Built-In Selft Test start address */
-#define FMSSTOP 0x20200024 /* Flash Built-In Selft Test stop address */
-#define FMS16 0x20200028 /* Flash 16-bit signature */
-#define FMSW0 0x2020002C /* Flash 128-bit signature Word 0 */
-#define FMSW1 0x20200030 /* Flash 128-bit signature Word 1 */
-#define FMSW2 0x20200034 /* Flash 128-bit signature Word 2 */
-#define FMSW3 0x20200038 /* Flash 128-bit signature Word 3 */
-
-#define EECMD 0x20200080 /* EEPROM command */
-#define EEADDR 0x20200084 /* EEPROM address */
-#define EEWDATA 0x20200088 /* EEPROM write data */
-#define EERDATA 0x2020008C /* EEPROM read data */
-#define EEWSTATE 0x20200090 /* EEPROM wait state */
-#define EECLKDIV 0x20200094 /* EEPROM clock divider */
-#define EEPWRDWN 0x20200098 /* EEPROM power-down/start */
-#define EEMSSTART 0x2020009C /* EEPROM BIST start address */
-#define EEMSSTOP 0x202000A0 /* EEPROM BIST stop address */
-#define EEMSSIG 0x202000A4 /* EEPROM 24-bit BIST signature */
-
-#define INT_CLR_ENABLE 0x20200FD8 /* Flash/EEPROM interrupt clear enable */
-#define INT_SET_ENABLE 0x20200FDC /* Flash/EEPROM interrupt set enable */
-#define INT_STATUS 0x20200FE0 /* Flash/EEPROM interrupt status */
-#define INT_ENABLE 0x20200FE4 /* Flash/EEPROM interrupt enable */
-#define INT_CLR_STATUS 0x20200FE8 /* Flash/EEPROM interrupt clear status */
-#define INT_SET_STATUS 0x20200FEC /* Flash/EEPROM interrupt set status */
-
-/* Interrupt sources */
-#define INTSRC_END_OF_PROG (1 << 28)
-#define INTSRC_END_OF_BIST (1 << 27)
-#define INTSRC_END_OF_RDWR (1 << 26)
-#define INTSRC_END_OF_MISR (1 << 2)
-#define INTSRC_END_OF_BURN (1 << 1)
-#define INTSRC_END_OF_ERASE (1 << 0)
-
-/* FCTR bits */
-#define FCTR_FS_LOADREQ (1 << 15)
-#define FCTR_FS_CACHECLR (1 << 14)
-#define FCTR_FS_CACHEBYP (1 << 13)
-#define FCTR_FS_PROGREQ (1 << 12)
-#define FCTR_FS_RLS (1 << 11)
-#define FCTR_FS_PDL (1 << 10)
-#define FCTR_FS_PD (1 << 9)
-#define FCTR_FS_WPB (1 << 7)
-#define FCTR_FS_ISS (1 << 6)
-#define FCTR_FS_RLD (1 << 5)
-#define FCTR_FS_DCR (1 << 4)
-#define FCTR_FS_WEB (1 << 2)
-#define FCTR_FS_WRE (1 << 1)
-#define FCTR_FS_CS (1 << 0)
-/* FPTR bits */
-#define FPTR_EN_T (1 << 15)
-/* FTCTR bits */
-#define FTCTR_FS_BYPASS_R (1 << 29)
-#define FTCTR_FS_BYPASS_W (1 << 28)
-/* FMSSTOP bits */
-#define FMSSTOP_MISR_START (1 << 17)
-/* EEMSSTOP bits */
-#define EEMSSTOP_STRTBIST (1 << 31)
-
-/* Index sector */
-#define ISS_CUSTOMER_START1 (0x830)
-#define ISS_CUSTOMER_END1 (0xA00)
-#define ISS_CUSTOMER_SIZE1 (ISS_CUSTOMER_END1 - ISS_CUSTOMER_START1)
-#define ISS_CUSTOMER_NWORDS1 (ISS_CUSTOMER_SIZE1 / 4)
-#define ISS_CUSTOMER_START2 (0xA40)
-#define ISS_CUSTOMER_END2 (0xC00)
-#define ISS_CUSTOMER_SIZE2 (ISS_CUSTOMER_END2 - ISS_CUSTOMER_START2)
-#define ISS_CUSTOMER_NWORDS2 (ISS_CUSTOMER_SIZE2 / 4)
-#define ISS_CUSTOMER_SIZE (ISS_CUSTOMER_SIZE1 + ISS_CUSTOMER_SIZE2)
-
-/**
- * Private data for \c lpc2900 flash driver.
- */
-struct lpc2900_flash_bank {
- /**
- * This flag is set when the device has been successfully probed.
- */
- bool is_probed;
-
- /**
- * Holds the value read from CHIPID register.
- * The driver will not load if the chipid doesn't match the expected
- * value of 0x209CE02B of the LPC2900 family. A probe will only be done
- * if the chipid does not yet contain the expected value.
- */
- uint32_t chipid;
-
- /**
- * String holding device name.
- * This string is set by the probe function to the type number of the
- * device. It takes the form "LPC29xx".
- */
- char *target_name;
-
- /**
- * System clock frequency.
- * Holds the clock frequency in Hz, as passed by the configuration file
- * to the <tt>flash bank</tt> command.
- */
- uint32_t clk_sys_fmc;
-
- /**
- * Flag to indicate that dangerous operations are possible.
- * This flag can be set by passing the correct password to the
- * <tt>lpc2900 password</tt> command. If set, other dangerous commands,
- * which operate on the index sector, can be executed.
- */
- uint32_t risky;
-
- /**
- * Maximum contiguous block of internal SRAM (bytes).
- * Autodetected by the driver. Not the total amount of SRAM, only the
- * the largest \em contiguous block!
- */
- uint32_t max_ram_block;
-
-};
-
-static uint32_t lpc2900_wait_status(struct flash_bank *bank, uint32_t mask, int timeout);
-static void lpc2900_setup(struct flash_bank *bank);
-static uint32_t lpc2900_is_ready(struct flash_bank *bank);
-static uint32_t lpc2900_read_security_status(struct flash_bank *bank);
-static uint32_t lpc2900_run_bist128(struct flash_bank *bank,
- uint32_t addr_from, uint32_t addr_to,
- uint32_t signature[4]);
-static uint32_t lpc2900_address2sector(struct flash_bank *bank, uint32_t offset);
-static uint32_t lpc2900_calc_tr(uint32_t clock_var, uint32_t time_var);
-
-/*********************** Helper functions **************************/
-
-/**
- * Wait for an event in mask to occur in INT_STATUS.
- *
- * Return when an event occurs, or after a timeout.
- *
- * @param[in] bank Pointer to the flash bank descriptor
- * @param[in] mask Mask to be used for INT_STATUS
- * @param[in] timeout Timeout in ms
- */
-static uint32_t lpc2900_wait_status(struct flash_bank *bank,
- uint32_t mask,
- int timeout)
-{
- uint32_t int_status;
- struct target *target = bank->target;
-
- do {
- alive_sleep(1);
- timeout--;
- target_read_u32(target, INT_STATUS, &int_status);
- } while (((int_status & mask) == 0) && (timeout != 0));
-
- if (timeout == 0) {
- LOG_DEBUG("Timeout!");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-/**
- * Set up the flash for erase/program operations.
- *
- * Enable the flash, and set the correct CRA clock of 66 kHz.
- *
- * @param bank Pointer to the flash bank descriptor
- */
-static void lpc2900_setup(struct flash_bank *bank)
-{
- uint32_t fcra;
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
-
- /* Power up the flash block */
- target_write_u32(bank->target, FCTR, FCTR_FS_WEB | FCTR_FS_CS);
-
- fcra = (lpc2900_info->clk_sys_fmc / (3 * 66000)) - 1;
- target_write_u32(bank->target, FCRA, fcra);
-}
-
-/**
- * Check if device is ready.
- *
- * Check if device is ready for flash operation:
- * Must have been successfully probed.
- * Must be halted.
- */
-static uint32_t lpc2900_is_ready(struct flash_bank *bank)
-{
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
-
- if (!lpc2900_info->is_probed)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- return ERROR_OK;
-}
-
-/**
- * Read the status of sector security from the index sector.
- *
- * @param bank Pointer to the flash bank descriptor
- */
-static uint32_t lpc2900_read_security_status(struct flash_bank *bank)
-{
- uint32_t status = lpc2900_is_ready(bank);
- if (status != ERROR_OK)
- return status;
-
- struct target *target = bank->target;
-
- /* Enable ISS access */
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);
-
- /* Read the relevant block of memory from the ISS sector */
- uint32_t iss_secured_field[0x230/16][4];
- target_read_memory(target, bank->base + 0xC00, 4, 0x230/4,
- (uint8_t *)iss_secured_field);
-
- /* Disable ISS access */
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- /* Check status of each sector. Note that the sector numbering in the LPC2900
- * is different from the logical sector numbers used in OpenOCD!
- * Refer to the user manual for details.
- *
- * All zeros (16x 0x00) are treated as a secured sector (is_protected = 1)
- * All ones (16x 0xFF) are treated as a non-secured sector (is_protected = 0)
- * Anything else is undefined (is_protected = -1). This is treated as
- * a protected sector!
- */
- int sector;
- int index_t;
- for (sector = 0; sector < bank->num_sectors; sector++) {
- /* Convert logical sector number to physical sector number */
- if (sector <= 4)
- index_t = sector + 11;
- else if (sector <= 7)
- index_t = sector + 27;
- else
- index_t = sector - 8;
-
- bank->sectors[sector].is_protected = -1;
-
- if ((iss_secured_field[index_t][0] == 0x00000000) &&
- (iss_secured_field[index_t][1] == 0x00000000) &&
- (iss_secured_field[index_t][2] == 0x00000000) &&
- (iss_secured_field[index_t][3] == 0x00000000))
- bank->sectors[sector].is_protected = 1;
-
- if ((iss_secured_field[index_t][0] == 0xFFFFFFFF) &&
- (iss_secured_field[index_t][1] == 0xFFFFFFFF) &&
- (iss_secured_field[index_t][2] == 0xFFFFFFFF) &&
- (iss_secured_field[index_t][3] == 0xFFFFFFFF))
- bank->sectors[sector].is_protected = 0;
- }
-
- return ERROR_OK;
-}
-
-/**
- * Use BIST to calculate a 128-bit hash value over a range of flash.
- *
- * @param bank Pointer to the flash bank descriptor
- * @param addr_from
- * @param addr_to
- * @param signature
- */
-static uint32_t lpc2900_run_bist128(struct flash_bank *bank,
- uint32_t addr_from,
- uint32_t addr_to,
- uint32_t signature[4])
-{
- struct target *target = bank->target;
-
- /* Clear END_OF_MISR interrupt status */
- target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_MISR);
-
- /* Start address */
- target_write_u32(target, FMSSTART, addr_from >> 4);
- /* End address, and issue start command */
- target_write_u32(target, FMSSTOP, (addr_to >> 4) | FMSSTOP_MISR_START);
-
- /* Poll for end of operation. Calculate a reasonable timeout. */
- if (lpc2900_wait_status(bank, INTSRC_END_OF_MISR, 1000) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* Return the signature */
- uint8_t sig_buf[4 * 4];
- target_read_memory(target, FMSW0, 4, 4, sig_buf);
- target_buffer_get_u32_array(target, sig_buf, 4, signature);
-
- return ERROR_OK;
-}
-
-/**
- * Return sector number for given address.
- *
- * Return the (logical) sector number for a given relative address.
- * No sanity check is done. It assumed that the address is valid.
- *
- * @param bank Pointer to the flash bank descriptor
- * @param offset Offset address relative to bank start
- */
-static uint32_t lpc2900_address2sector(struct flash_bank *bank,
- uint32_t offset)
-{
- uint32_t address = bank->base + offset;
-
- /* Run through all sectors of this bank */
- int sector;
- for (sector = 0; sector < bank->num_sectors; sector++) {
- /* Return immediately if address is within the current sector */
- if (address < (bank->sectors[sector].offset + bank->sectors[sector].size))
- return sector;
- }
-
- /* We should never come here. If we do, return an arbitrary sector number. */
- return 0;
-}
-
-/**
- * Write one page to the index sector.
- *
- * @param bank Pointer to the flash bank descriptor
- * @param pagenum Page number (0...7)
- * @param page Page array (FLASH_PAGE_SIZE bytes)
- */
-static int lpc2900_write_index_page(struct flash_bank *bank,
- int pagenum,
- uint8_t page[FLASH_PAGE_SIZE])
-{
- /* Only pages 4...7 are user writable */
- if ((pagenum < 4) || (pagenum > 7)) {
- LOG_ERROR("Refuse to burn index sector page %d", pagenum);
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
-
- /* Get target, and check if it's halted */
- struct target *target = bank->target;
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Private info */
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
-
- /* Enable flash block and set the correct CRA clock of 66 kHz */
- lpc2900_setup(bank);
-
- /* Un-protect the index sector */
- target_write_u32(target, bank->base, 0);
- target_write_u32(target, FCTR,
- FCTR_FS_LOADREQ | FCTR_FS_WPB | FCTR_FS_ISS |
- FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
-
- /* Set latch load mode */
- target_write_u32(target, FCTR,
- FCTR_FS_ISS | FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
-
- /* Write whole page to flash data latches */
- if (target_write_memory(target,
- bank->base + pagenum * FLASH_PAGE_SIZE,
- 4, FLASH_PAGE_SIZE / 4, page) != ERROR_OK) {
- LOG_ERROR("Index sector write failed @ page %d", pagenum);
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Clear END_OF_BURN interrupt status */
- target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_BURN);
-
- /* Set the program/erase time to FLASH_PROGRAM_TIME */
- target_write_u32(target, FPTR,
- FPTR_EN_T | lpc2900_calc_tr(lpc2900_info->clk_sys_fmc,
- FLASH_PROGRAM_TIME));
-
- /* Trigger flash write */
- target_write_u32(target, FCTR,
- FCTR_FS_PROGREQ | FCTR_FS_ISS |
- FCTR_FS_WPB | FCTR_FS_WRE | FCTR_FS_CS);
-
- /* Wait for the end of the write operation. If it's not over after one
- * second, something went dreadfully wrong... :-(
- */
- if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK) {
- LOG_ERROR("Index sector write failed @ page %d", pagenum);
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- return ERROR_OK;
-}
-
-/**
- * Calculate FPTR.TR register value for desired program/erase time.
- *
- * @param clock System clock in Hz
- * @param time Program/erase time in �s
- */
-static uint32_t lpc2900_calc_tr(uint32_t clock_var, uint32_t time_var)
-{
- /* ((time[�s]/1e6) * f[Hz]) + 511
- * FPTR.TR = -------------------------------
- * 512
- */
-
- uint32_t tr_val = (uint32_t)((((time_var / 1e6) * clock_var) + 511.0) / 512.0);
-
- return tr_val;
-}
-
-/*********************** Private flash commands **************************/
-
-
-/**
- * Command to determine the signature of the whole flash.
- *
- * Uses the Built-In-Self-Test (BIST) to generate a 128-bit hash value
- * of the flash content.
- */
-COMMAND_HANDLER(lpc2900_handle_signature_command)
-{
- uint32_t status;
- uint32_t signature[4];
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Run BIST over whole flash range */
- status = lpc2900_run_bist128(bank, bank->base, bank->base + (bank->size - 1), signature);
- if (status != ERROR_OK)
- return status;
-
- command_print(CMD_CTX, "signature: 0x%8.8" PRIx32
- ":0x%8.8" PRIx32
- ":0x%8.8" PRIx32
- ":0x%8.8" PRIx32,
- signature[3], signature[2], signature[1], signature[0]);
-
- return ERROR_OK;
-}
-
-/**
- * Store customer info in file.
- *
- * Read customer info from index sector, and store that block of data into
- * a disk file. The format is binary.
- */
-COMMAND_HANDLER(lpc2900_handle_read_custom_command)
-{
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
- lpc2900_info->risky = 0;
-
- /* Get target, and check if it's halted */
- struct target *target = bank->target;
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Storage for customer info. Read in two parts */
- uint8_t customer[4 * (ISS_CUSTOMER_NWORDS1 + ISS_CUSTOMER_NWORDS2)];
-
- /* Enable access to index sector */
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB | FCTR_FS_ISS);
-
- /* Read two parts */
- target_read_memory(target, bank->base+ISS_CUSTOMER_START1, 4,
- ISS_CUSTOMER_NWORDS1,
- &customer[0]);
- target_read_memory(target, bank->base+ISS_CUSTOMER_START2, 4,
- ISS_CUSTOMER_NWORDS2,
- &customer[4 * ISS_CUSTOMER_NWORDS1]);
-
- /* Deactivate access to index sector */
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- /* Try and open the file */
- struct fileio *fileio;
- const char *filename = CMD_ARGV[1];
- int ret = fileio_open(&fileio, filename, FILEIO_WRITE, FILEIO_BINARY);
- if (ret != ERROR_OK) {
- LOG_WARNING("Could not open file %s", filename);
- return ret;
- }
-
- size_t nwritten;
- ret = fileio_write(fileio, sizeof(customer), customer, &nwritten);
- if (ret != ERROR_OK) {
- LOG_ERROR("Write operation to file %s failed", filename);
- fileio_close(fileio);
- return ret;
- }
-
- fileio_close(fileio);
-
- return ERROR_OK;
-}
-
-/**
- * Enter password to enable potentially dangerous options.
- */
-COMMAND_HANDLER(lpc2900_handle_password_command)
-{
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
-
-#define ISS_PASSWORD "I_know_what_I_am_doing"
-
- lpc2900_info->risky = !strcmp(CMD_ARGV[1], ISS_PASSWORD);
-
- if (!lpc2900_info->risky) {
- command_print(CMD_CTX, "Wrong password (use '%s')", ISS_PASSWORD);
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
-
- command_print(CMD_CTX,
- "Potentially dangerous operation allowed in next command!");
-
- return ERROR_OK;
-}
-
-/**
- * Write customer info from file to the index sector.
- */
-COMMAND_HANDLER(lpc2900_handle_write_custom_command)
-{
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
-
- /* Check if command execution is allowed. */
- if (!lpc2900_info->risky) {
- command_print(CMD_CTX, "Command execution not allowed!");
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
- lpc2900_info->risky = 0;
-
- /* Get target, and check if it's halted */
- struct target *target = bank->target;
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* The image will always start at offset 0 */
- struct image image;
- image.base_address_set = 1;
- image.base_address = 0;
- image.start_address_set = 0;
-
- const char *filename = CMD_ARGV[1];
- const char *type = (CMD_ARGC >= 3) ? CMD_ARGV[2] : NULL;
- retval = image_open(&image, filename, type);
- if (retval != ERROR_OK)
- return retval;
-
- /* Do a sanity check: The image must be exactly the size of the customer
- programmable area. Any other size is rejected. */
- if (image.num_sections != 1) {
- LOG_ERROR("Only one section allowed in image file.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- if ((image.sections[0].base_address != 0) ||
- (image.sections[0].size != ISS_CUSTOMER_SIZE)) {
- LOG_ERROR("Incorrect image file size. Expected %d, "
- "got %" PRIu32,
- ISS_CUSTOMER_SIZE, image.sections[0].size);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- /* Well boys, I reckon this is it... */
-
- /* Customer info is split into two blocks in pages 4 and 5. */
- uint8_t page[FLASH_PAGE_SIZE];
-
- /* Page 4 */
- uint32_t offset = ISS_CUSTOMER_START1 % FLASH_PAGE_SIZE;
- memset(page, 0xff, FLASH_PAGE_SIZE);
- size_t size_read;
- retval = image_read_section(&image, 0, 0,
- ISS_CUSTOMER_SIZE1, &page[offset], &size_read);
- if (retval != ERROR_OK) {
- LOG_ERROR("couldn't read from file '%s'", filename);
- image_close(&image);
- return retval;
- }
- retval = lpc2900_write_index_page(bank, 4, page);
- if (retval != ERROR_OK) {
- image_close(&image);
- return retval;
- }
-
- /* Page 5 */
- offset = ISS_CUSTOMER_START2 % FLASH_PAGE_SIZE;
- memset(page, 0xff, FLASH_PAGE_SIZE);
- retval = image_read_section(&image, 0, ISS_CUSTOMER_SIZE1,
- ISS_CUSTOMER_SIZE2, &page[offset], &size_read);
- if (retval != ERROR_OK) {
- LOG_ERROR("couldn't read from file '%s'", filename);
- image_close(&image);
- return retval;
- }
- retval = lpc2900_write_index_page(bank, 5, page);
- if (retval != ERROR_OK) {
- image_close(&image);
- return retval;
- }
-
- image_close(&image);
-
- return ERROR_OK;
-}
-
-/**
- * Activate 'sector security' for a range of sectors.
- */
-COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
-{
- if (CMD_ARGC < 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* Get the bank descriptor */
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
-
- /* Check if command execution is allowed. */
- if (!lpc2900_info->risky) {
- command_print(CMD_CTX, "Command execution not allowed! "
- "(use 'password' command first)");
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
- lpc2900_info->risky = 0;
-
- /* Read sector range, and do a sanity check. */
- int first, last;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
- if ((first >= bank->num_sectors) ||
- (last >= bank->num_sectors) ||
- (first > last)) {
- command_print(CMD_CTX, "Illegal sector range");
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
-
- uint8_t page[FLASH_PAGE_SIZE];
- int sector;
-
- /* Sectors in page 6 */
- if ((first <= 4) || (last >= 8)) {
- memset(&page, 0xff, FLASH_PAGE_SIZE);
- for (sector = first; sector <= last; sector++) {
- if (sector <= 4)
- memset(&page[0xB0 + 16*sector], 0, 16);
- else if (sector >= 8)
- memset(&page[0x00 + 16*(sector - 8)], 0, 16);
- }
-
- retval = lpc2900_write_index_page(bank, 6, page);
- if (retval != ERROR_OK) {
- LOG_ERROR("failed to update index sector page 6");
- return retval;
- }
- }
-
- /* Sectors in page 7 */
- if ((first <= 7) && (last >= 5)) {
- memset(&page, 0xff, FLASH_PAGE_SIZE);
- for (sector = first; sector <= last; sector++) {
- if ((sector >= 5) && (sector <= 7))
- memset(&page[0x00 + 16*(sector - 5)], 0, 16);
- }
-
- retval = lpc2900_write_index_page(bank, 7, page);
- if (retval != ERROR_OK) {
- LOG_ERROR("failed to update index sector page 7");
- return retval;
- }
- }
-
- command_print(CMD_CTX,
- "Sectors security will become effective after next power cycle");
-
- /* Update the sector security status */
- if (lpc2900_read_security_status(bank) != ERROR_OK) {
- LOG_ERROR("Cannot determine sector security status");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-/**
- * Activate JTAG protection.
- */
-COMMAND_HANDLER(lpc2900_handle_secure_jtag_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* Get the bank descriptor */
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
-
- /* Check if command execution is allowed. */
- if (!lpc2900_info->risky) {
- command_print(CMD_CTX, "Command execution not allowed! "
- "(use 'password' command first)");
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
- lpc2900_info->risky = 0;
-
- /* Prepare page */
- uint8_t page[FLASH_PAGE_SIZE];
- memset(&page, 0xff, FLASH_PAGE_SIZE);
-
-
- /* Insert "soft" protection word */
- page[0x30 + 15] = 0x7F;
- page[0x30 + 11] = 0x7F;
- page[0x30 + 7] = 0x7F;
- page[0x30 + 3] = 0x7F;
-
- /* Write to page 5 */
- retval = lpc2900_write_index_page(bank, 5, page);
- if (retval != ERROR_OK) {
- LOG_ERROR("failed to update index sector page 5");
- return retval;
- }
-
- LOG_INFO("JTAG security set. Good bye!");
-
- return ERROR_OK;
-}
-
-/*********************** Flash interface functions **************************/
-
-static const struct command_registration lpc2900_exec_command_handlers[] = {
- {
- .name = "signature",
- .usage = "<bank>",
- .handler = lpc2900_handle_signature_command,
- .mode = COMMAND_EXEC,
- .help = "Calculate and display signature of flash bank.",
- },
- {
- .name = "read_custom",
- .handler = lpc2900_handle_read_custom_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id filename",
- .help = "Copies 912 bytes of customer information "
- "from index sector into file.",
- },
- {
- .name = "password",
- .handler = lpc2900_handle_password_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id password",
- .help = "Enter fixed password to enable 'dangerous' options.",
- },
- {
- .name = "write_custom",
- .handler = lpc2900_handle_write_custom_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id filename ('bin'|'ihex'|'elf'|'s19')",
- .help = "Copies 912 bytes of customer info from file "
- "to index sector.",
- },
- {
- .name = "secure_sector",
- .handler = lpc2900_handle_secure_sector_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id first_sector last_sector",
- .help = "Activate sector security for a range of sectors. "
- "It will be effective after a power cycle.",
- },
- {
- .name = "secure_jtag",
- .handler = lpc2900_handle_secure_jtag_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Disable the JTAG port. "
- "It will be effective after a power cycle.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration lpc2900_command_handlers[] = {
- {
- .name = "lpc2900",
- .mode = COMMAND_ANY,
- .help = "LPC2900 flash command group",
- .usage = "",
- .chain = lpc2900_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-/** Evaluate flash bank command. */
-FLASH_BANK_COMMAND_HANDLER(lpc2900_flash_bank_command)
-{
- struct lpc2900_flash_bank *lpc2900_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- lpc2900_info = malloc(sizeof(struct lpc2900_flash_bank));
- bank->driver_priv = lpc2900_info;
-
- /* Get flash clock.
- * Reject it if we can't meet the requirements for program time
- * (if clock too slow), or for erase time (clock too fast).
- */
- uint32_t clk_sys_fmc;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[6], clk_sys_fmc);
- lpc2900_info->clk_sys_fmc = clk_sys_fmc * 1000;
-
- uint32_t clock_limit;
- /* Check program time limit */
- clock_limit = 512000000l / FLASH_PROGRAM_TIME;
- if (lpc2900_info->clk_sys_fmc < clock_limit) {
- LOG_WARNING("flash clock must be at least %" PRIu32 " kHz",
- (clock_limit / 1000));
- return ERROR_FLASH_BANK_INVALID;
- }
-
- /* Check erase time limit */
- clock_limit = (uint32_t)((32767.0 * 512.0 * 1e6) / FLASH_ERASE_TIME);
- if (lpc2900_info->clk_sys_fmc > clock_limit) {
- LOG_WARNING("flash clock must be a maximum of %" PRIu32 " kHz",
- (clock_limit / 1000));
- return ERROR_FLASH_BANK_INVALID;
- }
-
- /* Chip ID will be obtained by probing the device later */
- lpc2900_info->chipid = 0;
- lpc2900_info->is_probed = false;
-
- return ERROR_OK;
-}
-
-/**
- * Erase sector(s).
- *
- * @param bank Pointer to the flash bank descriptor
- * @param first First sector to be erased
- * @param last Last sector (including) to be erased
- */
-static int lpc2900_erase(struct flash_bank *bank, int first, int last)
-{
- uint32_t status;
- int sector;
- int last_unsecured_sector;
- struct target *target = bank->target;
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
-
-
- status = lpc2900_is_ready(bank);
- if (status != ERROR_OK)
- return status;
-
- /* Sanity check on sector range */
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
- LOG_INFO("Bad sector range");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- /* Update the info about secured sectors */
- lpc2900_read_security_status(bank);
-
- /* The selected sector range might include secured sectors. An attempt
- * to erase such a sector will cause the erase to fail also for unsecured
- * sectors. It is necessary to determine the last unsecured sector now,
- * because we have to treat the last relevant sector in the list in
- * a special way.
- */
- last_unsecured_sector = -1;
- for (sector = first; sector <= last; sector++) {
- if (!bank->sectors[sector].is_protected)
- last_unsecured_sector = sector;
- }
-
- /* Exit now, in case of the rare constellation where all sectors in range
- * are secured. This is regarded a success, since erasing/programming of
- * secured sectors shall be handled transparently.
- */
- if (last_unsecured_sector == -1)
- return ERROR_OK;
-
- /* Enable flash block and set the correct CRA clock of 66 kHz */
- lpc2900_setup(bank);
-
- /* Clear END_OF_ERASE interrupt status */
- target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_ERASE);
-
- /* Set the program/erase timer to FLASH_ERASE_TIME */
- target_write_u32(target, FPTR,
- FPTR_EN_T | lpc2900_calc_tr(lpc2900_info->clk_sys_fmc,
- FLASH_ERASE_TIME));
-
- /* Sectors are marked for erasure, then erased all together */
- for (sector = first; sector <= last_unsecured_sector; sector++) {
- /* Only mark sectors that aren't secured. Any attempt to erase a group
- * of sectors will fail if any single one of them is secured!
- */
- if (!bank->sectors[sector].is_protected) {
- /* Unprotect the sector */
- target_write_u32(target, bank->sectors[sector].offset, 0);
- target_write_u32(target, FCTR,
- FCTR_FS_LOADREQ | FCTR_FS_WPB |
- FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
-
- /* Mark the sector for erasure. The last sector in the list
- triggers the erasure. */
- target_write_u32(target, bank->sectors[sector].offset, 0);
- if (sector == last_unsecured_sector) {
- target_write_u32(target, FCTR,
- FCTR_FS_PROGREQ | FCTR_FS_WPB | FCTR_FS_CS);
- } else {
- target_write_u32(target, FCTR,
- FCTR_FS_LOADREQ | FCTR_FS_WPB |
- FCTR_FS_WEB | FCTR_FS_CS);
- }
- }
- }
-
- /* Wait for the end of the erase operation. If it's not over after two seconds,
- * something went dreadfully wrong... :-(
- */
- if (lpc2900_wait_status(bank, INTSRC_END_OF_ERASE, 2000) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* Normal flash operating mode */
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- return ERROR_OK;
-}
-
-static int lpc2900_protect(struct flash_bank *bank, int set, int first, int last)
-{
- /* This command is not supported.
- * "Protection" in LPC2900 terms is handled transparently. Sectors will
- * automatically be unprotected as needed.
- * Instead we use the concept of sector security. A secured sector is shown
- * as "protected" in OpenOCD. Sector security is a permanent feature, and
- * cannot be disabled once activated.
- */
-
- return ERROR_OK;
-}
-
-/**
- * Write data to flash.
- *
- * @param bank Pointer to the flash bank descriptor
- * @param buffer Buffer with data
- * @param offset Start address (relative to bank start)
- * @param count Number of bytes to be programmed
- */
-static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- uint8_t page[FLASH_PAGE_SIZE];
- uint32_t status;
- uint32_t num_bytes;
- struct target *target = bank->target;
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
- int sector;
- int retval;
-
- static const uint32_t write_target_code[] = {
- /* Set auto latch mode: FCTR=CS|WRE|WEB */
- 0xe3a0a007, /* loop mov r10, #0x007 */
- 0xe583a000, /* str r10,[r3,#0] */
-
- /* Load complete page into latches */
- 0xe3a06020, /* mov r6,#(512/16) */
- 0xe8b00f00, /* next ldmia r0!,{r8-r11} */
- 0xe8a10f00, /* stmia r1!,{r8-r11} */
- 0xe2566001, /* subs r6,#1 */
- 0x1afffffb, /* bne next */
-
- /* Clear END_OF_BURN interrupt status */
- 0xe3a0a002, /* mov r10,#(1 << 1) */
- 0xe583afe8, /* str r10,[r3,#0xfe8] */
-
- /* Set the erase time to FLASH_PROGRAM_TIME */
- 0xe5834008, /* str r4,[r3,#8] */
-
- /* Trigger flash write
- * FCTR = CS | WRE | WPB | PROGREQ */
- 0xe3a0a083, /* mov r10,#0x83 */
- 0xe38aaa01, /* orr r10,#0x1000 */
- 0xe583a000, /* str r10,[r3,#0] */
-
- /* Wait for end of burn */
- 0xe593afe0, /* wait ldr r10,[r3,#0xfe0] */
- 0xe21aa002, /* ands r10,#(1 << 1) */
- 0x0afffffc, /* beq wait */
-
- /* End? */
- 0xe2522001, /* subs r2,#1 */
- 0x1affffed, /* bne loop */
-
- 0xeafffffe /* done b done */
- };
-
-
- status = lpc2900_is_ready(bank);
- if (status != ERROR_OK)
- return status;
-
- /* Enable flash block and set the correct CRA clock of 66 kHz */
- lpc2900_setup(bank);
-
- /* Update the info about secured sectors */
- lpc2900_read_security_status(bank);
-
- /* Unprotect all involved sectors */
- for (sector = 0; sector < bank->num_sectors; sector++) {
- /* Start address in or before this sector?
- * End address in or behind this sector? */
- if (((bank->base + offset) <
- (bank->sectors[sector].offset + bank->sectors[sector].size)) &&
- ((bank->base + (offset + count - 1)) >= bank->sectors[sector].offset)) {
- /* This sector is involved and needs to be unprotected.
- * Don't do it for secured sectors.
- */
- if (!bank->sectors[sector].is_protected) {
- target_write_u32(target, bank->sectors[sector].offset, 0);
- target_write_u32(target, FCTR,
- FCTR_FS_LOADREQ | FCTR_FS_WPB |
- FCTR_FS_WEB | FCTR_FS_WRE | FCTR_FS_CS);
- }
- }
- }
-
- /* Set the program/erase time to FLASH_PROGRAM_TIME */
- uint32_t prog_time = FPTR_EN_T | lpc2900_calc_tr(lpc2900_info->clk_sys_fmc, FLASH_PROGRAM_TIME);
-
- /* If there is a working area of reasonable size, use it to program via
- * a target algorithm. If not, fall back to host programming. */
-
- /* We need some room for target code. */
- const uint32_t target_code_size = sizeof(write_target_code);
-
- /* Try working area allocation. Start with a large buffer, and try with
- * reduced size if that fails. */
- struct working_area *warea;
- uint32_t buffer_size = lpc2900_info->max_ram_block - 1 * KiB;
- while ((retval = target_alloc_working_area_try(target,
- buffer_size + target_code_size,
- &warea)) != ERROR_OK) {
- /* Try a smaller buffer now, and stop if it's too small. */
- buffer_size -= 1 * KiB;
- if (buffer_size < 2 * KiB) {
- LOG_INFO("no (large enough) working area, falling back to host mode");
- warea = NULL;
- break;
- }
- }
-
- if (warea) {
- struct reg_param reg_params[5];
- struct arm_algorithm arm_algo;
-
- /* We can use target mode. Download the algorithm. */
- uint8_t code[sizeof(write_target_code)];
- target_buffer_set_u32_array(target, code, ARRAY_SIZE(write_target_code),
- write_target_code);
- retval = target_write_buffer(target, (warea->address) + buffer_size, sizeof(code), code);
- if (retval != ERROR_OK) {
- LOG_ERROR("Unable to write block write code to target");
- target_free_all_working_areas(target);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
-
- /* Write to flash in large blocks */
- while (count != 0) {
- uint32_t this_npages;
- const uint8_t *this_buffer;
- int start_sector = lpc2900_address2sector(bank, offset);
-
- /* First page / last page / rest */
- if (offset % FLASH_PAGE_SIZE) {
- /* Block doesn't start on page boundary.
- * Burn first partial page separately. */
- memset(&page, 0xff, sizeof(page));
- memcpy(&page[offset % FLASH_PAGE_SIZE],
- buffer,
- FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE));
- this_npages = 1;
- this_buffer = &page[0];
- count = count + (offset % FLASH_PAGE_SIZE);
- offset = offset - (offset % FLASH_PAGE_SIZE);
- } else if (count < FLASH_PAGE_SIZE) {
- /* Download last incomplete page separately. */
- memset(&page, 0xff, sizeof(page));
- memcpy(&page, buffer, count);
- this_npages = 1;
- this_buffer = &page[0];
- count = FLASH_PAGE_SIZE;
- } else {
- /* Download as many full pages as possible */
- this_npages = (count < buffer_size) ?
- count / FLASH_PAGE_SIZE :
- buffer_size / FLASH_PAGE_SIZE;
- this_buffer = buffer;
-
- /* Make sure we stop at the next secured sector */
- sector = start_sector + 1;
- while (sector < bank->num_sectors) {
- /* Secured? */
- if (bank->sectors[sector].is_protected) {
- /* Is that next sector within the current block? */
- if ((bank->sectors[sector].offset - bank->base) <
- (offset + (this_npages * FLASH_PAGE_SIZE))) {
- /* Yes! Split the block */
- this_npages =
- (bank->sectors[sector].offset -
- bank->base - offset)
- / FLASH_PAGE_SIZE;
- break;
- }
- }
-
- sector++;
- }
- }
-
- /* Skip the current sector if it is secured */
- if (bank->sectors[start_sector].is_protected) {
- LOG_DEBUG("Skip secured sector %d",
- start_sector);
-
- /* Stop if this is the last sector */
- if (start_sector == bank->num_sectors - 1)
- break;
-
- /* Skip */
- uint32_t nskip = bank->sectors[start_sector].size -
- (offset % bank->sectors[start_sector].size);
- offset += nskip;
- buffer += nskip;
- count = (count >= nskip) ? (count - nskip) : 0;
- continue;
- }
-
- /* Execute buffer download */
- retval = target_write_buffer(target, warea->address,
- this_npages * FLASH_PAGE_SIZE, this_buffer);
- if (retval != ERROR_OK) {
- LOG_ERROR("Unable to write data to target");
- target_free_all_working_areas(target);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Prepare registers */
- buf_set_u32(reg_params[0].value, 0, 32, warea->address);
- buf_set_u32(reg_params[1].value, 0, 32, offset);
- buf_set_u32(reg_params[2].value, 0, 32, this_npages);
- buf_set_u32(reg_params[3].value, 0, 32, FCTR);
- buf_set_u32(reg_params[4].value, 0, 32, FPTR_EN_T | prog_time);
-
- /* Execute algorithm, assume breakpoint for last instruction */
- arm_algo.common_magic = ARM_COMMON_MAGIC;
- arm_algo.core_mode = ARM_MODE_SVC;
- arm_algo.core_state = ARM_STATE_ARM;
-
- retval = target_run_algorithm(target, 0, NULL, 5, reg_params,
- (warea->address) + buffer_size,
- (warea->address) + buffer_size + target_code_size - 4,
- 10000, /* 10s should be enough for max. 16 KiB of data */
- &arm_algo);
-
- if (retval != ERROR_OK) {
- LOG_ERROR("Execution of flash algorithm failed.");
- target_free_all_working_areas(target);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- count -= this_npages * FLASH_PAGE_SIZE;
- buffer += this_npages * FLASH_PAGE_SIZE;
- offset += this_npages * FLASH_PAGE_SIZE;
- }
-
- /* Free all resources */
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
- target_free_all_working_areas(target);
- } else {
- /* Write to flash memory page-wise */
- while (count != 0) {
- /* How many bytes do we copy this time? */
- num_bytes = (count >= FLASH_PAGE_SIZE) ?
- FLASH_PAGE_SIZE - (offset % FLASH_PAGE_SIZE) :
- count;
-
- /* Don't do anything with it if the page is in a secured sector. */
- if (!bank->sectors[lpc2900_address2sector(bank, offset)].is_protected) {
- /* Set latch load mode */
- target_write_u32(target, FCTR,
- FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WEB);
-
- /* Always clear the buffer (a little overhead, but who cares) */
- memset(page, 0xFF, FLASH_PAGE_SIZE);
-
- /* Copy them to the buffer */
- memcpy(&page[offset % FLASH_PAGE_SIZE],
- &buffer[offset % FLASH_PAGE_SIZE],
- num_bytes);
-
- /* Write whole page to flash data latches */
- if (target_write_memory(target,
- bank->base + (offset - (offset % FLASH_PAGE_SIZE)),
- 4, FLASH_PAGE_SIZE / 4, page) != ERROR_OK) {
- LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Clear END_OF_BURN interrupt status */
- target_write_u32(target, INT_CLR_STATUS, INTSRC_END_OF_BURN);
-
- /* Set the programming time */
- target_write_u32(target, FPTR, FPTR_EN_T | prog_time);
-
- /* Trigger flash write */
- target_write_u32(target, FCTR,
- FCTR_FS_CS | FCTR_FS_WRE | FCTR_FS_WPB | FCTR_FS_PROGREQ);
-
- /* Wait for the end of the write operation. If it's not over
- * after one second, something went dreadfully wrong... :-(
- */
- if (lpc2900_wait_status(bank, INTSRC_END_OF_BURN, 1000) != ERROR_OK) {
- LOG_ERROR("Write failed @ 0x%8.8" PRIx32, offset);
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
-
- /* Update pointers and counters */
- offset += num_bytes;
- buffer += num_bytes;
- count -= num_bytes;
- }
-
- retval = ERROR_OK;
- }
-
- /* Normal flash operating mode */
- target_write_u32(target, FCTR, FCTR_FS_CS | FCTR_FS_WEB);
-
- return retval;
-}
-
-/**
- * Try and identify the device.
- *
- * Determine type number and its memory layout.
- *
- * @param bank Pointer to the flash bank descriptor
- */
-static int lpc2900_probe(struct flash_bank *bank)
-{
- struct lpc2900_flash_bank *lpc2900_info = bank->driver_priv;
- struct target *target = bank->target;
- int i = 0;
- uint32_t offset;
-
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* We want to do this only once. */
- if (lpc2900_info->is_probed)
- return ERROR_OK;
-
- /* Probing starts with reading the CHIPID register. We will continue only
- * if this identifies as an LPC2900 device.
- */
- target_read_u32(target, CHIPID, &lpc2900_info->chipid);
-
- if (lpc2900_info->chipid != EXPECTED_CHIPID) {
- LOG_WARNING("Device is not an LPC29xx");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* It's an LPC29xx device. Now read the feature register FEAT0...FEAT3. */
- uint32_t feat0, feat1, feat2, feat3;
- target_read_u32(target, FEAT0, &feat0);
- target_read_u32(target, FEAT1, &feat1);
- target_read_u32(target, FEAT2, &feat2);
- target_read_u32(target, FEAT3, &feat3);
-
- /* Base address */
- bank->base = 0x20000000;
-
- /* Determine flash layout from FEAT2 register */
- uint32_t num_64k_sectors = (feat2 >> 16) & 0xFF;
- uint32_t num_8k_sectors = (feat2 >> 0) & 0xFF;
- bank->num_sectors = num_64k_sectors + num_8k_sectors;
- bank->size = KiB * (64 * num_64k_sectors + 8 * num_8k_sectors);
-
- /* Determine maximum contiguous RAM block */
- lpc2900_info->max_ram_block = 16 * KiB;
- if ((feat1 & 0x30) == 0x30) {
- lpc2900_info->max_ram_block = 32 * KiB;
- if ((feat1 & 0x0C) == 0x0C)
- lpc2900_info->max_ram_block = 48 * KiB;
- }
-
- /* Determine package code and ITCM size */
- uint32_t package_code = feat0 & 0x0F;
- uint32_t itcm_code = (feat1 >> 16) & 0x1F;
-
- /* Determine the exact type number. */
- uint32_t found = 1;
- if ((package_code == 4) && (itcm_code == 5)) {
- /* Old LPC2917 or LPC2919 (non-/01 devices) */
- lpc2900_info->target_name = (bank->size == 768*KiB) ? "LPC2919" : "LPC2917";
- } else {
- if (package_code == 2) {
- /* 100-pin package */
- if (bank->size == 128*KiB)
- lpc2900_info->target_name = "LPC2921";
- else if (bank->size == 256*KiB)
- lpc2900_info->target_name = "LPC2923";
- else if (bank->size == 512*KiB)
- lpc2900_info->target_name = "LPC2925";
- else
- found = 0;
- } else if (package_code == 4) {
- /* 144-pin package */
- if ((bank->size == 256*KiB) && (feat3 == 0xFFFFFFE9))
- lpc2900_info->target_name = "LPC2926";
- else if ((bank->size == 512*KiB) && (feat3 == 0xFFFFFCF0))
- lpc2900_info->target_name = "LPC2917/01";
- else if ((bank->size == 512*KiB) && (feat3 == 0xFFFFFFF1))
- lpc2900_info->target_name = "LPC2927";
- else if ((bank->size == 768*KiB) && (feat3 == 0xFFFFFCF8))
- lpc2900_info->target_name = "LPC2919/01";
- else if ((bank->size == 768*KiB) && (feat3 == 0xFFFFFFF9))
- lpc2900_info->target_name = "LPC2929";
- else
- found = 0;
- } else if (package_code == 5) {
- /* 208-pin package */
- lpc2900_info->target_name = (bank->size == 0) ? "LPC2930" : "LPC2939";
- } else
- found = 0;
- }
-
- if (!found) {
- LOG_WARNING("Unknown LPC29xx derivative (FEATx="
- "%08" PRIx32 ":%08" PRIx32 ":%08" PRIx32 ":%08" PRIx32 ")",
- feat0, feat1, feat2, feat3);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Show detected device */
- LOG_INFO("Flash bank %d: Device %s, %" PRIu32
- " KiB in %d sectors",
- bank->bank_number,
- lpc2900_info->target_name, bank->size / KiB,
- bank->num_sectors);
-
- /* Flashless devices cannot be handled */
- if (bank->num_sectors == 0) {
- LOG_WARNING("Flashless device cannot be handled");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Sector layout.
- * These are logical sector numbers. When doing real flash operations,
- * the logical flash number are translated into the physical flash numbers
- * of the device.
- */
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- offset = 0;
- for (i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
-
- if (i <= 7)
- bank->sectors[i].size = 8 * KiB;
- else if (i <= 18)
- bank->sectors[i].size = 64 * KiB;
- else {
- /* We shouldn't come here. But there might be a new part out there
- * that has more than 19 sectors. Politely ask for a fix then.
- */
- bank->sectors[i].size = 0;
- LOG_ERROR("Never heard about sector %d", i);
- }
-
- offset += bank->sectors[i].size;
- }
-
- lpc2900_info->is_probed = true;
-
- /* Read sector security status */
- if (lpc2900_read_security_status(bank) != ERROR_OK) {
- LOG_ERROR("Cannot determine sector security status");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-/**
- * Run a blank check for each sector.
- *
- * For speed reasons, the device isn't read word by word.
- * A hash value is calculated by the hardware ("BIST") for each sector.
- * This value is then compared against the known hash of an empty sector.
- *
- * @param bank Pointer to the flash bank descriptor
- */
-static int lpc2900_erase_check(struct flash_bank *bank)
-{
- uint32_t status = lpc2900_is_ready(bank);
- if (status != ERROR_OK) {
- LOG_INFO("Processor not halted/not probed");
- return status;
- }
-
- /* Use the BIST (Built-In Selft Test) to generate a signature of each flash
- * sector. Compare against the expected signature of an empty sector.
- */
- int sector;
- for (sector = 0; sector < bank->num_sectors; sector++) {
- uint32_t signature[4];
- status = lpc2900_run_bist128(bank, bank->sectors[sector].offset,
- bank->sectors[sector].offset + (bank->sectors[sector].size - 1), signature);
- if (status != ERROR_OK)
- return status;
-
- /* The expected signatures for an empty sector are different
- * for 8 KiB and 64 KiB sectors.
- */
- if (bank->sectors[sector].size == 8*KiB) {
- bank->sectors[sector].is_erased =
- (signature[3] == 0x01ABAAAA) &&
- (signature[2] == 0xAAAAAAAA) &&
- (signature[1] == 0xAAAAAAAA) &&
- (signature[0] == 0xAAA00AAA);
- }
- if (bank->sectors[sector].size == 64*KiB) {
- bank->sectors[sector].is_erased =
- (signature[3] == 0x11801222) &&
- (signature[2] == 0xB88844FF) &&
- (signature[1] == 0x11A22008) &&
- (signature[0] == 0x2B1BFE44);
- }
- }
-
- return ERROR_OK;
-}
-
-/**
- * Get protection (sector security) status.
- *
- * Determine the status of "sector security" for each sector.
- * A secured sector is one that can never be erased/programmed again.
- *
- * @param bank Pointer to the flash bank descriptor
- */
-static int lpc2900_protect_check(struct flash_bank *bank)
-{
- return lpc2900_read_security_status(bank);
-}
-
-struct flash_driver lpc2900_flash = {
- .name = "lpc2900",
- .commands = lpc2900_command_handlers,
- .flash_bank_command = lpc2900_flash_bank_command,
- .erase = lpc2900_erase,
- .protect = lpc2900_protect,
- .write = lpc2900_write,
- .read = default_flash_read,
- .probe = lpc2900_probe,
- .auto_probe = lpc2900_probe,
- .erase_check = lpc2900_erase_check,
- .protect_check = lpc2900_protect_check,
-};
[39/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.h
deleted file mode 100755
index 62bae06..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/driver.h
+++ /dev/null
@@ -1,105 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2007,2008 �yvind Harboe <oy...@zylin.com> *
- * Copyright (C) 2008 by Spencer Oliver <sp...@spen-soft.co.uk> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FLASH_NAND_DRIVER_H
-#define FLASH_NAND_DRIVER_H
-
-struct nand_device;
-
-#define __NAND_DEVICE_COMMAND(name) \
- COMMAND_HELPER(name, struct nand_device *nand)
-
-/**
- * Interface for NAND flash controllers. Not all of these functions are
- * required for full functionality of the NAND driver, but better performance
- * can be achieved by implementing each function.
- */
-struct nand_flash_controller {
- /** Driver name that is used to select it from configuration files. */
- const char *name;
-
- /** Usage of flash command registration. */
- const char *usage;
-
- const struct command_registration *commands;
-
- /** NAND device command called when driver is instantiated during configuration. */
- __NAND_DEVICE_COMMAND((*nand_device_command));
-
- /** Initialize the NAND device. */
- int (*init)(struct nand_device *nand);
-
- /** Reset the NAND device. */
- int (*reset)(struct nand_device *nand);
-
- /** Issue a command to the NAND device. */
- int (*command)(struct nand_device *nand, uint8_t command);
-
- /** Write an address to the NAND device. */
- int (*address)(struct nand_device *nand, uint8_t address);
-
- /** Write word of data to the NAND device. */
- int (*write_data)(struct nand_device *nand, uint16_t data);
-
- /** Read word of data from the NAND device. */
- int (*read_data)(struct nand_device *nand, void *data);
-
- /** Write a block of data to the NAND device. */
- int (*write_block_data)(struct nand_device *nand, uint8_t *data, int size);
-
- /** Read a block of data from the NAND device. */
- int (*read_block_data)(struct nand_device *nand, uint8_t *data, int size);
-
- /** Write a page to the NAND device. */
- int (*write_page)(struct nand_device *nand, uint32_t page, uint8_t *data,
- uint32_t data_size, uint8_t *oob, uint32_t oob_size);
-
- /** Read a page from the NAND device. */
- int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size);
-
- /** Check if the NAND device is ready for more instructions with timeout. */
- int (*nand_ready)(struct nand_device *nand, int timeout);
-};
-
-#define NAND_DEVICE_COMMAND_HANDLER(name) static __NAND_DEVICE_COMMAND(name)
-
-/**
- * Find a NAND flash controller by name.
- * @param name Identifies the NAND controller to find.
- * @returns The nand_flash_controller named @c name, or NULL if not found.
- */
-struct nand_flash_controller *nand_driver_find_by_name(const char *name);
-
-/** Signature for callback functions passed to nand_driver_walk */
-typedef int (*nand_driver_walker_t)(struct nand_flash_controller *c, void *);
-/**
- * Walk the list of drivers, encapsulating the data structure type.
- * Application state/context can be passed through the @c x pointer.
- * @param f The callback function to invoke for each function.
- * @param x For use as private data storate, passed directly to @c f.
- * @returns ERROR_OK if successful, or the non-zero return value of @c f.
- * This allows a walker to terminate the loop early.
- */
-int nand_driver_walk(nand_driver_walker_t f, void *x);
-
-#endif /* FLASH_NAND_DRIVER_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc.c
deleted file mode 100755
index fba7b1c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
- * This file contains an ECC algorithm from Toshiba that allows for detection
- * and correction of 1-bit errors in a 256 byte block of data.
- *
- * [ Extracted from the initial code found in some early Linux versions.
- * The current Linux code is bigger while being faster, but this is of
- * no real benefit when the bottleneck largely remains the JTAG link. ]
- *
- * Copyright (C) 2000-2004 Steven J. Hill (sjhill at realitydiluted.com)
- * Toshiba America Electronics Components, Inc.
- *
- * Copyright (C) 2006 Thomas Gleixner <tglx at linutronix.de>
- *
- * This file is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 or (at your option) any
- * later version.
- *
- * This file is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this file; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- *
- * As a special exception, if other files instantiate templates or use
- * macros or inline functions from these files, or you compile these
- * files and link them with other works to produce a work based on these
- * files, these files do not by themselves cause the resulting work to be
- * covered by the GNU General Public License. However the source code for
- * these files must still be made available in accordance with section (3)
- * of the GNU General Public License.
- *
- * This exception does not invalidate any other reasons why a work based on
- * this file might be covered by the GNU General Public License.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "core.h"
-
-/*
- * Pre-calculated 256-way 1 byte column parity
- */
-static const uint8_t nand_ecc_precalc_table[] = {
- 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00,
- 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
- 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
- 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
- 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
- 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
- 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
- 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
- 0x6a, 0x3f, 0x3c, 0x69, 0x33, 0x66, 0x65, 0x30, 0x30, 0x65, 0x66, 0x33, 0x69, 0x3c, 0x3f, 0x6a,
- 0x0f, 0x5a, 0x59, 0x0c, 0x56, 0x03, 0x00, 0x55, 0x55, 0x00, 0x03, 0x56, 0x0c, 0x59, 0x5a, 0x0f,
- 0x0c, 0x59, 0x5a, 0x0f, 0x55, 0x00, 0x03, 0x56, 0x56, 0x03, 0x00, 0x55, 0x0f, 0x5a, 0x59, 0x0c,
- 0x69, 0x3c, 0x3f, 0x6a, 0x30, 0x65, 0x66, 0x33, 0x33, 0x66, 0x65, 0x30, 0x6a, 0x3f, 0x3c, 0x69,
- 0x03, 0x56, 0x55, 0x00, 0x5a, 0x0f, 0x0c, 0x59, 0x59, 0x0c, 0x0f, 0x5a, 0x00, 0x55, 0x56, 0x03,
- 0x66, 0x33, 0x30, 0x65, 0x3f, 0x6a, 0x69, 0x3c, 0x3c, 0x69, 0x6a, 0x3f, 0x65, 0x30, 0x33, 0x66,
- 0x65, 0x30, 0x33, 0x66, 0x3c, 0x69, 0x6a, 0x3f, 0x3f, 0x6a, 0x69, 0x3c, 0x66, 0x33, 0x30, 0x65,
- 0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
-};
-
-/*
- * nand_calculate_ecc - Calculate 3-byte ECC for 256-byte block
- */
-int nand_calculate_ecc(struct nand_device *nand, const uint8_t *dat, uint8_t *ecc_code)
-{
- uint8_t idx, reg1, reg2, reg3, tmp1, tmp2;
- int i;
-
- /* Initialize variables */
- reg1 = reg2 = reg3 = 0;
-
- /* Build up column parity */
- for (i = 0; i < 256; i++) {
- /* Get CP0 - CP5 from table */
- idx = nand_ecc_precalc_table[*dat++];
- reg1 ^= (idx & 0x3f);
-
- /* All bit XOR = 1 ? */
- if (idx & 0x40) {
- reg3 ^= (uint8_t) i;
- reg2 ^= ~((uint8_t) i);
- }
- }
-
- /* Create non-inverted ECC code from line parity */
- tmp1 = (reg3 & 0x80) >> 0; /* B7 -> B7 */
- tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */
- tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */
- tmp1 |= (reg2 & 0x40) >> 2; /* B6 -> B4 */
- tmp1 |= (reg3 & 0x20) >> 2; /* B5 -> B3 */
- tmp1 |= (reg2 & 0x20) >> 3; /* B5 -> B2 */
- tmp1 |= (reg3 & 0x10) >> 3; /* B4 -> B1 */
- tmp1 |= (reg2 & 0x10) >> 4; /* B4 -> B0 */
-
- tmp2 = (reg3 & 0x08) << 4; /* B3 -> B7 */
- tmp2 |= (reg2 & 0x08) << 3; /* B3 -> B6 */
- tmp2 |= (reg3 & 0x04) << 3; /* B2 -> B5 */
- tmp2 |= (reg2 & 0x04) << 2; /* B2 -> B4 */
- tmp2 |= (reg3 & 0x02) << 2; /* B1 -> B3 */
- tmp2 |= (reg2 & 0x02) << 1; /* B1 -> B2 */
- tmp2 |= (reg3 & 0x01) << 1; /* B0 -> B1 */
- tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */
-
- /* Calculate final ECC code */
-#ifdef NAND_ECC_SMC
- ecc_code[0] = ~tmp2;
- ecc_code[1] = ~tmp1;
-#else
- ecc_code[0] = ~tmp1;
- ecc_code[1] = ~tmp2;
-#endif
- ecc_code[2] = ((~reg1) << 2) | 0x03;
-
- return 0;
-}
-
-static inline int countbits(uint32_t b)
-{
- int res = 0;
-
- for (; b; b >>= 1)
- res += b & 0x01;
- return res;
-}
-
-/**
- * nand_correct_data - Detect and correct a 1 bit error for 256 byte block
- */
-int nand_correct_data(struct nand_device *nand, u_char *dat,
- u_char *read_ecc, u_char *calc_ecc)
-{
- uint8_t s0, s1, s2;
-
-#ifdef NAND_ECC_SMC
- s0 = calc_ecc[0] ^ read_ecc[0];
- s1 = calc_ecc[1] ^ read_ecc[1];
- s2 = calc_ecc[2] ^ read_ecc[2];
-#else
- s1 = calc_ecc[0] ^ read_ecc[0];
- s0 = calc_ecc[1] ^ read_ecc[1];
- s2 = calc_ecc[2] ^ read_ecc[2];
-#endif
- if ((s0 | s1 | s2) == 0)
- return 0;
-
- /* Check for a single bit error */
- if (((s0 ^ (s0 >> 1)) & 0x55) == 0x55 &&
- ((s1 ^ (s1 >> 1)) & 0x55) == 0x55 &&
- ((s2 ^ (s2 >> 1)) & 0x54) == 0x54) {
-
- uint32_t byteoffs, bitnum;
-
- byteoffs = (s1 << 0) & 0x80;
- byteoffs |= (s1 << 1) & 0x40;
- byteoffs |= (s1 << 2) & 0x20;
- byteoffs |= (s1 << 3) & 0x10;
-
- byteoffs |= (s0 >> 4) & 0x08;
- byteoffs |= (s0 >> 3) & 0x04;
- byteoffs |= (s0 >> 2) & 0x02;
- byteoffs |= (s0 >> 1) & 0x01;
-
- bitnum = (s2 >> 5) & 0x04;
- bitnum |= (s2 >> 4) & 0x02;
- bitnum |= (s2 >> 3) & 0x01;
-
- dat[byteoffs] ^= (1 << bitnum);
-
- return 1;
- }
-
- if (countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 << 16)) == 1)
- return 1;
-
- return -1;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc_kw.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc_kw.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc_kw.c
deleted file mode 100755
index 1c3cc70..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/ecc_kw.c
+++ /dev/null
@@ -1,171 +0,0 @@
-/*
- * Reed-Solomon ECC handling for the Marvell Kirkwood SOC
- * Copyright (C) 2009 Marvell Semiconductor, Inc.
- *
- * Authors: Lennert Buytenhek <bu...@wantstofly.org>
- * Nicolas Pitre <ni...@fluxnic.net>
- *
- * This file is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 or (at your option) any
- * later version.
- *
- * This file is distributed in the hope that it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
- * for more details.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "core.h"
-
-/*****************************************************************************
- * Arithmetic in GF(2^10) ("F") modulo x^10 + x^3 + 1.
- *
- * For multiplication, a discrete log/exponent table is used, with
- * primitive element x (F is a primitive field, so x is primitive).
- */
-#define MODPOLY 0x409 /* x^10 + x^3 + 1 in binary */
-
-/*
- * Maps an integer a [0..1022] to a polynomial b = gf_exp[a] in
- * GF(2^10) mod x^10 + x^3 + 1 such that b = x ^ a. There's two
- * identical copies of this array back-to-back so that we can save
- * the mod 1023 operation when doing a GF multiplication.
- */
-static uint16_t gf_exp[1023 + 1023];
-
-/*
- * Maps a polynomial b in GF(2^10) mod x^10 + x^3 + 1 to an index
- * a = gf_log[b] in [0..1022] such that b = x ^ a.
- */
-static uint16_t gf_log[1024];
-
-static void gf_build_log_exp_table(void)
-{
- int i;
- int p_i;
-
- /*
- * p_i = x ^ i
- *
- * Initialise to 1 for i = 0.
- */
- p_i = 1;
-
- for (i = 0; i < 1023; i++) {
- gf_exp[i] = p_i;
- gf_exp[i + 1023] = p_i;
- gf_log[p_i] = i;
-
- /*
- * p_i = p_i * x
- */
- p_i <<= 1;
- if (p_i & (1 << 10))
- p_i ^= MODPOLY;
- }
-}
-
-
-/*****************************************************************************
- * Reed-Solomon code
- *
- * This implements a (1023,1015) Reed-Solomon ECC code over GF(2^10)
- * mod x^10 + x^3 + 1, shortened to (520,512). The ECC data consists
- * of 8 10-bit symbols, or 10 8-bit bytes.
- *
- * Given 512 bytes of data, computes 10 bytes of ECC.
- *
- * This is done by converting the 512 bytes to 512 10-bit symbols
- * (elements of F), interpreting those symbols as a polynomial in F[X]
- * by taking symbol 0 as the coefficient of X^8 and symbol 511 as the
- * coefficient of X^519, and calculating the residue of that polynomial
- * divided by the generator polynomial, which gives us the 8 ECC symbols
- * as the remainder. Finally, we convert the 8 10-bit ECC symbols to 10
- * 8-bit bytes.
- *
- * The generator polynomial is hardcoded, as that is faster, but it
- * can be computed by taking the primitive element a = x (in F), and
- * constructing a polynomial in F[X] with roots a, a^2, a^3, ..., a^8
- * by multiplying the minimal polynomials for those roots (which are
- * just 'x - a^i' for each i).
- *
- * Note: due to unfortunate circumstances, the bootrom in the Kirkwood SOC
- * expects the ECC to be computed backward, i.e. from the last byte down
- * to the first one.
- */
-int nand_calculate_ecc_kw(struct nand_device *nand, const uint8_t *data, uint8_t *ecc)
-{
- unsigned int r7, r6, r5, r4, r3, r2, r1, r0;
- int i;
- static int tables_initialized;
-
- if (!tables_initialized) {
- gf_build_log_exp_table();
- tables_initialized = 1;
- }
-
- /*
- * Load bytes 504..511 of the data into r.
- */
- r0 = data[504];
- r1 = data[505];
- r2 = data[506];
- r3 = data[507];
- r4 = data[508];
- r5 = data[509];
- r6 = data[510];
- r7 = data[511];
-
- /*
- * Shift bytes 503..0 (in that order) into r0, followed
- * by eight zero bytes, while reducing the polynomial by the
- * generator polynomial in every step.
- */
- for (i = 503; i >= -8; i--) {
- unsigned int d;
-
- d = 0;
- if (i >= 0)
- d = data[i];
-
- if (r7) {
- uint16_t *t = gf_exp + gf_log[r7];
-
- r7 = r6 ^ t[0x21c];
- r6 = r5 ^ t[0x181];
- r5 = r4 ^ t[0x18e];
- r4 = r3 ^ t[0x25f];
- r3 = r2 ^ t[0x197];
- r2 = r1 ^ t[0x193];
- r1 = r0 ^ t[0x237];
- r0 = d ^ t[0x024];
- } else {
- r7 = r6;
- r6 = r5;
- r5 = r4;
- r4 = r3;
- r3 = r2;
- r2 = r1;
- r1 = r0;
- r0 = d;
- }
- }
-
- ecc[0] = r0;
- ecc[1] = (r0 >> 8) | (r1 << 2);
- ecc[2] = (r1 >> 6) | (r2 << 4);
- ecc[3] = (r2 >> 4) | (r3 << 6);
- ecc[4] = (r3 >> 2);
- ecc[5] = r4;
- ecc[6] = (r4 >> 8) | (r5 << 2);
- ecc[7] = (r5 >> 6) | (r6 << 4);
- ecc[8] = (r6 >> 4) | (r7 << 6);
- ecc[9] = (r7 >> 2);
-
- return 0;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.c
deleted file mode 100755
index 085e4af..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.c
+++ /dev/null
@@ -1,228 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2002 Thomas Gleixner <tg...@linutronix.de> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * Partially based on drivers/mtd/nand_ids.c from Linux. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "core.h"
-#include "fileio.h"
-
-static struct nand_ecclayout nand_oob_16 = {
- .eccbytes = 6,
- .eccpos = {0, 1, 2, 3, 6, 7},
- .oobfree = {
- {.offset = 8,
- .length = 8}
- }
-};
-
-static struct nand_ecclayout nand_oob_64 = {
- .eccbytes = 24,
- .eccpos = {
- 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55,
- 56, 57, 58, 59, 60, 61, 62, 63
- },
- .oobfree = {
- {.offset = 2,
- .length = 38}
- }
-};
-
-void nand_fileio_init(struct nand_fileio_state *state)
-{
- memset(state, 0, sizeof(*state));
- state->oob_format = NAND_OOB_NONE;
-}
-
-int nand_fileio_start(struct command_context *cmd_ctx,
- struct nand_device *nand, const char *filename, int filemode,
- struct nand_fileio_state *state)
-{
- if (state->address % nand->page_size) {
- command_print(cmd_ctx, "only page-aligned addresses are supported");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- duration_start(&state->bench);
-
- if (NULL != filename) {
- int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
- if (ERROR_OK != retval) {
- const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
- command_print(cmd_ctx, "failed to open '%s' for %s access",
- filename, msg);
- return retval;
- }
- state->file_opened = true;
- }
-
- if (!(state->oob_format & NAND_OOB_ONLY)) {
- state->page_size = nand->page_size;
- state->page = malloc(nand->page_size);
- }
-
- if (state->oob_format & (NAND_OOB_RAW | NAND_OOB_SW_ECC | NAND_OOB_SW_ECC_KW)) {
- if (nand->page_size == 512) {
- state->oob_size = 16;
- state->eccpos = nand_oob_16.eccpos;
- } else if (nand->page_size == 2048) {
- state->oob_size = 64;
- state->eccpos = nand_oob_64.eccpos;
- }
- state->oob = malloc(state->oob_size);
- }
-
- return ERROR_OK;
-}
-int nand_fileio_cleanup(struct nand_fileio_state *state)
-{
- if (state->file_opened)
- fileio_close(state->fileio);
-
- if (state->oob) {
- free(state->oob);
- state->oob = NULL;
- }
- if (state->page) {
- free(state->page);
- state->page = NULL;
- }
- return ERROR_OK;
-}
-int nand_fileio_finish(struct nand_fileio_state *state)
-{
- nand_fileio_cleanup(state);
- return duration_measure(&state->bench);
-}
-
-COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
- struct nand_device **dev, enum fileio_access filemode,
- bool need_size, bool sw_ecc)
-{
- nand_fileio_init(state);
-
- unsigned minargs = need_size ? 4 : 3;
- if (CMD_ARGC < minargs)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct nand_device *nand;
- int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
- if (ERROR_OK != retval)
- return retval;
-
- if (NULL == nand->device) {
- command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], state->address);
- if (need_size) {
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size);
- if (state->size % nand->page_size) {
- command_print(CMD_CTX, "only page-aligned sizes are supported");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- }
-
- if (CMD_ARGC > minargs) {
- for (unsigned i = minargs; i < CMD_ARGC; i++) {
- if (!strcmp(CMD_ARGV[i], "oob_raw"))
- state->oob_format |= NAND_OOB_RAW;
- else if (!strcmp(CMD_ARGV[i], "oob_only"))
- state->oob_format |= NAND_OOB_RAW | NAND_OOB_ONLY;
- else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc"))
- state->oob_format |= NAND_OOB_SW_ECC;
- else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc_kw"))
- state->oob_format |= NAND_OOB_SW_ECC_KW;
- else {
- command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- }
- }
-
- retval = nand_fileio_start(CMD_CTX, nand, CMD_ARGV[1], filemode, state);
- if (ERROR_OK != retval)
- return retval;
-
- if (!need_size) {
- size_t filesize;
- retval = fileio_size(state->fileio, &filesize);
- if (retval != ERROR_OK)
- return retval;
- state->size = filesize;
- }
-
- *dev = nand;
-
- return ERROR_OK;
-}
-
-/**
- * @returns If no error occurred, returns number of bytes consumed;
- * otherwise, returns a negative error code.)
- */
-int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s)
-{
- size_t total_read = 0;
- size_t one_read;
-
- if (NULL != s->page) {
- fileio_read(s->fileio, s->page_size, s->page, &one_read);
- if (one_read < s->page_size)
- memset(s->page + one_read, 0xff, s->page_size - one_read);
- total_read += one_read;
- }
-
- if (s->oob_format & NAND_OOB_SW_ECC) {
- uint8_t ecc[3];
- memset(s->oob, 0xff, s->oob_size);
- for (uint32_t i = 0, j = 0; i < s->page_size; i += 256) {
- nand_calculate_ecc(nand, s->page + i, ecc);
- s->oob[s->eccpos[j++]] = ecc[0];
- s->oob[s->eccpos[j++]] = ecc[1];
- s->oob[s->eccpos[j++]] = ecc[2];
- }
- } else if (s->oob_format & NAND_OOB_SW_ECC_KW) {
- /*
- * In this case eccpos is not used as
- * the ECC data is always stored contigously
- * at the end of the OOB area. It consists
- * of 10 bytes per 512-byte data block.
- */
- uint8_t *ecc = s->oob + s->oob_size - s->page_size / 512 * 10;
- memset(s->oob, 0xff, s->oob_size);
- for (uint32_t i = 0; i < s->page_size; i += 512) {
- nand_calculate_ecc_kw(nand, s->page + i, ecc);
- ecc += 10;
- }
- } else if (NULL != s->oob) {
- fileio_read(s->fileio, s->oob_size, s->oob, &one_read);
- if (one_read < s->oob_size)
- memset(s->oob + one_read, 0xff, s->oob_size - one_read);
- total_read += one_read;
- }
- return total_read;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.h
deleted file mode 100755
index f0483a7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/fileio.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FLASH_NAND_FILEIO_H
-#define FLASH_NAND_FILEIO_H
-
-#include <helper/time_support.h>
-#include <helper/fileio.h>
-
-struct nand_fileio_state {
- uint32_t address;
- uint32_t size;
-
- uint8_t *page;
- uint32_t page_size;
-
- enum oob_formats oob_format;
- uint8_t *oob;
- uint32_t oob_size;
-
- const int *eccpos;
-
- bool file_opened;
- struct fileio *fileio;
-
- struct duration bench;
-};
-
-void nand_fileio_init(struct nand_fileio_state *state);
-int nand_fileio_start(struct command_context *cmd_ctx,
- struct nand_device *nand, const char *filename, int filemode,
- struct nand_fileio_state *state);
-int nand_fileio_cleanup(struct nand_fileio_state *state);
-int nand_fileio_finish(struct nand_fileio_state *state);
-
-COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
- struct nand_device **dev, enum fileio_access filemode,
- bool need_size, bool sw_ecc);
-
-int nand_fileio_read(struct nand_device *nand, struct nand_fileio_state *s);
-
-#endif /* FLASH_NAND_FILEIO_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/imp.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/imp.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/imp.h
deleted file mode 100755
index dde17cb..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/imp.h
+++ /dev/null
@@ -1,40 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FLASH_NAND_IMP_H
-#define FLASH_NAND_IMP_H
-
-#include "core.h"
-#include "driver.h"
-
-void nand_device_add(struct nand_device *c);
-
-int nand_write_page(struct nand_device *nand,
- uint32_t page, uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size);
-
-int nand_read_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size);
-
-int nand_probe(struct nand_device *nand);
-int nand_erase(struct nand_device *nand, int first_block, int last_block);
-int nand_build_bbt(struct nand_device *nand, int first, int last);
-
-#endif /* FLASH_NAND_IMP_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.c
deleted file mode 100755
index ff02ffa..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.c
+++ /dev/null
@@ -1,1361 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- *
- * Copyright (C) 2010 richard vegh <ve...@gmail.com> *
- * Copyright (C) 2010 Oyvind Harboe <oy...@zylin.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "lpc3180.h"
-#include <target/target.h>
-
-static int lpc3180_reset(struct nand_device *nand);
-static int lpc3180_controller_ready(struct nand_device *nand, int timeout);
-static int lpc3180_tc_ready(struct nand_device *nand, int timeout);
-
-#define ECC_OFFS 0x120
-#define SPARE_OFFS 0x140
-#define DATA_OFFS 0x200
-
-/* nand device lpc3180 <target#> <oscillator_frequency>
- */
-NAND_DEVICE_COMMAND_HANDLER(lpc3180_nand_device_command)
-{
- if (CMD_ARGC < 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- uint32_t osc_freq;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], osc_freq);
-
- struct lpc3180_nand_controller *lpc3180_info;
- lpc3180_info = malloc(sizeof(struct lpc3180_nand_controller));
- nand->controller_priv = lpc3180_info;
-
- lpc3180_info->osc_freq = osc_freq;
-
- if ((lpc3180_info->osc_freq < 1000) || (lpc3180_info->osc_freq > 20000))
- LOG_WARNING(
- "LPC3180 oscillator frequency should be between 1000 and 20000 kHz, was %i",
- lpc3180_info->osc_freq);
- lpc3180_info->selected_controller = LPC3180_NO_CONTROLLER;
- lpc3180_info->sw_write_protection = 0;
- lpc3180_info->sw_wp_lower_bound = 0x0;
- lpc3180_info->sw_wp_upper_bound = 0x0;
-
- return ERROR_OK;
-}
-
-static int lpc3180_pll(int fclkin, uint32_t pll_ctrl)
-{
- int bypass = (pll_ctrl & 0x8000) >> 15;
- int direct = (pll_ctrl & 0x4000) >> 14;
- int feedback = (pll_ctrl & 0x2000) >> 13;
- int p = (1 << ((pll_ctrl & 0x1800) >> 11) * 2);
- int n = ((pll_ctrl & 0x0600) >> 9) + 1;
- int m = ((pll_ctrl & 0x01fe) >> 1) + 1;
- int lock = (pll_ctrl & 0x1);
-
- if (!lock)
- LOG_WARNING("PLL is not locked");
-
- if (!bypass && direct) /* direct mode */
- return (m * fclkin) / n;
-
- if (bypass && !direct) /* bypass mode */
- return fclkin / (2 * p);
-
- if (bypass & direct) /* direct bypass mode */
- return fclkin;
-
- if (feedback) /* integer mode */
- return m * (fclkin / n);
- else /* non-integer mode */
- return (m / (2 * p)) * (fclkin / n);
-}
-
-static float lpc3180_cycle_time(struct nand_device *nand)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t sysclk_ctrl, pwr_ctrl, hclkdiv_ctrl, hclkpll_ctrl;
- int sysclk;
- int hclk;
- int hclk_pll;
- float cycle;
-
- /* calculate timings */
-
- /* determine current SYSCLK (13'MHz or main oscillator) */
- target_read_u32(target, 0x40004050, &sysclk_ctrl);
-
- if ((sysclk_ctrl & 1) == 0)
- sysclk = lpc3180_info->osc_freq;
- else
- sysclk = 13000;
-
- /* determine selected HCLK source */
- target_read_u32(target, 0x40004044, &pwr_ctrl);
-
- if ((pwr_ctrl & (1 << 2)) == 0) /* DIRECT RUN mode */
- hclk = sysclk;
- else {
- target_read_u32(target, 0x40004058, &hclkpll_ctrl);
- hclk_pll = lpc3180_pll(sysclk, hclkpll_ctrl);
-
- target_read_u32(target, 0x40004040, &hclkdiv_ctrl);
-
- if (pwr_ctrl & (1 << 10)) /* ARM_CLK and HCLK use PERIPH_CLK */
- hclk = hclk_pll / (((hclkdiv_ctrl & 0x7c) >> 2) + 1);
- else /* HCLK uses HCLK_PLL */
- hclk = hclk_pll / (1 << (hclkdiv_ctrl & 0x3));
- }
-
- LOG_DEBUG("LPC3180 HCLK currently clocked at %i kHz", hclk);
-
- cycle = (1.0 / hclk) * 1000000.0;
-
- return cycle;
-}
-
-static int lpc3180_init(struct nand_device *nand)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
- int bus_width = nand->bus_width ? : 8;
- int address_cycles = nand->address_cycles ? : 3;
- int page_size = nand->page_size ? : 512;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* sanitize arguments */
- if ((bus_width != 8) && (bus_width != 16)) {
- LOG_ERROR("LPC3180 only supports 8 or 16 bit bus width, not %i", bus_width);
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- /* The LPC3180 only brings out 8 bit NAND data bus, but the controller
- * would support 16 bit, too, so we just warn about this for now
- */
- if (bus_width == 16)
- LOG_WARNING("LPC3180 only supports 8 bit bus width");
-
- /* inform calling code about selected bus width */
- nand->bus_width = bus_width;
-
- if ((address_cycles != 3) && (address_cycles != 4)) {
- LOG_ERROR("LPC3180 only supports 3 or 4 address cycles, not %i", address_cycles);
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- if ((page_size != 512) && (page_size != 2048)) {
- LOG_ERROR("LPC3180 only supports 512 or 2048 byte pages, not %i", page_size);
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- /* select MLC controller if none is currently selected */
- if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) {
- LOG_DEBUG("no LPC3180 NAND flash controller selected, using default 'mlc'");
- lpc3180_info->selected_controller = LPC3180_MLC_CONTROLLER;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- uint32_t mlc_icr_value = 0x0;
- float cycle;
- int twp, twh, trp, treh, trhz, trbwb, tcea;
-
- /* FLASHCLK_CTRL = 0x22 (enable clock for MLC flash controller) */
- target_write_u32(target, 0x400040c8, 0x22);
-
- /* MLC_CEH = 0x0 (Force nCE assert) */
- target_write_u32(target, 0x200b804c, 0x0);
-
- /* MLC_LOCK = 0xa25e (unlock protected registers) */
- target_write_u32(target, 0x200b8044, 0xa25e);
-
- /* MLC_ICR = configuration */
- if (lpc3180_info->sw_write_protection)
- mlc_icr_value |= 0x8;
- if (page_size == 2048)
- mlc_icr_value |= 0x4;
- if (address_cycles == 4)
- mlc_icr_value |= 0x2;
- if (bus_width == 16)
- mlc_icr_value |= 0x1;
- target_write_u32(target, 0x200b8030, mlc_icr_value);
-
- /* calculate NAND controller timings */
- cycle = lpc3180_cycle_time(nand);
-
- twp = ((40 / cycle) + 1);
- twh = ((20 / cycle) + 1);
- trp = ((30 / cycle) + 1);
- treh = ((15 / cycle) + 1);
- trhz = ((30 / cycle) + 1);
- trbwb = ((100 / cycle) + 1);
- tcea = ((45 / cycle) + 1);
-
- /* MLC_LOCK = 0xa25e (unlock protected registers) */
- target_write_u32(target, 0x200b8044, 0xa25e);
-
- /* MLC_TIME_REG */
- target_write_u32(target, 0x200b8034, (twp & 0xf) | ((twh & 0xf) << 4) |
- ((trp & 0xf) << 8) | ((treh & 0xf) << 12) | ((trhz & 0x7) << 16) |
- ((trbwb & 0x1f) << 19) | ((tcea & 0x3) << 24));
-
- lpc3180_reset(nand);
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- float cycle;
- int r_setup, r_hold, r_width, r_rdy;
- int w_setup, w_hold, w_width, w_rdy;
-
- /* FLASHCLK_CTRL = 0x05 (enable clock for SLC flash controller) */
- target_write_u32(target, 0x400040c8, 0x05);
-
- /* after reset set other registers of SLC so reset calling is here at the begining*/
- lpc3180_reset(nand);
-
- /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled,
- *DMA read from SLC, WIDTH = bus_width) */
- target_write_u32(target, 0x20020014, 0x3e | (bus_width == 16) ? 1 : 0);
-
- /* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */
- target_write_u32(target, 0x20020020, 0x03);
-
- /* DMA configuration
- * DMACLK_CTRL = 0x01 (enable clock for DMA controller) */
- target_write_u32(target, 0x400040e8, 0x01);
- /* DMACConfig = DMA enabled*/
- target_write_u32(target, 0x31000030, 0x01);
-
-
- /* calculate NAND controller timings */
- cycle = lpc3180_cycle_time(nand);
-
- r_setup = w_setup = 0;
- r_hold = w_hold = 10 / cycle;
- r_width = 30 / cycle;
- w_width = 40 / cycle;
- r_rdy = w_rdy = 100 / cycle;
-
- /* SLC_TAC: SLC timing arcs register */
- target_write_u32(target, 0x2002002c, (r_setup & 0xf) | ((r_hold & 0xf) << 4) |
- ((r_width & 0xf) << 8) | ((r_rdy & 0xf) << 12) | ((w_setup & 0xf) << 16) |
- ((w_hold & 0xf) << 20) | ((w_width & 0xf) << 24) | ((w_rdy & 0xf) << 28));
-
- }
-
- return ERROR_OK;
-}
-
-static int lpc3180_reset(struct nand_device *nand)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- /* MLC_CMD = 0xff (reset controller and NAND device) */
- target_write_u32(target, 0x200b8000, 0xff);
-
- if (!lpc3180_controller_ready(nand, 100)) {
- LOG_ERROR("LPC3180 NAND controller timed out after reset");
- return ERROR_NAND_OPERATION_TIMEOUT;
- }
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- /* SLC_CTRL = 0x6 (ECC_CLEAR, SW_RESET) */
- target_write_u32(target, 0x20020010, 0x6);
-
- if (!lpc3180_controller_ready(nand, 100)) {
- LOG_ERROR("LPC3180 NAND controller timed out after reset");
- return ERROR_NAND_OPERATION_TIMEOUT;
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc3180_command(struct nand_device *nand, uint8_t command)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- /* MLC_CMD = command */
- target_write_u32(target, 0x200b8000, command);
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- /* SLC_CMD = command */
- target_write_u32(target, 0x20020008, command);
- }
-
- return ERROR_OK;
-}
-
-static int lpc3180_address(struct nand_device *nand, uint8_t address)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- /* MLC_ADDR = address */
- target_write_u32(target, 0x200b8004, address);
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- /* SLC_ADDR = address */
- target_write_u32(target, 0x20020004, address);
- }
-
- return ERROR_OK;
-}
-
-static int lpc3180_write_data(struct nand_device *nand, uint16_t data)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- /* MLC_DATA = data */
- target_write_u32(target, 0x200b0000, data);
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- /* SLC_DATA = data */
- target_write_u32(target, 0x20020000, data);
- }
-
- return ERROR_OK;
-}
-
-static int lpc3180_read_data(struct nand_device *nand, void *data)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- /* data = MLC_DATA, use sized access */
- if (nand->bus_width == 8) {
- uint8_t *data8 = data;
- target_read_u8(target, 0x200b0000, data8);
- } else if (nand->bus_width == 16) {
- uint16_t *data16 = data;
- target_read_u16(target, 0x200b0000, data16);
- } else {
- LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
- return ERROR_NAND_OPERATION_FAILED;
- }
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- uint32_t data32;
-
- /* data = SLC_DATA, must use 32-bit access */
- target_read_u32(target, 0x20020000, &data32);
-
- if (nand->bus_width == 8) {
- uint8_t *data8 = data;
- *data8 = data32 & 0xff;
- } else if (nand->bus_width == 16) {
- uint16_t *data16 = data;
- *data16 = data32 & 0xffff;
- } else {
- LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc3180_write_page(struct nand_device *nand,
- uint32_t page,
- uint8_t *data,
- uint32_t data_size,
- uint8_t *oob,
- uint32_t oob_size)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
- uint8_t status;
- uint8_t *page_buffer;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- uint8_t *oob_buffer;
- int quarter, num_quarters;
-
- if (!data && oob) {
- LOG_ERROR("LPC3180 MLC controller can't write OOB data only");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- if (oob && (oob_size > 24)) {
- LOG_ERROR("LPC3180 MLC controller can't write more "
- "than 6 bytes for each quarter's OOB data");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- if (data_size > (uint32_t)nand->page_size) {
- LOG_ERROR("data size exceeds page size");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- /* MLC_CMD = sequential input */
- target_write_u32(target, 0x200b8000, NAND_CMD_SEQIN);
-
- page_buffer = malloc(512);
- oob_buffer = malloc(6);
-
- if (nand->page_size == 512) {
- /* MLC_ADDR = 0x0 (one column cycle) */
- target_write_u32(target, 0x200b8004, 0x0);
-
- /* MLC_ADDR = row */
- target_write_u32(target, 0x200b8004, page & 0xff);
- target_write_u32(target, 0x200b8004, (page >> 8) & 0xff);
-
- if (nand->address_cycles == 4)
- target_write_u32(target, 0x200b8004, (page >> 16) & 0xff);
- } else {
- /* MLC_ADDR = 0x0 (two column cycles) */
- target_write_u32(target, 0x200b8004, 0x0);
- target_write_u32(target, 0x200b8004, 0x0);
-
- /* MLC_ADDR = row */
- target_write_u32(target, 0x200b8004, page & 0xff);
- target_write_u32(target, 0x200b8004, (page >> 8) & 0xff);
- }
-
- /* when using the MLC controller, we have to treat a large page device
- * as being made out of four quarters, each the size of a small page device
- */
- num_quarters = (nand->page_size == 2048) ? 4 : 1;
-
- for (quarter = 0; quarter < num_quarters; quarter++) {
- int thisrun_data_size = (data_size > 512) ? 512 : data_size;
- int thisrun_oob_size = (oob_size > 6) ? 6 : oob_size;
-
- memset(page_buffer, 0xff, 512);
- if (data) {
- memcpy(page_buffer, data, thisrun_data_size);
- data_size -= thisrun_data_size;
- data += thisrun_data_size;
- }
-
- memset(oob_buffer, 0xff, 6);
- if (oob) {
- memcpy(oob_buffer, oob, thisrun_oob_size);
- oob_size -= thisrun_oob_size;
- oob += thisrun_oob_size;
- }
-
- /* write MLC_ECC_ENC_REG to start encode cycle */
- target_write_u32(target, 0x200b8008, 0x0);
-
- target_write_memory(target, 0x200a8000,
- 4, 128, page_buffer);
- target_write_memory(target, 0x200a8000,
- 1, 6, oob_buffer);
-
- /* write MLC_ECC_AUTO_ENC_REG to start auto encode */
- target_write_u32(target, 0x200b8010, 0x0);
-
- if (!lpc3180_controller_ready(nand, 1000)) {
- LOG_ERROR("timeout while waiting for completion of auto encode cycle");
- free(page_buffer);
- free(oob_buffer);
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- /* MLC_CMD = auto program command */
- target_write_u32(target, 0x200b8000, NAND_CMD_PAGEPROG);
-
- retval = nand_read_status(nand, &status);
- if (retval != ERROR_OK) {
- LOG_ERROR("couldn't read status");
- free(page_buffer);
- free(oob_buffer);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & NAND_STATUS_FAIL) {
- LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status);
- free(page_buffer);
- free(oob_buffer);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- free(page_buffer);
- free(oob_buffer);
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
-
- /**********************************************************************
- * Write both SLC NAND flash page main area and spare area.
- * Small page -
- * ------------------------------------------
- * | 512 bytes main | 16 bytes spare |
- * ------------------------------------------
- * Large page -
- * ------------------------------------------
- * | 2048 bytes main | 64 bytes spare |
- * ------------------------------------------
- * If DMA & ECC enabled, then the ECC generated for the 1st 256-byte
- * data is written to the 3rd word of the spare area. The ECC
- * generated for the 2nd 256-byte data is written to the 4th word
- * of the spare area. The ECC generated for the 3rd 256-byte data is
- * written to the 7th word of the spare area. The ECC generated
- * for the 4th 256-byte data is written to the 8th word of the
- * spare area and so on.
- *
- **********************************************************************/
-
- int i = 0, target_mem_base;
- uint8_t *ecc_flash_buffer;
- struct working_area *pworking_area;
-
- if (lpc3180_info->is_bulk) {
-
- if (!data && oob) {
- /*if oob only mode is active original method is used as SLC
- *controller hangs during DMA interworking. Anyway the code supports
- *the oob only mode below. */
- return nand_write_page_raw(nand,
- page,
- data,
- data_size,
- oob,
- oob_size);
- }
- retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
- if (ERROR_OK != retval)
- return retval;
-
- /* allocate a working area */
- if (target->working_area_size < (uint32_t) nand->page_size + 0x200) {
- LOG_ERROR("Reserve at least 0x%x physical target working area",
- nand->page_size + 0x200);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- if (target->working_area_phys%4) {
- LOG_ERROR(
- "Reserve the physical target working area at word boundary");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- if (target_alloc_working_area(target, target->working_area_size,
- &pworking_area) != ERROR_OK) {
- LOG_ERROR("no working area specified, can't read LPC internal flash");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- target_mem_base = target->working_area_phys;
-
- if (nand->page_size == 2048)
- page_buffer = malloc(2048);
- else
- page_buffer = malloc(512);
-
- ecc_flash_buffer = malloc(64);
-
- /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst
- *enabled, DMA write to SLC, WIDTH = bus_width) */
- target_write_u32(target, 0x20020014, 0x3c);
-
- if (data && !oob) {
- /* set DMA LLI-s in target memory and in DMA*/
- for (i = 0; i < nand->page_size/0x100; i++) {
-
- int tmp;
- /* -------LLI for 256 byte block---------
- * DMACC0SrcAddr = SRAM */
- target_write_u32(target,
- target_mem_base+0+i*32,
- target_mem_base+DATA_OFFS+i*256);
- if (i == 0)
- target_write_u32(target,
- 0x31000100,
- target_mem_base+DATA_OFFS);
- /* DMACCxDestAddr = SLC_DMA_DATA */
- target_write_u32(target, target_mem_base+4+i*32, 0x20020038);
- if (i == 0)
- target_write_u32(target, 0x31000104, 0x20020038);
- /* DMACCxLLI = next element */
- tmp = (target_mem_base+(1+i*2)*16)&0xfffffffc;
- target_write_u32(target, target_mem_base+8+i*32, tmp);
- if (i == 0)
- target_write_u32(target, 0x31000108, tmp);
- /* DMACCxControl = TransferSize =64, Source burst size =16,
- * Destination burst size = 16, Source transfer width = 32 bit,
- * Destination transfer width = 32 bit, Source AHB master select = M0,
- * Destination AHB master select = M0, Source increment = 1,
- * Destination increment = 0, Terminal count interrupt enable bit = 0*/
- target_write_u32(target,
- target_mem_base+12+i*32,
- 0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 |
- 0<<27 | 0<<31);
- if (i == 0)
- target_write_u32(target,
- 0x3100010c,
- 0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 |
- 0<<27 | 0<<31);
-
- /* -------LLI for 3 byte ECC---------
- * DMACC0SrcAddr = SLC_ECC*/
- target_write_u32(target, target_mem_base+16+i*32, 0x20020034);
- /* DMACCxDestAddr = SRAM */
- target_write_u32(target,
- target_mem_base+20+i*32,
- target_mem_base+SPARE_OFFS+8+16*(i>>1)+(i%2)*4);
- /* DMACCxLLI = next element */
- tmp = (target_mem_base+(2+i*2)*16)&0xfffffffc;
- target_write_u32(target, target_mem_base+24+i*32, tmp);
- /* DMACCxControl = TransferSize =1, Source burst size =4,
- * Destination burst size = 4, Source transfer width = 32 bit,
- * Destination transfer width = 32 bit, Source AHB master select = M0,
- * Destination AHB master select = M0, Source increment = 0,
- * Destination increment = 1, Terminal count interrupt enable bit = 0*/
- target_write_u32(target,
- target_mem_base+28+i*32,
- 0x01 | 1<<12 | 1<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<<
- 31);
- }
- } else if (data && oob) {
- /* -------LLI for 512 or 2048 bytes page---------
- * DMACC0SrcAddr = SRAM */
- target_write_u32(target, target_mem_base, target_mem_base+DATA_OFFS);
- target_write_u32(target, 0x31000100, target_mem_base+DATA_OFFS);
- /* DMACCxDestAddr = SLC_DMA_DATA */
- target_write_u32(target, target_mem_base+4, 0x20020038);
- target_write_u32(target, 0x31000104, 0x20020038);
- /* DMACCxLLI = next element */
- target_write_u32(target,
- target_mem_base+8,
- (target_mem_base+32)&0xfffffffc);
- target_write_u32(target, 0x31000108,
- (target_mem_base+32)&0xfffffffc);
- /* DMACCxControl = TransferSize =512 or 128, Source burst size =16,
- * Destination burst size = 16, Source transfer width = 32 bit,
- * Destination transfer width = 32 bit, Source AHB master select = M0,
- * Destination AHB master select = M0, Source increment = 1,
- * Destination increment = 0, Terminal count interrupt enable bit = 0*/
- target_write_u32(target,
- target_mem_base+12,
- (nand->page_size ==
- 2048 ? 512 : 128) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 |
- 1<<26 | 0<<27 | 0<<31);
- target_write_u32(target,
- 0x3100010c,
- (nand->page_size ==
- 2048 ? 512 : 128) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 |
- 1<<26 | 0<<27 | 0<<31);
- i = 1;
- } else if (!data && oob)
- i = 0;
-
- /* -------LLI for spare area---------
- * DMACC0SrcAddr = SRAM*/
- target_write_u32(target, target_mem_base+0+i*32, target_mem_base+SPARE_OFFS);
- if (i == 0)
- target_write_u32(target, 0x31000100, target_mem_base+SPARE_OFFS);
- /* DMACCxDestAddr = SLC_DMA_DATA */
- target_write_u32(target, target_mem_base+4+i*32, 0x20020038);
- if (i == 0)
- target_write_u32(target, 0x31000104, 0x20020038);
- /* DMACCxLLI = next element = NULL */
- target_write_u32(target, target_mem_base+8+i*32, 0);
- if (i == 0)
- target_write_u32(target, 0x31000108, 0);
- /* DMACCxControl = TransferSize =16 for large page or 4 for small page,
- * Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
- * Destination transfer width = 32 bit, Source AHB master select = M0,
- * Destination AHB master select = M0, Source increment = 1,
- * Destination increment = 0, Terminal count interrupt enable bit = 0*/
- target_write_u32(target,
- target_mem_base+12+i*32,
- (nand->page_size ==
- 2048 ? 0x10 : 0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 1<<26 |
- 0<<27 | 0<<31);
- if (i == 0)
- target_write_u32(target, 0x3100010c,
- (nand->page_size == 2048 ?
- 0x10 : 0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 |
- 0<<25 | 1<<26 | 0<<27 | 0<<31);
-
- memset(ecc_flash_buffer, 0xff, 64);
- if (oob)
- memcpy(ecc_flash_buffer, oob, oob_size);
- target_write_memory(target,
- target_mem_base+SPARE_OFFS,
- 4,
- 16,
- ecc_flash_buffer);
-
- if (data) {
- memset(page_buffer, 0xff, nand->page_size == 2048 ? 2048 : 512);
- memcpy(page_buffer, data, data_size);
- target_write_memory(target,
- target_mem_base+DATA_OFFS,
- 4,
- nand->page_size == 2048 ? 512 : 128,
- page_buffer);
- }
-
- free(page_buffer);
- free(ecc_flash_buffer);
-
- /* Enable DMA after channel set up !
- LLI only works when DMA is the flow controller!
- */
- /* DMACCxConfig= E=1, SrcPeripheral = 1 (SLC), DestPeripheral = 1 (SLC),
- *FlowCntrl = 2 (Pher -> Mem, DMA), IE = 0, ITC = 0, L= 0, H=0*/
- target_write_u32(target,
- 0x31000110,
- 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18);
-
- /* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
- target_write_u32(target, 0x20020010, 0x3);
-
- /* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
- target_write_u32(target, 0x20020028, 2);
-
- /* SLC_TC */
- if (!data && oob)
- target_write_u32(target, 0x20020030,
- (nand->page_size == 2048 ? 0x10 : 0x04));
- else
- target_write_u32(target, 0x20020030,
- (nand->page_size == 2048 ? 0x840 : 0x210));
-
- nand_write_finish(nand);
-
- if (!lpc3180_tc_ready(nand, 1000)) {
- LOG_ERROR("timeout while waiting for completion of DMA");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_free_working_area(target, pworking_area);
-
- LOG_INFO("Page = 0x%" PRIx32 " was written.", page);
-
- } else
- return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
- }
-
- return ERROR_OK;
-}
-
-static int lpc3180_read_page(struct nand_device *nand,
- uint32_t page,
- uint8_t *data,
- uint32_t data_size,
- uint8_t *oob,
- uint32_t oob_size)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
- uint8_t *page_buffer;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC3180 NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- uint8_t *oob_buffer;
- uint32_t page_bytes_done = 0;
- uint32_t oob_bytes_done = 0;
- uint32_t mlc_isr;
-
-#if 0
- if (oob && (oob_size > 6)) {
- LOG_ERROR("LPC3180 MLC controller can't read more than 6 bytes of OOB data");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-#endif
-
- if (data_size > (uint32_t)nand->page_size) {
- LOG_ERROR("data size exceeds page size");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- if (nand->page_size == 2048) {
- page_buffer = malloc(2048);
- oob_buffer = malloc(64);
- } else {
- page_buffer = malloc(512);
- oob_buffer = malloc(16);
- }
-
- if (!data && oob) {
- /* MLC_CMD = Read OOB
- * we can use the READOOB command on both small and large page devices,
- * as the controller translates the 0x50 command to a 0x0 with appropriate
- * positioning of the serial buffer read pointer
- */
- target_write_u32(target, 0x200b8000, NAND_CMD_READOOB);
- } else {
- /* MLC_CMD = Read0 */
- target_write_u32(target, 0x200b8000, NAND_CMD_READ0);
- }
-
- if (nand->page_size == 512) {
- /* small page device
- * MLC_ADDR = 0x0 (one column cycle) */
- target_write_u32(target, 0x200b8004, 0x0);
-
- /* MLC_ADDR = row */
- target_write_u32(target, 0x200b8004, page & 0xff);
- target_write_u32(target, 0x200b8004, (page >> 8) & 0xff);
-
- if (nand->address_cycles == 4)
- target_write_u32(target, 0x200b8004, (page >> 16) & 0xff);
- } else {
- /* large page device
- * MLC_ADDR = 0x0 (two column cycles) */
- target_write_u32(target, 0x200b8004, 0x0);
- target_write_u32(target, 0x200b8004, 0x0);
-
- /* MLC_ADDR = row */
- target_write_u32(target, 0x200b8004, page & 0xff);
- target_write_u32(target, 0x200b8004, (page >> 8) & 0xff);
-
- /* MLC_CMD = Read Start */
- target_write_u32(target, 0x200b8000, NAND_CMD_READSTART);
- }
-
- while (page_bytes_done < (uint32_t)nand->page_size) {
- /* MLC_ECC_AUTO_DEC_REG = dummy */
- target_write_u32(target, 0x200b8014, 0xaa55aa55);
-
- if (!lpc3180_controller_ready(nand, 1000)) {
- LOG_ERROR("timeout while waiting for completion of auto decode cycle");
- free(page_buffer);
- free(oob_buffer);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- target_read_u32(target, 0x200b8048, &mlc_isr);
-
- if (mlc_isr & 0x8) {
- if (mlc_isr & 0x40) {
- LOG_ERROR("uncorrectable error detected: 0x%2.2x",
- (unsigned)mlc_isr);
- free(page_buffer);
- free(oob_buffer);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- LOG_WARNING("%i symbol error detected and corrected",
- ((int)(((mlc_isr & 0x30) >> 4) + 1)));
- }
-
- if (data)
- target_read_memory(target,
- 0x200a8000,
- 4,
- 128,
- page_buffer + page_bytes_done);
-
- if (oob)
- target_read_memory(target,
- 0x200a8000,
- 4,
- 4,
- oob_buffer + oob_bytes_done);
-
- page_bytes_done += 512;
- oob_bytes_done += 16;
- }
-
- if (data)
- memcpy(data, page_buffer, data_size);
-
- if (oob)
- memcpy(oob, oob_buffer, oob_size);
-
- free(page_buffer);
- free(oob_buffer);
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
-
- /**********************************************************************
- * Read both SLC NAND flash page main area and spare area.
- * Small page -
- * ------------------------------------------
- * | 512 bytes main | 16 bytes spare |
- * ------------------------------------------
- * Large page -
- * ------------------------------------------
- * | 2048 bytes main | 64 bytes spare |
- * ------------------------------------------
- * If DMA & ECC enabled, then the ECC generated for the 1st 256-byte
- * data is compared with the 3rd word of the spare area. The ECC
- * generated for the 2nd 256-byte data is compared with the 4th word
- * of the spare area. The ECC generated for the 3rd 256-byte data is
- * compared with the 7th word of the spare area. The ECC generated
- * for the 4th 256-byte data is compared with the 8th word of the
- * spare area and so on.
- *
- **********************************************************************/
-
- int retval, i, target_mem_base;
- uint8_t *ecc_hw_buffer;
- uint8_t *ecc_flash_buffer;
- struct working_area *pworking_area;
-
- if (lpc3180_info->is_bulk) {
-
- /* read always the data and also oob areas*/
-
- retval = nand_page_command(nand, page, NAND_CMD_READ0, 0);
- if (ERROR_OK != retval)
- return retval;
-
- /* allocate a working area */
- if (target->working_area_size < (uint32_t) nand->page_size + 0x200) {
- LOG_ERROR("Reserve at least 0x%x physical target working area",
- nand->page_size + 0x200);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- if (target->working_area_phys%4) {
- LOG_ERROR(
- "Reserve the physical target working area at word boundary");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- if (target_alloc_working_area(target, target->working_area_size,
- &pworking_area) != ERROR_OK) {
- LOG_ERROR("no working area specified, can't read LPC internal flash");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- target_mem_base = target->working_area_phys;
-
- if (nand->page_size == 2048)
- page_buffer = malloc(2048);
- else
- page_buffer = malloc(512);
-
- ecc_hw_buffer = malloc(32);
- ecc_flash_buffer = malloc(64);
-
- /* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst
- *enabled, DMA read from SLC, WIDTH = bus_width) */
- target_write_u32(target, 0x20020014, 0x3e);
-
- /* set DMA LLI-s in target memory and in DMA*/
- for (i = 0; i < nand->page_size/0x100; i++) {
- int tmp;
- /* -------LLI for 256 byte block---------
- * DMACC0SrcAddr = SLC_DMA_DATA*/
- target_write_u32(target, target_mem_base+0+i*32, 0x20020038);
- if (i == 0)
- target_write_u32(target, 0x31000100, 0x20020038);
- /* DMACCxDestAddr = SRAM */
- target_write_u32(target,
- target_mem_base+4+i*32,
- target_mem_base+DATA_OFFS+i*256);
- if (i == 0)
- target_write_u32(target,
- 0x31000104,
- target_mem_base+DATA_OFFS);
- /* DMACCxLLI = next element */
- tmp = (target_mem_base+(1+i*2)*16)&0xfffffffc;
- target_write_u32(target, target_mem_base+8+i*32, tmp);
- if (i == 0)
- target_write_u32(target, 0x31000108, tmp);
- /* DMACCxControl = TransferSize =64, Source burst size =16,
- * Destination burst size = 16, Source transfer width = 32 bit,
- * Destination transfer width = 32 bit, Source AHB master select = M0,
- * Destination AHB master select = M0, Source increment = 0,
- * Destination increment = 1, Terminal count interrupt enable bit = 0*/
- target_write_u32(target,
- target_mem_base+12+i*32,
- 0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<<
- 31);
- if (i == 0)
- target_write_u32(target,
- 0x3100010c,
- 0x40 | 3<<12 | 3<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<<
- 31);
-
- /* -------LLI for 3 byte ECC---------
- * DMACC0SrcAddr = SLC_ECC*/
- target_write_u32(target, target_mem_base+16+i*32, 0x20020034);
- /* DMACCxDestAddr = SRAM */
- target_write_u32(target,
- target_mem_base+20+i*32,
- target_mem_base+ECC_OFFS+i*4);
- /* DMACCxLLI = next element */
- tmp = (target_mem_base+(2+i*2)*16)&0xfffffffc;
- target_write_u32(target, target_mem_base+24+i*32, tmp);
- /* DMACCxControl = TransferSize =1, Source burst size =4,
- * Destination burst size = 4, Source transfer width = 32 bit,
- * Destination transfer width = 32 bit, Source AHB master select = M0,
- * Destination AHB master select = M0, Source increment = 0,
- * Destination increment = 1, Terminal count interrupt enable bit = 0*/
- target_write_u32(target,
- target_mem_base+28+i*32,
- 0x01 | 1<<12 | 1<<15 | 2<<18 | 2<<21 | 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<<
- 31);
- }
-
- /* -------LLI for spare area---------
- * DMACC0SrcAddr = SLC_DMA_DATA*/
- target_write_u32(target, target_mem_base+0+i*32, 0x20020038);
- /* DMACCxDestAddr = SRAM */
- target_write_u32(target, target_mem_base+4+i*32, target_mem_base+SPARE_OFFS);
- /* DMACCxLLI = next element = NULL */
- target_write_u32(target, target_mem_base+8+i*32, 0);
- /* DMACCxControl = TransferSize =16 for large page or 4 for small page,
- * Source burst size =16, Destination burst size = 16, Source transfer width = 32 bit,
- * Destination transfer width = 32 bit, Source AHB master select = M0,
- * Destination AHB master select = M0, Source increment = 0,
- * Destination increment = 1, Terminal count interrupt enable bit = 0*/
- target_write_u32(target,
- target_mem_base + 12 + i * 32,
- (nand->page_size == 2048 ? 0x10 : 0x04) | 3<<12 | 3<<15 | 2<<18 | 2<<21 |
- 0<<24 | 0<<25 | 0<<26 | 1<<27 | 0<<31);
-
- /* Enable DMA after channel set up !
- LLI only works when DMA is the flow controller!
- */
- /* DMACCxConfig= E=1, SrcPeripheral = 1 (SLC), DestPeripheral = 1 (SLC),
- *FlowCntrl = 2 (Pher-> Mem, DMA), IE = 0, ITC = 0, L= 0, H=0*/
- target_write_u32(target,
- 0x31000110,
- 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14 | 0<<15 | 0<<16 | 0<<18);
-
- /* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
- target_write_u32(target, 0x20020010, 0x3);
-
- /* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
- target_write_u32(target, 0x20020028, 2);
-
- /* SLC_TC */
- target_write_u32(target, 0x20020030,
- (nand->page_size == 2048 ? 0x840 : 0x210));
-
- if (!lpc3180_tc_ready(nand, 1000)) {
- LOG_ERROR("timeout while waiting for completion of DMA");
- free(page_buffer);
- free(ecc_hw_buffer);
- free(ecc_flash_buffer);
- target_free_working_area(target, pworking_area);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (data) {
- target_read_memory(target,
- target_mem_base+DATA_OFFS,
- 4,
- nand->page_size == 2048 ? 512 : 128,
- page_buffer);
- memcpy(data, page_buffer, data_size);
-
- LOG_INFO("Page = 0x%" PRIx32 " was read.", page);
-
- /* check hw generated ECC for each 256 bytes block with the saved
- *ECC in flash spare area*/
- int idx = nand->page_size/0x200;
- target_read_memory(target,
- target_mem_base+SPARE_OFFS,
- 4,
- 16,
- ecc_flash_buffer);
- target_read_memory(target,
- target_mem_base+ECC_OFFS,
- 4,
- 8,
- ecc_hw_buffer);
- for (i = 0; i < idx; i++) {
- if ((0x00ffffff & *(uint32_t *)(void *)(ecc_hw_buffer+i*8)) !=
- (0x00ffffff & *(uint32_t *)(void *)(ecc_flash_buffer+8+i*16)))
- LOG_WARNING(
- "ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,
- i * 2 + 1, page);
- if ((0x00ffffff & *(uint32_t *)(void *)(ecc_hw_buffer+4+i*8)) !=
- (0x00ffffff & *(uint32_t *)(void *)(ecc_flash_buffer+12+i*16)))
- LOG_WARNING(
- "ECC mismatch at 256 bytes size block= %d at page= 0x%" PRIx32,
- i * 2 + 2, page);
- }
- }
-
- if (oob)
- memcpy(oob, ecc_flash_buffer, oob_size);
-
- free(page_buffer);
- free(ecc_hw_buffer);
- free(ecc_flash_buffer);
-
- target_free_working_area(target, pworking_area);
-
- } else
- return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
- }
-
- return ERROR_OK;
-}
-
-static int lpc3180_controller_ready(struct nand_device *nand, int timeout)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- LOG_DEBUG("lpc3180_controller_ready count start=%d", timeout);
-
- do {
- if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- uint8_t status;
-
- /* Read MLC_ISR, wait for controller to become ready */
- target_read_u8(target, 0x200b8048, &status);
-
- if (status & 2) {
- LOG_DEBUG("lpc3180_controller_ready count=%d",
- timeout);
- return 1;
- }
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- uint32_t status;
-
- /* Read SLC_STAT and check READY bit */
- target_read_u32(target, 0x20020018, &status);
-
- if (status & 1) {
- LOG_DEBUG("lpc3180_controller_ready count=%d",
- timeout);
- return 1;
- }
- }
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-static int lpc3180_nand_ready(struct nand_device *nand, int timeout)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- LOG_DEBUG("lpc3180_nand_ready count start=%d", timeout);
-
- do {
- if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER) {
- uint8_t status = 0x0;
-
- /* Read MLC_ISR, wait for NAND flash device to become ready */
- target_read_u8(target, 0x200b8048, &status);
-
- if (status & 1) {
- LOG_DEBUG("lpc3180_nand_ready count end=%d",
- timeout);
- return 1;
- }
- } else if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- uint32_t status = 0x0;
-
- /* Read SLC_STAT and check READY bit */
- target_read_u32(target, 0x20020018, &status);
-
- if (status & 1) {
- LOG_DEBUG("lpc3180_nand_ready count end=%d",
- timeout);
- return 1;
- }
- }
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-static int lpc3180_tc_ready(struct nand_device *nand, int timeout)
-{
- struct lpc3180_nand_controller *lpc3180_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC3180 NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- LOG_DEBUG("lpc3180_tc_ready count start=%d",
- timeout);
-
- do {
- if (lpc3180_info->selected_controller == LPC3180_SLC_CONTROLLER) {
- uint32_t status = 0x0;
- /* Read SLC_INT_STAT and check INT_TC_STAT bit */
- target_read_u32(target, 0x2002001c, &status);
-
- if (status & 2) {
- LOG_DEBUG("lpc3180_tc_ready count=%d",
- timeout);
- return 1;
- }
- }
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-COMMAND_HANDLER(handle_lpc3180_select_command)
-{
- struct lpc3180_nand_controller *lpc3180_info = NULL;
- char *selected[] = {
- "no", "mlc", "slc"
- };
-
- if ((CMD_ARGC < 1) || (CMD_ARGC > 3))
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- unsigned num;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
- struct nand_device *nand = get_nand_device_by_num(num);
- if (!nand) {
- command_print(CMD_CTX, "nand device '#%s' is out of bounds", CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- lpc3180_info = nand->controller_priv;
-
- if (CMD_ARGC >= 2) {
- if (strcmp(CMD_ARGV[1], "mlc") == 0)
- lpc3180_info->selected_controller = LPC3180_MLC_CONTROLLER;
- else if (strcmp(CMD_ARGV[1], "slc") == 0) {
- lpc3180_info->selected_controller = LPC3180_SLC_CONTROLLER;
- if (CMD_ARGC == 3 && strcmp(CMD_ARGV[2], "bulk") == 0)
- lpc3180_info->is_bulk = 1;
- else
- lpc3180_info->is_bulk = 0;
- } else
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
- command_print(CMD_CTX, "%s controller selected",
- selected[lpc3180_info->selected_controller]);
- else
- command_print(CMD_CTX,
- lpc3180_info->is_bulk ? "%s controller selected bulk mode is available" :
- "%s controller selected bulk mode is not available",
- selected[lpc3180_info->selected_controller]);
-
- return ERROR_OK;
-}
-
-static const struct command_registration lpc3180_exec_command_handlers[] = {
- {
- .name = "select",
- .handler = handle_lpc3180_select_command,
- .mode = COMMAND_EXEC,
- .help =
- "select MLC or SLC controller (default is MLC), SLC can be set to bulk mode",
- .usage = "bank_id ['mlc'|'slc' ['bulk'] ]",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration lpc3180_command_handler[] = {
- {
- .name = "lpc3180",
- .mode = COMMAND_ANY,
- .help = "LPC3180 NAND flash controller commands",
- .usage = "",
- .chain = lpc3180_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct nand_flash_controller lpc3180_nand_controller = {
- .name = "lpc3180",
- .commands = lpc3180_command_handler,
- .nand_device_command = lpc3180_nand_device_command,
- .init = lpc3180_init,
- .reset = lpc3180_reset,
- .command = lpc3180_command,
- .address = lpc3180_address,
- .write_data = lpc3180_write_data,
- .read_data = lpc3180_read_data,
- .write_page = lpc3180_write_page,
- .read_page = lpc3180_read_page,
- .nand_ready = lpc3180_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.h
deleted file mode 100755
index 4d162fc..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc3180.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef LPC3180_NAND_CONTROLLER_H
-#define LPC3180_NAND_CONTROLLER_H
-
-enum lpc3180_selected_controller {
- LPC3180_NO_CONTROLLER,
- LPC3180_MLC_CONTROLLER,
- LPC3180_SLC_CONTROLLER,
-};
-
-struct lpc3180_nand_controller {
- int osc_freq;
- enum lpc3180_selected_controller selected_controller;
- int is_bulk;
- int sw_write_protection;
- uint32_t sw_wp_lower_bound;
- uint32_t sw_wp_upper_bound;
-};
-
-#endif /*LPC3180_NAND_CONTROLLER_H */
[17/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/sim3x.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/sim3x.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/sim3x.c
deleted file mode 100755
index df4e19c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/sim3x.c
+++ /dev/null
@@ -1,1123 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2014 by Ladislav B�bel *
- * ladababel@seznam.cz *
- * *
- * Copyright (C) 2015 by Andreas Bomholtz *
- * andreas@seluxit.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <helper/time_support.h>
-#include <target/algorithm.h>
-#include <target/cortex_m.h>
-
-/* SI32_DEVICEID0 */
-#define DEVICEID0_DEVICEID0 (0x400490C0)
-#define DEVICEID0_DEVICEID1 (0x400490D0)
-#define DEVICEID0_DEVICEID2 (0x400490E0)
-#define DEVICEID0_DEVICEID3 (0x400490F0)
-
-/* cortex_m CPUID */
-#define CPUID_CHECK_VALUE (0x410FC230)
-#define CPUID_CHECK_VALUE_MASK (0xFF0FFFF0)
-
-/* Flash */
-#define FLASH_BASE_ADDRESS (0x00000000)
-#define LOCK_WORD_ADDRESS (0x0003FFFC)
-
-#define LOCK_WORD_MCU_UNLOCKED (0xFFFFFFFF)
-/* Can't by locked again without erase, because LOCK_WORD is in FLASH */
-#define LOCK_WORD_MCU_UNLOCKED_BY_FIRMWARE (0x00000000)
-
-/* SI32_FLASHCTRL_0 */
-#define FLASHCTRL0_CONFIG_ALL (0x4002E000)
-#define FLASHCTRL0_CONFIG_SET (0x4002E004)
-#define FLASHCTRL0_CONFIG_CLR (0x4002E008)
-#define FLASHCTRL0_CONFIG_ERASEEN_MASK (0x00040000)
-#define FLASHCTRL0_CONFIG_BUSYF_MASK (0x00100000)
-
-#define FLASHCTRL0_WRADDR (0x4002E0A0)
-#define FLASHCTRL0_WRDATA (0x4002E0B0)
-
-#define FLASHCTRL0_KEY (0x4002E0C0)
-#define FLASHCTRL0_KEY_INITIAL_UNLOCK (0x000000A5)
-#define FLASHCTRL0_KEY_SINGLE_UNLOCK (0x000000F1)
-#define FLASHCTRL0_KEY_MULTIPLE_UNLOCK (0x000000F2)
-#define FLASHCTRL0_KEY_MULTIPLE_LOCK (0x0000005A)
-
-#define FLASH_BUSY_TIMEOUT (100)
-
-/* SI32_RSTSRC_0 */
-#define RSTSRC0_RESETEN_ALL (0x4002D060)
-#define RSTSRC0_RESETEN_SET (0x4002D064)
-#define RSTSRC0_RESETEN_CLR (0x4002D068)
-#define RSTSRC0_RESETEN_VMONREN_MASK (0x00000004)
-#define RSTSRC0_RESETEN_SWREN_MASK (0x00000040)
-
-/* SI32_VMON_0 */
-#define VMON0_CONTROL_ALL (0x4002F000)
-#define VMON0_CONTROL_SET (0x4002F004)
-#define VMON0_CONTROL_CLR (0x4002F008)
-#define VMON0_CONTROL_VMONEN_MASK (0x80000000)
-
-/* SI32_CLKCTRL_0 */
-#define CLKCTRL0_APBCLKG0_ALL (0x4002D020)
-#define CLKCTRL0_APBCLKG0_SET (0x4002D024)
-#define CLKCTRL0_APBCLKG0_CLR (0x4002D028)
-#define CLKCTRL0_APBCLKG0_FLCTRLCEN_MASK (0x40000000)
-
-/* SI32_WDTIMER_0 */
-#define WDTIMER0_CONTROL_ALL (0x40030000)
-#define WDTIMER0_CONTROL_SET (0x40030004)
-#define WDTIMER0_CONTROL_CLR (0x40030008)
-#define WDTIMER0_CONTROL_DBGMD_MASK (0x00000002)
-
-#define WDTIMER0_STATUS_ALL (0x40030010)
-#define WDTIMER0_STATUS_SET (0x40030014)
-#define WDTIMER0_STATUS_CLR (0x40030018)
-#define WDTIMER0_STATUS_KEYSTS_MASK (0x00000001)
-#define WDTIMER0_STATUS_PRIVSTS_MASK (0x00000002)
-
-#define WDTIMER0_THRESHOLD (0x40030020)
-
-#define WDTIMER0_WDTKEY (0x40030030)
-#define WDTIMER0_KEY_ATTN (0x000000A5)
-#define WDTIMER0_KEY_WRITE (0x000000F1)
-#define WDTIMER0_KEY_RESET (0x000000CC)
-#define WDTIMER0_KEY_DISABLE (0x000000DD)
-#define WDTIMER0_KEY_START (0x000000EE)
-#define WDTIMER0_KEY_LOCK (0x000000FF)
-
-/* DAP */
-#define SIM3X_AP (0x0A)
-
-#define SIM3X_AP_CTRL1 (0x00)
-#define SIM3X_AP_CTRL2 (0x04)
-#define SIM3X_AP_LOCK (0x08)
-#define SIM3X_AP_CRC (0x0C)
-
-#define SIM3X_AP_INIT_STAT (0x10)
-#define SIM3X_AP_DAP_IN (0x14)
-#define SIM3X_AP_DAP_OUT (0x18)
-
-#define SIM3X_AP_ID (0xFC)
-
-/* DAP register values */
-#define SIM3X_AP_CTRL1_MASS_ERASE_REQ (0x00000001)
-#define SIM3X_AP_CTRL1_RESET_REQ (0x00000008)
-/* this bit is set if MCU is locked */
-#define SIM3X_AP_INIT_STAT_LOCK (0x00000004)
-/* expected value inside SIM3X_AP_ID */
-#define SIM3X_AP_ID_VALUE (0x2430002)
-
-#define SIM3X_FLASH_PAGE_SIZE 1024
-
-struct sim3x_info {
- uint16_t flash_size_kb;
- uint16_t part_number;
- char part_family;
- uint8_t device_revision;
- char device_package[4];
- bool probed;
- bool need_init;
- bool flash_locked;
-};
-
-/* flash bank sim3x 0 0 0 0 <target#> */
-FLASH_BANK_COMMAND_HANDLER(sim3x_flash_bank_command)
-{
- struct sim3x_info *sim3x_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* Init sim3x_info struct */
- sim3x_info = malloc(sizeof(struct sim3x_info));
- sim3x_info->probed = false;
- sim3x_info->need_init = true;
- sim3x_info->device_revision = 0;
- memset(sim3x_info->device_package, 0, 4);
- bank->driver_priv = sim3x_info;
-
- return ERROR_OK;
-}
-
-static int sim3x_init(struct flash_bank *bank)
-{
- int ret;
- struct target *target;
- struct sim3x_info *sim3x_info;
-
- target = bank->target;
-
- /* Disable watchdog timer */
- ret = target_write_u32(target, WDTIMER0_WDTKEY, WDTIMER0_KEY_ATTN);
- if (ret != ERROR_OK)
- return ret;
-
- ret = target_write_u32(target, WDTIMER0_WDTKEY, WDTIMER0_KEY_DISABLE);
- if (ret != ERROR_OK)
- return ret;
-
- /* Enable one write command */
- ret = target_write_u32(target, WDTIMER0_WDTKEY, WDTIMER0_KEY_ATTN);
- if (ret != ERROR_OK)
- return ret;
-
- ret = target_write_u32(target, WDTIMER0_WDTKEY, WDTIMER0_KEY_WRITE);
- if (ret != ERROR_OK)
- return ret;
-
- /* Watchdog Timer Debug Mode */
- ret = target_write_u32(target, WDTIMER0_CONTROL_SET,
- WDTIMER0_CONTROL_DBGMD_MASK);
- if (ret != ERROR_OK)
- return ret;
-
- /* Enable VDD Supply Monitor */
- ret = target_write_u32(target, VMON0_CONTROL_SET,
- VMON0_CONTROL_VMONEN_MASK);
- if (ret != ERROR_OK)
- return ret;
-
- /* Set VDD Supply Monitor as a reset source */
- ret = target_write_u32(target, RSTSRC0_RESETEN_SET,
- RSTSRC0_RESETEN_VMONREN_MASK);
- if (ret != ERROR_OK)
- return ret;
-
- /* Flash Controller Clock Enable */
- ret = target_write_u32(target, CLKCTRL0_APBCLKG0_SET,
- CLKCTRL0_APBCLKG0_FLCTRLCEN_MASK);
- if (ret != ERROR_OK)
- return ret;
-
- /* Disable Flash Erase Mode */
- ret = target_write_u32(target, FLASHCTRL0_CONFIG_CLR,
- FLASHCTRL0_CONFIG_ERASEEN_MASK);
- if (ret != ERROR_OK)
- return ret;
-
- sim3x_info = bank->driver_priv;
- sim3x_info->need_init = 0;
- return ERROR_OK;
-}
-
-static int sim3x_erase_page(struct flash_bank *bank, uint32_t addr)
-{
- int ret, i;
- uint32_t temp;
- struct target *target;
-
- target = bank->target;
-
- for (i = 0; i < FLASH_BUSY_TIMEOUT; i++) {
- ret = target_read_u32(target, FLASHCTRL0_CONFIG_ALL, &temp);
- if (ret != ERROR_OK)
- return ret;
-
- /* If is not busy */
- if ((temp & FLASHCTRL0_CONFIG_BUSYF_MASK) == 0) {
- /* If erase is not enabled */
- if ((temp & FLASHCTRL0_CONFIG_ERASEEN_MASK) == 0) {
- /* Enter Flash Erase Mode */
- ret = target_write_u32(target, FLASHCTRL0_CONFIG_SET,
- FLASHCTRL0_CONFIG_ERASEEN_MASK);
- if (ret != ERROR_OK)
- return ret;
- }
-
- /* Write the address of the Flash page to WRADDR */
- ret = target_write_u32(target, FLASHCTRL0_WRADDR, addr);
- if (ret != ERROR_OK)
- return ret;
-
- /* Write the inital unlock value to KEY */
- ret = target_write_u32(target, FLASHCTRL0_KEY,
- FLASHCTRL0_KEY_INITIAL_UNLOCK);
- if (ret != ERROR_OK)
- return ret;
-
- /* Write the single unlock value to KEY */
- ret = target_write_u32(target, FLASHCTRL0_KEY,
- FLASHCTRL0_KEY_SINGLE_UNLOCK);
- if (ret != ERROR_OK)
- return ret;
-
- /* Write any value to WRDATA to initiate the page erase */
- ret = target_write_u32(target, FLASHCTRL0_WRDATA, 0);
- if (ret != ERROR_OK)
- return ret;
-
- return ERROR_OK;
- }
-
- alive_sleep(1);
- }
-
- LOG_ERROR("timed out waiting for FLASHCTRL0_CONFIG_BUSYF");
- return ERROR_FAIL;
-}
-
-static int sim3x_flash_erase(struct flash_bank *bank, int first, int last)
-{
- int ret, i;
- uint32_t temp;
- struct sim3x_info *sim3x_info;
- struct target *target;
-
- /* Check if target is halted */
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- sim3x_info = bank->driver_priv;
-
- /* Init MCU after reset */
- if (sim3x_info->need_init) {
- ret = sim3x_init(bank);
- if (ret != ERROR_OK) {
- LOG_ERROR("Failed to init MCU");
- return ret;
- }
- }
-
- /* erase pages */
- for (i = first; i <= last; i++) {
- ret = sim3x_erase_page(bank, bank->sectors[i].offset);
- if (ret != ERROR_OK)
- return ret;
- }
-
- target = bank->target;
-
- /* Wait until busy */
- for (i = 0; i < FLASH_BUSY_TIMEOUT; i++) {
- ret = target_read_u32(target, FLASHCTRL0_CONFIG_ALL, &temp);
- if (ret != ERROR_OK)
- return ret;
-
- if ((temp & FLASHCTRL0_CONFIG_BUSYF_MASK) == 0) { /* If is not busy */
- if ((temp & FLASHCTRL0_CONFIG_ERASEEN_MASK) != 0) { /* If erase is enabled */
- /* Disable Flash Erase Mode */
- ret = target_write_u32(target, FLASHCTRL0_CONFIG_CLR,
- FLASHCTRL0_CONFIG_ERASEEN_MASK);
- if (ret != ERROR_OK)
- return ret;
- }
-
- return ERROR_OK;
- }
-
- alive_sleep(1);
- }
-
- LOG_ERROR("timed out waiting for FLASHCTRL0_CONFIG_BUSYF");
- return ERROR_FAIL;
-}
-
-static int sim3x_write_block(struct flash_bank *bank, const uint8_t *buf,
- uint32_t offset, uint32_t count) /* count is count of half words (2 bytes)! */
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[5];
- struct armv7m_algorithm armv7m_info;
- int ret = ERROR_OK;
-
- /* see contrib/loaders/flash/sim3x.s for src */
-
- static const uint8_t sim3x_flash_write_code[] = {
- /* Write the initial unlock value to KEY (0xA5) */
- 0xA5, 0x26, /* movs r6, #INITIAL_UNLOCK */
- 0xC0, 0xF8, 0xC0, 0x60, /* str r6, [r0, #FLASHCTRL_KEY] */
-
- /* Write the multiple unlock value to KEY (0xF2) */
- 0xF2, 0x26, /* movs r6, #MULTIPLE_UNLOCK */
- 0xC0, 0xF8, 0xC0, 0x60, /* str r6, [r0, #FLASHCTRL_KEY] */
-
- /* wait_fifo: */
- 0x16, 0x68, /* ldr r6, [r2, #0] */
- 0x00, 0x2E, /* cmp r6, #0 */
- 0x16, 0xD0, /* beq exit */
- 0x55, 0x68, /* ldr r5, [r2, #4] */
- 0xB5, 0x42, /* cmp r5, r6 */
- 0xF9, 0xD0, /* beq wait_fifo */
-
- /* wait for BUSYF flag */
- /* wait_busy1: */
- 0x06, 0x68, /* ldr r6, [r0, #FLASHCTRL_CONFIG] */
- 0x16, 0xF4, 0x80, 0x1F, /* tst r6, #BUSYF */
- 0xFB, 0xD1, /* bne wait_busy1 */
-
- /* Write the destination address to WRADDR */
- 0xC0, 0xF8, 0xA0, 0x40, /* str r4, [r0, #FLASHCTRL_WRADDR] */
-
- /* Write the data half-word to WRDATA in right-justified format */
- 0x2E, 0x88, /* ldrh r6, [r5] */
- 0xC0, 0xF8, 0xB0, 0x60, /* str r6, [r0, #FLASHCTRL_WRDATA] */
-
- 0x02, 0x35, /* adds r5, #2 */
- 0x02, 0x34, /* adds r4, #2 */
-
- /* wrap rp at end of buffer */
- 0x9D, 0x42, /* cmp r5, r3 */
- 0x01, 0xD3, /* bcc no_wrap */
- 0x15, 0x46, /* mov r5, r2 */
- 0x08, 0x35, /* adds r5, #8 */
-
- /* no_wrap: */
- 0x55, 0x60, /* str r5, [r2, #4] */
- 0x49, 0x1E, /* subs r1, r1, #1 */
- 0x00, 0x29, /* cmp r1, #0 */
- 0x00, 0xD0, /* beq exit */
- 0xE5, 0xE7, /* b wait_fifo */
-
- /* exit: */
- 0x5A, 0x26, /* movs r6, #MULTIPLE_LOCK */
- 0xC0, 0xF8, 0xC0, 0x60, /* str r6, [r0, #FLASHCTRL_KEY] */
-
- /* wait for BUSYF flag */
- /* wait_busy2: */
- 0x06, 0x68, /* ldr r6, [r0, #FLASHCTRL_CONFIG] */
- 0x16, 0xF4, 0x80, 0x1F, /* tst r6, #BUSYF */
- 0xFB, 0xD1, /* bne wait_busy2 */
-
- 0x00, 0xBE /* bkpt #0 */
- };
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(sim3x_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- ret = target_write_buffer(target, write_algorithm->address,
- sizeof(sim3x_flash_write_code), sim3x_flash_write_code);
- if (ret != ERROR_OK)
- return ret;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- buffer_size &= ~1UL; /* Make sure it's 2 byte aligned */
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm
- */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* flash base */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer start */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[4], "r4", 32, PARAM_IN_OUT); /* target address */
-
- buf_set_u32(reg_params[0].value, 0, 32, FLASHCTRL0_CONFIG_ALL);
- buf_set_u32(reg_params[1].value, 0, 32, count);
- buf_set_u32(reg_params[2].value, 0, 32, source->address);
- buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[4].value, 0, 32, address);
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- ret = target_run_flash_async_algorithm(target, buf, count, 2, 0, NULL, 5,
- reg_params, source->address, source->size, write_algorithm->address,
- 0, &armv7m_info);
-
- if (ret == ERROR_FLASH_OPERATION_FAILED) {
- LOG_ERROR("flash write failed at address 0x%"PRIx32,
- buf_get_u32(reg_params[4].value, 0, 32));
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return ret;
-}
-
-static int sim3x_flash_write(struct flash_bank *bank, const uint8_t * buffer, uint32_t offset, uint32_t count)
-{
- int ret;
- struct target *target;
- struct sim3x_info *sim3x_info;
- uint8_t *new_buffer = NULL;
-
- target = bank->target;
-
- /* Check if target is halted */
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- sim3x_info = bank->driver_priv;
-
- if (sim3x_info->flash_locked) {
- LOG_ERROR("Falsh is locked");
- return ERROR_FAIL;
- }
-
- /* Init MCU after reset */
- if (sim3x_info->need_init) {
- ret = sim3x_init(bank);
- if (ret != ERROR_OK)
- return ret;
- }
-
- if (offset & 0x1) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- if (count & 0x1) {
- uint32_t old_count = count;
- count++;
- new_buffer = malloc(count);
-
- if (new_buffer == NULL) {
- LOG_ERROR("odd number of bytes to write and no memory "
- "for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32
- " and padding with 0xff", old_count, count);
-
- new_buffer[count - 1] = 0xff;
- buffer = memcpy(new_buffer, buffer, old_count);
- }
-
- ret = sim3x_write_block(bank, buffer, offset, count / 2);
- free(new_buffer);
- return ret;
-}
-
-static int sim3x_flash_lock_check(struct flash_bank *bank)
-{
- int ret;
- uint32_t lock_word;
- struct sim3x_info *sim3x_info;
-
- ret = target_read_u32(bank->target, LOCK_WORD_ADDRESS, &lock_word);
- if (ret != ERROR_OK) {
- LOG_ERROR("Can not read Lock Word");
- return ret;
- }
-
- sim3x_info = bank->driver_priv;
- sim3x_info->flash_locked = (lock_word != 0xFFFFFFFF);
-
- return ERROR_OK;
-}
-
-static int sim3x_flash_protect_check(struct flash_bank *bank)
-{
- int ret, i;
- struct sim3x_info *sim3x_info;
-
- /* Check if target is halted */
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- ret = sim3x_flash_lock_check(bank);
- if (ret != ERROR_OK)
- return ret;
-
- sim3x_info = bank->driver_priv;
-
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_protected = sim3x_info->flash_locked;
-
- return ERROR_OK;
-}
-
-static int sim3x_flash_protect(struct flash_bank *bank, int set, int first, int last)
-{
- int ret;
- uint8_t lock_word[4];
- struct sim3x_info *sim3x_info;
- struct target *target;
-
- target = bank->target;
-
- /* Check if target is halted */
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (first != 0 || last != bank->num_sectors - 1) {
- LOG_ERROR("Flash does not support finer granularity");
- return ERROR_FAIL;
- }
-
- sim3x_info = bank->driver_priv;
-
- if (set) {
- if (sim3x_info->flash_locked) {
- LOG_INFO("Flash is already locked");
- return ERROR_OK;
- }
-
- /* Lock Flash */
- target_buffer_set_u32(target, lock_word, 0xFFFFFFFE);
- ret = sim3x_flash_write(bank, lock_word, LOCK_WORD_ADDRESS, 4);
- if (ret != ERROR_OK)
- return ret;
-
- } else {
- /* Flash is unlocked by an erase operation */
- ret = sim3x_flash_erase(bank, 0, 0);
- if (ret != ERROR_OK)
- return ret;
- }
-
- ret = sim3x_flash_protect_check(bank);
- if (ret != ERROR_OK)
- return ret;
-
- if (set) {
- if (sim3x_info->flash_locked) {
- LOG_INFO("Flash locked");
- return ERROR_OK;
- } else {
- LOG_ERROR("Flash lock error");
- return ERROR_FAIL;
- }
- } else {
- if (sim3x_info->flash_locked) {
- LOG_ERROR("Flash unlock error");
- return ERROR_FAIL;
- } else {
- LOG_INFO("Flash unlocked");
- return ERROR_OK;
- }
- }
-}
-
-static int sim3x_read_deviceid(struct flash_bank *bank)
-{
- int ret;
- struct sim3x_info *sim3x_info;
-
- uint32_t device_id;
- int part_number;
- char part_num_string[4];
-
- sim3x_info = bank->driver_priv;
-
- /* MCU check */
- ret = target_read_u32(bank->target, DEVICEID0_DEVICEID2, &device_id);
- if (ret != ERROR_OK)
- return ret;
-
- /* Device ID should be 'M3' */
- if (device_id != 0x00004D33)
- return ERROR_FAIL;
-
- /* Family and Part number */
- ret = target_read_u32(bank->target, DEVICEID0_DEVICEID1, &device_id);
- if (ret != ERROR_OK)
- return ret;
-
- part_num_string[0] = device_id >> 16;
- part_num_string[1] = device_id >> 8;
- part_num_string[2] = device_id;
- part_num_string[3] = 0;
-
- part_number = atoi(part_num_string);
-
- /* Part Number should be between 100 and 999 */
- if (!isalpha(device_id >> 24) || part_number < 100 || part_number > 999)
- return ERROR_FAIL;
-
- sim3x_info->part_family = device_id >> 24;
- sim3x_info->part_number = part_number;
-
- /* Package and Revision */
- ret = target_read_u32(bank->target, DEVICEID0_DEVICEID0, &device_id);
- if (ret != ERROR_OK)
- return ret;
-
- sim3x_info->device_package[0] = device_id >> 24;
- sim3x_info->device_package[1] = device_id >> 16;
- sim3x_info->device_package[2] = device_id >> 8;
- sim3x_info->device_package[3] = 0;
-
- sim3x_info->device_revision = device_id;
-
- return ERROR_OK;
-}
-
-static int sim3x_parse_part_info(struct sim3x_info *sim3x_info)
-{
- switch (sim3x_info->part_number) {
- case 134:
- case 136:
- sim3x_info->flash_size_kb = 32;
- break;
- case 144:
- case 146:
- sim3x_info->flash_size_kb = 64;
- break;
- case 154:
- case 156:
- case 157:
- sim3x_info->flash_size_kb = 128;
- break;
- case 164:
- case 166:
- case 167:
- sim3x_info->flash_size_kb = 256;
- break;
- default:
- LOG_ERROR("Unknown Part number %d", sim3x_info->part_number);
- sim3x_info->part_number = 0;
- return ERROR_FAIL;
- }
-
- switch (sim3x_info->part_family) {
- case 'c':
- case 'C':
- LOG_INFO("SiM3C%d detected", sim3x_info->part_number);
- break;
- case 'u':
- case 'U':
- LOG_INFO("SiM3U%d detected", sim3x_info->part_number);
- break;
- case 'l':
- case 'L':
- LOG_INFO("SiM3L%d detected", sim3x_info->part_number);
- break;
- default:
- LOG_ERROR("Unsupported MCU family %c", sim3x_info->part_family);
- sim3x_info->part_family = 0;
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int sim3x_read_info(struct flash_bank *bank)
-{
- int ret;
- struct sim3x_info *sim3x_info;
- uint32_t cpuid;
-
- sim3x_info = bank->driver_priv;
-
- /* Core check */
- ret = target_read_u32(bank->target, CPUID, &cpuid);
- if (ret != ERROR_OK) {
- LOG_ERROR("Failed to read CPU ID");
- return ret;
- }
-
- if (((cpuid >> 4) & 0xfff) != 0xc23) {
- LOG_ERROR("Target is not CortexM3");
- return ERROR_FAIL;
- }
-
- /* Read info from chip */
- ret = sim3x_read_deviceid(bank);
- if (ret == ERROR_OK) {
- ret = sim3x_parse_part_info(sim3x_info);
- if (ret != ERROR_OK) {
- LOG_ERROR("Failed to parse info from MCU");
- return ERROR_FAIL;
- }
- } else {
- LOG_WARNING("Failed to read info from MCU, using info from flash bank parameters");
-
- /* Check if flash size is given in flash bank command */
- if (!bank->size) {
- LOG_ERROR("Flash size not set in the flash bank command");
- return ERROR_FAIL;
- }
-
- /* Convert bank size to kb */
- sim3x_info->flash_size_kb = bank->size / 1024;
- }
-
- LOG_INFO("Flash size = %dKB", sim3x_info->flash_size_kb);
-
- return ERROR_OK;
-}
-
-static int sim3x_probe(struct flash_bank *bank)
-{
- int ret, i;
- struct sim3x_info *sim3x_info;
-
- sim3x_info = bank->driver_priv;
- sim3x_info->probed = false;
- sim3x_info->need_init = true;
-
- /* Read info from chip */
- ret = sim3x_read_info(bank);
- if (ret != ERROR_OK)
- return ret;
-
- ret = sim3x_flash_lock_check(bank);
- if (ret != ERROR_OK)
- return ret;
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->base = FLASH_BASE_ADDRESS;
- bank->size = sim3x_info->flash_size_kb * SIM3X_FLASH_PAGE_SIZE;
- bank->num_sectors = SIM3X_FLASH_PAGE_SIZE;
- bank->sectors = malloc(sizeof(struct flash_sector) * sim3x_info->flash_size_kb);
-
- for (i = 0; i < sim3x_info->flash_size_kb; i++) {
- bank->sectors[i].offset = i * SIM3X_FLASH_PAGE_SIZE;
- bank->sectors[i].size = SIM3X_FLASH_PAGE_SIZE;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = sim3x_info->flash_locked;
- }
-
- sim3x_info->probed = true;
-
- return ERROR_OK;
-}
-
-static int sim3x_auto_probe(struct flash_bank *bank)
-{
- struct sim3x_info *sim3x_info;
-
- sim3x_info = bank->driver_priv;
-
- if (sim3x_info->probed) {
- sim3x_info->need_init = true;
- return ERROR_OK;
- } else {
- return sim3x_probe(bank);
- }
-}
-
-static int sim3x_flash_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- int ret;
- int printed = 0;
- struct sim3x_info *sim3x_info;
-
- sim3x_info = bank->driver_priv;
-
- /* Read info about chip */
- ret = sim3x_read_info(bank);
- if (ret != ERROR_OK)
- return ret;
-
- /* Part */
- if (sim3x_info->part_family && sim3x_info->part_number) {
- printed = snprintf(buf, buf_size, "SiM3%c%d", sim3x_info->part_family, sim3x_info->part_number);
- buf += printed;
- buf_size -= printed;
-
- if (buf_size <= 0)
- return ERROR_BUF_TOO_SMALL;
-
- /* Revision */
- if (sim3x_info->device_revision && sim3x_info->device_revision <= 'Z' - 'A') {
- printed = snprintf(buf, buf_size, "-%c", sim3x_info->device_revision + 'A');
- buf += printed;
- buf_size -= printed;
-
- if (buf_size <= 0)
- return ERROR_BUF_TOO_SMALL;
-
- /* Package */
- printed = snprintf(buf, buf_size, "-G%s", sim3x_info->device_package);
- buf += printed;
- buf_size -= printed;
-
- if (buf_size <= 0)
- return ERROR_BUF_TOO_SMALL;
- }
- }
-
- /* Print flash size */
- printed = snprintf(buf, buf_size, " flash_size = %dKB", sim3x_info->flash_size_kb);
- buf_size -= printed;
-
- if (buf_size <= 0)
- return ERROR_BUF_TOO_SMALL;
-
- return ERROR_OK;
-}
-/**
- * reg 31:8 - no effect
- * reg 7:4 - bank
- * reg 3:2 - register
- * reg 1:0 - no effect
- */
-static int ap_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
-{
- int retval;
- LOG_DEBUG("DAP_REG[0x%02x] <- %08" PRIX32, reg, value);
-
- retval = dap_queue_ap_write(dap_ap(dap, SIM3X_AP), reg, value);
- if (retval != ERROR_OK) {
- LOG_DEBUG("DAP: failed to queue a write request");
- return retval;
- }
-
- retval = dap_run(dap);
- if (retval != ERROR_OK) {
- LOG_DEBUG("DAP: dap_run failed");
- return retval;
- }
-
- return ERROR_OK;
-}
-
-static int ap_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
-{
- int retval;
-
- retval = dap_queue_ap_read(dap_ap(dap, SIM3X_AP), reg, result);
- if (retval != ERROR_OK) {
- LOG_DEBUG("DAP: failed to queue a read request");
- return retval;
- }
-
- retval = dap_run(dap);
- if (retval != ERROR_OK) {
- LOG_DEBUG("DAP: dap_run failed");
- return retval;
- }
-
- LOG_DEBUG("DAP_REG[0x%02x]: %08" PRIX32, reg, *result);
- return ERROR_OK;
-}
-
-static int ap_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value, int timeout)
-{
- uint32_t val;
- int retval;
-
- do {
- retval = ap_read_register(dap, reg, &val);
- if (retval != ERROR_OK || (val & mask) == value)
- return retval;
-
- alive_sleep(1);
- } while (timeout--);
-
- LOG_DEBUG("DAP: polling timed out");
- return ERROR_FAIL;
-}
-
-COMMAND_HANDLER(sim3x_mass_erase)
-{
- uint32_t val;
- int ret;
-
- struct target *target = get_current_target(CMD_CTX);
- struct cortex_m_common *cortex_m = target_to_cm(target);
- struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
-
- if (dap == NULL) {
- /* Used debug interface doesn't support direct DAP access */
- LOG_ERROR("mass_erase can't be used by this debug interface");
- return ERROR_FAIL;
- }
-
- ret = ap_read_register(dap, SIM3X_AP_ID, &val);
- if (ret != ERROR_OK)
- return ret;
-
- if (val != SIM3X_AP_ID_VALUE) {
- LOG_ERROR("Wrong SIM3X_AP_ID");
- return ERROR_FAIL;
- }
-
- /* Mass erase sequence */
- ret = ap_write_register(dap, SIM3X_AP_CTRL1, SIM3X_AP_CTRL1_RESET_REQ);
- if (ret != ERROR_OK)
- return ret;
-
- ret = ap_write_register(dap, SIM3X_AP_CTRL1, SIM3X_AP_CTRL1_RESET_REQ | SIM3X_AP_CTRL1_MASS_ERASE_REQ);
- if (ret != ERROR_OK)
- return ret;
-
- ret = ap_poll_register(dap, SIM3X_AP_CTRL1, SIM3X_AP_CTRL1_MASS_ERASE_REQ, 0x00000000, FLASH_BUSY_TIMEOUT);
- if (ret != ERROR_OK)
- return ret;
-
- ret = ap_write_register(dap, SIM3X_AP_CTRL1, 0x00000000); /* clear SIM3X_AP_CTRL1_RESET_REQ */
- if (ret != ERROR_OK)
- return ret;
-
- LOG_INFO("Mass erase success");
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(sim3x_lock)
-{
- uint32_t val;
- int ret;
-
- struct target *target = get_current_target(CMD_CTX);
- struct cortex_m_common *cortex_m = target_to_cm(target);
- struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
-
- if (dap == NULL) {
- /* Used debug interface doesn't support direct DAP access */
- LOG_INFO("Target can't by unlocked by this debug interface");
-
- /* Core check */
- ret = target_read_u32(target, CPUID, &val);
- if (ret != ERROR_OK)
- return ret;
-
- if ((val & CPUID_CHECK_VALUE_MASK) != CPUID_CHECK_VALUE) {
- LOG_ERROR("Target is not ARM CortexM3 or is already locked");
- return ERROR_FAIL;
- }
- } else {
- /* check SIM3X_AP_ID */
- ret = ap_read_register(dap, SIM3X_AP_ID, &val);
- if (ret != ERROR_OK)
- return ret;
-
- if (val != SIM3X_AP_ID_VALUE) {
- LOG_ERROR("Wrong SIM3X_AP_ID");
- return ERROR_FAIL;
- }
-
- /* check if locked */
- ret = target_read_u32(target, CPUID, &val);
- /* if correct value is read, then it will continue */
- if (ret != ERROR_OK || (val & CPUID_CHECK_VALUE_MASK) != CPUID_CHECK_VALUE) {
- /* if correct value is'n read, then it will check SIM3X_AP_INIT_STAT register */
- ret = ap_read_register(dap, SIM3X_AP_INIT_STAT, &val);
- if (ret != ERROR_OK)
- return ret;
-
- if (val & SIM3X_AP_INIT_STAT_LOCK) {
- LOG_INFO("Target is already locked");
- return ERROR_OK;
- } else {
- LOG_ERROR("Target doesn't seem to be locked but memory was not read correct");
- return ERROR_FAIL;
- }
- }
- }
-
- ret = target_read_u32(target, LOCK_WORD_ADDRESS, &val);
- if (ret != ERROR_OK)
- return ret;
-
- if (val == LOCK_WORD_MCU_UNLOCKED) {
- /* Lock Flash */
- uint8_t lock_word[4];
- target_buffer_set_u32(target, lock_word, 0xFFFFFFFE);
-
- /* Get Flash Bank */
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
-
- ret = sim3x_flash_write(bank, lock_word, LOCK_WORD_ADDRESS, 4);
- if (ERROR_OK != ret)
- return ret;
-
- LOG_INFO("Target is successfully locked");
- return ERROR_OK;
- } else if (val == LOCK_WORD_MCU_UNLOCKED_BY_FIRMWARE) {
- /* Can't by locked again without erase, because LOCK_WORD is in FLASH */
- LOG_ERROR("Target is unlocked by firmware and can't by locked again without the lock page erase or mass erase");
- return ERROR_FAIL;
- } else {
- LOG_ERROR("Unexpected lock word value");
-
- /* SIM3X_AP_ID_VALUE is not checked */
- if (dap == NULL)
- LOG_INFO("Maybe this isn't a SiM3x MCU");
-
- return ERROR_FAIL;
- }
-}
-
-static const struct command_registration sim3x_exec_command_handlers[] = {
- {
- .name = "mass_erase",
- .mode = COMMAND_EXEC,
- .help = "Erase the complete flash",
- .usage = "",
- .handler = sim3x_mass_erase,
- },
- {
- .name = "lock",
- .mode = COMMAND_EXEC,
- .help = "Locks the flash. Unlock by mass erase",
- .usage = "",
- .handler = sim3x_lock,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration sim3x_command_handlers[] = {
- {
- .name = "sim3x",
- .mode = COMMAND_ANY,
- .help = "sim3x flash command group",
- .usage = "",
- .chain = sim3x_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver sim3x_flash = {
- .name = "sim3x",
- .commands = sim3x_command_handlers,
- .flash_bank_command = sim3x_flash_bank_command,
- .erase = sim3x_flash_erase,
- .protect = sim3x_flash_protect,
- .write = sim3x_flash_write,
- .read = default_flash_read,
- .probe = sim3x_probe,
- .auto_probe = sim3x_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = sim3x_flash_protect_check,
- .info = sim3x_flash_info
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/spi.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/spi.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/spi.c
deleted file mode 100755
index c8f51b9..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/spi.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2012 by George Harris *
- * george@luminairecoffee.com *
- * *
- * Copyright (C) 2010 by Antonio Borneo *
- * borneo.antonio@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "spi.h"
-#include <jtag/jtag.h>
-
- /* Shared table of known SPI flash devices for SPI-based flash drivers. Taken
- * from device datasheets and Linux SPI flash drivers. */
-const struct flash_device flash_devices[] = {
- /* name, erase_cmd, chip_erase_cmd, device_id, pagesize, sectorsize, size_in_bytes */
- FLASH_ID("st m25p05", 0xd8, 0xc7, 0x00102020, 0x80, 0x8000, 0x10000),
- FLASH_ID("st m25p10", 0xd8, 0xc7, 0x00112020, 0x80, 0x8000, 0x20000),
- FLASH_ID("st m25p20", 0xd8, 0xc7, 0x00122020, 0x100, 0x10000, 0x40000),
- FLASH_ID("st m25p40", 0xd8, 0xc7, 0x00132020, 0x100, 0x10000, 0x80000),
- FLASH_ID("st m25p80", 0xd8, 0xc7, 0x00142020, 0x100, 0x10000, 0x100000),
- FLASH_ID("st m25p16", 0xd8, 0xc7, 0x00152020, 0x100, 0x10000, 0x200000),
- FLASH_ID("st m25p32", 0xd8, 0xc7, 0x00162020, 0x100, 0x10000, 0x400000),
- FLASH_ID("st m25p64", 0xd8, 0xc7, 0x00172020, 0x100, 0x10000, 0x800000),
- FLASH_ID("st m25p128", 0xd8, 0xc7, 0x00182020, 0x100, 0x40000, 0x1000000),
- FLASH_ID("st m45pe10", 0xd8, 0xd8, 0x00114020, 0x100, 0x10000, 0x20000),
- FLASH_ID("st m45pe20", 0xd8, 0xd8, 0x00124020, 0x100, 0x10000, 0x40000),
- FLASH_ID("st m45pe40", 0xd8, 0xd8, 0x00134020, 0x100, 0x10000, 0x80000),
- FLASH_ID("st m45pe80", 0xd8, 0xd8, 0x00144020, 0x100, 0x10000, 0x100000),
- FLASH_ID("sp s25fl004", 0xd8, 0xc7, 0x00120201, 0x100, 0x10000, 0x80000),
- FLASH_ID("sp s25fl008", 0xd8, 0xc7, 0x00130201, 0x100, 0x10000, 0x100000),
- FLASH_ID("sp s25fl016", 0xd8, 0xc7, 0x00140201, 0x100, 0x10000, 0x200000),
- FLASH_ID("sp s25fl116k", 0xd8, 0xc7, 0x00154001, 0x100, 0x10000, 0x200000),
- FLASH_ID("sp s25fl032", 0xd8, 0xc7, 0x00150201, 0x100, 0x10000, 0x400000),
- FLASH_ID("sp s25fl132k", 0xd8, 0xc7, 0x00164001, 0x100, 0x10000, 0x400000),
- FLASH_ID("sp s25fl064", 0xd8, 0xc7, 0x00160201, 0x100, 0x10000, 0x800000),
- FLASH_ID("sp s25fl164k", 0xd8, 0xc7, 0x00174001, 0x100, 0x10000, 0x800000),
- FLASH_ID("sp s25fl128", 0xd8, 0xc7, 0x00182001, 0x100, 0x10000, 0x1000000),
- FLASH_ID("sp s25fl256", 0xd8, 0xc7, 0x00190201, 0x100, 0x10000, 0x2000000),
- FLASH_ID("atmel 25f512", 0x52, 0xc7, 0x0065001f, 0x80, 0x8000, 0x10000),
- FLASH_ID("atmel 25f1024", 0x52, 0x62, 0x0060001f, 0x100, 0x8000, 0x20000),
- FLASH_ID("atmel 25f2048", 0x52, 0x62, 0x0063001f, 0x100, 0x10000, 0x40000),
- FLASH_ID("atmel 25f4096", 0x52, 0x62, 0x0064001f, 0x100, 0x10000, 0x80000),
- FLASH_ID("atmel 25fs040", 0xd7, 0xc7, 0x0004661f, 0x100, 0x10000, 0x80000),
- FLASH_ID("mac 25l512", 0xd8, 0xc7, 0x001020c2, 0x010, 0x10000, 0x10000),
- FLASH_ID("mac 25l1005", 0xd8, 0xc7, 0x001120c2, 0x010, 0x10000, 0x20000),
- FLASH_ID("mac 25l2005", 0xd8, 0xc7, 0x001220c2, 0x010, 0x10000, 0x40000),
- FLASH_ID("mac 25l4005", 0xd8, 0xc7, 0x001320c2, 0x010, 0x10000, 0x80000),
- FLASH_ID("mac 25l8005", 0xd8, 0xc7, 0x001420c2, 0x010, 0x10000, 0x100000),
- FLASH_ID("mac 25l1605", 0xd8, 0xc7, 0x001520c2, 0x100, 0x10000, 0x200000),
- FLASH_ID("mac 25l3205", 0xd8, 0xc7, 0x001620c2, 0x100, 0x10000, 0x400000),
- FLASH_ID("mac 25l6405", 0xd8, 0xc7, 0x001720c2, 0x100, 0x10000, 0x800000),
- FLASH_ID("micron n25q064", 0xd8, 0xc7, 0x0017ba20, 0x100, 0x10000, 0x800000),
- FLASH_ID("micron n25q128", 0xd8, 0xc7, 0x0018ba20, 0x100, 0x10000, 0x1000000),
- FLASH_ID("win w25q80bv", 0xd8, 0xc7, 0x001440ef, 0x100, 0x10000, 0x100000),
- FLASH_ID("win w25q32fv", 0xd8, 0xc7, 0x001640ef, 0x100, 0x10000, 0x400000),
- FLASH_ID("win w25q32dw", 0xd8, 0xc7, 0x001660ef, 0x100, 0x10000, 0x400000),
- FLASH_ID("win w25q64cv", 0xd8, 0xc7, 0x001740ef, 0x100, 0x10000, 0x800000),
- FLASH_ID("win w25q128fv", 0xd8, 0xc7, 0x001840ef, 0x100, 0x10000, 0x1000000),
- FLASH_ID("gd gd25q20", 0x20, 0xc7, 0x00c84012, 0x100, 0x1000, 0x80000),
- FLASH_ID("gd gd25q16c", 0xd8, 0xc7, 0x001540c8, 0x100, 0x10000, 0x200000),
- FLASH_ID("gd gd25q32c", 0xd8, 0xc7, 0x001640c8, 0x100, 0x10000, 0x400000),
- FLASH_ID("gd gd25q128c", 0xd8, 0xc7, 0x001840c8, 0x100, 0x10000, 0x1000000),
- FLASH_ID(NULL, 0, 0, 0, 0, 0, 0)
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/spi.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/spi.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/spi.h
deleted file mode 100755
index 6e939b7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/spi.h
+++ /dev/null
@@ -1,58 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2012 by George Harris *
- * george@luminairecoffee.com *
- * *
- * Copyright (C) 2010 by Antonio Borneo *
- * borneo.antonio@gmail.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/* data structure to maintain flash ids from different vendors */
-struct flash_device {
- char *name;
- uint8_t erase_cmd;
- uint8_t chip_erase_cmd;
- uint32_t device_id;
- uint32_t pagesize;
- unsigned long sectorsize;
- unsigned long size_in_bytes;
-};
-
-#define FLASH_ID(n, es, ces, id, psize, ssize, size) \
-{ \
- .name = n, \
- .erase_cmd = es, \
- .chip_erase_cmd = ces, \
- .device_id = id, \
- .pagesize = psize, \
- .sectorsize = ssize, \
- .size_in_bytes = size \
-}
-
-extern const struct flash_device flash_devices[];
-
-/* fields in SPI flash status register */
-#define SPIFLASH_BSY_BIT 0x00000001 /* WIP Bit of SPI SR on SMI SR */
-#define SPIFLASH_WE_BIT 0x00000002 /* WEL Bit of SPI SR on SMI SR */
-
-/* SPI Flash Commands */
-#define SPIFLASH_READ_ID 0x9F /* Read Flash Identification */
-#define SPIFLASH_READ_STATUS 0x05 /* Read Status Register */
-#define SPIFLASH_WRITE_ENABLE 0x06 /* Write Enable */
-#define SPIFLASH_PAGE_PROGRAM 0x02 /* Page Program */
-#define SPIFLASH_FAST_READ 0x0B /* Fast Read */
-#define SPIFLASH_READ 0x03 /* Normal Read */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stellaris.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stellaris.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stellaris.c
deleted file mode 100755
index 0f50b41..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stellaris.c
+++ /dev/null
@@ -1,1457 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Magnus Lundin *
- * lundin@mlu.mine.nu *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/***************************************************************************
-* STELLARIS flash is tested on LM3S811, LM3S6965, LM3s3748, more.
-***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "jtag/interface.h"
-#include "imp.h"
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-#define DID0_VER(did0) ((did0 >> 28)&0x07)
-
-/* STELLARIS control registers */
-#define SCB_BASE 0x400FE000
-#define DID0 0x000
-#define DID1 0x004
-#define DC0 0x008
-#define DC1 0x010
-#define DC2 0x014
-#define DC3 0x018
-#define DC4 0x01C
-
-#define RIS 0x050
-#define RCC 0x060
-#define PLLCFG 0x064
-#define RCC2 0x070
-#define NVMSTAT 0x1a0
-
-/* "legacy" flash memory protection registers (64KB max) */
-#define FMPRE 0x130
-#define FMPPE 0x134
-
-/* new flash memory protection registers (for more than 64KB) */
-#define FMPRE0 0x200 /* PRE1 = PRE0 + 4, etc */
-#define FMPPE0 0x400 /* PPE1 = PPE0 + 4, etc */
-
-#define USECRL 0x140
-
-#define FLASH_CONTROL_BASE 0x400FD000
-#define FLASH_FMA (FLASH_CONTROL_BASE | 0x000)
-#define FLASH_FMD (FLASH_CONTROL_BASE | 0x004)
-#define FLASH_FMC (FLASH_CONTROL_BASE | 0x008)
-#define FLASH_CRIS (FLASH_CONTROL_BASE | 0x00C)
-#define FLASH_CIM (FLASH_CONTROL_BASE | 0x010)
-#define FLASH_MISC (FLASH_CONTROL_BASE | 0x014)
-#define FLASH_FSIZE (FLASH_CONTROL_BASE | 0xFC0)
-#define FLASH_SSIZE (FLASH_CONTROL_BASE | 0xFC4)
-
-#define AMISC 1
-#define PMISC 2
-
-#define AMASK 1
-#define PMASK 2
-
-/* Flash Controller Command bits */
-#define FMC_WRKEY (0xA442 << 16)
-#define FMC_COMT (1 << 3)
-#define FMC_MERASE (1 << 2)
-#define FMC_ERASE (1 << 1)
-#define FMC_WRITE (1 << 0)
-
-/* STELLARIS constants */
-
-/* values to write in FMA to commit write-"once" values */
-#define FLASH_FMA_PRE(x) (2 * (x)) /* for FMPPREx */
-#define FLASH_FMA_PPE(x) (2 * (x) + 1) /* for FMPPPEx */
-
-static void stellaris_read_clock_info(struct flash_bank *bank);
-static int stellaris_mass_erase(struct flash_bank *bank);
-
-struct stellaris_flash_bank {
- /* chip id register */
- uint32_t did0;
- uint32_t did1;
- uint32_t dc0;
- uint32_t dc1;
- uint32_t fsize;
- uint32_t ssize;
-
- const char *target_name;
- uint8_t target_class;
-
- uint32_t sramsiz;
- /* flash geometry */
- uint32_t num_pages;
- uint32_t pagesize;
-
- /* main clock status */
- uint32_t rcc;
- uint32_t rcc2;
- uint8_t mck_valid;
- uint8_t xtal_mask;
- uint32_t iosc_freq;
- uint32_t mck_freq;
- const char *iosc_desc;
- const char *mck_desc;
-};
-
-/* Autogenerated by contrib/gen-stellaris-part-header.pl */
-/* From Stellaris Firmware Development Package revision 9453 */
-static const struct {
- uint8_t class;
- uint8_t partno;
- const char *partname;
-} StellarisParts[] = {
- {0x00, 0x01, "LM3S101"},
- {0x00, 0x02, "LM3S102"},
- {0x01, 0xBF, "LM3S1110"},
- {0x01, 0xC3, "LM3S1133"},
- {0x01, 0xC5, "LM3S1138"},
- {0x01, 0xC1, "LM3S1150"},
- {0x01, 0xC4, "LM3S1162"},
- {0x01, 0xC2, "LM3S1165"},
- {0x01, 0xEC, "LM3S1166"},
- {0x01, 0xC6, "LM3S1332"},
- {0x01, 0xBC, "LM3S1435"},
- {0x01, 0xBA, "LM3S1439"},
- {0x01, 0xBB, "LM3S1512"},
- {0x01, 0xC7, "LM3S1538"},
- {0x01, 0xDB, "LM3S1601"},
- {0x03, 0x06, "LM3S1607"},
- {0x01, 0xDA, "LM3S1608"},
- {0x01, 0xC0, "LM3S1620"},
- {0x04, 0xCD, "LM3S1621"},
- {0x03, 0x03, "LM3S1625"},
- {0x03, 0x04, "LM3S1626"},
- {0x03, 0x05, "LM3S1627"},
- {0x01, 0xB3, "LM3S1635"},
- {0x01, 0xEB, "LM3S1636"},
- {0x01, 0xBD, "LM3S1637"},
- {0x04, 0xB1, "LM3S1651"},
- {0x01, 0xB9, "LM3S1751"},
- {0x03, 0x10, "LM3S1776"},
- {0x04, 0x16, "LM3S1811"},
- {0x04, 0x3D, "LM3S1816"},
- {0x01, 0xB4, "LM3S1850"},
- {0x01, 0xDD, "LM3S1911"},
- {0x01, 0xDC, "LM3S1918"},
- {0x01, 0xB7, "LM3S1937"},
- {0x01, 0xBE, "LM3S1958"},
- {0x01, 0xB5, "LM3S1960"},
- {0x01, 0xB8, "LM3S1968"},
- {0x01, 0xEA, "LM3S1969"},
- {0x04, 0xCE, "LM3S1B21"},
- {0x06, 0xCA, "LM3S1C21"},
- {0x06, 0xCB, "LM3S1C26"},
- {0x06, 0x98, "LM3S1C58"},
- {0x06, 0xB0, "LM3S1D21"},
- {0x06, 0xCC, "LM3S1D26"},
- {0x06, 0x1D, "LM3S1F11"},
- {0x06, 0x1B, "LM3S1F16"},
- {0x06, 0xAF, "LM3S1G21"},
- {0x06, 0x95, "LM3S1G58"},
- {0x06, 0x1E, "LM3S1H11"},
- {0x06, 0x1C, "LM3S1H16"},
- {0x04, 0x0F, "LM3S1J11"},
- {0x04, 0x3C, "LM3S1J16"},
- {0x04, 0x0E, "LM3S1N11"},
- {0x04, 0x3B, "LM3S1N16"},
- {0x04, 0xB2, "LM3S1P51"},
- {0x04, 0x9E, "LM3S1R21"},
- {0x04, 0xC9, "LM3S1R26"},
- {0x04, 0x30, "LM3S1W16"},
- {0x04, 0x2F, "LM3S1Z16"},
- {0x01, 0x51, "LM3S2110"},
- {0x01, 0x84, "LM3S2139"},
- {0x03, 0x39, "LM3S2276"},
- {0x01, 0xA2, "LM3S2410"},
- {0x01, 0x59, "LM3S2412"},
- {0x01, 0x56, "LM3S2432"},
- {0x01, 0x5A, "LM3S2533"},
- {0x01, 0xE1, "LM3S2601"},
- {0x01, 0xE0, "LM3S2608"},
- {0x03, 0x33, "LM3S2616"},
- {0x01, 0x57, "LM3S2620"},
- {0x01, 0x85, "LM3S2637"},
- {0x01, 0x53, "LM3S2651"},
- {0x03, 0x80, "LM3S2671"},
- {0x03, 0x50, "LM3S2678"},
- {0x01, 0xA4, "LM3S2730"},
- {0x01, 0x52, "LM3S2739"},
- {0x03, 0x3A, "LM3S2776"},
- {0x04, 0x6D, "LM3S2793"},
- {0x01, 0xE3, "LM3S2911"},
- {0x01, 0xE2, "LM3S2918"},
- {0x01, 0xED, "LM3S2919"},
- {0x01, 0x54, "LM3S2939"},
- {0x01, 0x8F, "LM3S2948"},
- {0x01, 0x58, "LM3S2950"},
- {0x01, 0x55, "LM3S2965"},
- {0x04, 0x6C, "LM3S2B93"},
- {0x06, 0x94, "LM3S2D93"},
- {0x06, 0x93, "LM3S2U93"},
- {0x00, 0x19, "LM3S300"},
- {0x00, 0x11, "LM3S301"},
- {0x00, 0x1A, "LM3S308"},
- {0x00, 0x12, "LM3S310"},
- {0x00, 0x13, "LM3S315"},
- {0x00, 0x14, "LM3S316"},
- {0x00, 0x17, "LM3S317"},
- {0x00, 0x15, "LM3S328"},
- {0x03, 0x08, "LM3S3634"},
- {0x03, 0x43, "LM3S3651"},
- {0x04, 0xC8, "LM3S3654"},
- {0x03, 0x44, "LM3S3739"},
- {0x03, 0x49, "LM3S3748"},
- {0x03, 0x45, "LM3S3749"},
- {0x04, 0x42, "LM3S3826"},
- {0x04, 0x41, "LM3S3J26"},
- {0x04, 0x40, "LM3S3N26"},
- {0x04, 0x3F, "LM3S3W26"},
- {0x04, 0x3E, "LM3S3Z26"},
- {0x03, 0x81, "LM3S5632"},
- {0x04, 0x0C, "LM3S5651"},
- {0x03, 0x8A, "LM3S5652"},
- {0x04, 0x4D, "LM3S5656"},
- {0x03, 0x91, "LM3S5662"},
- {0x03, 0x96, "LM3S5732"},
- {0x03, 0x97, "LM3S5737"},
- {0x03, 0xA0, "LM3S5739"},
- {0x03, 0x99, "LM3S5747"},
- {0x03, 0xA7, "LM3S5749"},
- {0x03, 0x9A, "LM3S5752"},
- {0x03, 0x9C, "LM3S5762"},
- {0x04, 0x69, "LM3S5791"},
- {0x04, 0x0B, "LM3S5951"},
- {0x04, 0x4E, "LM3S5956"},
- {0x04, 0x68, "LM3S5B91"},
- {0x06, 0x2E, "LM3S5C31"},
- {0x06, 0x2C, "LM3S5C36"},
- {0x06, 0x5E, "LM3S5C51"},
- {0x06, 0x5B, "LM3S5C56"},
- {0x06, 0x5F, "LM3S5D51"},
- {0x06, 0x5C, "LM3S5D56"},
- {0x06, 0x87, "LM3S5D91"},
- {0x06, 0x2D, "LM3S5G31"},
- {0x06, 0x1F, "LM3S5G36"},
- {0x06, 0x5D, "LM3S5G51"},
- {0x06, 0x4F, "LM3S5G56"},
- {0x04, 0x09, "LM3S5K31"},
- {0x04, 0x4A, "LM3S5K36"},
- {0x04, 0x0A, "LM3S5P31"},
- {0x04, 0x48, "LM3S5P36"},
- {0x04, 0xB6, "LM3S5P3B"},
- {0x04, 0x0D, "LM3S5P51"},
- {0x04, 0x4C, "LM3S5P56"},
- {0x04, 0x07, "LM3S5R31"},
- {0x04, 0x4B, "LM3S5R36"},
- {0x04, 0x47, "LM3S5T36"},
- {0x06, 0x7F, "LM3S5U91"},
- {0x04, 0x46, "LM3S5Y36"},
- {0x00, 0x2A, "LM3S600"},
- {0x00, 0x21, "LM3S601"},
- {0x00, 0x2B, "LM3S608"},
- {0x00, 0x22, "LM3S610"},
- {0x01, 0xA1, "LM3S6100"},
- {0x00, 0x23, "LM3S611"},
- {0x01, 0x74, "LM3S6110"},
- {0x00, 0x24, "LM3S612"},
- {0x00, 0x25, "LM3S613"},
- {0x00, 0x26, "LM3S615"},
- {0x00, 0x28, "LM3S617"},
- {0x00, 0x29, "LM3S618"},
- {0x00, 0x27, "LM3S628"},
- {0x01, 0xA5, "LM3S6420"},
- {0x01, 0x82, "LM3S6422"},
- {0x01, 0x75, "LM3S6432"},
- {0x01, 0x76, "LM3S6537"},
- {0x01, 0x71, "LM3S6610"},
- {0x01, 0xE7, "LM3S6611"},
- {0x01, 0xE6, "LM3S6618"},
- {0x01, 0x83, "LM3S6633"},
- {0x01, 0x8B, "LM3S6637"},
- {0x01, 0xA3, "LM3S6730"},
- {0x01, 0x77, "LM3S6753"},
- {0x01, 0xE9, "LM3S6911"},
- {0x01, 0xE8, "LM3S6918"},
- {0x01, 0x89, "LM3S6938"},
- {0x01, 0x72, "LM3S6950"},
- {0x01, 0x78, "LM3S6952"},
- {0x01, 0x73, "LM3S6965"},
- {0x06, 0xAA, "LM3S6C11"},
- {0x06, 0xAC, "LM3S6C65"},
- {0x06, 0x9F, "LM3S6G11"},
- {0x06, 0xAB, "LM3S6G65"},
- {0x00, 0x38, "LM3S800"},
- {0x00, 0x31, "LM3S801"},
- {0x00, 0x39, "LM3S808"},
- {0x00, 0x32, "LM3S811"},
- {0x00, 0x33, "LM3S812"},
- {0x00, 0x34, "LM3S815"},
- {0x00, 0x36, "LM3S817"},
- {0x00, 0x37, "LM3S818"},
- {0x00, 0x35, "LM3S828"},
- {0x01, 0x64, "LM3S8530"},
- {0x01, 0x8E, "LM3S8538"},
- {0x01, 0x61, "LM3S8630"},
- {0x01, 0x63, "LM3S8730"},
- {0x01, 0x8D, "LM3S8733"},
- {0x01, 0x86, "LM3S8738"},
- {0x01, 0x65, "LM3S8930"},
- {0x01, 0x8C, "LM3S8933"},
- {0x01, 0x88, "LM3S8938"},
- {0x01, 0xA6, "LM3S8962"},
- {0x01, 0x62, "LM3S8970"},
- {0x01, 0xD7, "LM3S8971"},
- {0x06, 0xAE, "LM3S8C62"},
- {0x06, 0xAD, "LM3S8G62"},
- {0x04, 0xCF, "LM3S9781"},
- {0x04, 0x67, "LM3S9790"},
- {0x04, 0x6B, "LM3S9792"},
- {0x04, 0x2D, "LM3S9971"},
- {0x04, 0x20, "LM3S9997"},
- {0x04, 0xD0, "LM3S9B81"},
- {0x04, 0x66, "LM3S9B90"},
- {0x04, 0x6A, "LM3S9B92"},
- {0x04, 0x6E, "LM3S9B95"},
- {0x04, 0x6F, "LM3S9B96"},
- {0x04, 0x1D, "LM3S9BN2"},
- {0x04, 0x1E, "LM3S9BN5"},
- {0x04, 0x1F, "LM3S9BN6"},
- {0x06, 0x70, "LM3S9C97"},
- {0x06, 0xA9, "LM3S9D81"},
- {0x06, 0x7E, "LM3S9D90"},
- {0x06, 0x92, "LM3S9D92"},
- {0x06, 0x9D, "LM3S9D96"},
- {0x06, 0x7B, "LM3S9DN5"},
- {0x06, 0x7C, "LM3S9DN6"},
- {0x06, 0x60, "LM3S9G97"},
- {0x06, 0x79, "LM3S9GN5"},
- {0x04, 0x1B, "LM3S9L71"},
- {0x04, 0x18, "LM3S9L97"},
- {0x06, 0xA8, "LM3S9U81"},
- {0x06, 0x7D, "LM3S9U90"},
- {0x06, 0x90, "LM3S9U92"},
- {0x06, 0x9B, "LM3S9U96"},
- {0x05, 0x01, "LM4F120B2QR/TM4C1233C3PM"},
- {0x05, 0x02, "LM4F120C4QR/TM4C1233D5PM"},
- {0x05, 0x03, "LM4F120E5QR/TM4C1233E6PM"},
- {0x05, 0x04, "LM4F120H5QR/TM4C1233H6PM"},
- {0x05, 0x08, "LM4F121B2QR/TM4C1232C3PM"},
- {0x05, 0x09, "LM4F121C4QR/TM4C1232D5PM"},
- {0x05, 0x0A, "LM4F121E5QR/TM4C1232E6PM"},
- {0x05, 0x0B, "LM4F121H5QR/TM4C1232H6PM"},
- {0x05, 0x10, "LM4F110E5QR/TM4C1231E6PM"},
- {0x05, 0x11, "LM4F110H5QR/TM4C1231H6PM"},
- {0x05, 0x18, "LM4F110B2QR/TM4C1231C3PM"},
- {0x05, 0x19, "LM4F110C4QR/TM4C1231D5PM"},
- {0x05, 0x20, "LM4F111E5QR/TM4C1230E6PM"},
- {0x05, 0x21, "LM4F111H5QR/TM4C1230H6PM"},
- {0x05, 0x22, "LM4F111B2QR/TM4C1230C3PM"},
- {0x05, 0x23, "LM4F111C4QR/TM4C1230D5PM"},
- {0x05, 0x30, "LM4F112E5QC/TM4C1231E6PZ"},
- {0x05, 0x31, "LM4F112H5QC/TM4C1231H6PZ"},
- {0x05, 0x35, "LM4F112H5QD/TM4C1231H6PGE"},
- {0x05, 0x36, "LM4F112C4QC/TM4C1231D5PZ"},
- {0x05, 0x40, "LM4F130E5QR/TM4C1237E6PM"},
- {0x05, 0x41, "LM4F130H5QR/TM4C1237H6PM"},
- {0x05, 0x48, "LM4F130C4QR/TM4C1237D5PM"},
- {0x05, 0x50, "LM4F131E5QR/TM4C1236E6PM"},
- {0x05, 0x51, "LM4F131H5QR/TM4C1236H6PM"},
- {0x05, 0x52, "LM4F131C4QR/TM4C1236D5PM"},
- {0x05, 0x60, "LM4F132E5QC/TM4C1237E6PZ"},
- {0x05, 0x61, "LM4F132H5QC/TM4C1237H6PZ"},
- {0x05, 0x65, "LM4F132H5QD/TM4C1237H6PGE"},
- {0x05, 0x66, "LM4F132C4QC/TM4C1237D5PZ"},
- {0x05, 0x70, "LM4F210E5QR/TM4C123BE6PM"},
- {0x05, 0x73, "LM4F210H5QR/TM4C123BH6PM"},
- {0x05, 0x80, "LM4F211E5QR/TM4C123AE6PM"},
- {0x05, 0x83, "LM4F211H5QR/TM4C123AH6PM"},
- {0x05, 0xA0, "LM4F230E5QR/TM4C123GE6PM"},
- {0x05, 0xA1, "LM4F230H5QR/TM4C123GH6PM"},
- {0x05, 0xB0, "LM4F231E5QR/TM4C123FE6PM"},
- {0x05, 0xB1, "LM4F231H5QR/TM4C123FH6PM"},
- {0x05, 0xC0, "LM4F232E5QC/TM4C123GE6PZ"},
- {0x05, 0xC1, "LM4F232H5QC/TM4C123GH6PZ"},
- {0x05, 0xC3, "LM4F212E5QC/TM4C123BE6PZ"},
- {0x05, 0xC4, "LM4F212H5QC/TM4C123BH6PZ"},
- {0x05, 0xC5, "LM4F232H5QD/TM4C123GH6PGE"},
- {0x05, 0xC6, "LM4F212H5QD/TM4C123BH6PGE"},
- {0x05, 0xD0, "LM4F122C4QC/TM4C1233D5PZ"},
- {0x05, 0xD1, "LM4F122E5QC/TM4C1233E6PZ"},
- {0x05, 0xD2, "LM4F122H5QC/TM4C1233H6PZ"},
- {0x05, 0xD6, "LM4F122H5QD/TM4C1233H6PGE"},
- {0x05, 0xE1, "LM4FSXLH5BB"},
- {0x05, 0xE3, "LM4F232H5BB/TM4C123GH6ZRB"},
- {0x05, 0xE4, "LM4FS99H5BB"},
- {0x05, 0xE5, "LM4FS1AH5BB"},
- {0x05, 0xE9, "LM4F212H5BB/TM4C123BH6ZRB"},
- {0x05, 0xEA, "LM4FS1GH5BB"},
- {0x05, 0xF0, "TM4C123GH6ZXR"},
- {0x0A, 0x19, "TM4C1290NCPDT"},
- {0x0A, 0x1B, "TM4C1290NCZAD"},
- {0x0A, 0x1C, "TM4C1292NCPDT"},
- {0x0A, 0x1E, "TM4C1292NCZAD"},
- {0x0A, 0x1F, "TM4C1294NCPDT"},
- {0x0A, 0x21, "TM4C1294NCZAD"},
- {0x0A, 0x22, "TM4C1297NCZAD"},
- {0x0A, 0x23, "TM4C1299NCZAD"},
- {0x0A, 0x24, "TM4C129CNCPDT"},
- {0x0A, 0x26, "TM4C129CNCZAD"},
- {0x0A, 0x27, "TM4C129DNCPDT"},
- {0x0A, 0x29, "TM4C129DNCZAD"},
- {0x0A, 0x2D, "TM4C129ENCPDT"},
- {0x0A, 0x2F, "TM4C129ENCZAD"},
- {0x0A, 0x30, "TM4C129LNCZAD"},
- {0x0A, 0x32, "TM4C129XNCZAD"},
- {0x0A, 0x34, "TM4C1294KCPDT"},
- {0x0A, 0x35, "TM4C129EKCPDT"},
- {0x0A, 0x36, "TM4C1299KCZAD"},
- {0x0A, 0x37, "TM4C129XKCZAD"},
- {0xFF, 0x00, "Unknown Part"}
-};
-
-static const char * const StellarisClassname[] = {
- "Sandstorm",
- "Fury",
- "Unknown",
- "DustDevil",
- "Tempest",
- "Blizzard/TM4C123x",
- "Firestorm",
- "",
- "",
- "",
- "Snowflake",
-};
-
-/***************************************************************************
-* openocd command interface *
-***************************************************************************/
-
-/* flash_bank stellaris <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(stellaris_flash_bank_command)
-{
- struct stellaris_flash_bank *stellaris_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- stellaris_info = calloc(sizeof(struct stellaris_flash_bank), 1);
- bank->base = 0x0;
- bank->driver_priv = stellaris_info;
-
- stellaris_info->target_name = "Unknown target";
-
- /* part wasn't probed for info yet */
- stellaris_info->did1 = 0;
-
- /* TODO Specify the main crystal speed in kHz using an optional
- * argument; ditto, the speed of an external oscillator used
- * instead of a crystal. Avoid programming flash using IOSC.
- */
- return ERROR_OK;
-}
-
-static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- int printed;
- struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
-
- if (stellaris_info->did1 == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- /* Read main and master clock freqency register */
- stellaris_read_clock_info(bank);
-
- printed = snprintf(buf,
- buf_size,
- "\nTI/LMI Stellaris information: Chip is "
- "class %i (%s) %s rev %c%i\n",
- stellaris_info->target_class,
- StellarisClassname[stellaris_info->target_class],
- stellaris_info->target_name,
- (int)('A' + ((stellaris_info->did0 >> 8) & 0xFF)),
- (int)((stellaris_info->did0) & 0xFF));
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf,
- buf_size,
- "did1: 0x%8.8" PRIx32 ", arch: 0x%4.4" PRIx32
- ", eproc: %s, ramsize: %" PRIu32 "k, flashsize: %" PRIu32 "k\n",
- stellaris_info->did1,
- stellaris_info->did1,
- "ARMv7M",
- stellaris_info->sramsiz,
- (uint32_t)(stellaris_info->num_pages * stellaris_info->pagesize / 1024));
- buf += printed;
- buf_size -= printed;
-
- snprintf(buf,
- buf_size,
- "master clock: %ikHz%s, "
- "rcc is 0x%" PRIx32 ", rcc2 is 0x%" PRIx32 ", "
- "pagesize: %" PRIu32 ", pages: %" PRIu32,
- (int)(stellaris_info->mck_freq / 1000),
- stellaris_info->mck_desc,
- stellaris_info->rcc,
- stellaris_info->rcc2,
- stellaris_info->pagesize,
- stellaris_info->num_pages);
-
- return ERROR_OK;
-}
-
-/***************************************************************************
-* chip identification and status *
-***************************************************************************/
-
-/* Set the flash timimg register to match current clocking */
-static void stellaris_set_flash_timing(struct flash_bank *bank)
-{
- struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t usecrl = (stellaris_info->mck_freq/1000000ul-1);
-
- /* only valid for Sandstorm and Fury class devices */
- if (stellaris_info->target_class > 1)
- return;
-
- LOG_DEBUG("usecrl = %i", (int)(usecrl));
- target_write_u32(target, SCB_BASE | USECRL, usecrl);
-}
-
-static const unsigned rcc_xtal[32] = {
- [0x00] = 1000000, /* no pll */
- [0x01] = 1843200, /* no pll */
- [0x02] = 2000000, /* no pll */
- [0x03] = 2457600, /* no pll */
-
- [0x04] = 3579545,
- [0x05] = 3686400,
- [0x06] = 4000000, /* usb */
- [0x07] = 4096000,
-
- [0x08] = 4915200,
- [0x09] = 5000000, /* usb */
- [0x0a] = 5120000,
- [0x0b] = 6000000, /* (reset) usb */
-
- [0x0c] = 6144000,
- [0x0d] = 7372800,
- [0x0e] = 8000000, /* usb */
- [0x0f] = 8192000,
-
- /* parts before DustDevil use just 4 bits for xtal spec */
-
- [0x10] = 10000000, /* usb */
- [0x11] = 12000000, /* usb */
- [0x12] = 12288000,
- [0x13] = 13560000,
-
- [0x14] = 14318180,
- [0x15] = 16000000, /* usb */
- [0x16] = 16384000,
-};
-
-/** Read clock configuration and set stellaris_info->usec_clocks. */
-static void stellaris_read_clock_info(struct flash_bank *bank)
-{
- struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t rcc, rcc2, pllcfg, sysdiv, usesysdiv, bypass, oscsrc;
- unsigned xtal;
- unsigned long mainfreq;
-
- target_read_u32(target, SCB_BASE | RCC, &rcc);
- LOG_DEBUG("Stellaris RCC %" PRIx32 "", rcc);
-
- target_read_u32(target, SCB_BASE | RCC2, &rcc2);
- LOG_DEBUG("Stellaris RCC2 %" PRIx32 "", rcc);
-
- target_read_u32(target, SCB_BASE | PLLCFG, &pllcfg);
- LOG_DEBUG("Stellaris PLLCFG %" PRIx32 "", pllcfg);
-
- stellaris_info->rcc = rcc;
- stellaris_info->rcc2 = rcc2;
-
- sysdiv = (rcc >> 23) & 0xF;
- usesysdiv = (rcc >> 22) & 0x1;
- bypass = (rcc >> 11) & 0x1;
- oscsrc = (rcc >> 4) & 0x3;
- xtal = (rcc >> 6) & stellaris_info->xtal_mask;
-
- /* NOTE: post-Sandstorm parts have RCC2 which may override
- * parts of RCC ... with more sysdiv options, option for
- * 32768 Hz mainfreq, PLL controls. On Sandstorm it reads
- * as zero, so the "use RCC2" flag is always clear.
- */
- if (rcc2 & (1 << 31)) {
- sysdiv = (rcc2 >> 23) & 0x3F;
- bypass = (rcc2 >> 11) & 0x1;
- oscsrc = (rcc2 >> 4) & 0x7;
-
- /* FIXME Tempest parts have an additional lsb for
- * fractional sysdiv (200 MHz / 2.5 == 80 MHz)
- */
- }
-
- stellaris_info->mck_desc = "";
-
- switch (oscsrc) {
- case 0: /* MOSC */
- mainfreq = rcc_xtal[xtal];
- break;
- case 1: /* IOSC */
- mainfreq = stellaris_info->iosc_freq;
- stellaris_info->mck_desc = stellaris_info->iosc_desc;
- break;
- case 2: /* IOSC/4 */
- mainfreq = stellaris_info->iosc_freq / 4;
- stellaris_info->mck_desc = stellaris_info->iosc_desc;
- break;
- case 3: /* lowspeed */
- /* Sandstorm doesn't have this 30K +/- 30% osc */
- mainfreq = 30000;
- stellaris_info->mck_desc = " (�30%)";
- break;
- case 8: /* hibernation osc */
- /* not all parts support hibernation */
- mainfreq = 32768;
- break;
-
- default: /* NOTREACHED */
- mainfreq = 0;
- break;
- }
-
- /* PLL is used if it's not bypassed; its output is 200 MHz
- * even when it runs at 400 MHz (adds divide-by-two stage).
- */
- if (!bypass)
- mainfreq = 200000000;
-
- if (usesysdiv)
- stellaris_info->mck_freq = mainfreq/(1 + sysdiv);
- else
- stellaris_info->mck_freq = mainfreq;
-}
-
-/* Read device id register, main clock frequency register and fill in driver info structure */
-static int stellaris_read_part_info(struct flash_bank *bank)
-{
- struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t did0, did1, ver, fam;
- int i;
-
- /* Read and parse chip identification register */
- target_read_u32(target, SCB_BASE | DID0, &did0);
- target_read_u32(target, SCB_BASE | DID1, &did1);
- target_read_u32(target, SCB_BASE | DC0, &stellaris_info->dc0);
- target_read_u32(target, SCB_BASE | DC1, &stellaris_info->dc1);
- LOG_DEBUG("did0 0x%" PRIx32 ", did1 0x%" PRIx32 ", dc0 0x%" PRIx32 ", dc1 0x%" PRIx32 "",
- did0, did1, stellaris_info->dc0, stellaris_info->dc1);
-
- ver = DID0_VER(did0);
- if ((ver != 0) && (ver != 1)) {
- LOG_WARNING("Unknown did0 version, cannot identify target");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (did1 == 0) {
- LOG_WARNING("Cannot identify target as a Stellaris");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- ver = did1 >> 28;
- fam = (did1 >> 24) & 0xF;
- if (((ver != 0) && (ver != 1)) || (fam != 0)) {
- LOG_WARNING("Unknown did1 version/family.");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* For Sandstorm, Fury, DustDevil: current data sheets say IOSC
- * is 12 MHz, but some older parts have 15 MHz. A few data sheets
- * even give _both_ numbers! We'll use current numbers; IOSC is
- * always approximate.
- *
- * For Tempest: IOSC is calibrated, 16 MHz
- * For Blizzard: IOSC is calibrated, 16 MHz
- * For Firestorm: IOSC is calibrated, 16 MHz
- */
- stellaris_info->iosc_freq = 12000000;
- stellaris_info->iosc_desc = " (�30%)";
- stellaris_info->xtal_mask = 0x0f;
-
- /* get device class */
- if (DID0_VER(did0) > 0) {
- stellaris_info->target_class = (did0 >> 16) & 0xFF;
- } else {
- /* Sandstorm class */
- stellaris_info->target_class = 0;
- }
-
- switch (stellaris_info->target_class) {
- case 0: /* Sandstorm */
- /*
- * Current (2009-August) parts seem to be rev C2 and use 12 MHz.
- * Parts before rev C0 used 15 MHz; some C0 parts use 15 MHz
- * (LM3S618), but some other C0 parts are 12 MHz (LM3S811).
- */
- if (((did0 >> 8) & 0xff) < 2) {
- stellaris_info->iosc_freq = 15000000;
- stellaris_info->iosc_desc = " (�50%)";
- }
- break;
-
- case 1: /* Fury */
- break;
-
- case 4: /* Tempest */
- case 5: /* Blizzard */
- case 6: /* Firestorm */
- case 0xa: /* Snowflake */
- stellaris_info->iosc_freq = 16000000; /* +/- 1% */
- stellaris_info->iosc_desc = " (�1%)";
- /* FALL THROUGH */
-
- case 3: /* DustDevil */
- stellaris_info->xtal_mask = 0x1f;
- break;
-
- default:
- LOG_WARNING("Unknown did0 class");
- }
-
- for (i = 0; StellarisParts[i].partno; i++) {
- if ((StellarisParts[i].partno == ((did1 >> 16) & 0xFF)) &&
- (StellarisParts[i].class == stellaris_info->target_class))
- break;
- }
-
- stellaris_info->target_name = StellarisParts[i].partname;
-
- stellaris_info->did0 = did0;
- stellaris_info->did1 = did1;
-
- if (stellaris_info->target_class == 5) { /* Blizzard */
- target_read_u32(target, FLASH_FSIZE, &stellaris_info->fsize);
- target_read_u32(target, FLASH_SSIZE, &stellaris_info->ssize);
-
- stellaris_info->num_pages = 2 * (1 + (stellaris_info->fsize & 0xFFFF));
- stellaris_info->sramsiz = (1 + (stellaris_info->ssize & 0xFFFF)) / 4;
- stellaris_info->pagesize = 1024;
- } else if (stellaris_info->target_class == 0xa) { /* Snowflake */
- target_read_u32(target, FLASH_FSIZE, &stellaris_info->fsize);
- target_read_u32(target, FLASH_SSIZE, &stellaris_info->ssize);
-
- stellaris_info->pagesize = (1 << ((stellaris_info->fsize >> 16) & 7)) * 1024;
- stellaris_info->num_pages = 2048 * (1 + (stellaris_info->fsize & 0xFFFF)) /
- stellaris_info->pagesize;
- stellaris_info->sramsiz = (1 + (stellaris_info->ssize & 0xFFFF)) / 4;
- } else {
- stellaris_info->num_pages = 2 * (1 + (stellaris_info->dc0 & 0xFFFF));
- stellaris_info->sramsiz = (1 + ((stellaris_info->dc0 >> 16) & 0xFFFF)) / 4;
- stellaris_info->pagesize = 1024;
- }
-
- /* REVISIT for at least Tempest parts, read NVMSTAT.FWB too.
- * That exposes a 32-word Flash Write Buffer ... enabling
- * writes of more than one word at a time.
- */
-
- return ERROR_OK;
-}
-
-/***************************************************************************
-* flash operations *
-***************************************************************************/
-
-static int stellaris_protect_check(struct flash_bank *bank)
-{
- struct stellaris_flash_bank *stellaris = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t flash_sizek = stellaris->pagesize / 1024 *
- stellaris->num_pages;
- uint32_t fmppe_addr;
- int status = ERROR_OK;
- unsigned i;
-
- if (stellaris->did1 == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- for (i = 0; i < (unsigned) bank->num_sectors; i++)
- bank->sectors[i].is_protected = -1;
-
- /* Read each Flash Memory Protection Program Enable (FMPPE) register
- * to report any pages that we can't write. Ignore the Read Enable
- * register (FMPRE).
- */
-
- if (stellaris->target_class >= 0x0a || flash_sizek > 64)
- fmppe_addr = SCB_BASE | FMPPE0;
- else
- fmppe_addr = SCB_BASE | FMPPE;
-
- unsigned int page = 0, lockbitnum, lockbitcnt = flash_sizek / 2;
- unsigned int bits_per_page = stellaris->pagesize / 2048;
- /* Every lock bit always corresponds to a 2k region */
- for (lockbitnum = 0; lockbitnum < lockbitcnt; lockbitnum += 32) {
- uint32_t fmppe;
-
- target_read_u32(target, fmppe_addr, &fmppe);
- for (i = 0; i < 32 && lockbitnum + i < lockbitcnt; i++) {
- bool protect = !(fmppe & (1 << i));
- if (bits_per_page) {
- bank->sectors[page++].is_protected = protect;
- i += bits_per_page - 1;
- } else { /* 1024k pages, every lockbit covers 2 pages */
- bank->sectors[page++].is_protected = protect;
- bank->sectors[page++].is_protected = protect;
- }
- }
- fmppe_addr += 4;
- }
-
- return status;
-}
-
-static int stellaris_erase(struct flash_bank *bank, int first, int last)
-{
- int banknr;
- uint32_t flash_fmc, flash_cris;
- struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- struct target *target = bank->target;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (stellaris_info->did1 == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if ((first < 0) || (last < first) || (last >= (int)stellaris_info->num_pages))
- return ERROR_FLASH_SECTOR_INVALID;
-
- if ((first == 0) && (last == ((int)stellaris_info->num_pages-1)))
- return stellaris_mass_erase(bank);
-
- /* Refresh flash controller timing */
- stellaris_read_clock_info(bank);
- stellaris_set_flash_timing(bank);
-
- /* Clear and disable flash programming interrupts */
- target_write_u32(target, FLASH_CIM, 0);
- target_write_u32(target, FLASH_MISC, PMISC | AMISC);
-
- /* REVISIT this clobbers state set by any halted firmware ...
- * it might want to process those IRQs.
- */
-
- for (banknr = first; banknr <= last; banknr++) {
- /* Address is first word in page */
- target_write_u32(target, FLASH_FMA, banknr * stellaris_info->pagesize);
- /* Write erase command */
- target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_ERASE);
- /* Wait until erase complete */
- do {
- target_read_u32(target, FLASH_FMC, &flash_fmc);
- } while (flash_fmc & FMC_ERASE);
-
- /* Check acess violations */
- target_read_u32(target, FLASH_CRIS, &flash_cris);
- if (flash_cris & (AMASK)) {
- LOG_WARNING("Error erasing flash page %i, flash_cris 0x%" PRIx32 "",
- banknr, flash_cris);
- target_write_u32(target, FLASH_CRIS, 0);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- bank->sectors[banknr].is_erased = 1;
- }
-
- return ERROR_OK;
-}
-
-static int stellaris_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct stellaris_flash_bank *stellaris = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t flash_fmc, flash_cris;
- unsigned int bits_per_page = stellaris->pagesize / 2048;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!set) {
- LOG_ERROR("Hardware doesn't support page-level unprotect. "
- "Try the 'recover' command.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (stellaris->did1 == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (stellaris->target_class == 0x03 &&
- !((stellaris->did0 >> 8) & 0xFF) &&
- !((stellaris->did0) & 0xFF)) {
- LOG_ERROR("DustDevil A0 parts can't be unprotected, see errata; refusing to proceed");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (!bits_per_page && (first % 2 || !(last % 2))) {
- LOG_ERROR("Can't protect unaligned pages");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- /* Refresh flash controller timing */
- stellaris_read_clock_info(bank);
- stellaris_set_flash_timing(bank);
-
- /* Clear and disable flash programming interrupts */
- target_write_u32(target, FLASH_CIM, 0);
- target_write_u32(target, FLASH_MISC, PMISC | AMISC);
-
- uint32_t flash_sizek = stellaris->pagesize / 1024 *
- stellaris->num_pages;
- uint32_t fmppe_addr;
-
- if (stellaris->target_class >= 0x0a || flash_sizek > 64)
- fmppe_addr = SCB_BASE | FMPPE0;
- else
- fmppe_addr = SCB_BASE | FMPPE;
-
- int page = 0;
- unsigned int lockbitnum, lockbitcnt = flash_sizek / 2;
- /* Every lock bit always corresponds to a 2k region */
- for (lockbitnum = 0; lockbitnum < lockbitcnt; lockbitnum += 32) {
- uint32_t fmppe;
-
- target_read_u32(target, fmppe_addr, &fmppe);
- for (unsigned int i = 0;
- i < 32 && lockbitnum + i < lockbitcnt;
- i++) {
- if (page >= first && page <= last)
- fmppe &= ~(1 << i);
-
- if (bits_per_page) {
- if (!((i + 1) % bits_per_page))
- page++;
- } else { /* 1024k pages, every lockbit covers 2 pages */
- page += 2;
- }
- }
- target_write_u32(target, fmppe_addr, fmppe);
-
- /* Commit FMPPE* */
- target_write_u32(target, FLASH_FMA, 1 + lockbitnum / 16);
- /* Write commit command */
- target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT);
-
- /* Wait until commit complete */
- do {
- target_read_u32(target, FLASH_FMC, &flash_fmc);
- } while (flash_fmc & FMC_COMT);
-
- /* Check access violations */
- target_read_u32(target, FLASH_CRIS, &flash_cris);
- if (flash_cris & (AMASK)) {
- LOG_WARNING("Error setting flash page protection, flash_cris 0x%" PRIx32 "", flash_cris);
- target_write_u32(target, FLASH_CRIS, 0);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- fmppe_addr += 4;
- }
-
- return ERROR_OK;
-}
-
-/* see contib/loaders/flash/stellaris.s for src */
-
-static const uint8_t stellaris_write_code[] = {
- /* write: */
- 0xDF, 0xF8, 0x40, 0x40, /* ldr r4, pFLASH_CTRL_BASE */
- 0xDF, 0xF8, 0x40, 0x50, /* ldr r5, FLASHWRITECMD */
- /* wait_fifo: */
- 0xD0, 0xF8, 0x00, 0x80, /* ldr r8, [r0, #0] */
- 0xB8, 0xF1, 0x00, 0x0F, /* cmp r8, #0 */
- 0x17, 0xD0, /* beq exit */
- 0x47, 0x68, /* ldr r7, [r0, #4] */
- 0x47, 0x45, /* cmp r7, r8 */
- 0xF7, 0xD0, /* beq wait_fifo */
- /* mainloop: */
- 0x22, 0x60, /* str r2, [r4, #0] */
- 0x02, 0xF1, 0x04, 0x02, /* add r2, r2, #4 */
- 0x57, 0xF8, 0x04, 0x8B, /* ldr r8, [r7], #4 */
- 0xC4, 0xF8, 0x04, 0x80, /* str r8, [r4, #4] */
- 0xA5, 0x60, /* str r5, [r4, #8] */
- /* busy: */
- 0xD4, 0xF8, 0x08, 0x80, /* ldr r8, [r4, #8] */
- 0x18, 0xF0, 0x01, 0x0F, /* tst r8, #1 */
- 0xFA, 0xD1, /* bne busy */
- 0x8F, 0x42, /* cmp r7, r1 */
- 0x28, 0xBF, /* it cs */
- 0x00, 0xF1, 0x08, 0x07, /* addcs r7, r0, #8 */
- 0x47, 0x60, /* str r7, [r0, #4] */
- 0x01, 0x3B, /* subs r3, r3, #1 */
- 0x03, 0xB1, /* cbz r3, exit */
- 0xE2, 0xE7, /* b wait_fifo */
- /* exit: */
- 0x00, 0xBE, /* bkpt #0 */
-
- /* pFLASH_CTRL_BASE: */
- 0x00, 0xD0, 0x0F, 0x40, /* .word 0x400FD000 */
- /* FLASHWRITECMD: */
- 0x01, 0x00, 0x42, 0xA4 /* .word 0xA4420001 */
-};
-static int stellaris_write_block(struct flash_bank *bank,
- const uint8_t *buffer, uint32_t offset, uint32_t wcount)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *source;
- struct working_area *write_algorithm;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[4];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* power of two, and multiple of word size */
- static const unsigned buf_min = 128;
-
- /* for small buffers it's faster not to download an algorithm */
- if (wcount * 4 < buf_min)
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-
- LOG_DEBUG("(bank=%p buffer=%p offset=%08" PRIx32 " wcount=%08" PRIx32 "",
- bank, buffer, offset, wcount);
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(stellaris_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_DEBUG("no working area for block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* plus a buffer big enough for this data */
- if (wcount * 4 < buffer_size)
- buffer_size = wcount * 4;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= buf_min) {
- target_free_working_area(target, write_algorithm);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
- target_name(target), (unsigned) buffer_size);
- }
-
- target_write_buffer(target, write_algorithm->address,
- sizeof(stellaris_write_code),
- stellaris_write_code);
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[2].value, 0, 32, address);
- buf_set_u32(reg_params[3].value, 0, 32, wcount);
-
- retval = target_run_flash_async_algorithm(target, buffer, wcount, 4,
- 0, NULL,
- 4, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- if (retval == ERROR_FLASH_OPERATION_FAILED)
- LOG_ERROR("error %d executing stellaris flash write algorithm", retval);
-
- target_free_working_area(target, write_algorithm);
- target_free_working_area(target, source);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
-
- return retval;
-}
-
-static int stellaris_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t address = offset;
- uint32_t flash_cris, flash_fmc;
- uint32_t words_remaining = (count / 4);
- uint32_t bytes_remaining = (count & 0x00000003);
- uint32_t bytes_written = 0;
- int retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_DEBUG("(bank=%p buffer=%p offset=%08" PRIx32 " count=%08" PRIx32 "",
- bank, buffer, offset, count);
-
- if (stellaris_info->did1 == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (offset & 0x3) {
- LOG_WARNING("offset size must be word aligned");
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- if (offset + count > bank->size)
- return ERROR_FLASH_DST_OUT_OF_BANK;
-
- /* Refresh flash controller timing */
- stellaris_read_clock_info(bank);
- stellaris_set_flash_timing(bank);
-
- /* Clear and disable flash programming interrupts */
- target_write_u32(target, FLASH_CIM, 0);
- target_write_u32(target, FLASH_MISC, PMISC | AMISC);
-
- /* REVISIT this clobbers state set by any halted firmware ...
- * it might want to process those IRQs.
- */
-
- /* multiple words to be programmed? */
- if (words_remaining > 0) {
- /* try using a block write */
- retval = stellaris_write_block(bank, buffer, offset,
- words_remaining);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- LOG_DEBUG("writing flash word-at-a-time");
- } else if (retval == ERROR_FLASH_OPERATION_FAILED) {
- /* if an error occured, we examine the reason, and quit */
- target_read_u32(target, FLASH_CRIS, &flash_cris);
-
- LOG_ERROR("flash writing failed with CRIS: 0x%" PRIx32 "", flash_cris);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- } else {
- buffer += words_remaining * 4;
- address += words_remaining * 4;
- words_remaining = 0;
- }
- }
-
- while (words_remaining > 0) {
- if (!(address & 0xff))
- LOG_DEBUG("0x%" PRIx32 "", address);
-
- /* Program one word */
- target_write_u32(target, FLASH_FMA, address);
- target_write_buffer(target, FLASH_FMD, 4, buffer);
- target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
- /* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
- /* Wait until write complete */
- do {
- target_read_u32(target, FLASH_FMC, &flash_fmc);
- } while (flash_fmc & FMC_WRITE);
-
- buffer += 4;
- address += 4;
- words_remaining--;
- }
-
- if (bytes_remaining) {
- uint8_t last_word[4] = {0xff, 0xff, 0xff, 0xff};
-
- /* copy the last remaining bytes into the write buffer */
- memcpy(last_word, buffer+bytes_written, bytes_remaining);
-
- if (!(address & 0xff))
- LOG_DEBUG("0x%" PRIx32 "", address);
-
- /* Program one word */
- target_write_u32(target, FLASH_FMA, address);
- target_write_buffer(target, FLASH_FMD, 4, last_word);
- target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_WRITE);
- /* LOG_DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE); */
- /* Wait until write complete */
- do {
- target_read_u32(target, FLASH_FMC, &flash_fmc);
- } while (flash_fmc & FMC_WRITE);
- }
-
- /* Check access violations */
- target_read_u32(target, FLASH_CRIS, &flash_cris);
- if (flash_cris & (AMASK)) {
- LOG_DEBUG("flash_cris 0x%" PRIx32 "", flash_cris);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- return ERROR_OK;
-}
-
-static int stellaris_probe(struct flash_bank *bank)
-{
- struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
- int retval;
-
- /* If this is a stellaris chip, it has flash; probe() is just
- * to figure out how much is present. Only do it once.
- */
- if (stellaris_info->did1 != 0)
- return ERROR_OK;
-
- /* stellaris_read_part_info() already handled error checking and
- * reporting. Note that it doesn't write, so we don't care about
- * whether the target is halted or not.
- */
- retval = stellaris_read_part_info(bank);
- if (retval != ERROR_OK)
- return retval;
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- /* provide this for the benefit of the NOR flash framework */
- bank->size = stellaris_info->num_pages * stellaris_info->pagesize;
- bank->num_sectors = stellaris_info->num_pages;
- bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector));
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = i * stellaris_info->pagesize;
- bank->sectors[i].size = stellaris_info->pagesize;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- return retval;
-}
-
-static int stellaris_mass_erase(struct flash_bank *bank)
-{
- struct target *target = NULL;
- struct stellaris_flash_bank *stellaris_info = NULL;
- uint32_t flash_fmc;
-
- stellaris_info = bank->driver_priv;
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (stellaris_info->did1 == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- /* Refresh flash controller timing */
- stellaris_read_clock_info(bank);
- stellaris_set_flash_timing(bank);
-
- /* Clear and disable flash programming interrupts */
- target_write_u32(target, FLASH_CIM, 0);
- target_write_u32(target, FLASH_MISC, PMISC | AMISC);
-
- /* REVISIT this clobbers state set by any halted firmware ...
- * it might want to process those IRQs.
- */
-
- target_write_u32(target, FLASH_FMA, 0);
- target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
- /* Wait until erase complete */
- do {
- target_read_u32(target, FLASH_FMC, &flash_fmc);
- } while (flash_fmc & FMC_MERASE);
-
- /* if device has > 128k, then second erase cycle is needed
- * this is only valid for older devices, but will not hurt */
- if (stellaris_info->num_pages * stellaris_info->pagesize > 0x20000) {
- target_write_u32(target, FLASH_FMA, 0x20000);
- target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_MERASE);
- /* Wait until erase complete */
- do {
- target_read_u32(target, FLASH_FMC, &flash_fmc);
- } while (flash_fmc & FMC_MERASE);
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stellaris_handle_mass_erase_command)
-{
- int i;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (stellaris_mass_erase(bank) == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "stellaris mass erase complete");
- } else
- command_print(CMD_CTX, "stellaris mass erase failed");
-
- return ERROR_OK;
-}
-
-/**
- * Perform the Stellaris "Recovering a 'Locked' Device procedure.
- * This performs a mass erase and then restores all nonvolatile registers
- * (including USER_* registers and flash lock bits) to their defaults.
- * Accordingly, flash can be reprogrammed, and JTAG can be used.
- *
- * NOTE that DustDevil parts (at least rev A0 silicon) have errata which
- * can affect this operation if flash protection has been enabled.
- */
-COMMAND_HANDLER(stellaris_handle_recover_command)
-{
- struct flash_bank *bank;
- int retval;
-
- if (CMD_ARGC != 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- bank = get_flash_bank_by_num_noprobe(0);
- if (!bank)
- return ERROR_FAIL;
-
- /* REVISIT ... it may be worth sanity checking that the AP is
- * inactive before we start. ARM documents that switching a DP's
- * mode while it's active can cause fault modes that need a power
- * cycle to recover.
- */
-
- Jim_Eval_Named(CMD_CTX->interp, "catch { hla_command \"debug unlock\" }", 0, 0);
- if (!strcmp(Jim_GetString(Jim_GetResult(CMD_CTX->interp), NULL), "0")) {
- retval = ERROR_OK;
- goto user_action;
- }
-
- /* assert SRST */
- if (!(jtag_get_reset_config() & RESET_HAS_SRST)) {
- LOG_ERROR("Can't recover Stellaris flash without SRST");
- return ERROR_FAIL;
- }
- adapter_assert_reset();
-
- for (int i = 0; i < 5; i++) {
- retval = dap_to_swd(bank->target);
- if (retval != ERROR_OK)
- goto done;
-
- retval = dap_to_jtag(bank->target);
- if (retval != ERROR_OK)
- goto done;
- }
-
- /* de-assert SRST */
- adapter_deassert_reset();
- retval = jtag_execute_queue();
-
- /* wait 400+ msec ... OK, "1+ second" is simpler */
- usleep(1000);
-
-user_action:
- /* USER INTERVENTION required for the power cycle
- * Restarting OpenOCD is likely needed because of mode switching.
- */
- LOG_INFO("USER ACTION: "
- "power cycle Stellaris chip, then restart OpenOCD.");
-
-done:
- return retval;
-}
-
-static const struct command_registration stellaris_exec_command_handlers[] = {
- {
- .name = "mass_erase",
- .usage = "<bank>",
- .handler = stellaris_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .help = "erase entire device",
- },
- {
- .name = "recover",
- .handler = stellaris_handle_recover_command,
- .mode = COMMAND_EXEC,
- .usage = "",
- .help = "recover (and erase) locked device",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration stellaris_command_handlers[] = {
- {
- .name = "stellaris",
- .mode = COMMAND_EXEC,
- .help = "Stellaris flash command group",
- .usage = "",
- .chain = stellaris_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver stellaris_flash = {
- .name = "stellaris",
- .commands = stellaris_command_handlers,
- .flash_bank_command = stellaris_flash_bank_command,
- .erase = stellaris_erase,
- .protect = stellaris_protect,
- .write = stellaris_write,
- .read = default_flash_read,
- .probe = stellaris_probe,
- .auto_probe = stellaris_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = stellaris_protect_check,
- .info = get_stellaris_info,
-};
[38/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc32xx.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc32xx.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc32xx.c
deleted file mode 100755
index c310f90..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc32xx.c
+++ /dev/null
@@ -1,1823 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2011 Bjarne Steinsbo <bs...@gmail.com> *
- * Copyright (C) 2010 richard vegh <ve...@gmail.com> *
- * Copyright (C) 2010 Oyvind Harboe <oy...@zylin.com> *
- * *
- * Based on a combination of the lpc3180 driver and code from *
- * uboot-2009.03-lpc32xx by Kevin Wells. *
- * Any bugs are mine. --BSt *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "lpc32xx.h"
-#include <target/target.h>
-
-static int lpc32xx_reset(struct nand_device *nand);
-static int lpc32xx_controller_ready(struct nand_device *nand, int timeout);
-static int lpc32xx_tc_ready(struct nand_device *nand, int timeout);
-extern int nand_correct_data(struct nand_device *nand, u_char *dat,
- u_char *read_ecc, u_char *calc_ecc);
-
-/* These are offset with the working area in IRAM when using DMA to
- * read/write data to the SLC controller.
- * - DMA descriptors will be put at start of working area,
- * - Hardware generated ECC will be stored at ECC_OFFS
- * - OOB wil be read/written from/to SPARE_OFFS
- * - Actual page data will be read from/to DATA_OFFS
- * There are unused holes between the used areas.
- */
-#define ECC_OFFS 0x120
-#define SPARE_OFFS 0x140
-#define DATA_OFFS 0x200
-
-static const int sp_ooblayout[] = {
- 10, 11, 12, 13, 14, 15
-};
-static const int lp_ooblayout[] = {
- 40, 41, 42, 43, 44, 45,
- 46, 47, 48, 49, 50, 51,
- 52, 53, 54, 55, 56, 57,
- 58, 59, 60, 61, 62, 63
-};
-
-typedef struct {
- volatile uint32_t dma_src;
- volatile uint32_t dma_dest;
- volatile uint32_t next_lli;
- volatile uint32_t next_ctrl;
-} dmac_ll_t;
-
-static dmac_ll_t dmalist[(2048/256) * 2 + 1];
-
-/* nand device lpc32xx <target#> <oscillator_frequency>
- */
-NAND_DEVICE_COMMAND_HANDLER(lpc32xx_nand_device_command)
-{
- if (CMD_ARGC < 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- uint32_t osc_freq;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], osc_freq);
-
- struct lpc32xx_nand_controller *lpc32xx_info;
- lpc32xx_info = malloc(sizeof(struct lpc32xx_nand_controller));
- nand->controller_priv = lpc32xx_info;
-
- lpc32xx_info->osc_freq = osc_freq;
-
- if ((lpc32xx_info->osc_freq < 1000) || (lpc32xx_info->osc_freq > 20000))
- LOG_WARNING("LPC32xx oscillator frequency should be between "
- "1000 and 20000 kHz, was %i",
- lpc32xx_info->osc_freq);
-
- lpc32xx_info->selected_controller = LPC32xx_NO_CONTROLLER;
- lpc32xx_info->sw_write_protection = 0;
- lpc32xx_info->sw_wp_lower_bound = 0x0;
- lpc32xx_info->sw_wp_upper_bound = 0x0;
-
- return ERROR_OK;
-}
-
-static int lpc32xx_pll(int fclkin, uint32_t pll_ctrl)
-{
- int bypass = (pll_ctrl & 0x8000) >> 15;
- int direct = (pll_ctrl & 0x4000) >> 14;
- int feedback = (pll_ctrl & 0x2000) >> 13;
- int p = (1 << ((pll_ctrl & 0x1800) >> 11) * 2);
- int n = ((pll_ctrl & 0x0600) >> 9) + 1;
- int m = ((pll_ctrl & 0x01fe) >> 1) + 1;
- int lock = (pll_ctrl & 0x1);
-
- if (!lock)
- LOG_WARNING("PLL is not locked");
-
- if (!bypass && direct) /* direct mode */
- return (m * fclkin) / n;
-
- if (bypass && !direct) /* bypass mode */
- return fclkin / (2 * p);
-
- if (bypass & direct) /* direct bypass mode */
- return fclkin;
-
- if (feedback) /* integer mode */
- return m * (fclkin / n);
- else /* non-integer mode */
- return (m / (2 * p)) * (fclkin / n);
-}
-
-static float lpc32xx_cycle_time(struct nand_device *nand)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- uint32_t sysclk_ctrl, pwr_ctrl, hclkdiv_ctrl, hclkpll_ctrl;
- int sysclk;
- int hclk;
- int hclk_pll;
- float cycle;
- int retval;
-
- /* calculate timings */
-
- /* determine current SYSCLK (13'MHz or main oscillator) */
- retval = target_read_u32(target, 0x40004050, &sysclk_ctrl);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read SYSCLK_CTRL");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if ((sysclk_ctrl & 1) == 0)
- sysclk = lpc32xx_info->osc_freq;
- else
- sysclk = 13000;
-
- /* determine selected HCLK source */
- retval = target_read_u32(target, 0x40004044, &pwr_ctrl);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read HCLK_CTRL");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if ((pwr_ctrl & (1 << 2)) == 0) /* DIRECT RUN mode */
- hclk = sysclk;
- else {
- retval = target_read_u32(target, 0x40004058, &hclkpll_ctrl);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read HCLKPLL_CTRL");
- return ERROR_NAND_OPERATION_FAILED;
- }
- hclk_pll = lpc32xx_pll(sysclk, hclkpll_ctrl);
-
- retval = target_read_u32(target, 0x40004040, &hclkdiv_ctrl);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read CLKDIV_CTRL");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (pwr_ctrl & (1 << 10)) /* ARM_CLK and HCLK use PERIPH_CLK */
- hclk = hclk_pll / (((hclkdiv_ctrl & 0x7c) >> 2) + 1);
- else /* HCLK uses HCLK_PLL */
- hclk = hclk_pll / (1 << (hclkdiv_ctrl & 0x3));
- }
-
- LOG_DEBUG("LPC32xx HCLK currently clocked at %i kHz", hclk);
-
- cycle = (1.0 / hclk) * 1000000.0;
-
- return cycle;
-}
-
-static int lpc32xx_init(struct nand_device *nand)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int bus_width = nand->bus_width ? : 8;
- int address_cycles = nand->address_cycles ? : 3;
- int page_size = nand->page_size ? : 512;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC32xx "
- "NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* sanitize arguments */
- if (bus_width != 8) {
- LOG_ERROR("LPC32xx doesn't support %i", bus_width);
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- /* inform calling code about selected bus width */
- nand->bus_width = bus_width;
-
- if ((address_cycles < 3) || (address_cycles > 5)) {
- LOG_ERROR("LPC32xx driver doesn't support %i address cycles", address_cycles);
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- if ((page_size != 512) && (page_size != 2048)) {
- LOG_ERROR("LPC32xx doesn't support page size %i", page_size);
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- /* select MLC controller if none is currently selected */
- if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
- LOG_DEBUG("no LPC32xx NAND flash controller selected, "
- "using default 'slc'");
- lpc32xx_info->selected_controller = LPC32xx_SLC_CONTROLLER;
- }
-
- if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- uint32_t mlc_icr_value = 0x0;
- float cycle;
- int twp, twh, trp, treh, trhz, trbwb, tcea;
-
- /* FLASHCLK_CTRL = 0x22 (enable clk for MLC) */
- retval = target_write_u32(target, 0x400040c8, 0x22);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set FLASHCLK_CTRL");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_CEH = 0x0 (Force nCE assert) */
- retval = target_write_u32(target, 0x200b804c, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_CEH");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_LOCK = 0xa25e (unlock protected registers) */
- retval = target_write_u32(target, 0x200b8044, 0xa25e);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_LOCK");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_ICR = configuration */
- if (lpc32xx_info->sw_write_protection)
- mlc_icr_value |= 0x8;
- if (page_size == 2048)
- mlc_icr_value |= 0x4;
- if (address_cycles == 4)
- mlc_icr_value |= 0x2;
- if (bus_width == 16)
- mlc_icr_value |= 0x1;
- retval = target_write_u32(target, 0x200b8030, mlc_icr_value);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ICR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* calculate NAND controller timings */
- cycle = lpc32xx_cycle_time(nand);
-
- twp = ((40 / cycle) + 1);
- twh = ((20 / cycle) + 1);
- trp = ((30 / cycle) + 1);
- treh = ((15 / cycle) + 1);
- trhz = ((30 / cycle) + 1);
- trbwb = ((100 / cycle) + 1);
- tcea = ((45 / cycle) + 1);
-
- /* MLC_LOCK = 0xa25e (unlock protected registers) */
- retval = target_write_u32(target, 0x200b8044, 0xa25e);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_LOCK");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_TIME_REG */
- retval = target_write_u32(target, 0x200b8034,
- (twp & 0xf)
- | ((twh & 0xf) << 4)
- | ((trp & 0xf) << 8)
- | ((treh & 0xf) << 12)
- | ((trhz & 0x7) << 16)
- | ((trbwb & 0x1f) << 19)
- | ((tcea & 0x3) << 24));
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_TIME_REG");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- retval = lpc32xx_reset(nand);
- if (ERROR_OK != retval)
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- float cycle;
- int r_setup, r_hold, r_width, r_rdy;
- int w_setup, w_hold, w_width, w_rdy;
-
- /* FLASHCLK_CTRL = 0x05 (enable clk for SLC) */
- retval = target_write_u32(target, 0x400040c8, 0x05);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set FLASHCLK_CTRL");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* after reset set other registers of SLC,
- * so reset calling is here at the begining
- */
- retval = lpc32xx_reset(nand);
- if (ERROR_OK != retval)
- return ERROR_NAND_OPERATION_FAILED;
-
- /* SLC_CFG =
- Force nCE assert,
- DMA ECC enabled,
- ECC enabled,
- DMA burst enabled,
- DMA read from SLC,
- WIDTH = bus_width)
- */
- retval = target_write_u32(target, 0x20020014,
- 0x3e | (bus_width == 16) ? 1 : 0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set SLC_CFG");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */
- retval = target_write_u32(target, 0x20020020, 0x03);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set SLC_IEN");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* DMA configuration */
-
- /* DMACLK_CTRL = 0x01 (enable clock for DMA controller) */
- retval = target_write_u32(target, 0x400040e8, 0x01);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set DMACLK_CTRL");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* DMACConfig = DMA enabled*/
- retval = target_write_u32(target, 0x31000030, 0x01);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set DMACConfig");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* calculate NAND controller timings */
- cycle = lpc32xx_cycle_time(nand);
-
- r_setup = w_setup = 0;
- r_hold = w_hold = 10 / cycle;
- r_width = 30 / cycle;
- w_width = 40 / cycle;
- r_rdy = w_rdy = 100 / cycle;
-
- /* SLC_TAC: SLC timing arcs register */
- retval = target_write_u32(target, 0x2002002c,
- (r_setup & 0xf)
- | ((r_hold & 0xf) << 4)
- | ((r_width & 0xf) << 8)
- | ((r_rdy & 0xf) << 12)
- | ((w_setup & 0xf) << 16)
- | ((w_hold & 0xf) << 20)
- | ((w_width & 0xf) << 24)
- | ((w_rdy & 0xf) << 28));
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set SLC_TAC");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc32xx_reset(struct nand_device *nand)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use "
- "LPC32xx NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- /* MLC_CMD = 0xff (reset controller and NAND device) */
- retval = target_write_u32(target, 0x200b8000, 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_CMD");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (!lpc32xx_controller_ready(nand, 100)) {
- LOG_ERROR("LPC32xx MLC NAND controller timed out "
- "after reset");
- return ERROR_NAND_OPERATION_TIMEOUT;
- }
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- /* SLC_CTRL = 0x6 (ECC_CLEAR, SW_RESET) */
- retval = target_write_u32(target, 0x20020010, 0x6);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set SLC_CTRL");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (!lpc32xx_controller_ready(nand, 100)) {
- LOG_ERROR("LPC32xx SLC NAND controller timed out "
- "after reset");
- return ERROR_NAND_OPERATION_TIMEOUT;
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc32xx_command(struct nand_device *nand, uint8_t command)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use "
- "LPC32xx NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- /* MLC_CMD = command */
- retval = target_write_u32(target, 0x200b8000, command);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_CMD");
- return ERROR_NAND_OPERATION_FAILED;
- }
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- /* SLC_CMD = command */
- retval = target_write_u32(target, 0x20020008, command);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set SLC_CMD");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc32xx_address(struct nand_device *nand, uint8_t address)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use "
- "LPC32xx NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- /* MLC_ADDR = address */
- retval = target_write_u32(target, 0x200b8004, address);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- /* SLC_ADDR = address */
- retval = target_write_u32(target, 0x20020004, address);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set SLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc32xx_write_data(struct nand_device *nand, uint16_t data)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use "
- "LPC32xx NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- /* MLC_DATA = data */
- retval = target_write_u32(target, 0x200b0000, data);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_DATA");
- return ERROR_NAND_OPERATION_FAILED;
- }
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- /* SLC_DATA = data */
- retval = target_write_u32(target, 0x20020000, data);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set SLC_DATA");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc32xx_read_data(struct nand_device *nand, void *data)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC32xx "
- "NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- /* data = MLC_DATA, use sized access */
- if (nand->bus_width == 8) {
- uint8_t *data8 = data;
- retval = target_read_u8(target, 0x200b0000, data8);
- } else {
- LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read MLC_DATA");
- return ERROR_NAND_OPERATION_FAILED;
- }
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- uint32_t data32;
-
- /* data = SLC_DATA, must use 32-bit access */
- retval = target_read_u32(target, 0x20020000, &data32);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read SLC_DATA");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (nand->bus_width == 8) {
- uint8_t *data8 = data;
- *data8 = data32 & 0xff;
- } else {
- LOG_ERROR("BUG: bus_width neither 8 nor 16 bit");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- return ERROR_OK;
-}
-
-static int lpc32xx_write_page_mlc(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- struct target *target = nand->target;
- int retval;
- uint8_t status;
- static uint8_t page_buffer[512];
- static uint8_t oob_buffer[6];
- int quarter, num_quarters;
-
- /* MLC_CMD = sequential input */
- retval = target_write_u32(target, 0x200b8000, NAND_CMD_SEQIN);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_CMD");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (nand->page_size == 512) {
- /* MLC_ADDR = 0x0 (one column cycle) */
- retval = target_write_u32(target, 0x200b8004, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_ADDR = row */
- retval = target_write_u32(target, 0x200b8004, page & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- retval = target_write_u32(target, 0x200b8004,
- (page >> 8) & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (nand->address_cycles == 4) {
- retval = target_write_u32(target, 0x200b8004,
- (page >> 16) & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
- } else {
- /* MLC_ADDR = 0x0 (two column cycles) */
- retval = target_write_u32(target, 0x200b8004, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- retval = target_write_u32(target, 0x200b8004, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_ADDR = row */
- retval = target_write_u32(target, 0x200b8004, page & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- retval = target_write_u32(target, 0x200b8004,
- (page >> 8) & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- /* when using the MLC controller, we have to treat a large page device
- * as being made out of four quarters, each the size of a small page
- * device
- */
- num_quarters = (nand->page_size == 2048) ? 4 : 1;
-
- for (quarter = 0; quarter < num_quarters; quarter++) {
- int thisrun_data_size = (data_size > 512) ? 512 : data_size;
- int thisrun_oob_size = (oob_size > 6) ? 6 : oob_size;
-
- memset(page_buffer, 0xff, 512);
- if (data) {
- memcpy(page_buffer, data, thisrun_data_size);
- data_size -= thisrun_data_size;
- data += thisrun_data_size;
- }
-
- memset(oob_buffer, 0xff, 6);
- if (oob) {
- memcpy(oob_buffer, oob, thisrun_oob_size);
- oob_size -= thisrun_oob_size;
- oob += thisrun_oob_size;
- }
-
- /* write MLC_ECC_ENC_REG to start encode cycle */
- retval = target_write_u32(target, 0x200b8008, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ECC_ENC_REG");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- retval = target_write_memory(target, 0x200a8000,
- 4, 128, page_buffer);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_BUF (data)");
- return ERROR_NAND_OPERATION_FAILED;
- }
- retval = target_write_memory(target, 0x200a8000,
- 1, 6, oob_buffer);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_BUF (oob)");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* write MLC_ECC_AUTO_ENC_REG to start auto encode */
- retval = target_write_u32(target, 0x200b8010, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ECC_AUTO_ENC_REG");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (!lpc32xx_controller_ready(nand, 1000)) {
- LOG_ERROR("timeout while waiting for "
- "completion of auto encode cycle");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- /* MLC_CMD = auto program command */
- retval = target_write_u32(target, 0x200b8000, NAND_CMD_PAGEPROG);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_CMD");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- retval = nand_read_status(nand, &status);
- if (retval != ERROR_OK) {
- LOG_ERROR("couldn't read status");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & NAND_STATUS_FAIL) {
- LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
- status);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-/* SLC controller in !raw mode will use target cpu to read/write nand from/to
- * target internal memory. The transfer to/from flash is done by DMA. This
- * function sets up the dma linked list in host memory for later transfer to
- * target.
- */
-static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size,
- int do_read)
-{
- uint32_t i, dmasrc, ctrl, ecc_ctrl, oob_ctrl, dmadst;
-
- /* DMACCxControl =
- TransferSize =64,
- Source burst size =16,
- Destination burst size = 16,
- Source transfer width = 32 bit,
- Destination transfer width = 32 bit,
- Source AHB master select = M0,
- Destination AHB master select = M0,
- Source increment = 0, // set later
- Destination increment = 0, // set later
- Terminal count interrupt enable bit = 0 // set on last
- */ /*
- * Write Operation Sequence for Small Block NAND
- * ----------------------------------------------------------
- * 1. X'fer 256 bytes of data from Memory to Flash.
- * 2. Copy generated ECC data from Register to Spare Area
- * 3. X'fer next 256 bytes of data from Memory to Flash.
- * 4. Copy generated ECC data from Register to Spare Area.
- * 5. X'fer 16 byets of Spare area from Memory to Flash.
- * Read Operation Sequence for Small Block NAND
- * ----------------------------------------------------------
- * 1. X'fer 256 bytes of data from Flash to Memory.
- * 2. Copy generated ECC data from Register to ECC calc Buffer.
- * 3. X'fer next 256 bytes of data from Flash to Memory.
- * 4. Copy generated ECC data from Register to ECC calc Buffer.
- * 5. X'fer 16 bytes of Spare area from Flash to Memory.
- * Write Operation Sequence for Large Block NAND
- * ----------------------------------------------------------
- * 1. Steps(1-4) of Write Operations repeate for four times
- * which generates 16 DMA descriptors to X'fer 2048 bytes of
- * data & 32 bytes of ECC data.
- * 2. X'fer 64 bytes of Spare area from Memory to Flash.
- * Read Operation Sequence for Large Block NAND
- * ----------------------------------------------------------
- * 1. Steps(1-4) of Read Operations repeate for four times
- * which generates 16 DMA descriptors to X'fer 2048 bytes of
- * data & 32 bytes of ECC data.
- * 2. X'fer 64 bytes of Spare area from Flash to Memory.
- */
-
- ctrl = (0x40 | 3 << 12 | 3 << 15 | 2 << 18 | 2 << 21 | 0 << 24
- | 0 << 25 | 0 << 26 | 0 << 27 | 0 << 31);
-
- /* DMACCxControl =
- TransferSize =1,
- Source burst size =4,
- Destination burst size = 4,
- Source transfer width = 32 bit,
- Destination transfer width = 32 bit,
- Source AHB master select = M0,
- Destination AHB master select = M0,
- Source increment = 0,
- Destination increment = 1,
- Terminal count interrupt enable bit = 0
- */
- ecc_ctrl = 0x01 | 1 << 12 | 1 << 15 | 2 << 18 | 2 << 21 | 0 << 24
- | 0 << 25 | 0 << 26 | 1 << 27 | 0 << 31;
-
- /* DMACCxControl =
- TransferSize =16 for lp or 4 for sp,
- Source burst size =16,
- Destination burst size = 16,
- Source transfer width = 32 bit,
- Destination transfer width = 32 bit,
- Source AHB master select = M0,
- Destination AHB master select = M0,
- Source increment = 0, // set later
- Destination increment = 0, // set later
- Terminal count interrupt enable bit = 1 // set on last
- */
- oob_ctrl = (page_size == 2048 ? 0x10 : 0x04)
- | 3 << 12 | 3 << 15 | 2 << 18 | 2 << 21 | 0 << 24
- | 0 << 25 | 0 << 26 | 0 << 27 | 1 << 31;
- if (do_read) {
- ctrl |= 1 << 27;/* Destination increment = 1 */
- oob_ctrl |= 1 << 27; /* Destination increment = 1 */
- dmasrc = 0x20020038; /* SLC_DMA_DATA */
- dmadst = target_mem_base + DATA_OFFS;
- } else {
- ctrl |= 1 << 26;/* Source increment = 1 */
- oob_ctrl |= 1 << 26; /* Source increment = 1 */
- dmasrc = target_mem_base + DATA_OFFS;
- dmadst = 0x20020038; /* SLC_DMA_DATA */
- }
- /*
- * Write Operation Sequence for Small Block NAND
- * ----------------------------------------------------------
- * 1. X'fer 256 bytes of data from Memory to Flash.
- * 2. Copy generated ECC data from Register to Spare Area
- * 3. X'fer next 256 bytes of data from Memory to Flash.
- * 4. Copy generated ECC data from Register to Spare Area.
- * 5. X'fer 16 byets of Spare area from Memory to Flash.
- * Read Operation Sequence for Small Block NAND
- * ----------------------------------------------------------
- * 1. X'fer 256 bytes of data from Flash to Memory.
- * 2. Copy generated ECC data from Register to ECC calc Buffer.
- * 3. X'fer next 256 bytes of data from Flash to Memory.
- * 4. Copy generated ECC data from Register to ECC calc Buffer.
- * 5. X'fer 16 bytes of Spare area from Flash to Memory.
- * Write Operation Sequence for Large Block NAND
- * ----------------------------------------------------------
- * 1. Steps(1-4) of Write Operations repeate for four times
- * which generates 16 DMA descriptors to X'fer 2048 bytes of
- * data & 32 bytes of ECC data.
- * 2. X'fer 64 bytes of Spare area from Memory to Flash.
- * Read Operation Sequence for Large Block NAND
- * ----------------------------------------------------------
- * 1. Steps(1-4) of Read Operations repeate for four times
- * which generates 16 DMA descriptors to X'fer 2048 bytes of
- * data & 32 bytes of ECC data.
- * 2. X'fer 64 bytes of Spare area from Flash to Memory.
- */
- for (i = 0; i < page_size/0x100; i++) {
- dmalist[i*2].dma_src = (do_read ? dmasrc : (dmasrc + i * 256));
- dmalist[i*2].dma_dest = (do_read ? (dmadst + i * 256) : dmadst);
- dmalist[i*2].next_lli =
- target_mem_base + (i*2 + 1) * sizeof(dmac_ll_t);
- dmalist[i*2].next_ctrl = ctrl;
-
- dmalist[(i*2) + 1].dma_src = 0x20020034;/* SLC_ECC */
- dmalist[(i*2) + 1].dma_dest =
- target_mem_base + ECC_OFFS + i * 4;
- dmalist[(i*2) + 1].next_lli =
- target_mem_base + (i*2 + 2) * sizeof(dmac_ll_t);
- dmalist[(i*2) + 1].next_ctrl = ecc_ctrl;
-
- }
- if (do_read)
- dmadst = target_mem_base + SPARE_OFFS;
- else {
- dmasrc = target_mem_base + SPARE_OFFS;
- dmalist[(i*2) - 1].next_lli = 0;/* last link = null on write */
- dmalist[(i*2) - 1].next_ctrl |= (1 << 31); /* Set TC enable */
- }
- dmalist[i*2].dma_src = dmasrc;
- dmalist[i*2].dma_dest = dmadst;
- dmalist[i*2].next_lli = 0;
- dmalist[i*2].next_ctrl = oob_ctrl;
-
- return i * 2 + 1; /* Number of descriptors */
-}
-
-static int lpc32xx_start_slc_dma(struct nand_device *nand, uint32_t count,
- int do_wait)
-{
- struct target *target = nand->target;
- int retval;
-
- /* DMACIntTCClear = ch0 */
- retval = target_write_u32(target, 0x31000008, 1);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not set DMACIntTCClear");
- return retval;
- }
-
- /* DMACIntErrClear = ch0 */
- retval = target_write_u32(target, 0x31000010, 1);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not set DMACIntErrClear");
- return retval;
- }
-
- /* DMACCxConfig=
- E=1,
- SrcPeripheral = 1 (SLC),
- DestPeripheral = 1 (SLC),
- FlowCntrl = 2 (Pher -> Mem, DMA),
- IE = 0,
- ITC = 0,
- L= 0,
- H=0
- */
- retval = target_write_u32(target, 0x31000110,
- 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14
- | 0<<15 | 0<<16 | 0<<18);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not set DMACC0Config");
- return retval;
- }
-
- /* SLC_CTRL = 3 (START DMA), ECC_CLEAR */
- retval = target_write_u32(target, 0x20020010, 0x3);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not set SLC_CTRL");
- return retval;
- }
-
- /* SLC_ICR = 2, INT_TC_CLR, clear pending TC*/
- retval = target_write_u32(target, 0x20020028, 2);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not set SLC_ICR");
- return retval;
- }
-
- /* SLC_TC */
- retval = target_write_u32(target, 0x20020030, count);
- if (ERROR_OK != retval) {
- LOG_ERROR("lpc32xx_start_slc_dma: Could not set SLC_TC");
- return retval;
- }
-
- /* Wait finish */
- if (do_wait && !lpc32xx_tc_ready(nand, 100)) {
- LOG_ERROR("timeout while waiting for completion of DMA");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- return retval;
-}
-
-static int lpc32xx_dma_ready(struct nand_device *nand, int timeout)
-{
- struct target *target = nand->target;
-
- LOG_DEBUG("lpc32xx_dma_ready count start=%d", timeout);
-
- do {
- uint32_t tc_stat;
- uint32_t err_stat;
- int retval;
-
- /* Read DMACRawIntTCStat */
- retval = target_read_u32(target, 0x31000014, &tc_stat);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not read DMACRawIntTCStat");
- return 0;
- }
- /* Read DMACRawIntErrStat */
- retval = target_read_u32(target, 0x31000018, &err_stat);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not read DMACRawIntErrStat");
- return 0;
- }
- if ((tc_stat | err_stat) & 1) {
- LOG_DEBUG("lpc32xx_dma_ready count=%d",
- timeout);
- if (err_stat & 1) {
- LOG_ERROR("lpc32xx_dma_ready "
- "DMA error, aborted");
- return 0;
- } else
- return 1;
- }
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-static uint32_t slc_ecc_copy_to_buffer(uint8_t *spare,
- const uint32_t *ecc, int count)
-{
- int i;
- for (i = 0; i < (count * 3); i += 3) {
- uint32_t ce = ecc[i/3];
- ce = ~(ce << 2) & 0xFFFFFF;
- spare[i+2] = (uint8_t)(ce & 0xFF); ce >>= 8;
- spare[i+1] = (uint8_t)(ce & 0xFF); ce >>= 8;
- spare[i] = (uint8_t)(ce & 0xFF);
- }
- return 0;
-}
-
-static void lpc32xx_dump_oob(uint8_t *oob, uint32_t oob_size)
-{
- int addr = 0;
- while (oob_size > 0) {
- LOG_DEBUG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", addr,
- oob[0], oob[1], oob[2], oob[3],
- oob[4], oob[5], oob[6], oob[7]);
- oob += 8;
- addr += 8;
- oob_size -= 8;
- }
-}
-
-static int lpc32xx_write_page_slc(struct nand_device *nand,
- struct working_area *pworking_area,
- uint32_t page, uint8_t *data,
- uint32_t data_size, uint8_t *oob,
- uint32_t oob_size)
-{
- struct target *target = nand->target;
- int retval;
- uint32_t target_mem_base;
-
- LOG_DEBUG("SLC write page %" PRIx32 " data=%d, oob=%d, "
- "data_size=%" PRIu32 ", oob_size=%" PRIu32,
- page, data != 0, oob != 0, data_size, oob_size);
-
- target_mem_base = pworking_area->address;
- /*
- * Skip writting page which has all 0xFF data as this will
- * generate 0x0 value.
- */
- if (data && !oob) {
- uint32_t i, all_ff = 1;
- for (i = 0; i < data_size; i++)
- if (data[i] != 0xFF) {
- all_ff = 0;
- break;
- }
- if (all_ff)
- return ERROR_OK;
- }
- /* Make the dma descriptors in local memory */
- int nll = lpc32xx_make_dma_list(target_mem_base, nand->page_size, 0);
- /* Write them to target.
- XXX: Assumes host and target have same byte sex.
- */
- retval = target_write_memory(target, target_mem_base, 4,
- nll * sizeof(dmac_ll_t) / 4,
- (uint8_t *)dmalist);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not write DMA descriptors to IRAM");
- return retval;
- }
-
- retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
- if (ERROR_OK != retval) {
- LOG_ERROR("NAND_CMD_SEQIN failed");
- return retval;
- }
-
- /* SLC_CFG =
- Force nCE assert,
- DMA ECC enabled,
- ECC enabled,
- DMA burst enabled,
- DMA write to SLC,
- WIDTH = bus_width
- */
- retval = target_write_u32(target, 0x20020014, 0x3c);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not set SLC_CFG");
- return retval;
- }
- if (data) {
- /* Write data to target */
- static uint8_t fdata[2048];
- memset(fdata, 0xFF, nand->page_size);
- memcpy(fdata, data, data_size);
- retval = target_write_memory(target,
- target_mem_base + DATA_OFFS,
- 4, nand->page_size/4, fdata);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not write data to IRAM");
- return retval;
- }
-
- /* Write first decriptor to DMA controller */
- retval = target_write_memory(target, 0x31000100, 4,
- sizeof(dmac_ll_t) / 4,
- (uint8_t *)dmalist);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not write DMA descriptor to DMAC");
- return retval;
- }
-
- /* Start xfer of data from iram to flash using DMA */
- int tot_size = nand->page_size;
- tot_size += tot_size == 2048 ? 64 : 16;
- retval = lpc32xx_start_slc_dma(nand, tot_size, 0);
- if (ERROR_OK != retval) {
- LOG_ERROR("DMA failed");
- return retval;
- }
-
- /* Wait for DMA to finish. SLC is not finished at this stage */
- if (!lpc32xx_dma_ready(nand, 100)) {
- LOG_ERROR("Data DMA failed during write");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- } /* data xfer */
-
- /* Copy OOB to iram */
- static uint8_t foob[64];
- int foob_size = nand->page_size == 2048 ? 64 : 16;
- memset(foob, 0xFF, foob_size);
- if (oob) /* Raw mode */
- memcpy(foob, oob, oob_size);
- else {
- /* Get HW generated ECC, made while writing data */
- int ecc_count = nand->page_size == 2048 ? 8 : 2;
- static uint32_t hw_ecc[8];
- retval = target_read_memory(target, target_mem_base + ECC_OFFS,
- 4, ecc_count, (uint8_t *)hw_ecc);
- if (ERROR_OK != retval) {
- LOG_ERROR("Reading hw generated ECC from IRAM failed");
- return retval;
- }
- /* Copy to oob, at correct offsets */
- static uint8_t ecc[24];
- slc_ecc_copy_to_buffer(ecc, hw_ecc, ecc_count);
- const int *layout = nand->page_size == 2048 ? lp_ooblayout : sp_ooblayout;
- int i;
- for (i = 0; i < ecc_count * 3; i++)
- foob[layout[i]] = ecc[i];
- lpc32xx_dump_oob(foob, foob_size);
- }
- retval = target_write_memory(target, target_mem_base + SPARE_OFFS, 4,
- foob_size / 4, foob);
- if (ERROR_OK != retval) {
- LOG_ERROR("Writing OOB to IRAM failed");
- return retval;
- }
-
- /* Write OOB decriptor to DMA controller */
- retval = target_write_memory(target, 0x31000100, 4,
- sizeof(dmac_ll_t) / 4,
- (uint8_t *)(&dmalist[nll-1]));
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not write OOB DMA descriptor to DMAC");
- return retval;
- }
- if (data) {
- /* Only restart DMA with last descriptor,
- * don't setup SLC again */
-
- /* DMACIntTCClear = ch0 */
- retval = target_write_u32(target, 0x31000008, 1);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not set DMACIntTCClear");
- return retval;
- }
- /* DMACCxConfig=
- * E=1,
- * SrcPeripheral = 1 (SLC),
- * DestPeripheral = 1 (SLC),
- * FlowCntrl = 2 (Pher -> Mem, DMA),
- * IE = 0,
- * ITC = 0,
- * L= 0,
- * H=0
- */
- retval = target_write_u32(target, 0x31000110,
- 1 | 1<<1 | 1<<6 | 2<<11 | 0<<14
- | 0<<15 | 0<<16 | 0<<18);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not set DMACC0Config");
- return retval;
- }
- /* Wait finish */
- if (!lpc32xx_tc_ready(nand, 100)) {
- LOG_ERROR("timeout while waiting for "
- "completion of DMA");
- return ERROR_NAND_OPERATION_FAILED;
- }
- } else {
- /* Start xfer of data from iram to flash using DMA */
- retval = lpc32xx_start_slc_dma(nand, foob_size, 1);
- if (ERROR_OK != retval) {
- LOG_ERROR("DMA OOB failed");
- return retval;
- }
- }
-
- /* Let NAND start actual writing */
- retval = nand_write_finish(nand);
- if (ERROR_OK != retval) {
- LOG_ERROR("nand_write_finish failed");
- return retval;
- }
-
- return ERROR_OK;
-}
-
-static int lpc32xx_write_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval = ERROR_OK;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC32xx "
- "NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- if (!data && oob) {
- LOG_ERROR("LPC32xx MLC controller can't write "
- "OOB data only");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- if (oob && (oob_size > 24)) {
- LOG_ERROR("LPC32xx MLC controller can't write more "
- "than 6 bytes for each quarter's OOB data");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- if (data_size > (uint32_t)nand->page_size) {
- LOG_ERROR("data size exceeds page size");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
-
- retval = lpc32xx_write_page_mlc(nand, page, data, data_size,
- oob, oob_size);
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- struct working_area *pworking_area;
- if (!data && oob) {
- /*
- * if oob only mode is active original method is used
- * as SLC controller hangs during DMA interworking. (?)
- * Anyway the code supports the oob only mode below.
- */
- return nand_write_page_raw(nand, page, data,
- data_size, oob, oob_size);
- }
- retval = target_alloc_working_area(target,
- nand->page_size + DATA_OFFS,
- &pworking_area);
- if (retval != ERROR_OK) {
- LOG_ERROR("Can't allocate working area in "
- "LPC internal RAM");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- retval = lpc32xx_write_page_slc(nand, pworking_area, page,
- data, data_size, oob, oob_size);
- target_free_working_area(target, pworking_area);
- }
-
- return retval;
-}
-
-static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- struct target *target = nand->target;
- static uint8_t page_buffer[2048];
- static uint8_t oob_buffer[64];
- uint32_t page_bytes_done = 0;
- uint32_t oob_bytes_done = 0;
- uint32_t mlc_isr;
- int retval;
-
- if (!data && oob) {
- /* MLC_CMD = Read OOB
- * we can use the READOOB command on both small and large page
- * devices, as the controller translates the 0x50 command to
- * a 0x0 with appropriate positioning of the serial buffer
- * read pointer
- */
- retval = target_write_u32(target, 0x200b8000, NAND_CMD_READOOB);
- } else {
- /* MLC_CMD = Read0 */
- retval = target_write_u32(target, 0x200b8000, NAND_CMD_READ0);
- }
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_CMD");
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (nand->page_size == 512) {
- /* small page device
- * MLC_ADDR = 0x0 (one column cycle) */
- retval = target_write_u32(target, 0x200b8004, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_ADDR = row */
- retval = target_write_u32(target, 0x200b8004, page & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- retval = target_write_u32(target, 0x200b8004,
- (page >> 8) & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (nand->address_cycles == 4) {
- retval = target_write_u32(target, 0x200b8004,
- (page >> 16) & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
- } else {
- /* large page device
- * MLC_ADDR = 0x0 (two column cycles) */
- retval = target_write_u32(target, 0x200b8004, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- retval = target_write_u32(target, 0x200b8004, 0x0);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_ADDR = row */
- retval = target_write_u32(target, 0x200b8004, page & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
- retval = target_write_u32(target, 0x200b8004,
- (page >> 8) & 0xff);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ADDR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- /* MLC_CMD = Read Start */
- retval = target_write_u32(target, 0x200b8000,
- NAND_CMD_READSTART);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_CMD");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- while (page_bytes_done < (uint32_t)nand->page_size) {
- /* MLC_ECC_AUTO_DEC_REG = dummy */
- retval = target_write_u32(target, 0x200b8014, 0xaa55aa55);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_ECC_AUTO_DEC_REG");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (!lpc32xx_controller_ready(nand, 1000)) {
- LOG_ERROR("timeout while waiting for "
- "completion of auto decode cycle");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- retval = target_read_u32(target, 0x200b8048, &mlc_isr);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read MLC_ISR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (mlc_isr & 0x8) {
- if (mlc_isr & 0x40) {
- LOG_ERROR("uncorrectable error detected: "
- "0x%2.2x", (unsigned)mlc_isr);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- LOG_WARNING("%i symbol error detected and corrected",
- ((int)(((mlc_isr & 0x30) >> 4) + 1)));
- }
-
- if (data) {
- retval = target_read_memory(target, 0x200a8000, 4, 128,
- page_buffer + page_bytes_done);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read MLC_BUF (data)");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- if (oob) {
- retval = target_read_memory(target, 0x200a8000, 4, 4,
- oob_buffer + oob_bytes_done);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read MLC_BUF (oob)");
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
-
- page_bytes_done += 512;
- oob_bytes_done += 16;
- }
-
- if (data)
- memcpy(data, page_buffer, data_size);
-
- if (oob)
- memcpy(oob, oob_buffer, oob_size);
-
- return ERROR_OK;
-}
-
-static int lpc32xx_read_page_slc(struct nand_device *nand,
- struct working_area *pworking_area,
- uint32_t page, uint8_t *data,
- uint32_t data_size, uint8_t *oob,
- uint32_t oob_size)
-{
- struct target *target = nand->target;
- int retval;
- uint32_t target_mem_base;
-
- LOG_DEBUG("SLC read page %" PRIx32 " data=%" PRIu32 ", oob=%" PRIu32,
- page, data_size, oob_size);
-
- target_mem_base = pworking_area->address;
-
- /* Make the dma descriptors in local memory */
- int nll = lpc32xx_make_dma_list(target_mem_base, nand->page_size, 1);
- /* Write them to target.
- XXX: Assumes host and target have same byte sex.
- */
- retval = target_write_memory(target, target_mem_base, 4,
- nll * sizeof(dmac_ll_t) / 4,
- (uint8_t *)dmalist);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not write DMA descriptors to IRAM");
- return retval;
- }
-
- retval = nand_page_command(nand, page, NAND_CMD_READ0, 0);
- if (ERROR_OK != retval) {
- LOG_ERROR("lpc32xx_read_page_slc: NAND_CMD_READ0 failed");
- return retval;
- }
-
- /* SLC_CFG =
- Force nCE assert,
- DMA ECC enabled,
- ECC enabled,
- DMA burst enabled,
- DMA read from SLC,
- WIDTH = bus_width
- */
- retval = target_write_u32(target, 0x20020014, 0x3e);
- if (ERROR_OK != retval) {
- LOG_ERROR("lpc32xx_read_page_slc: Could not set SLC_CFG");
- return retval;
- }
-
- /* Write first decriptor to DMA controller */
- retval = target_write_memory(target, 0x31000100, 4,
- sizeof(dmac_ll_t) / 4, (uint8_t *)dmalist);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not write DMA descriptor to DMAC");
- return retval;
- }
-
- /* Start xfer of data from flash to iram using DMA */
- int tot_size = nand->page_size;
- tot_size += nand->page_size == 2048 ? 64 : 16;
- retval = lpc32xx_start_slc_dma(nand, tot_size, 1);
- if (ERROR_OK != retval) {
- LOG_ERROR("lpc32xx_read_page_slc: DMA read failed");
- return retval;
- }
-
- /* Copy data from iram */
- if (data) {
- retval = target_read_memory(target, target_mem_base + DATA_OFFS,
- 4, data_size/4, data);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not read data from IRAM");
- return retval;
- }
- }
- if (oob) {
- /* No error correction, just return data as read from flash */
- retval = target_read_memory(target,
- target_mem_base + SPARE_OFFS, 4,
- oob_size/4, oob);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not read OOB from IRAM");
- return retval;
- }
- return ERROR_OK;
- }
-
- /* Copy OOB from flash, stored in IRAM */
- static uint8_t foob[64];
- retval = target_read_memory(target, target_mem_base + SPARE_OFFS,
- 4, nand->page_size == 2048 ? 16 : 4, foob);
- lpc32xx_dump_oob(foob, nand->page_size == 2048 ? 64 : 16);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not read OOB from IRAM");
- return retval;
- }
- /* Copy ECC from HW, generated while reading */
- int ecc_count = nand->page_size == 2048 ? 8 : 2;
- static uint32_t hw_ecc[8]; /* max size */
- retval = target_read_memory(target, target_mem_base + ECC_OFFS, 4,
- ecc_count, (uint8_t *)hw_ecc);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not read hw generated ECC from IRAM");
- return retval;
- }
- static uint8_t ecc[24];
- slc_ecc_copy_to_buffer(ecc, hw_ecc, ecc_count);
- /* Copy ECC from flash using correct layout */
- static uint8_t fecc[24];/* max size */
- const int *layout = nand->page_size == 2048 ? lp_ooblayout : sp_ooblayout;
- int i;
- for (i = 0; i < ecc_count * 3; i++)
- fecc[i] = foob[layout[i]];
- /* Compare ECC and possibly correct data */
- for (i = 0; i < ecc_count; i++) {
- retval = nand_correct_data(nand, data + 256*i, &fecc[i * 3],
- &ecc[i * 3]);
- if (retval > 0)
- LOG_WARNING("error detected and corrected: %" PRIu32 "/%d",
- page, i);
- if (retval < 0)
- break;
- }
- if (i == ecc_count)
- retval = ERROR_OK;
- else {
- LOG_ERROR("uncorrectable error detected: %" PRIu32 "/%d", page, i);
- retval = ERROR_NAND_OPERATION_FAILED;
- }
- return retval;
-}
-
-static int lpc32xx_read_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size,
- uint8_t *oob, uint32_t oob_size)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval = ERROR_OK;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC32xx "
- "NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (lpc32xx_info->selected_controller == LPC32xx_NO_CONTROLLER) {
- LOG_ERROR("BUG: no LPC32xx NAND flash controller selected");
- return ERROR_NAND_OPERATION_FAILED;
- } else if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- if (data_size > (uint32_t)nand->page_size) {
- LOG_ERROR("data size exceeds page size");
- return ERROR_NAND_OPERATION_NOT_SUPPORTED;
- }
- retval = lpc32xx_read_page_mlc(nand, page, data, data_size,
- oob, oob_size);
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- struct working_area *pworking_area;
-
- retval = target_alloc_working_area(target,
- nand->page_size + 0x200,
- &pworking_area);
- if (retval != ERROR_OK) {
- LOG_ERROR("Can't allocate working area in "
- "LPC internal RAM");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- retval = lpc32xx_read_page_slc(nand, pworking_area, page,
- data, data_size, oob, oob_size);
- target_free_working_area(target, pworking_area);
- }
-
- return retval;
-}
-
-static int lpc32xx_controller_ready(struct nand_device *nand, int timeout)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC32xx "
- "NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- LOG_DEBUG("lpc32xx_controller_ready count start=%d", timeout);
-
- do {
- if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- uint8_t status;
-
- /* Read MLC_ISR, wait for controller to become ready */
- retval = target_read_u8(target, 0x200b8048, &status);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set MLC_STAT");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & 2) {
- LOG_DEBUG("lpc32xx_controller_ready count=%d",
- timeout);
- return 1;
- }
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- uint32_t status;
-
- /* Read SLC_STAT and check READY bit */
- retval = target_read_u32(target, 0x20020018, &status);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not set SLC_STAT");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & 1) {
- LOG_DEBUG("lpc32xx_controller_ready count=%d",
- timeout);
- return 1;
- }
- }
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-static int lpc32xx_nand_ready(struct nand_device *nand, int timeout)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = nand->controller_priv;
- struct target *target = nand->target;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("target must be halted to use LPC32xx "
- "NAND flash controller");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- LOG_DEBUG("lpc32xx_nand_ready count start=%d", timeout);
-
- do {
- if (lpc32xx_info->selected_controller == LPC32xx_MLC_CONTROLLER) {
- uint8_t status = 0x0;
-
- /* Read MLC_ISR, wait for NAND flash device to
- * become ready */
- retval = target_read_u8(target, 0x200b8048, &status);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read MLC_ISR");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & 1) {
- LOG_DEBUG("lpc32xx_nand_ready count end=%d",
- timeout);
- return 1;
- }
- } else if (lpc32xx_info->selected_controller == LPC32xx_SLC_CONTROLLER) {
- uint32_t status = 0x0;
-
- /* Read SLC_STAT and check READY bit */
- retval = target_read_u32(target, 0x20020018, &status);
- if (ERROR_OK != retval) {
- LOG_ERROR("could not read SLC_STAT");
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (status & 1) {
- LOG_DEBUG("lpc32xx_nand_ready count end=%d",
- timeout);
- return 1;
- }
- }
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-static int lpc32xx_tc_ready(struct nand_device *nand, int timeout)
-{
- struct target *target = nand->target;
-
- LOG_DEBUG("lpc32xx_tc_ready count start=%d", timeout);
-
- do {
- uint32_t status = 0x0;
- int retval;
- /* Read SLC_INT_STAT and check INT_TC_STAT bit */
- retval = target_read_u32(target, 0x2002001c, &status);
- if (ERROR_OK != retval) {
- LOG_ERROR("Could not read SLC_INT_STAT");
- return 0;
- }
- if (status & 2) {
- LOG_DEBUG("lpc32xx_tc_ready count=%d", timeout);
- return 1;
- }
-
- alive_sleep(1);
- } while (timeout-- > 0);
-
- return 0;
-}
-
-COMMAND_HANDLER(handle_lpc32xx_select_command)
-{
- struct lpc32xx_nand_controller *lpc32xx_info = NULL;
- char *selected[] = {
- "no", "mlc", "slc"
- };
-
- if ((CMD_ARGC < 1) || (CMD_ARGC > 3))
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- unsigned num;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
- struct nand_device *nand = get_nand_device_by_num(num);
- if (!nand) {
- command_print(CMD_CTX, "nand device '#%s' is out of bounds",
- CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- lpc32xx_info = nand->controller_priv;
-
- if (CMD_ARGC >= 2) {
- if (strcmp(CMD_ARGV[1], "mlc") == 0) {
- lpc32xx_info->selected_controller =
- LPC32xx_MLC_CONTROLLER;
- } else if (strcmp(CMD_ARGV[1], "slc") == 0) {
- lpc32xx_info->selected_controller =
- LPC32xx_SLC_CONTROLLER;
- } else
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD_CTX, "%s controller selected",
- selected[lpc32xx_info->selected_controller]);
-
- return ERROR_OK;
-}
-
-static const struct command_registration lpc32xx_exec_command_handlers[] = {
- {
- .name = "select",
- .handler = handle_lpc32xx_select_command,
- .mode = COMMAND_EXEC,
- .help = "select MLC or SLC controller (default is MLC)",
- .usage = "bank_id ['mlc'|'slc' ]",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration lpc32xx_command_handler[] = {
- {
- .name = "lpc32xx",
- .mode = COMMAND_ANY,
- .help = "LPC32xx NAND flash controller commands",
- .usage = "",
- .chain = lpc32xx_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct nand_flash_controller lpc32xx_nand_controller = {
- .name = "lpc32xx",
- .commands = lpc32xx_command_handler,
- .nand_device_command = lpc32xx_nand_device_command,
- .init = lpc32xx_init,
- .reset = lpc32xx_reset,
- .command = lpc32xx_command,
- .address = lpc32xx_address,
- .write_data = lpc32xx_write_data,
- .read_data = lpc32xx_read_data,
- .write_page = lpc32xx_write_page,
- .read_page = lpc32xx_read_page,
- .nand_ready = lpc32xx_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc32xx.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc32xx.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc32xx.h
deleted file mode 100755
index 2b1c1a8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/lpc32xx.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef LPC32xx_NAND_CONTROLLER_H
-#define LPC32xx_NAND_CONTROLLER_H
-
-enum lpc32xx_selected_controller {
- LPC32xx_NO_CONTROLLER,
- LPC32xx_MLC_CONTROLLER,
- LPC32xx_SLC_CONTROLLER,
-};
-
-struct lpc32xx_nand_controller {
- int osc_freq;
- enum lpc32xx_selected_controller selected_controller;
- int sw_write_protection;
- uint32_t sw_wp_lower_bound;
- uint32_t sw_wp_upper_bound;
-};
-
-#endif /*LPC32xx_NAND_CONTROLLER_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mx3.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mx3.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mx3.c
deleted file mode 100755
index 51fa680..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mx3.c
+++ /dev/null
@@ -1,721 +0,0 @@
-
-/***************************************************************************
- * Copyright (C) 2009 by Alexei Babich *
- * Rezonans plc., Chelyabinsk, Russia *
- * impatt@mail.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * Freescale iMX3* OpenOCD NAND Flash controller support.
- *
- * Many thanks to Ben Dooks for writing s3c24xx driver.
- */
-
-/*
-driver tested with STMicro NAND512W3A @imx31
-tested "nand probe #", "nand erase # 0 #", "nand dump # file 0 #", "nand write # file 0"
-get_next_halfword_from_sram_buffer() not tested
-*/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "mx3.h"
-#include <target/target.h>
-
-static const char target_not_halted_err_msg[] =
- "target must be halted to use mx3 NAND flash controller";
-static const char data_block_size_err_msg[] =
- "minimal granularity is one half-word, %" PRId32 " is incorrect";
-static const char sram_buffer_bounds_err_msg[] =
- "trying to access out of SRAM buffer bound (addr=0x%" PRIx32 ")";
-static const char get_status_register_err_msg[] = "can't get NAND status";
-static uint32_t in_sram_address;
-static unsigned char sign_of_sequental_byte_read;
-
-static int test_iomux_settings(struct target *target, uint32_t value,
- uint32_t mask, const char *text);
-static int initialize_nf_controller(struct nand_device *nand);
-static int get_next_byte_from_sram_buffer(struct target *target, uint8_t *value);
-static int get_next_halfword_from_sram_buffer(struct target *target,
- uint16_t *value);
-static int poll_for_complete_op(struct target *target, const char *text);
-static int validate_target_state(struct nand_device *nand);
-static int do_data_output(struct nand_device *nand);
-
-static int imx31_command(struct nand_device *nand, uint8_t command);
-static int imx31_address(struct nand_device *nand, uint8_t address);
-
-NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
-{
- struct mx3_nf_controller *mx3_nf_info;
- mx3_nf_info = malloc(sizeof(struct mx3_nf_controller));
- if (mx3_nf_info == NULL) {
- LOG_ERROR("no memory for nand controller");
- return ERROR_FAIL;
- }
-
- nand->controller_priv = mx3_nf_info;
-
- if (CMD_ARGC < 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
- /*
- * check hwecc requirements
- */
- {
- int hwecc_needed;
- hwecc_needed = strcmp(CMD_ARGV[2], "hwecc");
- if (hwecc_needed == 0)
- mx3_nf_info->flags.hw_ecc_enabled = 1;
- else
- mx3_nf_info->flags.hw_ecc_enabled = 0;
- }
-
- mx3_nf_info->optype = MX3_NF_DATAOUT_PAGE;
- mx3_nf_info->fin = MX3_NF_FIN_NONE;
- mx3_nf_info->flags.target_little_endian =
- (nand->target->endianness == TARGET_LITTLE_ENDIAN);
-
- return ERROR_OK;
-}
-
-static int imx31_init(struct nand_device *nand)
-{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = nand->target;
-
- {
- /*
- * validate target state
- */
- int validate_target_result;
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
- }
-
- {
- uint16_t buffsize_register_content;
- target_read_u16(target, MX3_NF_BUFSIZ, &buffsize_register_content);
- mx3_nf_info->flags.one_kb_sram = !(buffsize_register_content & 0x000f);
- }
-
- {
- uint32_t pcsr_register_content;
- target_read_u32(target, MX3_PCSR, &pcsr_register_content);
- if (!nand->bus_width) {
- nand->bus_width = (pcsr_register_content & 0x80000000) ? 16 : 8;
- } else {
- pcsr_register_content |= ((nand->bus_width == 16) ? 0x80000000 : 0x00000000);
- target_write_u32(target, MX3_PCSR, pcsr_register_content);
- }
-
- if (!nand->page_size) {
- nand->page_size = (pcsr_register_content & 0x40000000) ? 2048 : 512;
- } else {
- pcsr_register_content |= ((nand->page_size == 2048) ? 0x40000000 : 0x00000000);
- target_write_u32(target, MX3_PCSR, pcsr_register_content);
- }
- if (mx3_nf_info->flags.one_kb_sram && (nand->page_size == 2048)) {
- LOG_ERROR("NAND controller have only 1 kb SRAM, "
- "so pagesize 2048 is incompatible with it");
- }
- }
-
- {
- uint32_t cgr_register_content;
- target_read_u32(target, MX3_CCM_CGR2, &cgr_register_content);
- if (!(cgr_register_content & 0x00000300)) {
- LOG_ERROR("clock gating to EMI disabled");
- return ERROR_FAIL;
- }
- }
-
- {
- uint32_t gpr_register_content;
- target_read_u32(target, MX3_GPR, &gpr_register_content);
- if (gpr_register_content & 0x00000060) {
- LOG_ERROR("pins mode overrided by GPR");
- return ERROR_FAIL;
- }
- }
-
- {
- /*
- * testing IOMUX settings; must be in "functional-mode output and
- * functional-mode input" mode
- */
- int test_iomux;
- test_iomux = ERROR_OK;
- test_iomux |= test_iomux_settings(target, 0x43fac0c0, 0x7f7f7f00, "d0,d1,d2");
- test_iomux |= test_iomux_settings(target, 0x43fac0c4, 0x7f7f7f7f, "d3,d4,d5,d6");
- test_iomux |= test_iomux_settings(target, 0x43fac0c8, 0x0000007f, "d7");
- if (nand->bus_width == 16) {
- test_iomux |= test_iomux_settings(target, 0x43fac0c8, 0x7f7f7f00, "d8,d9,d10");
- test_iomux |= test_iomux_settings(target, 0x43fac0cc, 0x7f7f7f7f, "d11,d12,d13,d14");
- test_iomux |= test_iomux_settings(target, 0x43fac0d0, 0x0000007f, "d15");
- }
- test_iomux |= test_iomux_settings(target, 0x43fac0d0, 0x7f7f7f00, "nfwp,nfce,nfrb");
- test_iomux |= test_iomux_settings(target, 0x43fac0d4, 0x7f7f7f7f,
- "nfwe,nfre,nfale,nfcle");
- if (test_iomux != ERROR_OK)
- return ERROR_FAIL;
- }
-
- initialize_nf_controller(nand);
-
- {
- int retval;
- uint16_t nand_status_content;
- retval = ERROR_OK;
- retval |= imx31_command(nand, NAND_CMD_STATUS);
- retval |= imx31_address(nand, 0x00);
- retval |= do_data_output(nand);
- if (retval != ERROR_OK) {
- LOG_ERROR(get_status_register_err_msg);
- return ERROR_FAIL;
- }
- target_read_u16(target, MX3_NF_MAIN_BUFFER0, &nand_status_content);
- if (!(nand_status_content & 0x0080)) {
- /*
- * is host-big-endian correctly ??
- */
- LOG_INFO("NAND read-only");
- mx3_nf_info->flags.nand_readonly = 1;
- } else
- mx3_nf_info->flags.nand_readonly = 0;
- }
- return ERROR_OK;
-}
-
-static int imx31_read_data(struct nand_device *nand, void *data)
-{
- struct target *target = nand->target;
- {
- /*
- * validate target state
- */
- int validate_target_result;
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
- }
-
- {
- /*
- * get data from nand chip
- */
- int try_data_output_from_nand_chip;
- try_data_output_from_nand_chip = do_data_output(nand);
- if (try_data_output_from_nand_chip != ERROR_OK)
- return try_data_output_from_nand_chip;
- }
-
- if (nand->bus_width == 16)
- get_next_halfword_from_sram_buffer(target, data);
- else
- get_next_byte_from_sram_buffer(target, data);
-
- return ERROR_OK;
-}
-
-static int imx31_write_data(struct nand_device *nand, uint16_t data)
-{
- LOG_ERROR("write_data() not implemented");
- return ERROR_NAND_OPERATION_FAILED;
-}
-
-static int imx31_reset(struct nand_device *nand)
-{
- /*
- * validate target state
- */
- int validate_target_result;
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
- initialize_nf_controller(nand);
- return ERROR_OK;
-}
-
-static int imx31_command(struct nand_device *nand, uint8_t command)
-{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- {
- /*
- * validate target state
- */
- int validate_target_result;
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
- }
-
- switch (command) {
- case NAND_CMD_READOOB:
- command = NAND_CMD_READ0;
- in_sram_address = MX3_NF_SPARE_BUFFER0; /* set read point for
- * data_read() and
- * read_block_data() to
- * spare area in SRAM
- * buffer */
- break;
- case NAND_CMD_READ1:
- command = NAND_CMD_READ0;
- /*
- * offset == one half of page size
- */
- in_sram_address = MX3_NF_MAIN_BUFFER0 + (nand->page_size >> 1);
- default:
- in_sram_address = MX3_NF_MAIN_BUFFER0;
- }
-
- target_write_u16(target, MX3_NF_FCMD, command);
- /*
- * start command input operation (set MX3_NF_BIT_OP_DONE==0)
- */
- target_write_u16(target, MX3_NF_CFG2, MX3_NF_BIT_OP_FCI);
- {
- int poll_result;
- poll_result = poll_for_complete_op(target, "command");
- if (poll_result != ERROR_OK)
- return poll_result;
- }
- /*
- * reset cursor to begin of the buffer
- */
- sign_of_sequental_byte_read = 0;
- switch (command) {
- case NAND_CMD_READID:
- mx3_nf_info->optype = MX3_NF_DATAOUT_NANDID;
- mx3_nf_info->fin = MX3_NF_FIN_DATAOUT;
- break;
- case NAND_CMD_STATUS:
- mx3_nf_info->optype = MX3_NF_DATAOUT_NANDSTATUS;
- mx3_nf_info->fin = MX3_NF_FIN_DATAOUT;
- break;
- case NAND_CMD_READ0:
- mx3_nf_info->fin = MX3_NF_FIN_DATAOUT;
- mx3_nf_info->optype = MX3_NF_DATAOUT_PAGE;
- break;
- default:
- mx3_nf_info->optype = MX3_NF_DATAOUT_PAGE;
- }
- return ERROR_OK;
-}
-
-static int imx31_address(struct nand_device *nand, uint8_t address)
-{
- struct target *target = nand->target;
- {
- /*
- * validate target state
- */
- int validate_target_result;
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
- }
-
- target_write_u16(target, MX3_NF_FADDR, address);
- /*
- * start address input operation (set MX3_NF_BIT_OP_DONE==0)
- */
- target_write_u16(target, MX3_NF_CFG2, MX3_NF_BIT_OP_FAI);
- {
- int poll_result;
- poll_result = poll_for_complete_op(target, "address");
- if (poll_result != ERROR_OK)
- return poll_result;
- }
- return ERROR_OK;
-}
-
-static int imx31_nand_ready(struct nand_device *nand, int tout)
-{
- uint16_t poll_complete_status;
- struct target *target = nand->target;
-
- {
- /*
- * validate target state
- */
- int validate_target_result;
- validate_target_result = validate_target_state(nand);
- if (validate_target_result != ERROR_OK)
- return validate_target_result;
- }
-
- do {
- target_read_u16(target, MX3_NF_CFG2, &poll_complete_status);
- if (poll_complete_status & MX3_NF_BIT_OP_DONE)
- return tout;
- alive_sleep(1);
- } while (tout-- > 0);
- return tout;
-}
-
-static int imx31_write_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob,
- uint32_t oob_size)
-{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (data_size % 2) {
- LOG_ERROR(data_block_size_err_msg, data_size);
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (oob_size % 2) {
- LOG_ERROR(data_block_size_err_msg, oob_size);
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (!data) {
- LOG_ERROR("nothing to program");
- return ERROR_NAND_OPERATION_FAILED;
- }
- {
- /*
- * validate target state
- */
- int retval;
- retval = validate_target_state(nand);
- if (retval != ERROR_OK)
- return retval;
- }
- {
- int retval = ERROR_OK;
- retval |= imx31_command(nand, NAND_CMD_SEQIN);
- retval |= imx31_address(nand, 0x00);
- retval |= imx31_address(nand, page & 0xff);
- retval |= imx31_address(nand, (page >> 8) & 0xff);
- if (nand->address_cycles >= 4) {
- retval |= imx31_address(nand, (page >> 16) & 0xff);
- if (nand->address_cycles >= 5)
- retval |= imx31_address(nand, (page >> 24) & 0xff);
- }
- target_write_buffer(target, MX3_NF_MAIN_BUFFER0, data_size, data);
- if (oob) {
- if (mx3_nf_info->flags.hw_ecc_enabled) {
- /*
- * part of spare block will be overrided by hardware
- * ECC generator
- */
- LOG_DEBUG("part of spare block will be overrided by hardware ECC generator");
- }
- target_write_buffer(target, MX3_NF_SPARE_BUFFER0, oob_size, oob);
- }
- /*
- * start data input operation (set MX3_NF_BIT_OP_DONE==0)
- */
- target_write_u16(target, MX3_NF_CFG2, MX3_NF_BIT_OP_FDI);
- {
- int poll_result;
- poll_result = poll_for_complete_op(target, "data input");
- if (poll_result != ERROR_OK)
- return poll_result;
- }
- retval |= imx31_command(nand, NAND_CMD_PAGEPROG);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * check status register
- */
- {
- uint16_t nand_status_content;
- retval = ERROR_OK;
- retval |= imx31_command(nand, NAND_CMD_STATUS);
- retval |= imx31_address(nand, 0x00);
- retval |= do_data_output(nand);
- if (retval != ERROR_OK) {
- LOG_ERROR(get_status_register_err_msg);
- return retval;
- }
- target_read_u16(target, MX3_NF_MAIN_BUFFER0, &nand_status_content);
- if (nand_status_content & 0x0001) {
- /*
- * is host-big-endian correctly ??
- */
- return ERROR_NAND_OPERATION_FAILED;
- }
- }
- }
- return ERROR_OK;
-}
-
-static int imx31_read_page(struct nand_device *nand, uint32_t page,
- uint8_t *data, uint32_t data_size, uint8_t *oob,
- uint32_t oob_size)
-{
- struct target *target = nand->target;
-
- if (data_size % 2) {
- LOG_ERROR(data_block_size_err_msg, data_size);
- return ERROR_NAND_OPERATION_FAILED;
- }
- if (oob_size % 2) {
- LOG_ERROR(data_block_size_err_msg, oob_size);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- {
- /*
- * validate target state
- */
- int retval;
- retval = validate_target_state(nand);
- if (retval != ERROR_OK)
- return retval;
- }
- {
- int retval = ERROR_OK;
- retval |= imx31_command(nand, NAND_CMD_READ0);
- retval |= imx31_address(nand, 0x00);
- retval |= imx31_address(nand, page & 0xff);
- retval |= imx31_address(nand, (page >> 8) & 0xff);
- if (nand->address_cycles >= 4) {
- retval |= imx31_address(nand, (page >> 16) & 0xff);
- if (nand->address_cycles >= 5) {
- retval |= imx31_address(nand, (page >> 24) & 0xff);
- retval |= imx31_command(nand, NAND_CMD_READSTART);
- }
- }
- retval |= do_data_output(nand);
- if (retval != ERROR_OK)
- return retval;
-
- if (data) {
- target_read_buffer(target, MX3_NF_MAIN_BUFFER0, data_size,
- data);
- }
- if (oob) {
- target_read_buffer(target, MX3_NF_SPARE_BUFFER0, oob_size,
- oob);
- }
- }
- return ERROR_OK;
-}
-
-static int test_iomux_settings(struct target *target, uint32_t address,
- uint32_t mask, const char *text)
-{
- uint32_t register_content;
- target_read_u32(target, address, ®ister_content);
- if ((register_content & mask) != (0x12121212 & mask)) {
- LOG_ERROR("IOMUX for {%s} is bad", text);
- return ERROR_FAIL;
- }
- return ERROR_OK;
-}
-
-static int initialize_nf_controller(struct nand_device *nand)
-{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- /*
- * resets NAND flash controller in zero time ? I dont know.
- */
- target_write_u16(target, MX3_NF_CFG1, MX3_NF_BIT_RESET_EN);
- {
- uint16_t work_mode;
- work_mode = MX3_NF_BIT_INT_DIS; /* disable interrupt */
- if (target->endianness == TARGET_BIG_ENDIAN)
- work_mode |= MX3_NF_BIT_BE_EN;
- if (mx3_nf_info->flags.hw_ecc_enabled)
- work_mode |= MX3_NF_BIT_ECC_EN;
- target_write_u16(target, MX3_NF_CFG1, work_mode);
- }
- /*
- * unlock SRAM buffer for write; 2 mean "Unlock", other values means "Lock"
- */
- target_write_u16(target, MX3_NF_BUFCFG, 2);
- {
- uint16_t temp;
- target_read_u16(target, MX3_NF_FWP, &temp);
- if ((temp & 0x0007) == 1) {
- LOG_ERROR("NAND flash is tight-locked, reset needed");
- return ERROR_FAIL;
- }
-
- }
- /*
- * unlock NAND flash for write
- */
- target_write_u16(target, MX3_NF_FWP, 4);
- target_write_u16(target, MX3_NF_LOCKSTART, 0x0000);
- target_write_u16(target, MX3_NF_LOCKEND, 0xFFFF);
- /*
- * 0x0000 means that first SRAM buffer @0xB800_0000 will be used
- */
- target_write_u16(target, MX3_NF_BUFADDR, 0x0000);
- /*
- * address of SRAM buffer
- */
- in_sram_address = MX3_NF_MAIN_BUFFER0;
- sign_of_sequental_byte_read = 0;
- return ERROR_OK;
-}
-
-static int get_next_byte_from_sram_buffer(struct target *target, uint8_t *value)
-{
- static uint8_t even_byte;
- /*
- * host-big_endian ??
- */
- if (sign_of_sequental_byte_read == 0)
- even_byte = 0;
- if (in_sram_address > MX3_NF_LAST_BUFFER_ADDR) {
- LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
- *value = 0;
- sign_of_sequental_byte_read = 0;
- even_byte = 0;
- return ERROR_NAND_OPERATION_FAILED;
- } else {
- uint16_t temp;
- target_read_u16(target, in_sram_address, &temp);
- if (even_byte) {
- *value = temp >> 8;
- even_byte = 0;
- in_sram_address += 2;
- } else {
- *value = temp & 0xff;
- even_byte = 1;
- }
- }
- sign_of_sequental_byte_read = 1;
- return ERROR_OK;
-}
-
-static int get_next_halfword_from_sram_buffer(struct target *target,
- uint16_t *value)
-{
- if (in_sram_address > MX3_NF_LAST_BUFFER_ADDR) {
- LOG_ERROR(sram_buffer_bounds_err_msg, in_sram_address);
- *value = 0;
- return ERROR_NAND_OPERATION_FAILED;
- } else {
- target_read_u16(target, in_sram_address, value);
- in_sram_address += 2;
- }
- return ERROR_OK;
-}
-
-static int poll_for_complete_op(struct target *target, const char *text)
-{
- uint16_t poll_complete_status;
- for (int poll_cycle_count = 0; poll_cycle_count < 100; poll_cycle_count++) {
- usleep(25);
- target_read_u16(target, MX3_NF_CFG2, &poll_complete_status);
- if (poll_complete_status & MX3_NF_BIT_OP_DONE)
- break;
- }
- if (!(poll_complete_status & MX3_NF_BIT_OP_DONE)) {
- LOG_ERROR("%s sending timeout", text);
- return ERROR_NAND_OPERATION_FAILED;
- }
- return ERROR_OK;
-}
-
-static int validate_target_state(struct nand_device *nand)
-{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = nand->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR(target_not_halted_err_msg);
- return ERROR_NAND_OPERATION_FAILED;
- }
-
- if (mx3_nf_info->flags.target_little_endian !=
- (target->endianness == TARGET_LITTLE_ENDIAN)) {
- /*
- * endianness changed after NAND controller probed
- */
- return ERROR_NAND_OPERATION_FAILED;
- }
- return ERROR_OK;
-}
-
-static int do_data_output(struct nand_device *nand)
-{
- struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- struct target *target = nand->target;
- switch (mx3_nf_info->fin) {
- case MX3_NF_FIN_DATAOUT:
- /*
- * start data output operation (set MX3_NF_BIT_OP_DONE==0)
- */
- target_write_u16 (target, MX3_NF_CFG2,
- MX3_NF_BIT_DATAOUT_TYPE(mx3_nf_info->optype));
- {
- int poll_result;
- poll_result = poll_for_complete_op(target, "data output");
- if (poll_result != ERROR_OK)
- return poll_result;
- }
- mx3_nf_info->fin = MX3_NF_FIN_NONE;
- /*
- * ECC stuff
- */
- if ((mx3_nf_info->optype == MX3_NF_DATAOUT_PAGE)
- && mx3_nf_info->flags.hw_ecc_enabled) {
- uint16_t ecc_status;
- target_read_u16 (target, MX3_NF_ECCSTATUS, &ecc_status);
- switch (ecc_status & 0x000c) {
- case 1 << 2:
- LOG_DEBUG("main area readed with 1 (correctable) error");
- break;
- case 2 << 2:
- LOG_DEBUG("main area readed with more than 1 (incorrectable) error");
- return ERROR_NAND_OPERATION_FAILED;
- break;
- }
- switch (ecc_status & 0x0003) {
- case 1:
- LOG_DEBUG("spare area readed with 1 (correctable) error");
- break;
- case 2:
- LOG_DEBUG("main area readed with more than 1 (incorrectable) error");
- return ERROR_NAND_OPERATION_FAILED;
- break;
- }
- }
- break;
- case MX3_NF_FIN_NONE:
- break;
- }
- return ERROR_OK;
-}
-
-struct nand_flash_controller imx31_nand_flash_controller = {
- .name = "imx31",
- .usage = "nand device imx31 target noecc|hwecc",
- .nand_device_command = &imx31_nand_device_command,
- .init = &imx31_init,
- .reset = &imx31_reset,
- .command = &imx31_command,
- .address = &imx31_address,
- .write_data = &imx31_write_data,
- .read_data = &imx31_read_data,
- .write_page = &imx31_write_page,
- .read_page = &imx31_read_page,
- .nand_ready = &imx31_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mx3.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mx3.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mx3.h
deleted file mode 100755
index 60ec293..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/mx3.h
+++ /dev/null
@@ -1,109 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Alexei Babich *
- * Rezonans plc., Chelyabinsk, Russia *
- * impatt@mail.ru *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * Freescale iMX3* OpenOCD NAND Flash controller support.
- *
- * Many thanks to Ben Dooks for writing s3c24xx driver.
- */
-
-#define MX3_NF_BASE_ADDR 0xb8000000
-#define MX3_NF_BUFSIZ (MX3_NF_BASE_ADDR + 0xe00)
-#define MX3_NF_BUFADDR (MX3_NF_BASE_ADDR + 0xe04)
-#define MX3_NF_FADDR (MX3_NF_BASE_ADDR + 0xe06)
-#define MX3_NF_FCMD (MX3_NF_BASE_ADDR + 0xe08)
-#define MX3_NF_BUFCFG (MX3_NF_BASE_ADDR + 0xe0a)
-#define MX3_NF_ECCSTATUS (MX3_NF_BASE_ADDR + 0xe0c)
-#define MX3_NF_ECCMAINPOS (MX3_NF_BASE_ADDR + 0xe0e)
-#define MX3_NF_ECCSPAREPOS (MX3_NF_BASE_ADDR + 0xe10)
-#define MX3_NF_FWP (MX3_NF_BASE_ADDR + 0xe12)
-#define MX3_NF_LOCKSTART (MX3_NF_BASE_ADDR + 0xe14)
-#define MX3_NF_LOCKEND (MX3_NF_BASE_ADDR + 0xe16)
-#define MX3_NF_FWPSTATUS (MX3_NF_BASE_ADDR + 0xe18)
-/*
- * all bits not marked as self-clearing bit
- */
-#define MX3_NF_CFG1 (MX3_NF_BASE_ADDR + 0xe1a)
-#define MX3_NF_CFG2 (MX3_NF_BASE_ADDR + 0xe1c)
-
-#define MX3_NF_MAIN_BUFFER0 (MX3_NF_BASE_ADDR + 0x0000)
-#define MX3_NF_MAIN_BUFFER1 (MX3_NF_BASE_ADDR + 0x0200)
-#define MX3_NF_MAIN_BUFFER2 (MX3_NF_BASE_ADDR + 0x0400)
-#define MX3_NF_MAIN_BUFFER3 (MX3_NF_BASE_ADDR + 0x0600)
-#define MX3_NF_SPARE_BUFFER0 (MX3_NF_BASE_ADDR + 0x0800)
-#define MX3_NF_SPARE_BUFFER1 (MX3_NF_BASE_ADDR + 0x0810)
-#define MX3_NF_SPARE_BUFFER2 (MX3_NF_BASE_ADDR + 0x0820)
-#define MX3_NF_SPARE_BUFFER3 (MX3_NF_BASE_ADDR + 0x0830)
-#define MX3_NF_MAIN_BUFFER_LEN 512
-#define MX3_NF_SPARE_BUFFER_LEN 16
-#define MX3_NF_LAST_BUFFER_ADDR ((MX3_NF_SPARE_BUFFER3) + MX3_NF_SPARE_BUFFER_LEN - 2)
-
-/* bits in MX3_NF_CFG1 register */
-#define MX3_NF_BIT_SPARE_ONLY_EN (1<<2)
-#define MX3_NF_BIT_ECC_EN (1<<3)
-#define MX3_NF_BIT_INT_DIS (1<<4)
-#define MX3_NF_BIT_BE_EN (1<<5)
-#define MX3_NF_BIT_RESET_EN (1<<6)
-#define MX3_NF_BIT_FORCE_CE (1<<7)
-
-/* bits in MX3_NF_CFG2 register */
-
-/*Flash Command Input*/
-#define MX3_NF_BIT_OP_FCI (1<<0)
-/*
- * Flash Address Input
- */
-#define MX3_NF_BIT_OP_FAI (1<<1)
-/*
- * Flash Data Input
- */
-#define MX3_NF_BIT_OP_FDI (1<<2)
-
-/* see "enum mx_dataout_type" below */
-#define MX3_NF_BIT_DATAOUT_TYPE(x) ((x)<<3)
-#define MX3_NF_BIT_OP_DONE (1<<15)
-
-#define MX3_CCM_CGR2 0x53f80028
-#define MX3_GPR 0x43fac008
-#define MX3_PCSR 0x53f8000c
-
-enum mx_dataout_type {
- MX3_NF_DATAOUT_PAGE = 1,
- MX3_NF_DATAOUT_NANDID = 2,
- MX3_NF_DATAOUT_NANDSTATUS = 4,
-};
-enum mx_nf_finalize_action {
- MX3_NF_FIN_NONE,
- MX3_NF_FIN_DATAOUT,
-};
-
-struct mx3_nf_flags {
- unsigned target_little_endian:1;
- unsigned nand_readonly:1;
- unsigned one_kb_sram:1;
- unsigned hw_ecc_enabled:1;
-};
-
-struct mx3_nf_controller {
- enum mx_dataout_type optype;
- enum mx_nf_finalize_action fin;
- struct mx3_nf_flags flags;
-};
[29/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/cfi.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/cfi.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/cfi.h
deleted file mode 100755
index 5bd25e9..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/cfi.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef CFI_H
-#define CFI_H
-
-#define CFI_STATUS_POLL_MASK_DQ5_DQ6_DQ7 0xE0 /* DQ5..DQ7 */
-#define CFI_STATUS_POLL_MASK_DQ6_DQ7 0xC0 /* DQ6..DQ7 */
-
-struct cfi_flash_bank {
- int x16_as_x8;
- int jedec_probe;
- int not_cfi;
- int probed;
-
- enum target_endianness endianness;
-
- uint16_t manufacturer;
- uint16_t device_id;
-
- uint8_t qry[3];
-
- /* identification string */
- uint16_t pri_id;
- uint16_t pri_addr;
- uint16_t alt_id;
- uint16_t alt_addr;
-
- /* device-system interface */
- uint8_t vcc_min;
- uint8_t vcc_max;
- uint8_t vpp_min;
- uint8_t vpp_max;
- uint8_t word_write_timeout_typ;
- uint8_t buf_write_timeout_typ;
- uint8_t block_erase_timeout_typ;
- uint8_t chip_erase_timeout_typ;
- uint8_t word_write_timeout_max;
- uint8_t buf_write_timeout_max;
- uint8_t block_erase_timeout_max;
- uint8_t chip_erase_timeout_max;
-
- uint8_t status_poll_mask;
-
- /* flash geometry */
- uint32_t dev_size;
- uint16_t interface_desc;
- uint16_t max_buf_write_size;
- uint8_t num_erase_regions;
- uint32_t *erase_region_info;
-
- void *pri_ext;
- void *alt_ext;
-
- /* calculated timeouts */
- unsigned word_write_timeout;
- unsigned buf_write_timeout;
- unsigned block_erase_timeout;
- unsigned chip_erase_timeout;
-};
-
-/* Intel primary extended query table
- * as defined for the Advanced+ Boot Block Flash Memory (C3)
- * and used by the linux kernel cfi driver (as of 2.6.14)
- */
-struct cfi_intel_pri_ext {
- uint8_t pri[3];
- uint8_t major_version;
- uint8_t minor_version;
- uint32_t feature_support;
- uint8_t suspend_cmd_support;
- uint16_t blk_status_reg_mask;
- uint8_t vcc_optimal;
- uint8_t vpp_optimal;
- uint8_t num_protection_fields;
- uint16_t prot_reg_addr;
- uint8_t fact_prot_reg_size;
- uint8_t user_prot_reg_size;
- uint8_t extra[0];
-};
-
-/* Spansion primary extended query table as defined for and used by
- * the linux kernel cfi driver (as of 2.6.15)
- */
-struct cfi_spansion_pri_ext {
- uint8_t pri[3];
- uint8_t major_version;
- uint8_t minor_version;
- uint8_t SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
- uint8_t EraseSuspend;
- uint8_t BlkProt;
- uint8_t TmpBlkUnprotect;
- uint8_t BlkProtUnprot;
- uint8_t SimultaneousOps;
- uint8_t BurstMode;
- uint8_t PageMode;
- uint8_t VppMin;
- uint8_t VppMax;
- uint8_t TopBottom;
- int _reversed_geometry;
- uint32_t _unlock1;
- uint32_t _unlock2;
-};
-
-/* Atmel primary extended query table as defined for and used by
- * the linux kernel cfi driver (as of 2.6.20+)
- */
-struct cfi_atmel_pri_ext {
- uint8_t pri[3];
- uint8_t major_version;
- uint8_t minor_version;
- uint8_t features;
- uint8_t bottom_boot;
- uint8_t burst_mode;
- uint8_t page_mode;
-};
-
-enum {
- CFI_UNLOCK_555_2AA,
- CFI_UNLOCK_5555_2AAA,
-};
-
-struct cfi_unlock_addresses {
- uint32_t unlock1;
- uint32_t unlock2;
-};
-
-struct cfi_fixup {
- uint16_t mfr;
- uint16_t id;
- void (*fixup)(struct flash_bank *bank, const void *param);
- const void *param;
-};
-
-#define CFI_MFR_AMD 0x0001
-#define CFI_MFR_FUJITSU 0x0004
-#define CFI_MFR_ATMEL 0x001F
-#define CFI_MFR_ST 0x0020 /* STMicroelectronics */
-#define CFI_MFR_AMIC 0x0037
-#define CFI_MFR_SST 0x00BF
-#define CFI_MFR_MX 0x00C2
-#define CFI_MFR_EON 0x007F
-
-#define CFI_MFR_ANY 0xffff
-#define CFI_ID_ANY 0xffff
-
-#endif /* CFI_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/core.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/core.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/core.c
deleted file mode 100755
index 4410d5c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/core.c
+++ /dev/null
@@ -1,766 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2007-2010 �yvind Harboe <oy...@zylin.com> *
- * Copyright (C) 2008 by Spencer Oliver <sp...@spen-soft.co.uk> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * Copyright (C) 2010 by Antonio Borneo <bo...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-#include <flash/common.h>
-#include <flash/nor/core.h>
-#include <flash/nor/imp.h>
-#include <target/image.h>
-
-/**
- * @file
- * Upper level of NOR flash framework.
- * The lower level interfaces are to drivers. These upper level ones
- * primarily support access from Tcl scripts or from GDB.
- */
-
-static struct flash_bank *flash_banks;
-
-int flash_driver_erase(struct flash_bank *bank, int first, int last)
-{
- int retval;
-
- retval = bank->driver->erase(bank, first, last);
- if (retval != ERROR_OK)
- LOG_ERROR("failed erasing sectors %d to %d", first, last);
-
- return retval;
-}
-
-int flash_driver_protect(struct flash_bank *bank, int set, int first, int last)
-{
- int retval;
-
- /* callers may not supply illegal parameters ... */
- if (first < 0 || first > last || last >= bank->num_sectors) {
- LOG_ERROR("illegal sector range");
- return ERROR_FAIL;
- }
-
- /* force "set" to 0/1 */
- set = !!set;
-
- /* DANGER!
- *
- * We must not use any cached information about protection state!!!!
- *
- * There are a million things that could change the protect state:
- *
- * the target could have reset, power cycled, been hot plugged,
- * the application could have run, etc.
- *
- * Drivers only receive valid sector range.
- */
- retval = bank->driver->protect(bank, set, first, last);
- if (retval != ERROR_OK)
- LOG_ERROR("failed setting protection for areas %d to %d", first, last);
-
- return retval;
-}
-
-int flash_driver_write(struct flash_bank *bank,
- uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- int retval;
-
- retval = bank->driver->write(bank, buffer, offset, count);
- if (retval != ERROR_OK) {
- LOG_ERROR(
- "error writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32,
- bank->base,
- offset);
- }
-
- return retval;
-}
-
-int flash_driver_read(struct flash_bank *bank,
- uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- int retval;
-
- LOG_DEBUG("call flash_driver_read()");
-
- retval = bank->driver->read(bank, buffer, offset, count);
- if (retval != ERROR_OK) {
- LOG_ERROR(
- "error reading to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32,
- bank->base,
- offset);
- }
-
- return retval;
-}
-
-int default_flash_read(struct flash_bank *bank,
- uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- return target_read_buffer(bank->target, offset + bank->base, count, buffer);
-}
-
-void flash_bank_add(struct flash_bank *bank)
-{
- /* put flash bank in linked list */
- unsigned bank_num = 0;
- if (flash_banks) {
- /* find last flash bank */
- struct flash_bank *p = flash_banks;
- while (NULL != p->next) {
- bank_num += 1;
- p = p->next;
- }
- p->next = bank;
- bank_num += 1;
- } else
- flash_banks = bank;
-
- bank->bank_number = bank_num;
-}
-
-struct flash_bank *flash_bank_list(void)
-{
- return flash_banks;
-}
-
-struct flash_bank *get_flash_bank_by_num_noprobe(int num)
-{
- struct flash_bank *p;
- int i = 0;
-
- for (p = flash_banks; p; p = p->next) {
- if (i++ == num)
- return p;
- }
- LOG_ERROR("flash bank %d does not exist", num);
- return NULL;
-}
-
-int flash_get_bank_count(void)
-{
- struct flash_bank *p;
- int i = 0;
- for (p = flash_banks; p; p = p->next)
- i++;
- return i;
-}
-
-struct flash_bank *get_flash_bank_by_name_noprobe(const char *name)
-{
- unsigned requested = get_flash_name_index(name);
- unsigned found = 0;
-
- struct flash_bank *bank;
- for (bank = flash_banks; NULL != bank; bank = bank->next) {
- if (strcmp(bank->name, name) == 0)
- return bank;
- if (!flash_driver_name_matches(bank->driver->name, name))
- continue;
- if (++found < requested)
- continue;
- return bank;
- }
- return NULL;
-}
-
-int get_flash_bank_by_name(const char *name, struct flash_bank **bank_result)
-{
- struct flash_bank *bank;
- int retval;
-
- bank = get_flash_bank_by_name_noprobe(name);
- if (bank != NULL) {
- retval = bank->driver->auto_probe(bank);
-
- if (retval != ERROR_OK) {
- LOG_ERROR("auto_probe failed");
- return retval;
- }
- }
-
- *bank_result = bank;
- return ERROR_OK;
-}
-
-int get_flash_bank_by_num(int num, struct flash_bank **bank)
-{
- struct flash_bank *p = get_flash_bank_by_num_noprobe(num);
- int retval;
-
- if (p == NULL)
- return ERROR_FAIL;
-
- retval = p->driver->auto_probe(p);
-
- if (retval != ERROR_OK) {
- LOG_ERROR("auto_probe failed");
- return retval;
- }
- *bank = p;
- return ERROR_OK;
-}
-
-/* lookup flash bank by address, bank not found is success, but
- * result_bank is set to NULL. */
-int get_flash_bank_by_addr(struct target *target,
- uint32_t addr,
- bool check,
- struct flash_bank **result_bank)
-{
- struct flash_bank *c;
-
- /* cycle through bank list */
- for (c = flash_banks; c; c = c->next) {
- if (c->target != target)
- continue;
-
- int retval;
- retval = c->driver->auto_probe(c);
-
- if (retval != ERROR_OK) {
- LOG_ERROR("auto_probe failed");
- return retval;
- }
- /* check whether address belongs to this flash bank */
- if ((addr >= c->base) && (addr <= c->base + (c->size - 1))) {
- *result_bank = c;
- return ERROR_OK;
- }
- }
- *result_bank = NULL;
- if (check) {
- LOG_ERROR("No flash at address 0x%08" PRIx32, addr);
- return ERROR_FAIL;
- }
- return ERROR_OK;
-}
-
-static int default_flash_mem_blank_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- const int buffer_size = 1024;
- int i;
- uint32_t nBytes;
- int retval = ERROR_OK;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint8_t *buffer = malloc(buffer_size);
-
- for (i = 0; i < bank->num_sectors; i++) {
- uint32_t j;
- bank->sectors[i].is_erased = 1;
-
- for (j = 0; j < bank->sectors[i].size; j += buffer_size) {
- uint32_t chunk;
- chunk = buffer_size;
- if (chunk > (j - bank->sectors[i].size))
- chunk = (j - bank->sectors[i].size);
-
- retval = target_read_memory(target,
- bank->base + bank->sectors[i].offset + j,
- 4,
- chunk/4,
- buffer);
- if (retval != ERROR_OK)
- goto done;
-
- for (nBytes = 0; nBytes < chunk; nBytes++) {
- if (buffer[nBytes] != 0xFF) {
- bank->sectors[i].is_erased = 0;
- break;
- }
- }
- }
- }
-
-done:
- free(buffer);
-
- return retval;
-}
-
-int default_flash_blank_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- int i;
- int retval;
- int fast_check = 0;
- uint32_t blank;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- for (i = 0; i < bank->num_sectors; i++) {
- uint32_t address = bank->base + bank->sectors[i].offset;
- uint32_t size = bank->sectors[i].size;
-
- retval = target_blank_check_memory(target, address, size, &blank);
- if (retval != ERROR_OK) {
- fast_check = 0;
- break;
- }
- if (blank == 0xFF)
- bank->sectors[i].is_erased = 1;
- else
- bank->sectors[i].is_erased = 0;
- fast_check = 1;
- }
-
- if (!fast_check) {
- LOG_USER("Running slow fallback erase check - add working memory");
- return default_flash_mem_blank_check(bank);
- }
-
- return ERROR_OK;
-}
-
-/* Manipulate given flash region, selecting the bank according to target
- * and address. Maps an address range to a set of sectors, and issues
- * the callback() on that set ... e.g. to erase or unprotect its members.
- *
- * (Note a current bad assumption: that protection operates on the same
- * size sectors as erase operations use.)
- *
- * The "pad_reason" parameter is a kind of boolean: when it's NULL, the
- * range must fit those sectors exactly. This is clearly safe; it can't
- * erase data which the caller said to leave alone, for example. If it's
- * non-NULL, rather than failing, extra data in the first and/or last
- * sectors will be added to the range, and that reason string is used when
- * warning about those additions.
- */
-static int flash_iterate_address_range_inner(struct target *target,
- char *pad_reason, uint32_t addr, uint32_t length,
- int (*callback)(struct flash_bank *bank, int first, int last))
-{
- struct flash_bank *c;
- uint32_t last_addr = addr + length; /* first address AFTER end */
- int first = -1;
- int last = -1;
- int i;
-
- int retval = get_flash_bank_by_addr(target, addr, true, &c);
- if (retval != ERROR_OK)
- return retval;
-
- if (c->size == 0 || c->num_sectors == 0) {
- LOG_ERROR("Bank is invalid");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- if (length == 0) {
- /* special case, erase whole bank when length is zero */
- if (addr != c->base) {
- LOG_ERROR("Whole bank access must start at beginning of bank.");
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- return callback(c, 0, c->num_sectors - 1);
- }
-
- /* check whether it all fits in this bank */
- if (addr + length - 1 > c->base + c->size - 1) {
- LOG_ERROR("Flash access does not fit into bank.");
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /** @todo: handle erasures that cross into adjacent banks */
-
- addr -= c->base;
- last_addr -= c->base;
-
- for (i = 0; i < c->num_sectors; i++) {
- struct flash_sector *f = c->sectors + i;
- uint32_t end = f->offset + f->size;
-
- /* start only on a sector boundary */
- if (first < 0) {
- /* scanned past the first sector? */
- if (addr < f->offset)
- break;
-
- /* is this the first sector? */
- if (addr == f->offset)
- first = i;
-
- /* Does this need head-padding? If so, pad and warn;
- * or else force an error.
- *
- * Such padding can make trouble, since *WE* can't
- * ever know if that data was in use. The warning
- * should help users sort out messes later.
- */
- else if (addr < end && pad_reason) {
- /* FIXME say how many bytes (e.g. 80 KB) */
- LOG_WARNING("Adding extra %s range, "
- "%#8.8x to %#8.8x",
- pad_reason,
- (unsigned) f->offset,
- (unsigned) addr - 1);
- first = i;
- } else
- continue;
- }
-
- /* is this (also?) the last sector? */
- if (last_addr == end) {
- last = i;
- break;
- }
-
- /* Does this need tail-padding? If so, pad and warn;
- * or else force an error.
- */
- if (last_addr < end && pad_reason) {
- /* FIXME say how many bytes (e.g. 80 KB) */
- LOG_WARNING("Adding extra %s range, "
- "%#8.8x to %#8.8x",
- pad_reason,
- (unsigned) last_addr,
- (unsigned) end - 1);
- last = i;
- break;
- }
-
- /* MUST finish on a sector boundary */
- if (last_addr <= f->offset)
- break;
- }
-
- /* invalid start or end address? */
- if (first == -1 || last == -1) {
- LOG_ERROR("address range 0x%8.8x .. 0x%8.8x "
- "is not sector-aligned",
- (unsigned) (c->base + addr),
- (unsigned) (c->base + last_addr - 1));
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* The NOR driver may trim this range down, based on what
- * sectors are already erased/unprotected. GDB currently
- * blocks such optimizations.
- */
- return callback(c, first, last);
-}
-
-/* The inner fn only handles a single bank, we could be spanning
- * multiple chips.
- */
-static int flash_iterate_address_range(struct target *target,
- char *pad_reason, uint32_t addr, uint32_t length,
- int (*callback)(struct flash_bank *bank, int first, int last))
-{
- struct flash_bank *c;
- int retval = ERROR_OK;
-
- /* Danger! zero-length iterations means entire bank! */
- do {
- retval = get_flash_bank_by_addr(target, addr, true, &c);
- if (retval != ERROR_OK)
- return retval;
-
- uint32_t cur_length = length;
- /* check whether it all fits in this bank */
- if (addr + length - 1 > c->base + c->size - 1) {
- LOG_DEBUG("iterating over more than one flash bank.");
- cur_length = c->base + c->size - addr;
- }
- retval = flash_iterate_address_range_inner(target,
- pad_reason, addr, cur_length,
- callback);
- if (retval != ERROR_OK)
- break;
-
- length -= cur_length;
- addr += cur_length;
- } while (length > 0);
-
- return retval;
-}
-
-int flash_erase_address_range(struct target *target,
- bool pad, uint32_t addr, uint32_t length)
-{
- return flash_iterate_address_range(target, pad ? "erase" : NULL,
- addr, length, &flash_driver_erase);
-}
-
-static int flash_driver_unprotect(struct flash_bank *bank, int first, int last)
-{
- return flash_driver_protect(bank, 0, first, last);
-}
-
-int flash_unlock_address_range(struct target *target, uint32_t addr, uint32_t length)
-{
- /* By default, pad to sector boundaries ... the real issue here
- * is that our (only) caller *permanently* removes protection,
- * and doesn't restore it.
- */
- return flash_iterate_address_range(target, "unprotect",
- addr, length, &flash_driver_unprotect);
-}
-
-static int compare_section(const void *a, const void *b)
-{
- struct imagesection *b1, *b2;
- b1 = *((struct imagesection **)a);
- b2 = *((struct imagesection **)b);
-
- if (b1->base_address == b2->base_address)
- return 0;
- else if (b1->base_address > b2->base_address)
- return 1;
- else
- return -1;
-}
-
-int flash_write_unlock(struct target *target, struct image *image,
- uint32_t *written, int erase, bool unlock)
-{
- int retval = ERROR_OK;
-
- int section;
- uint32_t section_offset;
- struct flash_bank *c;
- int *padding;
-
- section = 0;
- section_offset = 0;
-
- if (written)
- *written = 0;
-
- if (erase) {
- /* assume all sectors need erasing - stops any problems
- * when flash_write is called multiple times */
-
- flash_set_dirty();
- }
-
- /* allocate padding array */
- padding = calloc(image->num_sections, sizeof(*padding));
-
- /* This fn requires all sections to be in ascending order of addresses,
- * whereas an image can have sections out of order. */
- struct imagesection **sections = malloc(sizeof(struct imagesection *) *
- image->num_sections);
- int i;
- for (i = 0; i < image->num_sections; i++)
- sections[i] = &image->sections[i];
-
- qsort(sections, image->num_sections, sizeof(struct imagesection *),
- compare_section);
-
- /* loop until we reach end of the image */
- while (section < image->num_sections) {
- uint32_t buffer_size;
- uint8_t *buffer;
- int section_last;
- uint32_t run_address = sections[section]->base_address + section_offset;
- uint32_t run_size = sections[section]->size - section_offset;
- int pad_bytes = 0;
-
- if (sections[section]->size == 0) {
- LOG_WARNING("empty section %d", section);
- section++;
- section_offset = 0;
- continue;
- }
-
- /* find the corresponding flash bank */
- retval = get_flash_bank_by_addr(target, run_address, false, &c);
- if (retval != ERROR_OK)
- goto done;
- if (c == NULL) {
- LOG_WARNING("no flash bank found for address %" PRIx32, run_address);
- section++; /* and skip it */
- section_offset = 0;
- continue;
- }
-
- /* collect consecutive sections which fall into the same bank */
- section_last = section;
- padding[section] = 0;
- while ((run_address + run_size - 1 < c->base + c->size - 1) &&
- (section_last + 1 < image->num_sections)) {
- /* sections are sorted */
- assert(sections[section_last + 1]->base_address >= c->base);
- if (sections[section_last + 1]->base_address >= (c->base + c->size)) {
- /* Done with this bank */
- break;
- }
-
- /* FIXME This needlessly touches sectors BETWEEN the
- * sections it's writing. Without auto erase, it just
- * writes ones. That WILL INVALIDATE data in cases
- * like Stellaris Tempest chips, corrupting internal
- * ECC codes; and at least FreeScale suggests issues
- * with that approach (in HC11 documentation).
- *
- * With auto erase enabled, data in those sectors will
- * be needlessly destroyed; and some of the limited
- * number of flash erase cycles will be wasted...
- *
- * In both cases, the extra writes slow things down.
- */
-
- /* if we have multiple sections within our image,
- * flash programming could fail due to alignment issues
- * attempt to rebuild a consecutive buffer for the flash loader */
- pad_bytes = (sections[section_last + 1]->base_address) - (run_address + run_size);
- padding[section_last] = pad_bytes;
- run_size += sections[++section_last]->size;
- run_size += pad_bytes;
-
- if (pad_bytes > 0)
- LOG_INFO("Padding image section %d with %d bytes",
- section_last-1,
- pad_bytes);
- }
-
- if (run_address + run_size - 1 > c->base + c->size - 1) {
- /* If we have more than one flash chip back to back, then we limit
- * the current write operation to the current chip.
- */
- LOG_DEBUG("Truncate flash run size to the current flash chip.");
-
- run_size = c->base + c->size - run_address;
- assert(run_size > 0);
- }
-
- /* If we're applying any sector automagic, then pad this
- * (maybe-combined) segment to the end of its last sector.
- */
- if (unlock || erase) {
- int sector;
- uint32_t offset_start = run_address - c->base;
- uint32_t offset_end = offset_start + run_size;
- uint32_t end = offset_end, delta;
-
- for (sector = 0; sector < c->num_sectors; sector++) {
- end = c->sectors[sector].offset
- + c->sectors[sector].size;
- if (offset_end <= end)
- break;
- }
-
- delta = end - offset_end;
- padding[section_last] += delta;
- run_size += delta;
- }
-
- /* allocate buffer */
- buffer = malloc(run_size);
- if (buffer == NULL) {
- LOG_ERROR("Out of memory for flash bank buffer");
- retval = ERROR_FAIL;
- goto done;
- }
- buffer_size = 0;
-
- /* read sections to the buffer */
- while (buffer_size < run_size) {
- size_t size_read;
-
- size_read = run_size - buffer_size;
- if (size_read > sections[section]->size - section_offset)
- size_read = sections[section]->size - section_offset;
-
- /* KLUDGE!
- *
- * #�%#"%�% we have to figure out the section # from the sorted
- * list of pointers to sections to invoke image_read_section()...
- */
- intptr_t diff = (intptr_t)sections[section] - (intptr_t)image->sections;
- int t_section_num = diff / sizeof(struct imagesection);
-
- LOG_DEBUG("image_read_section: section = %d, t_section_num = %d, "
- "section_offset = %d, buffer_size = %d, size_read = %d",
- (int)section, (int)t_section_num, (int)section_offset,
- (int)buffer_size, (int)size_read);
- retval = image_read_section(image, t_section_num, section_offset,
- size_read, buffer + buffer_size, &size_read);
- if (retval != ERROR_OK || size_read == 0) {
- free(buffer);
- goto done;
- }
-
- /* see if we need to pad the section */
- while (padding[section]--)
- (buffer + buffer_size)[size_read++] = c->default_padded_value;
-
- buffer_size += size_read;
- section_offset += size_read;
-
- if (section_offset >= sections[section]->size) {
- section++;
- section_offset = 0;
- }
- }
-
- retval = ERROR_OK;
-
- if (unlock)
- retval = flash_unlock_address_range(target, run_address, run_size);
- if (retval == ERROR_OK) {
- if (erase) {
- /* calculate and erase sectors */
- retval = flash_erase_address_range(target,
- true, run_address, run_size);
- }
- }
-
- if (retval == ERROR_OK) {
- /* write flash sectors */
- retval = flash_driver_write(c, buffer, run_address - c->base, run_size);
- }
-
- free(buffer);
-
- if (retval != ERROR_OK) {
- /* abort operation */
- goto done;
- }
-
- if (written != NULL)
- *written += run_size; /* add run size to total written counter */
- }
-
-done:
- free(sections);
- free(padding);
-
- return retval;
-}
-
-int flash_write(struct target *target, struct image *image,
- uint32_t *written, int erase)
-{
- return flash_write_unlock(target, image, written, erase, false);
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/core.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/core.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/core.h
deleted file mode 100755
index 726dd95..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/core.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2007,2008 �yvind Harboe <oy...@zylin.com> *
- * Copyright (C) 2008 by Spencer Oliver <sp...@spen-soft.co.uk> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * Copyright (C) 2010 by Antonio Borneo <bo...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FLASH_NOR_CORE_H
-#define FLASH_NOR_CORE_H
-
-#include <flash/common.h>
-
-/**
- * @file
- * Upper level NOR flash interfaces.
- */
-
-struct image;
-
-#define FLASH_MAX_ERROR_STR (128)
-
-/**
- * Describes the geometry and status of a single flash sector
- * within a flash bank. A single bank typically consists of multiple
- * sectors, each of which can be erased and protected independently.
- */
-struct flash_sector {
- /** Bus offset from start of the flash chip (in bytes). */
- uint32_t offset;
- /** Number of bytes in this flash sector. */
- uint32_t size;
- /**
- * Indication of erasure status: 0 = not erased, 1 = erased,
- * other = unknown. Set by @c flash_driver_s::erase_check.
- */
- int is_erased;
- /**
- * Indication of protection status: 0 = unprotected/unlocked,
- * 1 = protected/locked, other = unknown. Set by
- * @c flash_driver_s::protect_check.
- *
- * This information must be considered stale immediately.
- * A million things could make it stale: power cycle,
- * reset of target, code running on target, etc.
- */
- int is_protected;
-};
-
-/**
- * Provides details of a flash bank, available either on-chip or through
- * a major interface.
- *
- * This structure will be passed as a parameter to the callbacks in the
- * flash_driver_s structure, some of which may modify the contents of
- * this structure of the area of flash that it defines. Driver writers
- * may use the @c driver_priv member to store additional data on a
- * per-bank basis, if required.
- */
-struct flash_bank {
- const char *name;
-
- struct target *target; /**< Target to which this bank belongs. */
-
- struct flash_driver *driver; /**< Driver for this bank. */
- void *driver_priv; /**< Private driver storage pointer */
-
- int bank_number; /**< The 'bank' (or chip number) of this instance. */
- uint32_t base; /**< The base address of this bank */
- uint32_t size; /**< The size of this chip bank, in bytes */
-
- int chip_width; /**< Width of the chip in bytes (1,2,4 bytes) */
- int bus_width; /**< Maximum bus width, in bytes (1,2,4 bytes) */
-
- /** Default padded value used, normally this matches the flash
- * erased value. Defaults to 0xFF. */
- uint8_t default_padded_value;
-
- /**
- * The number of sectors on this chip. This value will
- * be set intially to 0, and the flash driver must set this to
- * some non-zero value during "probe()" or "auto_probe()".
- */
- int num_sectors;
- /** Array of sectors, allocated and initilized by the flash driver */
- struct flash_sector *sectors;
-
- struct flash_bank *next; /**< The next flash bank on this chip */
-};
-
-/** Registers the 'flash' subsystem commands */
-int flash_register_commands(struct command_context *cmd_ctx);
-
-/**
- * Erases @a length bytes in the @a target flash, starting at @a addr.
- * The range @a addr to @a addr + @a length - 1 must be strictly
- * sector aligned, unless @a pad is true. Setting @a pad true extends
- * the range, at beginning and/or end, if needed for sector alignment.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
-int flash_erase_address_range(struct target *target,
- bool pad, uint32_t addr, uint32_t length);
-
-int flash_unlock_address_range(struct target *target, uint32_t addr,
- uint32_t length);
-
-/**
- * Writes @a image into the @a target flash. The @a written parameter
- * will contain the
- * @param target The target with the flash to be programmed.
- * @param image The image that will be programmed to flash.
- * @param written On return, contains the number of bytes written.
- * @param erase If non-zero, indicates the flash driver should first
- * erase the corresponding banks or sectors before programming.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
-int flash_write(struct target *target,
- struct image *image, uint32_t *written, int erase);
-
-/**
- * Forces targets to re-examine their erase/protection state.
- * This routine must be called when the system may modify the status.
- */
-void flash_set_dirty(void);
-/** @returns The number of flash banks currently defined. */
-int flash_get_bank_count(void);
-/**
- * Provides default read implementation for flash memory.
- * @param bank The bank to read.
- * @param buffer The data bytes read.
- * @param offset The offset into the chip to read.
- * @param count The number of bytes to read.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
-int default_flash_read(struct flash_bank *bank,
- uint8_t *buffer, uint32_t offset, uint32_t count);
-/**
- * Provides default erased-bank check handling. Checks to see if
- * the flash driver knows they are erased; if things look uncertain,
- * this routine will call default_flash_mem_blank_check() to confirm.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
-int default_flash_blank_check(struct flash_bank *bank);
-
-/**
- * Returns the flash bank specified by @a name, which matches the
- * driver name and a suffix (option) specify the driver-specific
- * bank number. The suffix consists of the '.' and the driver-specific
- * bank number: when two str9x banks are defined, then 'str9x.1' refers
- * to the second.
- */
-int get_flash_bank_by_name(const char *name, struct flash_bank **bank_result);
-/**
- * Returns the flash bank specified by @a name, which matches the
- * driver name and a suffix (option) specify the driver-specific
- * bank number. The suffix consists of the '.' and the driver-specific
- * bank number: when two str9x banks are defined, then 'str9x.1' refers
- * to the second.
- */
-struct flash_bank *get_flash_bank_by_name_noprobe(const char *name);
-/**
- * Returns the flash bank like get_flash_bank_by_name(), without probing.
- * @param num The flash bank number.
- * @param bank returned bank if fn returns ERROR_OK
- * @returns ERROR_OK if successful
- */
-int get_flash_bank_by_num(int num, struct flash_bank **bank);
-/**
- * Retreives @a bank from a command argument, reporting errors parsing
- * the bank identifier or retreiving the specified bank. The bank
- * may be identified by its bank number or by @c name.instance, where
- * @a instance is driver-specific.
- * @param name_index The index to the string in args containing the
- * bank identifier.
- * @param bank On output, contians a pointer to the bank or NULL.
- * @returns ERROR_OK on success, or an error indicating the problem.
- */
-COMMAND_HELPER(flash_command_get_bank, unsigned name_index,
- struct flash_bank **bank);
-/**
- * Returns the flash bank like get_flash_bank_by_num(), without probing.
- * @param num The flash bank number.
- * @returns A struct flash_bank for flash bank @a num, or NULL.
- */
-struct flash_bank *get_flash_bank_by_num_noprobe(int num);
-/**
- * Returns the flash bank located at a specified address.
- * @param target The target, presumed to contain one or more banks.
- * @param addr An address that is within the range of the bank.
- * @param check return ERROR_OK and result_bank NULL if the bank does not exist
- * @returns The struct flash_bank located at @a addr, or NULL.
- */
-int get_flash_bank_by_addr(struct target *target, uint32_t addr, bool check,
- struct flash_bank **result_bank);
-
-#endif /* FLASH_NOR_CORE_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/driver.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/driver.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/driver.h
deleted file mode 100755
index 8f2e1cc..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/driver.h
+++ /dev/null
@@ -1,226 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2007,2008 �yvind Harboe <oy...@zylin.com> *
- * Copyright (C) 2008 by Spencer Oliver <sp...@spen-soft.co.uk> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * Copyright (C) 2010 by Antonio Borneo <bo...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef FLASH_NOR_DRIVER_H
-#define FLASH_NOR_DRIVER_H
-
-struct flash_bank;
-
-#define __FLASH_BANK_COMMAND(name) \
- COMMAND_HELPER(name, struct flash_bank *bank)
-
-/**
- * @brief Provides the implementation-independent structure that defines
- * all of the callbacks required by OpenOCD flash drivers.
- *
- * Driver authors must implement the routines defined here, providing an
- * instance with the fields filled out. After that, the instance must
- * be registered in flash.c, so it can be used by the driver lookup system.
- *
- * Specifically, the user can issue the command: @par
- * @code
- * flash bank DRIVERNAME ...parameters...
- * @endcode
- *
- * OpenOCD will search for the driver with a @c flash_driver_s::name
- * that matches @c DRIVERNAME.
- *
- * The flash subsystem calls some of the other drivers routines a using
- * corresponding static <code>flash_driver_<i>callback</i>()</code>
- * routine in flash.c.
- */
-struct flash_driver {
- /**
- * Gives a human-readable name of this flash driver,
- * This field is used to select and initialize the driver.
- */
- const char *name;
-
- /**
- * Gives a human-readable description of arguments.
- */
- const char *usage;
-
- /**
- * An array of driver-specific commands to register. When called
- * during the "flash bank" command, the driver can register addition
- * commands to support new flash chip functions.
- */
- const struct command_registration *commands;
-
- /**
- * Finish the "flash bank" command for @a bank. The
- * @a bank parameter will have been filled in by the core flash
- * layer when this routine is called, and the driver can store
- * additional information in its struct flash_bank::driver_priv field.
- *
- * The CMD_ARGV are: @par
- * @code
- * CMD_ARGV[0] = bank
- * CMD_ARGV[1] = drivername {name above}
- * CMD_ARGV[2] = baseaddress
- * CMD_ARGV[3] = lengthbytes
- * CMD_ARGV[4] = chip_width_in bytes
- * CMD_ARGV[5] = bus_width_in_bytes
- * CMD_ARGV[6] = driver-specific parameters
- * @endcode
- *
- * For example, CMD_ARGV[4] = 2 (for 16 bit flash),
- * CMD_ARGV[5] = 4 (for 32 bit bus).
- *
- * If extra arguments are provided (@a CMD_ARGC > 6), they will
- * start in @a CMD_ARGV[6]. These can be used to implement
- * driver-specific extensions.
- *
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- __FLASH_BANK_COMMAND((*flash_bank_command));
-
- /**
- * Bank/sector erase routine (target-specific). When
- * called, the flash driver should erase the specified sectors
- * using whatever means are at its disposal.
- *
- * @param bank The bank of flash to be erased.
- * @param first The number of the first sector to erase, typically 0.
- * @param last The number of the last sector to erase, typically N-1.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*erase)(struct flash_bank *bank, int first, int last);
-
- /**
- * Bank/sector protection routine (target-specific).
- *
- * When called, the driver should enable/disable protection
- * for MINIMUM the range covered by first..last sectors
- * inclusive. Some chips have alignment requirements will
- * cause the actual range to be protected / unprotected to
- * be larger than the first..last range.
- *
- * @param bank The bank to protect or unprotect.
- * @param set If non-zero, enable protection; if 0, disable it.
- * @param first The first sector to (un)protect, typicaly 0.
- * @param last The last sector to (un)project, typically N-1.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*protect)(struct flash_bank *bank, int set, int first, int last);
-
- /**
- * Program data into the flash. Note CPU address will be
- * "bank->base + offset", while the physical address is
- * dependent upon current target MMU mappings.
- *
- * @param bank The bank to program
- * @param buffer The data bytes to write.
- * @param offset The offset into the chip to program.
- * @param count The number of bytes to write.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*write)(struct flash_bank *bank,
- const uint8_t *buffer, uint32_t offset, uint32_t count);
-
- /**
- * Read data from the flash. Note CPU address will be
- * "bank->base + offset", while the physical address is
- * dependent upon current target MMU mappings.
- *
- * @param bank The bank to read.
- * @param buffer The data bytes read.
- * @param offset The offset into the chip to read.
- * @param count The number of bytes to read.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*read)(struct flash_bank *bank,
- uint8_t *buffer, uint32_t offset, uint32_t count);
-
- /**
- * Probe to determine what kind of flash is present.
- * This is invoked by the "probe" script command.
- *
- * @param bank The bank to probe
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*probe)(struct flash_bank *bank);
-
- /**
- * Check the erasure status of a flash bank.
- * When called, the driver routine must perform the required
- * checks and then set the @c flash_sector_s::is_erased field
- * for each of the flash banks's sectors.
- *
- * @param bank The bank to check
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*erase_check)(struct flash_bank *bank);
-
- /**
- * Determine if the specific bank is "protected" or not.
- * When called, the driver routine must must perform the
- * required protection check(s) and then set the @c
- * flash_sector_s::is_protected field for each of the flash
- * bank's sectors.
- *
- * @param bank - the bank to check
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*protect_check)(struct flash_bank *bank);
-
- /**
- * Display human-readable information about the flash
- * bank into the given buffer. Drivers must be careful to avoid
- * overflowing the buffer.
- *
- * @param bank - the bank to get info about
- * @param char - where to put the text for the human to read
- * @param buf_size - the size of the human buffer.
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*info)(struct flash_bank *bank, char *buf, int buf_size);
-
- /**
- * A more gentle flavor of filash_driver_s::probe, performing
- * setup with less noise. Generally, driver routines should test
- * to see if the bank has already been probed; if it has, the
- * driver probably should not perform its probe a second time.
- *
- * This callback is often called from the inside of other
- * routines (e.g. GDB flash downloads) to autoprobe the flash as
- * it is programing the flash.
- *
- * @param bank - the bank to probe
- * @returns ERROR_OK if successful; otherwise, an error code.
- */
- int (*auto_probe)(struct flash_bank *bank);
-};
-
-#define FLASH_BANK_COMMAND_HANDLER(name) \
- static __FLASH_BANK_COMMAND(name)
-
-/**
- * Find a NOR flash driver by its name.
- * @param name The name of the requested driver.
- * @returns The flash_driver called @c name, or NULL if not found.
- */
-struct flash_driver *flash_driver_find_by_name(const char *name);
-
-#endif /* FLASH_NOR_DRIVER_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c
deleted file mode 100755
index ddb0292..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "imp.h"
-
-extern struct flash_driver aduc702x_flash;
-extern struct flash_driver aducm360_flash;
-extern struct flash_driver ambiqmicro_flash;
-extern struct flash_driver at91sam3_flash;
-extern struct flash_driver at91sam4_flash;
-extern struct flash_driver at91sam4l_flash;
-extern struct flash_driver at91sam7_flash;
-extern struct flash_driver at91samd_flash;
-extern struct flash_driver atsamv_flash;
-extern struct flash_driver avr_flash;
-extern struct flash_driver cfi_flash;
-extern struct flash_driver dsp5680xx_flash;
-extern struct flash_driver efm32_flash;
-extern struct flash_driver em357_flash;
-extern struct flash_driver faux_flash;
-extern struct flash_driver fm3_flash;
-extern struct flash_driver fm4_flash;
-extern struct flash_driver jtagspi_flash;
-extern struct flash_driver kinetis_flash;
-extern struct flash_driver kinetis_ke_flash;
-extern struct flash_driver lpc2000_flash;
-extern struct flash_driver lpc288x_flash;
-extern struct flash_driver lpc2900_flash;
-extern struct flash_driver lpcspifi_flash;
-extern struct flash_driver mdr_flash;
-extern struct flash_driver mrvlqspi_flash;
-extern struct flash_driver niietcm4_flash;
-extern struct flash_driver nrf51_flash;
-extern struct flash_driver nrf52_flash;
-extern struct flash_driver numicro_flash;
-extern struct flash_driver ocl_flash;
-extern struct flash_driver pic32mx_flash;
-extern struct flash_driver psoc4_flash;
-extern struct flash_driver sim3x_flash;
-extern struct flash_driver stellaris_flash;
-extern struct flash_driver stm32f1x_flash;
-extern struct flash_driver stm32f2x_flash;
-extern struct flash_driver stm32lx_flash;
-extern struct flash_driver stm32l4x_flash;
-extern struct flash_driver stmsmi_flash;
-extern struct flash_driver str7x_flash;
-extern struct flash_driver str9x_flash;
-extern struct flash_driver str9xpec_flash;
-extern struct flash_driver tms470_flash;
-extern struct flash_driver virtual_flash;
-extern struct flash_driver xmc1xxx_flash;
-extern struct flash_driver xmc4xxx_flash;
-
-/**
- * The list of built-in flash drivers.
- * @todo Make this dynamically extendable with loadable modules.
- */
-static struct flash_driver *flash_drivers[] = {
- &aduc702x_flash,
- &aducm360_flash,
- &ambiqmicro_flash,
- &at91sam3_flash,
- &at91sam4_flash,
- &at91sam4l_flash,
- &at91sam7_flash,
- &at91samd_flash,
- &atsamv_flash,
- &avr_flash,
- &cfi_flash,
- &dsp5680xx_flash,
- &efm32_flash,
- &em357_flash,
- &faux_flash,
- &fm3_flash,
- &fm4_flash,
- &jtagspi_flash,
- &kinetis_flash,
- &kinetis_ke_flash,
- &lpc2000_flash,
- &lpc288x_flash,
- &lpc2900_flash,
- &lpcspifi_flash,
- &mdr_flash,
- &mrvlqspi_flash,
- &niietcm4_flash,
- &nrf51_flash,
- &nrf52_flash,
- &numicro_flash,
- &ocl_flash,
- &pic32mx_flash,
- &psoc4_flash,
- &sim3x_flash,
- &stellaris_flash,
- &stm32f1x_flash,
- &stm32f2x_flash,
- &stm32lx_flash,
- &stm32l4x_flash,
- &stmsmi_flash,
- &str7x_flash,
- &str9x_flash,
- &str9xpec_flash,
- &tms470_flash,
- &virtual_flash,
- &xmc1xxx_flash,
- &xmc4xxx_flash,
- NULL,
-};
-
-struct flash_driver *flash_driver_find_by_name(const char *name)
-{
- for (unsigned i = 0; flash_drivers[i]; i++) {
- if (strcmp(name, flash_drivers[i]->name) == 0)
- return flash_drivers[i];
- }
- return NULL;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c.orig
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c.orig b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c.orig
deleted file mode 100755
index c2ee02a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c.orig
+++ /dev/null
@@ -1,134 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "imp.h"
-
-extern struct flash_driver aduc702x_flash;
-extern struct flash_driver aducm360_flash;
-extern struct flash_driver ambiqmicro_flash;
-extern struct flash_driver at91sam3_flash;
-extern struct flash_driver at91sam4_flash;
-extern struct flash_driver at91sam4l_flash;
-extern struct flash_driver at91sam7_flash;
-extern struct flash_driver at91samd_flash;
-extern struct flash_driver atsamv_flash;
-extern struct flash_driver avr_flash;
-extern struct flash_driver cfi_flash;
-extern struct flash_driver dsp5680xx_flash;
-extern struct flash_driver efm32_flash;
-extern struct flash_driver em357_flash;
-extern struct flash_driver faux_flash;
-extern struct flash_driver fm3_flash;
-extern struct flash_driver fm4_flash;
-extern struct flash_driver jtagspi_flash;
-extern struct flash_driver kinetis_flash;
-extern struct flash_driver kinetis_ke_flash;
-extern struct flash_driver lpc2000_flash;
-extern struct flash_driver lpc288x_flash;
-extern struct flash_driver lpc2900_flash;
-extern struct flash_driver lpcspifi_flash;
-extern struct flash_driver mdr_flash;
-extern struct flash_driver mrvlqspi_flash;
-extern struct flash_driver niietcm4_flash;
-extern struct flash_driver nrf51_flash;
-extern struct flash_driver nrf52_flash;
-extern struct flash_driver numicro_flash;
-extern struct flash_driver ocl_flash;
-extern struct flash_driver pic32mx_flash;
-extern struct flash_driver psoc4_flash;
-extern struct flash_driver sim3x_flash;
-extern struct flash_driver stellaris_flash;
-extern struct flash_driver stm32f1x_flash;
-extern struct flash_driver stm32f2x_flash;
-extern struct flash_driver stm32lx_flash;
-extern struct flash_driver stm32l4x_flash;
-extern struct flash_driver stmsmi_flash;
-extern struct flash_driver str7x_flash;
-extern struct flash_driver str9x_flash;
-extern struct flash_driver str9xpec_flash;
-extern struct flash_driver tms470_flash;
-extern struct flash_driver virtual_flash;
-extern struct flash_driver xmc1xxx_flash;
-extern struct flash_driver xmc4xxx_flash;
-
-/**
- * The list of built-in flash drivers.
- * @todo Make this dynamically extendable with loadable modules.
- */
-static struct flash_driver *flash_drivers[] = {
- &aduc702x_flash,
- &aducm360_flash,
- &ambiqmicro_flash,
- &at91sam3_flash,
- &at91sam4_flash,
- &at91sam4l_flash,
- &at91sam7_flash,
- &at91samd_flash,
- &atsamv_flash,
- &avr_flash,
- &cfi_flash,
- &dsp5680xx_flash,
- &efm32_flash,
- &em357_flash,
- &faux_flash,
- &fm3_flash,
- &fm4_flash,
- &jtagspi_flash,
- &kinetis_flash,
- &kinetis_ke_flash,
- &lpc2000_flash,
- &lpc288x_flash,
- &lpc2900_flash,
- &lpcspifi_flash,
- &mdr_flash,
- &mrvlqspi_flash,
- &niietcm4_flash,
- &nrf51_flash,
- &numicro_flash,
- &ocl_flash,
- &pic32mx_flash,
- &psoc4_flash,
- &sim3x_flash,
- &stellaris_flash,
- &stm32f1x_flash,
- &stm32f2x_flash,
- &stm32lx_flash,
- &stm32l4x_flash,
- &stmsmi_flash,
- &str7x_flash,
- &str9x_flash,
- &str9xpec_flash,
- &tms470_flash,
- &virtual_flash,
- &xmc1xxx_flash,
- &xmc4xxx_flash,
- NULL,
-};
-
-struct flash_driver *flash_driver_find_by_name(const char *name)
-{
- for (unsigned i = 0; flash_drivers[i]; i++) {
- if (strcmp(name, flash_drivers[i]->name) == 0)
- return flash_drivers[i];
- }
- return NULL;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c.rej
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c.rej b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c.rej
deleted file mode 100644
index 8f69598..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/drivers.c.rej
+++ /dev/null
@@ -1,32 +0,0 @@
-***************
-*** 58,63 ****
- extern struct flash_driver mdr_flash;
- extern struct flash_driver numicro_flash;
- extern struct flash_driver nrf51_flash;
- extern struct flash_driver mrvlqspi_flash;
- extern struct flash_driver psoc4_flash;
- extern struct flash_driver sim3x_flash;
---- 58,64 ----
- extern struct flash_driver mdr_flash;
- extern struct flash_driver numicro_flash;
- extern struct flash_driver nrf51_flash;
-+ extern struct flash_driver nrf52_flash;
- extern struct flash_driver mrvlqspi_flash;
- extern struct flash_driver psoc4_flash;
- extern struct flash_driver sim3x_flash;
-***************
-*** 106,111 ****
- &mdr_flash,
- &numicro_flash,
- &nrf51_flash,
- &mrvlqspi_flash,
- &psoc4_flash,
- &sim3x_flash,
---- 107,113 ----
- &mdr_flash,
- &numicro_flash,
- &nrf51_flash,
-+ &nrf52_flash,
- &mrvlqspi_flash,
- &psoc4_flash,
- &sim3x_flash,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/dsp5680xx_flash.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/dsp5680xx_flash.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/dsp5680xx_flash.c
deleted file mode 100755
index 693ff48..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/dsp5680xx_flash.c
+++ /dev/null
@@ -1,272 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Rodrigo L. Rosa *
- * rodrigorosa.LG@gmail.com *
- * *
- * Based on a file written by: *
- * Kevin McGuire *
- * Marcel Wijlaars *
- * Michael Ashton *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/**
- * @file dsp5680xx_flash.c
- * @author Rodrigo L. Rosa <ro...@gmail.com>
- * @date Thu Jun 9 18:21:58 2011
- *
- * @brief This file implements the basic functions to run flashing commands
- * from the TCL interface.
- * It allows the user to flash the Freescale 5680xx DSP.
- *
- *
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <helper/time_support.h>
-#include <target/algorithm.h>
-#include <target/dsp5680xx.h>
-
-static int dsp5680xx_build_sector_list(struct flash_bank *bank)
-{
- uint32_t offset = HFM_FLASH_BASE_ADDR;
-
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- int i;
-
- for (i = 0; i < bank->num_sectors; ++i) {
- bank->sectors[i].offset = i * HFM_SECTOR_SIZE;
- bank->sectors[i].size = HFM_SECTOR_SIZE;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
- LOG_USER("%s not tested yet.", __func__);
- return ERROR_OK;
-
-}
-
-/* flash bank dsp5680xx 0 0 0 0 <target#> */
-FLASH_BANK_COMMAND_HANDLER(dsp5680xx_flash_bank_command)
-{
- bank->base = HFM_FLASH_BASE_ADDR;
- bank->size = HFM_SIZE_BYTES; /* top 4k not accessible */
- bank->num_sectors = HFM_SECTOR_COUNT;
- dsp5680xx_build_sector_list(bank);
-
- return ERROR_OK;
-}
-
-/**
- * A memory mapped register (PROT) holds information regarding sector protection.
- * Protection refers to undesired core access.
- * The value in this register is loaded from flash upon reset.
- *
- * @param bank
- *
- * @return
- */
-static int dsp5680xx_flash_protect_check(struct flash_bank *bank)
-{
- int retval = ERROR_OK;
-
- uint16_t protected = 0;
-
- retval = dsp5680xx_f_protect_check(bank->target, &protected);
- if (retval != ERROR_OK) {
- for (int i = 0; i < HFM_SECTOR_COUNT; i++)
- bank->sectors[i].is_protected = -1;
- return ERROR_OK;
- }
- for (int i = 0; i < HFM_SECTOR_COUNT / 2; i++) {
- if (protected & 1) {
- bank->sectors[2 * i].is_protected = 1;
- bank->sectors[2 * i + 1].is_protected = 1;
- } else {
- bank->sectors[2 * i].is_protected = 0;
- bank->sectors[2 * i + 1].is_protected = 0;
- }
- protected = (protected >> 1);
- }
- return retval;
-}
-
-/**
- * Protection funcionality is not implemented.
- * The current implementation applies/removes security on the chip.
- * The chip is effectively secured/unsecured after the first reset
- * following the execution of this function.
- *
- * @param bank
- * @param set Apply or remove security on the chip.
- * @param first This parameter is ignored.
- * @param last This parameter is ignored.
- *
- * @return
- */
-static int dsp5680xx_flash_protect(struct flash_bank *bank, int set, int first,
- int last)
-{
-/**
- * This applies security to flash module after next reset, it does
- * not actually apply protection (protection refers to undesired access from the core)
- */
- int retval;
-
- if (set)
- retval = dsp5680xx_f_lock(bank->target);
- else {
- retval = dsp5680xx_f_unlock(bank->target);
- if (retval == ERROR_OK) {
- /* mark all as erased */
- for (int i = 0; i <= (HFM_SECTOR_COUNT - 1); i++)
- /* FM does not recognize it as erased if erased via JTAG. */
- bank->sectors[i].is_erased = 1;
- }
- }
- return retval;
-}
-
-/**
- * The dsp5680xx use word addressing. The "/2" that appear in the following code
- * are a workaround for the fact that OpenOCD uses byte addressing.
- *
- * @param bank
- * @param buffer Data to write to flash.
- * @param offset
- * @param count In bytes (2 bytes per address).
- *
- * @return
- */
-static int dsp5680xx_flash_write(struct flash_bank *bank, const uint8_t* buffer,
- uint32_t offset, uint32_t count)
-{
- int retval;
-
- if ((offset + count / 2) > bank->size) {
- LOG_ERROR("%s: Flash bank cannot fit data.", __func__);
- return ERROR_FAIL;
- }
- if (offset % 2) {
- /**
- * Writing to odd addresses not supported.
- * This chip uses word addressing, Openocd only supports byte addressing.
- * The workaround results in disabling writing to odd byte addresses
- */
- LOG_ERROR("%s: Writing to odd addresses not supported for this target", __func__);
- return ERROR_FAIL;
- }
- retval = dsp5680xx_f_wr(bank->target, buffer, bank->base + offset / 2, count, 0);
- uint32_t addr_word;
-
- for (addr_word = bank->base + offset / 2; addr_word < count / 2;
- addr_word += (HFM_SECTOR_SIZE / 2)) {
- if (retval == ERROR_OK)
- bank->sectors[addr_word / (HFM_SECTOR_SIZE / 2)].is_erased = 0;
- else
- bank->sectors[addr_word / (HFM_SECTOR_SIZE / 2)].is_erased = -1;
- }
- return retval;
-}
-
-static int dsp5680xx_probe(struct flash_bank *bank)
-{
- LOG_DEBUG("%s not implemented", __func__);
- return ERROR_OK;
-}
-
-/**
- * The flash module (FM) on the dsp5680xx supports both individual sector
- * and mass erase of the flash memory.
- * If this function is called with @first == @last == 0 or if @first is the
- * first sector (#0) and @last is the last sector then the mass erase command
- * is executed (much faster than erasing each sector individually).
- *
- * @param bank
- * @param first
- * @param last
- *
- * @return
- */
-static int dsp5680xx_flash_erase(struct flash_bank *bank, int first, int last)
-{
- int retval;
-
- retval = dsp5680xx_f_erase(bank->target, (uint32_t) first, (uint32_t) last);
- if ((!(first | last)) || ((first == 0) && (last == (HFM_SECTOR_COUNT - 1))))
- last = HFM_SECTOR_COUNT - 1;
- if (retval == ERROR_OK)
- for (int i = first; i <= last; i++)
- bank->sectors[i].is_erased = 1;
- else
- /**
- * If an error occurred unknown status
- *is set even though some sector could have been correctly erased.
- */
- for (int i = first; i <= last; i++)
- bank->sectors[i].is_erased = -1;
- return retval;
-}
-
-/**
- * The flash module (FM) on the dsp5680xx support a blank check function.
- * This function executes the FM's blank check functionality on each and every sector.
- *
- * @param bank
- *
- * @return
- */
-static int dsp5680xx_flash_erase_check(struct flash_bank *bank)
-{
- int retval = ERROR_OK;
-
- uint8_t erased = 0;
-
- uint32_t i;
-
- for (i = 0; i < HFM_SECTOR_COUNT; i++) {
- if (bank->sectors[i].is_erased == -1) {
- retval = dsp5680xx_f_erase_check(bank->target, &erased, i);
- if (retval != ERROR_OK) {
- bank->sectors[i].is_erased = -1;
- } else {
- if (erased)
- bank->sectors[i].is_erased = 1;
- else
- bank->sectors[i].is_erased = 0;
- }
- }
- }
- return retval;
-}
-
-struct flash_driver dsp5680xx_flash = {
- .name = "dsp5680xx_flash",
- .flash_bank_command = dsp5680xx_flash_bank_command,
- .erase = dsp5680xx_flash_erase,
- .protect = dsp5680xx_flash_protect,
- .write = dsp5680xx_flash_write,
- /* .read = default_flash_read, */
- .probe = dsp5680xx_probe,
- .auto_probe = dsp5680xx_probe,
- .erase_check = dsp5680xx_flash_erase_check,
- .protect_check = dsp5680xx_flash_protect_check,
-};
[32/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam4l.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam4l.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam4l.c
deleted file mode 100755
index fa7cff3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam4l.c
+++ /dev/null
@@ -1,709 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andrey Yurovsky *
- * Andrey Yurovsky <yu...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-
-#include <target/cortex_m.h>
-
-/* At this time, the SAM4L Flash is available in these capacities:
- * ATSAM4Lx4xx: 256KB (512 pages)
- * ATSAM4Lx2xx: 128KB (256 pages)
- * ATSAM4Lx8xx: 512KB (1024 pages)
- */
-
-/* There are 16 lockable regions regardless of overall capacity. The number
- * of pages per sector is therefore dependant on capacity. */
-#define SAM4L_NUM_SECTORS 16
-
-/* Locations in memory map */
-#define SAM4L_FLASH ((uint32_t)0x00000000) /* Flash region */
-#define SAM4L_FLASH_USER 0x00800000 /* Flash user page region */
-#define SAM4L_FLASHCALW 0x400A0000 /* Flash controller */
-#define SAM4L_CHIPID 0x400E0740 /* Chip Identification */
-
-/* Offsets from SAM4L_FLASHCALW */
-#define SAM4L_FCR 0x00 /* Flash Control Register (RW) */
-#define SAM4L_FCMD 0x04 /* Flash Command Register (RW) */
-#define SAM4L_FSR 0x08 /* Flash Status Register (RO) */
-#define SAM4L_FPR 0x0C /* Flash Parameter Register (RO) */
-#define SAM4L_FVR 0x10 /* Flash Version Register (RO) */
-#define SAM4L_FGPFRHI 0x14 /* Flash General Purpose Register High (RO) */
-#define SAM4L_FGPFRLO 0x18 /* Flash General Purpose Register Low (RO) */
-
-/* Offsets from SAM4L_CHIPID */
-#define SAM4L_CIDR 0x00 /* Chip ID Register (RO) */
-#define SAM4L_EXID 0x04 /* Chip ID Extension Register (RO) */
-
-/* Flash commands (for SAM4L_FCMD), see Table 14-5 */
-#define SAM4L_FCMD_NOP 0 /* No Operation */
-#define SAM4L_FCMD_WP 1 /* Write Page */
-#define SAM4L_FCMD_EP 2 /* Erase Page */
-#define SAM4L_FCMD_CPB 3 /* Clear Page Buffer */
-#define SAM4L_FCMD_LP 4 /* Lock region containing given page */
-#define SAM4L_FCMD_UP 5 /* Unlock region containing given page */
-#define SAM4L_FCMD_EA 6 /* Erase All */
-#define SAM4L_FCMD_WGPB 7 /* Write general-purpose fuse bit */
-#define SAM4L_FCMD_EGPB 8 /* Erase general-purpose fuse bit */
-#define SAM4L_FCMD_SSB 9 /* Set security fuses */
-#define SAM4L_FCMD_PGPFB 10 /* Program general-purpose fuse byte */
-#define SAM4L_FCMD_EAGPF 11 /* Erase all general-purpose fuse bits */
-#define SAM4L_FCMD_QPR 12 /* Quick page read */
-#define SAM4L_FCMD_WUP 13 /* Write user page */
-#define SAM4L_FCMD_EUP 14 /* Erase user page */
-#define SAM4L_FCMD_QPRUP 15 /* Quick page read (user page) */
-#define SAM4L_FCMD_HSEN 16 /* High speed mode enable */
-#define SAM4L_FCMD_HSDIS 17 /* High speed mode disable */
-
-#define SAM4L_FMCD_CMDKEY 0xA5UL /* 'key' to issue commands, see 14.10.2 */
-
-
-/* SMAP registers and bits */
-#define SMAP_BASE 0x400A3000
-
-#define SMAP_SCR (SMAP_BASE + 8)
-#define SMAP_SCR_HCR (1 << 1)
-
-
-struct sam4l_chip_info {
- uint32_t id;
- uint32_t exid;
- const char *name;
-};
-
-/* These are taken from Table 9-1 in 42023E-SAM-07/2013 */
-static const struct sam4l_chip_info sam4l_known_chips[] = {
- { 0xAB0B0AE0, 0x1400000F, "ATSAM4LC8C" },
- { 0xAB0A09E0, 0x0400000F, "ATSAM4LC4C" },
- { 0xAB0A07E0, 0x0400000F, "ATSAM4LC2C" },
- { 0xAB0B0AE0, 0x1300000F, "ATSAM4LC8B" },
- { 0xAB0A09E0, 0x0300000F, "ATSAM4LC4B" },
- { 0xAB0A07E0, 0x0300000F, "ATSAM4LC2B" },
- { 0xAB0B0AE0, 0x1200000F, "ATSAM4LC8A" },
- { 0xAB0A09E0, 0x0200000F, "ATSAM4LC4A" },
- { 0xAB0A07E0, 0x0200000F, "ATSAM4LC2A" },
- { 0xAB0B0AE0, 0x14000002, "ATSAM4LS8C" },
- { 0xAB0A09E0, 0x04000002, "ATSAM4LS4C" },
- { 0xAB0A07E0, 0x04000002, "ATSAM4LS2C" },
- { 0xAB0B0AE0, 0x13000002, "ATSAM4LS8B" },
- { 0xAB0A09E0, 0x03000002, "ATSAM4LS4B" },
- { 0xAB0A07E0, 0x03000002, "ATSAM4LS2B" },
- { 0xAB0B0AE0, 0x12000002, "ATSAM4LS8A" },
- { 0xAB0A09E0, 0x02000002, "ATSAM4LS4A" },
- { 0xAB0A07E0, 0x02000002, "ATSAM4LS2A" },
-};
-
-/* Meaning of SRAMSIZ field in CHIPID, see 9.3.1 in 42023E-SAM-07/2013 */
-static const uint16_t sam4l_ram_sizes[16] = { 48, 1, 2, 6, 24, 4, 80, 160, 8, 16, 32, 64, 128, 256, 96, 512 };
-
-/* Meaning of PSZ field in FPR, see 14.10.4 in 42023E-SAM-07/2013 */
-static const uint16_t sam4l_page_sizes[8] = { 32, 64, 128, 256, 512, 1024, 2048, 4096 };
-
-struct sam4l_info {
- const struct sam4l_chip_info *details;
-
- uint32_t flash_kb;
- uint32_t ram_kb;
- uint32_t page_size;
- int num_pages;
- int sector_size;
- int pages_per_sector;
-
- bool probed;
- struct target *target;
- struct sam4l_info *next;
-};
-
-static struct sam4l_info *sam4l_chips;
-
-static int sam4l_flash_wait_until_ready(struct target *target)
-{
- volatile unsigned int t = 0;
- uint32_t st;
- int res;
-
- /* Poll the status register until the FRDY bit is set */
- do {
- res = target_read_u32(target, SAM4L_FLASHCALW + SAM4L_FSR, &st);
- } while (res == ERROR_OK && !(st & (1<<0)) && ++t < 10);
-
- return res;
-}
-
-static int sam4l_flash_check_error(struct target *target, uint32_t *err)
-{
- uint32_t st;
- int res;
-
- res = target_read_u32(target, SAM4L_FLASHCALW + SAM4L_FSR, &st);
-
- if (res == ERROR_OK)
- *err = st & ((1<<3) | (1<<2)); /* grab PROGE and LOCKE bits */
-
- return res;
-}
-
-static int sam4l_flash_command(struct target *target, uint8_t cmd, int page)
-{
- int res;
- uint32_t fcmd;
- uint32_t err;
-
- res = sam4l_flash_wait_until_ready(target);
- if (res != ERROR_OK)
- return res;
-
- if (page >= 0) {
- /* Set the page number. For some commands, the page number is just an
- * argument (ex: fuse bit number). */
- fcmd = (SAM4L_FMCD_CMDKEY << 24) | ((page & 0xFFFF) << 8) | (cmd & 0x3F);
- } else {
- /* Reuse the page number that was read from the flash command register. */
- res = target_read_u32(target, SAM4L_FLASHCALW + SAM4L_FCMD, &fcmd);
- if (res != ERROR_OK)
- return res;
-
- fcmd &= ~0x3F; /* clear out the command code */
- fcmd |= (SAM4L_FMCD_CMDKEY << 24) | (cmd & 0x3F);
- }
-
- /* Send the command */
- res = target_write_u32(target, SAM4L_FLASHCALW + SAM4L_FCMD, fcmd);
- if (res != ERROR_OK)
- return res;
-
- res = sam4l_flash_check_error(target, &err);
- if (res != ERROR_OK)
- return res;
-
- if (err != 0)
- LOG_ERROR("%s got error status 0x%08" PRIx32, __func__, err);
-
- res = sam4l_flash_wait_until_ready(target);
-
- return res;
-}
-
-FLASH_BANK_COMMAND_HANDLER(sam4l_flash_bank_command)
-{
- struct sam4l_info *chip = sam4l_chips;
-
- while (chip) {
- if (chip->target == bank->target)
- break;
- chip = chip->next;
- }
-
- if (!chip) {
- /* Create a new chip */
- chip = calloc(1, sizeof(*chip));
- if (!chip)
- return ERROR_FAIL;
-
- chip->target = bank->target;
- chip->probed = false;
-
- bank->driver_priv = chip;
-
- /* Insert it into the chips list (at head) */
- chip->next = sam4l_chips;
- sam4l_chips = chip;
- }
-
- if (bank->base != SAM4L_FLASH) {
- LOG_ERROR("Address 0x%08" PRIx32 " invalid bank address (try 0x%08" PRIx32
- "[at91sam4l series] )",
- bank->base, SAM4L_FLASH);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static const struct sam4l_chip_info *sam4l_find_chip_name(uint32_t id, uint32_t exid)
-{
- unsigned int i;
-
- id &= ~0xF;
-
- for (i = 0; i < ARRAY_SIZE(sam4l_known_chips); i++) {
- if (sam4l_known_chips[i].id == id && sam4l_known_chips[i].exid == exid)
- return &sam4l_known_chips[i];
- }
-
- return NULL;
-}
-
-static int sam4l_check_page_erased(struct flash_bank *bank, uint32_t pn,
- bool *is_erased_p)
-{
- int res;
- uint32_t st;
-
- /* Issue a quick page read to verify that we've erased this page */
- res = sam4l_flash_command(bank->target, SAM4L_FCMD_QPR, pn);
- if (res != ERROR_OK) {
- LOG_ERROR("Quick page read %" PRIu32 " failed", pn);
- return res;
- }
-
- /* Retrieve the flash status */
- res = target_read_u32(bank->target, SAM4L_FLASHCALW + SAM4L_FSR, &st);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read erase status");
- return res;
- }
-
- /* Is the page in question really erased? */
- *is_erased_p = !!(st & (1<<5));
-
- return ERROR_OK;
-}
-
-static int sam4l_probe(struct flash_bank *bank)
-{
- uint32_t id, exid, param;
- int res;
- struct sam4l_info *chip = (struct sam4l_info *)bank->driver_priv;
-
- if (chip->probed)
- return ERROR_OK;
-
- res = target_read_u32(bank->target, SAM4L_CHIPID + SAM4L_CIDR, &id);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read chip ID");
- return res;
- }
-
- res = target_read_u32(bank->target, SAM4L_CHIPID + SAM4L_EXID, &exid);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read extended chip ID");
- return res;
- }
-
- chip->details = sam4l_find_chip_name(id, exid);
-
- /* The RAM capacity is in a lookup table. */
- chip->ram_kb = sam4l_ram_sizes[0xF & (id >> 16)];
-
- switch (0xF & (id >> 8)) {
- case 0x07:
- chip->flash_kb = 128;
- break;
- case 0x09:
- chip->flash_kb = 256;
- break;
- case 0x0A:
- chip->flash_kb = 512;
- break;
- default:
- LOG_ERROR("Unknown flash size (chip ID is %08" PRIx32 "), assuming 128K", id);
- chip->flash_kb = 128;
- break;
- }
-
- /* Retrieve the Flash parameters */
- res = target_read_u32(bank->target, SAM4L_FLASHCALW + SAM4L_FPR, ¶m);
- if (res != ERROR_OK) {
- LOG_ERROR("Couldn't read Flash parameters");
- return res;
- }
-
- /* Fetch the page size from the parameter register. Technically the flash
- * capacity is there too though the manual mentions that not all parts will
- * have it set so we use the Chip ID capacity information instead. */
- chip->page_size = sam4l_page_sizes[0x7 & (param >> 8)];
- assert(chip->page_size);
- chip->num_pages = chip->flash_kb * 1024 / chip->page_size;
-
- chip->sector_size = (chip->flash_kb * 1024) / SAM4L_NUM_SECTORS;
- chip->pages_per_sector = chip->sector_size / chip->page_size;
-
- /* Make sure the bank size is correct */
- bank->size = chip->flash_kb * 1024;
-
- /* Allocate the sector table. */
- bank->num_sectors = SAM4L_NUM_SECTORS;
- bank->sectors = calloc(bank->num_sectors, (sizeof((bank->sectors)[0])));
- if (!bank->sectors)
- return ERROR_FAIL;
-
- /* Fill out the sector information: all SAM4L sectors are the same size and
- * there is always a fixed number of them. */
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].size = chip->sector_size;
- bank->sectors[i].offset = i * chip->sector_size;
- /* mark as unknown */
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- /* Done */
- chip->probed = true;
-
- LOG_INFO("SAM4L MCU: %s (Rev %c) (%" PRIu32 "KB Flash with %d %" PRId32 "B pages, %" PRIu32 "KB RAM)",
- chip->details ? chip->details->name : "unknown", (char)('A' + (id & 0xF)),
- chip->flash_kb, chip->num_pages, chip->page_size, chip->ram_kb);
-
- return ERROR_OK;
-}
-
-static int sam4l_protect_check(struct flash_bank *bank)
-{
- int res;
- uint32_t st;
- struct sam4l_info *chip = (struct sam4l_info *)bank->driver_priv;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
-
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!chip->probed) {
- if (sam4l_probe(bank) != ERROR_OK)
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- res = target_read_u32(bank->target, SAM4L_FLASHCALW + SAM4L_FSR, &st);
- if (res != ERROR_OK)
- return res;
-
- st >>= 16; /* There are 16 lock region bits in the upper half word */
- for (int i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_protected = !!(st & (1<<i));
-
- return ERROR_OK;
-}
-
-static int sam4l_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct sam4l_info *chip = sam4l_chips;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
-
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!chip->probed) {
- if (sam4l_probe(bank) != ERROR_OK)
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- /* Make sure the pages make sense. */
- if (first >= bank->num_sectors || last >= bank->num_sectors) {
- LOG_ERROR("Protect range %d - %d not valid (%d sectors total)", first, last,
- bank->num_sectors);
- return ERROR_FAIL;
- }
-
- /* Try to lock or unlock each sector in the range. This is done by locking
- * a region containing one page in that sector, we arbitrarily choose the 0th
- * page in the sector. */
- for (int i = first; i <= last; i++) {
- int res;
-
- res = sam4l_flash_command(bank->target,
- set ? SAM4L_FCMD_LP : SAM4L_FCMD_UP, i * chip->pages_per_sector);
- if (res != ERROR_OK) {
- LOG_ERROR("Can't %slock region containing page %d", set ? "" : "un", i);
- return res;
- }
- }
-
- return ERROR_OK;
-}
-
-static int sam4l_erase(struct flash_bank *bank, int first, int last)
-{
- int ret;
- struct sam4l_info *chip = (struct sam4l_info *)bank->driver_priv;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
-
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!chip->probed) {
- if (sam4l_probe(bank) != ERROR_OK)
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- /* Make sure the pages make sense. */
- if (first >= bank->num_sectors || last >= bank->num_sectors) {
- LOG_ERROR("Erase range %d - %d not valid (%d sectors total)", first, last,
- bank->num_sectors);
- return ERROR_FAIL;
- }
-
- /* Erase */
- if ((first == 0) && ((last + 1) == bank->num_sectors)) {
- LOG_DEBUG("Erasing the whole chip");
-
- ret = sam4l_flash_command(bank->target, SAM4L_FCMD_EA, -1);
- if (ret != ERROR_OK) {
- LOG_ERROR("Erase All failed");
- return ret;
- }
- } else {
- LOG_DEBUG("Erasing sectors %d through %d...\n", first, last);
-
- /* For each sector... */
- for (int i = first; i <= last; i++) {
- /* For each page in that sector... */
- for (int j = 0; j < chip->pages_per_sector; j++) {
- int pn = i * chip->pages_per_sector + j;
- bool is_erased = false;
-
- /* Issue the page erase */
- ret = sam4l_flash_command(bank->target, SAM4L_FCMD_EP, pn);
- if (ret != ERROR_OK) {
- LOG_ERROR("Erasing page %d failed", pn);
- return ret;
- }
-
- ret = sam4l_check_page_erased(bank, pn, &is_erased);
- if (ret != ERROR_OK)
- return ret;
-
- if (!is_erased) {
- LOG_DEBUG("Page %d was not erased.", pn);
- return ERROR_FAIL;
- }
- }
-
- /* This sector is definitely erased. */
- bank->sectors[i].is_erased = 1;
- }
- }
-
- return ERROR_OK;
-}
-
-/* Write an entire page from host buffer 'buf' to page-aligned 'address' in the
- * Flash. */
-static int sam4l_write_page(struct sam4l_info *chip, struct target *target,
- uint32_t address, const uint8_t *buf)
-{
- int res;
-
- LOG_DEBUG("sam4l_write_page address=%08" PRIx32, address);
-
- /* Clear the page buffer before we write to it */
- res = sam4l_flash_command(target, SAM4L_FCMD_CPB, -1);
- if (res != ERROR_OK) {
- LOG_ERROR("%s: can't clear page buffer", __func__);
- return res;
- }
-
- /* Write the modified page back to the target's page buffer */
- res = target_write_memory(target, address, 4, chip->page_size / 4, buf);
-
- if (res != ERROR_OK) {
- LOG_ERROR("%s: %d", __func__, __LINE__);
- return res;
- }
-
- /* Commit the page contents to Flash: erase the current page and then
- * write it out. */
- res = sam4l_flash_command(target, SAM4L_FCMD_EP, -1);
- if (res != ERROR_OK)
- return res;
- res = sam4l_flash_command(target, SAM4L_FCMD_WP, -1);
-
- return res;
-}
-
-/* Write partial contents into page-aligned 'address' on the Flash from host
- * buffer 'buf' by writing 'nb' of 'buf' at 'offset' into the Flash page. */
-static int sam4l_write_page_partial(struct sam4l_info *chip,
- struct flash_bank *bank, uint32_t address, const uint8_t *buf,
- uint32_t page_offset, uint32_t nb)
-{
- int res;
- uint8_t *pg = malloc(chip->page_size);
- if (!pg)
- return ERROR_FAIL;
-
- LOG_DEBUG("sam4l_write_page_partial address=%08" PRIx32 " nb=%08" PRIx32, address, nb);
-
- assert(page_offset + nb < chip->page_size);
- assert((address % chip->page_size) == 0);
-
- /* Retrieve the full page contents from Flash */
- res = target_read_memory(bank->target, address, 4,
- chip->page_size / 4, pg);
- if (res != ERROR_OK) {
- free(pg);
- return res;
- }
-
- /* Insert our partial page over the data from Flash */
- memcpy(pg + (page_offset % chip->page_size), buf, nb);
-
- /* Write the page back out */
- res = sam4l_write_page(chip, bank->target, address, pg);
- free(pg);
-
- return res;
-}
-
-static int sam4l_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- int res;
- uint32_t nb = 0;
- struct sam4l_info *chip = (struct sam4l_info *)bank->driver_priv;
-
- LOG_DEBUG("sam4l_write offset=%08" PRIx32 " count=%08" PRIx32, offset, count);
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
-
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!chip->probed) {
- if (sam4l_probe(bank) != ERROR_OK)
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- if (offset % chip->page_size) {
- /* We're starting at an unaligned offset so we'll write a partial page
- * comprising that offset and up to the end of that page. */
- nb = chip->page_size - (offset % chip->page_size);
- if (nb > count)
- nb = count;
- } else if (count < chip->page_size) {
- /* We're writing an aligned but partial page. */
- nb = count;
- }
-
- if (nb > 0) {
- res = sam4l_write_page_partial(chip, bank,
- (offset / chip->page_size) * chip->page_size + bank->base,
- buffer,
- offset % chip->page_size, nb);
- if (res != ERROR_OK)
- return res;
-
- /* We're done with the page contents */
- count -= nb;
- offset += nb;
- }
-
- /* There's at least one aligned page to write out. */
- if (count >= chip->page_size) {
- int np = count / chip->page_size + ((count % chip->page_size) ? 1 : 0);
-
- for (int i = 0; i < np; i++) {
- if (count >= chip->page_size) {
- res = sam4l_write_page(chip, bank->target,
- bank->base + offset,
- buffer + (i * chip->page_size));
- /* Advance one page */
- offset += chip->page_size;
- count -= chip->page_size;
- } else {
- res = sam4l_write_page_partial(chip, bank,
- bank->base + offset,
- buffer + (i * chip->page_size), 0, count);
- /* We're done after this. */
- offset += count;
- count = 0;
- }
-
- if (res != ERROR_OK)
- return res;
- }
- }
-
- return ERROR_OK;
-}
-
-
-COMMAND_HANDLER(sam4l_handle_reset_deassert)
-{
- struct target *target = get_current_target(CMD_CTX);
- struct armv7m_common *armv7m = target_to_armv7m(target);
- int retval = ERROR_OK;
- enum reset_types jtag_reset_config = jtag_get_reset_config();
-
- /* In case of sysresetreq, debug retains state set in cortex_m_assert_reset()
- * so we just release reset held by SMAP
- *
- * n_RESET (srst) clears the DP, so reenable debug and set vector catch here
- *
- * After vectreset SMAP release is not needed however makes no harm
- */
- if (target->reset_halt && (jtag_reset_config & RESET_HAS_SRST)) {
- retval = mem_ap_write_u32(armv7m->debug_ap, DCB_DHCSR, DBGKEY | C_HALT | C_DEBUGEN);
- if (retval == ERROR_OK)
- retval = mem_ap_write_atomic_u32(armv7m->debug_ap, DCB_DEMCR,
- TRCENA | VC_HARDERR | VC_BUSERR | VC_CORERESET);
- /* do not return on error here, releasing SMAP reset is more important */
- }
-
- int retval2 = mem_ap_write_atomic_u32(armv7m->debug_ap, SMAP_SCR, SMAP_SCR_HCR);
- if (retval2 != ERROR_OK)
- return retval2;
-
- return retval;
-}
-
-static const struct command_registration at91sam4l_exec_command_handlers[] = {
- {
- .name = "smap_reset_deassert",
- .handler = sam4l_handle_reset_deassert,
- .mode = COMMAND_EXEC,
- .help = "deasert internal reset held by SMAP"
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration at91sam4l_command_handlers[] = {
- {
- .name = "at91sam4l",
- .mode = COMMAND_ANY,
- .help = "at91sam4l flash command group",
- .usage = "",
- .chain = at91sam4l_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver at91sam4l_flash = {
- .name = "at91sam4l",
- .commands = at91sam4l_command_handlers,
- .flash_bank_command = sam4l_flash_bank_command,
- .erase = sam4l_erase,
- .protect = sam4l_protect,
- .write = sam4l_write,
- .read = default_flash_read,
- .probe = sam4l_probe,
- .auto_probe = sam4l_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = sam4l_protect_check,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam7.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam7.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam7.c
deleted file mode 100755
index c7334ca..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam7.c
+++ /dev/null
@@ -1,1211 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Magnus Lundin *
- * lundin@mlu.mine.nu *
- * *
- * Copyright (C) 2008 by Gheorghe Guran (atlas) *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the *
- * GNU General public License for more details. *
- * *
- * You should have received a copy of the GNU General public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
-****************************************************************************/
-
-/***************************************************************************
-*
-* New flash setup command:
-*
-* flash bank <driver> <base_addr> <size> <chip_width> <bus_width> <target_id>
-* [<chip_type> <banks>
-* <sectors_per_bank> <pages_per_sector>
-* <page_size> <num_nvmbits>
-* <ext_freq_khz>]
-*
-* <ext_freq_khz> - MUST be used if clock is from external source,
-* CAN be used if main oscillator frequency is known (recommended)
-* Examples:
-* ==== RECOMMENDED (covers clock speed) ============
-* flash bank at91sam7 0x00100000 0 0 4 $_TARGETNAME AT91SAM7XC256 1 16 64 256 3 25000
-* (if auto-detect fails; provides clock spec)
-* flash bank at91sam7 0 0 0 0 $_TARGETNAME 0 0 0 0 0 0 25000
-* (auto-detect everything except the clock)
-* ==== NOT RECOMMENDED !!! (clock speed is not configured) ====
-* flash bank at91sam7 0x00100000 0 0 4 $_TARGETNAME AT91SAM7XC256 1 16 64 256 3 0
-* (if auto-detect fails)
-* flash bank at91sam7 0 0 0 0 $_TARGETNAME
-* (old style, auto-detect everything)
-****************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-
-/* AT91SAM7 control registers */
-#define DBGU_CIDR 0xFFFFF240
-#define CKGR_MCFR 0xFFFFFC24
-#define CKGR_MOR 0xFFFFFC20
-#define CKGR_MCFR_MAINRDY 0x10000
-#define CKGR_PLLR 0xFFFFFC2c
-#define CKGR_PLLR_DIV 0xff
-#define CKGR_PLLR_MUL 0x07ff0000
-#define PMC_MCKR 0xFFFFFC30
-#define PMC_MCKR_CSS 0x03
-#define PMC_MCKR_PRES 0x1c
-
-/* Flash Controller Commands */
-#define WP 0x01
-#define SLB 0x02
-#define WPL 0x03
-#define CLB 0x04
-#define EA 0x08
-#define SGPB 0x0B
-#define CGPB 0x0D
-#define SSB 0x0F
-
-/* MC_FSR bit definitions */
-#define MC_FSR_FRDY 1
-#define MC_FSR_EOL 2
-
-/* AT91SAM7 constants */
-#define RC_FREQ 32000
-
-/* Flash timing modes */
-#define FMR_TIMING_NONE 0
-#define FMR_TIMING_NVBITS 1
-#define FMR_TIMING_FLASH 2
-
-/* Flash size constants */
-#define FLASH_SIZE_8KB 1
-#define FLASH_SIZE_16KB 2
-#define FLASH_SIZE_32KB 3
-#define FLASH_SIZE_64KB 5
-#define FLASH_SIZE_128KB 7
-#define FLASH_SIZE_256KB 9
-#define FLASH_SIZE_512KB 10
-#define FLASH_SIZE_1024KB 12
-#define FLASH_SIZE_2048KB 14
-
-static int at91sam7_protect_check(struct flash_bank *bank);
-static int at91sam7_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset,
- uint32_t count);
-
-static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number);
-static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode);
-static uint32_t at91sam7_wait_status_busy(struct flash_bank *bank, uint32_t waitbits, int timeout);
-static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t pagen);
-
-static const uint32_t MC_FMR[4] = { 0xFFFFFF60, 0xFFFFFF70, 0xFFFFFF80, 0xFFFFFF90 };
-static const uint32_t MC_FCR[4] = { 0xFFFFFF64, 0xFFFFFF74, 0xFFFFFF84, 0xFFFFFF94 };
-static const uint32_t MC_FSR[4] = { 0xFFFFFF68, 0xFFFFFF78, 0xFFFFFF88, 0xFFFFFF98 };
-
-static const char *EPROC[8] = {
- "Unknown", "ARM946-E", "ARM7TDMI", "Unknown", "ARM920T", "ARM926EJ-S", "Unknown", "Unknown"
-};
-
-struct at91sam7_flash_bank {
- /* chip id register */
- uint32_t cidr;
- uint16_t cidr_ext;
- uint16_t cidr_nvptyp;
- uint16_t cidr_arch;
- uint16_t cidr_sramsiz;
- uint16_t cidr_nvpsiz;
- uint16_t cidr_nvpsiz2;
- uint16_t cidr_eproc;
- uint16_t cidr_version;
- const char *target_name;
-
- /* flash auto-detection */
- uint8_t flash_autodetection;
-
- /* flash geometry */
- uint16_t pages_per_sector;
- uint16_t pagesize;
- uint16_t pages_in_lockregion;
-
- /* nv memory bits */
- uint16_t num_lockbits_on;
- uint16_t lockbits;
- uint16_t num_nvmbits;
- uint16_t num_nvmbits_on;
- uint16_t nvmbits;
- uint8_t securitybit;
-
- /* 0: not init
- * 1: fmcn for nvbits (1uS)
- * 2: fmcn for flash (1.5uS) */
- uint8_t flashmode;
-
- /* main clock status */
- uint8_t mck_valid;
- uint32_t mck_freq;
-
- /* external clock frequency */
- uint32_t ext_freq;
-
-};
-
-#if 0
-static long SRAMSIZ[16] = {
- -1,
- 0x0400, /* 1K */
- 0x0800, /* 2K */
- -1,
- 0x1c000, /* 112K */
- 0x1000, /* 4K */
- 0x14000, /* 80K */
- 0x28000, /* 160K */
- 0x2000, /* 8K */
- 0x4000, /* 16K */
- 0x8000, /* 32K */
- 0x10000, /* 64K */
- 0x20000, /* 128K */
- 0x40000, /* 256K */
- 0x18000, /* 96K */
- 0x80000, /* 512K */
-};
-#endif
-
-static uint32_t at91sam7_get_flash_status(struct target *target, int bank_number)
-{
- uint32_t fsr;
- target_read_u32(target, MC_FSR[bank_number], &fsr);
-
- return fsr;
-}
-
-/* Read clock configuration and set at91sam7_info->mck_freq */
-static void at91sam7_read_clock_info(struct flash_bank *bank)
-{
- struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t mckr, mcfr, pllr, mor;
- unsigned long tmp = 0, mainfreq;
-
- /* Read Clock Generator Main Oscillator Register */
- target_read_u32(target, CKGR_MOR, &mor);
- /* Read Clock Generator Main Clock Frequency Register */
- target_read_u32(target, CKGR_MCFR, &mcfr);
- /* Read Master Clock Register*/
- target_read_u32(target, PMC_MCKR, &mckr);
- /* Read Clock Generator PLL Register */
- target_read_u32(target, CKGR_PLLR, &pllr);
-
- at91sam7_info->mck_valid = 0;
- at91sam7_info->mck_freq = 0;
- switch (mckr & PMC_MCKR_CSS) {
- case 0: /* Slow Clock */
- at91sam7_info->mck_valid = 1;
- tmp = RC_FREQ;
- break;
-
- case 1: /* Main Clock */
- if ((mcfr & CKGR_MCFR_MAINRDY) &&
- (at91sam7_info->ext_freq == 0)) {
- at91sam7_info->mck_valid = 1;
- tmp = RC_FREQ / 16ul * (mcfr & 0xffff);
- } else if (at91sam7_info->ext_freq != 0) {
- at91sam7_info->mck_valid = 1;
- tmp = at91sam7_info->ext_freq;
- }
- break;
-
- case 2: /* Reserved */
- break;
-
- case 3: /* PLL Clock */
- if ((mcfr & CKGR_MCFR_MAINRDY) &&
- (at91sam7_info->ext_freq == 0)) {
- target_read_u32(target, CKGR_PLLR, &pllr);
- if (!(pllr & CKGR_PLLR_DIV))
- break; /* 0 Hz */
- at91sam7_info->mck_valid = 1;
- mainfreq = RC_FREQ / 16ul * (mcfr & 0xffff);
- /* Integer arithmetic should have sufficient precision
- * as long as PLL is properly configured. */
- tmp = mainfreq / (pllr & CKGR_PLLR_DIV)*
- (((pllr & CKGR_PLLR_MUL) >> 16) + 1);
- } else if ((at91sam7_info->ext_freq != 0) &&
- ((pllr&CKGR_PLLR_DIV) != 0)) {
- at91sam7_info->mck_valid = 1;
- tmp = at91sam7_info->ext_freq / (pllr&CKGR_PLLR_DIV)*
- (((pllr & CKGR_PLLR_MUL) >> 16) + 1);
- }
- break;
- }
-
- /* Prescaler adjust */
- if ((((mckr & PMC_MCKR_PRES) >> 2) == 7) || (tmp == 0)) {
- at91sam7_info->mck_valid = 0;
- at91sam7_info->mck_freq = 0;
- } else if (((mckr & PMC_MCKR_PRES) >> 2) != 0)
- at91sam7_info->mck_freq = tmp >> ((mckr & PMC_MCKR_PRES) >> 2);
- else
- at91sam7_info->mck_freq = tmp;
-}
-
-/* Setup the timimg registers for nvbits or normal flash */
-static void at91sam7_set_flash_mode(struct flash_bank *bank, int mode)
-{
- uint32_t fmr, fmcn = 0, fws = 0;
- struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- struct target *target = bank->target;
-
- if (mode && (mode != at91sam7_info->flashmode)) {
- /* Always round up (ceil) */
- if (mode == FMR_TIMING_NVBITS) {
- if (at91sam7_info->cidr_arch == 0x60) {
- /* AT91SAM7A3 uses master clocks in 100 ns */
- fmcn = (at91sam7_info->mck_freq/10000000ul) + 1;
- } else {
- /* master clocks in 1uS for ARCH 0x7 types */
- fmcn = (at91sam7_info->mck_freq/1000000ul) + 1;
- }
- } else if (mode == FMR_TIMING_FLASH) {
- /* main clocks in 1.5uS */
- fmcn = (at91sam7_info->mck_freq/1000000ul)+
- (at91sam7_info->mck_freq/2000000ul) + 1;
- }
-
- /* hard overclocking */
- if (fmcn > 0xFF)
- fmcn = 0xFF;
-
- /* Only allow fmcn = 0 if clock period is > 30 us = 33kHz. */
- if (at91sam7_info->mck_freq <= 33333ul)
- fmcn = 0;
- /* Only allow fws = 0 if clock frequency is < 30 MHz. */
- if (at91sam7_info->mck_freq > 30000000ul)
- fws = 1;
-
- LOG_DEBUG("fmcn[%i]: %i", bank->bank_number, (int)(fmcn));
- fmr = fmcn << 16 | fws << 8;
- target_write_u32(target, MC_FMR[bank->bank_number], fmr);
- }
-
- at91sam7_info->flashmode = mode;
-}
-
-static uint32_t at91sam7_wait_status_busy(struct flash_bank *bank, uint32_t waitbits, int timeout)
-{
- uint32_t status;
-
- while ((!((status = at91sam7_get_flash_status(bank->target,
- bank->bank_number)) & waitbits)) && (timeout-- > 0)) {
- LOG_DEBUG("status[%i]: 0x%" PRIx32 "", (int)bank->bank_number, status);
- alive_sleep(1);
- }
-
- LOG_DEBUG("status[%i]: 0x%" PRIx32 "", bank->bank_number, status);
-
- if (status & 0x0C) {
- LOG_ERROR("status register: 0x%" PRIx32 "", status);
- if (status & 0x4)
- LOG_ERROR("Lock Error Bit Detected, Operation Abort");
- if (status & 0x8)
- LOG_ERROR("Invalid command and/or bad keyword, Operation Abort");
- if (status & 0x10)
- LOG_ERROR("Security Bit Set, Operation Abort");
- }
-
- return status;
-}
-
-/* Send one command to the AT91SAM flash controller */
-static int at91sam7_flash_command(struct flash_bank *bank, uint8_t cmd, uint16_t pagen)
-{
- uint32_t fcr;
- struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- struct target *target = bank->target;
-
- fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd;
- target_write_u32(target, MC_FCR[bank->bank_number], fcr);
- LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u",
- fcr,
- bank->bank_number + 1,
- pagen);
-
- if ((at91sam7_info->cidr_arch == 0x60) && ((cmd == SLB) | (cmd == CLB))) {
- /* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */
- if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C)
- return ERROR_FLASH_OPERATION_FAILED;
- return ERROR_OK;
- }
-
- if (at91sam7_wait_status_busy(bank, MC_FSR_FRDY, 10)&0x0C)
- return ERROR_FLASH_OPERATION_FAILED;
-
- return ERROR_OK;
-}
-
-/* Read device id register, main clock frequency register and fill in driver info structure */
-static int at91sam7_read_part_info(struct flash_bank *bank)
-{
- struct at91sam7_flash_bank *at91sam7_info;
- struct target *target = bank->target;
-
- uint16_t bnk, sec;
- uint16_t arch;
- uint32_t cidr;
- uint8_t banks_num = 0;
- uint16_t num_nvmbits = 0;
- uint16_t sectors_num = 0;
- uint16_t pages_per_sector = 0;
- uint16_t page_size = 0;
- uint32_t ext_freq;
- uint32_t bank_size;
- uint32_t base_address = 0;
- char *target_name_t = "Unknown";
-
- at91sam7_info = bank->driver_priv;
-
- if (at91sam7_info->cidr != 0) {
- /* flash already configured, update clock and check for protected sectors */
- struct flash_bank *fb = bank;
- struct flash_bank *t_bank = bank;
-
- while (t_bank) {
- /* re-calculate master clock frequency */
- at91sam7_read_clock_info(t_bank);
-
- /* no timming */
- at91sam7_set_flash_mode(t_bank, FMR_TIMING_NONE);
-
- /* check protect state */
- at91sam7_protect_check(t_bank);
-
- t_bank = fb->next;
- fb = t_bank;
- }
-
- return ERROR_OK;
- }
-
- /* Read and parse chip identification register */
- target_read_u32(target, DBGU_CIDR, &cidr);
- if (cidr == 0) {
- LOG_WARNING("Cannot identify target as an AT91SAM");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (at91sam7_info->flash_autodetection == 0) {
- /* banks and sectors are already created, based on data from input file */
- struct flash_bank *fb = bank;
- struct flash_bank *t_bank = bank;
- while (t_bank) {
- at91sam7_info = t_bank->driver_priv;
-
- at91sam7_info->cidr = cidr;
- at91sam7_info->cidr_ext = (cidr >> 31)&0x0001;
- at91sam7_info->cidr_nvptyp = (cidr >> 28)&0x0007;
- at91sam7_info->cidr_arch = (cidr >> 20)&0x00FF;
- at91sam7_info->cidr_sramsiz = (cidr >> 16)&0x000F;
- at91sam7_info->cidr_nvpsiz2 = (cidr >> 12)&0x000F;
- at91sam7_info->cidr_nvpsiz = (cidr >> 8)&0x000F;
- at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007;
- at91sam7_info->cidr_version = cidr&0x001F;
-
- /* calculate master clock frequency */
- at91sam7_read_clock_info(t_bank);
-
- /* no timming */
- at91sam7_set_flash_mode(t_bank, FMR_TIMING_NONE);
-
- /* check protect state */
- at91sam7_protect_check(t_bank);
-
- t_bank = fb->next;
- fb = t_bank;
- }
-
- return ERROR_OK;
- }
-
- arch = (cidr >> 20)&0x00FF;
-
- /* check flash size */
- switch ((cidr >> 8)&0x000F) {
- case FLASH_SIZE_8KB:
- break;
-
- case FLASH_SIZE_16KB:
- banks_num = 1;
- sectors_num = 8;
- pages_per_sector = 32;
- page_size = 64;
- base_address = 0x00100000;
- if (arch == 0x70) {
- num_nvmbits = 2;
- target_name_t = "AT91SAM7S161/16";
- }
- break;
-
- case FLASH_SIZE_32KB:
- banks_num = 1;
- sectors_num = 8;
- pages_per_sector = 32;
- page_size = 128;
- base_address = 0x00100000;
- if (arch == 0x70) {
- num_nvmbits = 2;
- target_name_t = "AT91SAM7S321/32";
- }
- if (arch == 0x72) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7SE32";
- }
- break;
-
- case FLASH_SIZE_64KB:
- banks_num = 1;
- sectors_num = 16;
- pages_per_sector = 32;
- page_size = 128;
- base_address = 0x00100000;
- if (arch == 0x70) {
- num_nvmbits = 2;
- target_name_t = "AT91SAM7S64";
- }
- break;
-
- case FLASH_SIZE_128KB:
- banks_num = 1;
- sectors_num = 8;
- pages_per_sector = 64;
- page_size = 256;
- base_address = 0x00100000;
- if (arch == 0x70) {
- num_nvmbits = 2;
- target_name_t = "AT91SAM7S128";
- }
- if (arch == 0x71) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7XC128";
- }
- if (arch == 0x72) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7SE128";
- }
- if (arch == 0x75) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7X128";
- }
- break;
-
- case FLASH_SIZE_256KB:
- banks_num = 1;
- sectors_num = 16;
- pages_per_sector = 64;
- page_size = 256;
- base_address = 0x00100000;
- if (arch == 0x60) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7A3";
- }
- if (arch == 0x70) {
- num_nvmbits = 2;
- target_name_t = "AT91SAM7S256";
- }
- if (arch == 0x71) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7XC256";
- }
- if (arch == 0x72) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7SE256";
- }
- if (arch == 0x75) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7X256";
- }
- break;
-
- case FLASH_SIZE_512KB:
- banks_num = 2;
- sectors_num = 16;
- pages_per_sector = 64;
- page_size = 256;
- base_address = 0x00100000;
- if (arch == 0x70) {
- num_nvmbits = 2;
- target_name_t = "AT91SAM7S512";
- }
- if (arch == 0x71) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7XC512";
- }
- if (arch == 0x72) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7SE512";
- }
- if (arch == 0x75) {
- num_nvmbits = 3;
- target_name_t = "AT91SAM7X512";
- }
- break;
-
- case FLASH_SIZE_1024KB:
- break;
-
- case FLASH_SIZE_2048KB:
- break;
- }
-
- if (strcmp(target_name_t, "Unknown") == 0) {
- LOG_ERROR(
- "Target autodetection failed! Please specify target parameters in configuration file");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- ext_freq = at91sam7_info->ext_freq;
-
- /* calculate bank size */
- bank_size = sectors_num * pages_per_sector * page_size;
-
- for (bnk = 0; bnk < banks_num; bnk++) {
- struct flash_bank *t_bank = bank;
- if (bnk > 0) {
- if (!t_bank->next) {
- /* create a new flash bank element */
- struct flash_bank *fb = malloc(sizeof(struct flash_bank));
- fb->target = target;
- fb->driver = bank->driver;
- fb->driver_priv = malloc(sizeof(struct at91sam7_flash_bank));
- fb->name = "sam7_probed";
- fb->next = NULL;
-
- /* link created bank in 'flash_banks' list */
- t_bank->next = fb;
- }
- t_bank = t_bank->next;
- }
-
- t_bank->bank_number = bnk;
- t_bank->base = base_address + bnk * bank_size;
- t_bank->size = bank_size;
- t_bank->chip_width = 0;
- t_bank->bus_width = 4;
- t_bank->num_sectors = sectors_num;
-
- /* allocate sectors */
- t_bank->sectors = malloc(sectors_num * sizeof(struct flash_sector));
- for (sec = 0; sec < sectors_num; sec++) {
- t_bank->sectors[sec].offset = sec * pages_per_sector * page_size;
- t_bank->sectors[sec].size = pages_per_sector * page_size;
- t_bank->sectors[sec].is_erased = -1;
- t_bank->sectors[sec].is_protected = -1;
- }
-
- at91sam7_info = t_bank->driver_priv;
-
- at91sam7_info->cidr = cidr;
- at91sam7_info->cidr_ext = (cidr >> 31)&0x0001;
- at91sam7_info->cidr_nvptyp = (cidr >> 28)&0x0007;
- at91sam7_info->cidr_arch = (cidr >> 20)&0x00FF;
- at91sam7_info->cidr_sramsiz = (cidr >> 16)&0x000F;
- at91sam7_info->cidr_nvpsiz2 = (cidr >> 12)&0x000F;
- at91sam7_info->cidr_nvpsiz = (cidr >> 8)&0x000F;
- at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007;
- at91sam7_info->cidr_version = cidr&0x001F;
-
- at91sam7_info->target_name = target_name_t;
- at91sam7_info->flashmode = 0;
- at91sam7_info->ext_freq = ext_freq;
- at91sam7_info->num_nvmbits = num_nvmbits;
- at91sam7_info->num_nvmbits_on = 0;
- at91sam7_info->pagesize = page_size;
- at91sam7_info->pages_per_sector = pages_per_sector;
-
- /* calculate master clock frequency */
- at91sam7_read_clock_info(t_bank);
-
- /* no timming */
- at91sam7_set_flash_mode(t_bank, FMR_TIMING_NONE);
-
- /* check protect state */
- at91sam7_protect_check(t_bank);
- }
-
- LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x",
- at91sam7_info->cidr_nvptyp,
- at91sam7_info->cidr_arch);
-
- return ERROR_OK;
-}
-
-static int at91sam7_erase_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- uint16_t retval;
- uint32_t blank;
- uint16_t fast_check;
- uint8_t *buffer;
- uint16_t nSector;
- uint16_t nByte;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Configure the flash controller timing */
- at91sam7_read_clock_info(bank);
- at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH);
-
- fast_check = 1;
- for (nSector = 0; nSector < bank->num_sectors; nSector++) {
- retval = target_blank_check_memory(target,
- bank->base + bank->sectors[nSector].offset,
- bank->sectors[nSector].size,
- &blank);
- if (retval != ERROR_OK) {
- fast_check = 0;
- break;
- }
- if (blank == 0xFF)
- bank->sectors[nSector].is_erased = 1;
- else
- bank->sectors[nSector].is_erased = 0;
- }
-
- if (fast_check)
- return ERROR_OK;
-
- LOG_USER("Running slow fallback erase check - add working memory");
-
- buffer = malloc(bank->sectors[0].size);
- for (nSector = 0; nSector < bank->num_sectors; nSector++) {
- bank->sectors[nSector].is_erased = 1;
- retval = target_read_memory(target, bank->base + bank->sectors[nSector].offset, 4,
- bank->sectors[nSector].size/4, buffer);
- if (retval != ERROR_OK)
- return retval;
-
- for (nByte = 0; nByte < bank->sectors[nSector].size; nByte++) {
- if (buffer[nByte] != 0xFF) {
- bank->sectors[nSector].is_erased = 0;
- break;
- }
- }
- }
- free(buffer);
-
- return ERROR_OK;
-}
-
-static int at91sam7_protect_check(struct flash_bank *bank)
-{
- uint8_t lock_pos, gpnvm_pos;
- uint32_t status;
-
- struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
-
- if (at91sam7_info->cidr == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- status = at91sam7_get_flash_status(bank->target, bank->bank_number);
- at91sam7_info->lockbits = (status >> 16);
-
- at91sam7_info->num_lockbits_on = 0;
- for (lock_pos = 0; lock_pos < bank->num_sectors; lock_pos++) {
- if (((status >> (16 + lock_pos))&(0x0001)) == 1) {
- at91sam7_info->num_lockbits_on++;
- bank->sectors[lock_pos].is_protected = 1;
- } else
- bank->sectors[lock_pos].is_protected = 0;
- }
-
- /* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
- status = at91sam7_get_flash_status(bank->target, 0);
-
- at91sam7_info->securitybit = (status >> 4)&0x01;
- at91sam7_info->nvmbits = (status >> 8)&0xFF;
-
- at91sam7_info->num_nvmbits_on = 0;
- for (gpnvm_pos = 0; gpnvm_pos < at91sam7_info->num_nvmbits; gpnvm_pos++) {
- if (((status >> (8 + gpnvm_pos))&(0x01)) == 1)
- at91sam7_info->num_nvmbits_on++;
- }
-
- return ERROR_OK;
-}
-
-FLASH_BANK_COMMAND_HANDLER(at91sam7_flash_bank_command)
-{
- struct flash_bank *t_bank = bank;
- struct at91sam7_flash_bank *at91sam7_info;
- struct target *target = t_bank->target;
-
- uint32_t base_address;
- uint32_t bank_size;
- uint32_t ext_freq = 0;
-
- int chip_width;
- int bus_width;
- int banks_num;
- int num_sectors;
-
- uint16_t pages_per_sector;
- uint16_t page_size;
- uint16_t num_nvmbits;
-
- char *target_name_t;
-
- int bnk, sec;
-
- at91sam7_info = malloc(sizeof(struct at91sam7_flash_bank));
- t_bank->driver_priv = at91sam7_info;
-
- /* part wasn't probed for info yet */
- at91sam7_info->cidr = 0;
- at91sam7_info->flashmode = 0;
- at91sam7_info->ext_freq = 0;
- at91sam7_info->flash_autodetection = 0;
-
- if (CMD_ARGC < 13) {
- at91sam7_info->flash_autodetection = 1;
- return ERROR_OK;
- }
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], base_address);
-
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], chip_width);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[4], bus_width);
-
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[8], banks_num);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[9], num_sectors);
- COMMAND_PARSE_NUMBER(u16, CMD_ARGV[10], pages_per_sector);
- COMMAND_PARSE_NUMBER(u16, CMD_ARGV[11], page_size);
- COMMAND_PARSE_NUMBER(u16, CMD_ARGV[12], num_nvmbits);
-
- if (CMD_ARGC == 14) {
- unsigned long freq;
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[13], freq);
- ext_freq = freq * 1000;
- at91sam7_info->ext_freq = ext_freq;
- }
-
- if ((bus_width == 0) || (banks_num == 0) || (num_sectors == 0) ||
- (pages_per_sector == 0) || (page_size == 0) || (num_nvmbits == 0)) {
- at91sam7_info->flash_autodetection = 1;
- return ERROR_OK;
- }
-
- target_name_t = calloc(strlen(CMD_ARGV[7]) + 1, sizeof(char));
- strcpy(target_name_t, CMD_ARGV[7]);
-
- /* calculate bank size */
- bank_size = num_sectors * pages_per_sector * page_size;
-
- for (bnk = 0; bnk < banks_num; bnk++) {
- if (bnk > 0) {
- if (!t_bank->next) {
- /* create a new bank element */
- struct flash_bank *fb = malloc(sizeof(struct flash_bank));
- fb->target = target;
- fb->driver = bank->driver;
- fb->driver_priv = malloc(sizeof(struct at91sam7_flash_bank));
- fb->name = "sam7_probed";
- fb->next = NULL;
-
- /* link created bank in 'flash_banks' list */
- t_bank->next = fb;
- }
- t_bank = t_bank->next;
- }
-
- t_bank->bank_number = bnk;
- t_bank->base = base_address + bnk * bank_size;
- t_bank->size = bank_size;
- t_bank->chip_width = chip_width;
- t_bank->bus_width = bus_width;
- t_bank->num_sectors = num_sectors;
-
- /* allocate sectors */
- t_bank->sectors = malloc(num_sectors * sizeof(struct flash_sector));
- for (sec = 0; sec < num_sectors; sec++) {
- t_bank->sectors[sec].offset = sec * pages_per_sector * page_size;
- t_bank->sectors[sec].size = pages_per_sector * page_size;
- t_bank->sectors[sec].is_erased = -1;
- t_bank->sectors[sec].is_protected = -1;
- }
-
- at91sam7_info = t_bank->driver_priv;
-
- at91sam7_info->target_name = target_name_t;
- at91sam7_info->flashmode = 0;
- at91sam7_info->ext_freq = ext_freq;
- at91sam7_info->num_nvmbits = num_nvmbits;
- at91sam7_info->num_nvmbits_on = 0;
- at91sam7_info->pagesize = page_size;
- at91sam7_info->pages_per_sector = pages_per_sector;
- }
-
- return ERROR_OK;
-}
-
-static int at91sam7_erase(struct flash_bank *bank, int first, int last)
-{
- struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- int sec;
- uint32_t nbytes, pos;
- uint8_t *buffer;
- uint8_t erase_all;
-
- if (at91sam7_info->cidr == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors))
- return ERROR_FLASH_SECTOR_INVALID;
-
- erase_all = 0;
- if ((first == 0) && (last == (bank->num_sectors-1)))
- erase_all = 1;
-
- /* Configure the flash controller timing */
- at91sam7_read_clock_info(bank);
- at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH);
-
- if (erase_all) {
- if (at91sam7_flash_command(bank, EA, 0) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
- } else {
- /* allocate and clean buffer */
- nbytes = (last - first + 1) * bank->sectors[first].size;
- buffer = malloc(nbytes * sizeof(uint8_t));
- for (pos = 0; pos < nbytes; pos++)
- buffer[pos] = 0xFF;
-
- if (at91sam7_write(bank, buffer, bank->sectors[first].offset, nbytes) != ERROR_OK) {
- free(buffer);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- free(buffer);
- }
-
- /* mark erased sectors */
- for (sec = first; sec <= last; sec++)
- bank->sectors[sec].is_erased = 1;
-
- return ERROR_OK;
-}
-
-static int at91sam7_protect(struct flash_bank *bank, int set, int first, int last)
-{
- uint32_t cmd;
- int sector;
- uint32_t pagen;
-
- struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
-
- if (at91sam7_info->cidr == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors))
- return ERROR_FLASH_SECTOR_INVALID;
-
- /* Configure the flash controller timing */
- at91sam7_read_clock_info(bank);
- at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
-
- for (sector = first; sector <= last; sector++) {
- if (set)
- cmd = SLB;
- else
- cmd = CLB;
-
- /* if we lock a page from one sector then entire sector will be locked, also,
- * if we unlock a page from a locked sector, entire sector will be unlocked */
- pagen = sector * at91sam7_info->pages_per_sector;
-
- if (at91sam7_flash_command(bank, cmd, pagen) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- at91sam7_protect_check(bank);
-
- return ERROR_OK;
-}
-
-static int at91sam7_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- int retval;
- struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t dst_min_alignment, wcount, bytes_remaining = count;
- uint32_t first_page, last_page, pagen, buffer_pos;
-
- if (at91sam7_info->cidr == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset + count > bank->size)
- return ERROR_FLASH_DST_OUT_OF_BANK;
-
- dst_min_alignment = at91sam7_info->pagesize;
-
- if (offset % dst_min_alignment) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required alignment 0x%" PRIx32 "",
- offset,
- dst_min_alignment);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- if (at91sam7_info->cidr_arch == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- first_page = offset/dst_min_alignment;
- last_page = DIV_ROUND_UP(offset + count, dst_min_alignment);
-
- LOG_DEBUG("first_page: %i, last_page: %i, count %i",
- (int)first_page,
- (int)last_page,
- (int)count);
-
- /* Configure the flash controller timing */
- at91sam7_read_clock_info(bank);
- at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH);
-
- for (pagen = first_page; pagen < last_page; pagen++) {
- if (bytes_remaining < dst_min_alignment)
- count = bytes_remaining;
- else
- count = dst_min_alignment;
- bytes_remaining -= count;
-
- /* Write one block to the PageWriteBuffer */
- buffer_pos = (pagen-first_page)*dst_min_alignment;
- wcount = DIV_ROUND_UP(count, 4);
- retval = target_write_memory(target, bank->base + pagen*dst_min_alignment, 4,
- wcount, buffer + buffer_pos);
- if (retval != ERROR_OK)
- return retval;
-
- /* Send Write Page command to Flash Controller */
- if (at91sam7_flash_command(bank, WP, pagen) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
- LOG_DEBUG("Write flash bank:%i page number:%" PRIi32 "", bank->bank_number, pagen);
- }
-
- return ERROR_OK;
-}
-
-static int at91sam7_probe(struct flash_bank *bank)
-{
- /* we can't probe on an at91sam7
- * if this is an at91sam7, it has the configured flash */
- int retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = at91sam7_read_part_info(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int get_at91sam7_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- int printed;
- struct at91sam7_flash_bank *at91sam7_info = bank->driver_priv;
-
- if (at91sam7_info->cidr == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- printed = snprintf(buf, buf_size,
- "\n at91sam7 driver information: Chip is %s\n",
- at91sam7_info->target_name);
-
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf,
- buf_size,
- " Cidr: 0x%8.8" PRIx32 " | Arch: 0x%4.4x | Eproc: %s | Version: 0x%3.3x | "
- "Flashsize: 0x%8.8" PRIx32 "\n",
- at91sam7_info->cidr,
- at91sam7_info->cidr_arch,
- EPROC[at91sam7_info->cidr_eproc],
- at91sam7_info->cidr_version,
- bank->size);
-
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf, buf_size,
- " Master clock (estimated): %u KHz | External clock: %u KHz\n",
- (unsigned)(at91sam7_info->mck_freq / 1000),
- (unsigned)(at91sam7_info->ext_freq / 1000));
-
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf,
- buf_size,
- " Pagesize: %i bytes | Lockbits(%i): %i 0x%4.4x | Pages in lock region: %i\n",
- at91sam7_info->pagesize,
- bank->num_sectors,
- at91sam7_info->num_lockbits_on,
- at91sam7_info->lockbits,
- at91sam7_info->pages_per_sector*at91sam7_info->num_lockbits_on);
-
- buf += printed;
- buf_size -= printed;
-
- snprintf(buf, buf_size,
- " Securitybit: %i | Nvmbits(%i): %i 0x%1.1x\n",
- at91sam7_info->securitybit, at91sam7_info->num_nvmbits,
- at91sam7_info->num_nvmbits_on, at91sam7_info->nvmbits);
-
- return ERROR_OK;
-}
-
-/*
-* On AT91SAM7S: When the gpnvm bits are set with
-* > at91sam7 gpnvm bitnr set
-* the changes are not visible in the flash controller status register MC_FSR
-* until the processor has been reset.
-* On the Olimex board this requires a power cycle.
-* Note that the AT91SAM7S has the following errata (doc6175.pdf sec 14.1.3):
-* The maximum number of write/erase cycles for Non volatile Memory bits is 100. this includes
-* Lock Bits (LOCKx), General Purpose NVM bits (GPNVMx) and the Security Bit.
-*/
-COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
-{
- struct flash_bank *bank;
- int bit;
- uint8_t flashcmd;
- uint32_t status;
- struct at91sam7_flash_bank *at91sam7_info;
- int retval;
-
- if (CMD_ARGC != 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- bank = get_flash_bank_by_num_noprobe(0);
- if (bank == NULL)
- return ERROR_FLASH_BANK_INVALID;
- if (strcmp(bank->driver->name, "at91sam7")) {
- command_print(CMD_CTX, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]);
- return ERROR_FLASH_BANK_INVALID;
- }
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("target has to be halted to perform flash operation");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (strcmp(CMD_ARGV[1], "set") == 0)
- flashcmd = SGPB;
- else if (strcmp(CMD_ARGV[1], "clear") == 0)
- flashcmd = CGPB;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- at91sam7_info = bank->driver_priv;
- if (at91sam7_info->cidr == 0) {
- retval = at91sam7_read_part_info(bank);
- if (retval != ERROR_OK)
- return retval;
- }
-
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], bit);
- if ((bit < 0) || (bit >= at91sam7_info->num_nvmbits)) {
- command_print(CMD_CTX,
- "gpnvm bit '#%s' is out of bounds for target %s",
- CMD_ARGV[0],
- at91sam7_info->target_name);
- return ERROR_OK;
- }
-
- /* Configure the flash controller timing */
- at91sam7_read_clock_info(bank);
- at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
-
- if (at91sam7_flash_command(bank, flashcmd, bit) != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */
- status = at91sam7_get_flash_status(bank->target, 0);
- LOG_DEBUG("at91sam7_handle_gpnvm_command: cmd 0x%x, value %d, status 0x%" PRIx32,
- flashcmd,
- bit,
- status);
-
- /* check protect state */
- at91sam7_protect_check(bank);
-
- return ERROR_OK;
-}
-
-static const struct command_registration at91sam7_exec_command_handlers[] = {
- {
- .name = "gpnvm",
- .handler = at91sam7_handle_gpnvm_command,
- .mode = COMMAND_EXEC,
- .help = "set or clear one General Purpose Non-Volatile Memory "
- "(gpnvm) bit",
- .usage = "bitnum ('set'|'clear')",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration at91sam7_command_handlers[] = {
- {
- .name = "at91sam7",
- .mode = COMMAND_ANY,
- .help = "at91sam7 flash command group",
- .usage = "",
- .chain = at91sam7_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver at91sam7_flash = {
- .name = "at91sam7",
- .usage = "gpnvm <bit> <set | clear>",
- .commands = at91sam7_command_handlers,
- .flash_bank_command = at91sam7_flash_bank_command,
- .erase = at91sam7_erase,
- .protect = at91sam7_protect,
- .write = at91sam7_write,
- .read = default_flash_read,
- .probe = at91sam7_probe,
- .auto_probe = at91sam7_probe,
- .erase_check = at91sam7_erase_check,
- .protect_check = at91sam7_protect_check,
- .info = get_at91sam7_info,
-};
[50/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/BUGS
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/BUGS b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/BUGS
deleted file mode 100755
index 17a7b30..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/BUGS
+++ /dev/null
@@ -1,74 +0,0 @@
-// This file is part of the Doxygen Developer Manual
-/** @page bugs Bug Reporting
-
-Please report bugs by subscribing to the OpenOCD mailing list and
-posting a message with your report:
-
- openocd-devel@lists.sourceforge.net
-
-Also, please check the bug database to see if a ticket for
-the bug has already been opened. You might be asked to open
-such a ticket, or to update an existing ticket with more data.
-
- http://bugs.openocd.org/
-
-To minimize work for OpenOCD developers, you should try to include
-all of the information listed below. If you feel that some of the
-items below are unnecessary for a clear bug report, you may leave
-them out; likewise, feel free to include additional information
-that may be important.
-
-- Target PCB/board description
-- Configuration scripts
-- OpenOCD command line
-- List of commands issued or GDB operations performed
-- Expected result
-- Actual result
-- Logs using <code>debug_level 3</code> (or with '-d 3' on the command line)
-- If the report is for a regression:
- - Include logs for both working and broken versions.
- - Find the precise version that caused the regression by binary search.
- You can use "git bisect" to expedite this binary search:
- http://www.kernel.org/pub/software/scm/git/docs/git-bisect.html
-
-If possible, please develop and attach a patch that helps to expose or
-solve the reported problem. See the HACKING file for information
-about that process.
-
-Attach all files directly to your posting. The mailing list knows to
-transform attachments to links, but attachments must be less than 300KB
-in total.
-
-@section bugscrashdump Obtaining Crash Backtraces
-
-If OpenOCD is crashing, there are two very effective things you can do to
-improve your chances of getting help on the development mailing list.
-
-Try to reproduce the problem using the dummy JTAG interface to allow other developers to replicate
-your problem robustly and use GDB to get a trace:@par
-@code
-% OPENOCDSRC/configure --enable-dummy ...
-% openocd -f interface/dummy.cfg -f target/xxx.cfg
-=> SEGFAULT
-% gdb --args openocd ....
-(gdb) run
-(gdb) bt
-=> here a stack trace is dumped.
-@endcode
-
-@section bugsintreedebug Running and Debugging In-Tree
-
-To run or debug the in-tree executable (not recommended), you must
-use libtool to set up the correct shared library paths:
-@code
- libtool gdb --args openocd ....
-@endcode
-or the more pedantic (and forward-compatible):
-@code
- libtool --mode=execute gdb --args openocd ....
-@endcode
-
- */
-/** @file
-This file contains the @ref bugs page.
-*/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/COPYING
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/COPYING b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/COPYING
deleted file mode 100755
index d159169..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/COPYING
+++ /dev/null
@@ -1,339 +0,0 @@
- GNU GENERAL PUBLIC LICENSE
- Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
- Preamble
-
- The licenses for most software are designed to take away your
-freedom to share and change it. By contrast, the GNU General Public
-License is intended to guarantee your freedom to share and change free
-software--to make sure the software is free for all its users. This
-General Public License applies to most of the Free Software
-Foundation's software and to any other program whose authors commit to
-using it. (Some other Free Software Foundation software is covered by
-the GNU Lesser General Public License instead.) You can apply it to
-your programs, too.
-
- When we speak of free software, we are referring to freedom, not
-price. Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-this service if you wish), that you receive source code or can get it
-if you want it, that you can change the software or use pieces of it
-in new free programs; and that you know you can do these things.
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- To protect your rights, we need to make restrictions that forbid
-anyone to deny you these rights or to ask you to surrender the rights.
-These restrictions translate to certain responsibilities for you if you
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-
- For example, if you distribute copies of such a program, whether
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- We protect your rights with two steps: (1) copyright the software, and
-(2) offer you this license which gives you legal permission to copy,
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-
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-that everyone understands that there is no warranty for this free
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-that any problems introduced by others will not reflect on the original
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- The precise terms and conditions for copying, distribution and
-modification follow.
-
- GNU GENERAL PUBLIC LICENSE
- TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
-
- 0. This License applies to any program or other work which contains
-a notice placed by the copyright holder saying it may be distributed
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-language. (Hereinafter, translation is included without limitation in
-the term "modification".) Each licensee is addressed as "you".
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- 12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
-WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
-REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
-INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
-OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
-TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
-YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
-PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGES.
-
- END OF TERMS AND CONDITIONS
-
- How to Apply These Terms to Your New Programs
-
- If you develop a new program, and you want it to be of the greatest
-possible use to the public, the best way to achieve this is to make it
-free software which everyone can redistribute and change under these terms.
-
- To do so, attach the following notices to the program. It is safest
-to attach them to the start of each source file to most effectively
-convey the exclusion of warranty; and each file should have at least
-the "copyright" line and a pointer to where the full notice is found.
-
- <one line to give the program's name and a brief idea of what it does.>
- Copyright (C) <year> <name of author>
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-
-Also add information on how to contact you by electronic and paper mail.
-
-If the program is interactive, make it output a short notice like this
-when it starts in an interactive mode:
-
- Gnomovision version 69, Copyright (C) year name of author
- Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
- This is free software, and you are welcome to redistribute it
- under certain conditions; type `show c' for details.
-
-The hypothetical commands `show w' and `show c' should show the appropriate
-parts of the General Public License. Of course, the commands you use may
-be called something other than `show w' and `show c'; they could even be
-mouse-clicks or menu items--whatever suits your program.
-
-You should also get your employer (if you work as a programmer) or your
-school, if any, to sign a "copyright disclaimer" for the program, if
-necessary. Here is a sample; alter the names:
-
- Yoyodyne, Inc., hereby disclaims all copyright interest in the program
- `Gnomovision' (which makes passes at compilers) written by James Hacker.
-
- <signature of Ty Coon>, 1 April 1989
- Ty Coon, President of Vice
-
-This General Public License does not permit incorporating your program into
-proprietary programs. If your program is a subroutine library, you may
-consider it more useful to permit linking proprietary applications with the
-library. If this is what you want to do, use the GNU Lesser General
-Public License instead of this License.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/ChangeLog
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/ChangeLog b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/ChangeLog
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index a8df5d0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/ChangeLog
+++ /dev/null
@@ -1 +0,0 @@
-Retired in favor of git log.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/HACKING
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/HACKING b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/HACKING
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--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/HACKING
+++ /dev/null
@@ -1,185 +0,0 @@
-// This file is part of the Doxygen Developer Manual
-/** @page patchguide Patch Guidelines
-
-\attention If you're behind a corporate wall with http only access to the
-world, you can still use these instructions!
-
-\attention You can't send patches to the mailing list anymore at all. Nowadays
-you are expected to send patches to the OpenOCD Gerrit GIT server for a
-review.
-
-@section gerrit Submitting patches to the OpenOCD Gerrit server
-
-OpenOCD is to some extent a "self service" open source project, so to
-contribute, you must follow the standard procedures to have the best
-possible chance to get your changes accepted.
-
-The procedure to create a patch is essentially:
-
-- make the changes
-- create a commit
-- send the changes to the Gerrit server for review
-- correct the patch and re-send it according to review feedback
-
-Your patch (or commit) should be a "good patch": focus it on a single
-issue, and make it be easily reviewable. Don't make
-it so large that it's hard to review; split large
-patches into smaller ones. (That can also help
-track down bugs later on.) All patches should
-be "clean", which includes preserving the existing
-coding style and updating documentation as needed.
-
-Say in the commit message if it's a bugfix (describe the bug) or a new
-feature. Don't expect patches to merge immediately
-for the next release. Be ready to rework patches
-in response to feedback.
-
-Add yourself to the GPL copyright for non-trivial changes.
-
-@section stepbystep Step by step procedure
-
--# Create a Gerrit account at: http://openocd.zylin.com
- - On subsequent sign ins, use the full URL prefaced with 'http://'
- For example: http://user_identifier.open_id_provider.com
- -# Add a username to your profile.
- After creating the Gerrit account and signing in, you will need to
- add a username to your profile. To do this, go to 'Settings', and
- add a username of your choice.
- Your username will be required in step 3 and substituted wherever
- the string 'USERNAME' is found.
- -# Create an SSH public key following the directions on github:
- https://help.github.com/articles/generating-ssh-keys . You can skip step 3
- (adding key to Github account) and 4 (testing) - these are useful only if
- you actually use Github or want to test whether the new key works fine.
- -# Add this new SSH key to your Gerrit account:
- go to 'Settings' > 'SSH Public Keys', paste the contents of
- ~/.ssh/id_rsa.pub into the text field (if it's not visible click on
- 'Add Key ...' button) and confirm by clicking 'Add' button.
--# Clone the git repository, rather than just download the source:
- @code
- git clone git://git.code.sf.net/p/openocd/code openocd
- @endcode
- or if you have problems with the "git:" protocol, use
- the slower http protocol:
- @code
- git clone http://git.code.sf.net/p/openocd/code openocd
- @endcode
--# Set up Gerrit with your local repository. All this does it
-to instruct git locally how to send off the changes.
- -# Add a new remote to git using Gerrit username:
-@code
-git remote add review ssh://USERNAME@openocd.zylin.com:29418/openocd.git
-git config remote.review.push HEAD:refs/publish/master
-@endcode
- Or with http only:
-@code
-git remote add review http://USERNAME@openocd.zylin.com/p/openocd.git
-git config remote.review.push HEAD:refs/publish/master
-@endcode
- The http password is configured from your gerrit settings - http://openocd.zylin.com/#/settings/http-password.
- \note If you want to simplify http access you can also add your http password to the url as follows:
-@code
-git remote add review http://USERNAME:PASSWORD@openocd.zylin.com/p/openocd.git
-@endcode
- -# You will need to install this hook, we will look into a better solution:
-@code
-scp -p -P 29418 USERNAME@openocd.zylin.com:hooks/commit-msg .git/hooks/
-@endcode
- Or with http only:
-@code
-wget http://openocd.zylin.com/tools/hooks/commit-msg
-mv commit-msg .git/hooks
-chmod +x .git/hooks/commit-msg
-@endcode
- \note A script exists to simplify the two items above. execute:
-@code
-tools/initial.sh <username>
-@endcode
-With @<username@> being your Gerrit username.
--# Set up git with your name and email:
-@code
-git config --global user.name "John Smith"
-git config --global user.email "john@smith.org"
-@endcode
--# Work on your patches. Split the work into
- multiple small patches that can be reviewed and
- applied seperately and safely to the OpenOCD
- repository.
-@code
-while(!done) {
- work - edit files using your favorite editor.
- run "git commit -s -a" to commit all changes.
- run tools/checkpatch.sh to verify your patch style is ok.
-}
-@endcode
- \note use "git add ." before commit to add new files.
-
- Comment template, notice the short first line w/topic. The topic field
- should identify the main part or subsystem the patch touches. Check
- git log for examples.
-@code
-topic: Short comment
-<blank line>
-Longer comments over several lines, explaining (where applicable) the
-reason for the patch and the general idea the solution is based on,
-any major design decisions, etc...
-<blank line>
-Signed-off-by: ...
-@endcode
--# Next you need to make sure that your patches
- are on top of the latest stuff on the server and
- that there are no conflicts:
-@code
-git pull --rebase origin master
-@endcode
--# Send the patches to the Gerrit server for review:
-@code
-git push review
-@endcode
--# Forgot something, want to add more? Just make the changes and do:
-@code
-git commit --amend
-git push review
-@endcode
-
-Further reading: http://www.coreboot.org/Git
-
-@section timeline When can I expect my contribution to be committed?
-
-The code review is intended to take as long as a week or two to allow
-maintainers and contributors who work on OpenOCD only in their spare
-time oportunity to perform a review and raise objections.
-
-With Gerrit much of the urgency of getting things committed has been
-removed as the work in progress is safely stored in Gerrit and
-available if someone needs to build on your work before it is
-submitted to the official repository.
-
-Another factor that contributes to the desire for longer cool-off
-times (the time a patch lies around without any further changes or
-comments), it means that the chances of quality regression on the
-master branch will be much reduced.
-
-If a contributor pushes a patch, it is considered good form if another
-contributor actually approves and submits that patch.
-
-It should be noted that a negative review in Gerrit ("-1" or "-2") may (but does
-not have to) be disregarded if all conditions listed below are met:
-
-- the concerns raised in the review have been addressed (or explained),
-- reviewer does not re-examine the change in a month,
-- reviewer does not answer e-mails for another month.
-
-@section browsing Browsing Patches
-All OpenOCD patches can be reviewed <a href="http://openocd.zylin.com/">here</a>.
-
-@section reviewing Reviewing Patches
-From the main <a href="http://openocd.zylin.com/#/q/status:open,n,z">Review
-page</a> select the patch you want to review and click on that patch. On the
-appearing page select the download method (top right). Apply the
-patch. After building and testing you can leave a note with the "Reply"
-button and mark the patch with -1, 0 and +1.
-*/
-/** @file
-This file contains the @ref patchguide page.
-*/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/Makefile.am
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--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/Makefile.am
+++ /dev/null
@@ -1,112 +0,0 @@
-# not a GNU package. You can remove this line, if
-# have all needed files, that a GNU package needs
-AUTOMAKE_OPTIONS = gnu 1.6
-
-# make sure we pass the correct jimtcl flags to distcheck
-DISTCHECK_CONFIGURE_FLAGS = --disable-install-jim
-
-nobase_dist_pkgdata_DATA = \
- contrib/libdcc/dcc_stdio.c \
- contrib/libdcc/dcc_stdio.h \
- contrib/libdcc/example.c \
- contrib/libdcc/README \
- contrib/99-openocd.rules
-
-if INTERNAL_JIMTCL
-SUBDIRS = jimtcl
-else
-SUBDIRS =
-endif
-
-SUBDIRS += src doc
-
-EXTRA_DIST = \
- BUGS \
- HACKING \
- NEWTAPS \
- README.Windows \
- README.OSX \
- $(wildcard $(srcdir)/NEWS*) \
- Doxyfile.in \
- tools/logger.pl \
- tools/rlink_make_speed_table \
- tools/st7_dtc_as \
- contrib
-
-libtool: $(LIBTOOL_DEPS)
- $(SHELL) ./config.status --recheck
-
-docs: pdf html doxygen
-
-Doxyfile: $(srcdir)/Doxyfile.in
- @echo "Creating $@ from $<..."
- @( \
- echo "### @@@ -= DO NOT EDIT THIS FILE =- @@@ ###" && \
- echo "### @@@ Make changes to Doxyfile.in @@@ ###" && \
- sed -e 's,@srcdir\@,$(srcdir),' \
- -e 's,@builddir\@,$(builddir),' \
- -e 's,@doxygen_as_html\@,$(doxygen_as_html),' \
- -e 's,@doxygen_as_pdf\@,$(doxygen_as_pdf),' $< \
- ) > $@
-
-THE_MANUAL = doxygen/latex/refman.pdf
-
-doxygen::
- $(MAKE) Doxyfile
- doxygen Doxyfile 2>&1 | perl $(srcdir)/tools/logger.pl > doxygen.log
- @if [ -f doxygen/latex/refman.tex ]; then \
- echo "Creating $(THE_MANUAL)..."; \
- $(MAKE) $(THE_MANUAL); \
- else \
- echo "Skipping Doxygen PDF..."; \
- fi
-
-$(THE_MANUAL): %.pdf: %.tex
- -cd $$(dirname $*) && pdflatex $$(basename $*)
- -cd $$(dirname $*) && pdflatex $$(basename $*)
-
-TCL_PATH = tcl
-# command to find paths of script files, relative to TCL_PATH
-TCL_FILES = find $(srcdir)/$(TCL_PATH) -name '*.cfg' -o -name '*.tcl' -o -name '*.txt' | \
- sed -e 's,^$(srcdir)/$(TCL_PATH),,'
-
-dist-hook:
- if test -d $(srcdir)/.git -a \( ! -e $(distdir)/ChangeLog -o -w $(distdir)/ChangeLog \) ; then \
- git --git-dir $(srcdir)/.git log | $(srcdir)/tools/git2cl/git2cl > $(distdir)/ChangeLog ; \
- fi
- for i in $$($(TCL_FILES)); do \
- j="$(distdir)/$(TCL_PATH)/$$i" && \
- mkdir -p "$$(dirname $$j)" && \
- $(INSTALL_DATA) $(srcdir)/$(TCL_PATH)/$$i $$j; \
- done
-
-install-data-hook:
- for i in $$($(TCL_FILES)); do \
- j="$(DESTDIR)$(pkgdatadir)/scripts/$$i" && \
- mkdir -p "$$(dirname $$j)" && \
- $(INSTALL_DATA) $(srcdir)/$(TCL_PATH)/$$i $$j; \
- done
-
-uninstall-hook:
- rm -rf $(DESTDIR)$(pkgdatadir)/scripts
-
-distclean-local:
- rm -rf Doxyfile doxygen
- rm -f $(srcdir)/jimtcl/configure.gnu
-
-DISTCLEANFILES = doxygen.log
-
-MAINTAINERCLEANFILES = \
- $(srcdir)/INSTALL \
- $(srcdir)/configure \
- $(srcdir)/Makefile.in \
- $(srcdir)/depcomp \
- $(srcdir)/config.guess \
- $(srcdir)/config.sub \
- $(srcdir)/config.h.in \
- $(srcdir)/config.h.in~ \
- $(srcdir)/compile \
- $(srcdir)/ltmain.sh \
- $(srcdir)/missing \
- $(srcdir)/aclocal.m4 \
- $(srcdir)/install-sh
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS
deleted file mode 100755
index 9df1650..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS
+++ /dev/null
@@ -1,33 +0,0 @@
-This file includes highlights of the changes made in the OpenOCD
-source archive release.
-
-JTAG Layer:
-
-Boundary Scan:
-
-Target Layer:
-
-Flash Layer:
-
-Board, Target, and Interface Configuration Scripts:
-
-Server Layer:
-
-Documentation:
-
-Build and Release:
-
-
-This release also contains a number of other important functional and
-cosmetic bugfixes. For more details about what has changed since the
-last release, see the git repository history:
-
-http://sourceforge.net/p/openocd/code/ci/v0.x.0/log/?path=
-
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.2.0
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.2.0 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.2.0
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--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.2.0
+++ /dev/null
@@ -1,80 +0,0 @@
-The OpenOCD 0.2.0 source archive release includes numerous improvements
-that were made since the initial 0.1.0 source archive release. Many
-contributors helped make this release a great success, and the community
-of developers and maintainers look forward to any response.
-
-In addition to the list of changes below, countless bug fixing and
-cleaning was performed across the tree. Various TCL command parameters
-must past stricter value checks, and many more error conditions have
-been handled correctly. These efforts helped to make the 0.2.0 release
-more stable and robust, though some changes may expose latent bugs in
-your existing configuration scripts.
-
-This release does not maintain backward compatibility in all respects,
-so some target or configuration scripts may need to be updated. In some
-cases, you may also see warnings; resolve those, because they indicate
-commands that will be removed in the future.
-
-The following areas of OpenOCD functionality changed in this release:
-
-JTAG Layer:
-- Improves modularity: core, TCL, driver commands, and interface have
- been separated, encapsulated, and documented for developers. Mostly.
-- Improves JTAG TAP transition tables:
- * Makes TAP paths variable length, rather than being fixed at 7 steps.
- * Fixes problems with some targets that did not like longer paths.
-- Improves JTAG driver/minidriver modularity and encapsulation.
-- New drivers:
- * Adds stub minidriver for developing new embedded JTAG interfaces.
-- Improves drivers:
- * ft2232+ftd2xx:
- + Adds initial high-speed device support: --enable-ftd2xx-highspeed
- + Supports more types of FTDI-based devices.
- * jlink:
- + Works with more versions of the firmware (v3 and newer)
- + Supports dynamically detects device capabilities and limits
- * vsllink:
- + Supports very long scan chains
- * amtjtagaccel:
- + Fixes broken ID code detection problems.
-
-Target Layer:
-- New devices: AVR, FA526
-- Improved support: ARM ADI, ARM11, MIPS
-- Numerous other bug fixes and improvements
-
-Flash Layer:
-- Improved drivers: mflash
-- New drivers: AT91SAM3, AVR, Davinci NAND
-
-Board, Interface, and Target Configuration Scripts:
-- Many new and improved targets and boards are now available.
-- Better separation of "board" and "target" configuration
-- Moved all TCL files to top-level "tcl" directory in the source tree
-- Installation moved from '$pkglibdir/' to '$pkgdatadir/scripts/'.
-- Site-specific files should be installed under '$pkgdatadir/site/';
- files that exist this tree will be used in preference to default
- distribution configurations in '$pkgdatadir/scripts/'.
-
-Documentation:
-- Updated User Guide: http://openocd.berlios.de/doc/html/index.html
- * Partially re-written and re-organized.
- * Standardized presentation for all commands.
- * Covers many drivers and commands that were previously omitted.
- * New index for commands and drivers.
-- Added Developer Manual: http://openocd.berlios.de/doc/doxygen/index.html
- * Now includes architecture, technical primers, style guides, and more.
- * Available in-tree and on-line.
-
-Build and Release:
-- Increased configuration and compilation warning coverage.
- * Use --disable-werror to work around build errors caused by warnings.
-- Use libtool to produce helper libraries as a step toward "libopenocd".
-- New processes and scripting to facilitate future source releases.
-
-For more details about what has changed since 0.1.0, see the ChangeLog
-associated with this release.
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES files in the source archive).
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.3.0
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.3.0 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.3.0
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--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.3.0
+++ /dev/null
@@ -1,82 +0,0 @@
-This file should include highlights of the changes made in the
-OpenOCD openocd-0.3.0 source archive release. See the repository
-history for details about what changed, including bugfixes and
-other issues not mentioned here.
-
-JTAG Layer:
- FT2232H (high speed USB) support doesn't need separate configuration
- New FT2232H JTAG adapters: Amontec, Olimex, Signalyzer
- New reset_config options for SRST gating the JTAG clock (or not)
- TAP declaration no longer requires ircapture and mask attributes
- Scan chain setup should be more robust, with better diagnostics
- New TAP events:
- "post-reset" for TAP-invariant setup code (TAPs not usable yet)
- "setup" for use once TAPs are addressable (e.g. with ICEpick)
- Overridable Tcl "init_reset" and "jtag_init" procedures
- Simple "autoprobe" mechanism to help simplify server setup
-
-Boundary Scan:
- SVF bugfixes ... parsing fixes, better STATE switch conformance
- XSVF bugfixes ... be more correct, handle Xilinx tool output
-
-Target Layer:
- Warn on use of obsolete numeric target IDs
- New commands for use with Cortex-M3 processors:
- "cortex_m3 disassemble" ... Thumb2 disassembly (UAL format)
- "cortex_m3 vector_catch" ... traps certain hardware faults
- without tying up breakpoint resources
- If you're willing to help debug it
- VERY EARLY Cortex-A8 and ARMv7A support
- Updated BeagleBoard.org hardware support
- you may need to explicitly "reset" after connect-to-Beagle
- New commands for use with XScale processors: "xscale vector_table"
- ARM
- bugfixes to single-stepping Thumb code
- ETM: unavailable registers are not listed
- ETB, ETM: report actual hardware status
- ARM9
- name change: "arm9 vector_catch" not "arm9tdmi vector_catch"
- ARM11
- single stepping support for i.MX31
- bugfix for missing "arm11" prefix on "arm11 memwrite ..."
- GDB support
- gdb_attach command is gone
-
-Flash Layer:
- The lpc2000 driver handles the new NXP LPC1700 (Cortex-M3) chips
- New drivers:
- lpc2900, for NXP LPC2900 chips (ARM968 based)
- mx3_nand, for imx31
- New "last" flag for NOR "flash erase_sector" and "flash protect"
- The "nand erase N" command now erases all of bank N
- Speed up davinci_nand by about 3x
-
-Board, Target, and Interface Configuration Scripts:
- Amontec JTAGkey2 support
- Cleanup and additions for the TI/Luminary Stellaris scripts
- LPC1768 target (and flash) support
- Keil MCB1700 eval board
- Samsung s3c2450
- Mini2440 board
- Numeric TAP and Target identifiers now trigger warnings
- PXA255 partially enumerates
-
-Documentation:
- Capture more debugging and setup advice
- Notes on target source code changes that may help debugging
-
-Build and Release:
- Repository moved from SVN at Berlios to GIT at SourceForge
- Clean builds on (32-bit) Cygwin
- Clean builds on 64-bit MinGW
-
-For more details about what has changed since the last release,
-see the git repository history. With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES files in the source archive).
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.4.0
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.4.0 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.4.0
deleted file mode 100755
index cbd5526..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.4.0
+++ /dev/null
@@ -1,98 +0,0 @@
-This file includes highlights of the changes made in the
-OpenOCD 0.4.0 source archive release. See the repository
-history for details about what changed, including bugfixes
-and other issues not mentioned here.
-
-JTAG Layer:
- Support KT-Link JTAG adapter.
- Support USB-JTAG, Altera USB-Blaster and compatibles.
-
-Boundary Scan:
-
-Target Layer:
- General
- - Removed commands which have been obsolete for at least
- a year (from both documentation and, sometimes, code).
- - new "reset-assert" event, for systems without SRST
- ARM
- - supports "reset-assert" event (except on Cortex-M3)
- - renamed "armv4_5" command prefix as "arm"
- - recognize TrustZone "Secure Monitor" mode
- - "arm regs" command output changed
- - register names use "sp" not "r13"
- - add top-level "mcr" and "mrc" commands, replacing
- various core-specific operations
- - basic semihosting support (ARM7/ARM9 only, for now)
- ARM11
- - Should act much more like other ARM cores:
- * Preliminary ETM and ETB hookup
- * accelerated "flash erase_check"
- * accelerated GDB memory checksum
- * support "arm regs" command
- * can access all core modes and registers
- * watchpoint support
- - Shares some core debug code with Cortex-A8
- Cortex-A8
- - Should act much more like other ARM cores:
- * support "arm regs" command
- * can access all core modes and registers
- * watchpoint support
- - Shares some core debug code with ARM11
- Cortex-M3
- - Exposed DWT registers like cycle counter
- - vector_catch settings not clobbered by resets
- - no longer interferes with firmware's fault handling
- ETM, ETB
- - "trigger_percent" command moved ETM --> ETB
- - "etm trigger_debug" command added
- MIPS
- - use fastdata writes
- Freescale DSP563xx cores (partial support)
-
-Flash Layer:
- 'flash bank' and 'nand device' take <bank_name> as first argument.
- With this, flash/NAND commands allow referencing banks by name:
- - <bank_name>: reference the bank with its defined name
- - <driver_name>[.N]: reference the driver's Nth bank
- New 'nand verify' command to check bank against an image file.
- The "flash erase_address" command now rejects partial sectors;
- previously it would silently erase extra data. If you
- want to erase the rest of the first and/or last sectors
- instead of failing, you must pass an explicit "pad" flag.
- New at91sam9 NAND controller driver.
- New s3c64xx NAND controller driver.
-
-Board, Target, and Interface Configuration Scripts:
- ARM9
- - ETM and ETB hookup for iMX2* targets
- Add $HOME/.openocd to the search path.
- Handle Rev C of LM3S811 eval boards.
- - use "luminary-lm3s811.cfg" for older boards
- - use "luminary.cfg" for RevC and newer
-
-Core Jim/TCL Scripting:
- New 'usage' command to provide terse command help.
- Improved command 'help' command output (sorted and indented).
- Improved command handling:
- - Most boolean settings now accept any of the following:
- on/off, enable/disable, true/false, yes/no, 1/0
- - More error checking and reporting.
-
-Documentation:
- New built-in command development documentation and primer.
-
-Build and Release:
- Use --enable-doxygen-pdf to build PDF developer documentation.
- Consider upgrading to libftdi 0.17 if you use that library; it
- includes bugfixes which improve FT2232H support.
-
-For more details about what has changed since the last release,
-see the git repository history. With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.5.0
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.5.0 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.5.0
deleted file mode 100755
index add6c1e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.5.0
+++ /dev/null
@@ -1,74 +0,0 @@
-This file includes highlights of the changes made in the
-OpenOCD 0.5.0 source archive release. See the repository
-history for details about what changed, including bugfixes
-and other issues not mentioned here.
-
-JTAG Layer:
- New driver for "Bus Pirate"
- Rename various commands so they're not JTAG-specific
- There are migration procedures for most of these, but you should
- convert your scripts to the new names, since those procedures
- will not be around forever.
- jtag jinterface ... is now adapter_name
- jtag_khz ... is now adapter_khz
- jtag_nsrst_delay ... is now adapter_nsrst_delay
- jtag_nsrst_assert_width ... is now adapter_nsrst_assert_width
- Support Voipac VPACLink JTAG Adapter.
-
-Boundary Scan:
-
-Transport framework core ... supporting future work for SWD, SPI, and other
-non-JTAG ways to debug targets or program flash.
-
-Target Layer:
- ARM:
- - basic semihosting support for ARMv7M.
- - renamed "armv7m" command prefix as "arm"
- MIPS:
- - "ejtag_srst" variant removed. The same functionality is
- obtained by using "reset_config none".
- - added PIC32MX software reset support, this means srst is not
- required to be connected anymore.
- OTHER:
- - preliminary AVR32 AP7000 support.
-
-Flash Layer:
- New "stellaris recover" command, implements the procedure
- to recover locked devices (restoring non-volatile
- state to the factory defaults, including erasing
- the flash and its protection bits, and possibly
- re-enabling hardware debugging).
- PIC32MX now uses algorithm for flash programming, this
- has increased the performance by approx 96%.
- New 'pic32mx unlock' cmd to remove readout protection.
- New STM32 Value Line Support.
- New 'virtual' flash driver, used to associate other addresses
- with a flash bank. See pic32mx.cfg for usage.
- New iMX27 NAND flash controller driver.
-
-Board, Target, and Interface Configuration Scripts:
- Support IAR LPC1768 kickstart board (by Olimex)
- Support Voipac PXA270/PXA270M module.
- New $PARPORTADDR tcl variable used to change default
- parallel port address used.
- Remove lm3s811.cfg; use "stellaris.cfg" instead
-
-Core Jim/TCL Scripting:
- New "add_script_search_dir" command, behaviour is the same
- as the "-s" cmd line option.
-
-Documentation:
-
-Build and Release:
-
-For more details about what has changed since the last release,
-see the git repository history. With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.6.0
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.6.0 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.6.0
deleted file mode 100755
index 0acd242..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.6.0
+++ /dev/null
@@ -1,54 +0,0 @@
-This file includes highlights of the changes made in the
-OpenOCD source archive release. See the
-repository history for details about what changed, including
-bugfixes and other issues not mentioned here.
-
-JTAG Layer:
- New STLINK V1/V2 JTAG/SWD adapter support.
- New OSJTAG adapter support.
- New Tincantools Flyswatter2 support.
- Improved ULINK driver.
- Improved RLINK driver.
- Support for adapters based on FT232H chips.
- New experimental driver for FTDI based adapters, using libusb-1.0 in asynchronous mode.
-
-Boundary Scan:
-
-Target Layer:
- New Cortex-M0 support.
- New Cortex-M4 support.
- Improved Working area algorithm.
- New RTOS support. Currently linux, FreeRTOS, ThreadX and eCos.
- Connecting under reset to Cortex-Mx and MIPS chips.
-
-Flash Layer:
- New SST39WF1601 support.
- New EN29LV800BB support.
- New async algorithm support for selected targets, stm32, stellaris and pic32.
- New Atmel SAM3S, SAM3N support.
- New ST STM32L support.
- New Microchip PIC32MX1xx/2xx support.
- New Freescale Kinetis K40 support.
-
-Board, Target, and Interface Configuration Scripts:
- Support Dangerous Prototypes Bus Blaster.
- Support ST SPEAr Family.
- Support Gumstix Verdex boards.
- Support TI Beaglebone.
-
-Documentation:
- Improved HACKING info for submitting patches.
- Fixed numerous broken links.
-
-Build and Release:
-
-For more details about what has changed since the last release,
-see the git repository history. With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.7.0
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.7.0 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.7.0
deleted file mode 100755
index 47a8fa6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.7.0
+++ /dev/null
@@ -1,43 +0,0 @@
-This file includes highlights of the changes made in the
-OpenOCD source archive release. See the
-repository history for details about what changed, including
-bugfixes and other issues not mentioned here.
-
-JTAG Layer:
- New TI ICDI adapter support.
- Support Latest OSBDM firmware.
- Improved MIPS EJTAG Support.
-
-Boundary Scan:
-
-Target Layer:
- New ARMv7R and Cortex-R4 support.
- Added ChibiOS/RT support.
-
-Flash Layer:
- New NXP LPC1850 support.
- New NXP LPC4300 support.
- New NXP SPIFI support.
- New Energy Micro EFM32 support.
- New ST STM32W support.
- New ST STM32f2 write protection and lock/unlock support.
- Ability to override STM32 flash bank size.
-
-Board, Target, and Interface Configuration Scripts:
- Support Freescale i.MX6 series targets.
-
-Documentation:
- New MIPS debugging info.
-
-Build and Release:
-
-For more details about what has changed since the last release,
-see the git repository history. With gitweb, you can browse that
-in various levels of detail.
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.8.0
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.8.0 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.8.0
deleted file mode 100755
index 33b3af4..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.8.0
+++ /dev/null
@@ -1,111 +0,0 @@
-This file includes highlights of the changes made in the OpenOCD
-source archive release.
-
-JTAG Layer:
- * New CMSIS-DAP driver
- * Andes AICE debug adapter support
- * New OpenJTAG driver
- * New BCM2835 (RaspberryPi) driver
- * JTAG VPI client driver (for OpenRISC Reference Platform SoC)
- * Xilinx BSCAN_* for OpenRISC support
- * ST-LINKv2-1 support
- * ST-LINKv2 SWO tracing support (UART emulation)
- * JLink-OB (onboard) support
- * Altera USB Blaster driver rewrite, initial Blaster II
- support
- * ULINK driver ported to libusb-1.0, OpenULINK build fixes
- * Support up to 64 bit IR lengths
- * SVF playback (FPGA programming) fixes
- * "ftdi" interface driver got extensive testing and is now
- recommended over the old ft2232 implementation
-
-Boundary Scan:
-
-Target Layer:
- * New target: Andes nds32
- * New target: OpenRISC OR1K
- * New target: Intel Quark X10xx
- * MIPS EJTAG 1.5/2.0 support
- * MIPS speed improvements
- * Cortex-M, Cortex-A (MEM-AP, APB-AP) targets working with BE
- hosts now
- * XScale vector_catch support, reset fixes
- * dsp563xx ad-hoc breakpoint/watchpoint support
- * RTOS support for embKernel
- * Target profiling improvements
- * Memory access functions testbench
-
-Flash Layer:
- * STM32 family sync with reference manuals, other bugfixes
- * STM32F401, STM32F07x support
- * Atmel SAM4L, SAMG5x support
- * at91sam3sd8{a,b}, at91sam3s8{a,b,c}, at91sam4s,
- at91sam3n0{a,b,0a,0b} support, bugfixes
- * Atmel SAMD support
- * Milandr 1986\u0412\u0415* support
- * Kinetis KL, K21 support
- * Nuvoton NuMicro MINI5{1,2,4} support
- * Nuvoton NUC910 series support
- * NXP LPC43xx, LPC2000 fixes
- * NXP LPC800, LPC810 support
- * More ATmega parts supported
- * Fujitsu MB9Ax family support
- * EFM32 Wonder Gecko family support
- * Nordic nRF51 support
-
-Board, Target, and Interface Configuration Scripts:
- * STM32W108xx generic target config
- * STM32F429 discovery board config
- * STM32 Nucleo boards configs
- * DENX M53EVK board config
- * Altera Cyclone V SoC, SoCkit config
- * New TI Launchpads board configs
- * TI am43xx devices, AM437x GP EVM, AM438x ePOS EVM board
- configs
- * Marvell Armada 370 family initial support
- * TI TMDX570LS31USB (TMS570, Cortex-R4) support scripts
- * Freescale FRDM-KL25Z, KL46Z board configs
- * Digilent Zedboard config
- * Asus RT-N16, Linksys WRT54GL, BT HomeHub board configs
- * Atmel Xplained initial support
- * Broadcom bcm28155_ap board config
- * TUMPA, TUMPA Lite interface configs
- * Digilent JTAG-SMT2 interface config
- * New RAM testing functions
- * Easy-to-use firmware recovery helpers targetting ordinary
- users with common equipment
-
-Server Layer:
- * Auto-generation of GDB target description for ARMv7-M,
- ARM4, nds32, OR1K, Quark
- * GDB File-I/O Remote Protocol extension support
- * Default GDB flashing events handlers to initialise and reset
- the target automatically when "load" is used
-
-Documentation:
- * Extensive README* changes
- * The official User's Guide was proofread
- * Example cross-build script
- * RTOS documentation improvements
- * Tcl RPC documentation and examples added
-
-Build and Release:
- * *BSD, OS X, clang, ARM, windows build fixes
- * New pkg-config support changes the way libusb (and other
- dependencies) are handled. Many adapter drivers are now
- selected automatically during the configure stage.
-
-
-This release also contains a number of other important functional and
-cosmetic bugfixes. For more details about what has changed since the
-last release, see the git repository history:
-
-http://sourceforge.net/p/openocd/code/ci/v0.8.0/log/?path=
-
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.9.0
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.9.0 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.9.0
deleted file mode 100755
index 77ae4b0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWS-0.9.0
+++ /dev/null
@@ -1,110 +0,0 @@
-This file includes highlights of the changes made in the OpenOCD
-source archive release.
-
-JTAG Layer:
- * SWD support with FTDI, Versaloon, J-Link, sysfsgpio
- * CMSIS-DAP massive speed and stability improvements
- * Versaloon driver ported to libusb-1.0
- * STLink can reestablish communication with a target that was
- disconnected or rebooted
- * STLink FAULT and WAIT SWD handling improved
- * New hla_serial command to distinguish between several HLA
- adapters attached to a single machine
- * Serial number support for CMSIS-DAP and J-Link adapters
- * Support for more J-Link adapters
- * TAP autoprobing improvements
- * Big speedup for SVF playback with USB Blaster
-
-Boundary Scan:
-
-Target Layer:
- * Stability improvements for targets that get disconnected or
- rebooted during a debug session
- * MIPS speed and reliability improvements
- * MIPS 1.5/2.0 fixes
- * ARMv7-R improvements
- * Cortex-A improvements, A7, A15 MPCores support
- * FPU support for ARMv7-M (Cortex-M4F)
- * TPIU/ITM support (including SWO/SWV tracing), can be
- captured with external tools or STLink
- * JTAG Serial Port (Advanced Debug System softcore) support
- * Profiling support for OpenRISC
- * ChibiOS/RT 3.0 support (with and without FPU)
- * FreeRTOS current versions support
- * Freescale MQX RTOS support
- * GDB target description support for MIPS
- * The last created target is auto-selected as the current
-
-Flash Layer:
- * nRF51 async loader to improve flashing performance and stability
- * Cypress PSoC 41xx/42xx and CCG1 families flash driver
- * Silabs SiM3 family flash driver
- * Marvell Wireless Microcontroller SPI flash driver
- * Kinetis mass erase (part unsecuring) implemented
- * lpcspifi stability fixes
- * STM32 family sync with reference manuals, L0 support, bugfixes
- * LPC2000 driver automatically determines part and flash size
- * NXP LPC11(x)xx, LPC13xx, LPC15xx, LPC8xx, LPC5410x, LPC407x support
- * Atmel SAMD, SAMR, SAML21 devices support
- * Atmel SAM4E16 support
- * ZeroGecko family support
- * TI Tiva C Blizzard and Snowflake families support
- * Nuvoton NuMicro M051 support
- * EZR32 support in EFM32 driver
-
-Board, Target, and Interface Configuration Scripts:
- * Normal target configs can work with HLA (STLink, ICDI) adapters
- * STM32 discovery and Nucleo boards configs
- * Gumstix AeroCore board config
- * General Plus GP326XXXA target config
- * Micrel KS869x target config
- * ASUS RT-N66U board config
- * Atmel SAM4E-EK board config
- * Atmel AT91SAM4L proper reset handling implemented
- * TI OMAP/AM 3505, 3517 target configs
- * nRF51822-mKIT board config
- * RC Module \u041a1879\u0425\u04111\u042f target config
- * TI TMDX570LS20SUSB board config
- * TI TMS570 USB Kit board config
- * TI CC2538, CC26xx target configs
- * TI AM437x major config improvements, DDR support
- * TI AM437X IDK board config
- * TI SimpleLink Wi-Fi CC3200 LaunchPad configs
- * Silicon Labs EM357, EM358 target configs
- * Infineon XMC1000, XMC4000 family targets and boards configs
- * Atheros AR9331 target config
- * TP-LINK TL-MR3020 board config
- * Alphascale asm9260t target and eval kit configs
- * Olimex SAM7-LA2 (AT91SAM7A2) board config
- * EFM32 Gecko boards configs
- * Spansion FM4 target and SK-FM4-176L-S6E2CC board configs
- * LPC1xxx target configs were restructured
- * IoT-LAB debug adapter config
- * DP BusBlaster KT-Link compatible config
-
-Server Layer:
- * Polling period can be configured
- * "shutdown" command has an immediate effect
- * The "program" command doesn't lead to a shutdown by
- default, use optional "exit" parameter for the old behaviour
- * Proper OS signal handling was implemented
- * Async target notifications for the Tcl RPC
-
-Documentation:
-
-Build and Release:
-
-
-This release also contains a number of other important functional and
-cosmetic bugfixes. For more details about what has changed since the
-last release, see the git repository history:
-
-http://sourceforge.net/p/openocd/code/ci/v0.9.0/log/?path=
-
-
-For older NEWS, see the NEWS files associated with each release
-(i.e. NEWS-<version>).
-
-For more information about contributing test reports, bug fixes, or new
-features and device support, please read the new Developer Manual (or
-the BUGS and PATCHES.txt files in the source archive).
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/NEWTAPS
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@@ -1,145 +0,0 @@
-Reporting Unknown JTAG TAP IDS
-------------------------------
-
-If OpenOCD reports an UNKNOWN or Unexpected Tap ID please report it to
-the development mailing list - However - keep reading.
-
-openocd-devel@lists.sourceforge.net.
-
-========================================
-
-About "UNEXPECTED" tap ids.
-
- Before reporting an "UNEXPECTED TAP ID" - take a closer look.
- Perhaps you have your OpenOCD configured the wrong way, maybe you
- have the tap configured the wrong way? Or something else is wrong.
- (Remember: OpenOCD does not stop if the tap is not present)
-
- This "tap id check" is there for a purpose.
- The goal is to help get the *right* configuration.
-
-The idea is this:
-
- Every JTAG tap is suppose to have "a unique 32bit tap id" number.
- They are suppose to be "sort of unique" but they are not. There are
- no guarantees.
-
-Version Number Changes:
-
- Sometimes, the tap ID only differs by VERSION number. If so - it's
- not a big deal. Please do report this information. We'd like to
- know about it.
-
- For example
-
-Error: ERROR: Tap: s3c4510.cpu - Expected id: 0x3f0f0f0f, Got: 0x1f0f0f0f
-Error: ERROR: expected: mfg: 0x787, part: 0xf0f0, ver: 0x3
-Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x1
-
-========================================
-
-Updating the Tap ID number your self
-
- Why do this? You just want the warning to go away. And don't want
- to update your version/instance of OpenOCD.
-
- On simple systems, to fix this problem, in your "openocd.cfg" file,
- override the tap id. Depending on the tap, add one of these 3
- commands:
-
- set CPUTAPID newvalue
- or set BSTAPID newvalue
- or set FLASHTAPID newvalue
- or set ETMTAPID newvalue
-
- Where "newvalue" is the new value you are seeing.
-
- On complex systems, (with many taps and chips) you probably have a
- custom configuration file. Its is more complicated, you're going to
- have to read through the configuration files
-
-========================================
-
-What to send:
-
-Cut & paste the output of OpenOCD that pointed you at this file.
-
-Please include the VERSION number of OpenOCD you are using.
-
-And please include the information below.
-
-========================================
-
-A) The JTAG TAP ID code.
-
-This is always a 32bit hex number.
-
-Examples:
- 0x1f0f0f0f - is an old ARM7TDMI
- 0x3f0f0f0f - is a newer ARM7TDMI
- 0x3ba00477 - is an ARM cortex M3
-
-Some chips have multiple JTAG taps - be sure to list
-each one individually - ORDER is important!
-
-========================================
-B) The maker of the part
-
-Examples:
- Xilinx, Atmel, ST Micro Systems, Freescale
-
-========================================
-C) The family of parts it belongs to
-
-Examples:
- "NXP LPC Series"
- "Atmel SAM7 Series"
-
-========================================
-
-D) The actual part number on the package
-
- For example: "S3C45101x01"
-
-========================================
-
-E) What type of board it is.
-
-ie: a "commercial off the self eval board" that one can purchase (as
-opposed to your private internal custom board)
-
-For example: ST Micro systems has Eval boards, so does Analog Devices
-
-Or - if it is inside something "hackers like to hack" that information
-is helpful too.
-
-For example: A consumer GPS unit or a cellphone
-
-========================================
-
-(F) The maker of the board
- ie: Olimex, LogicPD, Freescale(eval board)
-
-========================================
-
-(G) Identifying information on the board.
-
- Not good: "iar red ST eval board"
-
- Really good: "IAR STR912-SK evaluation board"
-
-========================================
-
-(H) Are there other interesting (JTAG) chips on the board?
-
- ie: An FPGA or CPLD ...
-
-========================================
-
-(I) What target config files need updating?
-
- In fact it's best if you submit a patch with those
- updates. Most of the other information listed here
- is just to help create a good patch.
-
-========================================
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/README
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-Welcome to OpenOCD!
-===================
-
-OpenOCD provides on-chip programming and debugging support with a
-layered architecture of JTAG interface and TAP support including:
-
-- (X)SVF playback to faciliate automated boundary scan and FPGA/CPLD
- programming;
-- debug target support (e.g. ARM, MIPS): single-stepping,
- breakpoints/watchpoints, gprof profiling, etc;
-- flash chip drivers (e.g. CFI, NAND, internal flash);
-- embedded TCL interpreter for easy scripting.
-
-Several network interfaces are available for interacting with OpenOCD:
-telnet, TCL, and GDB. The GDB server enables OpenOCD to function as a
-"remote target" for source-level debugging of embedded systems using
-the GNU GDB program (and the others who talk GDB protocol, e.g. IDA
-Pro).
-
-This README file contains an overview of the following topics:
-
-- quickstart instructions,
-- how to find and build more OpenOCD documentation,
-- list of the supported hardware,
-- the installation and build process,
-- packaging tips.
-
-
-============================
-Quickstart for the impatient
-============================
-
-If you have a popular board then just start OpenOCD with its config,
-e.g.:
-
- openocd -f board/stm32f4discovery.cfg
-
-If you are connecting a particular adapter with some specific target,
-you need to source both the jtag interface and the target configs,
-e.g.:
-
- openocd -f interface/ftdi/jtagkey2.cfg -c "transport select jtag" \
- -f target/ti_calypso.cfg
-
- openocd -f interface/stlink-v2-1.cfg -c "transport select hla_swd" \
- -f target/stm32l0.cfg
-
-NB: when using an FTDI-based adapter you should prefer configs in the
-ftdi directory; the old configs for the ft2232 are deprecated.
-
-After OpenOCD startup, connect GDB with
-
- (gdb) target extended-remote localhost:3333
-
-
-=====================
-OpenOCD Documentation
-=====================
-
-In addition to the in-tree documentation, the latest manuals may be
-viewed online at the following URLs:
-
- OpenOCD User's Guide:
- http://openocd.org/doc/html/index.html
-
- OpenOCD Developer's Manual:
- http://openocd.org/doc/doxygen/html/index.html
-
-These reflect the latest development versions, so the following section
-introduces how to build the complete documentation from the package.
-
-For more information, refer to these documents or contact the developers
-by subscribing to the OpenOCD developer mailing list:
-
- openocd-devel@lists.sourceforge.net
-
-Building the OpenOCD Documentation
-----------------------------------
-
-By default the OpenOCD build process prepares documentation in the
-"Info format" and installs it the standard way, so that "info openocd"
-can access it.
-
-Additionally, the OpenOCD User's Guide can be produced in the
-following different formats:
-
- # If PDFVIEWER is set, this creates and views the PDF User Guide.
- make pdf && ${PDFVIEWER} doc/openocd.pdf
-
- # If HTMLVIEWER is set, this creates and views the HTML User Guide.
- make html && ${HTMLVIEWER} doc/openocd.html/index.html
-
-The OpenOCD Developer Manual contains information about the internal
-architecture and other details about the code:
-
- # NB! make sure doxygen is installed, type doxygen --version
- make doxygen && ${HTMLVIEWER} doxygen/index.html
-
-
-==================
-Supported hardware
-==================
-
-JTAG adapters
--------------
-
-AICE, ARM-JTAG-EW, ARM-USB-OCD, ARM-USB-TINY, AT91RM9200, axm0432,
-BCM2835, Bus Blaster, Buspirate, Chameleon, CMSIS-DAP, Cortino, DENX,
-Digilent JTAG-SMT2, DLC 5, DLP-USB1232H, embedded projects, eStick,
-FlashLINK, FlossJTAG, Flyswatter, Flyswatter2, Gateworks, Hoegl, ICDI,
-ICEBear, J-Link, JTAG VPI, JTAGkey, JTAGkey2, JTAG-lock-pick, KT-Link,
-Lisa/L, LPC1768-Stick, MiniModule, NGX, NXHX, OOCDLink, Opendous,
-OpenJTAG, Openmoko, OpenRD, OSBDM, Presto, Redbee, RLink, SheevaPlug
-devkit, Stellaris evkits, ST-LINK (SWO tracing supported),
-STM32-PerformanceStick, STR9-comStick, sysfsgpio, TUMPA, Turtelizer,
-ULINK, USB-A9260, USB-Blaster, USB-JTAG, USBprog, VPACLink, VSLLink,
-Wiggler, XDS100v2, Xverve.
-
-Debug targets
--------------
-
-ARM11, ARM7, ARM9, AVR32, Cortex-A, Cortex-R, Cortex-M,
-Feroceon/Dragonite, DSP563xx, DSP5680xx, FA526, MIPS EJTAG, NDS32,
-XScale, Intel Quark.
-
-Flash drivers
--------------
-
-ADUC702x, AT91SAM, AVR, CFI, DSP5680xx, EFM32, EM357, FM3, FM4, Kinetis,
-LPC8xx/LPC1xxx/LPC2xxx/LPC541xx, LPC2900, LPCSPIFI, Marvell QSPI,
-Milandr, NIIET, NuMicro, PIC32mx, PSoC4, SiM3x, Stellaris, STM32, STMSMI,
-STR7x, STR9x, nRF51; NAND controllers of AT91SAM9, LPC3180, LPC32xx,
-i.MX31, MXC, NUC910, Orion/Kirkwood, S3C24xx, S3C6400, XMC1xxx, XMC4xxx.
-
-
-==================
-Installing OpenOCD
-==================
-
-A Note to OpenOCD Users
------------------------
-
-If you would rather be working "with" OpenOCD rather than "on" it, your
-operating system or JTAG interface supplier may provide binaries for
-you in a convenient-enough package.
-
-Such packages may be more stable than git mainline, where
-bleeding-edge development takes place. These "Packagers" produce
-binary releases of OpenOCD after the developers produces new "release"
-versions of the source code. Previous versions of OpenOCD cannot be
-used to diagnose problems with the current release, so users are
-encouraged to keep in contact with their distribution package
-maintainers or interface vendors to ensure suitable upgrades appear
-regularly.
-
-Users of these binary versions of OpenOCD must contact their Packager to
-ask for support or newer versions of the binaries; the OpenOCD
-developers do not support packages directly.
-
-A Note to OpenOCD Packagers
----------------------------
-
-You are a PACKAGER of OpenOCD if you:
-
-- Sell dongles and include pre-built binaries;
-- Supply tools or IDEs (a development solution integrating OpenOCD);
-- Build packages (e.g. RPM or DEB files for a GNU/Linux distribution).
-
-As a PACKAGER, you will experience first reports of most issues.
-When you fix those problems for your users, your solution may help
-prevent hundreds (if not thousands) of other questions from other users.
-
-If something does not work for you, please work to inform the OpenOCD
-developers know how to improve the system or documentation to avoid
-future problems, and follow-up to help us ensure the issue will be fully
-resolved in our future releases.
-
-That said, the OpenOCD developers would also like you to follow a few
-suggestions:
-
-- Send patches, including config files, upstream, participate in the
- discussions;
-- Enable all the options OpenOCD supports, even those unrelated to your
- particular hardware;
-- Use "ftdi" interface adapter driver for the FTDI-based devices.
-
-As a PACKAGER, never link against the FTD2XX library, as the resulting
-binaries can't be legally distributed, due to the restrictions of the
-GPL.
-
-
-================
-Building OpenOCD
-================
-
-The INSTALL file contains generic instructions for running 'configure'
-and compiling the OpenOCD source code. That file is provided by
-default for all GNU autotools packages. If you are not familiar with
-the GNU autotools, then you should read those instructions first.
-
-The remainder of this document tries to provide some instructions for
-those looking for a quick-install.
-
-OpenOCD Dependencies
---------------------
-
-GCC or Clang is currently required to build OpenOCD. The developers
-have begun to enforce strict code warnings (-Wall, -Werror, -Wextra,
-and more) and use C99-specific features: inline functions, named
-initializers, mixing declarations with code, and other tricks. While
-it may be possible to use other compilers, they must be somewhat
-modern and could require extending support to conditionally remove
-GCC-specific extensions.
-
-You'll also need:
-
-- make
-- libtool
-- pkg-config >= 0.23 (or compatible)
-
-Additionally, for building from git:
-
-- autoconf >= 2.64
-- automake >= 1.9
-- texinfo
-
-USB-based adapters depend on libusb-1.0 and some older drivers require
-libusb-0.1 or libusb-compat-0.1. A compatible implementation, such as
-FreeBSD's, additionally needs the corresponding .pc files.
-
-USB-Blaster, ASIX Presto, OpenJTAG and ft2232 interface adapter
-drivers need either one of:
- - libftdi: http://www.intra2net.com/en/developer/libftdi/index.php
- - ftd2xx: http://www.ftdichip.com/Drivers/D2XX.htm (proprietary,
- GPL-incompatible)
-
-CMSIS-DAP support needs HIDAPI library.
-
-Permissions delegation
-----------------------
-
-Running OpenOCD with root/administrative permissions is strongly
-discouraged for security reasons.
-
-For USB devices on GNU/Linux you should use the contrib/99-openocd.rules
-file. It probably belongs somewhere in /etc/udev/rules.d, but
-consult your operating system documentation to be sure. Do not forget
-to add yourself to the "plugdev" group.
-
-For parallel port adapters on GNU/Linux and FreeBSD please change your
-"ppdev" (parport* or ppi*) device node permissions accordingly.
-
-For parport adapters on Windows you need to run install_giveio.bat
-(it's also possible to use "ioperm" with Cygwin instead) to give
-ordinary users permissions for accessing the "LPT" registers directly.
-
-Compiling OpenOCD
------------------
-
-To build OpenOCD, use the following sequence of commands:
-
- ./bootstrap (when building from the git repository)
- ./configure [options]
- make
- sudo make install
-
-The 'configure' step generates the Makefiles required to build
-OpenOCD, usually with one or more options provided to it. The first
-'make' step will build OpenOCD and place the final executable in
-'./src/'. The final (optional) step, ``make install'', places all of
-the files in the required location.
-
-To see the list of all the supported options, run
- ./configure --help
-
-Cross-compiling Options
------------------------
-
-Cross-compiling is supported the standard autotools way, you just need
-to specify the cross-compiling target triplet in the --host option,
-e.g. for cross-building for Windows 32-bit with MinGW on Debian:
-
- ./configure --host=i686-w64-mingw32 [options]
-
-To make pkg-config work nicely for cross-compiling, you might need an
-additional wrapper script as described at
-
- http://www.flameeyes.eu/autotools-mythbuster/pkgconfig/cross-compiling.html
-
-This is needed to tell pkg-config where to look for the target
-libraries that OpenOCD depends on. Alternatively, you can specify
-*_CFLAGS and *_LIBS environment variables directly, see "./configure
---help" for the details.
-
-Parallel Port Dongles
----------------------
-
-If you want to access the parallel port using the PPDEV interface you
-have to specify both --enable-parport AND --enable-parport-ppdev, since the
-the later option is an option to the parport driver.
-
-The same is true for the --enable-parport-giveio option, you have to
-use both the --enable-parport AND the --enable-parport-giveio option
-if you want to use giveio instead of ioperm parallel port access
-method.
-
-Using FTDI's FTD2XX
--------------------
-
-The (closed source) FTDICHIP.COM solution is faster than libftdi on
-Windows. That is the motivation for supporting it even though its
-licensing restricts it to non-redistributable OpenOCD binaries, and it
-is not available for all operating systems used with OpenOCD. You may,
-however, build such copies for personal use.
-
-The FTDICHIP drivers come as either a (win32) ZIP file, or a (Linux)
-TAR.GZ file. You must unpack them ``some where'' convenient. As of this
-writing FTDICHIP does not supply means to install these files "in an
-appropriate place."
-
-You should use the following ./configure options to make use of
-FTD2XX:
-
- --with-ftd2xx-win32-zipdir
- Where (CYGWIN/MINGW) the zip file from ftdichip.com
- was unpacked <default=search>
- --with-ftd2xx-linux-tardir
- Where (Linux/Unix) the tar file from ftdichip.com
- was unpacked <default=search>
- --with-ftd2xx-lib=(static|shared)
- Use static or shared ftd2xx libs (default is static)
-
-Remember, this library is binary-only, while OpenOCD is licenced
-according to GNU GPLv2 without any exceptions. That means that
-_distributing_ copies of OpenOCD built with the FTDI code would
-violate the OpenOCD licensing terms.
-
-Note that on Linux there is no good reason to use these FTDI binaries;
-they are no faster (on Linux) than libftdi, and cause licensing issues.
-
-
-==========================
-Obtaining OpenOCD From GIT
-==========================
-
-You can download the current GIT version with a GIT client of your
-choice from the main repository:
-
- git://git.code.sf.net/p/openocd/code
-
-You may prefer to use a mirror:
-
- http://repo.or.cz/r/openocd.git
- git://repo.or.cz/openocd.git
-
-Using the GIT command line client, you might use the following command
-to set up a local copy of the current repository (make sure there is no
-directory called "openocd" in the current directory):
-
- git clone git://git.code.sf.net/p/openocd/code openocd
-
-Then you can update that at your convenience using
-
- git pull
-
-There is also a gitweb interface, which you can use either to browse
-the repository or to download arbitrary snapshots using HTTP:
-
- http://repo.or.cz/w/openocd.git
-
-Snapshots are compressed tarballs of the source tree, about 1.3 MBytes
-each at this writing.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/README.OSX
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-Building OpenOCD for OSX
-------------------------
-
-There are a few prerequisites you will need first:
-
-- Xcode 5 (install from the AppStore)
-- Command Line Tools (install from Xcode 5 -> Preferences -> Downloads)
-- Gentoo Prefix (http://www.gentoo.org/proj/en/gentoo-alt/prefix/bootstrap.xml)
- or
-- Homebrew (http://mxcl.github.io/homebrew/)
- or
-- MacPorts (http://www.macports.org/install.php)
-
-
-With Gentoo Prefix you can build the release version or the latest
-devel version (-9999) the usual way described in the Gentoo
-documentation. Alternatively, install the prerequisites and build
-manually from the sources.
-
-
-With Homebrew you can either run:
- brew install [--HEAD] openocd (where optional --HEAD asks brew to
- install the current git version)
- or
- brew install libtool automake libusb [libusb-compat] [hidapi] [libftdi]
- (to install the needed dependencies and then proceed with the
- manual building procedure)
-
-
-For building with MacPorts you need to run:
- sudo port install libtool automake autoconf pkgconfig \
- libusb [libusb-compat] [libftdi1]
-
-You should also specify LDFLAGS and CPPFLAGS to allow configure to use
-MacPorts' libraries, so run configure like this:
- LDFLAGS=-L/opt/local/lib CPPFLAGS=-I/opt/local/include ./configure [options]
-
-
-See README for the generic building instructions.
-
-If you're using a USB adapter and have a driver kext matched to it,
-you will need to unload it prior to running OpenOCD. E.g. with Apple
-driver (OS X 10.9 or later) for FTDI run:
- sudo kextunload -b com.apple.driver.AppleUSBFTDI
-for FTDI vendor driver use:
- sudo kextunload FTDIUSBSerialDriver.kext
-
-To learn more on the topic please refer to the official libusb FAQ:
-https://github.com/libusb/libusb/wiki/FAQ
[08/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/types.h
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+++ /dev/null
@@ -1,341 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2004, 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef TYPES_H
-#define TYPES_H
-
-#include <stddef.h>
-#ifdef HAVE_SYS_TYPES_H
-#include <sys/types.h>
-#endif
-#ifdef HAVE_STDINT_H
-#include <stdint.h>
-#endif
-#ifdef HAVE_INTTYPES_H
-#include <inttypes.h>
-#endif
-
-#ifdef HAVE_STDBOOL_H
-#include <stdbool.h>
-#else /* HAVE_STDBOOL_H */
-#define __bool_true_false_are_defined 1
-
-#ifndef HAVE__BOOL
-#ifndef __cplusplus
-
-#define false 0
-#define true 1
-
-typedef int _Bool;
-#else
-typedef bool _Bool;
-#endif /* __cplusplus */
-#endif /* HAVE__BOOL */
-
-#define bool _Bool
-
-#endif /* HAVE_STDBOOL_H */
-
-/// turns a macro argument into a string constant
-#define stringify(s) __stringify(s)
-#define __stringify(s) #s
-
-
-/**
- * Compute the number of elements of a variable length array.
- * <code>
- * const char *strs[] = { "a", "b", "c" };
- * unsigned num_strs = ARRAY_SIZE(strs);
- * </code>
- */
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof(*(x)))
-
-
-/**
- * Cast a member of a structure out to the containing structure.
- * @param ptr The pointer to the member.
- * @param type The type of the container struct this is embedded in.
- * @param member The name of the member within the struct.
- *
- * This is a mechanism which is used throughout the Linux kernel.
- */
-#define container_of(ptr, type, member) ({ \
- const typeof( ((type *)0)->member ) *__mptr = (ptr); \
- (type *)( (void *) ( (char *)__mptr - offsetof(type,member) ) );})
-
-
-/**
- * Rounds @c m up to the nearest multiple of @c n using division.
- * @param m The value to round up to @c n.
- * @param n Round @c m up to a multiple of this number.
- * @returns The rounded integer value.
- */
-#define DIV_ROUND_UP(m, n) (((m) + (n) - 1) / (n))
-
-
-/* DANGER!!!! here be dragons!
- *
- * Leave these fn's as byte accesses because it is safe
- * across architectures. Clever usage of 32 bit access
- * will create problems on some hosts.
- *
- * Note that the "buf" pointer in memory is probably unaligned.
- *
- * Were these functions to be re-written to take a 32 bit wide or 16 bit wide
- * memory access shortcut, then on some CPU's, i.e. ARM7, the 2 lsbytes of the address are
- * ignored for 32 bit access, whereas on other CPU's a 32 bit wide unaligned memory access
- * will cause an exception, and lastly on x86, an unaligned "greater than bytewide"
- * memory access works as if aligned. So what follows below will work for all
- * platforms and gives the compiler leeway to do its own platform specific optimizations.
- *
- * Again, note that the "buf" pointer in memory is probably unaligned.
- */
-
-static inline uint64_t le_to_h_u64(const uint8_t *buf)
-{
- return (uint64_t)((uint64_t)buf[0] |
- (uint64_t)buf[1] << 8 |
- (uint64_t)buf[2] << 16 |
- (uint64_t)buf[3] << 24 |
- (uint64_t)buf[4] << 32 |
- (uint64_t)buf[5] << 40 |
- (uint64_t)buf[6] << 48 |
- (uint64_t)buf[7] << 56);
-}
-
-static inline uint32_t le_to_h_u32(const uint8_t* buf)
-{
- return (uint32_t)(buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24);
-}
-
-static inline uint32_t le_to_h_u24(const uint8_t* buf)
-{
- return (uint32_t)(buf[0] | buf[1] << 8 | buf[2] << 16);
-}
-
-static inline uint16_t le_to_h_u16(const uint8_t* buf)
-{
- return (uint16_t)(buf[0] | buf[1] << 8);
-}
-
-static inline uint64_t be_to_h_u64(const uint8_t *buf)
-{
- return (uint64_t)((uint64_t)buf[7] |
- (uint64_t)buf[6] << 8 |
- (uint64_t)buf[5] << 16 |
- (uint64_t)buf[4] << 24 |
- (uint64_t)buf[3] << 32 |
- (uint64_t)buf[2] << 40 |
- (uint64_t)buf[1] << 48 |
- (uint64_t)buf[0] << 56);
-}
-
-static inline uint32_t be_to_h_u32(const uint8_t* buf)
-{
- return (uint32_t)(buf[3] | buf[2] << 8 | buf[1] << 16 | buf[0] << 24);
-}
-
-static inline uint32_t be_to_h_u24(const uint8_t* buf)
-{
- return (uint32_t)(buf[2] | buf[1] << 8 | buf[0] << 16);
-}
-
-static inline uint16_t be_to_h_u16(const uint8_t* buf)
-{
- return (uint16_t)(buf[1] | buf[0] << 8);
-}
-
-static inline void h_u64_to_le(uint8_t *buf, int64_t val)
-{
- buf[7] = (uint8_t) (val >> 56);
- buf[6] = (uint8_t) (val >> 48);
- buf[5] = (uint8_t) (val >> 40);
- buf[4] = (uint8_t) (val >> 32);
- buf[3] = (uint8_t) (val >> 24);
- buf[2] = (uint8_t) (val >> 16);
- buf[1] = (uint8_t) (val >> 8);
- buf[0] = (uint8_t) (val >> 0);
-}
-
-static inline void h_u64_to_be(uint8_t *buf, int64_t val)
-{
- buf[0] = (uint8_t) (val >> 56);
- buf[1] = (uint8_t) (val >> 48);
- buf[2] = (uint8_t) (val >> 40);
- buf[3] = (uint8_t) (val >> 32);
- buf[4] = (uint8_t) (val >> 24);
- buf[5] = (uint8_t) (val >> 16);
- buf[6] = (uint8_t) (val >> 8);
- buf[7] = (uint8_t) (val >> 0);
-}
-
-static inline void h_u32_to_le(uint8_t* buf, int val)
-{
- buf[3] = (uint8_t) (val >> 24);
- buf[2] = (uint8_t) (val >> 16);
- buf[1] = (uint8_t) (val >> 8);
- buf[0] = (uint8_t) (val >> 0);
-}
-
-static inline void h_u32_to_be(uint8_t* buf, int val)
-{
- buf[0] = (uint8_t) (val >> 24);
- buf[1] = (uint8_t) (val >> 16);
- buf[2] = (uint8_t) (val >> 8);
- buf[3] = (uint8_t) (val >> 0);
-}
-
-static inline void h_u24_to_le(uint8_t* buf, int val)
-{
- buf[2] = (uint8_t) (val >> 16);
- buf[1] = (uint8_t) (val >> 8);
- buf[0] = (uint8_t) (val >> 0);
-}
-
-static inline void h_u24_to_be(uint8_t* buf, int val)
-{
- buf[0] = (uint8_t) (val >> 16);
- buf[1] = (uint8_t) (val >> 8);
- buf[2] = (uint8_t) (val >> 0);
-}
-
-static inline void h_u16_to_le(uint8_t* buf, int val)
-{
- buf[1] = (uint8_t) (val >> 8);
- buf[0] = (uint8_t) (val >> 0);
-}
-
-static inline void h_u16_to_be(uint8_t* buf, int val)
-{
- buf[0] = (uint8_t) (val >> 8);
- buf[1] = (uint8_t) (val >> 0);
-}
-
-/**
- * Byte-swap buffer 16-bit.
- *
- * Len must be even, dst and src must be either the same or non-overlapping.
- *
- * @param dst Destination buffer.
- * @param src Source buffer.
- * @param len Length of source (and destination) buffer, in bytes.
- */
-static inline void buf_bswap16(uint8_t *dst, const uint8_t *src, size_t len)
-{
- assert(len % 2 == 0);
- assert(dst == src || dst + len <= src || src + len <= dst);
-
- for (size_t n = 0; n < len; n += 2) {
- uint16_t x = be_to_h_u16(src + n);
- h_u16_to_le(dst + n, x);
- }
-}
-
-/**
- * Byte-swap buffer 32-bit.
- *
- * Len must be divisible by four, dst and src must be either the same or non-overlapping.
- *
- * @param dst Destination buffer.
- * @param src Source buffer.
- * @param len Length of source (and destination) buffer, in bytes.
- */
-static inline void buf_bswap32(uint8_t *dst, const uint8_t *src, size_t len)
-{
- assert(len % 4 == 0);
- assert(dst == src || dst + len <= src || src + len <= dst);
-
- for (size_t n = 0; n < len; n += 4) {
- uint32_t x = be_to_h_u32(src + n);
- h_u32_to_le(dst + n, x);
- }
-}
-
-/**
- * Calculate the (even) parity of a 32-bit datum.
- * @param x The datum.
- * @return 1 if the number of set bits in x is odd, 0 if it is even.
- */
-static inline int parity_u32(uint32_t x)
-{
-#ifdef __GNUC__
- return __builtin_parityl(x);
-#else
- x ^= x >> 16;
- x ^= x >> 8;
- x ^= x >> 4;
- x ^= x >> 2;
- x ^= x >> 1;
- return x & 1;
-#endif
-}
-
-#if defined(__ECOS)
-
-/* eCos plain lacks these definition... A series of upstream patches
- * could probably repair it, but it seems like too much work to be
- * worth it.
- */
-
-#if !defined(_STDINT_H)
-#define PRIx32 "x"
-#define PRId32 "d"
-#define SCNx32 "x"
-#define PRIi32 "i"
-#define PRIu32 "u"
-#define PRId8 PRId32
-#define SCNx64 "llx"
-#define PRIx64 "llx"
-
-typedef CYG_ADDRWORD intptr_t;
-typedef int64_t intmax_t;
-typedef uint64_t uintmax_t;
-#define INT8_MAX 0x7f
-#define INT8_MIN (-INT8_MAX - 1)
-# define UINT8_MAX (255)
-#define INT16_MAX 0x7fff
-#define INT16_MIN (-INT16_MAX - 1)
-# define UINT16_MAX (65535)
-#define INT32_MAX 0x7fffffffL
-#define INT32_MIN (-INT32_MAX - 1L)
-# define UINT32_MAX (4294967295U)
-#define INT64_MAX 0x7fffffffffffffffLL
-#define INT64_MIN (-INT64_MAX - 1LL)
-#define UINT64_MAX (__CONCAT(INT64_MAX, U) * 2ULL + 1ULL)
-#endif
-
- #ifndef LLONG_MAX
- #define ULLONG_MAX UINT64_C(0xFFFFFFFFFFFFFFFF)
- #define LLONG_MAX INT64_C(0x7FFFFFFFFFFFFFFF)
- #define LLONG_MIN ULLONG_MAX
- #endif
-
-
-#define ULLONG_MAX 18446744073709551615
-
-/* C99, eCos is C90 compliant (with bits of C99) */
-#define isblank(c) ((c) == ' ' || (c) == '\t')
-
-
-#endif
-
-#endif /* TYPES_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/update_jep106.pl
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/update_jep106.pl b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/update_jep106.pl
deleted file mode 100755
index caec066..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/update_jep106.pl
+++ /dev/null
@@ -1,35 +0,0 @@
-#!/usr/bin/perl
-use strict;
-use warnings;
-use File::Basename;
-
-if (@ARGV != 1) {
- die "Usage: $0 <JEP106 PDF document>\n\n"
- . "Convert the JEDEC document containing manufacturer identification codes\n"
- . "to an array initializer suitable for incusion into jep106.c. The latest\n"
- . "version of the document can be found here:\n"
- . "http://www.jedec.org/standards-documents/results/jep106\n";
-};
-
-my $outfile = dirname($0) . "/jep106.inc";
-
-open(my $out, ">", $outfile) || die "Cannot open $outfile: $!\n";
-open(my $pdftotext, "pdftotext -layout $ARGV[0] - |") || die "Cannot fork: $!\n";
-
-print $out "/* Autogenerated with " . basename($0) . "*/\n";
-
-my $bank = -1;
-
-while (<$pdftotext>) {
- if (/^[0-9]+[[:space:]]+(.*?)[[:space:]]+([01][[:space:]]+){8}([0-9A-F]{2})$/) {
- if ($3 eq "01") {
- $bank++
- }
- my $id=sprintf("0x%02x",hex($3)&0x7f);
- print $out "[$bank][$id - 1] = \"$1\",\n";
- }
-}
-
-close $pdftotext || die "Error: $! $?\n";
-
-print $out "/* EOF */\n";
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/util.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/util.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/util.c
deleted file mode 100755
index 55b92a7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/util.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by �yvind Harboe *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/* this file contains various functionality useful to standalone systems */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "log.h"
-#include "time_support.h"
-
-static int util_Jim_Command_ms(Jim_Interp *interp,
- int argc,
- Jim_Obj * const *argv)
-{
- if (argc != 1) {
- Jim_WrongNumArgs(interp, 1, argv, "ls ?dir?");
- return JIM_ERR;
- }
-
- /* Cast from 64 to 32 bit int works for 2's-compliment
- * when calculating differences*/
- Jim_SetResult(interp, Jim_NewIntObj(interp, (int)timeval_ms()));
-
- return JIM_OK;
-}
-
-static const struct command_registration util_command_handlers[] = {
- /* jim handlers */
- {
- .name = "ms",
- .mode = COMMAND_ANY,
- .jim_handler = util_Jim_Command_ms,
- .help =
- "Returns ever increasing milliseconds. Used to calculuate differences in time.",
- .usage = "",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-int util_init(struct command_context *cmd_ctx)
-{
- return register_commands(cmd_ctx, NULL, util_command_handlers);
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/util.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/util.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/util.h
deleted file mode 100755
index 48db725..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/util.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by �yvind Harboe *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef HELPER_UTILS_H
-#define HELPER_UTILS_H
-
-struct command_context;
-
-int util_init(struct command_context *cmd_ctx);
-
-#endif /* HELPER_UTILS_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/Makefile.am
deleted file mode 100755
index db3e6ff..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/Makefile.am
+++ /dev/null
@@ -1,86 +0,0 @@
-include $(top_srcdir)/common.mk
-
-METASOURCES = AUTO
-noinst_LTLIBRARIES = libjtag.la
-
-SUBDIRS =
-DRIVERFILES =
-libjtag_la_LIBADD =
-
-CLEANFILES =
-
-BUILT_SOURCES =
-
-BUILT_SOURCES += minidriver_imp.h
-CLEANFILES += minidriver_imp.h
-
-if MINIDRIVER
-
-if ZY1000
-DRIVERFILES += zy1000/zy1000.c
-JTAG_MINIDRIVER_DIR = $(srcdir)/zy1000
-endif
-if MINIDRIVER_DUMMY
-DRIVERFILES += minidummy/minidummy.c commands.c
-JTAG_MINIDRIVER_DIR = $(srcdir)/minidummy
-endif
-
-MINIDRIVER_IMP_DIR = $(srcdir)/minidriver
-
-jtag_minidriver.h: $(JTAG_MINIDRIVER_DIR)/jtag_minidriver.h
- cp $< $@
-
-BUILT_SOURCES += jtag_minidriver.h
-
-CLEANFILES += jtag_minidriver.h
-
-else
-
-MINIDRIVER_IMP_DIR = $(srcdir)/drivers
-DRIVERFILES += commands.c
-
-if HLADAPTER
-SUBDIRS += hla
-libjtag_la_LIBADD += $(top_builddir)/src/jtag/hla/libocdhla.la
-endif
-
-if AICE
-SUBDIRS += aice
-libjtag_la_LIBADD += $(top_builddir)/src/jtag/aice/libocdaice.la
-endif
-
-SUBDIRS += drivers
-libjtag_la_LIBADD += $(top_builddir)/src/jtag/drivers/libocdjtagdrivers.la
-
-
-endif
-
-# endif // MINIDRIVER
-
-minidriver_imp.h: $(MINIDRIVER_IMP_DIR)/minidriver_imp.h
- cp $< $@
-
-
-libjtag_la_SOURCES = \
- adapter.c \
- core.c \
- interface.c \
- interfaces.c \
- tcl.c \
- $(DRIVERFILES)
-
-noinst_HEADERS = \
- commands.h \
- driver.h \
- interface.h \
- interfaces.h \
- minidriver.h \
- jtag.h \
- minidriver/minidriver_imp.h \
- minidummy/jtag_minidriver.h \
- swd.h \
- tcl.h
-
-EXTRA_DIST = startup.tcl
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/adapter.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/adapter.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/adapter.c
deleted file mode 100755
index 2f5f6b4..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/adapter.c
+++ /dev/null
@@ -1,537 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007-2010 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2009 SoftPLC Corporation *
- * http://softplc.com *
- * dick@softplc.com *
- * *
- * Copyright (C) 2009 Zachary T Welch *
- * zw@superlucidity.net *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "jtag.h"
-#include "minidriver.h"
-#include "interface.h"
-#include "interfaces.h"
-#include <transport/transport.h>
-
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-
-/**
- * @file
- * Holds support for configuring debug adapters from TCl scripts.
- */
-
-extern struct jtag_interface *jtag_interface;
-const char * const jtag_only[] = { "jtag", NULL };
-
-static int jim_adapter_name(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
-{
- Jim_GetOptInfo goi;
- Jim_GetOpt_Setup(&goi, interp, argc-1, argv + 1);
-
- /* return the name of the interface */
- /* TCL code might need to know the exact type... */
- /* FUTURE: we allow this as a means to "set" the interface. */
- if (goi.argc != 0) {
- Jim_WrongNumArgs(goi.interp, 1, goi.argv-1, "(no params)");
- return JIM_ERR;
- }
- const char *name = jtag_interface ? jtag_interface->name : NULL;
- Jim_SetResultString(goi.interp, name ? : "undefined", -1);
- return JIM_OK;
-}
-
-static int default_khz(int khz, int *jtag_speed)
-{
- LOG_ERROR("Translation from khz to jtag_speed not implemented");
- return ERROR_FAIL;
-}
-
-static int default_speed_div(int speed, int *khz)
-{
- LOG_ERROR("Translation from jtag_speed to khz not implemented");
- return ERROR_FAIL;
-}
-
-static int default_power_dropout(int *dropout)
-{
- *dropout = 0; /* by default we can't detect power dropout */
- return ERROR_OK;
-}
-
-static int default_srst_asserted(int *srst_asserted)
-{
- *srst_asserted = 0; /* by default we can't detect srst asserted */
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(interface_transport_command)
-{
- char **transports;
- int retval;
-
- retval = CALL_COMMAND_HANDLER(transport_list_parse, &transports);
- if (retval != ERROR_OK)
- return retval;
-
- retval = allow_transports(CMD_CTX, (const char **)transports);
-
- if (retval != ERROR_OK) {
- for (unsigned i = 0; transports[i]; i++)
- free(transports[i]);
- free(transports);
- }
- return retval;
-}
-
-COMMAND_HANDLER(handle_interface_list_command)
-{
- if (strcmp(CMD_NAME, "interface_list") == 0 && CMD_ARGC > 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- command_print(CMD_CTX, "The following debug interfaces are available:");
- for (unsigned i = 0; NULL != jtag_interfaces[i]; i++) {
- const char *name = jtag_interfaces[i]->name;
- command_print(CMD_CTX, "%u: %s", i + 1, name);
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_interface_command)
-{
- int retval;
-
- /* check whether the interface is already configured */
- if (jtag_interface) {
- LOG_WARNING("Interface already configured, ignoring");
- return ERROR_OK;
- }
-
- /* interface name is a mandatory argument */
- if (CMD_ARGC != 1 || CMD_ARGV[0][0] == '\0')
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- for (unsigned i = 0; NULL != jtag_interfaces[i]; i++) {
- if (strcmp(CMD_ARGV[0], jtag_interfaces[i]->name) != 0)
- continue;
-
- if (NULL != jtag_interfaces[i]->commands) {
- retval = register_commands(CMD_CTX, NULL,
- jtag_interfaces[i]->commands);
- if (ERROR_OK != retval)
- return retval;
- }
-
- jtag_interface = jtag_interfaces[i];
-
- /* LEGACY SUPPORT ... adapter drivers must declare what
- * transports they allow. Until they all do so, assume
- * the legacy drivers are JTAG-only
- */
- if (!jtag_interface->transports)
- LOG_WARNING("Adapter driver '%s' did not declare "
- "which transports it allows; assuming "
- "legacy JTAG-only", jtag_interface->name);
- retval = allow_transports(CMD_CTX, jtag_interface->transports
- ? jtag_interface->transports : jtag_only);
- if (ERROR_OK != retval)
- return retval;
-
- if (jtag_interface->khz == NULL)
- jtag_interface->khz = default_khz;
- if (jtag_interface->speed_div == NULL)
- jtag_interface->speed_div = default_speed_div;
- if (jtag_interface->power_dropout == NULL)
- jtag_interface->power_dropout = default_power_dropout;
- if (jtag_interface->srst_asserted == NULL)
- jtag_interface->srst_asserted = default_srst_asserted;
-
- return ERROR_OK;
- }
-
- /* no valid interface was found (i.e. the configuration option,
- * didn't match one of the compiled-in interfaces
- */
- LOG_ERROR("The specified debug interface was not found (%s)",
- CMD_ARGV[0]);
- CALL_COMMAND_HANDLER(handle_interface_list_command);
- return ERROR_JTAG_INVALID_INTERFACE;
-}
-
-COMMAND_HANDLER(handle_reset_config_command)
-{
- int new_cfg = 0;
- int mask = 0;
-
- /* Original versions cared about the order of these tokens:
- * reset_config signals [combination [trst_type [srst_type]]]
- * They also clobbered the previous configuration even on error.
- *
- * Here we don't care about the order, and only change values
- * which have been explicitly specified.
- */
- for (; CMD_ARGC; CMD_ARGC--, CMD_ARGV++) {
- int tmp = 0;
- int m;
-
- /* gating */
- m = RESET_SRST_NO_GATING;
- if (strcmp(*CMD_ARGV, "srst_gates_jtag") == 0)
- /* default: don't use JTAG while SRST asserted */;
- else if (strcmp(*CMD_ARGV, "srst_nogate") == 0)
- tmp = RESET_SRST_NO_GATING;
- else
- m = 0;
- if (mask & m) {
- LOG_ERROR("extra reset_config %s spec (%s)",
- "gating", *CMD_ARGV);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- if (m)
- goto next;
-
- /* signals */
- m = RESET_HAS_TRST | RESET_HAS_SRST;
- if (strcmp(*CMD_ARGV, "none") == 0)
- tmp = RESET_NONE;
- else if (strcmp(*CMD_ARGV, "trst_only") == 0)
- tmp = RESET_HAS_TRST;
- else if (strcmp(*CMD_ARGV, "srst_only") == 0)
- tmp = RESET_HAS_SRST;
- else if (strcmp(*CMD_ARGV, "trst_and_srst") == 0)
- tmp = RESET_HAS_TRST | RESET_HAS_SRST;
- else
- m = 0;
- if (mask & m) {
- LOG_ERROR("extra reset_config %s spec (%s)",
- "signal", *CMD_ARGV);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- if (m)
- goto next;
-
- /* combination (options for broken wiring) */
- m = RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST;
- if (strcmp(*CMD_ARGV, "separate") == 0)
- /* separate reset lines - default */;
- else if (strcmp(*CMD_ARGV, "srst_pulls_trst") == 0)
- tmp |= RESET_SRST_PULLS_TRST;
- else if (strcmp(*CMD_ARGV, "trst_pulls_srst") == 0)
- tmp |= RESET_TRST_PULLS_SRST;
- else if (strcmp(*CMD_ARGV, "combined") == 0)
- tmp |= RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST;
- else
- m = 0;
- if (mask & m) {
- LOG_ERROR("extra reset_config %s spec (%s)",
- "combination", *CMD_ARGV);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- if (m)
- goto next;
-
- /* trst_type (NOP without HAS_TRST) */
- m = RESET_TRST_OPEN_DRAIN;
- if (strcmp(*CMD_ARGV, "trst_open_drain") == 0)
- tmp |= RESET_TRST_OPEN_DRAIN;
- else if (strcmp(*CMD_ARGV, "trst_push_pull") == 0)
- /* push/pull from adapter - default */;
- else
- m = 0;
- if (mask & m) {
- LOG_ERROR("extra reset_config %s spec (%s)",
- "trst_type", *CMD_ARGV);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- if (m)
- goto next;
-
- /* srst_type (NOP without HAS_SRST) */
- m = RESET_SRST_PUSH_PULL;
- if (strcmp(*CMD_ARGV, "srst_push_pull") == 0)
- tmp |= RESET_SRST_PUSH_PULL;
- else if (strcmp(*CMD_ARGV, "srst_open_drain") == 0)
- /* open drain from adapter - default */;
- else
- m = 0;
- if (mask & m) {
- LOG_ERROR("extra reset_config %s spec (%s)",
- "srst_type", *CMD_ARGV);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- if (m)
- goto next;
-
- /* connect_type - only valid when srst_nogate */
- m = RESET_CNCT_UNDER_SRST;
- if (strcmp(*CMD_ARGV, "connect_assert_srst") == 0)
- tmp |= RESET_CNCT_UNDER_SRST;
- else if (strcmp(*CMD_ARGV, "connect_deassert_srst") == 0)
- /* connect normally - default */;
- else
- m = 0;
- if (mask & m) {
- LOG_ERROR("extra reset_config %s spec (%s)",
- "connect_type", *CMD_ARGV);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- if (m)
- goto next;
-
- /* caller provided nonsense; fail */
- LOG_ERROR("unknown reset_config flag (%s)", *CMD_ARGV);
- return ERROR_COMMAND_SYNTAX_ERROR;
-
-next:
- /* Remember the bits which were specified (mask)
- * and their new values (new_cfg).
- */
- mask |= m;
- new_cfg |= tmp;
- }
-
- /* clear previous values of those bits, save new values */
- if (mask) {
- int old_cfg = jtag_get_reset_config();
-
- old_cfg &= ~mask;
- new_cfg |= old_cfg;
- jtag_set_reset_config(new_cfg);
- } else
- new_cfg = jtag_get_reset_config();
-
- /*
- * Display the (now-)current reset mode
- */
- char *modes[6];
-
- /* minimal JTAG has neither SRST nor TRST (so that's the default) */
- switch (new_cfg & (RESET_HAS_TRST | RESET_HAS_SRST)) {
- case RESET_HAS_SRST:
- modes[0] = "srst_only";
- break;
- case RESET_HAS_TRST:
- modes[0] = "trst_only";
- break;
- case RESET_TRST_AND_SRST:
- modes[0] = "trst_and_srst";
- break;
- default:
- modes[0] = "none";
- break;
- }
-
- /* normally SRST and TRST are decoupled; but bugs happen ... */
- switch (new_cfg & (RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST)) {
- case RESET_SRST_PULLS_TRST:
- modes[1] = "srst_pulls_trst";
- break;
- case RESET_TRST_PULLS_SRST:
- modes[1] = "trst_pulls_srst";
- break;
- case RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST:
- modes[1] = "combined";
- break;
- default:
- modes[1] = "separate";
- break;
- }
-
- /* TRST-less connectors include Altera, Xilinx, and minimal JTAG */
- if (new_cfg & RESET_HAS_TRST) {
- if (new_cfg & RESET_TRST_OPEN_DRAIN)
- modes[3] = " trst_open_drain";
- else
- modes[3] = " trst_push_pull";
- } else
- modes[3] = "";
-
- /* SRST-less connectors include TI-14, Xilinx, and minimal JTAG */
- if (new_cfg & RESET_HAS_SRST) {
- if (new_cfg & RESET_SRST_NO_GATING)
- modes[2] = " srst_nogate";
- else
- modes[2] = " srst_gates_jtag";
-
- if (new_cfg & RESET_SRST_PUSH_PULL)
- modes[4] = " srst_push_pull";
- else
- modes[4] = " srst_open_drain";
-
- if (new_cfg & RESET_CNCT_UNDER_SRST)
- modes[5] = " connect_assert_srst";
- else
- modes[5] = " connect_deassert_srst";
- } else {
- modes[2] = "";
- modes[4] = "";
- modes[5] = "";
- }
-
- command_print(CMD_CTX, "%s %s%s%s%s%s",
- modes[0], modes[1],
- modes[2], modes[3], modes[4], modes[5]);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_adapter_nsrst_delay_command)
-{
- if (CMD_ARGC > 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
- if (CMD_ARGC == 1) {
- unsigned delay;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], delay);
-
- jtag_set_nsrst_delay(delay);
- }
- command_print(CMD_CTX, "adapter_nsrst_delay: %u", jtag_get_nsrst_delay());
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_adapter_nsrst_assert_width_command)
-{
- if (CMD_ARGC > 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
- if (CMD_ARGC == 1) {
- unsigned width;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], width);
-
- jtag_set_nsrst_assert_width(width);
- }
- command_print(CMD_CTX, "adapter_nsrst_assert_width: %u", jtag_get_nsrst_assert_width());
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_adapter_khz_command)
-{
- if (CMD_ARGC > 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- int retval = ERROR_OK;
- if (CMD_ARGC == 1) {
- unsigned khz = 0;
- COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], khz);
-
- retval = jtag_config_khz(khz);
- if (ERROR_OK != retval)
- return retval;
- }
-
- int cur_speed = jtag_get_speed_khz();
- retval = jtag_get_speed_readable(&cur_speed);
- if (ERROR_OK != retval)
- return retval;
-
- if (cur_speed)
- command_print(CMD_CTX, "adapter speed: %d kHz", cur_speed);
- else
- command_print(CMD_CTX, "adapter speed: RCLK - adaptive");
-
- return retval;
-}
-
-static const struct command_registration interface_command_handlers[] = {
- {
- .name = "adapter_khz",
- .handler = handle_adapter_khz_command,
- .mode = COMMAND_ANY,
- .help = "With an argument, change to the specified maximum "
- "jtag speed. For JTAG, 0 KHz signifies adaptive "
- " clocking. "
- "With or without argument, display current setting.",
- .usage = "[khz]",
- },
- {
- .name = "adapter_name",
- .mode = COMMAND_ANY,
- .jim_handler = jim_adapter_name,
- .help = "Returns the name of the currently "
- "selected adapter (driver)",
- },
- {
- .name = "adapter_nsrst_delay",
- .handler = handle_adapter_nsrst_delay_command,
- .mode = COMMAND_ANY,
- .help = "delay after deasserting SRST in ms",
- .usage = "[milliseconds]",
- },
- {
- .name = "adapter_nsrst_assert_width",
- .handler = handle_adapter_nsrst_assert_width_command,
- .mode = COMMAND_ANY,
- .help = "delay after asserting SRST in ms",
- .usage = "[milliseconds]",
- },
- {
- .name = "interface",
- .handler = handle_interface_command,
- .mode = COMMAND_CONFIG,
- .help = "Select a debug adapter interface (driver)",
- .usage = "driver_name",
- },
- {
- .name = "interface_transports",
- .handler = interface_transport_command,
- .mode = COMMAND_CONFIG,
- .help = "Declare transports the interface supports.",
- .usage = "transport ... ",
- },
- {
- .name = "interface_list",
- .handler = handle_interface_list_command,
- .mode = COMMAND_ANY,
- .help = "List all built-in debug adapter interfaces (drivers)",
- },
- {
- .name = "reset_config",
- .handler = handle_reset_config_command,
- .mode = COMMAND_ANY,
- .help = "configure adapter reset behavior",
- .usage = "[none|trst_only|srst_only|trst_and_srst] "
- "[srst_pulls_trst|trst_pulls_srst|combined|separate] "
- "[srst_gates_jtag|srst_nogate] "
- "[trst_push_pull|trst_open_drain] "
- "[srst_push_pull|srst_open_drain] "
- "[connect_deassert_srst|connect_assert_srst]",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-/**
- * Register the commands which deal with arbitrary debug adapter drivers.
- *
- * @todo Remove internal assumptions that all debug adapters use JTAG for
- * transport. Various types and data structures are not named generically.
- */
-int interface_register_commands(struct command_context *ctx)
-{
- return register_commands(ctx, NULL, interface_command_handlers);
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/Makefile.am
deleted file mode 100755
index 7b9469d..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/Makefile.am
+++ /dev/null
@@ -1,27 +0,0 @@
-include $(top_srcdir)/common.mk
-
-AM_CPPFLAGS += -I$(top_srcdir)/src/jtag/drivers $(LIBUSB1_CFLAGS) $(LIBUSB0_CFLAGS)
-
-noinst_LTLIBRARIES = libocdaice.la
-
-libocdaice_la_SOURCES = \
- $(AICEFILES)
-
-AICEFILES =
-
-if AICE
-AICEFILES += aice_transport.c
-AICEFILES += aice_interface.c
-AICEFILES += aice_port.c
-AICEFILES += aice_usb.c
-AICEFILES += aice_pipe.c
-endif
-
-noinst_HEADERS = \
- aice_transport.h \
- aice_interface.h \
- aice_port.h \
- aice_usb.h \
- aice_pipe.h
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_interface.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_interface.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_interface.c
deleted file mode 100755
index 363b208..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_interface.c
+++ /dev/null
@@ -1,509 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/interface.h>
-#include <jtag/commands.h>
-#include <transport/transport.h>
-#include <target/target.h>
-#include <jtag/aice/aice_transport.h>
-#include <jtag/drivers/libusb_common.h>
-#include "aice_usb.h"
-
-#define AICE_KHZ_TO_SPEED_MAP_SIZE 16
-static const int aice_khz_to_speed_map[AICE_KHZ_TO_SPEED_MAP_SIZE] = {
- 30000,
- 15000,
- 7500,
- 3750,
- 1875,
- 937,
- 468,
- 234,
- 48000,
- 24000,
- 12000,
- 6000,
- 3000,
- 1500,
- 750,
- 375,
-};
-
-static const struct aice_port *aice_port;
-static struct aice_port_param_s param;
-static uint32_t retry_times;
-static uint32_t count_to_check_dbger;
-
-/***************************************************************************/
-/* External interface implementation */
-static uint32_t aice_target_id_codes[AICE_MAX_NUM_CORE];
-static uint8_t aice_num_of_target_id_codes;
-
-/***************************************************************************/
-/* AICE operations */
-int aice_init_targets(void)
-{
- int res;
- struct target *target;
- struct aice_port_s *aice;
-
- LOG_DEBUG("aice_init_targets");
-
- if (aice_num_of_target_id_codes == 0) {
- res = aice_port->api->idcode(aice_target_id_codes, &aice_num_of_target_id_codes);
- if (res != ERROR_OK) {
- LOG_ERROR("<-- TARGET ERROR! Failed to identify AndesCore "
- "JTAG Manufacture ID in the JTAG scan chain. "
- "Failed to access EDM registers. -->");
- return res;
- }
- }
-
- for (target = all_targets; target; target = target->next) {
- target->tap->idcode = aice_target_id_codes[target->tap->abs_chain_position];
-
- unsigned ii, limit = target->tap->expected_ids_cnt;
- int found = 0;
-
- for (ii = 0; ii < limit; ii++) {
- uint32_t expected = target->tap->expected_ids[ii];
-
- /* treat "-expected-id 0" as a "don't-warn" wildcard */
- if (!expected || (target->tap->idcode == expected)) {
- found = 1;
- break;
- }
- }
-
- if (found == 0) {
- LOG_ERROR
- ("aice_init_targets: target not found: idcode: %" PRIx32,
- target->tap->idcode);
- return ERROR_FAIL;
- }
-
- aice = calloc(1, sizeof(struct aice_port_s));
- aice->port = aice_port;
- aice->coreid = target->tap->abs_chain_position;
-
- target->tap->priv = aice;
- target->tap->hasidcode = 1;
- }
-
- return ERROR_OK;
-}
-
-/***************************************************************************/
-/* End of External interface implementation */
-
-/* initial aice
- * 1. open usb
- * 2. get/show version number
- * 3. reset
- */
-static int aice_init(void)
-{
- if (ERROR_OK != aice_port->api->open(¶m)) {
- LOG_ERROR("Cannot find AICE Interface! Please check "
- "connection and permissions.");
- return ERROR_JTAG_INIT_FAILED;
- }
-
- aice_port->api->set_retry_times(retry_times);
- aice_port->api->set_count_to_check_dbger(count_to_check_dbger);
-
- LOG_INFO("AICE JTAG Interface ready");
-
- return ERROR_OK;
-}
-
-/* cleanup aice resource
- * close usb
- */
-static int aice_quit(void)
-{
- aice_port->api->close();
- return ERROR_OK;
-}
-
-static int aice_execute_reset(struct jtag_command *cmd)
-{
- static int last_trst;
- int retval = ERROR_OK;
-
- DEBUG_JTAG_IO("reset trst: %d", cmd->cmd.reset->trst);
-
- if (cmd->cmd.reset->trst != last_trst) {
- if (cmd->cmd.reset->trst)
- retval = aice_port->api->reset();
-
- last_trst = cmd->cmd.reset->trst;
- }
-
- return retval;
-}
-
-static int aice_execute_command(struct jtag_command *cmd)
-{
- int retval;
-
- switch (cmd->type) {
- case JTAG_RESET:
- retval = aice_execute_reset(cmd);
- break;
- default:
- retval = ERROR_OK;
- break;
- }
- return retval;
-}
-
-/* aice has no need to implement jtag execution model
-*/
-static int aice_execute_queue(void)
-{
- struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
- int retval;
-
- retval = ERROR_OK;
-
- while (cmd) {
- if (aice_execute_command(cmd) != ERROR_OK)
- retval = ERROR_JTAG_QUEUE_FAILED;
-
- cmd = cmd->next;
- }
-
- return retval;
-}
-
-/* set jtag frequency(base frequency/frequency divider) to your jtag adapter */
-static int aice_speed(int speed)
-{
- return aice_port->api->set_jtag_clock(speed);
-}
-
-/* convert jtag adapter frequency(base frequency/frequency divider) to
- * human readable KHz value */
-static int aice_speed_div(int speed, int *khz)
-{
- *khz = aice_khz_to_speed_map[speed];
-
- return ERROR_OK;
-}
-
-/* convert human readable KHz value to jtag adapter frequency
- * (base frequency/frequency divider) */
-static int aice_khz(int khz, int *jtag_speed)
-{
- int i;
- for (i = 0 ; i < AICE_KHZ_TO_SPEED_MAP_SIZE ; i++) {
- if (khz == aice_khz_to_speed_map[i]) {
- if (8 <= i)
- *jtag_speed = i | AICE_TCK_CONTROL_TCK3048;
- else
- *jtag_speed = i;
- break;
- }
- }
-
- if (i == AICE_KHZ_TO_SPEED_MAP_SIZE) {
- LOG_INFO("No support the jtag clock: %d", khz);
- LOG_INFO("Supported jtag clocks are:");
-
- for (i = 0 ; i < AICE_KHZ_TO_SPEED_MAP_SIZE ; i++)
- LOG_INFO("* %d", aice_khz_to_speed_map[i]);
-
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-/***************************************************************************/
-/* Command handlers */
-COMMAND_HANDLER(aice_handle_aice_info_command)
-{
- LOG_DEBUG("aice_handle_aice_info_command");
-
- command_print(CMD_CTX, "Description: %s", param.device_desc);
- command_print(CMD_CTX, "Serial number: %s", param.serial);
- if (strncmp(aice_port->name, "aice_pipe", 9) == 0)
- command_print(CMD_CTX, "Adapter: %s", param.adapter_name);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(aice_handle_aice_port_command)
-{
- LOG_DEBUG("aice_handle_aice_port_command");
-
- if (CMD_ARGC != 1) {
- LOG_ERROR("Need exactly one argument to 'aice port'");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- for (const struct aice_port *l = aice_port_get_list(); l->name; l++) {
- if (strcmp(l->name, CMD_ARGV[0]) == 0) {
- aice_port = l;
- return ERROR_OK;
- }
- }
-
- LOG_ERROR("No AICE port '%s' found", CMD_ARGV[0]);
- return ERROR_FAIL;
-}
-
-COMMAND_HANDLER(aice_handle_aice_desc_command)
-{
- LOG_DEBUG("aice_handle_aice_desc_command");
-
- if (CMD_ARGC == 1)
- param.device_desc = strdup(CMD_ARGV[0]);
- else
- LOG_ERROR("expected exactly one argument to aice desc <description>");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(aice_handle_aice_serial_command)
-{
- LOG_DEBUG("aice_handle_aice_serial_command");
-
- if (CMD_ARGC == 1)
- param.serial = strdup(CMD_ARGV[0]);
- else
- LOG_ERROR("expected exactly one argument to aice serial <serial-number>");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(aice_handle_aice_vid_pid_command)
-{
- LOG_DEBUG("aice_handle_aice_vid_pid_command");
-
- if (CMD_ARGC != 2) {
- LOG_WARNING("ignoring extra IDs in aice vid_pid (maximum is 1 pair)");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- COMMAND_PARSE_NUMBER(u16, CMD_ARGV[0], param.vid);
- COMMAND_PARSE_NUMBER(u16, CMD_ARGV[1], param.pid);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(aice_handle_aice_adapter_command)
-{
- LOG_DEBUG("aice_handle_aice_adapter_command");
-
- if (CMD_ARGC == 1)
- param.adapter_name = strdup(CMD_ARGV[0]);
- else
- LOG_ERROR("expected exactly one argument to aice adapter <adapter-name>");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(aice_handle_aice_retry_times_command)
-{
- LOG_DEBUG("aice_handle_aice_retry_times_command");
-
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], retry_times);
- else
- LOG_ERROR("expected exactly one argument to aice retry_times <num_of_retry>");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(aice_handle_aice_count_to_check_dbger_command)
-{
- LOG_DEBUG("aice_handle_aice_count_to_check_dbger_command");
-
- if (CMD_ARGC == 1)
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], count_to_check_dbger);
- else
- LOG_ERROR("expected exactly one argument to aice count_to_check_dbger "
- "<count_of_checking>");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(aice_handle_aice_custom_srst_script_command)
-{
- LOG_DEBUG("aice_handle_aice_custom_srst_script_command");
-
- if (CMD_ARGC > 0) {
- aice_port->api->set_custom_srst_script(CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- return ERROR_FAIL;
-}
-
-COMMAND_HANDLER(aice_handle_aice_custom_trst_script_command)
-{
- LOG_DEBUG("aice_handle_aice_custom_trst_script_command");
-
- if (CMD_ARGC > 0) {
- aice_port->api->set_custom_trst_script(CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- return ERROR_FAIL;
-}
-
-COMMAND_HANDLER(aice_handle_aice_custom_restart_script_command)
-{
- LOG_DEBUG("aice_handle_aice_custom_restart_script_command");
-
- if (CMD_ARGC > 0) {
- aice_port->api->set_custom_restart_script(CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- return ERROR_FAIL;
-}
-
-COMMAND_HANDLER(aice_handle_aice_reset_command)
-{
- LOG_DEBUG("aice_handle_aice_reset_command");
-
- return aice_port->api->reset();
-}
-
-
-static const struct command_registration aice_subcommand_handlers[] = {
- {
- .name = "info",
- .handler = &aice_handle_aice_info_command,
- .mode = COMMAND_EXEC,
- .help = "show aice info",
- .usage = "aice info",
- },
- {
- .name = "port",
- .handler = &aice_handle_aice_port_command,
- .mode = COMMAND_CONFIG,
- .help = "set the port of the AICE",
- .usage = "aice port ['aice_pipe'|'aice_usb']",
- },
- {
- .name = "desc",
- .handler = &aice_handle_aice_desc_command,
- .mode = COMMAND_CONFIG,
- .help = "set the aice device description",
- .usage = "aice desc [desciption string]",
- },
- {
- .name = "serial",
- .handler = &aice_handle_aice_serial_command,
- .mode = COMMAND_CONFIG,
- .help = "set the serial number of the AICE device",
- .usage = "aice serial [serial string]",
- },
- {
- .name = "vid_pid",
- .handler = &aice_handle_aice_vid_pid_command,
- .mode = COMMAND_CONFIG,
- .help = "the vendor and product ID of the AICE device",
- .usage = "aice vid_pid (vid pid)*",
- },
- {
- .name = "adapter",
- .handler = &aice_handle_aice_adapter_command,
- .mode = COMMAND_CONFIG,
- .help = "set the file name of adapter",
- .usage = "aice adapter [adapter name]",
- },
- {
- .name = "retry_times",
- .handler = &aice_handle_aice_retry_times_command,
- .mode = COMMAND_CONFIG,
- .help = "set retry times as AICE timeout",
- .usage = "aice retry_times num_of_retry",
- },
- {
- .name = "count_to_check_dbger",
- .handler = &aice_handle_aice_count_to_check_dbger_command,
- .mode = COMMAND_CONFIG,
- .help = "set retry times as checking $DBGER status",
- .usage = "aice count_to_check_dbger count_of_checking",
- },
- {
- .name = "custom_srst_script",
- .handler = &aice_handle_aice_custom_srst_script_command,
- .mode = COMMAND_CONFIG,
- .usage = "custom_srst_script script_file_name",
- .help = "set custom srst script",
- },
- {
- .name = "custom_trst_script",
- .handler = &aice_handle_aice_custom_trst_script_command,
- .mode = COMMAND_CONFIG,
- .usage = "custom_trst_script script_file_name",
- .help = "set custom trst script",
- },
- {
- .name = "custom_restart_script",
- .handler = &aice_handle_aice_custom_restart_script_command,
- .mode = COMMAND_CONFIG,
- .usage = "custom_restart_script script_file_name",
- .help = "set custom restart script",
- },
- {
- .name = "reset",
- .handler = &aice_handle_aice_reset_command,
- .mode = COMMAND_EXEC,
- .usage = "aice reset",
- .help = "reset AICE",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration aice_command_handlers[] = {
- {
- .name = "aice",
- .mode = COMMAND_ANY,
- .help = "perform aice management",
- .usage = "aice [subcommand]",
- .chain = aice_subcommand_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-/***************************************************************************/
-/* End of Command handlers */
-
-struct jtag_interface aice_interface = {
- .name = "aice",
- .commands = aice_command_handlers,
- .transports = aice_transports,
- .init = aice_init,
- .quit = aice_quit,
- .execute_queue = aice_execute_queue,
- .speed = aice_speed, /* set interface speed */
- .speed_div = aice_speed_div, /* return readable value */
- .khz = aice_khz, /* convert khz to interface speed value */
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_interface.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_interface.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_interface.h
deleted file mode 100755
index ddb6ad4..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_interface.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef __AICE_INTERFACE_H__
-#define __AICE_INTERFACE_H__
-
-struct aice_interface_param_s {
- /** */
- const char *device_desc;
- /** */
- const char *serial;
- /** */
- uint16_t vid;
- /** */
- uint16_t pid;
-};
-
-int aice_init_targets(void);
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_pipe.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_pipe.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_pipe.c
deleted file mode 100755
index 3180ad0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_pipe.c
+++ /dev/null
@@ -1,895 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#ifdef _WIN32
-#include <windows.h>
-#else
-#include <signal.h>
-#endif
-
-#include <helper/log.h>
-#include <helper/time_support.h>
-#include "aice_port.h"
-#include "aice_pipe.h"
-
-#define AICE_PIPE_MAXLINE 8192
-
-#ifdef _WIN32
-PROCESS_INFORMATION proc_info;
-
-HANDLE aice_pipe_output[2];
-HANDLE aice_pipe_input[2];
-
-static int aice_pipe_write(const void *buffer, int count)
-{
- BOOL success;
- DWORD written;
-
- success = WriteFile(aice_pipe_output[1], buffer, count, &written, NULL);
- if (!success) {
- LOG_ERROR("(WIN32) write to pipe failed, error code: 0x%08l" PRIx32, GetLastError());
- return -1;
- }
-
- return written;
-}
-
-static int aice_pipe_read(void *buffer, int count)
-{
- BOOL success;
- DWORD has_read;
-
- success = ReadFile(aice_pipe_input[0], buffer, count, &has_read, NULL);
- if (!success || (has_read == 0)) {
- LOG_ERROR("(WIN32) read from pipe failed, error code: 0x%08l" PRIx32, GetLastError());
- return -1;
- }
-
- return has_read;
-}
-
-static int aice_pipe_child_init(struct aice_port_param_s *param)
-{
- STARTUPINFO start_info;
- BOOL success;
-
- ZeroMemory(&proc_info, sizeof(PROCESS_INFORMATION));
- ZeroMemory(&start_info, sizeof(STARTUPINFO));
- start_info.cb = sizeof(STARTUPINFO);
- start_info.hStdError = aice_pipe_input[1];
- start_info.hStdOutput = aice_pipe_input[1];
- start_info.hStdInput = aice_pipe_output[0];
- start_info.dwFlags |= STARTF_USESTDHANDLES;
-
- success = CreateProcess(NULL,
- param->adapter_name,
- NULL,
- NULL,
- TRUE,
- 0,
- NULL,
- NULL,
- &start_info,
- &proc_info);
-
- if (!success) {
- LOG_ERROR("Create new process failed");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int aice_pipe_parent_init(struct aice_port_param_s *param)
-{
- /* send open to adapter */
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_OPEN;
- set_u16(command + 1, param->vid);
- set_u16(command + 3, param->pid);
-
- if (aice_pipe_write(command, 5) != 5) {
- LOG_ERROR("write failed\n");
- return ERROR_FAIL;
- }
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0) {
- LOG_ERROR("read failed\n");
- return ERROR_FAIL;
- }
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_open(struct aice_port_param_s *param)
-{
- SECURITY_ATTRIBUTES attribute;
-
- attribute.nLength = sizeof(SECURITY_ATTRIBUTES);
- attribute.bInheritHandle = TRUE;
- attribute.lpSecurityDescriptor = NULL;
-
- if (!CreatePipe(&aice_pipe_output[0], &aice_pipe_output[1],
- &attribute, AICE_PIPE_MAXLINE)) {
- LOG_ERROR("Create pipes failed");
- return ERROR_FAIL;
- }
- if (!CreatePipe(&aice_pipe_input[0], &aice_pipe_input[1],
- &attribute, AICE_PIPE_MAXLINE)) {
- LOG_ERROR("Create pipes failed");
- return ERROR_FAIL;
- }
-
- /* do not inherit aice_pipe_output[1] & aice_pipe_input[0] to child process */
- if (!SetHandleInformation(aice_pipe_output[1], HANDLE_FLAG_INHERIT, 0))
- return ERROR_FAIL;
- if (!SetHandleInformation(aice_pipe_input[0], HANDLE_FLAG_INHERIT, 0))
- return ERROR_FAIL;
-
- aice_pipe_child_init(param);
-
- aice_pipe_parent_init(param);
-
- return ERROR_OK;
-}
-
-#else
-
-int aice_pipe_output[2];
-int aice_pipe_input[2];
-
-static int aice_pipe_write(const void *buffer, int count)
-{
- if (write(aice_pipe_output[1], buffer, count) != count) {
- LOG_ERROR("write to pipe failed");
- return -1;
- }
-
- return count;
-}
-
-static int aice_pipe_read(void *buffer, int count)
-{
- int n;
- long long then, cur;
-
- then = timeval_ms();
-
- while (1) {
- n = read(aice_pipe_input[0], buffer, count);
-
- if ((n == -1) && (errno == EAGAIN)) {
- cur = timeval_ms();
- if (cur - then > 500)
- keep_alive();
- continue;
- } else if (n > 0)
- break;
- else {
- LOG_ERROR("read from pipe failed");
- break;
- }
- }
-
- return n;
-}
-
-static int aice_pipe_child_init(struct aice_port_param_s *param)
-{
- close(aice_pipe_output[1]);
- close(aice_pipe_input[0]);
-
- if (aice_pipe_output[0] != STDIN_FILENO) {
- if (dup2(aice_pipe_output[0], STDIN_FILENO) != STDIN_FILENO) {
- LOG_ERROR("Map aice_pipe to STDIN failed");
- return ERROR_FAIL;
- }
- close(aice_pipe_output[0]);
- }
-
- if (aice_pipe_input[1] != STDOUT_FILENO) {
- if (dup2(aice_pipe_input[1], STDOUT_FILENO) != STDOUT_FILENO) {
- LOG_ERROR("Map aice_pipe to STDOUT failed");
- return ERROR_FAIL;
- }
- close(aice_pipe_input[1]);
- }
-
- if (execl(param->adapter_name, param->adapter_name, (char *)0) < 0) {
- LOG_ERROR("Execute aice_pipe failed");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int aice_pipe_parent_init(struct aice_port_param_s *param)
-{
- close(aice_pipe_output[0]);
- close(aice_pipe_input[1]);
-
- /* set read end of pipe as non-blocking */
- if (fcntl(aice_pipe_input[0], F_SETFL, O_NONBLOCK))
- return ERROR_FAIL;
-
- /* send open to adapter */
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_OPEN;
- set_u16(command + 1, param->vid);
- set_u16(command + 3, param->pid);
-
- if (aice_pipe_write(command, 5) != 5) {
- LOG_ERROR("write failed\n");
- return ERROR_FAIL;
- }
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0) {
- LOG_ERROR("read failed\n");
- return ERROR_FAIL;
- }
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static void sig_pipe(int signo)
-{
- exit(1);
-}
-
-static int aice_pipe_open(struct aice_port_param_s *param)
-{
- pid_t pid;
-
- if (signal(SIGPIPE, sig_pipe) == SIG_ERR) {
- LOG_ERROR("Register SIGPIPE handler failed");
- return ERROR_FAIL;
- }
-
- if (pipe(aice_pipe_output) < 0 || pipe(aice_pipe_input) < 0) {
- LOG_ERROR("Create pipes failed");
- return ERROR_FAIL;
- }
-
- pid = fork();
- if (pid < 0) {
- LOG_ERROR("Fork new process failed");
- return ERROR_FAIL;
- } else if (pid == 0) {
- if (aice_pipe_child_init(param) != ERROR_OK) {
- LOG_ERROR("AICE_PIPE child process initial error");
- return ERROR_FAIL;
- } else {
- if (aice_pipe_parent_init(param) != ERROR_OK) {
- LOG_ERROR("AICE_PIPE parent process initial error");
- return ERROR_FAIL;
- }
- }
- }
-
- return ERROR_OK;
-}
-#endif
-
-static int aice_pipe_close(void)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_CLOSE;
-
- if (aice_pipe_write(command, 1) != 1)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK) {
-#ifdef _WIN32
- WaitForSingleObject(proc_info.hProcess, INFINITE);
- CloseHandle(proc_info.hProcess);
- CloseHandle(proc_info.hThread);
-#endif
- return ERROR_OK;
- } else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_idcode(uint32_t *idcode, uint8_t *num_of_idcode)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_IDCODE;
-
- if (aice_pipe_write(command, 1) != 1)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- *num_of_idcode = line[0];
-
- if ((*num_of_idcode == 0) || (*num_of_idcode >= 16))
- return ERROR_FAIL;
-
- for (int i = 0 ; i < *num_of_idcode ; i++)
- idcode[i] = get_u32(line + i * 4 + 1);
-
- return ERROR_OK;
-}
-
-static int aice_pipe_state(uint32_t coreid, enum aice_target_state_s *state)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_STATE;
-
- if (aice_pipe_write(command, 1) != 1)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- *state = (enum aice_target_state_s)line[0];
-
- return ERROR_OK;
-}
-
-static int aice_pipe_reset(void)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_RESET;
-
- if (aice_pipe_write(command, 1) != 1)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_assert_srst(uint32_t coreid, enum aice_srst_type_s srst)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_ASSERT_SRST;
- command[1] = srst;
-
- if (aice_pipe_write(command, 2) != 2)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_run(uint32_t coreid)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_RUN;
-
- if (aice_pipe_write(command, 1) != 1)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_halt(uint32_t coreid)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_HALT;
-
- if (aice_pipe_write(command, 1) != 1)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_read_reg(uint32_t coreid, uint32_t num, uint32_t *val)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_READ_REG;
- set_u32(command + 1, num);
-
- if (aice_pipe_write(command, 5) != 5)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- *val = get_u32(line);
-
- return ERROR_OK;
-}
-
-static int aice_pipe_write_reg(uint32_t coreid, uint32_t num, uint32_t val)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_WRITE_REG;
- set_u32(command + 1, num);
- set_u32(command + 5, val);
-
- if (aice_pipe_write(command, 9) != 9)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_read_reg_64(uint32_t coreid, uint32_t num, uint64_t *val)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_READ_REG_64;
- set_u32(command + 1, num);
-
- if (aice_pipe_write(command, 5) != 5)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- *val = (((uint64_t)get_u32(line + 4)) << 32) | get_u32(line);
-
- return ERROR_OK;
-}
-
-static int aice_pipe_write_reg_64(uint32_t coreid, uint32_t num, uint64_t val)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_WRITE_REG_64;
- set_u32(command + 1, num);
- set_u32(command + 5, val & 0xFFFFFFFF);
- set_u32(command + 9, (val >> 32) & 0xFFFFFFFF);
-
- if (aice_pipe_write(command, 13) != 9)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_step(uint32_t coreid)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_STEP;
-
- if (aice_pipe_write(command, 1) != 1)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_read_mem_unit(uint32_t coreid, uint32_t addr, uint32_t size,
- uint32_t count, uint8_t *buffer)
-{
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_READ_MEM_UNIT;
- set_u32(command + 1, addr);
- set_u32(command + 5, size);
- set_u32(command + 9, count);
-
- if (aice_pipe_write(command, 13) != 13)
- return ERROR_FAIL;
-
- if (aice_pipe_read(buffer, size * count) < 0)
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-static int aice_pipe_write_mem_unit(uint32_t coreid, uint32_t addr, uint32_t size,
- uint32_t count, const uint8_t *buffer)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_WRITE_MEM_UNIT;
- set_u32(command + 1, addr);
- set_u32(command + 5, size);
- set_u32(command + 9, count);
-
- /* WRITE_MEM_UNIT|addr|size|count|data */
- memcpy(command + 13, buffer, size * count);
-
- if (aice_pipe_write(command, 13 + size * count) < 0)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-static int aice_pipe_read_mem_bulk(uint32_t coreid, uint32_t addr,
- uint32_t length, uint8_t *buffer)
-{
- char line[AICE_PIPE_MAXLINE + 1];
- char command[AICE_PIPE_MAXLINE];
- uint32_t remain_len = length;
- uint32_t prepare_len;
- char *received_line;
- uint32_t received_len;
- int read_len;
-
- command[0] = AICE_READ_MEM_BULK;
- set_u32(command + 1, addr);
- set_u32(command + 5, length);
-
- if (aice_pipe_write(command, 9) < 0)
- return ERROR_FAIL;
-
- while (remain_len > 0) {
- if (remain_len > AICE_PIPE_MAXLINE)
- prepare_len = AICE_PIPE_MAXLINE;
- else
- prepare_len = remain_len;
-
- prepare_len++;
- received_len = 0;
- received_line = line;
- do {
- read_len = aice_pipe_read(received_line, prepare_len - received_len);
- if (read_len < 0)
- return ERROR_FAIL;
- received_line += read_len;
- received_len += read_len;
- } while (received_len < prepare_len);
-
- if (line[0] != AICE_OK)
- return ERROR_FAIL;
-
- prepare_len--;
- memcpy(buffer, line + 1, prepare_len);
- remain_len -= prepare_len;
- buffer += prepare_len;
- }
-
- return ERROR_OK;
-}
-
-static int aice_pipe_write_mem_bulk(uint32_t coreid, uint32_t addr,
- uint32_t length, const uint8_t *buffer)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE + 4];
- uint32_t remain_len = length;
- uint32_t written_len = 0;
- uint32_t write_len;
-
- command[0] = AICE_WRITE_MEM_BULK;
- set_u32(command + 1, addr);
- set_u32(command + 5, length);
-
- /* Send command first */
- if (aice_pipe_write(command, 9) < 0)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_ERROR)
- return ERROR_FAIL;
-
- while (remain_len > 0) {
- if (remain_len > AICE_PIPE_MAXLINE)
- write_len = AICE_PIPE_MAXLINE;
- else
- write_len = remain_len;
-
- set_u32(command, write_len);
- memcpy(command + 4, buffer + written_len, write_len); /* data only */
-
- if (aice_pipe_write(command, write_len + 4) < 0)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_ERROR)
- return ERROR_FAIL;
-
- remain_len -= write_len;
- written_len += write_len;
- }
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_read_debug_reg(uint32_t coreid, uint32_t addr, uint32_t *val)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_READ_DEBUG_REG;
- set_u32(command + 1, addr);
-
- if (aice_pipe_write(command, 5) != 5)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- *val = get_u32(line);
-
- return ERROR_OK;
-}
-
-static int aice_pipe_write_debug_reg(uint32_t coreid, uint32_t addr, const uint32_t val)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_WRITE_DEBUG_REG;
- set_u32(command + 1, addr);
- set_u32(command + 5, val);
-
- if (aice_pipe_write(command, 9) != 9)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_set_jtag_clock(uint32_t a_clock)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_SET_JTAG_CLOCK;
- set_u32(command + 1, a_clock);
-
- if (aice_pipe_write(command, 5) != 5)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_memory_access(uint32_t coreid, enum nds_memory_access access_channel)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_MEMORY_ACCESS;
- set_u32(command + 1, access_channel);
-
- if (aice_pipe_write(command, 5) != 5)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_memory_mode(uint32_t coreid, enum nds_memory_select mem_select)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_MEMORY_MODE;
- set_u32(command + 1, mem_select);
-
- if (aice_pipe_write(command, 5) != 5)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_read_tlb(uint32_t coreid, uint32_t virtual_address,
- uint32_t *physical_address)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_READ_TLB;
- set_u32(command + 1, virtual_address);
-
- if (aice_pipe_write(command, 5) != 5)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK) {
- *physical_address = get_u32(line + 1);
- return ERROR_OK;
- } else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_cache_ctl(uint32_t coreid, uint32_t subtype, uint32_t address)
-{
- char line[AICE_PIPE_MAXLINE];
- char command[AICE_PIPE_MAXLINE];
-
- command[0] = AICE_CACHE_CTL;
- set_u32(command + 1, subtype);
- set_u32(command + 5, address);
-
- if (aice_pipe_write(command, 9) != 9)
- return ERROR_FAIL;
-
- if (aice_pipe_read(line, AICE_PIPE_MAXLINE) < 0)
- return ERROR_FAIL;
-
- if (line[0] == AICE_OK)
- return ERROR_OK;
- else
- return ERROR_FAIL;
-}
-
-static int aice_pipe_set_retry_times(uint32_t a_retry_times)
-{
- return ERROR_OK;
-}
-
-/** */
-struct aice_port_api_s aice_pipe = {
- /** */
- .open = aice_pipe_open,
- /** */
- .close = aice_pipe_close,
- /** */
- .idcode = aice_pipe_idcode,
- /** */
- .set_jtag_clock = aice_pipe_set_jtag_clock,
- /** */
- .state = aice_pipe_state,
- /** */
- .reset = aice_pipe_reset,
- /** */
- .assert_srst = aice_pipe_assert_srst,
- /** */
- .run = aice_pipe_run,
- /** */
- .halt = aice_pipe_halt,
- /** */
- .step = aice_pipe_step,
- /** */
- .read_reg = aice_pipe_read_reg,
- /** */
- .write_reg = aice_pipe_write_reg,
- /** */
- .read_reg_64 = aice_pipe_read_reg_64,
- /** */
- .write_reg_64 = aice_pipe_write_reg_64,
- /** */
- .read_mem_unit = aice_pipe_read_mem_unit,
- /** */
- .write_mem_unit = aice_pipe_write_mem_unit,
- /** */
- .read_mem_bulk = aice_pipe_read_mem_bulk,
- /** */
- .write_mem_bulk = aice_pipe_write_mem_bulk,
- /** */
- .read_debug_reg = aice_pipe_read_debug_reg,
- /** */
- .write_debug_reg = aice_pipe_write_debug_reg,
-
- /** */
- .memory_access = aice_pipe_memory_access,
- /** */
- .memory_mode = aice_pipe_memory_mode,
-
- /** */
- .read_tlb = aice_pipe_read_tlb,
-
- /** */
- .cache_ctl = aice_pipe_cache_ctl,
-
- /** */
- .set_retry_times = aice_pipe_set_retry_times,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_pipe.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_pipe.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_pipe.h
deleted file mode 100755
index 48b0c49..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_pipe.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef _AICE_PIPE_H_
-#define _AICE_PIPE_H_
-
-#include <helper/types.h>
-
-#define set_u32(buffer, value) h_u32_to_le((uint8_t *)buffer, value)
-#define set_u16(buffer, value) h_u16_to_le((uint8_t *)buffer, value)
-#define get_u32(buffer) le_to_h_u32((const uint8_t *)buffer)
-#define get_u16(buffer) le_to_h_u16((const uint8_t *)buffer)
-
-extern struct aice_port_api_s aice_pipe;
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_port.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_port.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_port.c
deleted file mode 100755
index b61275c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_port.c
+++ /dev/null
@@ -1,47 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <helper/log.h>
-#include "aice_usb.h"
-#include "aice_pipe.h"
-#include "aice_port.h"
-
-static const struct aice_port aice_ports[] = {
- {
- .name = "aice_usb",
- .type = AICE_PORT_AICE_USB,
- .api = &aice_usb_api,
- },
- {
- .name = "aice_pipe",
- .type = AICE_PORT_AICE_PIPE,
- .api = &aice_pipe,
- },
- {.name = NULL, /* END OF TABLE */ },
-};
-
-/** */
-const struct aice_port *aice_port_get_list(void)
-{
- return aice_ports;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_port.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_port.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_port.h
deleted file mode 100755
index d29e9e1..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/jtag/aice/aice_port.h
+++ /dev/null
@@ -1,238 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Andes Technology *
- * Hsiangkai Wang <hk...@andestech.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifndef _AICE_PORT_H_
-#define _AICE_PORT_H_
-
-#include <target/nds32_edm.h>
-
-#define AICE_MAX_NUM_CORE (0x10)
-
-#define ERROR_AICE_DISCONNECT (-200)
-#define ERROR_AICE_TIMEOUT (-201)
-
-enum aice_target_state_s {
- AICE_DISCONNECT = 0,
- AICE_TARGET_DETACH,
- AICE_TARGET_UNKNOWN,
- AICE_TARGET_RUNNING,
- AICE_TARGET_HALTED,
- AICE_TARGET_RESET,
- AICE_TARGET_DEBUG_RUNNING,
-};
-
-enum aice_srst_type_s {
- AICE_SRST = 0x1,
- AICE_RESET_HOLD = 0x8,
-};
-
-enum aice_target_endian {
- AICE_LITTLE_ENDIAN = 0,
- AICE_BIG_ENDIAN,
-};
-
-enum aice_api_s {
- AICE_OPEN = 0x0,
- AICE_CLOSE,
- AICE_RESET,
- AICE_IDCODE,
- AICE_SET_JTAG_CLOCK,
- AICE_ASSERT_SRST,
- AICE_RUN,
- AICE_HALT,
- AICE_STEP,
- AICE_READ_REG,
- AICE_WRITE_REG,
- AICE_READ_REG_64,
- AICE_WRITE_REG_64,
- AICE_READ_MEM_UNIT,
- AICE_WRITE_MEM_UNIT,
- AICE_READ_MEM_BULK,
- AICE_WRITE_MEM_BULK,
- AICE_READ_DEBUG_REG,
- AICE_WRITE_DEBUG_REG,
- AICE_STATE,
- AICE_MEMORY_ACCESS,
- AICE_MEMORY_MODE,
- AICE_READ_TLB,
- AICE_CACHE_CTL,
- AICE_SET_RETRY_TIMES,
- AICE_PROGRAM_EDM,
- AICE_SET_COMMAND_MODE,
- AICE_EXECUTE,
- AICE_SET_CUSTOM_SRST_SCRIPT,
- AICE_SET_CUSTOM_TRST_SCRIPT,
- AICE_SET_CUSTOM_RESTART_SCRIPT,
- AICE_SET_COUNT_TO_CHECK_DBGER,
- AICE_SET_DATA_ENDIAN,
-};
-
-enum aice_error_s {
- AICE_OK,
- AICE_ACK,
- AICE_ERROR,
-};
-
-enum aice_cache_ctl_type {
- AICE_CACHE_CTL_L1D_INVALALL = 0,
- AICE_CACHE_CTL_L1D_VA_INVAL,
- AICE_CACHE_CTL_L1D_WBALL,
- AICE_CACHE_CTL_L1D_VA_WB,
- AICE_CACHE_CTL_L1I_INVALALL,
- AICE_CACHE_CTL_L1I_VA_INVAL,
-};
-
-enum aice_command_mode {
- AICE_COMMAND_MODE_NORMAL,
- AICE_COMMAND_MODE_PACK,
- AICE_COMMAND_MODE_BATCH,
-};
-
-struct aice_port_param_s {
- /** */
- const char *device_desc;
- /** */
- const char *serial;
- /** */
- uint16_t vid;
- /** */
- uint16_t pid;
- /** */
- char *adapter_name;
-};
-
-struct aice_port_s {
- /** */
- uint32_t coreid;
- /** */
- const struct aice_port *port;
-};
-
-/** */
-extern struct aice_port_api_s aice_usb_layout_api;
-
-/** */
-struct aice_port_api_s {
- /** */
- int (*open)(struct aice_port_param_s *param);
- /** */
- int (*close)(void);
- /** */
- int (*reset)(void);
- /** */
- int (*idcode)(uint32_t *idcode, uint8_t *num_of_idcode);
- /** */
- int (*set_jtag_clock)(uint32_t a_clock);
- /** */
- int (*assert_srst)(uint32_t coreid, enum aice_srst_type_s srst);
- /** */
- int (*run)(uint32_t coreid);
- /** */
- int (*halt)(uint32_t coreid);
- /** */
- int (*step)(uint32_t coreid);
- /** */
- int (*read_reg)(uint32_t coreid, uint32_t num, uint32_t *val);
- /** */
- int (*write_reg)(uint32_t coreid, uint32_t num, uint32_t val);
- /** */
- int (*read_reg_64)(uint32_t coreid, uint32_t num, uint64_t *val);
- /** */
- int (*write_reg_64)(uint32_t coreid, uint32_t num, uint64_t val);
- /** */
- int (*read_mem_unit)(uint32_t coreid, uint32_t addr, uint32_t size,
- uint32_t count, uint8_t *buffer);
- /** */
- int (*write_mem_unit)(uint32_t coreid, uint32_t addr, uint32_t size,
- uint32_t count, const uint8_t *buffer);
- /** */
- int (*read_mem_bulk)(uint32_t coreid, uint32_t addr, uint32_t length,
- uint8_t *buffer);
- /** */
- int (*write_mem_bulk)(uint32_t coreid, uint32_t addr, uint32_t length,
- const uint8_t *buffer);
- /** */
- int (*read_debug_reg)(uint32_t coreid, uint32_t addr, uint32_t *val);
- /** */
- int (*write_debug_reg)(uint32_t coreid, uint32_t addr, const uint32_t val);
-
- /** */
- int (*state)(uint32_t coreid, enum aice_target_state_s *state);
-
- /** */
- int (*memory_access)(uint32_t coreid, enum nds_memory_access a_access);
- /** */
- int (*memory_mode)(uint32_t coreid, enum nds_memory_select mem_select);
-
- /** */
- int (*read_tlb)(uint32_t coreid, uint32_t virtual_address, uint32_t *physical_address);
-
- /** */
- int (*cache_ctl)(uint32_t coreid, uint32_t subtype, uint32_t address);
-
- /** */
- int (*set_retry_times)(uint32_t a_retry_times);
-
- /** */
- int (*program_edm)(uint32_t coreid, char *command_sequence);
-
- /** */
- int (*set_command_mode)(enum aice_command_mode command_mode);
-
- /** */
- int (*execute)(uint32_t coreid, uint32_t *instructions, uint32_t instruction_num);
-
- /** */
- int (*set_custom_srst_script)(const char *script);
-
- /** */
- int (*set_custom_trst_script)(const char *script);
-
- /** */
- int (*set_custom_restart_script)(const char *script);
-
- /** */
- int (*set_count_to_check_dbger)(uint32_t count_to_check);
-
- /** */
- int (*set_data_endian)(uint32_t coreid, enum aice_target_endian target_data_endian);
-
- /** */
- int (*profiling)(uint32_t coreid, uint32_t interval, uint32_t iteration,
- uint32_t reg_no, uint32_t *samples, uint32_t *num_samples);
-};
-
-#define AICE_PORT_UNKNOWN 0
-#define AICE_PORT_AICE_USB 1
-#define AICE_PORT_AICE_PIPE 2
-
-/** */
-struct aice_port {
- /** */
- const char *name;
- /** */
- int type;
- /** */
- struct aice_port_api_s *const api;
-};
-
-/** */
-const struct aice_port *aice_port_get_list(void);
-
-#endif
[36/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx_regs.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx_regs.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx_regs.h
deleted file mode 100755
index fc0f96f..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c24xx_regs.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2004, 2005 by Simtec Electronics *
- * linux@simtec.co.uk *
- * http://www.simtec.co.uk/products/SWLINUX/ *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; version 2 of the License. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- * S3C2410 NAND register definitions
- */
-
-#ifndef __ASM_ARM_REGS_NAND
-#define __ASM_ARM_REGS_NAND
-
-#define S3C2410_NFREG(x) (x)
-
-#define S3C2410_NFCONF S3C2410_NFREG(0x00)
-#define S3C2410_NFCMD S3C2410_NFREG(0x04)
-#define S3C2410_NFADDR S3C2410_NFREG(0x08)
-#define S3C2410_NFDATA S3C2410_NFREG(0x0C)
-#define S3C2410_NFSTAT S3C2410_NFREG(0x10)
-#define S3C2410_NFECC S3C2410_NFREG(0x14)
-
-#define S3C2440_NFCONT S3C2410_NFREG(0x04)
-#define S3C2440_NFCMD S3C2410_NFREG(0x08)
-#define S3C2440_NFADDR S3C2410_NFREG(0x0C)
-#define S3C2440_NFDATA S3C2410_NFREG(0x10)
-#define S3C2440_NFECCD0 S3C2410_NFREG(0x14)
-#define S3C2440_NFECCD1 S3C2410_NFREG(0x18)
-#define S3C2440_NFECCD S3C2410_NFREG(0x1C)
-#define S3C2440_NFSTAT S3C2410_NFREG(0x20)
-#define S3C2440_NFESTAT0 S3C2410_NFREG(0x24)
-#define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
-#define S3C2440_NFMECC0 S3C2410_NFREG(0x2C)
-#define S3C2440_NFMECC1 S3C2410_NFREG(0x30)
-#define S3C2440_NFSECC S3C2410_NFREG(0x34)
-#define S3C2440_NFSBLK S3C2410_NFREG(0x38)
-#define S3C2440_NFEBLK S3C2410_NFREG(0x3C)
-
-#define S3C2412_NFSBLK S3C2410_NFREG(0x20)
-#define S3C2412_NFEBLK S3C2410_NFREG(0x24)
-#define S3C2412_NFSTAT S3C2410_NFREG(0x28)
-#define S3C2412_NFMECC_ERR0 S3C2410_NFREG(0x2C)
-#define S3C2412_NFMECC_ERR1 S3C2410_NFREG(0x30)
-#define S3C2412_NFMECC0 S3C2410_NFREG(0x34)
-#define S3C2412_NFMECC1 S3C2410_NFREG(0x38)
-#define S3C2412_NFSECC S3C2410_NFREG(0x3C)
-
-#define S3C2410_NFCONF_EN (1 << 15)
-#define S3C2410_NFCONF_512BYTE (1 << 14)
-#define S3C2410_NFCONF_4STEP (1 << 13)
-#define S3C2410_NFCONF_INITECC (1 << 12)
-#define S3C2410_NFCONF_nFCE (1 << 11)
-#define S3C2410_NFCONF_TACLS(x) ((x) << 8)
-#define S3C2410_NFCONF_TWRPH0(x) ((x) << 4)
-#define S3C2410_NFCONF_TWRPH1(x) ((x) << 0)
-
-#define S3C2410_NFSTAT_BUSY (1 << 0)
-
-#define S3C2440_NFCONF_BUSWIDTH_8 (0 << 0)
-#define S3C2440_NFCONF_BUSWIDTH_16 (1 << 0)
-#define S3C2440_NFCONF_ADVFLASH (1 << 3)
-#define S3C2440_NFCONF_TACLS(x) ((x) << 12)
-#define S3C2440_NFCONF_TWRPH0(x) ((x) << 8)
-#define S3C2440_NFCONF_TWRPH1(x) ((x) << 4)
-
-#define S3C2440_NFCONT_LOCKTIGHT (1 << 13)
-#define S3C2440_NFCONT_SOFTLOCK (1 << 12)
-#define S3C2440_NFCONT_ILLEGALACC_EN (1 << 10)
-#define S3C2440_NFCONT_RNBINT_EN (1 << 9)
-#define S3C2440_NFCONT_RN_FALLING (1 << 8)
-#define S3C2440_NFCONT_SPARE_ECCLOCK (1 << 6)
-#define S3C2440_NFCONT_MAIN_ECCLOCK (1 << 5)
-#define S3C2440_NFCONT_INITECC (1 << 4)
-#define S3C2440_NFCONT_nFCE (1 << 1)
-#define S3C2440_NFCONT_ENABLE (1 << 0)
-
-#define S3C2440_NFSTAT_READY (1 << 0)
-#define S3C2440_NFSTAT_nCE (1 << 1)
-#define S3C2440_NFSTAT_RnB_CHANGE (1 << 2)
-#define S3C2440_NFSTAT_ILLEGAL_ACCESS (1 << 3)
-
-#define S3C2412_NFCONF_NANDBOOT (1 << 31)
-#define S3C2412_NFCONF_ECCCLKCON (1 << 30)
-#define S3C2412_NFCONF_ECC_MLC (1 << 24)
-#define S3C2412_NFCONF_TACLS_MASK (7 << 12) /* 1 extra bit of Tacls */
-
-#define S3C2412_NFCONT_ECC4_DIRWR (1 << 18)
-#define S3C2412_NFCONT_LOCKTIGHT (1 << 17)
-#define S3C2412_NFCONT_SOFTLOCK (1 << 16)
-#define S3C2412_NFCONT_ECC4_ENCINT (1 << 13)
-#define S3C2412_NFCONT_ECC4_DECINT (1 << 12)
-#define S3C2412_NFCONT_MAIN_ECC_LOCK (1 << 7)
-#define S3C2412_NFCONT_INIT_MAIN_ECC (1 << 5)
-#define S3C2412_NFCONT_nFCE1 (1 << 2)
-#define S3C2412_NFCONT_nFCE0 (1 << 1)
-
-#define S3C2412_NFSTAT_ECC_ENCDONE (1 << 7)
-#define S3C2412_NFSTAT_ECC_DECDONE (1 << 6)
-#define S3C2412_NFSTAT_ILLEGAL_ACCESS (1 << 5)
-#define S3C2412_NFSTAT_RnB_CHANGE (1 << 4)
-#define S3C2412_NFSTAT_nFCE1 (1 << 3)
-#define S3C2412_NFSTAT_nFCE0 (1 << 2)
-#define S3C2412_NFSTAT_Res1 (1 << 1)
-#define S3C2412_NFSTAT_READY (1 << 0)
-
-#define S3C2412_NFECCERR_SERRDATA(x) (((x) >> 21) & 0xf)
-#define S3C2412_NFECCERR_SERRBIT(x) (((x) >> 18) & 0x7)
-#define S3C2412_NFECCERR_MERRDATA(x) (((x) >> 7) & 0x3ff)
-#define S3C2412_NFECCERR_MERRBIT(x) (((x) >> 4) & 0x7)
-#define S3C2412_NFECCERR_SPARE_ERR(x) (((x) >> 2) & 0x3)
-#define S3C2412_NFECCERR_MAIN_ERR(x) (((x) >> 2) & 0x3)
-#define S3C2412_NFECCERR_NONE (0)
-#define S3C2412_NFECCERR_1BIT (1)
-#define S3C2412_NFECCERR_MULTIBIT (2)
-#define S3C2412_NFECCERR_ECCAREA (3)
-
-#endif /* __ASM_ARM_REGS_NAND */
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c6400.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c6400.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c6400.c
deleted file mode 100755
index abbfb25..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/s3c6400.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Peter Korsgaard <ja...@sunsite.dk> *
- * Heavily based on s3c2412.c by Ben Dooks <be...@fluff.org> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "s3c24xx.h"
-/* s3c64xx uses another base address for the nand controller than 24xx */
-#undef S3C2410_NFREG
-#define S3C2410_NFREG(x) ((x) + 0x70200000)
-
-NAND_DEVICE_COMMAND_HANDLER(s3c6400_nand_device_command)
-{
- struct s3c24xx_nand_controller *info;
- CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
-
- /* fill in the address fields for the core device */
- info->cmd = S3C2440_NFCMD;
- info->addr = S3C2440_NFADDR;
- info->data = S3C2440_NFDATA;
- info->nfstat = S3C2412_NFSTAT;
-
- return ERROR_OK;
-}
-
-static int s3c6400_init(struct nand_device *nand)
-{
- struct target *target = nand->target;
-
- target_write_u32(target, S3C2410_NFCONF,
- S3C2440_NFCONF_TACLS(3) |
- S3C2440_NFCONF_TWRPH0(7) |
- S3C2440_NFCONF_TWRPH1(7) | 4);
-
- target_write_u32(target, S3C2440_NFCONT,
- S3C2412_NFCONT_INIT_MAIN_ECC |
- S3C2440_NFCONT_ENABLE);
-
- return ERROR_OK;
-}
-
-struct nand_flash_controller s3c6400_nand_controller = {
- .name = "s3c6400",
- .nand_device_command = &s3c6400_nand_device_command,
- .init = &s3c6400_init,
- .reset = &s3c24xx_reset,
- .command = &s3c24xx_command,
- .address = &s3c24xx_address,
- .write_data = &s3c24xx_write_data,
- .read_data = &s3c24xx_read_data,
- .write_page = s3c24xx_write_page,
- .read_page = s3c24xx_read_page,
- .write_block_data = &s3c2440_write_block_data,
- .read_block_data = &s3c2440_read_block_data,
- .nand_ready = &s3c2440_nand_ready,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/tcl.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/tcl.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/tcl.c
deleted file mode 100755
index d238e7a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nand/tcl.c
+++ /dev/null
@@ -1,628 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2002 Thomas Gleixner <tg...@linutronix.de> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * Partially based on drivers/mtd/nand_ids.c from Linux. *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "core.h"
-#include "imp.h"
-#include "fileio.h"
-#include <target/target.h>
-
-/* to be removed */
-extern struct nand_device *nand_devices;
-
-COMMAND_HANDLER(handle_nand_list_command)
-{
- struct nand_device *p;
- int i;
-
- if (!nand_devices) {
- command_print(CMD_CTX, "no NAND flash devices configured");
- return ERROR_OK;
- }
-
- for (p = nand_devices, i = 0; p; p = p->next, i++) {
- if (p->device)
- command_print(CMD_CTX, "#%i: %s (%s) "
- "pagesize: %i, buswidth: %i,\n\t"
- "blocksize: %i, blocks: %i",
- i, p->device->name, p->manufacturer->name,
- p->page_size, p->bus_width,
- p->erase_size, p->num_blocks);
- else
- command_print(CMD_CTX, "#%i: not probed", i);
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_nand_info_command)
-{
- int i = 0;
- int j = 0;
- int first = -1;
- int last = -1;
-
- switch (CMD_ARGC) {
- default:
- return ERROR_COMMAND_SYNTAX_ERROR;
- case 1:
- first = 0;
- last = INT32_MAX;
- break;
- case 2:
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], i);
- first = last = i;
- i = 0;
- break;
- case 3:
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[1], first);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[2], last);
- break;
- }
-
- struct nand_device *p;
- int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- if (NULL == p->device) {
- command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- if (first >= p->num_blocks)
- first = p->num_blocks - 1;
-
- if (last >= p->num_blocks)
- last = p->num_blocks - 1;
-
- command_print(CMD_CTX,
- "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
- i++,
- p->device->name,
- p->manufacturer->name,
- p->page_size,
- p->bus_width,
- p->erase_size);
-
- for (j = first; j <= last; j++) {
- char *erase_state, *bad_state;
-
- if (p->blocks[j].is_erased == 0)
- erase_state = "not erased";
- else if (p->blocks[j].is_erased == 1)
- erase_state = "erased";
- else
- erase_state = "erase state unknown";
-
- if (p->blocks[j].is_bad == 0)
- bad_state = "";
- else if (p->blocks[j].is_bad == 1)
- bad_state = " (marked bad)";
- else
- bad_state = " (block condition unknown)";
-
- command_print(CMD_CTX,
- "\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
- j,
- p->blocks[j].offset,
- p->blocks[j].size / 1024,
- erase_state,
- bad_state);
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_nand_probe_command)
-{
- if (CMD_ARGC != 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct nand_device *p;
- int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- retval = nand_probe(p);
- if (retval == ERROR_OK) {
- command_print(CMD_CTX, "NAND flash device '%s (%s)' found",
- p->device->name, p->manufacturer->name);
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_nand_erase_command)
-{
- if (CMD_ARGC != 1 && CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct nand_device *p;
- int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- unsigned long offset;
- unsigned long length;
-
- /* erase specified part of the chip; or else everything */
- if (CMD_ARGC == 3) {
- unsigned long size = p->erase_size * p->num_blocks;
-
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
- if ((offset % p->erase_size) != 0 || offset >= size)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
- if ((length == 0) || (length % p->erase_size) != 0
- || (length + offset) > size)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- offset /= p->erase_size;
- length /= p->erase_size;
- } else {
- offset = 0;
- length = p->num_blocks;
- }
-
- retval = nand_erase(p, offset, offset + length - 1);
- if (retval == ERROR_OK) {
- command_print(CMD_CTX, "erased blocks %lu to %lu "
- "on NAND flash device #%s '%s'",
- offset, offset + length - 1,
- CMD_ARGV[0], p->device->name);
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
-{
- int first = -1;
- int last = -1;
-
- if ((CMD_ARGC < 1) || (CMD_ARGC > 3) || (CMD_ARGC == 2))
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct nand_device *p;
- int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- if (CMD_ARGC == 3) {
- unsigned long offset;
- unsigned long length;
-
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[1], offset);
- if (offset % p->erase_size)
- return ERROR_COMMAND_SYNTAX_ERROR;
- offset /= p->erase_size;
-
- COMMAND_PARSE_NUMBER(ulong, CMD_ARGV[2], length);
- if (length % p->erase_size)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- length -= 1;
- length /= p->erase_size;
-
- first = offset;
- last = offset + length;
- }
-
- retval = nand_build_bbt(p, first, last);
- if (retval == ERROR_OK) {
- command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
- "use \"nand info\" command to list blocks");
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_nand_write_command)
-{
- struct nand_device *nand = NULL;
- struct nand_fileio_state s;
- int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
- &s, &nand, FILEIO_READ, false, true);
- if (ERROR_OK != retval)
- return retval;
-
- uint32_t total_bytes = s.size;
- while (s.size > 0) {
- int bytes_read = nand_fileio_read(nand, &s);
- if (bytes_read <= 0) {
- command_print(CMD_CTX, "error while reading file");
- return nand_fileio_cleanup(&s);
- }
- s.size -= bytes_read;
-
- retval = nand_write_page(nand, s.address / nand->page_size,
- s.page, s.page_size, s.oob, s.oob_size);
- if (ERROR_OK != retval) {
- command_print(CMD_CTX, "failed writing file %s "
- "to NAND flash %s at offset 0x%8.8" PRIx32,
- CMD_ARGV[1], CMD_ARGV[0], s.address);
- return nand_fileio_cleanup(&s);
- }
- s.address += s.page_size;
- }
-
- if (nand_fileio_finish(&s) == ERROR_OK) {
- command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
- "offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
- CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
- duration_kbps(&s.bench, total_bytes));
- }
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_nand_verify_command)
-{
- struct nand_device *nand = NULL;
- struct nand_fileio_state file;
- int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
- &file, &nand, FILEIO_READ, false, true);
- if (ERROR_OK != retval)
- return retval;
-
- struct nand_fileio_state dev;
- nand_fileio_init(&dev);
- dev.address = file.address;
- dev.size = file.size;
- dev.oob_format = file.oob_format;
- retval = nand_fileio_start(CMD_CTX, nand, NULL, FILEIO_NONE, &dev);
- if (ERROR_OK != retval)
- return retval;
-
- while (file.size > 0) {
- retval = nand_read_page(nand, dev.address / dev.page_size,
- dev.page, dev.page_size, dev.oob, dev.oob_size);
- if (ERROR_OK != retval) {
- command_print(CMD_CTX, "reading NAND flash page failed");
- nand_fileio_cleanup(&dev);
- nand_fileio_cleanup(&file);
- return retval;
- }
-
- int bytes_read = nand_fileio_read(nand, &file);
- if (bytes_read <= 0) {
- command_print(CMD_CTX, "error while reading file");
- nand_fileio_cleanup(&dev);
- nand_fileio_cleanup(&file);
- return ERROR_FAIL;
- }
-
- if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
- (dev.oob && memcmp(dev.oob, file.oob, dev.oob_size))) {
- command_print(CMD_CTX, "NAND flash contents differ "
- "at 0x%8.8" PRIx32, dev.address);
- nand_fileio_cleanup(&dev);
- nand_fileio_cleanup(&file);
- return ERROR_FAIL;
- }
-
- file.size -= bytes_read;
- dev.address += nand->page_size;
- }
-
- if (nand_fileio_finish(&file) == ERROR_OK) {
- command_print(CMD_CTX, "verified file %s in NAND flash %s "
- "up to offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
- CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
- duration_kbps(&file.bench, dev.size));
- }
-
- return nand_fileio_cleanup(&dev);
-}
-
-COMMAND_HANDLER(handle_nand_dump_command)
-{
- size_t filesize;
- struct nand_device *nand = NULL;
- struct nand_fileio_state s;
- int retval = CALL_COMMAND_HANDLER(nand_fileio_parse_args,
- &s, &nand, FILEIO_WRITE, true, false);
- if (ERROR_OK != retval)
- return retval;
-
- while (s.size > 0) {
- size_t size_written;
- retval = nand_read_page(nand, s.address / nand->page_size,
- s.page, s.page_size, s.oob, s.oob_size);
- if (ERROR_OK != retval) {
- command_print(CMD_CTX, "reading NAND flash page failed");
- nand_fileio_cleanup(&s);
- return retval;
- }
-
- if (NULL != s.page)
- fileio_write(s.fileio, s.page_size, s.page, &size_written);
-
- if (NULL != s.oob)
- fileio_write(s.fileio, s.oob_size, s.oob, &size_written);
-
- s.size -= nand->page_size;
- s.address += nand->page_size;
- }
-
- retval = fileio_size(s.fileio, &filesize);
- if (retval != ERROR_OK)
- return retval;
-
- if (nand_fileio_finish(&s) == ERROR_OK) {
- command_print(CMD_CTX, "dumped %zu bytes in %fs (%0.3f KiB/s)",
- filesize, duration_elapsed(&s.bench),
- duration_kbps(&s.bench, filesize));
- }
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_nand_raw_access_command)
-{
- if ((CMD_ARGC < 1) || (CMD_ARGC > 2))
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct nand_device *p;
- int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- if (NULL == p->device) {
- command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- if (CMD_ARGC == 2)
- COMMAND_PARSE_ENABLE(CMD_ARGV[1], p->use_raw);
-
- const char *msg = p->use_raw ? "enabled" : "disabled";
- command_print(CMD_CTX, "raw access is %s", msg);
-
- return ERROR_OK;
-}
-
-static const struct command_registration nand_exec_command_handlers[] = {
- {
- .name = "list",
- .handler = handle_nand_list_command,
- .mode = COMMAND_EXEC,
- .help = "list configured NAND flash devices",
- },
- {
- .name = "info",
- .handler = handle_nand_info_command,
- .mode = COMMAND_EXEC,
- .usage = "[banknum | first_bank_num last_bank_num]",
- .help = "print info about one or more NAND flash devices",
- },
- {
- .name = "probe",
- .handler = handle_nand_probe_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "identify NAND flash device",
- },
- {
- .name = "check_bad_blocks",
- .handler = handle_nand_check_bad_blocks_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id [offset length]",
- .help = "check all or part of NAND flash device for bad blocks",
- },
- {
- .name = "erase",
- .handler = handle_nand_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id [offset length]",
- .help = "erase all or subset of blocks on NAND flash device",
- },
- {
- .name = "dump",
- .handler = handle_nand_dump_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id filename offset length "
- "['oob_raw'|'oob_only']",
- .help = "dump from NAND flash device",
- },
- {
- .name = "verify",
- .handler = handle_nand_verify_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id filename offset "
- "['oob_raw'|'oob_only'|'oob_softecc'|'oob_softecc_kw']",
- .help = "verify NAND flash device",
- },
- {
- .name = "write",
- .handler = handle_nand_write_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id filename offset "
- "['oob_raw'|'oob_only'|'oob_softecc'|'oob_softecc_kw']",
- .help = "write to NAND flash device",
- },
- {
- .name = "raw_access",
- .handler = handle_nand_raw_access_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ['enable'|'disable']",
- .help = "raw access to NAND flash device",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static int nand_init(struct command_context *cmd_ctx)
-{
- if (!nand_devices)
- return ERROR_OK;
- struct command *parent = command_find_in_context(cmd_ctx, "nand");
- return register_commands(cmd_ctx, parent, nand_exec_command_handlers);
-}
-
-COMMAND_HANDLER(handle_nand_init_command)
-{
- if (CMD_ARGC != 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- static bool nand_initialized;
- if (nand_initialized) {
- LOG_INFO("'nand init' has already been called");
- return ERROR_OK;
- }
- nand_initialized = true;
-
- LOG_DEBUG("Initializing NAND devices...");
- return nand_init(CMD_CTX);
-}
-
-static int nand_list_walker(struct nand_flash_controller *c, void *x)
-{
- struct command_context *cmd_ctx = x;
- command_print(cmd_ctx, " %s", c->name);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_nand_list_drivers)
-{
- command_print(CMD_CTX, "Available NAND flash controller drivers:");
- return nand_driver_walk(&nand_list_walker, CMD_CTX);
-}
-
-static COMMAND_HELPER(create_nand_device, const char *bank_name,
- struct nand_flash_controller *controller)
-{
- struct nand_device *c;
- struct target *target;
- int retval;
-
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
- target = get_target(CMD_ARGV[1]);
- if (!target) {
- LOG_ERROR("invalid target %s", CMD_ARGV[1]);
- return ERROR_COMMAND_ARGUMENT_INVALID;
- }
-
- if (NULL != controller->commands) {
- retval = register_commands(CMD_CTX, NULL,
- controller->commands);
- if (ERROR_OK != retval)
- return retval;
- }
- c = malloc(sizeof(struct nand_device));
- if (c == NULL) {
- LOG_ERROR("End of memory");
- return ERROR_FAIL;
- }
-
- c->name = strdup(bank_name);
- c->target = target;
- c->controller = controller;
- c->controller_priv = NULL;
- c->manufacturer = NULL;
- c->device = NULL;
- c->bus_width = 0;
- c->address_cycles = 0;
- c->page_size = 0;
- c->use_raw = 0;
- c->next = NULL;
-
- retval = CALL_COMMAND_HANDLER(controller->nand_device_command, c);
- if (ERROR_OK != retval) {
- LOG_ERROR("'%s' driver rejected nand flash. Usage: %s",
- controller->name,
- controller->usage);
- free(c);
- return retval;
- }
-
- if (controller->usage == NULL)
- LOG_DEBUG("'%s' driver usage field missing", controller->name);
-
- nand_device_add(c);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_nand_device_command)
-{
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* save name and increment (for compatibility) with drivers */
- const char *bank_name = *CMD_ARGV++;
- CMD_ARGC--;
-
- const char *driver_name = CMD_ARGV[0];
- struct nand_flash_controller *controller;
- controller = nand_driver_find_by_name(CMD_ARGV[0]);
- if (NULL == controller) {
- LOG_ERROR("No valid NAND flash driver found (%s)", driver_name);
- return CALL_COMMAND_HANDLER(handle_nand_list_drivers);
- }
- return CALL_COMMAND_HANDLER(create_nand_device, bank_name, controller);
-}
-
-static const struct command_registration nand_config_command_handlers[] = {
- {
- .name = "device",
- .handler = &handle_nand_device_command,
- .mode = COMMAND_CONFIG,
- .help = "defines a new NAND bank",
- .usage = "bank_id driver target [driver_options ...]",
- },
- {
- .name = "drivers",
- .handler = &handle_nand_list_drivers,
- .mode = COMMAND_ANY,
- .help = "lists available NAND drivers",
- .usage = ""
- },
- {
- .name = "init",
- .mode = COMMAND_CONFIG,
- .handler = &handle_nand_init_command,
- .help = "initialize NAND devices",
- .usage = ""
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration nand_command_handlers[] = {
- {
- .name = "nand",
- .mode = COMMAND_ANY,
- .help = "NAND flash command group",
- .usage = "",
- .chain = nand_config_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-int nand_register_commands(struct command_context *cmd_ctx)
-{
- return register_commands(cmd_ctx, NULL, nand_command_handlers);
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/Makefile.am
deleted file mode 100755
index b6a2be3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/Makefile.am
+++ /dev/null
@@ -1,70 +0,0 @@
-include $(top_srcdir)/common.mk
-
-noinst_LTLIBRARIES = libocdflashnor.la
-libocdflashnor_la_SOURCES = \
- core.c \
- tcl.c \
- $(NOR_DRIVERS) \
- drivers.c
-
-NOR_DRIVERS = \
- aduc702x.c \
- aducm360.c \
- ambiqmicro.c \
- at91sam4.c \
- at91sam4l.c \
- at91samd.c \
- at91sam3.c \
- at91sam7.c \
- atsamv.c \
- avrf.c \
- cfi.c \
- dsp5680xx_flash.c \
- efm32.c \
- em357.c \
- faux.c \
- fm3.c \
- fm4.c \
- jtagspi.c \
- kinetis.c \
- kinetis_ke.c \
- lpc2000.c \
- lpc288x.c \
- lpc2900.c \
- lpcspifi.c \
- mdr.c \
- mrvlqspi.c \
- niietcm4.c \
- non_cfi.c \
- nrf51.c \
- nrf52.c \
- numicro.c \
- ocl.c \
- pic32mx.c \
- psoc4.c \
- sim3x.c \
- spi.c \
- stmsmi.c \
- stellaris.c \
- stm32f1x.c \
- stm32f2x.c \
- stm32lx.c \
- stm32l4x.c \
- str7x.c \
- str9x.c \
- str9xpec.c \
- tms470.c \
- virtual.c \
- xmc1xxx.c \
- xmc4xxx.c
-
-noinst_HEADERS = \
- core.h \
- cfi.h \
- driver.h \
- imp.h \
- non_cfi.h \
- ocl.h \
- spi.h
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/Makefile.am.orig
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/Makefile.am.orig b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/Makefile.am.orig
deleted file mode 100755
index b6a2be3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/Makefile.am.orig
+++ /dev/null
@@ -1,70 +0,0 @@
-include $(top_srcdir)/common.mk
-
-noinst_LTLIBRARIES = libocdflashnor.la
-libocdflashnor_la_SOURCES = \
- core.c \
- tcl.c \
- $(NOR_DRIVERS) \
- drivers.c
-
-NOR_DRIVERS = \
- aduc702x.c \
- aducm360.c \
- ambiqmicro.c \
- at91sam4.c \
- at91sam4l.c \
- at91samd.c \
- at91sam3.c \
- at91sam7.c \
- atsamv.c \
- avrf.c \
- cfi.c \
- dsp5680xx_flash.c \
- efm32.c \
- em357.c \
- faux.c \
- fm3.c \
- fm4.c \
- jtagspi.c \
- kinetis.c \
- kinetis_ke.c \
- lpc2000.c \
- lpc288x.c \
- lpc2900.c \
- lpcspifi.c \
- mdr.c \
- mrvlqspi.c \
- niietcm4.c \
- non_cfi.c \
- nrf51.c \
- nrf52.c \
- numicro.c \
- ocl.c \
- pic32mx.c \
- psoc4.c \
- sim3x.c \
- spi.c \
- stmsmi.c \
- stellaris.c \
- stm32f1x.c \
- stm32f2x.c \
- stm32lx.c \
- stm32l4x.c \
- str7x.c \
- str9x.c \
- str9xpec.c \
- tms470.c \
- virtual.c \
- xmc1xxx.c \
- xmc4xxx.c
-
-noinst_HEADERS = \
- core.h \
- cfi.h \
- driver.h \
- imp.h \
- non_cfi.h \
- ocl.h \
- spi.h
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/aduc702x.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/aduc702x.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/aduc702x.c
deleted file mode 100755
index 8852245..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/aduc702x.c
+++ /dev/null
@@ -1,406 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2008 by Kevin McGuire *
- * Copyright (C) 2008 by Marcel Wijlaars *
- * Copyright (C) 2009 by Michael Ashton *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <helper/time_support.h>
-#include <target/algorithm.h>
-#include <target/arm.h>
-
-static int aduc702x_build_sector_list(struct flash_bank *bank);
-static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms);
-static int aduc702x_set_write_enable(struct target *target, int enable);
-
-#define ADUC702x_FLASH 0xfffff800
-#define ADUC702x_FLASH_FEESTA (0*4)
-#define ADUC702x_FLASH_FEEMOD (1*4)
-#define ADUC702x_FLASH_FEECON (2*4)
-#define ADUC702x_FLASH_FEEDAT (3*4)
-#define ADUC702x_FLASH_FEEADR (4*4)
-#define ADUC702x_FLASH_FEESIGN (5*4)
-#define ADUC702x_FLASH_FEEPRO (6*4)
-#define ADUC702x_FLASH_FEEHIDE (7*4)
-
-/* flash bank aduc702x 0 0 0 0 <target#>
- * The ADC7019-28 devices all have the same flash layout */
-FLASH_BANK_COMMAND_HANDLER(aduc702x_flash_bank_command)
-{
- bank->base = 0x80000;
- bank->size = 0xF800; /* top 4k not accessible */
-
- aduc702x_build_sector_list(bank);
-
- return ERROR_OK;
-}
-
-static int aduc702x_build_sector_list(struct flash_bank *bank)
-{
- /* aduc7026_struct flash_bank *aduc7026_info = bank->driver_priv; */
-
- int i = 0;
- uint32_t offset = 0;
-
- /* sector size is 512 */
- bank->num_sectors = bank->size / 512;
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- for (i = 0; i < bank->num_sectors; ++i) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = 512;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 0;
- }
-
- return ERROR_OK;
-}
-
-static int aduc702x_protect_check(struct flash_bank *bank)
-{
- printf("aduc702x_protect_check not implemented yet.\n");
- return ERROR_OK;
-}
-
-static int aduc702x_erase(struct flash_bank *bank, int first, int last)
-{
- /* int res; */
- int x;
- int count;
- /* uint32_t v; */
- struct target *target = bank->target;
-
- aduc702x_set_write_enable(target, 1);
-
- /* mass erase */
- if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
- LOG_DEBUG("performing mass erase.");
- target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
- target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
- target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
-
- if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK) {
- LOG_ERROR("mass erase failed");
- aduc702x_set_write_enable(target, 0);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- LOG_DEBUG("mass erase successful.");
- return ERROR_OK;
- } else {
- unsigned long adr;
-
- count = last - first + 1;
- for (x = 0; x < count; ++x) {
- adr = bank->base + ((first + x) * 512);
-
- target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
- target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
-
- if (aduc702x_check_flash_completion(target, 50) != ERROR_OK) {
- LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
- aduc702x_set_write_enable(target, 0);
- return ERROR_FLASH_SECTOR_NOT_ERASED;
- }
-
- LOG_DEBUG("erased sector at address 0x%08lX", adr);
- }
- }
-
- aduc702x_set_write_enable(target, 0);
-
- return ERROR_OK;
-}
-
-static int aduc702x_protect(struct flash_bank *bank, int set, int first, int last)
-{
- printf("aduc702x_protect not implemented yet.\n");
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-/* If this fn returns ERROR_TARGET_RESOURCE_NOT_AVAILABLE, then the caller can fall
- * back to another mechanism that does not require onboard RAM
- *
- * Caller should not check for other return values specifically
- */
-static int aduc702x_write_block(struct flash_bank *bank,
- const uint8_t *buffer,
- uint32_t offset,
- uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 7000;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[6];
- struct arm_algorithm arm_algo;
- int retval = ERROR_OK;
-
- if (((count%2) != 0) || ((offset%2) != 0)) {
- LOG_ERROR("write block must be multiple of two bytes in offset & length");
- return ERROR_FAIL;
- }
-
- /* parameters:
-
- r0 - address of source data (absolute)
- r1 - number of halfwords to be copied
- r2 - start address in flash (offset from beginning of flash memory)
- r3 - exit code
- r4 - base address of flash controller (0xFFFFF800)
-
- registers:
-
- r5 - scratch
- r6 - set to 2, used to write flash command
-
- */
- static const uint32_t aduc702x_flash_write_code[] = {
- /* <_start>: */
- 0xe3a05008, /* mov r5, #8 ; 0x8 */
- 0xe5845004, /* str r5, [r4, #4] */
- 0xe3a06002, /* mov r6, #2 ; 0x2 */
- /* <next>: */
- 0xe1c421b0, /* strh r2, [r4, #16] */
- 0xe0d050b2, /* ldrh r5, [r0], #2 */
- 0xe1c450bc, /* strh r5, [r4, #12] */
- 0xe5c46008, /* strb r6, [r4, #8] */
- /* <wait_complete>: */
- 0xe1d430b0, /* ldrh r3, [r4] */
- 0xe3130004, /* tst r3, #4 ; 0x4 */
- 0x1afffffc, /* bne 1001c <wait_complete> */
- 0xe2822002, /* add r2, r2, #2 ; 0x2 */
- 0xe2511001, /* subs r1, r1, #1 ; 0x1 */
- 0x0a000001, /* beq 1003c <done> */
- 0xe3130001, /* tst r3, #1 ; 0x1 */
- 0x1afffff3, /* bne 1000c <next> */
- /* <done>: */
- 0xeafffffe /* b 1003c <done> */
- };
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- uint8_t code[sizeof(aduc702x_flash_write_code)];
- target_buffer_set_u32_array(target, code, ARRAY_SIZE(aduc702x_flash_write_code),
- aduc702x_flash_write_code);
- retval = target_write_buffer(target, write_algorithm->address, sizeof(code), code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a buffer,
- *free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- arm_algo.common_magic = ARM_COMMON_MAGIC;
- arm_algo.core_mode = ARM_MODE_SVC;
- arm_algo.core_state = ARM_STATE_ARM;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_IN);
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
-
- while (count > 0) {
- uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
-
- retval = target_write_buffer(target, source->address, thisrun_count, buffer);
- if (retval != ERROR_OK)
- break;
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, thisrun_count/2);
- buf_set_u32(reg_params[2].value, 0, 32, address);
- buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800);
-
- retval = target_run_algorithm(target, 0, NULL, 5,
- reg_params, write_algorithm->address,
- write_algorithm->address +
- sizeof(aduc702x_flash_write_code) - 4,
- 10000, &arm_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("error executing aduc702x flash write algorithm");
- break;
- }
-
- if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1) {
- /* FIX!!!! what does this mean??? replace w/sensible error message */
- LOG_ERROR("aduc702x detected error writing flash");
- retval = ERROR_FAIL;
- break;
- }
-
- buffer += thisrun_count;
- address += thisrun_count;
- count -= thisrun_count;
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return retval;
-}
-
-/* All-JTAG, single-access method. Very slow. Used only if there is no
- * working area available. */
-static int aduc702x_write_single(struct flash_bank *bank,
- const uint8_t *buffer,
- uint32_t offset,
- uint32_t count)
-{
- uint32_t x;
- uint8_t b;
- struct target *target = bank->target;
-
- aduc702x_set_write_enable(target, 1);
-
- for (x = 0; x < count; x += 2) {
- /* FEEADR = address */
- target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
-
- /* set up data */
- if ((x + 1) == count) {
- /* last byte */
- target_read_u8(target, offset + x + 1, &b);
- } else
- b = buffer[x + 1];
-
- target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
-
- /* do single-write command */
- target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
-
- if (aduc702x_check_flash_completion(target, 1) != ERROR_OK) {
- LOG_ERROR("single write failed for address 0x%08lX",
- (unsigned long)(offset + x));
- aduc702x_set_write_enable(target, 0);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- }
- LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
-
- aduc702x_set_write_enable(target, 0);
-
- return ERROR_OK;
-}
-
-static int aduc702x_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- int retval;
-
- /* try using a block write */
- retval = aduc702x_write_block(bank, buffer, offset, count);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * use normal (slow) JTAG method */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
-
- retval = aduc702x_write_single(bank, buffer, offset, count);
- if (retval != ERROR_OK) {
- LOG_ERROR("slow write failed");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
- }
-
- return retval;
-}
-
-static int aduc702x_probe(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-/* sets FEEMOD bit 3
- * enable = 1 enables writes & erases, 0 disables them */
-static int aduc702x_set_write_enable(struct target *target, int enable)
-{
- /* don't bother to preserve int enable bit here */
- target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
-
- return ERROR_OK;
-}
-
-/* wait up to timeout_ms for controller to not be busy,
- * then check whether the command passed or failed.
- *
- * this function sleeps 1ms between checks (after the first one),
- * so in some cases may slow things down without a usleep after the first read */
-static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms)
-{
- uint8_t v = 4;
-
- long long endtime = timeval_ms() + timeout_ms;
- while (1) {
- target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
- if ((v & 4) == 0)
- break;
- alive_sleep(1);
- if (timeval_ms() >= endtime)
- break;
- }
-
- if (v & 2)
- return ERROR_FAIL;
- /* if a command is ignored, both the success and fail bits may be 0 */
- else if ((v & 3) == 0)
- return ERROR_FAIL;
- else
- return ERROR_OK;
-}
-
-struct flash_driver aduc702x_flash = {
- .name = "aduc702x",
- .flash_bank_command = aduc702x_flash_bank_command,
- .erase = aduc702x_erase,
- .protect = aduc702x_protect,
- .write = aduc702x_write,
- .read = default_flash_read,
- .probe = aduc702x_probe,
- .auto_probe = aduc702x_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = aduc702x_protect_check,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/aducm360.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/aducm360.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/aducm360.c
deleted file mode 100755
index 3e446f5..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/aducm360.c
+++ /dev/null
@@ -1,580 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 by Ivan Buliev *
- * i.buliev@mikrosistemi.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- ***************************************************************************/
-
-/***************************************************************************
- * This version for ADuCM360 is largely based on the following flash *
- * drivers: *
- * - aduc702x.c *
- * Copyright (C) 2008 by Kevin McGuire *
- * Copyright (C) 2008 by Marcel Wijlaars *
- * Copyright (C) 2009 by Michael Ashton *
- * and *
- * - stm32f1x.c *
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <helper/time_support.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-static int aducm360_build_sector_list(struct flash_bank *bank);
-static int aducm360_check_flash_completion(struct target *target, unsigned int timeout_ms);
-static int aducm360_set_write_enable(struct target *target, int enable);
-
-#define ADUCM360_FLASH_BASE 0x40002800
-#define ADUCM360_FLASH_FEESTA 0x0000
-#define ADUCM360_FLASH_FEECON0 0x0004
-#define ADUCM360_FLASH_FEECMD 0x0008
-#define ADUCM360_FLASH_FEEADR0L 0x0010
-#define ADUCM360_FLASH_FEEADR0H 0x0014
-#define ADUCM360_FLASH_FEEADR1L 0x0018
-#define ADUCM360_FLASH_FEEADR1H 0x001C
-#define ADUCM360_FLASH_FEEKEY 0x0020
-#define ADUCM360_FLASH_FEEPROL 0x0028
-#define ADUCM360_FLASH_FEEPROH 0x002C
-#define ADUCM360_FLASH_FEESIGL 0x0030
-#define ADUCM360_FLASH_FEESIGH 0x0034
-#define ADUCM360_FLASH_FEECON1 0x0038
-#define ADUCM360_FLASH_FEEADRAL 0x0048
-#define ADUCM360_FLASH_FEEADRAH 0x004C
-#define ADUCM360_FLASH_FEEAEN0 0x0078
-#define ADUCM360_FLASH_FEEAEN1 0x007C
-#define ADUCM360_FLASH_FEEAEN2 0x0080
-
-/* flash bank aducm360 0 0 0 0 <target#> */
-FLASH_BANK_COMMAND_HANDLER(aducm360_flash_bank_command)
-{
- bank->base = 0x00000000;
- bank->size = 0x00020000;
-
- aducm360_build_sector_list(bank);
-
- return ERROR_OK;
-}
-
-#define FLASH_SECTOR_SIZE 512
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_build_sector_list(struct flash_bank *bank)
-{
- int i = 0;
- uint32_t offset = 0;
-
- /* sector size is 512 */
- bank->num_sectors = bank->size / FLASH_SECTOR_SIZE;
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- for (i = 0; i < bank->num_sectors; ++i) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = FLASH_SECTOR_SIZE;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 0;
- }
-
- return ERROR_OK;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_protect_check(struct flash_bank *bank)
-{
- LOG_WARNING("aducm360_protect_check not implemented.");
- return ERROR_OK;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_mass_erase(struct target *target)
-{
- uint32_t value;
- int res = ERROR_OK;
-
- /* Clear any old status */
- target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEESTA, &value);
-
- /* Enable the writing to the flash*/
- aducm360_set_write_enable(target, 1);
-
- /* Unlock for writing */
- target_write_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEEKEY, 0x0000F456);
- target_write_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEEKEY, 0x0000F123);
- /* Issue the 'MASSERASE' command */
- target_write_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEECMD, 0x00000003);
-
- /* Check the result */
- res = aducm360_check_flash_completion(target, 3500);
- if (res != ERROR_OK) {
- LOG_ERROR("mass erase failed.");
- aducm360_set_write_enable(target, 0);
- res = ERROR_FLASH_OPERATION_FAILED;
- }
-
- return res;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_page_erase(struct target *target, uint32_t padd)
-{
- uint32_t value;
- int res = ERROR_OK;
-
- /* Clear any old status */
- target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEESTA, &value);
-
- /* Enable the writing to the flash*/
- aducm360_set_write_enable(target, 1);
-
- /* Unlock for writing */
- target_write_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEEKEY, 0x0000F456);
- target_write_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEEKEY, 0x0000F123);
- /* Write the sector address */
- target_write_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEEADR0L, padd & 0xFFFF);
- target_write_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEEADR0H, (padd>>16) & 0xFFFF);
- /* Issue the 'ERASEPAGE' command */
- target_write_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEECMD, 0x00000001);
-
- /* Check the result */
- res = aducm360_check_flash_completion(target, 50);
- if (res != ERROR_OK) {
- LOG_ERROR("page erase failed at 0x%08" PRIx32, padd);
- aducm360_set_write_enable(target, 0);
- res = ERROR_FLASH_OPERATION_FAILED;
- }
-
- return res;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_erase(struct flash_bank *bank, int first, int last)
-{
- int res = ERROR_OK;
- int i;
- int count;
- struct target *target = bank->target;
- uint32_t padd;
-
- if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
- res = aducm360_mass_erase(target);
- } else {
- count = last - first + 1;
- for (i = 0; i < count; ++i) {
- padd = bank->base + ((first+i)*FLASH_SECTOR_SIZE);
- res = aducm360_page_erase(target, padd);
- if (res != ERROR_OK)
- break;
- }
- }
-
- return res;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_protect(struct flash_bank *bank, int set, int first, int last)
-{
- LOG_ERROR("aducm360_protect not implemented.");
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_write_block_sync(
- struct flash_bank *bank,
- const uint8_t *buffer,
- uint32_t offset,
- uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t target_buffer_size = 8192;
- struct working_area *helper;
- struct working_area *target_buffer;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[8];
- int retval = ERROR_OK;
- uint32_t entry_point = 0, exit_point = 0;
- uint32_t res;
- struct armv7m_algorithm armv7m_algo;
-
- static const uint32_t aducm360_flash_write_code[] = {
- /* helper.code */
- 0x88AF4D10, 0x0704F047, 0x682F80AF, 0x600E6806,
- 0xF017882F, 0xF43F0F08, 0xF851AFFB, 0x42B77B04,
- 0x800DF040, 0x0004F100, 0xF47F3A04, 0x686FAFEF,
- 0x0704F027, 0xF04F80AF, 0xF0000400, 0xF04FB802,
- 0xBE000480, 0x40002800, 0x00015000, 0x20000000,
- 0x00013000
- };
-
- LOG_DEBUG("'aducm360_write_block_sync' requested, dst:0x%08" PRIx32 ", count:0x%08" PRIx32 "bytes.",
- address, count);
-
- /* ----- Check the destination area for a Long Word alignment ----- */
- if (((count%4) != 0) || ((offset%4) != 0)) {
- LOG_ERROR("write block must be multiple of four bytes in offset & length");
- return ERROR_FAIL;
- }
-
- /* ----- Allocate space in the target's RAM for the helper code ----- */
- if (target_alloc_working_area(target, sizeof(aducm360_flash_write_code),
- &helper) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* ----- Upload the helper code to the space in the target's RAM ----- */
- uint8_t code[sizeof(aducm360_flash_write_code)];
- target_buffer_set_u32_array(target, code, ARRAY_SIZE(aducm360_flash_write_code),
- aducm360_flash_write_code);
- retval = target_write_buffer(target, helper->address, sizeof(code), code);
- if (retval != ERROR_OK)
- return retval;
- entry_point = helper->address;
-
- /* ----- Allocate space in the target's RAM for the user application's object code ----- */
- while (target_alloc_working_area_try(target, target_buffer_size, &target_buffer) != ERROR_OK) {
- LOG_WARNING("couldn't allocate a buffer space of 0x%08" PRIx32 "bytes in the target's SRAM.",
- target_buffer_size);
- target_buffer_size /= 2;
- if (target_buffer_size <= 256) { /* No room available */
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- target_free_working_area(target, helper);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- /* ----- Prepare the target for the helper ----- */
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /*SRC */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /*DST */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /*COUNT */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /*not used */
- init_reg_param(®_params[4], "r4", 32, PARAM_IN); /*RESULT */
-
- /* ===== Execute the Main Programming Loop! ===== */
- while (count > 0) {
- uint32_t thisrun_count = (count > target_buffer_size) ? target_buffer_size : count;
-
- /* ----- Upload the chunk ----- */
- retval = target_write_buffer(target, target_buffer->address, thisrun_count, buffer);
- if (retval != ERROR_OK)
- break;
- /* Set the arguments for the helper */
- buf_set_u32(reg_params[0].value, 0, 32, target_buffer->address); /*SRC */
- buf_set_u32(reg_params[1].value, 0, 32, address); /*DST */
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); /*COUNT */
- buf_set_u32(reg_params[3].value, 0, 32, 0); /*NOT USED*/
-
- retval = target_run_algorithm(target, 0, NULL, 5,
- reg_params, entry_point, exit_point, 10000, &armv7m_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("error executing aducm360 flash write algorithm");
- break;
- }
-
- res = buf_get_u32(reg_params[4].value, 0, 32);
- if (res) {
- LOG_ERROR("aducm360 fast sync algorithm reports an error (%02X)", res);
- retval = ERROR_FAIL;
- break;
- }
-
- buffer += thisrun_count;
- address += thisrun_count;
- count -= thisrun_count;
- }
-
- target_free_working_area(target, target_buffer);
- target_free_working_area(target, helper);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return retval;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_write_block_async(
- struct flash_bank *bank,
- const uint8_t *buffer,
- uint32_t offset,
- uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t target_buffer_size = 1024;
- struct working_area *helper;
- struct working_area *target_buffer;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[9];
- int retval = ERROR_OK;
- uint32_t entry_point = 0, exit_point = 0;
- uint32_t res;
- uint32_t wcount;
- struct armv7m_algorithm armv7m_algo;
-
- static const uint32_t aducm360_flash_write_code[] = {
- /* helper.code */
- 0x4050F8DF, 0xF04588A5, 0x80A50504, 0x8000F8D0,
- 0x0F00F1B8, 0x8016F000, 0x45476847, 0xAFF6F43F,
- 0x6B04F857, 0x6B04F842, 0xF0158825, 0xF43F0F08,
- 0x428FAFFB, 0xF100BF28, 0x60470708, 0xB10B3B01,
- 0xBFE4F7FF, 0xF02588A5, 0x80A50504, 0x0900F04F,
- 0xBE00BF00, 0x40002800, 0x20000000, 0x20000100,
- 0x00013000
- };
-
- LOG_DEBUG("'aducm360_write_block_async' requested, dst:0x%08" PRIx32 ", count:0x%08" PRIx32 "bytes.",
- address, count);
-
- /* ----- Check the destination area for a Long Word alignment ----- */
- if (((count%4) != 0) || ((offset%4) != 0)) {
- LOG_ERROR("write block must be multiple of four bytes in offset & length");
- return ERROR_FAIL;
- }
- wcount = count/4;
-
- /* ----- Allocate space in the target's RAM for the helper code ----- */
- if (target_alloc_working_area(target, sizeof(aducm360_flash_write_code),
- &helper) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* ----- Upload the helper code to the space in the target's RAM ----- */
- uint8_t code[sizeof(aducm360_flash_write_code)];
- target_buffer_set_u32_array(target, code, ARRAY_SIZE(aducm360_flash_write_code),
- aducm360_flash_write_code);
- retval = target_write_buffer(target, helper->address, sizeof(code), code);
- if (retval != ERROR_OK)
- return retval;
- entry_point = helper->address;
-
- /* ----- Allocate space in the target's RAM for the user application's object code ----- */
- while (target_alloc_working_area_try(target, target_buffer_size, &target_buffer) != ERROR_OK) {
- LOG_WARNING("couldn't allocate a buffer space of 0x%08" PRIx32 "bytes in the target's SRAM.",
- target_buffer_size);
- target_buffer_size /= 2;
- if (target_buffer_size <= 256) { /* No room available */
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- target_free_working_area(target, helper);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- /* ----- Prepare the target for the helper ----- */
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /*SRCBEG */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /*SRCEND */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /*DST */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /*COUNT (LWs)*/
- init_reg_param(®_params[4], "r9", 32, PARAM_IN); /*RESULT */
-
- buf_set_u32(reg_params[0].value, 0, 32, target_buffer->address);
- buf_set_u32(reg_params[1].value, 0, 32, target_buffer->address + target_buffer->size);
- buf_set_u32(reg_params[2].value, 0, 32, address);
- buf_set_u32(reg_params[3].value, 0, 32, wcount);
-
- retval = target_run_flash_async_algorithm(target, buffer, wcount, 4,
- 0, NULL,
- 5, reg_params,
- target_buffer->address, target_buffer->size,
- entry_point, exit_point,
- &armv7m_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("error executing aducm360 flash write algorithm");
- } else {
- res = buf_get_u32(reg_params[4].value, 0, 32); /*RESULT*/
- if (res) {
- LOG_ERROR("aducm360 fast async algorithm reports an error (%02X)", res);
- retval = ERROR_FAIL;
- }
- }
-
- target_free_working_area(target, target_buffer);
- target_free_working_area(target, helper);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return retval;
-}
-
-/* ----------------------------------------------------------------------- */
-/* If this fn returns ERROR_TARGET_RESOURCE_NOT_AVAILABLE, then the caller can fall
- * back to another mechanism that does not require onboard RAM
- *
- * Caller should not check for other return values specifically
- */
-static int aducm360_write_block(struct flash_bank *bank,
- const uint8_t *buffer,
- uint32_t offset,
- uint32_t count)
-{
- int choice = 0;
-
- switch (choice) {
- case 0:
- return aducm360_write_block_sync(bank, buffer, offset, count);
- break;
- case 1:
- return aducm360_write_block_async(bank, buffer, offset, count);
- break;
- default:
- LOG_ERROR("aducm360_write_block was cancelled (no writing method was chosen)!");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-}
-
-/* ----------------------------------------------------------------------- */
-#define FEESTA_WRDONE 0x00000008
-
-static int aducm360_write_modified(struct flash_bank *bank,
- const uint8_t *buffer,
- uint32_t offset,
- uint32_t count)
-{
- uint32_t value;
- int res = ERROR_OK;
- uint32_t i, j, a, d;
- struct target *target = bank->target;
-
- LOG_DEBUG("performing slow write (offset=0x%08" PRIx32 ", count=0x%08" PRIx32 ")...",
- offset, count);
-
- /* Enable the writing to the flash */
- aducm360_set_write_enable(target, 1);
-
- /* Clear any old status */
- target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEESTA, &value);
-
- for (i = 0; i < count; i += 4) {
- a = offset+i;
- for (j = 0; i < 4; i += 1)
- *((uint8_t *)(&d) + j) = buffer[i+j];
- target_write_u32(target, a, d);
- do {
- target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEESTA, &value);
- } while (!(value & FEESTA_WRDONE));
- }
- aducm360_set_write_enable(target, 0);
-
- return res;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- int retval;
-
- /* try using a block write */
- retval = aducm360_write_block(bank, buffer, offset, count);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * use normal (slow) JTAG method */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
-
- retval = aducm360_write_modified(bank, buffer, offset, count);
- if (retval != ERROR_OK) {
- LOG_ERROR("slow write failed");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
- }
- return retval;
-}
-
-/* ----------------------------------------------------------------------- */
-static int aducm360_probe(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-/* ----------------------------------------------------------------------- */
-/* sets FEECON0 bit 2
- * enable = 1 enables writes & erases, 0 disables them */
-static int aducm360_set_write_enable(struct target *target, int enable)
-{
- /* don't bother to preserve int enable bit here */
- uint32_t value;
-
- target_read_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEECON0, &value);
- if (enable)
- value |= 0x00000004;
- else
- value &= ~0x00000004;
- target_write_u32(target, ADUCM360_FLASH_BASE + ADUCM360_FLASH_FEECON0, value);
-
- return ERROR_OK;
-}
-
-/* ----------------------------------------------------------------------- */
-/* wait up to timeout_ms for controller to not be busy,
- * then check whether the command passed or failed.
- *
- * this function sleeps 1ms between checks (after the first one),
- * so in some cases may slow things down without a usleep after the first read */
-static int aducm360_check_flash_completion(struct target *target, unsigned int timeout_ms)
-{
- uint32_t v = 1;
-
- long long endtime = timeval_ms() + timeout_ms;
- while (1) {
- target_read_u32(target, ADUCM360_FLASH_BASE+ADUCM360_FLASH_FEESTA, &v);
- if ((v & 0x00000001) == 0)
- break;
- alive_sleep(1);
- if (timeval_ms() >= endtime)
- break;
- }
-
- if (!(v & 0x00000004)) /* b2 */
- return ERROR_FAIL;
-
- return ERROR_OK;
-}
-
-/* ----------------------------------------------------------------------- */
-struct flash_driver aducm360_flash = {
- .name = "aducm360",
- .flash_bank_command = aducm360_flash_bank_command,
- .erase = aducm360_erase,
- .protect = aducm360_protect,
- .write = aducm360_write,
- .read = default_flash_read,
- .probe = aducm360_probe,
- .auto_probe = aducm360_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = aducm360_protect_check,
-};
[30/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/cfi.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/cfi.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/cfi.c
deleted file mode 100755
index bf313ec..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/cfi.c
+++ /dev/null
@@ -1,3097 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2009 Michael Schwingen *
- * michael@schwingen.org *
- * Copyright (C) 2010 �yvind Harboe <oy...@zylin.com> *
- * Copyright (C) 2010 by Antonio Borneo <bo...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "cfi.h"
-#include "non_cfi.h"
-#include <target/arm.h>
-#include <target/arm7_9_common.h>
-#include <target/armv7m.h>
-#include <target/mips32.h>
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-
-#define CFI_MAX_BUS_WIDTH 4
-#define CFI_MAX_CHIP_WIDTH 4
-
-/* defines internal maximum size for code fragment in cfi_intel_write_block() */
-#define CFI_MAX_INTEL_CODESIZE 256
-
-/* some id-types with specific handling */
-#define AT49BV6416 0x00d6
-#define AT49BV6416T 0x00d2
-
-static const struct cfi_unlock_addresses cfi_unlock_addresses[] = {
- [CFI_UNLOCK_555_2AA] = { .unlock1 = 0x555, .unlock2 = 0x2aa },
- [CFI_UNLOCK_5555_2AAA] = { .unlock1 = 0x5555, .unlock2 = 0x2aaa },
-};
-
-static const int cfi_status_poll_mask_dq6_dq7 = CFI_STATUS_POLL_MASK_DQ6_DQ7;
-
-/* CFI fixups forward declarations */
-static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *param);
-static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, const void *param);
-static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, const void *param);
-static void cfi_fixup_0002_write_buffer(struct flash_bank *bank, const void *param);
-static void cfi_fixup_0002_polling_bits(struct flash_bank *bank, const void *param);
-
-/* fixup after reading cmdset 0002 primary query table */
-static const struct cfi_fixup cfi_0002_fixups[] = {
- {CFI_MFR_SST, 0x00D4, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
- {CFI_MFR_SST, 0x00D5, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
- {CFI_MFR_SST, 0x00D6, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
- {CFI_MFR_SST, 0x00D7, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
- {CFI_MFR_SST, 0x2780, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
- {CFI_MFR_SST, 0x274b, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
- {CFI_MFR_SST, 0x235f, cfi_fixup_0002_polling_bits, /* 39VF3201C */
- &cfi_status_poll_mask_dq6_dq7},
- {CFI_MFR_SST, 0x236d, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
- {CFI_MFR_ATMEL, 0x00C8, cfi_fixup_reversed_erase_regions, NULL},
- {CFI_MFR_ST, 0x22C4, cfi_fixup_reversed_erase_regions, NULL}, /* M29W160ET */
- {CFI_MFR_FUJITSU, 0x22ea, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
- {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]},
- {CFI_MFR_AMIC, 0xb31a, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
- {CFI_MFR_MX, 0x225b, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
- {CFI_MFR_EON, 0x225b, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
- {CFI_MFR_AMD, 0x225b, cfi_fixup_0002_unlock_addresses,
- &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]},
- {CFI_MFR_ANY, CFI_ID_ANY, cfi_fixup_0002_erase_regions, NULL},
- {CFI_MFR_ST, 0x227E, cfi_fixup_0002_write_buffer, NULL},/* M29W128G */
- {0, 0, NULL, NULL}
-};
-
-/* fixup after reading cmdset 0001 primary query table */
-static const struct cfi_fixup cfi_0001_fixups[] = {
- {0, 0, NULL, NULL}
-};
-
-static void cfi_fixup(struct flash_bank *bank, const struct cfi_fixup *fixups)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- const struct cfi_fixup *f;
-
- for (f = fixups; f->fixup; f++) {
- if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi_info->manufacturer)) &&
- ((f->id == CFI_ID_ANY) || (f->id == cfi_info->device_id)))
- f->fixup(bank, f->param);
- }
-}
-
-static inline uint32_t flash_address(struct flash_bank *bank, int sector, uint32_t offset)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
-
- if (cfi_info->x16_as_x8)
- offset *= 2;
-
- /* while the sector list isn't built, only accesses to sector 0 work */
- if (sector == 0)
- return bank->base + offset * bank->bus_width;
- else {
- if (!bank->sectors) {
- LOG_ERROR("BUG: sector list not yet built");
- exit(-1);
- }
- return bank->base + bank->sectors[sector].offset + offset * bank->bus_width;
- }
-}
-
-static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf)
-{
- int i;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
-
- /* clear whole buffer, to ensure bits that exceed the bus_width
- * are set to zero
- */
- for (i = 0; i < CFI_MAX_BUS_WIDTH; i++)
- cmd_buf[i] = 0;
-
- if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) {
- for (i = bank->bus_width; i > 0; i--)
- *cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd;
- } else {
- for (i = 1; i <= bank->bus_width; i++)
- *cmd_buf++ = (i & (bank->chip_width - 1)) ? 0x0 : cmd;
- }
-}
-
-static int cfi_send_command(struct flash_bank *bank, uint8_t cmd, uint32_t address)
-{
- uint8_t command[CFI_MAX_BUS_WIDTH];
-
- cfi_command(bank, cmd, command);
- return target_write_memory(bank->target, address, bank->bus_width, 1, command);
-}
-
-/* read unsigned 8-bit value from the bank
- * flash banks are expected to be made of similar chips
- * the query result should be the same for all
- */
-static int cfi_query_u8(struct flash_bank *bank, int sector, uint32_t offset, uint8_t *val)
-{
- struct target *target = bank->target;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- uint8_t data[CFI_MAX_BUS_WIDTH];
-
- int retval;
- retval = target_read_memory(target, flash_address(bank, sector, offset),
- bank->bus_width, 1, data);
- if (retval != ERROR_OK)
- return retval;
-
- if (cfi_info->endianness == TARGET_LITTLE_ENDIAN)
- *val = data[0];
- else
- *val = data[bank->bus_width - 1];
-
- return ERROR_OK;
-}
-
-/* read unsigned 8-bit value from the bank
- * in case of a bank made of multiple chips,
- * the individual values are ORed
- */
-static int cfi_get_u8(struct flash_bank *bank, int sector, uint32_t offset, uint8_t *val)
-{
- struct target *target = bank->target;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- uint8_t data[CFI_MAX_BUS_WIDTH];
- int i;
-
- int retval;
- retval = target_read_memory(target, flash_address(bank, sector, offset),
- bank->bus_width, 1, data);
- if (retval != ERROR_OK)
- return retval;
-
- if (cfi_info->endianness == TARGET_LITTLE_ENDIAN) {
- for (i = 0; i < bank->bus_width / bank->chip_width; i++)
- data[0] |= data[i];
-
- *val = data[0];
- } else {
- uint8_t value = 0;
- for (i = 0; i < bank->bus_width / bank->chip_width; i++)
- value |= data[bank->bus_width - 1 - i];
-
- *val = value;
- }
- return ERROR_OK;
-}
-
-static int cfi_query_u16(struct flash_bank *bank, int sector, uint32_t offset, uint16_t *val)
-{
- struct target *target = bank->target;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- uint8_t data[CFI_MAX_BUS_WIDTH * 2];
- int retval;
-
- if (cfi_info->x16_as_x8) {
- uint8_t i;
- for (i = 0; i < 2; i++) {
- retval = target_read_memory(target, flash_address(bank, sector, offset + i),
- bank->bus_width, 1, &data[i * bank->bus_width]);
- if (retval != ERROR_OK)
- return retval;
- }
- } else {
- retval = target_read_memory(target, flash_address(bank, sector, offset),
- bank->bus_width, 2, data);
- if (retval != ERROR_OK)
- return retval;
- }
-
- if (cfi_info->endianness == TARGET_LITTLE_ENDIAN)
- *val = data[0] | data[bank->bus_width] << 8;
- else
- *val = data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8;
-
- return ERROR_OK;
-}
-
-static int cfi_query_u32(struct flash_bank *bank, int sector, uint32_t offset, uint32_t *val)
-{
- struct target *target = bank->target;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- uint8_t data[CFI_MAX_BUS_WIDTH * 4];
- int retval;
-
- if (cfi_info->x16_as_x8) {
- uint8_t i;
- for (i = 0; i < 4; i++) {
- retval = target_read_memory(target, flash_address(bank, sector, offset + i),
- bank->bus_width, 1, &data[i * bank->bus_width]);
- if (retval != ERROR_OK)
- return retval;
- }
- } else {
- retval = target_read_memory(target, flash_address(bank, sector, offset),
- bank->bus_width, 4, data);
- if (retval != ERROR_OK)
- return retval;
- }
-
- if (cfi_info->endianness == TARGET_LITTLE_ENDIAN)
- *val = data[0] | data[bank->bus_width] << 8 |
- data[bank->bus_width * 2] << 16 | data[bank->bus_width * 3] << 24;
- else
- *val = data[bank->bus_width - 1] | data[(2 * bank->bus_width) - 1] << 8 |
- data[(3 * bank->bus_width) - 1] << 16 |
- data[(4 * bank->bus_width) - 1] << 24;
-
- return ERROR_OK;
-}
-
-static int cfi_reset(struct flash_bank *bank)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- int retval = ERROR_OK;
-
- retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- if (cfi_info->manufacturer == 0x20 &&
- (cfi_info->device_id == 0x227E || cfi_info->device_id == 0x7E)) {
- /* Numonix M29W128G is cmd 0xFF intolerant - causes internal undefined state
- * so we send an extra 0xF0 reset to fix the bug */
- retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x00));
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-static void cfi_intel_clear_status_register(struct flash_bank *bank)
-{
- cfi_send_command(bank, 0x50, flash_address(bank, 0, 0x0));
-}
-
-static int cfi_intel_wait_status_busy(struct flash_bank *bank, int timeout, uint8_t *val)
-{
- uint8_t status;
-
- int retval = ERROR_OK;
-
- for (;; ) {
- if (timeout-- < 0) {
- LOG_ERROR("timeout while waiting for WSM to become ready");
- return ERROR_FAIL;
- }
-
- retval = cfi_get_u8(bank, 0, 0x0, &status);
- if (retval != ERROR_OK)
- return retval;
-
- if (status & 0x80)
- break;
-
- alive_sleep(1);
- }
-
- /* mask out bit 0 (reserved) */
- status = status & 0xfe;
-
- LOG_DEBUG("status: 0x%x", status);
-
- if (status != 0x80) {
- LOG_ERROR("status register: 0x%x", status);
- if (status & 0x2)
- LOG_ERROR("Block Lock-Bit Detected, Operation Abort");
- if (status & 0x4)
- LOG_ERROR("Program suspended");
- if (status & 0x8)
- LOG_ERROR("Low Programming Voltage Detected, Operation Aborted");
- if (status & 0x10)
- LOG_ERROR("Program Error / Error in Setting Lock-Bit");
- if (status & 0x20)
- LOG_ERROR("Error in Block Erasure or Clear Lock-Bits");
- if (status & 0x40)
- LOG_ERROR("Block Erase Suspended");
-
- cfi_intel_clear_status_register(bank);
-
- retval = ERROR_FAIL;
- }
-
- *val = status;
- return retval;
-}
-
-static int cfi_spansion_wait_status_busy(struct flash_bank *bank, int timeout)
-{
- uint8_t status, oldstatus;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- int retval;
-
- retval = cfi_get_u8(bank, 0, 0x0, &oldstatus);
- if (retval != ERROR_OK)
- return retval;
-
- do {
- retval = cfi_get_u8(bank, 0, 0x0, &status);
-
- if (retval != ERROR_OK)
- return retval;
-
- if ((status ^ oldstatus) & 0x40) {
- if (status & cfi_info->status_poll_mask & 0x20) {
- retval = cfi_get_u8(bank, 0, 0x0, &oldstatus);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_get_u8(bank, 0, 0x0, &status);
- if (retval != ERROR_OK)
- return retval;
- if ((status ^ oldstatus) & 0x40) {
- LOG_ERROR("dq5 timeout, status: 0x%x", status);
- return ERROR_FLASH_OPERATION_FAILED;
- } else {
- LOG_DEBUG("status: 0x%x", status);
- return ERROR_OK;
- }
- }
- } else {/* no toggle: finished, OK */
- LOG_DEBUG("status: 0x%x", status);
- return ERROR_OK;
- }
-
- oldstatus = status;
- alive_sleep(1);
- } while (timeout-- > 0);
-
- LOG_ERROR("timeout, status: 0x%x", status);
-
- return ERROR_FLASH_BUSY;
-}
-
-static int cfi_read_intel_pri_ext(struct flash_bank *bank)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_intel_pri_ext *pri_ext;
-
- if (cfi_info->pri_ext)
- free(cfi_info->pri_ext);
-
- pri_ext = malloc(sizeof(struct cfi_intel_pri_ext));
- if (pri_ext == NULL) {
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
- cfi_info->pri_ext = pri_ext;
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0, &pri_ext->pri[0]);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 1, &pri_ext->pri[1]);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 2, &pri_ext->pri[2]);
- if (retval != ERROR_OK)
- return retval;
-
- if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) {
- retval = cfi_reset(bank);
- if (retval != ERROR_OK)
- return retval;
- LOG_ERROR("Could not read bank flash bank information");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3, &pri_ext->major_version);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4, &pri_ext->minor_version);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1],
- pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version);
-
- retval = cfi_query_u32(bank, 0, cfi_info->pri_addr + 5, &pri_ext->feature_support);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9, &pri_ext->suspend_cmd_support);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xa, &pri_ext->blk_status_reg_mask);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("feature_support: 0x%" PRIx32 ", suspend_cmd_support: "
- "0x%x, blk_status_reg_mask: 0x%x",
- pri_ext->feature_support,
- pri_ext->suspend_cmd_support,
- pri_ext->blk_status_reg_mask);
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xc, &pri_ext->vcc_optimal);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xd, &pri_ext->vpp_optimal);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("Vcc opt: %x.%x, Vpp opt: %u.%x",
- (pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f,
- (pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f);
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xe, &pri_ext->num_protection_fields);
- if (retval != ERROR_OK)
- return retval;
- if (pri_ext->num_protection_fields != 1) {
- LOG_WARNING("expected one protection register field, but found %i",
- pri_ext->num_protection_fields);
- }
-
- retval = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xf, &pri_ext->prot_reg_addr);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0x11, &pri_ext->fact_prot_reg_size);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0x12, &pri_ext->user_prot_reg_size);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("protection_fields: %i, prot_reg_addr: 0x%x, "
- "factory pre-programmed: %i, user programmable: %i",
- pri_ext->num_protection_fields, pri_ext->prot_reg_addr,
- 1 << pri_ext->fact_prot_reg_size, 1 << pri_ext->user_prot_reg_size);
-
- return ERROR_OK;
-}
-
-static int cfi_read_spansion_pri_ext(struct flash_bank *bank)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext;
-
- if (cfi_info->pri_ext)
- free(cfi_info->pri_ext);
-
- pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
- if (pri_ext == NULL) {
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
- cfi_info->pri_ext = pri_ext;
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0, &pri_ext->pri[0]);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 1, &pri_ext->pri[1]);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 2, &pri_ext->pri[2]);
- if (retval != ERROR_OK)
- return retval;
-
- /* default values for implementation specific workarounds */
- pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1;
- pri_ext->_unlock2 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock2;
- pri_ext->_reversed_geometry = 0;
-
- if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) {
- retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
- LOG_ERROR("Could not read spansion bank information");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3, &pri_ext->major_version);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4, &pri_ext->minor_version);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("pri: '%c%c%c', version: %c.%c", pri_ext->pri[0], pri_ext->pri[1],
- pri_ext->pri[2], pri_ext->major_version, pri_ext->minor_version);
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 5, &pri_ext->SiliconRevision);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 6, &pri_ext->EraseSuspend);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 7, &pri_ext->BlkProt);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 8, &pri_ext->TmpBlkUnprotect);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9, &pri_ext->BlkProtUnprot);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 10, &pri_ext->SimultaneousOps);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 11, &pri_ext->BurstMode);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 12, &pri_ext->PageMode);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 13, &pri_ext->VppMin);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 14, &pri_ext->VppMax);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 15, &pri_ext->TopBottom);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("Silicon Revision: 0x%x, Erase Suspend: 0x%x, Block protect: 0x%x",
- pri_ext->SiliconRevision, pri_ext->EraseSuspend, pri_ext->BlkProt);
-
- LOG_DEBUG("Temporary Unprotect: 0x%x, Block Protect Scheme: 0x%x, "
- "Simultaneous Ops: 0x%x", pri_ext->TmpBlkUnprotect,
- pri_ext->BlkProtUnprot, pri_ext->SimultaneousOps);
-
- LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode);
-
-
- LOG_DEBUG("Vpp min: %u.%x, Vpp max: %u.%x",
- (pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f,
- (pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f);
-
- LOG_DEBUG("WP# protection 0x%x", pri_ext->TopBottom);
-
- return ERROR_OK;
-}
-
-static int cfi_read_atmel_pri_ext(struct flash_bank *bank)
-{
- int retval;
- struct cfi_atmel_pri_ext atmel_pri_ext;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext;
-
- if (cfi_info->pri_ext)
- free(cfi_info->pri_ext);
-
- pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext));
- if (pri_ext == NULL) {
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
-
- /* ATMEL devices use the same CFI primary command set (0x2) as AMD/Spansion,
- * but a different primary extended query table.
- * We read the atmel table, and prepare a valid AMD/Spansion query table.
- */
-
- memset(pri_ext, 0, sizeof(struct cfi_spansion_pri_ext));
-
- cfi_info->pri_ext = pri_ext;
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0, &atmel_pri_ext.pri[0]);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 1, &atmel_pri_ext.pri[1]);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 2, &atmel_pri_ext.pri[2]);
- if (retval != ERROR_OK)
- return retval;
-
- if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R')
- || (atmel_pri_ext.pri[2] != 'I')) {
- retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
- LOG_ERROR("Could not read atmel bank information");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- pri_ext->pri[0] = atmel_pri_ext.pri[0];
- pri_ext->pri[1] = atmel_pri_ext.pri[1];
- pri_ext->pri[2] = atmel_pri_ext.pri[2];
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 3, &atmel_pri_ext.major_version);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 4, &atmel_pri_ext.minor_version);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("pri: '%c%c%c', version: %c.%c", atmel_pri_ext.pri[0],
- atmel_pri_ext.pri[1], atmel_pri_ext.pri[2],
- atmel_pri_ext.major_version, atmel_pri_ext.minor_version);
-
- pri_ext->major_version = atmel_pri_ext.major_version;
- pri_ext->minor_version = atmel_pri_ext.minor_version;
-
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 5, &atmel_pri_ext.features);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 6, &atmel_pri_ext.bottom_boot);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 7, &atmel_pri_ext.burst_mode);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, cfi_info->pri_addr + 8, &atmel_pri_ext.page_mode);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG(
- "features: 0x%2.2x, bottom_boot: 0x%2.2x, burst_mode: 0x%2.2x, page_mode: 0x%2.2x",
- atmel_pri_ext.features,
- atmel_pri_ext.bottom_boot,
- atmel_pri_ext.burst_mode,
- atmel_pri_ext.page_mode);
-
- if (atmel_pri_ext.features & 0x02)
- pri_ext->EraseSuspend = 2;
-
- /* some chips got it backwards... */
- if (cfi_info->device_id == AT49BV6416 ||
- cfi_info->device_id == AT49BV6416T) {
- if (atmel_pri_ext.bottom_boot)
- pri_ext->TopBottom = 3;
- else
- pri_ext->TopBottom = 2;
- } else {
- if (atmel_pri_ext.bottom_boot)
- pri_ext->TopBottom = 2;
- else
- pri_ext->TopBottom = 3;
- }
-
- pri_ext->_unlock1 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock1;
- pri_ext->_unlock2 = cfi_unlock_addresses[CFI_UNLOCK_555_2AA].unlock2;
-
- return ERROR_OK;
-}
-
-static int cfi_read_0002_pri_ext(struct flash_bank *bank)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
-
- if (cfi_info->manufacturer == CFI_MFR_ATMEL)
- return cfi_read_atmel_pri_ext(bank);
- else
- return cfi_read_spansion_pri_ext(bank);
-}
-
-static int cfi_spansion_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- int printed;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
-
- printed = snprintf(buf, buf_size, "\nSpansion primary algorithm extend information:\n");
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf, buf_size, "pri: '%c%c%c', version: %c.%c\n", pri_ext->pri[0],
- pri_ext->pri[1], pri_ext->pri[2],
- pri_ext->major_version, pri_ext->minor_version);
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf, buf_size, "Silicon Rev.: 0x%x, Address Sensitive unlock: 0x%x\n",
- (pri_ext->SiliconRevision) >> 2,
- (pri_ext->SiliconRevision) & 0x03);
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf, buf_size, "Erase Suspend: 0x%x, Sector Protect: 0x%x\n",
- pri_ext->EraseSuspend,
- pri_ext->BlkProt);
- buf += printed;
- buf_size -= printed;
-
- snprintf(buf, buf_size, "VppMin: %u.%x, VppMax: %u.%x\n",
- (pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f,
- (pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f);
-
- return ERROR_OK;
-}
-
-static int cfi_intel_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- int printed;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
-
- printed = snprintf(buf, buf_size, "\nintel primary algorithm extend information:\n");
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf,
- buf_size,
- "pri: '%c%c%c', version: %c.%c\n",
- pri_ext->pri[0],
- pri_ext->pri[1],
- pri_ext->pri[2],
- pri_ext->major_version,
- pri_ext->minor_version);
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf,
- buf_size,
- "feature_support: 0x%" PRIx32 ", "
- "suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x\n",
- pri_ext->feature_support,
- pri_ext->suspend_cmd_support,
- pri_ext->blk_status_reg_mask);
- buf += printed;
- buf_size -= printed;
-
- printed = snprintf(buf, buf_size, "Vcc opt: %x.%x, Vpp opt: %u.%x\n",
- (pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f,
- (pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f);
- buf += printed;
- buf_size -= printed;
-
- snprintf(buf, buf_size, "protection_fields: %i, prot_reg_addr: 0x%x, "
- "factory pre-programmed: %i, user programmable: %i\n",
- pri_ext->num_protection_fields, pri_ext->prot_reg_addr,
- 1 << pri_ext->fact_prot_reg_size, 1 << pri_ext->user_prot_reg_size);
-
- return ERROR_OK;
-}
-
-/* flash_bank cfi <base> <size> <chip_width> <bus_width> <target#> [options]
- */
-FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command)
-{
- struct cfi_flash_bank *cfi_info;
- int bus_swap = 0;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* both widths must:
- * - not exceed max value;
- * - not be null;
- * - be equal to a power of 2.
- * bus must be wide enough to hold one chip */
- if ((bank->chip_width > CFI_MAX_CHIP_WIDTH)
- || (bank->bus_width > CFI_MAX_BUS_WIDTH)
- || (bank->chip_width == 0)
- || (bank->bus_width == 0)
- || (bank->chip_width & (bank->chip_width - 1))
- || (bank->bus_width & (bank->bus_width - 1))
- || (bank->chip_width > bank->bus_width)) {
- LOG_ERROR("chip and bus width have to specified in bytes");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- cfi_info = malloc(sizeof(struct cfi_flash_bank));
- cfi_info->probed = 0;
- cfi_info->erase_region_info = NULL;
- cfi_info->pri_ext = NULL;
- bank->driver_priv = cfi_info;
-
- cfi_info->x16_as_x8 = 0;
- cfi_info->jedec_probe = 0;
- cfi_info->not_cfi = 0;
-
- for (unsigned i = 6; i < CMD_ARGC; i++) {
- if (strcmp(CMD_ARGV[i], "x16_as_x8") == 0)
- cfi_info->x16_as_x8 = 1;
- else if (strcmp(CMD_ARGV[i], "bus_swap") == 0)
- bus_swap = 1;
- else if (strcmp(CMD_ARGV[i], "jedec_probe") == 0)
- cfi_info->jedec_probe = 1;
- }
-
- if (bus_swap)
- cfi_info->endianness =
- bank->target->endianness == TARGET_LITTLE_ENDIAN ?
- TARGET_BIG_ENDIAN : TARGET_LITTLE_ENDIAN;
- else
- cfi_info->endianness = bank->target->endianness;
-
- /* bank wasn't probed yet */
- cfi_info->qry[0] = 0xff;
-
- return ERROR_OK;
-}
-
-static int cfi_intel_erase(struct flash_bank *bank, int first, int last)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- int i;
-
- cfi_intel_clear_status_register(bank);
-
- for (i = first; i <= last; i++) {
- retval = cfi_send_command(bank, 0x20, flash_address(bank, i, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0xd0, flash_address(bank, i, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- uint8_t status;
- retval = cfi_intel_wait_status_busy(bank, cfi_info->block_erase_timeout, &status);
- if (retval != ERROR_OK)
- return retval;
-
- if (status == 0x80)
- bank->sectors[i].is_erased = 1;
- else {
- retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- LOG_ERROR("couldn't erase block %i of flash bank at base 0x%"
- PRIx32, i, bank->base);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
-
- return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
-}
-
-static int cfi_spansion_erase(struct flash_bank *bank, int first, int last)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- int i;
-
- for (i = first; i <= last; i++) {
- retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0x80, flash_address(bank, 0, pri_ext->_unlock1));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0x30, flash_address(bank, i, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- if (cfi_spansion_wait_status_busy(bank, cfi_info->block_erase_timeout) == ERROR_OK)
- bank->sectors[i].is_erased = 1;
- else {
- retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- LOG_ERROR("couldn't erase block %i of flash bank at base 0x%"
- PRIx32, i, bank->base);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
-
- return cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
-}
-
-static int cfi_erase(struct flash_bank *bank, int first, int last)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors))
- return ERROR_FLASH_SECTOR_INVALID;
-
- if (cfi_info->qry[0] != 'Q')
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- switch (cfi_info->pri_id) {
- case 1:
- case 3:
- return cfi_intel_erase(bank, first, last);
- break;
- case 2:
- return cfi_spansion_erase(bank, first, last);
- break;
- default:
- LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
- break;
- }
-
- return ERROR_OK;
-}
-
-static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int last)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext;
- int retry = 0;
- int i;
-
- /* if the device supports neither legacy lock/unlock (bit 3) nor
- * instant individual block locking (bit 5).
- */
- if (!(pri_ext->feature_support & 0x28)) {
- LOG_ERROR("lock/unlock not supported on flash");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- cfi_intel_clear_status_register(bank);
-
- for (i = first; i <= last; i++) {
- retval = cfi_send_command(bank, 0x60, flash_address(bank, i, 0x0));
- if (retval != ERROR_OK)
- return retval;
- if (set) {
- retval = cfi_send_command(bank, 0x01, flash_address(bank, i, 0x0));
- if (retval != ERROR_OK)
- return retval;
- bank->sectors[i].is_protected = 1;
- } else {
- retval = cfi_send_command(bank, 0xd0, flash_address(bank, i, 0x0));
- if (retval != ERROR_OK)
- return retval;
- bank->sectors[i].is_protected = 0;
- }
-
- /* instant individual block locking doesn't require reading of the status register
- **/
- if (!(pri_ext->feature_support & 0x20)) {
- /* Clear lock bits operation may take up to 1.4s */
- uint8_t status;
- retval = cfi_intel_wait_status_busy(bank, 1400, &status);
- if (retval != ERROR_OK)
- return retval;
- } else {
- uint8_t block_status;
- /* read block lock bit, to verify status */
- retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, 0x55));
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_get_u8(bank, i, 0x2, &block_status);
- if (retval != ERROR_OK)
- return retval;
-
- if ((block_status & 0x1) != set) {
- LOG_ERROR(
- "couldn't change block lock status (set = %i, block_status = 0x%2.2x)",
- set, block_status);
- retval = cfi_send_command(bank, 0x70, flash_address(bank, 0, 0x55));
- if (retval != ERROR_OK)
- return retval;
- uint8_t status;
- retval = cfi_intel_wait_status_busy(bank, 10, &status);
- if (retval != ERROR_OK)
- return retval;
-
- if (retry > 10)
- return ERROR_FLASH_OPERATION_FAILED;
- else {
- i--;
- retry++;
- }
- }
- }
- }
-
- /* if the device doesn't support individual block lock bits set/clear,
- * all blocks have been unlocked in parallel, so we set those that should be protected
- */
- if ((!set) && (!(pri_ext->feature_support & 0x20))) {
- /* FIX!!! this code path is broken!!!
- *
- * The correct approach is:
- *
- * 1. read out current protection status
- *
- * 2. override read out protection status w/unprotected.
- *
- * 3. re-protect what should be protected.
- *
- */
- for (i = 0; i < bank->num_sectors; i++) {
- if (bank->sectors[i].is_protected == 1) {
- cfi_intel_clear_status_register(bank);
-
- retval = cfi_send_command(bank, 0x60, flash_address(bank, i, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0x01, flash_address(bank, i, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- uint8_t status;
- retval = cfi_intel_wait_status_busy(bank, 100, &status);
- if (retval != ERROR_OK)
- return retval;
- }
- }
- }
-
- return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
-}
-
-static int cfi_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
- LOG_ERROR("Invalid sector range");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- if (cfi_info->qry[0] != 'Q')
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- switch (cfi_info->pri_id) {
- case 1:
- case 3:
- return cfi_intel_protect(bank, set, first, last);
- break;
- default:
- LOG_WARNING("protect: cfi primary command set %i unsupported", cfi_info->pri_id);
- return ERROR_OK;
- }
-}
-
-static uint32_t cfi_command_val(struct flash_bank *bank, uint8_t cmd)
-{
- struct target *target = bank->target;
-
- uint8_t buf[CFI_MAX_BUS_WIDTH];
- cfi_command(bank, cmd, buf);
- switch (bank->bus_width) {
- case 1:
- return buf[0];
- break;
- case 2:
- return target_buffer_get_u16(target, buf);
- break;
- case 4:
- return target_buffer_get_u32(target, buf);
- break;
- default:
- LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
- bank->bus_width);
- return 0;
- }
-}
-
-static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t address, uint32_t count)
-{
- struct target *target = bank->target;
- struct reg_param reg_params[7];
- struct arm_algorithm arm_algo;
- struct working_area *write_algorithm;
- struct working_area *source = NULL;
- uint32_t buffer_size = 32768;
- uint32_t write_command_val, busy_pattern_val, error_pattern_val;
-
- /* algorithm register usage:
- * r0: source address (in RAM)
- * r1: target address (in Flash)
- * r2: count
- * r3: flash write command
- * r4: status byte (returned to host)
- * r5: busy test pattern
- * r6: error test pattern
- */
-
- /* see contib/loaders/flash/armv4_5_cfi_intel_32.s for src */
- static const uint32_t word_32_code[] = {
- 0xe4904004, /* loop: ldr r4, [r0], #4 */
- 0xe5813000, /* str r3, [r1] */
- 0xe5814000, /* str r4, [r1] */
- 0xe5914000, /* busy: ldr r4, [r1] */
- 0xe0047005, /* and r7, r4, r5 */
- 0xe1570005, /* cmp r7, r5 */
- 0x1afffffb, /* bne busy */
- 0xe1140006, /* tst r4, r6 */
- 0x1a000003, /* bne done */
- 0xe2522001, /* subs r2, r2, #1 */
- 0x0a000001, /* beq done */
- 0xe2811004, /* add r1, r1 #4 */
- 0xeafffff2, /* b loop */
- 0xeafffffe /* done: b -2 */
- };
-
- /* see contib/loaders/flash/armv4_5_cfi_intel_16.s for src */
- static const uint32_t word_16_code[] = {
- 0xe0d040b2, /* loop: ldrh r4, [r0], #2 */
- 0xe1c130b0, /* strh r3, [r1] */
- 0xe1c140b0, /* strh r4, [r1] */
- 0xe1d140b0, /* busy ldrh r4, [r1] */
- 0xe0047005, /* and r7, r4, r5 */
- 0xe1570005, /* cmp r7, r5 */
- 0x1afffffb, /* bne busy */
- 0xe1140006, /* tst r4, r6 */
- 0x1a000003, /* bne done */
- 0xe2522001, /* subs r2, r2, #1 */
- 0x0a000001, /* beq done */
- 0xe2811002, /* add r1, r1 #2 */
- 0xeafffff2, /* b loop */
- 0xeafffffe /* done: b -2 */
- };
-
- /* see contib/loaders/flash/armv4_5_cfi_intel_8.s for src */
- static const uint32_t word_8_code[] = {
- 0xe4d04001, /* loop: ldrb r4, [r0], #1 */
- 0xe5c13000, /* strb r3, [r1] */
- 0xe5c14000, /* strb r4, [r1] */
- 0xe5d14000, /* busy ldrb r4, [r1] */
- 0xe0047005, /* and r7, r4, r5 */
- 0xe1570005, /* cmp r7, r5 */
- 0x1afffffb, /* bne busy */
- 0xe1140006, /* tst r4, r6 */
- 0x1a000003, /* bne done */
- 0xe2522001, /* subs r2, r2, #1 */
- 0x0a000001, /* beq done */
- 0xe2811001, /* add r1, r1 #1 */
- 0xeafffff2, /* b loop */
- 0xeafffffe /* done: b -2 */
- };
- uint8_t target_code[4*CFI_MAX_INTEL_CODESIZE];
- const uint32_t *target_code_src;
- uint32_t target_code_size;
- int retval = ERROR_OK;
-
- /* check we have a supported arch */
- if (is_arm(target_to_arm(target))) {
- /* All other ARM CPUs have 32 bit instructions */
- arm_algo.common_magic = ARM_COMMON_MAGIC;
- arm_algo.core_mode = ARM_MODE_SVC;
- arm_algo.core_state = ARM_STATE_ARM;
- } else {
- LOG_ERROR("Unknown architecture");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- cfi_intel_clear_status_register(bank);
-
- /* If we are setting up the write_algorith, we need target_code_src
- * if not we only need target_code_size. */
-
- /* However, we don't want to create multiple code paths, so we
- * do the unnecessary evaluation of target_code_src, which the
- * compiler will probably nicely optimize away if not needed */
-
- /* prepare algorithm code for target endian */
- switch (bank->bus_width) {
- case 1:
- target_code_src = word_8_code;
- target_code_size = sizeof(word_8_code);
- break;
- case 2:
- target_code_src = word_16_code;
- target_code_size = sizeof(word_16_code);
- break;
- case 4:
- target_code_src = word_32_code;
- target_code_size = sizeof(word_32_code);
- break;
- default:
- LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
- bank->bus_width);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* flash write code */
- if (target_code_size > sizeof(target_code)) {
- LOG_WARNING("Internal error - target code buffer to small. "
- "Increase CFI_MAX_INTEL_CODESIZE and recompile.");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src);
-
- /* Get memory for block write handler */
- retval = target_alloc_working_area(target,
- target_code_size,
- &write_algorithm);
- if (retval != ERROR_OK) {
- LOG_WARNING("No working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* write algorithm code to working area */
- retval = target_write_buffer(target, write_algorithm->address,
- target_code_size, target_code);
- if (retval != ERROR_OK) {
- LOG_ERROR("Unable to write block write code to target");
- goto cleanup;
- }
-
- /* Get a workspace buffer for the data to flash starting with 32k size.
- * Half size until buffer would be smaller 256 Bytes then fail back */
- /* FIXME Why 256 bytes, why not 32 bytes (smallest flash write page */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- LOG_WARNING(
- "no large enough working area available, can't do block memory writes");
- retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- goto cleanup;
- }
- }
-
- /* setup algo registers */
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
- init_reg_param(®_params[4], "r4", 32, PARAM_IN);
- init_reg_param(®_params[5], "r5", 32, PARAM_OUT);
- init_reg_param(®_params[6], "r6", 32, PARAM_OUT);
-
- /* prepare command and status register patterns */
- write_command_val = cfi_command_val(bank, 0x40);
- busy_pattern_val = cfi_command_val(bank, 0x80);
- error_pattern_val = cfi_command_val(bank, 0x7e);
-
- LOG_DEBUG("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32,
- source->address, buffer_size);
-
- /* Programming main loop */
- while (count > 0) {
- uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
- uint32_t wsm_error;
-
- retval = target_write_buffer(target, source->address, thisrun_count, buffer);
- if (retval != ERROR_OK)
- goto cleanup;
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count / bank->bus_width);
-
- buf_set_u32(reg_params[3].value, 0, 32, write_command_val);
- buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val);
- buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val);
-
- LOG_DEBUG("Write 0x%04" PRIx32 " bytes to flash at 0x%08" PRIx32,
- thisrun_count, address);
-
- /* Execute algorithm, assume breakpoint for last instruction */
- retval = target_run_algorithm(target, 0, NULL, 7, reg_params,
- write_algorithm->address,
- write_algorithm->address + target_code_size -
- sizeof(uint32_t),
- 10000, /* 10s should be enough for max. 32k of data */
- &arm_algo);
-
- /* On failure try a fall back to direct word writes */
- if (retval != ERROR_OK) {
- cfi_intel_clear_status_register(bank);
- LOG_ERROR(
- "Execution of flash algorythm failed. Can't fall back. Please report.");
- retval = ERROR_FLASH_OPERATION_FAILED;
- /* retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; */
- /* FIXME To allow fall back or recovery, we must save the actual status
- * somewhere, so that a higher level code can start recovery. */
- goto cleanup;
- }
-
- /* Check return value from algo code */
- wsm_error = buf_get_u32(reg_params[4].value, 0, 32) & error_pattern_val;
- if (wsm_error) {
- /* read status register (outputs debug information) */
- uint8_t status;
- cfi_intel_wait_status_busy(bank, 100, &status);
- cfi_intel_clear_status_register(bank);
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto cleanup;
- }
-
- buffer += thisrun_count;
- address += thisrun_count;
- count -= thisrun_count;
-
- keep_alive();
- }
-
- /* free up resources */
-cleanup:
- if (source)
- target_free_working_area(target, source);
-
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
- destroy_reg_param(®_params[5]);
- destroy_reg_param(®_params[6]);
-
- return retval;
-}
-
-static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t address, uint32_t count)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- struct target *target = bank->target;
- struct reg_param reg_params[10];
- struct mips32_algorithm mips32_info;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t buffer_size = 32768;
- uint32_t status;
- int retval = ERROR_OK;
-
- /* input parameters -
- * 4 A0 = source address
- * 5 A1 = destination address
- * 6 A2 = number of writes
- * 7 A3 = flash write command
- * 8 T0 = constant to mask DQ7 bits (also used for Dq5 with shift)
- * output parameters -
- * 9 T1 = 0x80 ok 0x00 bad
- * temp registers -
- * 10 T2 = value read from flash to test status
- * 11 T3 = holding register
- * unlock registers -
- * 12 T4 = unlock1_addr
- * 13 T5 = unlock1_cmd
- * 14 T6 = unlock2_addr
- * 15 T7 = unlock2_cmd */
-
- static const uint32_t mips_word_16_code[] = {
- /* start: */
- MIPS32_LHU(9, 0, 4), /* lhu $t1, ($a0) ; out = &saddr */
- MIPS32_ADDI(4, 4, 2), /* addi $a0, $a0, 2 ; saddr += 2 */
- MIPS32_SH(13, 0, 12), /* sh $t5, ($t4) ; *fl_unl_addr1 = fl_unl_cmd1 */
- MIPS32_SH(15, 0, 14), /* sh $t7, ($t6) ; *fl_unl_addr2 = fl_unl_cmd2 */
- MIPS32_SH(7, 0, 12), /* sh $a3, ($t4) ; *fl_unl_addr1 = fl_write_cmd */
- MIPS32_SH(9, 0, 5), /* sh $t1, ($a1) ; *daddr = out */
- MIPS32_NOP, /* nop */
- /* busy: */
- MIPS32_LHU(10, 0, 5), /* lhu $t2, ($a1) ; temp1 = *daddr */
- MIPS32_XOR(11, 9, 10), /* xor $t3, $a0, $t2 ; temp2 = out ^ temp1; */
- MIPS32_AND(11, 8, 11), /* and $t3, $t0, $t3 ; temp2 = temp2 & DQ7mask */
- MIPS32_BNE(11, 8, 13), /* bne $t3, $t0, cont ; if (temp2 != DQ7mask) goto cont */
- MIPS32_NOP, /* nop */
-
- MIPS32_SRL(10, 8, 2), /* srl $t2,$t0,2 ; temp1 = DQ7mask >> 2 */
- MIPS32_AND(11, 10, 11), /* and $t3, $t2, $t3 ; temp2 = temp2 & temp1 */
- MIPS32_BNE(11, 10, NEG16(8)), /* bne $t3, $t2, busy ; if (temp2 != temp1) goto busy */
- MIPS32_NOP, /* nop */
-
- MIPS32_LHU(10, 0, 5), /* lhu $t2, ($a1) ; temp1 = *daddr */
- MIPS32_XOR(11, 9, 10), /* xor $t3, $a0, $t2 ; temp2 = out ^ temp1; */
- MIPS32_AND(11, 8, 11), /* and $t3, $t0, $t3 ; temp2 = temp2 & DQ7mask */
- MIPS32_BNE(11, 8, 4), /* bne $t3, $t0, cont ; if (temp2 != DQ7mask) goto cont */
- MIPS32_NOP, /* nop */
-
- MIPS32_XOR(9, 9, 9), /* xor $t1, $t1, $t1 ; out = 0 */
- MIPS32_BEQ(9, 0, 11), /* beq $t1, $zero, done ; if (out == 0) goto done */
- MIPS32_NOP, /* nop */
- /* cont: */
- MIPS32_ADDI(6, 6, NEG16(1)), /* addi, $a2, $a2, -1 ; numwrites-- */
- MIPS32_BNE(6, 0, 5), /* bne $a2, $zero, cont2 ; if (numwrite != 0) goto cont2 */
- MIPS32_NOP, /* nop */
-
- MIPS32_LUI(9, 0), /* lui $t1, 0 */
- MIPS32_ORI(9, 9, 0x80), /* ori $t1, $t1, 0x80 ; out = 0x80 */
-
- MIPS32_B(4), /* b done ; goto done */
- MIPS32_NOP, /* nop */
- /* cont2: */
- MIPS32_ADDI(5, 5, 2), /* addi $a0, $a0, 2 ; daddr += 2 */
- MIPS32_B(NEG16(33)), /* b start ; goto start */
- MIPS32_NOP, /* nop */
- /* done: */
- MIPS32_SDBBP, /* sdbbp ; break(); */
- };
-
- mips32_info.common_magic = MIPS32_COMMON_MAGIC;
- mips32_info.isa_mode = MIPS32_ISA_MIPS32;
-
- int target_code_size = 0;
- const uint32_t *target_code_src = NULL;
-
- switch (bank->bus_width) {
- case 2:
- /* Check for DQ5 support */
- if (cfi_info->status_poll_mask & (1 << 5)) {
- target_code_src = mips_word_16_code;
- target_code_size = sizeof(mips_word_16_code);
- } else {
- LOG_ERROR("Need DQ5 support");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- /* target_code_src = mips_word_16_code_dq7only; */
- /* target_code_size = sizeof(mips_word_16_code_dq7only); */
- }
- break;
- default:
- LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
- bank->bus_width);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* flash write code */
- uint8_t *target_code;
-
- /* convert bus-width dependent algorithm code to correct endianness */
- target_code = malloc(target_code_size);
- if (target_code == NULL) {
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
-
- target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src);
-
- /* allocate working area */
- retval = target_alloc_working_area(target, target_code_size,
- &write_algorithm);
- if (retval != ERROR_OK) {
- free(target_code);
- return retval;
- }
-
- /* write algorithm code to working area */
- retval = target_write_buffer(target, write_algorithm->address,
- target_code_size, target_code);
- if (retval != ERROR_OK) {
- free(target_code);
- return retval;
- }
-
- free(target_code);
-
- /* the following code still assumes target code is fixed 24*4 bytes */
-
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING(
- "not enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- init_reg_param(®_params[0], "r4", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r5", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r6", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r7", 32, PARAM_OUT);
- init_reg_param(®_params[4], "r8", 32, PARAM_OUT);
- init_reg_param(®_params[5], "r9", 32, PARAM_IN);
- init_reg_param(®_params[6], "r12", 32, PARAM_OUT);
- init_reg_param(®_params[7], "r13", 32, PARAM_OUT);
- init_reg_param(®_params[8], "r14", 32, PARAM_OUT);
- init_reg_param(®_params[9], "r15", 32, PARAM_OUT);
-
- while (count > 0) {
- uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
-
- retval = target_write_buffer(target, source->address, thisrun_count, buffer);
- if (retval != ERROR_OK)
- break;
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count / bank->bus_width);
- buf_set_u32(reg_params[3].value, 0, 32, cfi_command_val(bank, 0xA0));
- buf_set_u32(reg_params[4].value, 0, 32, cfi_command_val(bank, 0x80));
- buf_set_u32(reg_params[6].value, 0, 32, flash_address(bank, 0, pri_ext->_unlock1));
- buf_set_u32(reg_params[7].value, 0, 32, 0xaaaaaaaa);
- buf_set_u32(reg_params[8].value, 0, 32, flash_address(bank, 0, pri_ext->_unlock2));
- buf_set_u32(reg_params[9].value, 0, 32, 0x55555555);
-
- retval = target_run_algorithm(target, 0, NULL, 10, reg_params,
- write_algorithm->address,
- write_algorithm->address + ((target_code_size) - 4),
- 10000, &mips32_info);
- if (retval != ERROR_OK)
- break;
-
- status = buf_get_u32(reg_params[5].value, 0, 32);
- if (status != 0x80) {
- LOG_ERROR("flash write block failed status: 0x%" PRIx32, status);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- buffer += thisrun_count;
- address += thisrun_count;
- count -= thisrun_count;
- }
-
- target_free_all_working_areas(target);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
- destroy_reg_param(®_params[5]);
- destroy_reg_param(®_params[6]);
- destroy_reg_param(®_params[7]);
- destroy_reg_param(®_params[8]);
- destroy_reg_param(®_params[9]);
-
- return retval;
-}
-
-static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t address, uint32_t count)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- struct target *target = bank->target;
- struct reg_param reg_params[10];
- void *arm_algo;
- struct arm_algorithm armv4_5_algo;
- struct armv7m_algorithm armv7m_algo;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t buffer_size = 32768;
- uint32_t status;
- int retval = ERROR_OK;
-
- /* input parameters -
- * R0 = source address
- * R1 = destination address
- * R2 = number of writes
- * R3 = flash write command
- * R4 = constant to mask DQ7 bits (also used for Dq5 with shift)
- * output parameters -
- * R5 = 0x80 ok 0x00 bad
- * temp registers -
- * R6 = value read from flash to test status
- * R7 = holding register
- * unlock registers -
- * R8 = unlock1_addr
- * R9 = unlock1_cmd
- * R10 = unlock2_addr
- * R11 = unlock2_cmd */
-
- /* see contib/loaders/flash/armv4_5_cfi_span_32.s for src */
- static const uint32_t armv4_5_word_32_code[] = {
- /* 00008100 <sp_32_code>: */
- 0xe4905004, /* ldr r5, [r0], #4 */
- 0xe5889000, /* str r9, [r8] */
- 0xe58ab000, /* str r11, [r10] */
- 0xe5883000, /* str r3, [r8] */
- 0xe5815000, /* str r5, [r1] */
- 0xe1a00000, /* nop */
- /* 00008110 <sp_32_busy>: */
- 0xe5916000, /* ldr r6, [r1] */
- 0xe0257006, /* eor r7, r5, r6 */
- 0xe0147007, /* ands r7, r4, r7 */
- 0x0a000007, /* beq 8140 <sp_32_cont> ; b if DQ7 == Data7 */
- 0xe0166124, /* ands r6, r6, r4, lsr #2 */
- 0x0afffff9, /* beq 8110 <sp_32_busy> ; b if DQ5 low */
- 0xe5916000, /* ldr r6, [r1] */
- 0xe0257006, /* eor r7, r5, r6 */
- 0xe0147007, /* ands r7, r4, r7 */
- 0x0a000001, /* beq 8140 <sp_32_cont> ; b if DQ7 == Data7 */
- 0xe3a05000, /* mov r5, #0 ; 0x0 - return 0x00, error */
- 0x1a000004, /* bne 8154 <sp_32_done> */
- /* 00008140 <sp_32_cont>: */
- 0xe2522001, /* subs r2, r2, #1 ; 0x1 */
- 0x03a05080, /* moveq r5, #128 ; 0x80 */
- 0x0a000001, /* beq 8154 <sp_32_done> */
- 0xe2811004, /* add r1, r1, #4 ; 0x4 */
- 0xeaffffe8, /* b 8100 <sp_32_code> */
- /* 00008154 <sp_32_done>: */
- 0xeafffffe /* b 8154 <sp_32_done> */
- };
-
- /* see contib/loaders/flash/armv4_5_cfi_span_16.s for src */
- static const uint32_t armv4_5_word_16_code[] = {
- /* 00008158 <sp_16_code>: */
- 0xe0d050b2, /* ldrh r5, [r0], #2 */
- 0xe1c890b0, /* strh r9, [r8] */
- 0xe1cab0b0, /* strh r11, [r10] */
- 0xe1c830b0, /* strh r3, [r8] */
- 0xe1c150b0, /* strh r5, [r1] */
- 0xe1a00000, /* nop (mov r0,r0) */
- /* 00008168 <sp_16_busy>: */
- 0xe1d160b0, /* ldrh r6, [r1] */
- 0xe0257006, /* eor r7, r5, r6 */
- 0xe0147007, /* ands r7, r4, r7 */
- 0x0a000007, /* beq 8198 <sp_16_cont> */
- 0xe0166124, /* ands r6, r6, r4, lsr #2 */
- 0x0afffff9, /* beq 8168 <sp_16_busy> */
- 0xe1d160b0, /* ldrh r6, [r1] */
- 0xe0257006, /* eor r7, r5, r6 */
- 0xe0147007, /* ands r7, r4, r7 */
- 0x0a000001, /* beq 8198 <sp_16_cont> */
- 0xe3a05000, /* mov r5, #0 ; 0x0 */
- 0x1a000004, /* bne 81ac <sp_16_done> */
- /* 00008198 <sp_16_cont>: */
- 0xe2522001, /* subs r2, r2, #1 ; 0x1 */
- 0x03a05080, /* moveq r5, #128 ; 0x80 */
- 0x0a000001, /* beq 81ac <sp_16_done> */
- 0xe2811002, /* add r1, r1, #2 ; 0x2 */
- 0xeaffffe8, /* b 8158 <sp_16_code> */
- /* 000081ac <sp_16_done>: */
- 0xeafffffe /* b 81ac <sp_16_done> */
- };
-
- /* see contrib/loaders/flash/armv7m_cfi_span_16.s for src */
- static const uint32_t armv7m_word_16_code[] = {
- 0x5B02F830,
- 0x9000F8A8,
- 0xB000F8AA,
- 0x3000F8A8,
- 0xBF00800D,
- 0xEA85880E,
- 0x40270706,
- 0xEA16D00A,
- 0xD0F70694,
- 0xEA85880E,
- 0x40270706,
- 0xF04FD002,
- 0xD1070500,
- 0xD0023A01,
- 0x0102F101,
- 0xF04FE7E0,
- 0xE7FF0580,
- 0x0000BE00
- };
-
- /* see contrib/loaders/flash/armv7m_cfi_span_16_dq7.s for src */
- static const uint32_t armv7m_word_16_code_dq7only[] = {
- /* 00000000 <code>: */
- 0x5B02F830, /* ldrh.w r5, [r0], #2 */
- 0x9000F8A8, /* strh.w r9, [r8] */
- 0xB000F8AA, /* strh.w fp, [sl] */
- 0x3000F8A8, /* strh.w r3, [r8] */
- 0xBF00800D, /* strh r5, [r1, #0] */
- /* nop */
-
- /* 00000014 <busy>: */
- 0xEA85880E, /* ldrh r6, [r1, #0] */
- /* eor.w r7, r5, r6 */
- 0x40270706, /* ands r7, r4 */
- 0x3A01D1FA, /* bne.n 14 <busy> */
- /* subs r2, #1 */
- 0xF101D002, /* beq.n 28 <success> */
- 0xE7EB0102, /* add.w r1, r1, #2 */
- /* b.n 0 <code> */
-
- /* 00000028 <success>: */
- 0x0580F04F, /* mov.w r5, #128 */
- 0xBF00E7FF, /* b.n 30 <done> */
- /* nop (for alignment purposes) */
-
- /* 00000030 <done>: */
- 0x0000BE00 /* bkpt 0x0000 */
- };
-
- /* see contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s for src */
- static const uint32_t armv4_5_word_16_code_dq7only[] = {
- /* <sp_16_code>: */
- 0xe0d050b2, /* ldrh r5, [r0], #2 */
- 0xe1c890b0, /* strh r9, [r8] */
- 0xe1cab0b0, /* strh r11, [r10] */
- 0xe1c830b0, /* strh r3, [r8] */
- 0xe1c150b0, /* strh r5, [r1] */
- 0xe1a00000, /* nop (mov r0,r0) */
- /* <sp_16_busy>: */
- 0xe1d160b0, /* ldrh r6, [r1] */
- 0xe0257006, /* eor r7, r5, r6 */
- 0xe2177080, /* ands r7, #0x80 */
- 0x1afffffb, /* bne 8168 <sp_16_busy> */
- /* */
- 0xe2522001, /* subs r2, r2, #1 ; 0x1 */
- 0x03a05080, /* moveq r5, #128 ; 0x80 */
- 0x0a000001, /* beq 81ac <sp_16_done> */
- 0xe2811002, /* add r1, r1, #2 ; 0x2 */
- 0xeafffff0, /* b 8158 <sp_16_code> */
- /* 000081ac <sp_16_done>: */
- 0xeafffffe /* b 81ac <sp_16_done> */
- };
-
- /* see contrib/loaders/flash/armv4_5_cfi_span_8.s for src */
- static const uint32_t armv4_5_word_8_code[] = {
- /* 000081b0 <sp_16_code_end>: */
- 0xe4d05001, /* ldrb r5, [r0], #1 */
- 0xe5c89000, /* strb r9, [r8] */
- 0xe5cab000, /* strb r11, [r10] */
- 0xe5c83000, /* strb r3, [r8] */
- 0xe5c15000, /* strb r5, [r1] */
- 0xe1a00000, /* nop (mov r0,r0) */
- /* 000081c0 <sp_8_busy>: */
- 0xe5d16000, /* ldrb r6, [r1] */
- 0xe0257006, /* eor r7, r5, r6 */
- 0xe0147007, /* ands r7, r4, r7 */
- 0x0a000007, /* beq 81f0 <sp_8_cont> */
- 0xe0166124, /* ands r6, r6, r4, lsr #2 */
- 0x0afffff9, /* beq 81c0 <sp_8_busy> */
- 0xe5d16000, /* ldrb r6, [r1] */
- 0xe0257006, /* eor r7, r5, r6 */
- 0xe0147007, /* ands r7, r4, r7 */
- 0x0a000001, /* beq 81f0 <sp_8_cont> */
- 0xe3a05000, /* mov r5, #0 ; 0x0 */
- 0x1a000004, /* bne 8204 <sp_8_done> */
- /* 000081f0 <sp_8_cont>: */
- 0xe2522001, /* subs r2, r2, #1 ; 0x1 */
- 0x03a05080, /* moveq r5, #128 ; 0x80 */
- 0x0a000001, /* beq 8204 <sp_8_done> */
- 0xe2811001, /* add r1, r1, #1 ; 0x1 */
- 0xeaffffe8, /* b 81b0 <sp_16_code_end> */
- /* 00008204 <sp_8_done>: */
- 0xeafffffe /* b 8204 <sp_8_done> */
- };
-
- if (strncmp(target_type_name(target), "mips_m4k", 8) == 0)
- return cfi_spansion_write_block_mips(bank, buffer, address, count);
-
- if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
- arm_algo = &armv7m_algo;
- } else if (is_arm(target_to_arm(target))) {
- /* All other ARM CPUs have 32 bit instructions */
- armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
- armv4_5_algo.core_mode = ARM_MODE_SVC;
- armv4_5_algo.core_state = ARM_STATE_ARM;
- arm_algo = &armv4_5_algo;
- } else {
- LOG_ERROR("Unknown architecture");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- int target_code_size = 0;
- const uint32_t *target_code_src = NULL;
-
- switch (bank->bus_width) {
- case 1:
- if (is_armv7m(target_to_armv7m(target))) {
- LOG_ERROR("Unknown ARM architecture");
- return ERROR_FAIL;
- }
- target_code_src = armv4_5_word_8_code;
- target_code_size = sizeof(armv4_5_word_8_code);
- break;
- case 2:
- /* Check for DQ5 support */
- if (cfi_info->status_poll_mask & (1 << 5)) {
- if (is_armv7m(target_to_armv7m(target))) {
- /* armv7m target */
- target_code_src = armv7m_word_16_code;
- target_code_size = sizeof(armv7m_word_16_code);
- } else { /* armv4_5 target */
- target_code_src = armv4_5_word_16_code;
- target_code_size = sizeof(armv4_5_word_16_code);
- }
- } else {
- /* No DQ5 support. Use DQ7 DATA# polling only. */
- if (is_armv7m(target_to_armv7m(target))) {
- /* armv7m target */
- target_code_src = armv7m_word_16_code_dq7only;
- target_code_size = sizeof(armv7m_word_16_code_dq7only);
- } else { /* armv4_5 target */
- target_code_src = armv4_5_word_16_code_dq7only;
- target_code_size = sizeof(armv4_5_word_16_code_dq7only);
- }
- }
- break;
- case 4:
- if (is_armv7m(target_to_armv7m(target))) {
- LOG_ERROR("Unknown ARM architecture");
- return ERROR_FAIL;
- }
- target_code_src = armv4_5_word_32_code;
- target_code_size = sizeof(armv4_5_word_32_code);
- break;
- default:
- LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes",
- bank->bus_width);
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* flash write code */
- uint8_t *target_code;
-
- /* convert bus-width dependent algorithm code to correct endianness */
- target_code = malloc(target_code_size);
- if (target_code == NULL) {
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
-
- target_buffer_set_u32_array(target, target_code, target_code_size / 4, target_code_src);
-
- /* allocate working area */
- retval = target_alloc_working_area(target, target_code_size,
- &write_algorithm);
- if (retval != ERROR_OK) {
- free(target_code);
- return retval;
- }
-
- /* write algorithm code to working area */
- retval = target_write_buffer(target, write_algorithm->address,
- target_code_size, target_code);
- if (retval != ERROR_OK) {
- free(target_code);
- return retval;
- }
-
- free(target_code);
-
- /* the following code still assumes target code is fixed 24*4 bytes */
-
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING(
- "not enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT);
- init_reg_param(®_params[5], "r5", 32, PARAM_IN);
- init_reg_param(®_params[6], "r8", 32, PARAM_OUT);
- init_reg_param(®_params[7], "r9", 32, PARAM_OUT);
- init_reg_param(®_params[8], "r10", 32, PARAM_OUT);
- init_reg_param(®_params[9], "r11", 32, PARAM_OUT);
-
- while (count > 0) {
- uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
-
- retval = target_write_buffer(target, source->address, thisrun_count, buffer);
- if (retval != ERROR_OK)
- break;
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count / bank->bus_width);
- buf_set_u32(reg_params[3].value, 0, 32, cfi_command_val(bank, 0xA0));
- buf_set_u32(reg_params[4].value, 0, 32, cfi_command_val(bank, 0x80));
- buf_set_u32(reg_params[6].value, 0, 32, flash_address(bank, 0, pri_ext->_unlock1));
- buf_set_u32(reg_params[7].value, 0, 32, 0xaaaaaaaa);
- buf_set_u32(reg_params[8].value, 0, 32, flash_address(bank, 0, pri_ext->_unlock2));
- buf_set_u32(reg_params[9].value, 0, 32, 0x55555555);
-
- retval = target_run_algorithm(target, 0, NULL, 10, reg_params,
- write_algorithm->address,
- write_algorithm->address + ((target_code_size) - 4),
- 10000, arm_algo);
- if (retval != ERROR_OK)
- break;
-
- status = buf_get_u32(reg_params[5].value, 0, 32);
- if (status != 0x80) {
- LOG_ERROR("flash write block failed status: 0x%" PRIx32, status);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- buffer += thisrun_count;
- address += thisrun_count;
- count -= thisrun_count;
- }
-
- target_free_all_working_areas(target);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
- destroy_reg_param(®_params[5]);
- destroy_reg_param(®_params[6]);
- destroy_reg_param(®_params[7]);
- destroy_reg_param(®_params[8]);
- destroy_reg_param(®_params[9]);
-
- return retval;
-}
-
-static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct target *target = bank->target;
-
- cfi_intel_clear_status_register(bank);
- retval = cfi_send_command(bank, 0x40, address);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_memory(target, address, bank->bus_width, 1, word);
- if (retval != ERROR_OK)
- return retval;
-
- uint8_t status;
- retval = cfi_intel_wait_status_busy(bank, cfi_info->word_write_timeout, &status);
- if (retval != ERROR_OK)
- return retval;
- if (status != 0x80) {
- retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address 0x%" PRIx32,
- bank->base, address);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int cfi_intel_write_words(struct flash_bank *bank, const uint8_t *word,
- uint32_t wordcount, uint32_t address)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct target *target = bank->target;
-
- /* Calculate buffer size and boundary mask
- * buffersize is (buffer size per chip) * (number of chips)
- * bufferwsize is buffersize in words */
- uint32_t buffersize =
- (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
- uint32_t buffermask = buffersize-1;
- uint32_t bufferwsize = buffersize / bank->bus_width;
-
- /* Check for valid range */
- if (address & buffermask) {
- LOG_ERROR("Write address at base 0x%" PRIx32 ", address 0x%" PRIx32
- " not aligned to 2^%d boundary",
- bank->base, address, cfi_info->max_buf_write_size);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Check for valid size */
- if (wordcount > bufferwsize) {
- LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32,
- wordcount, buffersize);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Write to flash buffer */
- cfi_intel_clear_status_register(bank);
-
- /* Initiate buffer operation _*/
- retval = cfi_send_command(bank, 0xe8, address);
- if (retval != ERROR_OK)
- return retval;
- uint8_t status;
- retval = cfi_intel_wait_status_busy(bank, cfi_info->buf_write_timeout, &status);
- if (retval != ERROR_OK)
- return retval;
- if (status != 0x80) {
- retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- LOG_ERROR(
- "couldn't start buffer write operation at base 0x%" PRIx32 ", address 0x%" PRIx32,
- bank->base,
- address);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Write buffer wordcount-1 and data words */
- retval = cfi_send_command(bank, bufferwsize-1, address);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word);
- if (retval != ERROR_OK)
- return retval;
-
- /* Commit write operation */
- retval = cfi_send_command(bank, 0xd0, address);
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_intel_wait_status_busy(bank, cfi_info->buf_write_timeout, &status);
- if (retval != ERROR_OK)
- return retval;
-
- if (status != 0x80) {
- retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- LOG_ERROR("Buffer write at base 0x%" PRIx32
- ", address 0x%" PRIx32 " failed.", bank->base, address);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- struct target *target = bank->target;
-
- retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0xa0, flash_address(bank, 0, pri_ext->_unlock1));
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_memory(target, address, bank->bus_width, 1, word);
- if (retval != ERROR_OK)
- return retval;
-
- if (cfi_spansion_wait_status_busy(bank, cfi_info->word_write_timeout) != ERROR_OK) {
- retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- LOG_ERROR("couldn't write word at base 0x%" PRIx32
- ", address 0x%" PRIx32, bank->base, address);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int cfi_spansion_write_words(struct flash_bank *bank, const uint8_t *word,
- uint32_t wordcount, uint32_t address)
-{
- int retval;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct target *target = bank->target;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
-
- /* Calculate buffer size and boundary mask
- * buffersize is (buffer size per chip) * (number of chips)
- * bufferwsize is buffersize in words */
- uint32_t buffersize =
- (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width);
- uint32_t buffermask = buffersize-1;
- uint32_t bufferwsize = buffersize / bank->bus_width;
-
- /* Check for valid range */
- if (address & buffermask) {
- LOG_ERROR("Write address at base 0x%" PRIx32
- ", address 0x%" PRIx32 " not aligned to 2^%d boundary",
- bank->base, address, cfi_info->max_buf_write_size);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Check for valid size */
- if (wordcount > bufferwsize) {
- LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %"
- PRId32, wordcount, buffersize);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Unlock */
- retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2));
- if (retval != ERROR_OK)
- return retval;
-
- /* Buffer load command */
- retval = cfi_send_command(bank, 0x25, address);
- if (retval != ERROR_OK)
- return retval;
-
- /* Write buffer wordcount-1 and data words */
- retval = cfi_send_command(bank, bufferwsize-1, address);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_memory(target, address, bank->bus_width, bufferwsize, word);
- if (retval != ERROR_OK)
- return retval;
-
- /* Commit write operation */
- retval = cfi_send_command(bank, 0x29, address);
- if (retval != ERROR_OK)
- return retval;
-
- if (cfi_spansion_wait_status_busy(bank, cfi_info->buf_write_timeout) != ERROR_OK) {
- retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0));
- if (retval != ERROR_OK)
- return retval;
-
- LOG_ERROR("couldn't write block at base 0x%" PRIx32
- ", address 0x%" PRIx32 ", size 0x%" PRIx32, bank->base, address,
- bufferwsize);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int cfi_write_word(struct flash_bank *bank, uint8_t *word, uint32_t address)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
-
- switch (cfi_info->pri_id) {
- case 1:
- case 3:
- return cfi_intel_write_word(bank, word, address);
- break;
- case 2:
- return cfi_spansion_write_word(bank, word, address);
- break;
- default:
- LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
- break;
- }
-
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-static int cfi_write_words(struct flash_bank *bank, const uint8_t *word,
- uint32_t wordcount, uint32_t address)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
-
- if (cfi_info->buf_write_timeout_typ == 0) {
- /* buffer writes are not supported */
- LOG_DEBUG("Buffer Writes Not Supported");
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
-
- switch (cfi_info->pri_id) {
- case 1:
- case 3:
- return cfi_intel_write_words(bank, word, wordcount, address);
- break;
- case 2:
- return cfi_spansion_write_words(bank, word, wordcount, address);
- break;
- default:
- LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
- break;
- }
-
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t address = bank->base + offset;
- uint32_t read_p;
- int align; /* number of unaligned bytes */
- uint8_t current_word[CFI_MAX_BUS_WIDTH];
- int i;
- int retval;
-
- LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
- (int)count, (unsigned)offset);
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset + count > bank->size)
- return ERROR_FLASH_DST_OUT_OF_BANK;
-
- if (cfi_info->qry[0] != 'Q')
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- /* start at the first byte of the first word (bus_width size) */
- read_p = address & ~(bank->bus_width - 1);
- align = address - read_p;
- if (align != 0) {
- LOG_INFO("Fixup %d unaligned read head bytes", align);
-
- /* read a complete word from flash */
- retval = target_read_memory(target, read_p, bank->bus_width, 1, current_word);
- if (retval != ERROR_OK)
- return retval;
-
- /* take only bytes we need */
- for (i = align; (i < bank->bus_width) && (count > 0); i++, count--)
- *buffer++ = current_word[i];
-
- read_p += bank->bus_width;
- }
-
- align = count / bank->bus_width;
- if (align) {
- retval = target_read_memory(target, read_p, bank->bus_width, align, buffer);
- if (retval != ERROR_OK)
- return retval;
-
- read_p += align * bank->bus_width;
- buffer += align * bank->bus_width;
- count -= align * bank->bus_width;
- }
-
- if (count) {
- LOG_INFO("Fixup %" PRIu32 " unaligned read tail bytes", count);
-
- /* read a complete word from flash */
- retval = target_read_memory(target, read_p, bank->bus_width, 1, current_word);
- if (retval != ERROR_OK)
- return retval;
-
- /* take only bytes we need */
- for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
- *buffer++ = current_word[i];
- }
-
- return ERROR_OK;
-}
-
-static int cfi_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t address = bank->base + offset; /* address of first byte to be programmed */
- uint32_t write_p;
- int align; /* number of unaligned bytes */
- int blk_count; /* number of bus_width bytes for block copy */
- uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being
- *programmed */
- int i;
- int retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset + count > bank->size)
- return ERROR_FLASH_DST_OUT_OF_BANK;
-
- if (cfi_info->qry[0] != 'Q')
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- /* start at the first byte of the first word (bus_width size) */
- write_p = address & ~(bank->bus_width - 1);
- align = address - write_p;
- if (align != 0) {
- LOG_INFO("Fixup %d unaligned head bytes", align);
-
- /* read a complete word from flash */
- retval = target_read_memory(target, write_p, bank->bus_width, 1, current_word);
- if (retval != ERROR_OK)
- return retval;
-
- /* replace only bytes that must be written */
- for (i = align; (i < bank->bus_width) && (count > 0); i++, count--)
- current_word[i] = *buffer++;
-
- retval = cfi_write_word(bank, current_word, write_p);
- if (retval != ERROR_OK)
- return retval;
- write_p += bank->bus_width;
- }
-
- /* handle blocks of bus_size aligned bytes */
- blk_count = count & ~(bank->bus_width - 1); /* round down, leave tail bytes */
- switch (cfi_info->pri_id) {
- /* try block writes (fails without working area) */
- case 1:
- case 3:
- retval = cfi_intel_write_block(bank, buffer, write_p, blk_count);
- break;
- case 2:
- retval = cfi_spansion_write_block(bank, buffer, write_p, blk_count);
- break;
- default:
- LOG_ERROR("cfi primary command set %i unsupported", cfi_info->pri_id);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
- if (retval == ERROR_OK) {
- /* Increment pointers and decrease count on succesful block write */
- buffer += blk_count;
- write_p += blk_count;
- count -= blk_count;
- } else {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* Calculate buffer size and boundary mask
- * buffersize is (buffer size per chip) * (number of chips)
- * bufferwsize is buffersize in words */
- uint32_t buffersize =
- (1UL <<
- cfi_info->max_buf_write_size) *
- (bank->bus_width / bank->chip_width);
- uint32_t buffermask = buffersize-1;
- uint32_t bufferwsize = buffersize / bank->bus_width;
-
- /* fall back to memory writes */
- while (count >= (uint32_t)bank->bus_width) {
- int fallback;
- if ((write_p & 0xff) == 0) {
- LOG_INFO("Programming at 0x%08" PRIx32 ", count 0x%08"
- PRIx32 " bytes remaining", write_p, count);
- }
- fallback = 1;
- if ((bufferwsize > 0) && (count >= buffersize) &&
- !(write_p & buffermask)) {
- retval = cfi_write_words(bank, buffer, bufferwsize, write_p);
- if (retval == ERROR_OK) {
- buffer += buffersize;
- write_p += buffersize;
- count -= buffersize;
- fallback = 0;
- } else if (retval != ERROR_FLASH_OPER_UNSUPPORTED)
- return retval;
- }
- /* try the slow way? */
- if (fallback) {
- for (i = 0; i < bank->bus_width; i++)
- current_word[i] = *buffer++;
-
- retval = cfi_write_word(bank, current_word, write_p);
- if (retval != ERROR_OK)
- return retval;
-
- write_p += bank->bus_width;
- count -= bank->bus_width;
- }
- }
- } else
- return retval;
- }
-
- /* return to read array mode, so we can read from flash again for padding */
- retval = cfi_reset(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* handle unaligned tail bytes */
- if (count > 0) {
- LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count);
-
- /* read a complete word from flash */
- retval = target_read_memory(target, write_p, bank->bus_width, 1, current_word);
- if (retval != ERROR_OK)
- return retval;
-
- /* replace only bytes that must be written */
- for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--)
- current_word[i] = *buffer++;
-
- retval = cfi_write_word(bank, current_word, write_p);
- if (retval != ERROR_OK)
- return retval;
- }
-
- /* return to read array mode */
- return cfi_reset(bank);
-}
-
-static void cfi_fixup_reversed_erase_regions(struct flash_bank *bank, const void *param)
-{
- (void) param;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
-
- pri_ext->_reversed_geometry = 1;
-}
-
-static void cfi_fixup_0002_erase_regions(struct flash_bank *bank, const void *param)
-{
- int i;
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- (void) param;
-
- if ((pri_ext->_reversed_geometry) || (pri_ext->TopBottom == 3)) {
- LOG_DEBUG("swapping reversed erase region information on cmdset 0002 device");
-
- for (i = 0; i < cfi_info->num_erase_regions / 2; i++) {
- int j = (cfi_info->num_erase_regions - 1) - i;
- uint32_t swap;
-
- swap = cfi_info->erase_region_info[i];
- cfi_info->erase_region_info[i] = cfi_info->erase_region_info[j];
- cfi_info->erase_region_info[j] = swap;
- }
- }
-}
-
-static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, const void *param)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext;
- const struct cfi_unlock_addresses *unlock_addresses = param;
-
- pri_ext->_unlock1 = unlock_addresses->unlock1;
- pri_ext->_unlock2 = unlock_addresses->unlock2;
-}
-
-static void cfi_fixup_0002_polling_bits(struct flash_bank *bank, const void *param)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- const int *status_poll_mask = param;
-
- cfi_info->status_poll_mask = *status_poll_mask;
-}
-
-
-static int cfi_query_string(struct flash_bank *bank, int address)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- int retval;
-
- retval = cfi_send_command(bank, 0x98, flash_address(bank, 0, address));
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_query_u8(bank, 0, 0x10, &cfi_info->qry[0]);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x11, &cfi_info->qry[1]);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x12, &cfi_info->qry[2]);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("CFI qry returned: 0x%2.2x 0x%2.2x 0x%2.2x",
- cfi_info->qry[0], cfi_info->qry[1], cfi_info->qry[2]);
-
- if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y')) {
- retval = cfi_reset(bank);
- if (retval != ERROR_OK)
- return retval;
- LOG_ERROR("Could not probe bank: no QRY");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- return ERROR_OK;
-}
-
-static int cfi_probe(struct flash_bank *bank)
-{
- struct cfi_flash_bank *cfi_info = bank->driver_priv;
- struct target *target = bank->target;
- int num_sectors = 0;
- int i;
- int sector = 0;
- uint32_t unlock1 = 0x555;
- uint32_t unlock2 = 0x2aa;
- int retval;
- uint8_t value_buf0[CFI_MAX_BUS_WIDTH], value_buf1[CFI_MAX_BUS_WIDTH];
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- cfi_info->probed = 0;
- cfi_info->num_erase_regions = 0;
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
- if (cfi_info->erase_region_info) {
- free(cfi_info->erase_region_info);
- cfi_info->erase_region_info = NULL;
- }
-
- /* JEDEC standard JESD21C uses 0x5555 and 0x2aaa as unlock addresses,
- * while CFI compatible AMD/Spansion flashes use 0x555 and 0x2aa
- */
- if (cfi_info->jedec_probe) {
- unlock1 = 0x5555;
- unlock2 = 0x2aaa;
- }
-
- /* switch to read identifier codes mode ("AUTOSELECT") */
- retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, unlock1));
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, unlock2));
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, unlock1));
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_memory(target, flash_address(bank, 0, 0x00),
- bank->bus_width, 1, value_buf0);
- if (retval != ERROR_OK)
- return retval;
- retval = target_read_memory(target, flash_address(bank, 0, 0x01),
- bank->bus_width, 1, value_buf1);
- if (retval != ERROR_OK)
- return retval;
- switch (bank->chip_width) {
- case 1:
- cfi_info->manufacturer = *value_buf0;
- cfi_info->device_id = *value_buf1;
- break;
- case 2:
- cfi_info->manufacturer = target_buffer_get_u16(target, value_buf0);
- cfi_info->device_id = target_buffer_get_u16(target, value_buf1);
- break;
- case 4:
- cfi_info->manufacturer = target_buffer_get_u32(target, value_buf0);
- cfi_info->device_id = target_buffer_get_u32(target, value_buf1);
- break;
- default:
- LOG_ERROR("Unsupported bank chipwidth %d, can't probe memory",
- bank->chip_width);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x",
- cfi_info->manufacturer, cfi_info->device_id);
- /* switch back to read array mode */
- retval = cfi_reset(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* check device/manufacturer ID for known non-CFI flashes. */
- cfi_fixup_non_cfi(bank);
-
- /* query only if this is a CFI compatible flash,
- * otherwise the relevant info has already been filled in
- */
- if (cfi_info->not_cfi == 0) {
- /* enter CFI query mode
- * according to JEDEC Standard No. 68.01,
- * a single bus sequence with address = 0x55, data = 0x98 should put
- * the device into CFI query mode.
- *
- * SST flashes clearly violate this, and we will consider them incompatible for now
- */
-
- retval = cfi_query_string(bank, 0x55);
- if (retval != ERROR_OK) {
- /*
- * Spansion S29WS-N CFI query fix is to try 0x555 if 0x55 fails. Should
- * be harmless enough:
- *
- * http://www.infradead.org/pipermail/linux-mtd/2005-September/013618.html
- */
- LOG_USER("Try workaround w/0x555 instead of 0x55 to get QRY.");
- retval = cfi_query_string(bank, 0x555);
- }
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_query_u16(bank, 0, 0x13, &cfi_info->pri_id);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u16(bank, 0, 0x15, &cfi_info->pri_addr);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u16(bank, 0, 0x17, &cfi_info->alt_id);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u16(bank, 0, 0x19, &cfi_info->alt_addr);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("qry: '%c%c%c', pri_id: 0x%4.4x, pri_addr: 0x%4.4x, alt_id: "
- "0x%4.4x, alt_addr: 0x%4.4x", cfi_info->qry[0], cfi_info->qry[1],
- cfi_info->qry[2], cfi_info->pri_id, cfi_info->pri_addr,
- cfi_info->alt_id, cfi_info->alt_addr);
-
- retval = cfi_query_u8(bank, 0, 0x1b, &cfi_info->vcc_min);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x1c, &cfi_info->vcc_max);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x1d, &cfi_info->vpp_min);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x1e, &cfi_info->vpp_max);
- if (retval != ERROR_OK)
- return retval;
-
- retval = cfi_query_u8(bank, 0, 0x1f, &cfi_info->word_write_timeout_typ);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x20, &cfi_info->buf_write_timeout_typ);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x21, &cfi_info->block_erase_timeout_typ);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x22, &cfi_info->chip_erase_timeout_typ);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x23, &cfi_info->word_write_timeout_max);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x24, &cfi_info->buf_write_timeout_max);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x25, &cfi_info->block_erase_timeout_max);
- if (retval != ERROR_OK)
- return retval;
- retval = cfi_query_u8(bank, 0, 0x26, &cfi_info->chip_erase_timeout_max);
- if (retva
<TRUNCATED>
[16/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32f1x.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32f1x.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32f1x.c
deleted file mode 100755
index d06e0a6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32f1x.c
+++ /dev/null
@@ -1,1652 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-/* stm32x register locations */
-
-#define FLASH_REG_BASE_B0 0x40022000
-#define FLASH_REG_BASE_B1 0x40022040
-
-#define STM32_FLASH_ACR 0x00
-#define STM32_FLASH_KEYR 0x04
-#define STM32_FLASH_OPTKEYR 0x08
-#define STM32_FLASH_SR 0x0C
-#define STM32_FLASH_CR 0x10
-#define STM32_FLASH_AR 0x14
-#define STM32_FLASH_OBR 0x1C
-#define STM32_FLASH_WRPR 0x20
-
-/* TODO: Check if code using these really should be hard coded to bank 0.
- * There are valid cases, on dual flash devices the protection of the
- * second bank is done on the bank0 reg's. */
-#define STM32_FLASH_ACR_B0 0x40022000
-#define STM32_FLASH_KEYR_B0 0x40022004
-#define STM32_FLASH_OPTKEYR_B0 0x40022008
-#define STM32_FLASH_SR_B0 0x4002200C
-#define STM32_FLASH_CR_B0 0x40022010
-#define STM32_FLASH_AR_B0 0x40022014
-#define STM32_FLASH_OBR_B0 0x4002201C
-#define STM32_FLASH_WRPR_B0 0x40022020
-
-/* option byte location */
-
-#define STM32_OB_RDP 0x1FFFF800
-#define STM32_OB_USER 0x1FFFF802
-#define STM32_OB_DATA0 0x1FFFF804
-#define STM32_OB_DATA1 0x1FFFF806
-#define STM32_OB_WRP0 0x1FFFF808
-#define STM32_OB_WRP1 0x1FFFF80A
-#define STM32_OB_WRP2 0x1FFFF80C
-#define STM32_OB_WRP3 0x1FFFF80E
-
-/* FLASH_CR register bits */
-
-#define FLASH_PG (1 << 0)
-#define FLASH_PER (1 << 1)
-#define FLASH_MER (1 << 2)
-#define FLASH_OPTPG (1 << 4)
-#define FLASH_OPTER (1 << 5)
-#define FLASH_STRT (1 << 6)
-#define FLASH_LOCK (1 << 7)
-#define FLASH_OPTWRE (1 << 9)
-
-/* FLASH_SR register bits */
-
-#define FLASH_BSY (1 << 0)
-#define FLASH_PGERR (1 << 2)
-#define FLASH_WRPRTERR (1 << 4)
-#define FLASH_EOP (1 << 5)
-
-/* STM32_FLASH_OBR bit definitions (reading) */
-
-#define OPT_ERROR 0
-#define OPT_READOUT 1
-#define OPT_RDWDGSW 2
-#define OPT_RDRSTSTOP 3
-#define OPT_RDRSTSTDBY 4
-#define OPT_BFB2 5 /* dual flash bank only */
-
-/* register unlock keys */
-
-#define KEY1 0x45670123
-#define KEY2 0xCDEF89AB
-
-/* timeout values */
-
-#define FLASH_WRITE_TIMEOUT 10
-#define FLASH_ERASE_TIMEOUT 100
-
-struct stm32x_options {
- uint16_t RDP;
- uint16_t user_options;
- uint16_t user_data;
- uint16_t protection[4];
-};
-
-struct stm32x_flash_bank {
- struct stm32x_options option_bytes;
- int ppage_size;
- int probed;
-
- bool has_dual_banks;
- /* used to access dual flash bank stm32xl */
- uint32_t register_base;
- uint16_t default_rdp;
- int user_data_offset;
- int option_offset;
- uint32_t user_bank_size;
-};
-
-static int stm32x_mass_erase(struct flash_bank *bank);
-static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id);
-static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count);
-
-/* flash bank stm32x <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
-{
- struct stm32x_flash_bank *stm32x_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- stm32x_info = malloc(sizeof(struct stm32x_flash_bank));
-
- bank->driver_priv = stm32x_info;
- stm32x_info->probed = 0;
- stm32x_info->has_dual_banks = false;
- stm32x_info->register_base = FLASH_REG_BASE_B0;
- stm32x_info->user_bank_size = bank->size;
-
- return ERROR_OK;
-}
-
-static inline int stm32x_get_flash_reg(struct flash_bank *bank, uint32_t reg)
-{
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
- return reg + stm32x_info->register_base;
-}
-
-static inline int stm32x_get_flash_status(struct flash_bank *bank, uint32_t *status)
-{
- struct target *target = bank->target;
- return target_read_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR), status);
-}
-
-static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
-{
- struct target *target = bank->target;
- uint32_t status;
- int retval = ERROR_OK;
-
- /* wait for busy to clear */
- for (;;) {
- retval = stm32x_get_flash_status(bank, &status);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
- if ((status & FLASH_BSY) == 0)
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
-
- if (status & FLASH_WRPRTERR) {
- LOG_ERROR("stm32x device protected");
- retval = ERROR_FAIL;
- }
-
- if (status & FLASH_PGERR) {
- LOG_ERROR("stm32x device programming failed");
- retval = ERROR_FAIL;
- }
-
- /* Clear but report errors */
- if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
- /* If this operation fails, we ignore it and report the original
- * retval
- */
- target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR),
- FLASH_WRPRTERR | FLASH_PGERR);
- }
- return retval;
-}
-
-static int stm32x_check_operation_supported(struct flash_bank *bank)
-{
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
-
- /* if we have a dual flash bank device then
- * we need to perform option byte stuff on bank0 only */
- if (stm32x_info->register_base != FLASH_REG_BASE_B0) {
- LOG_ERROR("Option Byte Operation's must use bank0");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int stm32x_read_options(struct flash_bank *bank)
-{
- uint32_t optiondata;
- struct stm32x_flash_bank *stm32x_info = NULL;
- struct target *target = bank->target;
-
- stm32x_info = bank->driver_priv;
-
- /* read current option bytes */
- int retval = target_read_u32(target, STM32_FLASH_OBR_B0, &optiondata);
- if (retval != ERROR_OK)
- return retval;
-
- stm32x_info->option_bytes.user_options = (optiondata >> stm32x_info->option_offset >> 2) & 0xffff;
- stm32x_info->option_bytes.user_data = (optiondata >> stm32x_info->user_data_offset) & 0xffff;
- stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
-
- if (optiondata & (1 << OPT_READOUT))
- LOG_INFO("Device Security Bit Set");
-
- /* each bit refers to a 4bank protection */
- retval = target_read_u32(target, STM32_FLASH_WRPR_B0, &optiondata);
- if (retval != ERROR_OK)
- return retval;
-
- stm32x_info->option_bytes.protection[0] = (uint16_t)optiondata;
- stm32x_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
- stm32x_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
- stm32x_info->option_bytes.protection[3] = (uint16_t)(optiondata >> 24);
-
- return ERROR_OK;
-}
-
-static int stm32x_erase_options(struct flash_bank *bank)
-{
- struct stm32x_flash_bank *stm32x_info = NULL;
- struct target *target = bank->target;
-
- stm32x_info = bank->driver_priv;
-
- /* read current options */
- stm32x_read_options(bank);
-
- /* unlock flash registers */
- int retval = target_write_u32(target, STM32_FLASH_KEYR_B0, KEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, STM32_FLASH_KEYR_B0, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* unlock option flash registers */
- retval = target_write_u32(target, STM32_FLASH_OPTKEYR_B0, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, STM32_FLASH_OPTKEYR_B0, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* erase option bytes */
- retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_OPTER | FLASH_OPTWRE);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- /* clear readout protection and complementary option bytes
- * this will also force a device unlock if set */
- stm32x_info->option_bytes.RDP = stm32x_info->default_rdp;
-
- return ERROR_OK;
-}
-
-static int stm32x_write_options(struct flash_bank *bank)
-{
- struct stm32x_flash_bank *stm32x_info = NULL;
- struct target *target = bank->target;
-
- stm32x_info = bank->driver_priv;
-
- /* unlock flash registers */
- int retval = target_write_u32(target, STM32_FLASH_KEYR_B0, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, STM32_FLASH_KEYR_B0, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* unlock option flash registers */
- retval = target_write_u32(target, STM32_FLASH_OPTKEYR_B0, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, STM32_FLASH_OPTKEYR_B0, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* program option bytes */
- retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_OPTPG | FLASH_OPTWRE);
- if (retval != ERROR_OK)
- return retval;
-
- uint8_t opt_bytes[16];
-
- target_buffer_set_u16(target, opt_bytes, stm32x_info->option_bytes.RDP);
- target_buffer_set_u16(target, opt_bytes + 2, stm32x_info->option_bytes.user_options);
- target_buffer_set_u16(target, opt_bytes + 4, stm32x_info->option_bytes.user_data & 0xff);
- target_buffer_set_u16(target, opt_bytes + 6, (stm32x_info->option_bytes.user_data >> 8) & 0xff);
- target_buffer_set_u16(target, opt_bytes + 8, stm32x_info->option_bytes.protection[0]);
- target_buffer_set_u16(target, opt_bytes + 10, stm32x_info->option_bytes.protection[1]);
- target_buffer_set_u16(target, opt_bytes + 12, stm32x_info->option_bytes.protection[2]);
- target_buffer_set_u16(target, opt_bytes + 14, stm32x_info->option_bytes.protection[3]);
-
- uint32_t offset = STM32_OB_RDP - bank->base;
- retval = stm32x_write_block(bank, opt_bytes, offset, sizeof(opt_bytes) / 2);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
- LOG_ERROR("working area required to erase options bytes");
- return retval;
- }
-
- retval = target_write_u32(target, STM32_FLASH_CR_B0, FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32x_protect_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
-
- uint32_t protection;
- int i, s;
- int num_bits;
- int set;
-
- int retval = stm32x_check_operation_supported(bank);
- if (ERROR_OK != retval)
- return retval;
-
- /* medium density - each bit refers to a 4bank protection
- * high density - each bit refers to a 2bank protection */
- retval = target_read_u32(target, STM32_FLASH_WRPR_B0, &protection);
- if (retval != ERROR_OK)
- return retval;
-
- /* medium density - each protection bit is for 4 * 1K pages
- * high density - each protection bit is for 2 * 2K pages */
- num_bits = (bank->num_sectors / stm32x_info->ppage_size);
-
- if (stm32x_info->ppage_size == 2) {
- /* high density flash/connectivity line protection */
-
- set = 1;
-
- if (protection & (1 << 31))
- set = 0;
-
- /* bit 31 controls sector 62 - 255 protection for high density
- * bit 31 controls sector 62 - 127 protection for connectivity line */
- for (s = 62; s < bank->num_sectors; s++)
- bank->sectors[s].is_protected = set;
-
- if (bank->num_sectors > 61)
- num_bits = 31;
-
- for (i = 0; i < num_bits; i++) {
- set = 1;
-
- if (protection & (1 << i))
- set = 0;
-
- for (s = 0; s < stm32x_info->ppage_size; s++)
- bank->sectors[(i * stm32x_info->ppage_size) + s].is_protected = set;
- }
- } else {
- /* low/medium density flash protection */
- for (i = 0; i < num_bits; i++) {
- set = 1;
-
- if (protection & (1 << i))
- set = 0;
-
- for (s = 0; s < stm32x_info->ppage_size; s++)
- bank->sectors[(i * stm32x_info->ppage_size) + s].is_protected = set;
- }
- }
-
- return ERROR_OK;
-}
-
-static int stm32x_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- int i;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first == 0) && (last == (bank->num_sectors - 1)))
- return stm32x_mass_erase(bank);
-
- /* unlock flash registers */
- int retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- for (i = first; i <= last; i++) {
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_AR),
- bank->base + bank->sectors[i].offset);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target,
- stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PER | FLASH_STRT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- bank->sectors[i].is_erased = 1;
- }
-
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct stm32x_flash_bank *stm32x_info = NULL;
- struct target *target = bank->target;
- uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
- int i, reg, bit;
- int status;
- uint32_t protection;
-
- stm32x_info = bank->driver_priv;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int retval = stm32x_check_operation_supported(bank);
- if (ERROR_OK != retval)
- return retval;
-
- if ((first % stm32x_info->ppage_size) != 0) {
- LOG_WARNING("aligned start protect sector to a %d sector boundary",
- stm32x_info->ppage_size);
- first = first - (first % stm32x_info->ppage_size);
- }
- if (((last + 1) % stm32x_info->ppage_size) != 0) {
- LOG_WARNING("aligned end protect sector to a %d sector boundary",
- stm32x_info->ppage_size);
- last++;
- last = last - (last % stm32x_info->ppage_size);
- last--;
- }
-
- /* medium density - each bit refers to a 4bank protection
- * high density - each bit refers to a 2bank protection */
- retval = target_read_u32(target, STM32_FLASH_WRPR_B0, &protection);
- if (retval != ERROR_OK)
- return retval;
-
- prot_reg[0] = (uint16_t)protection;
- prot_reg[1] = (uint16_t)(protection >> 8);
- prot_reg[2] = (uint16_t)(protection >> 16);
- prot_reg[3] = (uint16_t)(protection >> 24);
-
- if (stm32x_info->ppage_size == 2) {
- /* high density flash */
-
- /* bit 7 controls sector 62 - 255 protection */
- if (last > 61) {
- if (set)
- prot_reg[3] &= ~(1 << 7);
- else
- prot_reg[3] |= (1 << 7);
- }
-
- if (first > 61)
- first = 62;
- if (last > 61)
- last = 61;
-
- for (i = first; i <= last; i++) {
- reg = (i / stm32x_info->ppage_size) / 8;
- bit = (i / stm32x_info->ppage_size) - (reg * 8);
-
- if (set)
- prot_reg[reg] &= ~(1 << bit);
- else
- prot_reg[reg] |= (1 << bit);
- }
- } else {
- /* medium density flash */
- for (i = first; i <= last; i++) {
- reg = (i / stm32x_info->ppage_size) / 8;
- bit = (i / stm32x_info->ppage_size) - (reg * 8);
-
- if (set)
- prot_reg[reg] &= ~(1 << bit);
- else
- prot_reg[reg] |= (1 << bit);
- }
- }
-
- status = stm32x_erase_options(bank);
- if (status != ERROR_OK)
- return status;
-
- stm32x_info->option_bytes.protection[0] = prot_reg[0];
- stm32x_info->option_bytes.protection[1] = prot_reg[1];
- stm32x_info->option_bytes.protection[2] = prot_reg[2];
- stm32x_info->option_bytes.protection[3] = prot_reg[3];
-
- return stm32x_write_options(bank);
-}
-
-static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[5];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* see contrib/loaders/flash/stm32f1x.S for src */
-
- static const uint8_t stm32x_flash_write_code[] = {
- /* #define STM32_FLASH_SR_OFFSET 0x0C */
- /* wait_fifo: */
- 0x16, 0x68, /* ldr r6, [r2, #0] */
- 0x00, 0x2e, /* cmp r6, #0 */
- 0x18, 0xd0, /* beq exit */
- 0x55, 0x68, /* ldr r5, [r2, #4] */
- 0xb5, 0x42, /* cmp r5, r6 */
- 0xf9, 0xd0, /* beq wait_fifo */
- 0x2e, 0x88, /* ldrh r6, [r5, #0] */
- 0x26, 0x80, /* strh r6, [r4, #0] */
- 0x02, 0x35, /* adds r5, #2 */
- 0x02, 0x34, /* adds r4, #2 */
- /* busy: */
- 0xc6, 0x68, /* ldr r6, [r0, #STM32_FLASH_SR_OFFSET] */
- 0x01, 0x27, /* movs r7, #1 */
- 0x3e, 0x42, /* tst r6, r7 */
- 0xfb, 0xd1, /* bne busy */
- 0x14, 0x27, /* movs r7, #0x14 */
- 0x3e, 0x42, /* tst r6, r7 */
- 0x08, 0xd1, /* bne error */
- 0x9d, 0x42, /* cmp r5, r3 */
- 0x01, 0xd3, /* bcc no_wrap */
- 0x15, 0x46, /* mov r5, r2 */
- 0x08, 0x35, /* adds r5, #8 */
- /* no_wrap: */
- 0x55, 0x60, /* str r5, [r2, #4] */
- 0x01, 0x39, /* subs r1, r1, #1 */
- 0x00, 0x29, /* cmp r1, #0 */
- 0x02, 0xd0, /* beq exit */
- 0xe5, 0xe7, /* b wait_fifo */
- /* error: */
- 0x00, 0x20, /* movs r0, #0 */
- 0x50, 0x60, /* str r0, [r2, #4] */
- /* exit: */
- 0x30, 0x46, /* mov r0, r6 */
- 0x00, 0xbe, /* bkpt #0 */
- };
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(stm32x_flash_write_code), stm32x_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (halfword-16bit) */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer start */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[4], "r4", 32, PARAM_IN_OUT); /* target address */
-
- buf_set_u32(reg_params[0].value, 0, 32, stm32x_info->register_base);
- buf_set_u32(reg_params[1].value, 0, 32, count);
- buf_set_u32(reg_params[2].value, 0, 32, source->address);
- buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[4].value, 0, 32, address);
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- retval = target_run_flash_async_algorithm(target, buffer, count, 2,
- 0, NULL,
- 5, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- if (retval == ERROR_FLASH_OPERATION_FAILED) {
- LOG_ERROR("flash write failed at address 0x%"PRIx32,
- buf_get_u32(reg_params[4].value, 0, 32));
-
- if (buf_get_u32(reg_params[0].value, 0, 32) & FLASH_PGERR) {
- LOG_ERROR("flash memory not erased before writing");
- /* Clear but report errors */
- target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR), FLASH_PGERR);
- }
-
- if (buf_get_u32(reg_params[0].value, 0, 32) & FLASH_WRPRTERR) {
- LOG_ERROR("flash memory write protected");
- /* Clear but report errors */
- target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR), FLASH_WRPRTERR);
- }
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return retval;
-}
-
-static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint8_t *new_buffer = NULL;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x1) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* If there's an odd number of bytes, the data has to be padded. Duplicate
- * the buffer and use the normal code path with a single block write since
- * it's probably cheaper than to special case the last odd write using
- * discrete accesses. */
- if (count & 1) {
- new_buffer = malloc(count + 1);
- if (new_buffer == NULL) {
- LOG_ERROR("odd number of bytes to write and no memory for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("odd number of bytes to write, padding with 0xff");
- buffer = memcpy(new_buffer, buffer, count);
- new_buffer[count++] = 0xff;
- }
-
- uint32_t words_remaining = count / 2;
- int retval, retval2;
-
- /* unlock flash registers */
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY1);
- if (retval != ERROR_OK)
- goto cleanup;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
- if (retval != ERROR_OK)
- goto cleanup;
-
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_PG);
- if (retval != ERROR_OK)
- goto cleanup;
-
- /* try using a block write */
- retval = stm32x_write_block(bank, buffer, offset, words_remaining);
-
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single halfword accesses */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
-
- while (words_remaining > 0) {
- uint16_t value;
- memcpy(&value, buffer, sizeof(uint16_t));
-
- retval = target_write_u16(target, bank->base + offset, value);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- retval = stm32x_wait_status_busy(bank, 5);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- words_remaining--;
- buffer += 2;
- offset += 2;
- }
- }
-
-reset_pg_and_lock:
- retval2 = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval == ERROR_OK)
- retval = retval2;
-
-cleanup:
- if (new_buffer)
- free(new_buffer);
-
- return retval;
-}
-
-static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
-{
- /* This check the device CPUID core register to detect
- * the M0 from the M3 devices. */
-
- struct target *target = bank->target;
- uint32_t cpuid, device_id_register = 0;
-
- /* Get the CPUID from the ARM Core
- * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0432c/DDI0432C_cortex_m0_r0p0_trm.pdf 4.2.1 */
- int retval = target_read_u32(target, 0xE000ED00, &cpuid);
- if (retval != ERROR_OK)
- return retval;
-
- if (((cpuid >> 4) & 0xFFF) == 0xC20) {
- /* 0xC20 is M0 devices */
- device_id_register = 0x40015800;
- } else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
- /* 0xC23 is M3 devices */
- device_id_register = 0xE0042000;
- } else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
- /* 0xC24 is M4 devices */
- device_id_register = 0xE0042000;
- } else {
- LOG_ERROR("Cannot identify target as a stm32x");
- return ERROR_FAIL;
- }
-
- /* read stm32 device id register */
- retval = target_read_u32(target, device_id_register, device_id);
- if (retval != ERROR_OK)
- return retval;
-
- return retval;
-}
-
-static int stm32x_get_flash_size(struct flash_bank *bank, uint16_t *flash_size_in_kb)
-{
- struct target *target = bank->target;
- uint32_t cpuid, flash_size_reg;
-
- int retval = target_read_u32(target, 0xE000ED00, &cpuid);
- if (retval != ERROR_OK)
- return retval;
-
- if (((cpuid >> 4) & 0xFFF) == 0xC20) {
- /* 0xC20 is M0 devices */
- flash_size_reg = 0x1FFFF7CC;
- } else if (((cpuid >> 4) & 0xFFF) == 0xC23) {
- /* 0xC23 is M3 devices */
- flash_size_reg = 0x1FFFF7E0;
- } else if (((cpuid >> 4) & 0xFFF) == 0xC24) {
- /* 0xC24 is M4 devices */
- flash_size_reg = 0x1FFFF7CC;
- } else {
- LOG_ERROR("Cannot identify target as a stm32x");
- return ERROR_FAIL;
- }
-
- retval = target_read_u16(target, flash_size_reg, flash_size_in_kb);
- if (retval != ERROR_OK)
- return retval;
-
- return retval;
-}
-
-static int stm32x_probe(struct flash_bank *bank)
-{
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
- int i;
- uint16_t flash_size_in_kb;
- uint16_t max_flash_size_in_kb;
- uint32_t device_id;
- int page_size;
- uint32_t base_address = 0x08000000;
-
- stm32x_info->probed = 0;
- stm32x_info->register_base = FLASH_REG_BASE_B0;
- stm32x_info->user_data_offset = 10;
- stm32x_info->option_offset = 0;
-
- /* default factory protection level */
- stm32x_info->default_rdp = 0x5AA5;
-
- /* read stm32 device id register */
- int retval = stm32x_get_device_id(bank, &device_id);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
-
- /* set page size, protection granularity and max flash size depending on family */
- switch (device_id & 0xfff) {
- case 0x410: /* medium density */
- page_size = 1024;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 128;
- break;
- case 0x412: /* low density */
- page_size = 1024;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 32;
- break;
- case 0x414: /* high density */
- page_size = 2048;
- stm32x_info->ppage_size = 2;
- max_flash_size_in_kb = 512;
- break;
- case 0x418: /* connectivity line density */
- page_size = 2048;
- stm32x_info->ppage_size = 2;
- max_flash_size_in_kb = 256;
- break;
- case 0x420: /* value line density */
- page_size = 1024;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 128;
- break;
- case 0x422: /* stm32f302/3xb/c */
- page_size = 2048;
- stm32x_info->ppage_size = 2;
- max_flash_size_in_kb = 256;
- stm32x_info->user_data_offset = 16;
- stm32x_info->option_offset = 6;
- stm32x_info->default_rdp = 0x55AA;
- break;
- case 0x446: /* stm32f303xD/E */
- page_size = 2048;
- stm32x_info->ppage_size = 2;
- max_flash_size_in_kb = 512;
- stm32x_info->user_data_offset = 16;
- stm32x_info->option_offset = 6;
- stm32x_info->default_rdp = 0x55AA;
- break;
- case 0x428: /* value line High density */
- page_size = 2048;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 128;
- break;
- case 0x430: /* xl line density (dual flash banks) */
- page_size = 2048;
- stm32x_info->ppage_size = 2;
- max_flash_size_in_kb = 1024;
- stm32x_info->has_dual_banks = true;
- break;
- case 0x432: /* stm32f37x */
- page_size = 2048;
- stm32x_info->ppage_size = 2;
- max_flash_size_in_kb = 256;
- stm32x_info->user_data_offset = 16;
- stm32x_info->option_offset = 6;
- stm32x_info->default_rdp = 0x55AA;
- break;
- case 0x438: /* stm32f33x */
- case 0x439: /* stm32f302x6/8 */
- page_size = 2048;
- stm32x_info->ppage_size = 2;
- max_flash_size_in_kb = 64;
- stm32x_info->user_data_offset = 16;
- stm32x_info->option_offset = 6;
- stm32x_info->default_rdp = 0x55AA;
- break;
- case 0x440: /* stm32f05x */
- case 0x444: /* stm32f03x */
- case 0x445: /* stm32f04x */
- page_size = 1024;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 64;
- stm32x_info->user_data_offset = 16;
- stm32x_info->option_offset = 6;
- stm32x_info->default_rdp = 0x55AA;
- break;
- case 0x448: /* stm32f07x */
- case 0x442: /* stm32f09x */
- page_size = 2048;
- stm32x_info->ppage_size = 4;
- max_flash_size_in_kb = 256;
- stm32x_info->user_data_offset = 16;
- stm32x_info->option_offset = 6;
- stm32x_info->default_rdp = 0x55AA;
- break;
- default:
- LOG_WARNING("Cannot identify target as a STM32 family.");
- return ERROR_FAIL;
- }
-
- /* get flash size from target. */
- retval = stm32x_get_flash_size(bank, &flash_size_in_kb);
-
- /* failed reading flash size or flash size invalid (early silicon),
- * default to max target family */
- if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
- max_flash_size_in_kb);
- flash_size_in_kb = max_flash_size_in_kb;
- }
-
- if (stm32x_info->has_dual_banks) {
- /* split reported size into matching bank */
- if (bank->base != 0x08080000) {
- /* bank 0 will be fixed 512k */
- flash_size_in_kb = 512;
- } else {
- flash_size_in_kb -= 512;
- /* bank1 also uses a register offset */
- stm32x_info->register_base = FLASH_REG_BASE_B1;
- base_address = 0x08080000;
- }
- }
-
- /* if the user sets the size manually then ignore the probed value
- * this allows us to work around devices that have a invalid flash size register value */
- if (stm32x_info->user_bank_size) {
- LOG_INFO("ignoring flash probed value, using configured bank size");
- flash_size_in_kb = stm32x_info->user_bank_size / 1024;
- }
-
- LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
-
- /* did we assign flash size? */
- assert(flash_size_in_kb != 0xffff);
-
- /* calculate numbers of pages */
- int num_pages = flash_size_in_kb * 1024 / page_size;
-
- /* check that calculation result makes sense */
- assert(num_pages > 0);
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->base = base_address;
- bank->size = (num_pages * page_size);
- bank->num_sectors = num_pages;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
-
- for (i = 0; i < num_pages; i++) {
- bank->sectors[i].offset = i * page_size;
- bank->sectors[i].size = page_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- stm32x_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int stm32x_auto_probe(struct flash_bank *bank)
-{
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
- if (stm32x_info->probed)
- return ERROR_OK;
- return stm32x_probe(bank);
-}
-
-#if 0
-COMMAND_HANDLER(stm32x_handle_part_id_command)
-{
- return ERROR_OK;
-}
-#endif
-
-static const char *get_stm32f0_revision(uint16_t rev_id)
-{
- const char *rev_str = NULL;
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "1.0";
- break;
- case 0x2000:
- rev_str = "2.0";
- break;
- }
- return rev_str;
-}
-
-static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- uint32_t dbgmcu_idcode;
-
- /* read stm32 device id register */
- int retval = stm32x_get_device_id(bank, &dbgmcu_idcode);
- if (retval != ERROR_OK)
- return retval;
-
- uint16_t device_id = dbgmcu_idcode & 0xfff;
- uint16_t rev_id = dbgmcu_idcode >> 16;
- const char *device_str;
- const char *rev_str = NULL;
-
- switch (device_id) {
- case 0x410:
- device_str = "STM32F10x (Medium Density)";
-
- switch (rev_id) {
- case 0x0000:
- rev_str = "A";
- break;
-
- case 0x2000:
- rev_str = "B";
- break;
-
- case 0x2001:
- rev_str = "Z";
- break;
-
- case 0x2003:
- rev_str = "Y";
- break;
- }
- break;
-
- case 0x412:
- device_str = "STM32F10x (Low Density)";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
- }
- break;
-
- case 0x414:
- device_str = "STM32F10x (High Density)";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
-
- case 0x1003:
- rev_str = "Y";
- break;
- }
- break;
-
- case 0x418:
- device_str = "STM32F10x (Connectivity)";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
- }
- break;
-
- case 0x420:
- device_str = "STM32F100 (Low/Medium Density)";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
- }
- break;
-
- case 0x422:
- device_str = "STM32F302xB/C";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
-
- case 0x1003:
- rev_str = "Y";
- break;
-
- case 0x2000:
- rev_str = "B";
- break;
- }
- break;
-
- case 0x428:
- device_str = "STM32F100 (High Density)";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
- }
- break;
-
- case 0x430:
- device_str = "STM32F10x (XL Density)";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
- }
- break;
-
- case 0x432:
- device_str = "STM32F37x";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x2000:
- rev_str = "B";
- break;
- }
- break;
-
- case 0x438:
- device_str = "STM32F33x";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
- }
- break;
-
- case 0x439:
- device_str = "STM32F302x6/8";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
- }
- break;
-
- case 0x444:
- device_str = "STM32F03x";
- rev_str = get_stm32f0_revision(rev_id);
- break;
-
- case 0x440:
- device_str = "STM32F05x";
- rev_str = get_stm32f0_revision(rev_id);
- break;
-
- case 0x445:
- device_str = "STM32F04x";
- rev_str = get_stm32f0_revision(rev_id);
- break;
-
- case 0x446:
- device_str = "STM32F303xD/E";
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
- }
- break;
-
- case 0x448:
- device_str = "STM32F07x";
- rev_str = get_stm32f0_revision(rev_id);
- break;
-
- case 0x442:
- device_str = "STM32F09x";
- rev_str = get_stm32f0_revision(rev_id);
- break;
-
- default:
- snprintf(buf, buf_size, "Cannot identify target as a STM32F0/1/3\n");
- return ERROR_FAIL;
- }
-
- if (rev_str != NULL)
- snprintf(buf, buf_size, "%s - Rev: %s", device_str, rev_str);
- else
- snprintf(buf, buf_size, "%s - Rev: unknown (0x%04x)", device_str, rev_id);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32x_handle_lock_command)
-{
- struct target *target = NULL;
- struct stm32x_flash_bank *stm32x_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- stm32x_info = bank->driver_priv;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = stm32x_check_operation_supported(bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (stm32x_erase_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to erase options");
- return ERROR_OK;
- }
-
- /* set readout protection */
- stm32x_info->option_bytes.RDP = 0;
-
- if (stm32x_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to lock device");
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "stm32x locked");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32x_handle_unlock_command)
-{
- struct target *target = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = stm32x_check_operation_supported(bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (stm32x_erase_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to unlock device");
- return ERROR_OK;
- }
-
- if (stm32x_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to lock device");
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "stm32x unlocked.\n"
- "INFO: a reset or power cycle is required "
- "for the new settings to take effect.");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32x_handle_options_read_command)
-{
- uint32_t optionbyte;
- struct target *target = NULL;
- struct stm32x_flash_bank *stm32x_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- stm32x_info = bank->driver_priv;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = stm32x_check_operation_supported(bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = target_read_u32(target, STM32_FLASH_OBR_B0, &optionbyte);
- if (retval != ERROR_OK)
- return retval;
- command_print(CMD_CTX, "Option Byte: 0x%" PRIx32 "", optionbyte);
-
- int user_data = optionbyte;
-
- if (optionbyte >> OPT_ERROR & 1)
- command_print(CMD_CTX, "Option Byte Complement Error");
-
- if (optionbyte >> OPT_READOUT & 1)
- command_print(CMD_CTX, "Readout Protection On");
- else
- command_print(CMD_CTX, "Readout Protection Off");
-
- /* user option bytes are offset depending on variant */
- optionbyte >>= stm32x_info->option_offset;
-
- if (optionbyte >> OPT_RDWDGSW & 1)
- command_print(CMD_CTX, "Software Watchdog");
- else
- command_print(CMD_CTX, "Hardware Watchdog");
-
- if (optionbyte >> OPT_RDRSTSTOP & 1)
- command_print(CMD_CTX, "Stop: No reset generated");
- else
- command_print(CMD_CTX, "Stop: Reset generated");
-
- if (optionbyte >> OPT_RDRSTSTDBY & 1)
- command_print(CMD_CTX, "Standby: No reset generated");
- else
- command_print(CMD_CTX, "Standby: Reset generated");
-
- if (stm32x_info->has_dual_banks) {
- if (optionbyte >> OPT_BFB2 & 1)
- command_print(CMD_CTX, "Boot: Bank 0");
- else
- command_print(CMD_CTX, "Boot: Bank 1");
- }
-
- command_print(CMD_CTX, "User Option0: 0x%02" PRIx8,
- (uint8_t)((user_data >> stm32x_info->user_data_offset) & 0xff));
- command_print(CMD_CTX, "User Option1: 0x%02" PRIx8,
- (uint8_t)((user_data >> (stm32x_info->user_data_offset + 8)) & 0xff));
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32x_handle_options_write_command)
-{
- struct target *target = NULL;
- struct stm32x_flash_bank *stm32x_info = NULL;
- uint16_t optionbyte;
-
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- stm32x_info = bank->driver_priv;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = stm32x_check_operation_supported(bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = stm32x_read_options(bank);
- if (ERROR_OK != retval)
- return retval;
-
- /* start with current options */
- optionbyte = stm32x_info->option_bytes.user_options;
-
- /* skip over flash bank */
- CMD_ARGC--;
- CMD_ARGV++;
-
- while (CMD_ARGC) {
- if (strcmp("SWWDG", CMD_ARGV[0]) == 0)
- optionbyte |= (1 << 0);
- else if (strcmp("HWWDG", CMD_ARGV[0]) == 0)
- optionbyte &= ~(1 << 0);
- else if (strcmp("NORSTSTOP", CMD_ARGV[0]) == 0)
- optionbyte |= (1 << 1);
- else if (strcmp("RSTSTOP", CMD_ARGV[0]) == 0)
- optionbyte &= ~(1 << 1);
- else if (strcmp("NORSTSTNDBY", CMD_ARGV[0]) == 0)
- optionbyte |= (1 << 2);
- else if (strcmp("RSTSTNDBY", CMD_ARGV[0]) == 0)
- optionbyte &= ~(1 << 2);
- else if (stm32x_info->has_dual_banks) {
- if (strcmp("BOOT0", CMD_ARGV[0]) == 0)
- optionbyte |= (1 << 3);
- else if (strcmp("BOOT1", CMD_ARGV[0]) == 0)
- optionbyte &= ~(1 << 3);
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
- } else
- return ERROR_COMMAND_SYNTAX_ERROR;
- CMD_ARGC--;
- CMD_ARGV++;
- }
-
- if (stm32x_erase_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to erase options");
- return ERROR_OK;
- }
-
- stm32x_info->option_bytes.user_options = optionbyte;
-
- if (stm32x_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "stm32x failed to write options");
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "stm32x write options complete.\n"
- "INFO: a reset or power cycle is required "
- "for the new settings to take effect.");
-
- return ERROR_OK;
-}
-
-static int stm32x_mass_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* unlock option flash registers */
- int retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_KEYR), KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* mass erase flash memory */
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_MER);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
- FLASH_MER | FLASH_STRT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32x_handle_mass_erase_command)
-{
- int i;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = stm32x_mass_erase(bank);
- if (retval == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "stm32x mass erase complete");
- } else
- command_print(CMD_CTX, "stm32x mass erase failed");
-
- return retval;
-}
-
-static const struct command_registration stm32x_exec_command_handlers[] = {
- {
- .name = "lock",
- .handler = stm32x_handle_lock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Lock entire flash device.",
- },
- {
- .name = "unlock",
- .handler = stm32x_handle_unlock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Unlock entire protected flash device.",
- },
- {
- .name = "mass_erase",
- .handler = stm32x_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Erase entire flash device.",
- },
- {
- .name = "options_read",
- .handler = stm32x_handle_options_read_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Read and display device option byte.",
- },
- {
- .name = "options_write",
- .handler = stm32x_handle_options_write_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id ('SWWDG'|'HWWDG') "
- "('RSTSTNDBY'|'NORSTSTNDBY') "
- "('RSTSTOP'|'NORSTSTOP')",
- .help = "Replace bits in device option byte.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration stm32x_command_handlers[] = {
- {
- .name = "stm32f1x",
- .mode = COMMAND_ANY,
- .help = "stm32f1x flash command group",
- .usage = "",
- .chain = stm32x_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver stm32f1x_flash = {
- .name = "stm32f1x",
- .commands = stm32x_command_handlers,
- .flash_bank_command = stm32x_flash_bank_command,
- .erase = stm32x_erase,
- .protect = stm32x_protect,
- .write = stm32x_write,
- .read = default_flash_read,
- .probe = stm32x_probe,
- .auto_probe = stm32x_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = stm32x_protect_check,
- .info = get_stm32x_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32f2x.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32f2x.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32f2x.c
deleted file mode 100755
index c285847..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32f2x.c
+++ /dev/null
@@ -1,1247 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-/* Regarding performance:
- *
- * Short story - it might be best to leave the performance at
- * current levels.
- *
- * You may see a jump in speed if you change to using
- * 32bit words for the block programming.
- *
- * Its a shame you cannot use the double word as its
- * even faster - but you require external VPP for that mode.
- *
- * Having said all that 16bit writes give us the widest vdd
- * operating range, so may be worth adding a note to that effect.
- *
- */
-
-/* Danger!!!! The STM32F1x and STM32F2x series actually have
- * quite different flash controllers.
- *
- * What's more scary is that the names of the registers and their
- * addresses are the same, but the actual bits and what they do are
- * can be very different.
- *
- * To reduce testing complexity and dangers of regressions,
- * a seperate file is used for stm32fx2x.
- *
- * Sector sizes in kiBytes:
- * 1 MiByte part with 4 x 16, 1 x 64, 7 x 128.
- * 2 MiByte part with 4 x 16, 1 x 64, 7 x 128, 4 x 16, 1 x 64, 7 x 128.
- * 1 MiByte STM32F42x/43x part with DB1M Option set:
- * 4 x 16, 1 x 64, 3 x 128, 4 x 16, 1 x 64, 3 x 128.
- *
- * STM32F7
- * 1 MiByte part with 4 x 32, 1 x 128, 3 x 256.
- *
- * Protection size is sector size.
- *
- * Tested with STM3220F-EVAL board.
- *
- * STM32F4xx series for reference.
- *
- * RM0090
- * http://www.st.com/web/en/resource/technical/document/reference_manual/DM00031020.pdf
- *
- * PM0059
- * www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/
- * PROGRAMMING_MANUAL/CD00233952.pdf
- *
- * STM32F7xx series for reference.
- *
- * RM0385
- * http://www.st.com/web/en/resource/technical/document/reference_manual/DM00124865.pdf
- *
- * STM32F1x series - notice that this code was copy, pasted and knocked
- * into a stm32f2x driver, so in case something has been converted or
- * bugs haven't been fixed, here are the original manuals:
- *
- * RM0008 - Reference manual
- *
- * RM0042, the Flash programming manual for low-, medium- high-density and
- * connectivity line STM32F10x devices
- *
- * PM0068, the Flash programming manual for XL-density STM32F10x devices.
- *
- */
-
-/* Erase time can be as high as 1000ms, 10x this and it's toast... */
-#define FLASH_ERASE_TIMEOUT 10000
-#define FLASH_WRITE_TIMEOUT 5
-
-#define STM32_FLASH_BASE 0x40023c00
-#define STM32_FLASH_ACR 0x40023c00
-#define STM32_FLASH_KEYR 0x40023c04
-#define STM32_FLASH_OPTKEYR 0x40023c08
-#define STM32_FLASH_SR 0x40023c0C
-#define STM32_FLASH_CR 0x40023c10
-#define STM32_FLASH_OPTCR 0x40023c14
-#define STM32_FLASH_OPTCR1 0x40023c18
-
-/* FLASH_CR register bits */
-
-#define FLASH_PG (1 << 0)
-#define FLASH_SER (1 << 1)
-#define FLASH_MER (1 << 2)
-#define FLASH_MER1 (1 << 15)
-#define FLASH_STRT (1 << 16)
-#define FLASH_PSIZE_8 (0 << 8)
-#define FLASH_PSIZE_16 (1 << 8)
-#define FLASH_PSIZE_32 (2 << 8)
-#define FLASH_PSIZE_64 (3 << 8)
-/* The sector number encoding is not straight binary for dual bank flash.
- * Warning: evaluates the argument multiple times */
-#define FLASH_SNB(a) ((((a) >= 12) ? 0x10 | ((a) - 12) : (a)) << 3)
-#define FLASH_LOCK (1 << 31)
-
-/* FLASH_SR register bits */
-
-#define FLASH_BSY (1 << 16)
-#define FLASH_PGSERR (1 << 7) /* Programming sequence error */
-#define FLASH_PGPERR (1 << 6) /* Programming parallelism error */
-#define FLASH_PGAERR (1 << 5) /* Programming alignment error */
-#define FLASH_WRPERR (1 << 4) /* Write protection error */
-#define FLASH_OPERR (1 << 1) /* Operation error */
-
-#define FLASH_ERROR (FLASH_PGSERR | FLASH_PGPERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_OPERR)
-
-/* STM32_FLASH_OPTCR register bits */
-
-#define OPT_LOCK (1 << 0)
-#define OPT_START (1 << 1)
-
-/* STM32_FLASH_OBR bit definitions (reading) */
-
-#define OPT_ERROR 0
-#define OPT_READOUT 1
-#define OPT_RDWDGSW 2
-#define OPT_RDRSTSTOP 3
-#define OPT_RDRSTSTDBY 4
-#define OPT_BFB2 5 /* dual flash bank only */
-#define OPT_DB1M 14 /* 1 MiB devices dual flash bank option */
-
-/* register unlock keys */
-
-#define KEY1 0x45670123
-#define KEY2 0xCDEF89AB
-
-/* option register unlock key */
-#define OPTKEY1 0x08192A3B
-#define OPTKEY2 0x4C5D6E7F
-
-struct stm32x_options {
- uint8_t RDP;
- uint8_t user_options;
- uint32_t protection;
-};
-
-struct stm32x_flash_bank {
- struct stm32x_options option_bytes;
- int probed;
- bool has_large_mem; /* stm32f42x/stm32f43x family */
- uint32_t user_bank_size;
-};
-
-/* flash bank stm32x <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(stm32x_flash_bank_command)
-{
- struct stm32x_flash_bank *stm32x_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- stm32x_info = malloc(sizeof(struct stm32x_flash_bank));
- bank->driver_priv = stm32x_info;
-
- stm32x_info->probed = 0;
- stm32x_info->user_bank_size = bank->size;
-
- return ERROR_OK;
-}
-
-static inline int stm32x_get_flash_reg(struct flash_bank *bank, uint32_t reg)
-{
- return reg;
-}
-
-static inline int stm32x_get_flash_status(struct flash_bank *bank, uint32_t *status)
-{
- struct target *target = bank->target;
- return target_read_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR), status);
-}
-
-static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
-{
- struct target *target = bank->target;
- uint32_t status;
- int retval = ERROR_OK;
-
- /* wait for busy to clear */
- for (;;) {
- retval = stm32x_get_flash_status(bank, &status);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
- if ((status & FLASH_BSY) == 0)
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
-
-
- if (status & FLASH_WRPERR) {
- LOG_ERROR("stm32x device protected");
- retval = ERROR_FAIL;
- }
-
- /* Clear but report errors */
- if (status & FLASH_ERROR) {
- /* If this operation fails, we ignore it and report the original
- * retval
- */
- target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_SR),
- status & FLASH_ERROR);
- }
- return retval;
-}
-
-static int stm32x_unlock_reg(struct target *target)
-{
- uint32_t ctrl;
-
- /* first check if not already unlocked
- * otherwise writing on STM32_FLASH_KEYR will fail
- */
- int retval = target_read_u32(target, STM32_FLASH_CR, &ctrl);
- if (retval != ERROR_OK)
- return retval;
-
- if ((ctrl & FLASH_LOCK) == 0)
- return ERROR_OK;
-
- /* unlock flash registers */
- retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, STM32_FLASH_CR, &ctrl);
- if (retval != ERROR_OK)
- return retval;
-
- if (ctrl & FLASH_LOCK) {
- LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
- return ERROR_TARGET_FAILURE;
- }
-
- return ERROR_OK;
-}
-
-static int stm32x_unlock_option_reg(struct target *target)
-{
- uint32_t ctrl;
-
- int retval = target_read_u32(target, STM32_FLASH_OPTCR, &ctrl);
- if (retval != ERROR_OK)
- return retval;
-
- if ((ctrl & OPT_LOCK) == 0)
- return ERROR_OK;
-
- /* unlock option registers */
- retval = target_write_u32(target, STM32_FLASH_OPTKEYR, OPTKEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, STM32_FLASH_OPTKEYR, OPTKEY2);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, STM32_FLASH_OPTCR, &ctrl);
- if (retval != ERROR_OK)
- return retval;
-
- if (ctrl & OPT_LOCK) {
- LOG_ERROR("options not unlocked STM32_FLASH_OPTCR: %" PRIx32, ctrl);
- return ERROR_TARGET_FAILURE;
- }
-
- return ERROR_OK;
-}
-
-static int stm32x_read_options(struct flash_bank *bank)
-{
- uint32_t optiondata;
- struct stm32x_flash_bank *stm32x_info = NULL;
- struct target *target = bank->target;
-
- stm32x_info = bank->driver_priv;
-
- /* read current option bytes */
- int retval = target_read_u32(target, STM32_FLASH_OPTCR, &optiondata);
- if (retval != ERROR_OK)
- return retval;
-
- stm32x_info->option_bytes.user_options = optiondata & 0xec;
- stm32x_info->option_bytes.RDP = (optiondata >> 8) & 0xff;
- stm32x_info->option_bytes.protection = (optiondata >> 16) & 0xfff;
-
- if (stm32x_info->has_large_mem) {
-
- retval = target_read_u32(target, STM32_FLASH_OPTCR1, &optiondata);
- if (retval != ERROR_OK)
- return retval;
-
- /* append protection bits */
- stm32x_info->option_bytes.protection |= (optiondata >> 4) & 0x00fff000;
- }
-
- if (stm32x_info->option_bytes.RDP != 0xAA)
- LOG_INFO("Device Security Bit Set");
-
- return ERROR_OK;
-}
-
-static int stm32x_write_options(struct flash_bank *bank)
-{
- struct stm32x_flash_bank *stm32x_info = NULL;
- struct target *target = bank->target;
- uint32_t optiondata;
-
- stm32x_info = bank->driver_priv;
-
- int retval = stm32x_unlock_option_reg(target);
- if (retval != ERROR_OK)
- return retval;
-
- /* rebuild option data */
- optiondata = stm32x_info->option_bytes.user_options;
- optiondata |= stm32x_info->option_bytes.RDP << 8;
- optiondata |= (stm32x_info->option_bytes.protection & 0x0fff) << 16;
-
- /* program options */
- retval = target_write_u32(target, STM32_FLASH_OPTCR, optiondata);
- if (retval != ERROR_OK)
- return retval;
-
- if (stm32x_info->has_large_mem) {
-
- uint32_t optiondata2 = 0;
- optiondata2 |= (stm32x_info->option_bytes.protection & 0x00fff000) << 4;
- retval = target_write_u32(target, STM32_FLASH_OPTCR1, optiondata2);
- if (retval != ERROR_OK)
- return retval;
- }
-
- /* start programming cycle */
- retval = target_write_u32(target, STM32_FLASH_OPTCR, optiondata | OPT_START);
- if (retval != ERROR_OK)
- return retval;
-
- /* wait for completion */
- retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- /* relock registers */
- retval = target_write_u32(target, STM32_FLASH_OPTCR, optiondata | OPT_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32x_protect_check(struct flash_bank *bank)
-{
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
-
- /* read write protection settings */
- int retval = stm32x_read_options(bank);
- if (retval != ERROR_OK) {
- LOG_DEBUG("unable to read option bytes");
- return retval;
- }
-
- for (int i = 0; i < bank->num_sectors; i++) {
- if (stm32x_info->option_bytes.protection & (1 << i))
- bank->sectors[i].is_protected = 0;
- else
- bank->sectors[i].is_protected = 1;
- }
-
- return ERROR_OK;
-}
-
-static int stm32x_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- int i;
-
- assert(first < bank->num_sectors);
- assert(last < bank->num_sectors);
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int retval;
- retval = stm32x_unlock_reg(target);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- Sector Erase
- To erase a sector, follow the procedure below:
- 1. Check that no Flash memory operation is ongoing by checking the BSY bit in the
- FLASH_SR register
- 2. Set the SER bit and select the sector
- you wish to erase (SNB) in the FLASH_CR register
- 3. Set the STRT bit in the FLASH_CR register
- 4. Wait for the BSY bit to be cleared
- */
-
- for (i = first; i <= last; i++) {
- retval = target_write_u32(target,
- stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_SER | FLASH_SNB(i) | FLASH_STRT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- bank->sectors[i].is_erased = 1;
- }
-
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32x_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct target *target = bank->target;
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* read protection settings */
- int retval = stm32x_read_options(bank);
- if (retval != ERROR_OK) {
- LOG_DEBUG("unable to read option bytes");
- return retval;
- }
-
- for (int i = first; i <= last; i++) {
-
- if (set)
- stm32x_info->option_bytes.protection &= ~(1 << i);
- else
- stm32x_info->option_bytes.protection |= (1 << i);
- }
-
- retval = stm32x_write_options(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[5];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* see contrib/loaders/flash/stm32f2x.S for src */
-
- static const uint8_t stm32x_flash_write_code[] = {
- /* wait_fifo: */
- 0xD0, 0xF8, 0x00, 0x80, /* ldr r8, [r0, #0] */
- 0xB8, 0xF1, 0x00, 0x0F, /* cmp r8, #0 */
- 0x1A, 0xD0, /* beq exit */
- 0x47, 0x68, /* ldr r7, [r0, #4] */
- 0x47, 0x45, /* cmp r7, r8 */
- 0xF7, 0xD0, /* beq wait_fifo */
-
- 0xDF, 0xF8, 0x34, 0x60, /* ldr r6, STM32_PROG16 */
- 0x26, 0x61, /* str r6, [r4, #STM32_FLASH_CR_OFFSET] */
- 0x37, 0xF8, 0x02, 0x6B, /* ldrh r6, [r7], #0x02 */
- 0x22, 0xF8, 0x02, 0x6B, /* strh r6, [r2], #0x02 */
- 0xBF, 0xF3, 0x4F, 0x8F, /* dsb sy */
- /* busy: */
- 0xE6, 0x68, /* ldr r6, [r4, #STM32_FLASH_SR_OFFSET] */
- 0x16, 0xF4, 0x80, 0x3F, /* tst r6, #0x10000 */
- 0xFB, 0xD1, /* bne busy */
- 0x16, 0xF0, 0xF0, 0x0F, /* tst r6, #0xf0 */
- 0x07, 0xD1, /* bne error */
-
- 0x8F, 0x42, /* cmp r7, r1 */
- 0x28, 0xBF, /* it cs */
- 0x00, 0xF1, 0x08, 0x07, /* addcs r7, r0, #8 */
- 0x47, 0x60, /* str r7, [r0, #4] */
- 0x01, 0x3B, /* subs r3, r3, #1 */
- 0x13, 0xB1, /* cbz r3, exit */
- 0xDF, 0xE7, /* b wait_fifo */
- /* error: */
- 0x00, 0x21, /* movs r1, #0 */
- 0x41, 0x60, /* str r1, [r0, #4] */
- /* exit: */
- 0x30, 0x46, /* mov r0, r6 */
- 0x00, 0xBE, /* bkpt #0x00 */
-
- /* <STM32_PROG16>: */
- 0x01, 0x01, 0x00, 0x00, /* .word 0x00000101 */
- };
-
- if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(stm32x_flash_write_code),
- stm32x_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* target address */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* count (halfword-16bit) */
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* flash base */
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[2].value, 0, 32, address);
- buf_set_u32(reg_params[3].value, 0, 32, count);
- buf_set_u32(reg_params[4].value, 0, 32, STM32_FLASH_BASE);
-
- retval = target_run_flash_async_algorithm(target, buffer, count, 2,
- 0, NULL,
- 5, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- if (retval == ERROR_FLASH_OPERATION_FAILED) {
- LOG_ERROR("error executing stm32x flash write algorithm");
-
- uint32_t error = buf_get_u32(reg_params[0].value, 0, 32) & FLASH_ERROR;
-
- if (error & FLASH_WRPERR)
- LOG_ERROR("flash memory write protected");
-
- if (error != 0) {
- LOG_ERROR("flash write failed = %08" PRIx32, error);
- /* Clear but report errors */
- target_write_u32(target, STM32_FLASH_SR, error);
- retval = ERROR_FAIL;
- }
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return retval;
-}
-
-static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t words_remaining = (count / 2);
- uint32_t bytes_remaining = (count & 0x00000001);
- uint32_t address = bank->base + offset;
- uint32_t bytes_written = 0;
- int retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x1) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- retval = stm32x_unlock_reg(target);
- if (retval != ERROR_OK)
- return retval;
-
- /* multiple half words (2-byte) to be programmed? */
- if (words_remaining > 0) {
- /* try using a block write */
- retval = stm32x_write_block(bank, buffer, offset, words_remaining);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single dword accesses */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
- }
- } else {
- buffer += words_remaining * 2;
- address += words_remaining * 2;
- words_remaining = 0;
- }
- }
-
- if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
- return retval;
-
- /*
- Standard programming
- The Flash memory programming sequence is as follows:
- 1. Check that no main Flash memory operation is ongoing by checking the BSY bit in the
- FLASH_SR register.
- 2. Set the PG bit in the FLASH_CR register
- 3. Perform the data write operation(s) to the desired memory address (inside main
- memory block or OTP area):
- \u2013 \u2013 Half-word access in case of x16 parallelism
- \u2013 Word access in case of x32 parallelism
- \u2013
- 4.
- Byte access in case of x8 parallelism
- Double word access in case of x64 parallelism
- Wait for the BSY bit to be cleared
- */
- while (words_remaining > 0) {
- uint16_t value;
- memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
-
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
- FLASH_PG | FLASH_PSIZE_16);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u16(target, address, value);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, FLASH_WRITE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- bytes_written += 2;
- words_remaining--;
- address += 2;
- }
-
- if (bytes_remaining) {
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
- FLASH_PG | FLASH_PSIZE_8);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u8(target, address, buffer[bytes_written]);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, FLASH_WRITE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
-}
-
-static void setup_sector(struct flash_bank *bank, int start, int num, int size)
-{
- for (int i = start; i < (start + num) ; i++) {
- assert(i < bank->num_sectors);
- bank->sectors[i].offset = bank->size;
- bank->sectors[i].size = size;
- bank->size += bank->sectors[i].size;
- }
-}
-
-static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id)
-{
- /* this checks for a stm32f4x errata issue where a
- * stm32f2x DBGMCU_IDCODE is incorrectly returned.
- * If the issue is detected target is forced to stm32f4x Rev A.
- * Only effects Rev A silicon */
-
- struct target *target = bank->target;
- uint32_t cpuid;
-
- /* read stm32 device id register */
- int retval = target_read_u32(target, 0xE0042000, device_id);
- if (retval != ERROR_OK)
- return retval;
-
- if ((*device_id & 0xfff) == 0x411) {
- /* read CPUID reg to check core type */
- retval = target_read_u32(target, 0xE000ED00, &cpuid);
- if (retval != ERROR_OK)
- return retval;
-
- /* check for cortex_m4 */
- if (((cpuid >> 4) & 0xFFF) == 0xC24) {
- *device_id &= ~((0xFFFF << 16) | 0xfff);
- *device_id |= (0x1000 << 16) | 0x413;
- LOG_INFO("stm32f4x errata detected - fixing incorrect MCU_IDCODE");
- }
- }
- return retval;
-}
-
-static int stm32x_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
- int i;
- uint16_t flash_size_in_kb;
- uint32_t flash_size_reg = 0x1FFF7A22;
- uint16_t max_sector_size_in_kb = 128;
- uint16_t max_flash_size_in_kb;
- uint32_t device_id;
- uint32_t base_address = 0x08000000;
-
- stm32x_info->probed = 0;
- stm32x_info->has_large_mem = false;
-
- /* read stm32 device id register */
- int retval = stm32x_get_device_id(bank, &device_id);
- if (retval != ERROR_OK)
- return retval;
- LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
-
- /* set max flash size depending on family */
- switch (device_id & 0xfff) {
- case 0x411:
- case 0x413:
- case 0x441:
- max_flash_size_in_kb = 1024;
- break;
- case 0x419:
- case 0x434:
- max_flash_size_in_kb = 2048;
- break;
- case 0x423:
- max_flash_size_in_kb = 256;
- break;
- case 0x431:
- case 0x433:
- case 0x421:
- max_flash_size_in_kb = 512;
- break;
- case 0x458:
- max_flash_size_in_kb = 128;
- break;
- case 0x449:
- max_flash_size_in_kb = 1024;
- max_sector_size_in_kb = 256;
- flash_size_reg = 0x1FF0F442;
- break;
- default:
- LOG_WARNING("Cannot identify target as a STM32 family.");
- return ERROR_FAIL;
- }
-
- /* get flash size from target. */
- retval = target_read_u16(target, flash_size_reg, &flash_size_in_kb);
-
- /* failed reading flash size or flash size invalid (early silicon),
- * default to max target family */
- if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
- LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming %dk flash",
- max_flash_size_in_kb);
- flash_size_in_kb = max_flash_size_in_kb;
- }
-
- /* if the user sets the size manually then ignore the probed value
- * this allows us to work around devices that have a invalid flash size register value */
- if (stm32x_info->user_bank_size) {
- LOG_INFO("ignoring flash probed value, using configured bank size");
- flash_size_in_kb = stm32x_info->user_bank_size / 1024;
- }
-
- LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
-
- /* did we assign flash size? */
- assert(flash_size_in_kb != 0xffff);
-
- /* calculate numbers of pages */
- int num_pages = (flash_size_in_kb / max_sector_size_in_kb) + 4;
-
- /* Devices with > 1024 kiByte always are dual-banked */
- if (flash_size_in_kb > 1024)
- stm32x_info->has_large_mem = true;
-
- /* F42x/43x 1024 kiByte devices have a dual bank option */
- if ((device_id & 0xfff) == 0x419 && (flash_size_in_kb == 1024)) {
- uint32_t optiondata;
- retval = target_read_u32(target, STM32_FLASH_OPTCR, &optiondata);
- if (retval != ERROR_OK) {
- LOG_DEBUG("unable to read option bytes");
- return retval;
- }
- if (optiondata & (1 << OPT_DB1M)) {
- stm32x_info->has_large_mem = true;
- LOG_INFO("Dual Bank 1024 kiB STM32F42x/43x found");
- }
- }
-
- /* check for dual-banked devices */
- if (stm32x_info->has_large_mem)
- num_pages += 4;
-
- /* check that calculation result makes sense */
- assert(num_pages > 0);
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->base = base_address;
- bank->num_sectors = num_pages;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
- bank->size = 0;
-
- /* fixed memory */
- setup_sector(bank, 0, 4, (max_sector_size_in_kb / 8) * 1024);
- setup_sector(bank, 4, 1, (max_sector_size_in_kb / 2) * 1024);
-
- if (stm32x_info->has_large_mem) {
- if (flash_size_in_kb == 1024) {
- setup_sector(bank, 5, 3, 128 * 1024);
- setup_sector(bank, 12, 4, 16 * 1024);
- setup_sector(bank, 16, 1, 64 * 1024);
- setup_sector(bank, 17, 3, 128 * 1024);
- } else {
- setup_sector(bank, 5, 7, 128 * 1024);
- setup_sector(bank, 12, 4, 16 * 1024);
- setup_sector(bank, 16, 1, 64 * 1024);
- setup_sector(bank, 17, 7, 128 * 1024);
- }
- } else {
- setup_sector(bank, 4 + 1, MIN(12, num_pages) - 5,
- max_sector_size_in_kb * 1024);
- }
- for (i = 0; i < num_pages; i++) {
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 0;
- }
-
- stm32x_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int stm32x_auto_probe(struct flash_bank *bank)
-{
- struct stm32x_flash_bank *stm32x_info = bank->driver_priv;
- if (stm32x_info->probed)
- return ERROR_OK;
- return stm32x_probe(bank);
-}
-
-static int get_stm32x_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- uint32_t dbgmcu_idcode;
-
- /* read stm32 device id register */
- int retval = stm32x_get_device_id(bank, &dbgmcu_idcode);
- if (retval != ERROR_OK)
- return retval;
-
- uint16_t device_id = dbgmcu_idcode & 0xfff;
- uint16_t rev_id = dbgmcu_idcode >> 16;
- const char *device_str;
- const char *rev_str = NULL;
-
- switch (device_id) {
- case 0x411:
- device_str = "STM32F2xx";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x2000:
- rev_str = "B";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
-
- case 0x2001:
- rev_str = "Y";
- break;
-
- case 0x2003:
- rev_str = "X";
- break;
- }
- break;
-
- case 0x413:
- case 0x419:
- device_str = "STM32F4xx";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
-
- case 0x1003:
- rev_str = "Y";
- break;
-
- case 0x1007:
- rev_str = "1";
- break;
-
- case 0x2001:
- rev_str = "3";
- break;
- }
- break;
- case 0x421:
- device_str = "STM32F446";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
- }
- break;
- case 0x423:
- case 0x431:
- case 0x433:
- case 0x458:
- case 0x441:
- device_str = "STM32F4xx (Low Power)";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
- }
- break;
-
- case 0x449:
- device_str = "STM32F7[4|5]x";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
-
- case 0x1001:
- rev_str = "Z";
- break;
- }
- break;
- case 0x434:
- device_str = "STM32F46x/F47x";
-
- switch (rev_id) {
- case 0x1000:
- rev_str = "A";
- break;
- }
- break;
-
- default:
- snprintf(buf, buf_size, "Cannot identify target as a STM32F2/4/7\n");
- return ERROR_FAIL;
- }
-
- if (rev_str != NULL)
- snprintf(buf, buf_size, "%s - Rev: %s", device_str, rev_str);
- else
- snprintf(buf, buf_size, "%s - Rev: unknown (0x%04x)", device_str, rev_id);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32x_handle_lock_command)
-{
- struct target *target = NULL;
- struct stm32x_flash_bank *stm32x_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- stm32x_info = bank->driver_priv;
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (stm32x_read_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
- return ERROR_OK;
- }
-
- /* set readout protection */
- stm32x_info->option_bytes.RDP = 0;
-
- if (stm32x_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "%s failed to lock device", bank->driver->name);
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "%s locked", bank->driver->name);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32x_handle_unlock_command)
-{
- struct target *target = NULL;
- struct stm32x_flash_bank *stm32x_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- stm32x_info = bank->driver_priv;
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (stm32x_read_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
- return ERROR_OK;
- }
-
- /* clear readout protection and complementary option bytes
- * this will also force a device unlock if set */
- stm32x_info->option_bytes.RDP = 0xAA;
-
- if (stm32x_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "%s failed to unlock device", bank->driver->name);
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "%s unlocked.\n"
- "INFO: a reset or power cycle is required "
- "for the new settings to take effect.", bank->driver->name);
-
- return ERROR_OK;
-}
-
-static int stm32x_mass_erase(struct flash_bank *bank)
-{
- int retval;
- uint32_t flash_mer;
- struct target *target = bank->target;
- struct stm32x_flash_bank *stm32x_info = NULL;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- stm32x_info = bank->driver_priv;
-
- retval = stm32x_unlock_reg(target);
- if (retval != ERROR_OK)
- return retval;
-
- /* mass erase flash memory */
- if (stm32x_info->has_large_mem)
- flash_mer = FLASH_MER | FLASH_MER1;
- else
- flash_mer = FLASH_MER;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), flash_mer);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR),
- flash_mer | FLASH_STRT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32x_wait_status_busy(bank, 30000);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, stm32x_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32x_handle_mass_erase_command)
-{
- int i;
-
- if (CMD_ARGC < 1) {
- command_print(CMD_CTX, "stm32x mass_erase <bank>");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = stm32x_mass_erase(bank);
- if (retval == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "stm32x mass erase complete");
- } else {
- command_print(CMD_CTX, "stm32x mass erase failed");
- }
-
- return retval;
-}
-
-static const struct command_registration stm32x_exec_command_handlers[] = {
- {
- .name = "lock",
- .handler = stm32x_handle_lock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Lock entire flash device.",
- },
- {
- .name = "unlock",
- .handler = stm32x_handle_unlock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Unlock entire protected flash device.",
- },
- {
- .name = "mass_erase",
- .handler = stm32x_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Erase entire flash device.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration stm32x_command_handlers[] = {
- {
- .name = "stm32f2x",
- .mode = COMMAND_ANY,
- .help = "stm32f2x flash command group",
- .usage = "",
- .chain = stm32x_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver stm32f2x_flash = {
- .name = "stm32f2x",
- .commands = stm32x_command_handlers,
- .flash_bank_command = stm32x_flash_bank_command,
- .erase = stm32x_erase,
- .protect = stm32x_protect,
- .write = stm32x_write,
- .read = default_flash_read,
- .probe = stm32x_probe,
- .auto_probe = stm32x_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = stm32x_protect_check,
- .info = get_stm32x_info,
-};
[43/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/style.txt
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/style.txt b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/style.txt
deleted file mode 100755
index 54c1342..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/style.txt
+++ /dev/null
@@ -1,403 +0,0 @@
-/** @page styleguide Style Guides
-
-The goals for each of these guides are:
-- to produce correct code that appears clean, consistent, and readable,
-- to allow developers to create patches that conform to a standard, and
-- to eliminate these issues as points of future contention.
-
-Some of these rules may be ignored in the spirit of these stated goals;
-however, such exceptions should be fairly rare.
-
-The following style guides describe a formatting, naming, and other
-conventions that should be followed when writing or changing the OpenOCD
-code:
-
-- @subpage styletcl
-- @subpage stylec
-- @subpage styleperl
-- @subpage styleautotools
-
-In addition, the following style guides provide information for
-providing documentation, either as part of the C code or stand-alone.
-
-- @subpage styledoxygen
-- @subpage styletexinfo
-- @subpage stylelatex
-
-Feedback would be welcome to improve the OpenOCD guidelines.
-
- */
-/** @page styletcl TCL Style Guide
-
-OpenOCD needs to expand its Jim/TCL Style Guide.
-
-Many of the guidelines listed on the @ref stylec page should apply to
-OpenOCD's Jim/TCL code as well.
-
- */
-/** @page stylec C Style Guide
-
-This page contains guidelines for writing new C source code for the
-OpenOCD project.
-
-@section styleformat Formatting Guide
-
-- remove any trailing white space at the end of lines.
-- use TAB characters for indentation; do NOT use spaces.
-- displayed TAB width is 4 characters.
-- use Unix line endings ('\\n'); do NOT use DOS endings ('\\r\\n')
-- limit adjacent empty lines to at most two (2).
-- remove any trailing empty lines at the end of source files
-- do not "comment out" code from the tree; instead, one should either:
- -# remove it entirely (git can retrieve the old version), or
- -# use an @c \#if/\#endif block.
-
-Finally, try to avoid lines of code that are longer than than 72-80 columns:
-
-- long lines frequently indicate other style problems:
- - insufficient use of static functions, macros, or temporary variables
- - poor flow-control structure; "inverted" logical tests
-- a few lines may be wider than this limit (typically format strings), but:
- - all C compilers will concatenate series of string constants.
- - all long string constants should be split across multiple lines.
-
-@section stylenames Naming Rules
-
-- most identifiers must use lower-case letters (and digits) only.
- - macros must use upper-case letters (and digits) only.
- - OpenOCD identifiers should NEVER use @c MixedCaps.
-- @c typedef names must end with the '_t' suffix.
- - This should be reserved for types that should be passed by value.
- - Do @b not mix the typedef keyword with @c struct.
-- use underline characters between consecutive words in identifiers
- (e.g. @c more_than_one_word).
-
-@section stylec99 C99 Rules
-
-- inline functions
-- @c // comments -- in new code, prefer these for single-line comments
-- trailing comma allowed in enum declarations
-- designated initializers ( .field = value )
-- variables declarations should occur at the point of first use
-- new block scopes for selection and iteration statements
-- use malloc() to create dynamic arrays. Do @b not use @c alloca
-or variable length arrays on the stack. non-MMU hosts(uClinux) and
-pthreads require modest and predictable stack usage.
-
-@section styletypes Type Guidelines
-- use native types (@c int or @c unsigned) if the type is not important
- - if size matters, use the types from \<stdint.h\> or \<inttypes.h\>:
- - @c int8_t, @c int16_t, @c int32_t, or @c int64_t: signed types of specified size
- - @c uint8_t, @c uint16_t, @c uint32_t, or @c uint64_t: unsigned types of specified size
- - do @b NOT redefine @c uN types from "types.h"
-
-@section stylefunc Functions
-
-- static inline functions should be prefered over macros:
-@code
-/** do NOT define macro-like functions like this... */
-#define CUBE(x) ((x) * (x) * (x))
-/** instead, define the same expression using a C99 inline function */
-static inline int cube(int x) { return x * x * x; }
-@endcode
-- Functions should be declared static unless required by other modules
- - define static functions before first usage to avoid forward declarations.
-- Functions should have no space between its name and its parameter list:
-@code
-int f(int x1, int x2)
-{
- ...
- int y = f(x1, x2 - x1);
- ...
-}
-@endcode
-- Separate assignment and logical test statements. In other words, you
-should write statements like the following:
-@code
-// separate statements should be preferred
-result = foo();
-if (ERROR_OK != result)
- ...
-@endcode
-More directly, do @b not combine these kinds of statements:
-@code
-// Combined statements should be avoided
-if (ERROR_OK != (result = foo()))
- return result;
-@endcode
-
- */
-/** @page styledoxygen Doxygen Style Guide
-
-The following sections provide guidelines for OpenOCD developers
-who wish to write Doxygen comments in the code or this manual.
-For an introduction to Doxygen documentation,
-see the @ref primerdoxygen.
-
-@section styledoxyblocks Doxygen Block Selection
-
-Several different types of Doxygen comments can be used; often,
-one style will be the most appropriate for a specific context.
-The following guidelines provide developers with heuristics for
-selecting an appropriate form and writing consistent documentation
-comments.
-
--# use @c /// to for one-line documentation of instances.
--# for documentation requiring multiple lines, use a "block" style:
-@verbatim
-/**
- * @brief First sentence is short description. Remaining text becomes
- * the full description block, where "empty" lines start new paragraphs.
- *
- * One can make text appear in @a italics, @b bold, @c monospace, or
- * in blocks such as the one in which this example appears in the Style
- * Guide. See the Doxygen Manual for the full list of commands.
- *
- * @param foo For a function, describe the parameters (e.g. @a foo).
- * @returns The value(s) returned, or possible error conditions.
- */
-@endverbatim
- -# The block should start on the line following the opening @c /**.
- -# The end of the block, \f$*/\f$, should also be on its own line.
- -# Every line in the block should have a @c '*' in-line with its start:
- - A leading space is required to align the @c '*' with the @c /** line.
- - A single "empty" line should separate the function documentation
- from the block of parameter and return value descriptions.
- - Except to separate paragraphs of documentation, other extra
- "empty" lines should be removed from the block.
- -# Only single spaces should be used; do @b not add mid-line indentation.
--# If the total line length will be less than 72-80 columns, then
- - The @c /**< form can be used on the same line.
- - This style should be used sparingly; the best use is for fields:
- @code int field; /**< field description */ @endcode
-
-@section styledoxyall Doxygen Style Guide
-
-The following guidelines apply to all Doxygen comment blocks:
-
--# Use the @c '\@cmd' form for all doxygen commands (do @b not use @c '\\cmd').
--# Use symbol names such that Doxygen automatically creates links:
- -# @c function_name() can be used to reference functions
- (e.g. flash_set_dirty()).
- -# @c struct_name::member_name should be used to reference structure
- fields in the documentation (e.g. @c flash_driver::name).
- -# URLS get converted to markup automatically, without any extra effort.
- -# new pages can be linked into the heirarchy by using the @c \@subpage
- command somewhere the page(s) under which they should be linked:
- -# use @c \@ref in other contexts to create links to pages and sections.
--# Use good Doxygen mark-up:
- -# '\@a' (italics) should be used to reference parameters (e.g. <i>foo</i>).
- -# '\@b' (bold) should be used to emphasizing <b>single</b> words.
- -# '\@c' (monospace) should be used with <code>file names</code> and
- <code>code symbols</code>, so they appear visually distinct from
- surrounding text.
- -# To mark-up multiple words, the HTML alternatives must be used.
--# Two spaces should be used when nesting lists; do @b not use '\\t' in lists.
--# Code examples provided in documentation must conform to the Style Guide.
-
-@section styledoxytext Doxygen Text Inputs
-
-In addition to the guidelines in the preceding sections, the following
-additional style guidelines should be considered when writing
-documentation as part of standalone text files:
-
--# Text files must contain Doxygen at least one comment block:
- -# Documentation should begin in the first column (except for nested lists).
- -# Do NOT use the @c '*' convention that must be used in the source code.
--# Each file should contain at least one @c \@page block.
- -# Each new page should be listed as a \@subpage in the \@page block
- of the page that should serve as its parent.
- -# Large pages should be structure in parts using meaningful \@section
- and \@subsection commands.
--# Include a @c \@file block at the end of each Doxygen @c .txt file to
- document its contents:
- - Doxygen creates such pages for files automatically, but no content
- will appear on them for those that only contain manual pages.
- - The \@file block should provide useful meta-documentation to assist
- techincal writers; typically, a list of the pages that it contains.
- - For example, the @ref styleguide exists in @c doc/manual/style.txt,
- which contains a reference back to itself.
--# The \@file and \@page commands should begin on the same line as
- the start of the Doxygen comment:
-@verbatim
-/** @page pagename Page Title
-
-Documentation for the page.
-
- */
-/** @file
-
-This file contains the @ref pagename page.
-
- */
-@endverbatim
-
-For an example, the Doxygen source for this Style Guide can be found in
-@c doc/manual/style.txt, alongside other parts of The Manual.
-
- */
-/** @page styletexinfo Texinfo Style Guide
-
-The User's Guide is there to provide two basic kinds of information. It
-is a guide for how and why to use each feature or mechanism of OpenOCD.
-It is also the reference manual for all commands and options involved
-in using them, including interface, flash, target, and other drivers.
-At this time, it is the only user-targetted documentation; everything
-else is addressing OpenOCD developers.
-
-There are two key audiences for the User's Guide, both developer based.
-The primary audience is developers using OpenOCD as a tool in their
-work, or who may be starting to use it that way. A secondary audience
-includes developers who are supporting those users by packaging or
-customizing it for their hardware, installing it as part of some software
-distribution, or by evolving OpenOCD itself. There is some crossover
-between those audiences. We encourage contributions from users as the
-fundamental way to evolve and improve OpenOCD. In particular, creating
-a board or target specific configuration file is something that many
-users will end up doing at some point, and we like to see such files
-become part of the mainline release.
-
-General documentation rules to remember include:
-
-- Be concise and clear. It's work to remove those extra words and
- sentences, but such "noise" doesn't help readers.
-- Make it easy to skim and browse. "Tell what you're going to say,
- then say it". Help readers decide whether to dig in now, or
- leave it for later.
-- Make sure the chapters flow well. Presentations should not jump
- around, and should move easily from overview down to details.
-- Avoid using the passive voice.
-- Address the reader to clarify roles ("your config file", "the board you
- are debugging", etc.); "the user" (etc) is artificial.
-- Use good English grammar and spelling. Remember also that English
- will not be the first language for many readers. Avoid complex or
- idiomatic usage that could create needless barriers.
-- Use examples to highlight fundamental ideas and common idioms.
-- Don't overuse list constructs. This is not a slide presentation;
- prefer paragraphs.
-
-When presenting features and mechanisms of OpenOCD:
-
-- Explain key concepts before presenting commands using them.
-- Tie examples to common developer tasks.
-- When giving instructions, you can \@enumerate each step both
- to clearly delineate the steps, and to highlight that this is
- not explanatory text.
-- When you provide "how to use it" advice or tutorials, keep it
- in separate sections from the reference material.
-- Good indexing is something of a black art. Use \@cindex for important
- concepts, but don't overuse it. In particular, rely on the \@deffn
- indexing, and use \@cindex primarily with significant blocks of text
- such as \@subsection. The \@dfn of a key term may merit indexing.
-- Use \@xref (and \@anchor) with care. Hardcopy versions, from the PDF,
- must make sense without clickable links (which don't work all that well
- with Texinfo in any case). If you find you're using many links,
- read that as a symptom that the presentation may be disjointed and
- confusing.
-- Avoid font tricks like \@b, but use \@option, \@file, \@dfn, \@emph
- and related mechanisms where appropriate.
-
-For technical reference material:
-
-- It's OK to start sections with explanations and end them with
- detailed lists of the relevant commands.
-- Use the \@deffn style declarations to define all commands and drivers.
- These will automatically appear in the relevant index, and those
- declarations help promote consistent presentation and style.
- - It's a "Command" if it can be used interactively.
- - Else it's a "Config Command" if it must be used before the
- configuration stage completes.
- - For a "Driver", list its name.
- - Use EBNF style regular expressions to define parameters:
- brackets around zero-or-one choices, parentheses around
- exactly-one choices.
- - Use \@option, \@file, \@var and other mechanisms where appropriate.
- - Say what output it displays, and what value it returns to callers.
- - Explain clearly what the command does. Sometimes you will find
- that it can't be explained clearly. That usually means the command
- is poorly designed; replace it with something better, if you can.
- - Be complete: document all commands, except as part of a strategy
- to phase something in or out.
- - Be correct: review the documentation against the code, and
- vice versa.
-- Alphabetize the \@defn declarations for all commands in each
- section.
-- Keep the per-command documentation focussed on exactly what that
- command does, not motivation, advice, suggestions, or big examples.
- When commands deserve such expanded text, it belongs elsewhere.
- Solutions might be using a \@section explaining a cluster of related
- commands, or acting as a mini-tutorial.
-- Details for any given driver should be grouped together.
-
-The User's Guide is the first place most users will start reading,
-after they begin using OpenOCD. Make that investment of their time
-be as productive as possible. Needing to look at OpenOCD source code,
-to figure out how to use it is a bad sign, though it's OK to need to
-look at the User's guide to figure out what a config script is doing.
-
- */
-/** @page stylelatex LaTeX Style Guide
-
-This page needs to provide style guidelines for using LaTeX, the
-typesetting language used by The References for OpenOCD Hardware.
-Likewise, the @ref primerlatex for using this guide needs to be completed.
-
- */
-/** @page styleperl Perl Style Guide
-
-This page provides some style guidelines for using Perl, a scripting
-language used by several small tools in the tree:
-
--# Ensure all Perl scripts use the proper suffix (@c .pl for scripts, and
- @c .pm for modules)
--# Pass files as script parameters or piped as input:
- - Do NOT code paths to files in the tree, as this breaks out-of-tree builds.
- - If you must, then you must also use an automake rule to create the script.
--# use @c '#!/usr/bin/perl' as the first line of Perl scripts.
--# always <code>use strict</code> and <code>use warnings</code>
--# invoke scripts indirectly in Makefiles or other scripts:
-@code
-perl script.pl
-@endcode
-
-Maintainers must also be sure to follow additional guidelines:
--# Ensure that Perl scripts are committed as executables:
- Use "<code>chmod +x script.pl</code>"
- @a before using "<code>git add script.pl</code>"
-
- */
-/** @page styleautotools Autotools Style Guide
-
-This page contains style guidelines for the OpenOCD autotools scripts.
-
-The following guidelines apply to the @c configure.ac file:
-- Better guidelines need to be developed, but until then...
-- Use good judgement.
-
-The following guidelines apply to @c Makefile.am files:
--# When assigning variables with long lists of items:
- -# Separate the values on each line to make the files "patch friendly":
-@code
-VAR = \
- value1 \
- value2 \
- ...
- value9 \
- value10
-@endcode
- */
-/** @file
-
-This file contains the @ref styleguide pages. The @ref styleguide pages
-include the following Style Guides for their respective code and
-documentation languages:
-
-- @ref styletcl
-- @ref stylec
-- @ref styledoxygen
-- @ref styletexinfo
-- @ref stylelatex
-- @ref styleperl
-- @ref styleautotools
-
- */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target.txt
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target.txt b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target.txt
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-/** @page targetdocs OpenOCD Target APIs
-
-OpenOCD provides its Target APIs to allow developers to provide trace and
-debugging support for specific device targets. These primarily consist of
-ARM cores, but other types have been supported. New targets should be
-developed by following or using these APIs.
-
-The Target Support module contains APIs that cover several functional areas:
-
- - @subpage targetarm
- - @subpage targetnotarm
- - @subpage targetmips
- - @subpage targetregister
- - @subpage targetimage
- - @subpage targettrace
-
-This section needs to be expanded.
-
-*/
-
-/** @page targetarm OpenOCD ARM Targets
-
-This section needs to describe OpenOCD's ARM target support.
-
- */
-
-/** @page targetregister OpenOCD Target Register API
-
-This section needs to describe OpenOCD's Target Register API, as
-provided by 'src/target/register.h'.
-
- */
-
-/** @page targetimage OpenOCD Target Image API
-
-This section needs to describe OpenOCD's Target Image API, as provided
-by 'src/target/image.h'.
-
- */
-
-/** @page targettrace OpenOCD Target Trace API
-
-This section needs to describe OpenOCD's Target Trace API, as provided
-by 'src/target/trace.h'.
-
- */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target/mips.txt
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target/mips.txt b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target/mips.txt
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-/** @page targetmips OpenOCD MIPS Targets
-
-@section ejatgmem EJTAG Memory Addresses
-
-An optional uncached and unmapped debug segment dseg (EJTAG area) appears in the address range
-0xFFFF FFFF FF20 0000 to 0xFFFF FFFF FF3F FFFF. The dseg segment thereby appears in the kseg part of the
-compatibility segment, and access to kseg is possible with the dseg segment.
-
-The dseg segment is subdivided into dmseg (EJTAG memory) segment and the drseg (EJTAG registers) segment. The
-dmseg segment is used when the probe services the memory segment. The drseg segment is used when the
-memory-mapped debug registers are accessed. Table 5-2 shows the subdivision and attributes for the segments.
-
-dseg is divided in :
-
- - dmseg (0xFFFF FFFF FF20 0000 to 0xFFFF FFFF FF2F FFFF)
- - drseg (0xFFFF FFFF FF30 0000 to 0xFFFF FFFF FF3F FFFF)
-
-Because the dseg segment is serviced exclusively by the EJTAG features, there
-are no physical address per se. Instead the lower 21 bits of the virtual address select
-the appropriate reference in either EJTAG memory or registers. References are not mapped through the
-TLB, nor do the accesses appear on the external system memory interface.
-
-Both of this memory segments are Uncached.
-
-On debug exception (break) CPU jumps to the beginning of dmseg. This some kind of memory shared
-between CPU and EJTAG dongle.
-
-There CPU stops (correct terminology is : stalls, because it stops it's pipeline), and is waiting for some action of dongle.
-
-If the dongle gives it instruction, CPU executes it, augments it's PC to 0xFFFF FFFF FF20 0001 - but it again points to dmseg area,
-so it stops waiting for next instruction.
-
-This will all become clear later, after reading following prerequisite chapters.
-
-@section impflags Important flags
-
-@subsection pnnw PNnW
-
-Indicates read or write of a pending processor access:
-
- - 0 : Read processor access, for a fetch/load access
- - 1 : Write processor access, for a store access
-
-This value is defined only when a processor access is pending.
-
-Processor will do the action for us : it can for example read internal state (register values),
-and send us back the information via EJTAG memory (dmseg), or it can take some data from dmseg and write it into the registers or RAM.
-
-Every time when it sees address (i.e. when this address is the part of the opcode it is executing, wether it is instruction or data fetch)
-that falls into dmseg, processor stalls. That acutally meand that CPU stops it's pipeline and it is waitning for dongle to take some action.
-
-CPU is now either waiting for dongle to take some data from dmseg (if we requested for CPU do give us internal state, for example),
-or it will wait for some data from dongle (if it needs following instruction because it did previous, or if the operand address of the currently executed opcode
-falls somewhere (anywhere) in dmseg (0xff..ff20000 - 0xff..ff2fffff)).
-
-Bit PNnW describes character of CPU access to EJTAG memory (the memry where dongle puts/takes data) - CPU can either READ for it (PNnW == 0) or
-WRITE to it (PNnW == 1).
-
-By reading PNnW bit OpenOCD will know if it has to send (PNnW == 0) or to take (PNnW == 1) data (from dmseg, via dongle).
-
-@subsection pracc PrAcc
-
-Indicates a pending processor access and controls finishing of a pending processor access.
-
-When read:
-
- - 0 : No pending processor access
- - 1 : Pending processor access
-
-A write of 0 finishes a processor access if pending;
-otherwise operation of the processor is UNDEFINED
-if the bit is written to 0 when no processor access is
-pending. A write of 1 is ignored.
-
-A successful FASTDATA access will clear this bit.
-
-As noted above, on any access to dmseg, processor will stall. It waits for dongle to do some action - either to take or put some data.
-OpenOCD can figure out which action has to be taken by reading PrAcc bit.
-
-Once action from dongle has been done, i.e. after the data is taken/put, OpenOCD can signal to CPU to proceed with executing the instruction.
-This can be the next instruction (if previous was finished before pending), or the same instruction - if for example CPU was waiting on dongle
-to give it an operand, because it saw in the instruction opcode that operand address is somewhere in dmseg. That prowoked the CPU to stall (it tried operand fetch to dmseg and stopped),
-and PNnW bit is 0 (CPU does read from dmseg), and PrAcc is 1 (CPU is pending on dmseg access).
-
-@subsection spracc SPrAcc
-
-Shifting in a zero value requests completion of the Fastdata access.
-
-The PrAcc bit in the EJTAG Control register is overwritten with zero when the access
-succeeds. (The access succeeds if PrAcc is one and the operation address is in the legal dmseg segment
-Fastdata area.)
-
-When successful, a one is shifted out. Shifting out a zero indicates a Fastdata access failure.
-Shifting in a one does not complete the Fastdata access and the PrAcc bit is unchanged. Shifting out a
-one indicates that the access would have been successful if allowed to complete and a zero indicates
-the access would not have successfully completed.
-
-@section fdreg Fastdata Register (TAP Instruction FASTDATA)
-
-The width of the Fastdata register is 1 bit.
-
-During a Fastdata access, the Fastdata register is written and read, i.e., a bit is
-shifted in and a bit is shifted out.
-
-Also during a Fastdata access, the Fastdata register value shifted in specifies whether the Fastdata
-access should be completed or not. The value shifted out is a flag that indicates whether the Fastdata access was
-successful or not (if completion was requested).
-
-@section ejtagacc EJTAG Access Implementation
-
-OpenOCD reads/writes data to JTAG via mips_m4k_read_memory() and mips_m4k_write_memory() functions defined in src/target/mips_m4k.c.
-Internally, these functions call mips32_pracc_read_mem() and mips32_pracc_write_mem() defined in src/target/mips32_pracc.c
-
-Let's take for example function mips32_pracc_read_mem32() which describes CPU reads (fetches) from dmseg (EJTAG memory) :
-
-@code
-static const uint32_t code[] = {
- /* start: */
- MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
- MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
- MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
- MIPS32_SW(8,0,15), /* sw $8,($15) */
- MIPS32_SW(9,0,15), /* sw $9,($15) */
- MIPS32_SW(10,0,15), /* sw $10,($15) */
- MIPS32_SW(11,0,15), /* sw $11,($15) */
-
- MIPS32_LUI(8,UPPER16(MIPS32_PRACC_PARAM_IN)), /* $8 = MIPS32_PRACC_PARAM_IN */
- MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_PARAM_IN)),
- MIPS32_LW(9,0,8), /* $9 = mem[$8]; read addr */
- MIPS32_LW(10,4,8), /* $10 = mem[$8 + 4]; read count */
- MIPS32_LUI(11,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $11 = MIPS32_PRACC_PARAM_OUT */
- MIPS32_ORI(11,11,LOWER16(MIPS32_PRACC_PARAM_OUT)),
- /* loop: */
- MIPS32_BEQ(0,10,8), /* beq 0, $10, end */
- MIPS32_NOP,
-
- MIPS32_LW(8,0,9), /* lw $8,0($9), Load $8 with the word @mem[$9] */
- MIPS32_SW(8,0,11), /* sw $8,0($11) */
-
- MIPS32_ADDI(10,10,NEG16(1)), /* $10-- */
- MIPS32_ADDI(9,9,4), /* $1 += 4 */
- MIPS32_ADDI(11,11,4), /* $11 += 4 */
-
- MIPS32_B(NEG16(8)), /* b loop */
- MIPS32_NOP,
- /* end: */
- MIPS32_LW(11,0,15), /* lw $11,($15) */
- MIPS32_LW(10,0,15), /* lw $10,($15) */
- MIPS32_LW(9,0,15), /* lw $9,($15) */
- MIPS32_LW(8,0,15), /* lw $8,($15) */
- MIPS32_B(NEG16(27)), /* b start */
- MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
-};
-@endcode
-
-We have to pass this code to CPU via dongle via dmseg.
-
-After debug exception CPU will find itself stalling at the begining of the dmseg. It waits for the first instruction from dongle.
-This is MIPS32_MTC0(15,31,0), so CPU saves C0 and continues to addr 0xFF20 0001, which falls also to dmseg, so it stalls.
-Dongle proceeds giving to CPU one by one instruction in this manner.
-
-However, things are not so simple. If you take a look at the program, you will see that some instructions take operands. If it has to take
-operand from the address in dmseg, CPU will stall witing for the dongle to do the action of passing the operand and signal this by putting PrAcc to 0.
-If this operand is somewhere in RAM, CPU will not stall (it stalls only on dmseg), but it will just take it and proceed to nex instruction. But since PC for next instruction
-points to dmseg, it will stall, so that dongle can pass next instruction.
-
-Some instuctions are jumps (if these are jumps in dmseg addr, CPU will jump and then stall. If this is jump to some address in RAM, CPU will jump and just proceed -
-will not stall on addresses in RAM).
-
-To have information about CPU is currently (does it stalls wanting on operand or it jumped somewhere waiting for next instruction),
-OpenOCD has to call TAP ADDRESS instruction, which will ask CPU to give us his address within EJTAG memory :
-
-@code
-address = data = 0;
-mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-mips_ejtag_drscan_32(ejtag_info, &address);
-@endcode
-
-And then, upon the results, we can conclude where it is in our code so far, so we can give it what it wants next :
-
-@code
-if ((address >= MIPS32_PRACC_PARAM_IN)
- && (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
-{
- offset = (address - MIPS32_PRACC_PARAM_IN) / 4;
- data = ctx->local_iparam[offset];
-}
-else if ((address >= MIPS32_PRACC_PARAM_OUT)
- && (address <= MIPS32_PRACC_PARAM_OUT + ctx->num_oparam * 4))
-{
- offset = (address - MIPS32_PRACC_PARAM_OUT) / 4;
- data = ctx->local_oparam[offset];
-}
-else if ((address >= MIPS32_PRACC_TEXT)
- && (address <= MIPS32_PRACC_TEXT + ctx->code_len * 4))
-{
- offset = (address - MIPS32_PRACC_TEXT) / 4;
- data = ctx->code[offset];
-}
-else if (address == MIPS32_PRACC_STACK)
-{
- /* save to our debug stack */
- data = ctx->stack[--ctx->stack_offset];
-}
-else
-{
- /* TODO: send JMP 0xFF200000 instruction.
- Hopefully processor jump back to start of debug vector */
- data = 0;
- LOG_ERROR("Error reading unexpected address 0x%8.8" PRIx32 "", address);
- return ERROR_JTAG_DEVICE_ERROR;
-}
-@endcode
-
-i.e. if CPU is stalling on addresses in dmseg that are reserved for input parameters, we can conclude that it actually tried to take (read)
-parametar from there, and saw that address of param falls in dmseg, so it stopped. Obviously, now dongle have to give to it operand.
-
-Similarly, mips32_pracc_exec_write() describes CPU writes into EJTAG memory (dmseg).
-Obvioulsy, code is RO, and CPU can change only parameters :
-
-@code
-mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_DATA);
-mips_ejtag_drscan_32(ctx->ejtag_info, &data);
-
-/* Clear access pending bit */
-ejtag_ctrl = ejtag_info->ejtag_ctrl & ~EJTAG_CTRL_PRACC;
-mips_ejtag_set_instr(ctx->ejtag_info, EJTAG_INST_CONTROL);
-mips_ejtag_drscan_32(ctx->ejtag_info, &ejtag_ctrl);
-
-//jtag_add_clocks(5);
-jtag_execute_queue();
-
-if ((address >= MIPS32_PRACC_PARAM_IN)
- && (address <= MIPS32_PRACC_PARAM_IN + ctx->num_iparam * 4))
-{
- offset = (address - MIPS32_PRACC_PARAM_IN) / 4;
- ctx->local_iparam[offset] = data;
-}
-else if ((address >= MIPS32_PRACC_PARAM_OUT)
- && (address <= MIPS32_PRACC_PARAM_OUT + ctx->num_oparam * 4))
-{
- offset = (address - MIPS32_PRACC_PARAM_OUT) / 4;
- ctx->local_oparam[offset] = data;
-}
-else if (address == MIPS32_PRACC_STACK)
-{
- /* save data onto our stack */
- ctx->stack[ctx->stack_offset++] = data;
-}
-else
-{
- LOG_ERROR("Error writing unexpected address 0x%8.8" PRIx32 "", address);
- return ERROR_JTAG_DEVICE_ERROR;
-}
-@endcode
-
-CPU loops here :
-
-@code
-while (1)
-{
- if ((retval = wait_for_pracc_rw(ejtag_info, &ejtag_ctrl)) != ERROR_OK)
- return retval;
-
- address = data = 0;
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
- mips_ejtag_drscan_32(ejtag_info, &address);
-
- /* Check for read or write */
- if (ejtag_ctrl & EJTAG_CTRL_PRNW)
- {
- if ((retval = mips32_pracc_exec_write(&ctx, address)) != ERROR_OK)
- return retval;
- }
- else
- {
- /* Check to see if its reading at the debug vector. The first pass through
- * the module is always read at the vector, so the first one we allow. When
- * the second read from the vector occurs we are done and just exit. */
- if ((address == MIPS32_PRACC_TEXT) && (pass++))
- {
- break;
- }
-
- if ((retval = mips32_pracc_exec_read(&ctx, address)) != ERROR_OK)
- return retval;
- }
-
- if (cycle == 0)
- break;
-}
-@endcode
-
-and using presented R (mips32_pracc_exec_read()) and W (mips32_pracc_exec_write()) functions it reads in the code (RO) and reads and writes operands (RW).
-
-@section fdimpl OpenOCD FASTDATA Implementation
-
-OpenOCD FASTDATA write function, mips32_pracc_fastdata_xfer() is called from bulk_write_memory callback, which writes a count items of 4 bytes
-to the memory of a target at the an address given. Because it operates only on whole words, this should be faster than target_write_memory().
-
-In order to implement FASTDATA write, mips32_pracc_fastdata_xfer() uses the following handler :
-
-@code
-uint32_t handler_code[] = {
- /* caution when editing, table is modified below */
- /* r15 points to the start of this code */
- MIPS32_SW(8,MIPS32_FASTDATA_HANDLER_SIZE - 4,15),
- MIPS32_SW(9,MIPS32_FASTDATA_HANDLER_SIZE - 8,15),
- MIPS32_SW(10,MIPS32_FASTDATA_HANDLER_SIZE - 12,15),
- MIPS32_SW(11,MIPS32_FASTDATA_HANDLER_SIZE - 16,15),
- /* start of fastdata area in t0 */
- MIPS32_LUI(8,UPPER16(MIPS32_PRACC_FASTDATA_AREA)),
- MIPS32_ORI(8,8,LOWER16(MIPS32_PRACC_FASTDATA_AREA)),
- MIPS32_LW(9,0,8), /* start addr in t1 */
- MIPS32_LW(10,0,8), /* end addr to t2 */
- /* loop: */
- /* 8 */ MIPS32_LW(11,0,0), /* lw t3,[t8 | r9] */
- /* 9 */ MIPS32_SW(11,0,0), /* sw t3,[r9 | r8] */
- MIPS32_BNE(10,9,NEG16(3)), /* bne $t2,t1,loop */
- MIPS32_ADDI(9,9,4), /* addi t1,t1,4 */
-
- MIPS32_LW(8,MIPS32_FASTDATA_HANDLER_SIZE - 4,15),
- MIPS32_LW(9,MIPS32_FASTDATA_HANDLER_SIZE - 8,15),
- MIPS32_LW(10,MIPS32_FASTDATA_HANDLER_SIZE - 12,15),
- MIPS32_LW(11,MIPS32_FASTDATA_HANDLER_SIZE - 16,15),
-
- MIPS32_LUI(15,UPPER16(MIPS32_PRACC_TEXT)),
- MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_TEXT)),
- MIPS32_JR(15), /* jr start */
- MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
-};
-@endcode
-
-In the begining and the end of the handler we have fuction prologue (save the regs that will be clobbered) and epilogue (restore regs),
-and in the very end, after all the xfer have been done, we do jump to the MIPS32_PRACC_TEXT address, i.e. Debug Exception Vector location.
-We will use this fact (that we came back to MIPS32_PRACC_TEXT) to verify later if all the handler is executed (because when in RAM,
-processor do not stall - it executes all instructions untill one of them do not demand access to dmseg (if one of it's opernads is there)).
-
-This handler is put into the RAM and executed from there, and not instruction by instruction, like in previous simple write
-(mips_m4k_write_memory()) and read (mips_m4k_read_memory()) functions.
-
-N.B. When it is executing this code in RAM, CPU will not stall on instructions, but execute all until it comes to the :
-
-@code
-MIPS32_LW(9,0,8) /* start addr in t1 */
-@endcode
-
-and there it will stall - because it will see that one of the operands have to be fetched from dmseg (EJTAG memory, in this case FASTDATA memory segment).
-
-This handler is loaded in the RAM, ath the reserved location "work_area". This work_area is configured in OpenOCD configuration script and should be selected
-in that way that it is not clobbered (overwritten) by data we want to write-in using FASTDATA.
-
-What is executed instruction by instruction which is passed by dongle (via EJATG memory) is small jump code, which jumps at the handler in RAM.
-CPU stalls on dmseg when receiving these jmp_code instructions, but once it jumps in RAM, CPU do not stall anymore and executes bunch of handler instructions.
-Untill it comes to the first instruction which has an operand in FASTDATA area. There it stalls and waits on action from probe.
-It happens actually when CPU comes to this loop :
-
-@code
-MIPS32_LW(9,0,8), /* start addr in t1 */
-MIPS32_LW(10,0,8), /* end addr to t2 */
- /* loop: */
-/* 8 */ MIPS32_LW(11,0,0), /* lw t3,[t8 | r9] */
-/* 9 */ MIPS32_SW(11,0,0), /* sw t3,[r9 | r8] */
-MIPS32_BNE(10,9,NEG16(3)), /* bne $t2,t1,loop */
-@endcode
-
-and then it stalls because operand in r8 points to FASTDATA area.
-
-OpenOCD first verifies that CPU came to this place by :
-
-@code
-/* next fetch to dmseg should be in FASTDATA_AREA, check */
-address = 0;
-mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-mips_ejtag_drscan_32(ejtag_info, &address);
-
-if (address != MIPS32_PRACC_FASTDATA_AREA)
- return ERROR_FAIL;
-@endcode
-
-and then passes to CPU start and end address of the loop region for handler in RAM.
-
-In the loop in handler, CPU sees that it has to take and operand from FSTDATA area (to write it to the dst in RAM after), and so it stalls, putting PrAcc to "1".
-OpenOCD fills the data via this loop :
-
-@code
-for (i = 0; i < count; i++)
-{
- /* Send the data out using fastdata (clears the access pending bit) */
- mips_ejtag_set_instr(ejtag_info, EJTAG_INST_FASTDATA);
- if ((retval = mips_ejtag_fastdata_scan(ejtag_info, write_t, buf++)) != ERROR_OK)
- return retval;
-}
-@endcode
-
-Each time when OpenOCD fills data to CPU (via dongle, via dmseg), CPU takes it and proceeds in executing the endler. However, since handler is in a assembly loop,
-CPU comes to next instruction which also fetches data from FASTDATA area. So it stalls.
-Then OpenOCD fills the data again, from it's (OpenOCD's) loop. And this game continues untill all the data has been filled.
-
-After the last data has beend given to CPU it sees that it reached the end address, so it proceeds with next instruction. However, rhis instruction do not point into dmseg, so
-CPU executes bunch of handler instructions (all prologue) and in the end jumps to MIPS32_PRACC_TEXT address.
-
-On it's side, OpenOCD checks in CPU has jumped back to MIPS32_PRACC_TEXT, which is the confirmation that it correclty executed all the rest of the handler in RAM,
-and that is not stuck somewhere in the RAM, or stalling on some acces in dmseg - that would be an error :
-
-@code
-address = 0;
-mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-mips_ejtag_drscan_32(ejtag_info, &address);
-
-if (address != MIPS32_PRACC_TEXT)
- LOG_ERROR("mini program did not return to start");
-@endcode
-
-@section fdejtagspec EJTAG spec on FASTDATA access
-
-The width of the Fastdata register is 1 bit. During a Fastdata access, the Fastdata register is written and read, i.e., a bit
-is shifted in and a bit is shifted out. During a Fastdata access, the Fastdata register value shifted in specifies whether
-the Fastdata access should be completed or not. The value shifted out is a flag that indicates whether the Fastdata
-access was successful or not (if completion was requested).
-
-The FASTDATA access is used for efficient block transfers between dmseg (on the probe) and target memory (on the
-processor). An "upload" is defined as a sequence of processor loads from target memory and stores to dmseg. A
-"download" is a sequence of processor loads from dmseg and stores to target memory. The "Fastdata area" specifies
-the legal range of dmseg addresses (0xFF20.0000 - 0xFF20.000F) that can be used for uploads and downloads. The
-Data + Fastdata registers (selected with the FASTDATA instruction) allow efficient completion of pending Fastdata
-area accesses.
-During Fastdata uploads and downloads, the processor will stall on accesses to the Fastdata area. The PrAcc (processor
-access pending bit) will be 1 indicating the probe is required to complete the access. Both upload and download
-accesses are attempted by shifting in a zero SPrAcc value (to request access completion) and shifting out SPrAcc to
-see if the attempt will be successful (i.e., there was an access pending and a legal Fastdata area address was used).
-Downloads will also shift in the data to be used to satisfy the load from dmseg\u2019s Fastdata area, while uploads will
-shift out the data being stored to dmseg\u2019s Fastdata area.
-As noted above, two conditions must be true for the Fastdata access to succeed. These are:
-
- - PrAcc must be 1, i.e., there must be a pending processor access.
- - The Fastdata operation must use a valid Fastdata area address in dmseg (0xFF20.0000 to 0xFF20.000F).
-
-Basically, because FASTDATA area in dmseg is 16 bytes, we transfer (0xFF20.0000 - 0xFF20.000F)
-FASTDATA scan TAP instruction selects the Data and the Fastdata registers at once.
-
-They come in order :
-TDI -> | Data register| -> | Fastdata register | -> TDO
-
-FASTDATA register is 1-bit width register. It takes in SPrAcc bit which should be shifted first,
-followed by 32 bit of data.
-
-Scan width of FASTDTA is 33 bits in total : 33 bits are shifted in and 33 bits are shifted out.
-
-First bit that is shifted out is SPrAcc that comes out of Fastdata register and should give us status on FATSDATA write we want to do.
-
-@section fdcheck OpenOCD misses FASTDATA check
-
-Download flow (probe -> target block transfer) :
-
-1) Probe transfer target execution to a loop in target memory doing a fixed number of "loads" to fastdata area of dmseg (and stores to the target download destination.)
-
-2) Probe loops attempting to satisfy the loads "expected" from the target.
- On FASTDATA access "successful" move on to next "load".
- On FASTDATA access "failure" repeat until "successful" or timeout.
- (A "failure" is an attempt to satisfy an access when none are pending.)
-
-Note: A failure may have a recoverable (and even expected) cause like slow target execution of the load loop. Other failures may be due to unexpected more troublesome causes like an exception while in debug mode or a target hang on a bad target memory access.
-
-Shifted out SPrAcc bit inform us that there was CPU access pendingand that it can be complete.
-
-Basically, we should do following procedure :
-
- - Download (dongle -> CPU) :
-You shift "download" DATA and FASTDATA[SPrAcc] = 0 (33 bit scan) into the target. If the value of FASTDATA[SPrAcc] shifted out is "1" then an access was pending when you started the scan and it is now complete.
-
-If SPrAcc is 0 then no access was pending to the fastdata area. (Repeat attempt to complete the access you expect for this data word. Timeout if you think the access is "long overdue" as something unexpected has happened.)
-
- - Upload (CPU -> dongle) :
-You shift "dummy" DATA and FASTDATA[SPrAcc] = 0 (33 bit scan) into the target. If the value of FASTDATA[SPrAcc] shifted out is "1" then an access was pending when you started the scan and it is now complete. The "upload" is the DATA shifted out of the target.
-
-If SPrAcc is 0 then no access was pending to the fastdata area. (Repeat attempt to complete the access you expect for this data word. Timeout if you think the access is "long overdue" as something unexpected has happened.)
-
-Basically, if checking first (before scan) if CPU is pending on FASTDATA access (PrAcc is "1"), like this
-
-@code
-wait(ready);
-do_scan();
-@endcode
-
-which is inefficient, we should do it like this :
-
-@code
-BEGIN :
- do_scan();
- if (!was_ready)
- goto BEGIN;
-@endcode
-
-by checking SPrAcc that we shifted out.
-
-If some FASTDATA write fails, OpenOCD will continue with it's loop (on the host side), but CPU will rest pending (on the target side)
-waiting for correct FASTDATA write.
-
-Since OpenOCD goes ahead, it will eventually finish it's loop, and proceede to check if CPU took all the data. But since CPU did not took all the data,
-it is still turns in handler's loop in RAM, stalling on Fastdata area so this check :
-
-@code
-address = 0;
-mips_ejtag_set_instr(ejtag_info, EJTAG_INST_ADDRESS);
-retval = mips_ejtag_drscan_32(ejtag_info, &address);
-if (retval != ERROR_OK)
- return retval;
-
-if (address != MIPS32_PRACC_TEXT)
- LOG_ERROR("mini program did not return to start");
-@endcode
-
-fails, and that gives us enough information of the failure.
-
-In this case, we can lower the JTAG frquency and try again, bacuse most probable reason of this failure is that we tried FASTDATA upload before CPU arrived to rise PrAcc (i.e. before it was pending on access).
-However, the reasons for failure might be numerous : reset, exceptions which can occur in debug mode, bus hangs, etc.
-
-If lowering the JTAG freq does not work either, we can fall back to more robust solution with patch posted below.
-
-To summarize, FASTDATA communication goes as following :
-
--# CPU jumps to Debug Exception Vector Location 0xFF200200 in dmseg and it stalls, pending and waiting for EJTAG to give it first debug instruction and signall it by putting PrAcc to "0"
--# When PrAcc goes to "0" CPU execute one opcode sent by EJTAG via DATA reg. Then it pends on next access, waiting for PrAcc to be put to "0" again
--# Following this game, OpenOCD first loads handler code in RAM, and then sends the jmp_code - instruction by instruction via DATA reg, which redirects CPU to handler previously set up in RAM
--# Once in RAM CPU does not pend on any instruction, but it executes all handler instructions untill first "fetch" to Fastdata area - then it stops and pends.
--# So - when it comes to any instruction (opcode) in this handler in RAM which reads (or writes) to Fastdata area (0xF..F20.0000 to 0xF..F20.000F), CPU stops (i.e. stalls access).
- I.e. it stops on this lw opcode and waits to FASTDATA TAP command from the probe.
--# CPU continues only if OpenOCD shifted in SPrAcc "0" (and if the PrAcc was "1"). It shifts-out "1" to tell us that it was OK (processor was stalled, so it can complete the access),
- and that it continued execution of the handler in RAM.
--# If PrAcc was not "1" CPU will not continue (go to next instruction), but will shift-out "0" and keep stalling on the same instruction of my handler in RAM.
--# When Fastdata loop is finished, CPU executes all following hadler instructions in RAM (prologue).
--# In the end of my handler in RAM, I jumps back to begining of Debug Exception Vector Location 0xFF200200 in dmseg.
--# When it jumps back to 0xFF200200 in dmseg processor stops and pends, waiting for OpenOCD to send it instruction via DATA reg and signal it by putting PrAcc to "0".
-
-*/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target/notarm.txt
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target/notarm.txt b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/target/notarm.txt
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-/** @page targetnotarm OpenOCD Non-ARM Targets
-
-This page describes outstanding issues w.r.t. non-ARM targets.
-
-@section targetnotarmflash Flash drivers
-
-The flash drivers contain ARM32 code that is used
-to execute code on the target.
-
-This needs to be handled in some CPU independent
-manner.
-
-The ocl and ecos flash drivers compile the flash
-driver code to run on the target on the developer
-machine.
-
-The ocl and ecos flash drivers should be unified
-and instructions should be written on how to
-compile the target flash drivers. Perhaps
-using automake?
-
-
-eCos has CFI driver that could probably be compiled
-for all targets. The trick is to figure out a
-way to make the compiled flash drivers work
-on all target memory maps + sort out all the
-little details
-
-@section targetnotarm32v64 32 vs. 64 bit
-
-Currently OpenOCD only supports 32 bit targets.
-
-Adding 64 bit support would be nice but there
-hasn't been any call for it in the openocd development
-mailing list
-
-@section targetnotarmsupport Target Support
-
-target.h is relatively CPU agnostic and
-the intention is to move in the direction of less
-instruction set specific.
-
-Non-CPU targets are also supported, but there isn't
-a lot of activity on it in the mailing list currently.
-An example is FPGA programming support via JTAG,
-but also flash chips can be programmed directly
-using JTAG.
-
-@section targetnotarmphy non-JTAG physical layer
-
-JTAG is not the only physical protocol used to talk to
-CPUs.
-
-OpenOCD does not today have targets that use non-JTAG.
-
-The actual physical layer is a relatively modest part
-of the total OpenOCD system.
-
-
-@section targetnotarmppc PowerPC
-
-there exists open source implementations of powerpc
-target manipulation, but there hasn't been a lot
-of activity in the mailing list.
-
-@section targetnotarmmips MIPS
-
-Currently OpenOCD has a MIPS target defined. This is the
-first non-ARM example of a CPU target
-
- */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/openocd.1
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/openocd.1 b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/openocd.1
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-.TH "OPENOCD" "1" "November 24, 2009"
-.SH "NAME"
-openocd \- A free and open on\-chip debugging, in\-system programming and
-boundary\-scan testing tool for ARM and MIPS systems
-.SH "SYNOPSIS"
-.B openocd \fR[\fB\-fsdlcphv\fR] [\fB\-\-file\fR <filename>] [\fB\-\-search\fR <dirname>] [\fB\-\-debug\fR <debuglevel>] [\fB\-\-log_output\fR <filename>] [\fB\-\-command\fR <cmd>] [\fB\-\-pipe\fR] [\fB\-\-help\fR] [\fB\-\-version\fR]
-.SH "DESCRIPTION"
-.B OpenOCD
-is an on\-chip debugging, in\-system programming and boundary\-scan
-testing tool for various ARM and MIPS systems.
-.PP
-The debugger uses an IEEE 1149\-1 compliant JTAG TAP bus master to access
-on\-chip debug functionality available on ARM based microcontrollers or
-system-on-chip solutions. For MIPS systems the EJTAG interface is supported.
-.PP
-User interaction is realized through a telnet command line interface,
-a gdb (the GNU debugger) remote protocol server, and a simplified RPC
-connection that can be used to interface with OpenOCD's Jim Tcl engine.
-.PP
-OpenOCD supports various different types of JTAG interfaces/programmers,
-please check the \fIopenocd\fR info page for the complete list.
-.SH "OPTIONS"
-.TP
-.B "\-f, \-\-file <filename>"
-This is a shortcut for a \fB\-c "[script \fI<filename>\fB]"\fR
-command, using a search path to load the configuration file
-.IR <filename> .
-In order to specify multiple config files, you can use multiple
-.B \-\-file
-arguments. If no such \fB\-c\fR
-options are included, the first config file
-.B openocd.cfg
-in the search path will be used.
-.TP
-.B "\-s, \-\-search <dirname>"
-Add
-.I <dirname>
-to the search path used for config files and scripts.
-The search path begins with the current directory,
-then includes these additional directories before other
-components such as the standard OpenOCD script libraries.
-.TP
-.B "\-d, \-\-debug <debuglevel>"
-Set debug level. Possible values are:
-.br
-.RB " * " 0 " (errors)"
-.br
-.RB " * " 1 " (warnings)"
-.br
-.RB " * " 2 " (informational messages)"
-.br
-.RB " * " 3 " (debug messages)"
-.br
-The default level is
-.BR 2 .
-.TP
-.B "\-l, \-\-log_output <filename>"
-Redirect log output to the file
-.IR <filename> .
-Per default the log output is printed on
-.BR stderr .
-.TP
-.B "\-c, \-\-command <cmd>"
-Add the command
-.I <cmd>
-to a list of commands executed on server startup.
-Note that you will need to explicitly invoke
-.I init
-if the command requires access to a target or flash.
-.TP
-.B "\-p, \-\-pipe"
-Use pipes when talking to gdb.
-.TP
-.B "\-h, \-\-help"
-Show a help text and exit.
-.TP
-.B "\-v, \-\-version"
-Show version information and exit.
-.SH "BUGS"
-Please report any bugs on the mailing list at
-.BR openocd\-devel@lists.sourceforge.net .
-.SH "LICENCE"
-.B OpenOCD
-is covered by the GNU General Public License (GPL), version 2 or later.
-.SH "SEE ALSO"
-.BR jtag (1)
-.PP
-The full documentation for
-.B openocd
-is maintained as a Texinfo manual. If the
-.BR info
-(or
-.BR pinfo )
-and
-.BR openocd
-programs are properly installed at your site, the command
-.B info openocd
-should give you access to the complete manual.
-.SH "AUTHORS"
-Please see the file AUTHORS.
-.PP
-This manual page was written by Uwe Hermann <uwe@hermann\-uwe.de>.
-It is licensed under the terms of the GNU GPL (version 2 or later).
[28/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/efm32.c
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/efm32.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/efm32.c
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index ab543d6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/efm32.c
+++ /dev/null
@@ -1,1069 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * *
- * Copyright (C) 2013 by Roman Dmitrienko *
- * me@iamroman.org *
- * *
- * Copyright (C) 2014 Nemui Trinomius *
- * nemuisan_kawausogasuki@live.jp *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-#include <target/cortex_m.h>
-
-/* keep family IDs in decimal */
-#define EFM_FAMILY_ID_GECKO 71
-#define EFM_FAMILY_ID_GIANT_GECKO 72
-#define EFM_FAMILY_ID_TINY_GECKO 73
-#define EFM_FAMILY_ID_LEOPARD_GECKO 74
-#define EFM_FAMILY_ID_WONDER_GECKO 75
-#define EFM_FAMILY_ID_ZERO_GECKO 76
-#define EFM_FAMILY_ID_HAPPY_GECKO 77
-#define EZR_FAMILY_ID_WONDER_GECKO 120
-#define EZR_FAMILY_ID_LEOPARD_GECKO 121
-
-#define EFM32_FLASH_ERASE_TMO 100
-#define EFM32_FLASH_WDATAREADY_TMO 100
-#define EFM32_FLASH_WRITE_TMO 100
-
-/* size in bytes, not words; must fit all Gecko devices */
-#define LOCKBITS_PAGE_SZ 512
-
-#define EFM32_MSC_INFO_BASE 0x0fe00000
-
-#define EFM32_MSC_USER_DATA EFM32_MSC_INFO_BASE
-#define EFM32_MSC_LOCK_BITS (EFM32_MSC_INFO_BASE+0x4000)
-#define EFM32_MSC_DEV_INFO (EFM32_MSC_INFO_BASE+0x8000)
-
-/* PAGE_SIZE is only present in Leopard, Giant and Wonder Gecko MCUs */
-#define EFM32_MSC_DI_PAGE_SIZE (EFM32_MSC_DEV_INFO+0x1e7)
-#define EFM32_MSC_DI_FLASH_SZ (EFM32_MSC_DEV_INFO+0x1f8)
-#define EFM32_MSC_DI_RAM_SZ (EFM32_MSC_DEV_INFO+0x1fa)
-#define EFM32_MSC_DI_PART_NUM (EFM32_MSC_DEV_INFO+0x1fc)
-#define EFM32_MSC_DI_PART_FAMILY (EFM32_MSC_DEV_INFO+0x1fe)
-#define EFM32_MSC_DI_PROD_REV (EFM32_MSC_DEV_INFO+0x1ff)
-
-#define EFM32_MSC_REGBASE 0x400c0000
-#define EFM32_MSC_WRITECTRL (EFM32_MSC_REGBASE+0x008)
-#define EFM32_MSC_WRITECTRL_WREN_MASK 0x1
-#define EFM32_MSC_WRITECMD (EFM32_MSC_REGBASE+0x00c)
-#define EFM32_MSC_WRITECMD_LADDRIM_MASK 0x1
-#define EFM32_MSC_WRITECMD_ERASEPAGE_MASK 0x2
-#define EFM32_MSC_WRITECMD_WRITEONCE_MASK 0x8
-#define EFM32_MSC_ADDRB (EFM32_MSC_REGBASE+0x010)
-#define EFM32_MSC_WDATA (EFM32_MSC_REGBASE+0x018)
-#define EFM32_MSC_STATUS (EFM32_MSC_REGBASE+0x01c)
-#define EFM32_MSC_STATUS_BUSY_MASK 0x1
-#define EFM32_MSC_STATUS_LOCKED_MASK 0x2
-#define EFM32_MSC_STATUS_INVADDR_MASK 0x4
-#define EFM32_MSC_STATUS_WDATAREADY_MASK 0x8
-#define EFM32_MSC_STATUS_WORDTIMEOUT_MASK 0x10
-#define EFM32_MSC_STATUS_ERASEABORTED_MASK 0x20
-#define EFM32_MSC_LOCK (EFM32_MSC_REGBASE+0x03c)
-#define EFM32_MSC_LOCK_LOCKKEY 0x1b71
-
-struct efm32x_flash_bank {
- int probed;
- uint32_t lb_page[LOCKBITS_PAGE_SZ/4];
-};
-
-struct efm32_info {
- uint16_t flash_sz_kib;
- uint16_t ram_sz_kib;
- uint16_t part_num;
- uint8_t part_family;
- uint8_t prod_rev;
- uint16_t page_size;
-};
-
-static int efm32x_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count);
-
-static int efm32x_get_flash_size(struct flash_bank *bank, uint16_t *flash_sz)
-{
- return target_read_u16(bank->target, EFM32_MSC_DI_FLASH_SZ, flash_sz);
-}
-
-static int efm32x_get_ram_size(struct flash_bank *bank, uint16_t *ram_sz)
-{
- return target_read_u16(bank->target, EFM32_MSC_DI_RAM_SZ, ram_sz);
-}
-
-static int efm32x_get_part_num(struct flash_bank *bank, uint16_t *pnum)
-{
- return target_read_u16(bank->target, EFM32_MSC_DI_PART_NUM, pnum);
-}
-
-static int efm32x_get_part_family(struct flash_bank *bank, uint8_t *pfamily)
-{
- return target_read_u8(bank->target, EFM32_MSC_DI_PART_FAMILY, pfamily);
-}
-
-static int efm32x_get_prod_rev(struct flash_bank *bank, uint8_t *prev)
-{
- return target_read_u8(bank->target, EFM32_MSC_DI_PROD_REV, prev);
-}
-
-static int efm32x_read_info(struct flash_bank *bank,
- struct efm32_info *efm32_info)
-{
- int ret;
- uint32_t cpuid = 0;
-
- memset(efm32_info, 0, sizeof(struct efm32_info));
-
- ret = target_read_u32(bank->target, CPUID, &cpuid);
- if (ERROR_OK != ret)
- return ret;
-
- if (((cpuid >> 4) & 0xfff) == 0xc23) {
- /* Cortex M3 device */
- } else if (((cpuid >> 4) & 0xfff) == 0xc24) {
- /* Cortex M4 device(WONDER GECKO) */
- } else if (((cpuid >> 4) & 0xfff) == 0xc60) {
- /* Cortex M0plus device */
- } else {
- LOG_ERROR("Target is not Cortex-Mx Device");
- return ERROR_FAIL;
- }
-
- ret = efm32x_get_flash_size(bank, &(efm32_info->flash_sz_kib));
- if (ERROR_OK != ret)
- return ret;
-
- ret = efm32x_get_ram_size(bank, &(efm32_info->ram_sz_kib));
- if (ERROR_OK != ret)
- return ret;
-
- ret = efm32x_get_part_num(bank, &(efm32_info->part_num));
- if (ERROR_OK != ret)
- return ret;
-
- ret = efm32x_get_part_family(bank, &(efm32_info->part_family));
- if (ERROR_OK != ret)
- return ret;
-
- ret = efm32x_get_prod_rev(bank, &(efm32_info->prod_rev));
- if (ERROR_OK != ret)
- return ret;
-
- if (EFM_FAMILY_ID_GECKO == efm32_info->part_family ||
- EFM_FAMILY_ID_TINY_GECKO == efm32_info->part_family)
- efm32_info->page_size = 512;
- else if (EFM_FAMILY_ID_ZERO_GECKO == efm32_info->part_family ||
- EFM_FAMILY_ID_HAPPY_GECKO == efm32_info->part_family)
- efm32_info->page_size = 1024;
- else if (EFM_FAMILY_ID_GIANT_GECKO == efm32_info->part_family ||
- EFM_FAMILY_ID_LEOPARD_GECKO == efm32_info->part_family) {
- if (efm32_info->prod_rev >= 18) {
- uint8_t pg_size = 0;
- ret = target_read_u8(bank->target, EFM32_MSC_DI_PAGE_SIZE,
- &pg_size);
- if (ERROR_OK != ret)
- return ret;
-
- efm32_info->page_size = (1 << ((pg_size+10) & 0xff));
- } else {
- /* EFM32 GG/LG errata: MEM_INFO_PAGE_SIZE is invalid
- for MCUs with PROD_REV < 18 */
- if (efm32_info->flash_sz_kib < 512)
- efm32_info->page_size = 2048;
- else
- efm32_info->page_size = 4096;
- }
-
- if ((2048 != efm32_info->page_size) &&
- (4096 != efm32_info->page_size)) {
- LOG_ERROR("Invalid page size %u", efm32_info->page_size);
- return ERROR_FAIL;
- }
- } else if (EFM_FAMILY_ID_WONDER_GECKO == efm32_info->part_family ||
- EZR_FAMILY_ID_WONDER_GECKO == efm32_info->part_family ||
- EZR_FAMILY_ID_LEOPARD_GECKO == efm32_info->part_family) {
- uint8_t pg_size = 0;
- ret = target_read_u8(bank->target, EFM32_MSC_DI_PAGE_SIZE,
- &pg_size);
- if (ERROR_OK != ret)
- return ret;
-
- efm32_info->page_size = (1 << ((pg_size+10) & 0xff));
- if (2048 != efm32_info->page_size) {
- LOG_ERROR("Invalid page size %u", efm32_info->page_size);
- return ERROR_FAIL;
- }
- } else {
- LOG_ERROR("Unknown MCU family %d", efm32_info->part_family);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-/*
- * Helper to create a human friendly string describing a part
- */
-static int efm32x_decode_info(struct efm32_info *info, char *buf, int buf_size)
-{
- int printed = 0;
-
- switch (info->part_family) {
- case EZR_FAMILY_ID_WONDER_GECKO:
- case EZR_FAMILY_ID_LEOPARD_GECKO:
- printed = snprintf(buf, buf_size, "EZR32 ");
- break;
- default:
- printed = snprintf(buf, buf_size, "EFM32 ");
- }
-
- buf += printed;
- buf_size -= printed;
-
- if (0 >= buf_size)
- return ERROR_BUF_TOO_SMALL;
-
- switch (info->part_family) {
- case EFM_FAMILY_ID_GECKO:
- printed = snprintf(buf, buf_size, "Gecko");
- break;
- case EFM_FAMILY_ID_GIANT_GECKO:
- printed = snprintf(buf, buf_size, "Giant Gecko");
- break;
- case EFM_FAMILY_ID_TINY_GECKO:
- printed = snprintf(buf, buf_size, "Tiny Gecko");
- break;
- case EFM_FAMILY_ID_LEOPARD_GECKO:
- case EZR_FAMILY_ID_LEOPARD_GECKO:
- printed = snprintf(buf, buf_size, "Leopard Gecko");
- break;
- case EFM_FAMILY_ID_WONDER_GECKO:
- case EZR_FAMILY_ID_WONDER_GECKO:
- printed = snprintf(buf, buf_size, "Wonder Gecko");
- break;
- case EFM_FAMILY_ID_ZERO_GECKO:
- printed = snprintf(buf, buf_size, "Zero Gecko");
- break;
- case EFM_FAMILY_ID_HAPPY_GECKO:
- printed = snprintf(buf, buf_size, "Happy Gecko");
- break;
- }
-
- buf += printed;
- buf_size -= printed;
-
- if (0 >= buf_size)
- return ERROR_BUF_TOO_SMALL;
-
- printed = snprintf(buf, buf_size, " - Rev: %d", info->prod_rev);
- buf += printed;
- buf_size -= printed;
-
- if (0 >= buf_size)
- return ERROR_BUF_TOO_SMALL;
-
- return ERROR_OK;
-}
-
-/* flash bank efm32 <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(efm32x_flash_bank_command)
-{
- struct efm32x_flash_bank *efm32x_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- efm32x_info = malloc(sizeof(struct efm32x_flash_bank));
-
- bank->driver_priv = efm32x_info;
- efm32x_info->probed = 0;
- memset(efm32x_info->lb_page, 0xff, LOCKBITS_PAGE_SZ);
-
- return ERROR_OK;
-}
-
-/* set or reset given bits in a register */
-static int efm32x_set_reg_bits(struct flash_bank *bank, uint32_t reg,
- uint32_t bitmask, int set)
-{
- int ret = 0;
- uint32_t reg_val = 0;
-
- ret = target_read_u32(bank->target, reg, ®_val);
- if (ERROR_OK != ret)
- return ret;
-
- if (set)
- reg_val |= bitmask;
- else
- reg_val &= ~bitmask;
-
- return target_write_u32(bank->target, reg, reg_val);
-}
-
-static int efm32x_set_wren(struct flash_bank *bank, int write_enable)
-{
- return efm32x_set_reg_bits(bank, EFM32_MSC_WRITECTRL,
- EFM32_MSC_WRITECTRL_WREN_MASK, write_enable);
-}
-
-static int efm32x_msc_lock(struct flash_bank *bank, int lock)
-{
- return target_write_u32(bank->target, EFM32_MSC_LOCK,
- (lock ? 0 : EFM32_MSC_LOCK_LOCKKEY));
-}
-
-static int efm32x_wait_status(struct flash_bank *bank, int timeout,
- uint32_t wait_mask, int wait_for_set)
-{
- int ret = 0;
- uint32_t status = 0;
-
- while (1) {
- ret = target_read_u32(bank->target, EFM32_MSC_STATUS, &status);
- if (ERROR_OK != ret)
- break;
-
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
-
- if (((status & wait_mask) == 0) && (0 == wait_for_set))
- break;
- else if (((status & wait_mask) != 0) && wait_for_set)
- break;
-
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for MSC status");
- return ERROR_FAIL;
- }
-
- alive_sleep(1);
- }
-
- if (status & EFM32_MSC_STATUS_ERASEABORTED_MASK)
- LOG_WARNING("page erase was aborted");
-
- return ret;
-}
-
-static int efm32x_erase_page(struct flash_bank *bank, uint32_t addr)
-{
- /* this function DOES NOT set WREN; must be set already */
- /* 1. write address to ADDRB
- 2. write LADDRIM
- 3. check status (INVADDR, LOCKED)
- 4. write ERASEPAGE
- 5. wait until !STATUS_BUSY
- */
- int ret = 0;
- uint32_t status = 0;
-
- LOG_DEBUG("erasing flash page at 0x%08" PRIx32, addr);
-
- ret = target_write_u32(bank->target, EFM32_MSC_ADDRB, addr);
- if (ERROR_OK != ret)
- return ret;
-
- ret = efm32x_set_reg_bits(bank, EFM32_MSC_WRITECMD,
- EFM32_MSC_WRITECMD_LADDRIM_MASK, 1);
- if (ERROR_OK != ret)
- return ret;
-
- ret = target_read_u32(bank->target, EFM32_MSC_STATUS, &status);
- if (ERROR_OK != ret)
- return ret;
-
- LOG_DEBUG("status 0x%" PRIx32, status);
-
- if (status & EFM32_MSC_STATUS_LOCKED_MASK) {
- LOG_ERROR("Page is locked");
- return ERROR_FAIL;
- } else if (status & EFM32_MSC_STATUS_INVADDR_MASK) {
- LOG_ERROR("Invalid address 0x%" PRIx32, addr);
- return ERROR_FAIL;
- }
-
- ret = efm32x_set_reg_bits(bank, EFM32_MSC_WRITECMD,
- EFM32_MSC_WRITECMD_ERASEPAGE_MASK, 1);
- if (ERROR_OK != ret)
- return ret;
-
- return efm32x_wait_status(bank, EFM32_FLASH_ERASE_TMO,
- EFM32_MSC_STATUS_BUSY_MASK, 0);
-}
-
-static int efm32x_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- int i = 0;
- int ret = 0;
-
- if (TARGET_HALTED != target->state) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- efm32x_msc_lock(bank, 0);
- ret = efm32x_set_wren(bank, 1);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to enable MSC write");
- return ret;
- }
-
- for (i = first; i <= last; i++) {
- ret = efm32x_erase_page(bank, bank->sectors[i].offset);
- if (ERROR_OK != ret)
- LOG_ERROR("Failed to erase page %d", i);
- }
-
- ret = efm32x_set_wren(bank, 0);
- efm32x_msc_lock(bank, 1);
-
- return ret;
-}
-
-static int efm32x_read_lock_data(struct flash_bank *bank)
-{
- struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
- struct target *target = bank->target;
- int i = 0;
- int data_size = 0;
- uint32_t *ptr = NULL;
- int ret = 0;
-
- assert(!(bank->num_sectors & 0x1f));
-
- data_size = bank->num_sectors / 8; /* number of data bytes */
- data_size /= 4; /* ...and data dwords */
-
- ptr = efm32x_info->lb_page;
-
- for (i = 0; i < data_size; i++, ptr++) {
- ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+i*4, ptr);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to read PLW %d", i);
- return ret;
- }
- }
-
- /* also, read ULW, DLW and MLW */
-
- /* ULW, word 126 */
- ptr = efm32x_info->lb_page + 126;
- ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+126*4, ptr);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to read ULW");
- return ret;
- }
-
- /* DLW, word 127 */
- ptr = efm32x_info->lb_page + 127;
- ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+127*4, ptr);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to read DLW");
- return ret;
- }
-
- /* MLW, word 125, present in GG and LG */
- ptr = efm32x_info->lb_page + 125;
- ret = target_read_u32(target, EFM32_MSC_LOCK_BITS+125*4, ptr);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to read MLW");
- return ret;
- }
-
- return ERROR_OK;
-}
-
-static int efm32x_write_lock_data(struct flash_bank *bank)
-{
- struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
- int ret = 0;
-
- ret = efm32x_erase_page(bank, EFM32_MSC_LOCK_BITS);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to erase LB page");
- return ret;
- }
-
- return efm32x_write(bank, (uint8_t *)efm32x_info->lb_page, EFM32_MSC_LOCK_BITS,
- LOCKBITS_PAGE_SZ);
-}
-
-static int efm32x_get_page_lock(struct flash_bank *bank, size_t page)
-{
- struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
- uint32_t dw = efm32x_info->lb_page[page >> 5];
- uint32_t mask = 0;
-
- mask = 1 << (page & 0x1f);
-
- return (dw & mask) ? 0 : 1;
-}
-
-static int efm32x_set_page_lock(struct flash_bank *bank, size_t page, int set)
-{
- struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
- uint32_t *dw = &efm32x_info->lb_page[page >> 5];
- uint32_t mask = 0;
-
- mask = 1 << (page & 0x1f);
-
- if (!set)
- *dw |= mask;
- else
- *dw &= ~mask;
-
- return ERROR_OK;
-}
-
-static int efm32x_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct target *target = bank->target;
- int i = 0;
- int ret = 0;
-
- if (!set) {
- LOG_ERROR("Erase device data to reset page locks");
- return ERROR_FAIL;
- }
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- for (i = first; i <= last; i++) {
- ret = efm32x_set_page_lock(bank, i, set);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to set lock on page %d", i);
- return ret;
- }
- }
-
- ret = efm32x_write_lock_data(bank);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to write LB page");
- return ret;
- }
-
- return ERROR_OK;
-}
-
-static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[5];
- struct armv7m_algorithm armv7m_info;
- int ret = ERROR_OK;
-
- /* see contrib/loaders/flash/efm32.S for src */
- static const uint8_t efm32x_flash_write_code[] = {
- /* #define EFM32_MSC_WRITECTRL_OFFSET 0x008 */
- /* #define EFM32_MSC_WRITECMD_OFFSET 0x00c */
- /* #define EFM32_MSC_ADDRB_OFFSET 0x010 */
- /* #define EFM32_MSC_WDATA_OFFSET 0x018 */
- /* #define EFM32_MSC_STATUS_OFFSET 0x01c */
- /* #define EFM32_MSC_LOCK_OFFSET 0x03c */
-
- 0x15, 0x4e, /* ldr r6, =#0x1b71 */
- 0xc6, 0x63, /* str r6, [r0, #EFM32_MSC_LOCK_OFFSET] */
- 0x01, 0x26, /* movs r6, #1 */
- 0x86, 0x60, /* str r6, [r0, #EFM32_MSC_WRITECTRL_OFFSET] */
-
- /* wait_fifo: */
- 0x16, 0x68, /* ldr r6, [r2, #0] */
- 0x00, 0x2e, /* cmp r6, #0 */
- 0x22, 0xd0, /* beq exit */
- 0x55, 0x68, /* ldr r5, [r2, #4] */
- 0xb5, 0x42, /* cmp r5, r6 */
- 0xf9, 0xd0, /* beq wait_fifo */
-
- 0x04, 0x61, /* str r4, [r0, #EFM32_MSC_ADDRB_OFFSET] */
- 0x01, 0x26, /* movs r6, #1 */
- 0xc6, 0x60, /* str r6, [r0, #EFM32_MSC_WRITECMD_OFFSET] */
- 0xc6, 0x69, /* ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET] */
- 0x06, 0x27, /* movs r7, #6 */
- 0x3e, 0x42, /* tst r6, r7 */
- 0x16, 0xd1, /* bne error */
-
- /* wait_wdataready: */
- 0xc6, 0x69, /* ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET] */
- 0x08, 0x27, /* movs r7, #8 */
- 0x3e, 0x42, /* tst r6, r7 */
- 0xfb, 0xd0, /* beq wait_wdataready */
-
- 0x2e, 0x68, /* ldr r6, [r5] */
- 0x86, 0x61, /* str r6, [r0, #EFM32_MSC_WDATA_OFFSET] */
- 0x08, 0x26, /* movs r6, #8 */
- 0xc6, 0x60, /* str r6, [r0, #EFM32_MSC_WRITECMD_OFFSET] */
-
- 0x04, 0x35, /* adds r5, #4 */
- 0x04, 0x34, /* adds r4, #4 */
-
- /* busy: */
- 0xc6, 0x69, /* ldr r6, [r0, #EFM32_MSC_STATUS_OFFSET] */
- 0x01, 0x27, /* movs r7, #1 */
- 0x3e, 0x42, /* tst r6, r7 */
- 0xfb, 0xd1, /* bne busy */
-
- 0x9d, 0x42, /* cmp r5, r3 */
- 0x01, 0xd3, /* bcc no_wrap */
- 0x15, 0x46, /* mov r5, r2 */
- 0x08, 0x35, /* adds r5, #8 */
-
- /* no_wrap: */
- 0x55, 0x60, /* str r5, [r2, #4] */
- 0x01, 0x39, /* subs r1, r1, #1 */
- 0x00, 0x29, /* cmp r1, #0 */
- 0x02, 0xd0, /* beq exit */
- 0xdb, 0xe7, /* b wait_fifo */
-
- /* error: */
- 0x00, 0x20, /* movs r0, #0 */
- 0x50, 0x60, /* str r0, [r2, #4] */
-
- /* exit: */
- 0x30, 0x46, /* mov r0, r6 */
- 0x00, 0xbe, /* bkpt #0 */
-
- /* LOCKKEY */
- 0x71, 0x1b, 0x00, 0x00
- };
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(efm32x_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- ret = target_write_buffer(target, write_algorithm->address,
- sizeof(efm32x_flash_write_code), efm32x_flash_write_code);
- if (ret != ERROR_OK)
- return ret;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (word-32bit) */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer start */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[4], "r4", 32, PARAM_IN_OUT); /* target address */
-
- buf_set_u32(reg_params[0].value, 0, 32, EFM32_MSC_REGBASE);
- buf_set_u32(reg_params[1].value, 0, 32, count);
- buf_set_u32(reg_params[2].value, 0, 32, source->address);
- buf_set_u32(reg_params[3].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[4].value, 0, 32, address);
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- ret = target_run_flash_async_algorithm(target, buf, count, 4,
- 0, NULL,
- 5, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- if (ret == ERROR_FLASH_OPERATION_FAILED) {
- LOG_ERROR("flash write failed at address 0x%"PRIx32,
- buf_get_u32(reg_params[4].value, 0, 32));
-
- if (buf_get_u32(reg_params[0].value, 0, 32) &
- EFM32_MSC_STATUS_LOCKED_MASK) {
- LOG_ERROR("flash memory write protected");
- }
-
- if (buf_get_u32(reg_params[0].value, 0, 32) &
- EFM32_MSC_STATUS_INVADDR_MASK) {
- LOG_ERROR("invalid flash memory write address");
- }
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return ret;
-}
-
-static int efm32x_write_word(struct flash_bank *bank, uint32_t addr,
- uint32_t val)
-{
- /* this function DOES NOT set WREN; must be set already */
- /* 1. write address to ADDRB
- 2. write LADDRIM
- 3. check status (INVADDR, LOCKED)
- 4. wait for WDATAREADY
- 5. write data to WDATA
- 6. write WRITECMD_WRITEONCE to WRITECMD
- 7. wait until !STATUS_BUSY
- */
-
- /* FIXME: EFM32G ref states (7.3.2) that writes should be
- * performed twice per dword */
-
- int ret = 0;
- uint32_t status = 0;
-
- /* if not called, GDB errors will be reported during large writes */
- keep_alive();
-
- ret = target_write_u32(bank->target, EFM32_MSC_ADDRB, addr);
- if (ERROR_OK != ret)
- return ret;
-
- ret = efm32x_set_reg_bits(bank, EFM32_MSC_WRITECMD,
- EFM32_MSC_WRITECMD_LADDRIM_MASK, 1);
- if (ERROR_OK != ret)
- return ret;
-
- ret = target_read_u32(bank->target, EFM32_MSC_STATUS, &status);
- if (ERROR_OK != ret)
- return ret;
-
- LOG_DEBUG("status 0x%" PRIx32, status);
-
- if (status & EFM32_MSC_STATUS_LOCKED_MASK) {
- LOG_ERROR("Page is locked");
- return ERROR_FAIL;
- } else if (status & EFM32_MSC_STATUS_INVADDR_MASK) {
- LOG_ERROR("Invalid address 0x%" PRIx32, addr);
- return ERROR_FAIL;
- }
-
- ret = efm32x_wait_status(bank, EFM32_FLASH_WDATAREADY_TMO,
- EFM32_MSC_STATUS_WDATAREADY_MASK, 1);
- if (ERROR_OK != ret) {
- LOG_ERROR("Wait for WDATAREADY failed");
- return ret;
- }
-
- ret = target_write_u32(bank->target, EFM32_MSC_WDATA, val);
- if (ERROR_OK != ret) {
- LOG_ERROR("WDATA write failed");
- return ret;
- }
-
- ret = target_write_u32(bank->target, EFM32_MSC_WRITECMD,
- EFM32_MSC_WRITECMD_WRITEONCE_MASK);
- if (ERROR_OK != ret) {
- LOG_ERROR("WRITECMD write failed");
- return ret;
- }
-
- ret = efm32x_wait_status(bank, EFM32_FLASH_WRITE_TMO,
- EFM32_MSC_STATUS_BUSY_MASK, 0);
- if (ERROR_OK != ret) {
- LOG_ERROR("Wait for BUSY failed");
- return ret;
- }
-
- return ERROR_OK;
-}
-
-static int efm32x_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint8_t *new_buffer = NULL;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x3) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-byte "
- "alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- if (count & 0x3) {
- uint32_t old_count = count;
- count = (old_count | 3) + 1;
- new_buffer = malloc(count);
- if (new_buffer == NULL) {
- LOG_ERROR("odd number of bytes to write and no memory "
- "for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " "
- "and padding with 0xff", old_count, count);
- memset(new_buffer, 0xff, count);
- buffer = memcpy(new_buffer, buffer, old_count);
- }
-
- uint32_t words_remaining = count / 4;
- int retval, retval2;
-
- /* unlock flash registers */
- efm32x_msc_lock(bank, 0);
- retval = efm32x_set_wren(bank, 1);
- if (retval != ERROR_OK)
- goto cleanup;
-
- /* try using a block write */
- retval = efm32x_write_block(bank, buffer, offset, words_remaining);
-
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single word accesses */
- LOG_WARNING("couldn't use block writes, falling back to single "
- "memory accesses");
-
- while (words_remaining > 0) {
- uint32_t value;
- memcpy(&value, buffer, sizeof(uint32_t));
-
- retval = efm32x_write_word(bank, offset, value);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- words_remaining--;
- buffer += 4;
- offset += 4;
- }
- }
-
-reset_pg_and_lock:
- retval2 = efm32x_set_wren(bank, 0);
- efm32x_msc_lock(bank, 1);
- if (retval == ERROR_OK)
- retval = retval2;
-
-cleanup:
- if (new_buffer)
- free(new_buffer);
-
- return retval;
-}
-
-static int efm32x_probe(struct flash_bank *bank)
-{
- struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
- struct efm32_info efm32_mcu_info;
- int ret;
- int i;
- uint32_t base_address = 0x00000000;
- char buf[256];
-
- efm32x_info->probed = 0;
- memset(efm32x_info->lb_page, 0xff, LOCKBITS_PAGE_SZ);
-
- ret = efm32x_read_info(bank, &efm32_mcu_info);
- if (ERROR_OK != ret)
- return ret;
-
- ret = efm32x_decode_info(&efm32_mcu_info, buf, sizeof(buf));
- if (ERROR_OK != ret)
- return ret;
-
- LOG_INFO("detected part: %s", buf);
- LOG_INFO("flash size = %dkbytes", efm32_mcu_info.flash_sz_kib);
- LOG_INFO("flash page size = %dbytes", efm32_mcu_info.page_size);
-
- assert(0 != efm32_mcu_info.page_size);
-
- int num_pages = efm32_mcu_info.flash_sz_kib * 1024 /
- efm32_mcu_info.page_size;
-
- assert(num_pages > 0);
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->base = base_address;
- bank->size = (num_pages * efm32_mcu_info.page_size);
- bank->num_sectors = num_pages;
-
- ret = efm32x_read_lock_data(bank);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to read LB data");
- return ret;
- }
-
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
-
- for (i = 0; i < num_pages; i++) {
- bank->sectors[i].offset = i * efm32_mcu_info.page_size;
- bank->sectors[i].size = efm32_mcu_info.page_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- efm32x_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int efm32x_auto_probe(struct flash_bank *bank)
-{
- struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
- if (efm32x_info->probed)
- return ERROR_OK;
- return efm32x_probe(bank);
-}
-
-static int efm32x_protect_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- int ret = 0;
- int i = 0;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- ret = efm32x_read_lock_data(bank);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to read LB data");
- return ret;
- }
-
- assert(NULL != bank->sectors);
-
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_protected = efm32x_get_page_lock(bank, i);
-
- return ERROR_OK;
-}
-
-static int get_efm32x_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct efm32_info info;
- int ret = 0;
-
- ret = efm32x_read_info(bank, &info);
- if (ERROR_OK != ret) {
- LOG_ERROR("Failed to read EFM32 info");
- return ret;
- }
-
- return efm32x_decode_info(&info, buf, buf_size);
-}
-
-COMMAND_HANDLER(efm32x_handle_debuglock_command)
-{
- struct target *target = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- struct efm32x_flash_bank *efm32x_info = bank->driver_priv;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint32_t *ptr;
- ptr = efm32x_info->lb_page + 127;
- *ptr = 0;
-
- retval = efm32x_write_lock_data(bank);
- if (ERROR_OK != retval) {
- LOG_ERROR("Failed to write LB page");
- return retval;
- }
-
- command_print(CMD_CTX, "efm32x debug interface locked, reset the device to apply");
-
- return ERROR_OK;
-}
-
-static const struct command_registration efm32x_exec_command_handlers[] = {
- {
- .name = "debuglock",
- .handler = efm32x_handle_debuglock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Lock the debug interface of the device.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration efm32x_command_handlers[] = {
- {
- .name = "efm32",
- .mode = COMMAND_ANY,
- .help = "efm32 flash command group",
- .usage = "",
- .chain = efm32x_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver efm32_flash = {
- .name = "efm32",
- .commands = efm32x_command_handlers,
- .flash_bank_command = efm32x_flash_bank_command,
- .erase = efm32x_erase,
- .protect = efm32x_protect,
- .write = efm32x_write,
- .read = default_flash_read,
- .probe = efm32x_probe,
- .auto_probe = efm32x_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = efm32x_protect_check,
- .info = get_efm32x_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/em357.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/em357.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/em357.c
deleted file mode 100755
index 6cc922c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/em357.c
+++ /dev/null
@@ -1,941 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- *
- * Copyright (C) 2011 by Erik Bot�
- * erik.boto@pelagicore.com
- *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-/* em357 register locations */
-
-#define EM357_FLASH_ACR 0x40008000
-#define EM357_FLASH_KEYR 0x40008004
-#define EM357_FLASH_OPTKEYR 0x40008008
-#define EM357_FLASH_SR 0x4000800C
-#define EM357_FLASH_CR 0x40008010
-#define EM357_FLASH_AR 0x40008014
-#define EM357_FLASH_OBR 0x4000801C
-#define EM357_FLASH_WRPR 0x40008020
-
-#define EM357_FPEC_CLK 0x4000402c
-/* option byte location */
-
-#define EM357_OB_RDP 0x08040800
-#define EM357_OB_WRP0 0x08040808
-#define EM357_OB_WRP1 0x0804080A
-#define EM357_OB_WRP2 0x0804080C
-
-/* FLASH_CR register bits */
-
-#define FLASH_PG (1 << 0)
-#define FLASH_PER (1 << 1)
-#define FLASH_MER (1 << 2)
-#define FLASH_OPTPG (1 << 4)
-#define FLASH_OPTER (1 << 5)
-#define FLASH_STRT (1 << 6)
-#define FLASH_LOCK (1 << 7)
-#define FLASH_OPTWRE (1 << 9)
-
-/* FLASH_SR register bits */
-
-#define FLASH_BSY (1 << 0)
-#define FLASH_PGERR (1 << 2)
-#define FLASH_WRPRTERR (1 << 4)
-#define FLASH_EOP (1 << 5)
-
-/* EM357_FLASH_OBR bit definitions (reading) */
-
-#define OPT_ERROR 0
-#define OPT_READOUT 1
-
-/* register unlock keys */
-
-#define KEY1 0x45670123
-#define KEY2 0xCDEF89AB
-
-struct em357_options {
- uint16_t RDP;
- uint16_t user_options;
- uint16_t protection[3];
-};
-
-struct em357_flash_bank {
- struct em357_options option_bytes;
- int ppage_size;
- int probed;
-};
-
-static int em357_mass_erase(struct flash_bank *bank);
-
-/* flash bank em357 <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(em357_flash_bank_command)
-{
- struct em357_flash_bank *em357_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- em357_info = malloc(sizeof(struct em357_flash_bank));
- bank->driver_priv = em357_info;
-
- em357_info->probed = 0;
-
- return ERROR_OK;
-}
-
-static inline int em357_get_flash_status(struct flash_bank *bank, uint32_t *status)
-{
- struct target *target = bank->target;
- return target_read_u32(target, EM357_FLASH_SR, status);
-}
-
-static int em357_wait_status_busy(struct flash_bank *bank, int timeout)
-{
- struct target *target = bank->target;
- uint32_t status;
- int retval = ERROR_OK;
-
- /* wait for busy to clear */
- for (;; ) {
- retval = em357_get_flash_status(bank, &status);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
- if ((status & FLASH_BSY) == 0)
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
-
- if (status & FLASH_WRPRTERR) {
- LOG_ERROR("em357 device protected");
- retval = ERROR_FAIL;
- }
-
- if (status & FLASH_PGERR) {
- LOG_ERROR("em357 device programming failed");
- retval = ERROR_FAIL;
- }
-
- /* Clear but report errors */
- if (status & (FLASH_WRPRTERR | FLASH_PGERR)) {
- /* If this operation fails, we ignore it and report the original
- * retval
- */
- target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR);
- }
- return retval;
-}
-
-static int em357_read_options(struct flash_bank *bank)
-{
- uint32_t optiondata;
- struct em357_flash_bank *em357_info = NULL;
- struct target *target = bank->target;
-
- em357_info = bank->driver_priv;
-
- /* read current option bytes */
- int retval = target_read_u32(target, EM357_FLASH_OBR, &optiondata);
- if (retval != ERROR_OK)
- return retval;
-
- em357_info->option_bytes.user_options = (uint16_t)0xFFFC | ((optiondata >> 2) & 0x03);
- em357_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5;
-
- if (optiondata & (1 << OPT_READOUT))
- LOG_INFO("Device Security Bit Set");
-
- /* each bit refers to a 4bank protection */
- retval = target_read_u32(target, EM357_FLASH_WRPR, &optiondata);
- if (retval != ERROR_OK)
- return retval;
-
- em357_info->option_bytes.protection[0] = (uint16_t)optiondata;
- em357_info->option_bytes.protection[1] = (uint16_t)(optiondata >> 8);
- em357_info->option_bytes.protection[2] = (uint16_t)(optiondata >> 16);
-
- return ERROR_OK;
-}
-
-static int em357_erase_options(struct flash_bank *bank)
-{
- struct em357_flash_bank *em357_info = NULL;
- struct target *target = bank->target;
-
- em357_info = bank->driver_priv;
-
- /* read current options */
- em357_read_options(bank);
-
- /* unlock flash registers */
- int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* unlock option flash registers */
- retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* erase option bytes */
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* clear readout protection and complementary option bytes
- * this will also force a device unlock if set */
- em357_info->option_bytes.RDP = 0x5AA5;
-
- return ERROR_OK;
-}
-
-static int em357_write_options(struct flash_bank *bank)
-{
- struct em357_flash_bank *em357_info = NULL;
- struct target *target = bank->target;
-
- em357_info = bank->driver_priv;
-
- /* unlock flash registers */
- int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* unlock option flash registers */
- retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_OPTKEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* program option bytes */
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write protection byte 1 */
- retval = target_write_u16(target, EM357_OB_WRP0, em357_info->option_bytes.protection[0]);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write protection byte 2 */
- retval = target_write_u16(target, EM357_OB_WRP1, em357_info->option_bytes.protection[1]);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write protection byte 3 */
- retval = target_write_u16(target, EM357_OB_WRP2, em357_info->option_bytes.protection[2]);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- /* write readout protection bit */
- retval = target_write_u16(target, EM357_OB_RDP, em357_info->option_bytes.RDP);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 10);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int em357_protect_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct em357_flash_bank *em357_info = bank->driver_priv;
-
- uint32_t protection;
- int i, s;
- int num_bits;
- int set;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* each bit refers to a 4bank protection (bit 0-23) */
- int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
- if (retval != ERROR_OK)
- return retval;
-
- /* each protection bit is for 4 * 2K pages */
- num_bits = (bank->num_sectors / em357_info->ppage_size);
-
- for (i = 0; i < num_bits; i++) {
- set = 1;
- if (protection & (1 << i))
- set = 0;
-
- for (s = 0; s < em357_info->ppage_size; s++)
- bank->sectors[(i * em357_info->ppage_size) + s].is_protected = set;
- }
-
- return ERROR_OK;
-}
-
-static int em357_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- int i;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first == 0) && (last == (bank->num_sectors - 1)))
- return em357_mass_erase(bank);
-
- /* Enable FPEC clock */
- target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
-
- /* unlock flash registers */
- int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- for (i = first; i <= last; i++) {
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_AR,
- bank->base + bank->sectors[i].offset);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PER | FLASH_STRT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 100);
- if (retval != ERROR_OK)
- return retval;
-
- bank->sectors[i].is_erased = 1;
- }
-
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int em357_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct em357_flash_bank *em357_info = NULL;
- struct target *target = bank->target;
- uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
- int i, reg, bit;
- int status;
- uint32_t protection;
-
- em357_info = bank->driver_priv;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first % em357_info->ppage_size) != 0) {
- LOG_WARNING("aligned start protect sector to a %d sector boundary",
- em357_info->ppage_size);
- first = first - (first % em357_info->ppage_size);
- }
- if (((last + 1) % em357_info->ppage_size) != 0) {
- LOG_WARNING("aligned end protect sector to a %d sector boundary",
- em357_info->ppage_size);
- last++;
- last = last - (last % em357_info->ppage_size);
- last--;
- }
-
- /* each bit refers to a 4bank protection */
- int retval = target_read_u32(target, EM357_FLASH_WRPR, &protection);
- if (retval != ERROR_OK)
- return retval;
-
- prot_reg[0] = (uint16_t)protection;
- prot_reg[1] = (uint16_t)(protection >> 8);
- prot_reg[2] = (uint16_t)(protection >> 16);
-
- for (i = first; i <= last; i++) {
- reg = (i / em357_info->ppage_size) / 8;
- bit = (i / em357_info->ppage_size) - (reg * 8);
-
- LOG_WARNING("reg, bit: %d, %d", reg, bit);
- if (set)
- prot_reg[reg] &= ~(1 << bit);
- else
- prot_reg[reg] |= (1 << bit);
- }
-
- status = em357_erase_options(bank);
- if (retval != ERROR_OK)
- return status;
-
- em357_info->option_bytes.protection[0] = prot_reg[0];
- em357_info->option_bytes.protection[1] = prot_reg[1];
- em357_info->option_bytes.protection[2] = prot_reg[2];
-
- return em357_write_options(bank);
-}
-
-static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[4];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* see contib/loaders/flash/stm32x.s for src, the same is used here except for
- * a modified *_FLASH_BASE */
-
- static const uint8_t em357_flash_write_code[] = {
- /* #define EM357_FLASH_CR_OFFSET 0x10
- * #define EM357_FLASH_SR_OFFSET 0x0C
- * write: */
- 0x08, 0x4c, /* ldr r4, EM357_FLASH_BASE */
- 0x1c, 0x44, /* add r4, r3 */
- /* write_half_word: */
- 0x01, 0x23, /* movs r3, #0x01 */
- 0x23, 0x61, /* str r3, [r4,
- *#EM357_FLASH_CR_OFFSET] */
- 0x30, 0xf8, 0x02, 0x3b, /* ldrh r3, [r0], #0x02 */
- 0x21, 0xf8, 0x02, 0x3b, /* strh r3, [r1], #0x02 */
- /* busy: */
- 0xe3, 0x68, /* ldr r3, [r4,
- *#EM357_FLASH_SR_OFFSET] */
- 0x13, 0xf0, 0x01, 0x0f, /* tst r3, #0x01 */
- 0xfb, 0xd0, /* beq busy */
- 0x13, 0xf0, 0x14, 0x0f, /* tst r3, #0x14 */
- 0x01, 0xd1, /* bne exit */
- 0x01, 0x3a, /* subs r2, r2, #0x01 */
- 0xf0, 0xd1, /* bne write_half_word */
- /* exit: */
- 0x00, 0xbe, /* bkpt #0x00 */
- 0x00, 0x80, 0x00, 0x40, /* EM357_FLASH_BASE: .word 0x40008000 */
- };
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(em357_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(em357_flash_write_code), em357_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING(
- "no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT);
-
- while (count > 0) {
- uint32_t thisrun_count = (count > (buffer_size / 2)) ?
- (buffer_size / 2) : count;
-
- retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer);
- if (retval != ERROR_OK)
- break;
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
- buf_set_u32(reg_params[3].value, 0, 32, 0);
-
- retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
- write_algorithm->address, 0, 10000, &armv7m_info);
- if (retval != ERROR_OK) {
- LOG_ERROR("error executing em357 flash write algorithm");
- break;
- }
-
- if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_PGERR) {
- LOG_ERROR("flash memory not erased before writing");
- /* Clear but report errors */
- target_write_u32(target, EM357_FLASH_SR, FLASH_PGERR);
- retval = ERROR_FAIL;
- break;
- }
-
- if (buf_get_u32(reg_params[3].value, 0, 32) & FLASH_WRPRTERR) {
- LOG_ERROR("flash memory write protected");
- /* Clear but report errors */
- target_write_u32(target, EM357_FLASH_SR, FLASH_WRPRTERR);
- retval = ERROR_FAIL;
- break;
- }
-
- buffer += thisrun_count * 2;
- address += thisrun_count * 2;
- count -= thisrun_count;
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
-
- return retval;
-}
-
-static int em357_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t words_remaining = (count / 2);
- uint32_t bytes_remaining = (count & 0x00000001);
- uint32_t address = bank->base + offset;
- uint32_t bytes_written = 0;
- int retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x1) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* unlock flash registers */
- retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
-
- /* multiple half words (2-byte) to be programmed? */
- if (words_remaining > 0) {
- /* try using a block write */
- retval = em357_write_block(bank, buffer, offset, words_remaining);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single dword accesses */
- LOG_WARNING(
- "couldn't use block writes, falling back to single memory accesses");
- }
- } else {
- buffer += words_remaining * 2;
- address += words_remaining * 2;
- words_remaining = 0;
- }
- }
-
- if ((retval != ERROR_OK) && (retval != ERROR_TARGET_RESOURCE_NOT_AVAILABLE))
- return retval;
-
- while (words_remaining > 0) {
- uint16_t value;
- memcpy(&value, buffer + bytes_written, sizeof(uint16_t));
-
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u16(target, address, value);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 5);
- if (retval != ERROR_OK)
- return retval;
-
- bytes_written += 2;
- words_remaining--;
- address += 2;
- }
-
- if (bytes_remaining) {
- uint16_t value = 0xffff;
- memcpy(&value, buffer + bytes_written, bytes_remaining);
-
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_PG);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u16(target, address, value);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 5);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
-}
-
-static int em357_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct em357_flash_bank *em357_info = bank->driver_priv;
- int i;
- uint16_t num_pages;
- int page_size;
- uint32_t base_address = 0x08000000;
-
- em357_info->probed = 0;
-
- switch (bank->size) {
- case 0x10000:
- /* 64k -- 64 1k pages */
- num_pages = 64;
- page_size = 1024;
- break;
- case 0x20000:
- /* 128k -- 128 1k pages */
- num_pages = 128;
- page_size = 1024;
- break;
- case 0x30000:
- /* 192k -- 96 2k pages */
- num_pages = 96;
- page_size = 2048;
- break;
- case 0x40000:
- /* 256k -- 128 2k pages */
- num_pages = 128;
- page_size = 2048;
- break;
- default:
- LOG_WARNING("No size specified for em357 flash driver, assuming 192k!");
- num_pages = 96;
- page_size = 2048;
- break;
- }
-
- /* Enable FPEC CLK */
- int retval = target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
- if (retval != ERROR_OK)
- return retval;
-
- em357_info->ppage_size = 4;
-
- LOG_INFO("flash size = %dkbytes", num_pages*page_size/1024);
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->base = base_address;
- bank->size = (num_pages * page_size);
- bank->num_sectors = num_pages;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
-
- for (i = 0; i < num_pages; i++) {
- bank->sectors[i].offset = i * page_size;
- bank->sectors[i].size = page_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- em357_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int em357_auto_probe(struct flash_bank *bank)
-{
- struct em357_flash_bank *em357_info = bank->driver_priv;
- if (em357_info->probed)
- return ERROR_OK;
- return em357_probe(bank);
-}
-
-COMMAND_HANDLER(em357_handle_lock_command)
-{
- struct target *target = NULL;
- struct em357_flash_bank *em357_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- em357_info = bank->driver_priv;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (em357_erase_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "em357 failed to erase options");
- return ERROR_OK;
- }
-
- /* set readout protection */
- em357_info->option_bytes.RDP = 0;
-
- if (em357_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "em357 failed to lock device");
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "em357 locked");
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(em357_handle_unlock_command)
-{
- struct target *target = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (em357_erase_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "em357 failed to unlock device");
- return ERROR_OK;
- }
-
- if (em357_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "em357 failed to lock device");
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "em357 unlocked.\n"
- "INFO: a reset or power cycle is required "
- "for the new settings to take effect.");
-
- return ERROR_OK;
-}
-
-static int em357_mass_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Make sure the flash clock is on */
- target_write_u32(target, EM357_FPEC_CLK, 0x00000001);
-
- /* unlock option flash registers */
- int retval = target_write_u32(target, EM357_FLASH_KEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_KEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* mass erase flash memory */
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_MER | FLASH_STRT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = em357_wait_status_busy(bank, 100);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, EM357_FLASH_CR, FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(em357_handle_mass_erase_command)
-{
- int i;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = em357_mass_erase(bank);
- if (retval == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "em357 mass erase complete");
- } else
- command_print(CMD_CTX, "em357 mass erase failed");
-
- return retval;
-}
-
-static const struct command_registration em357_exec_command_handlers[] = {
- {
- .name = "lock",
- .usage = "<bank>",
- .handler = em357_handle_lock_command,
- .mode = COMMAND_EXEC,
- .help = "Lock entire flash device.",
- },
- {
- .name = "unlock",
- .usage = "<bank>",
- .handler = em357_handle_unlock_command,
- .mode = COMMAND_EXEC,
- .help = "Unlock entire protected flash device.",
- },
- {
- .name = "mass_erase",
- .usage = "<bank>",
- .handler = em357_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .help = "Erase entire flash device.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration em357_command_handlers[] = {
- {
- .name = "em357",
- .mode = COMMAND_ANY,
- .help = "em357 flash command group",
- .usage = "",
- .chain = em357_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver em357_flash = {
- .name = "em357",
- .commands = em357_command_handlers,
- .flash_bank_command = em357_flash_bank_command,
- .erase = em357_erase,
- .protect = em357_protect,
- .write = em357_write,
- .read = default_flash_read,
- .probe = em357_probe,
- .auto_probe = em357_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = em357_protect_check,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/faux.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/faux.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/faux.c
deleted file mode 100755
index 8198ef5..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/faux.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <target/image.h>
-#include "hello.h"
-
-struct faux_flash_bank {
- struct target *target;
- uint8_t *memory;
- uint32_t start_address;
-};
-
-static const int sectorSize = 0x10000;
-
-
-/* flash bank faux <base> <size> <chip_width> <bus_width> <target#> <driverPath>
- */
-FLASH_BANK_COMMAND_HANDLER(faux_flash_bank_command)
-{
- struct faux_flash_bank *info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- info = malloc(sizeof(struct faux_flash_bank));
- if (info == NULL) {
- LOG_ERROR("no memory for flash bank info");
- return ERROR_FAIL;
- }
- info->memory = malloc(bank->size);
- if (info->memory == NULL) {
- free(info);
- LOG_ERROR("no memory for flash bank info");
- return ERROR_FAIL;
- }
- bank->driver_priv = info;
-
- /* Use 0x10000 as a fixed sector size. */
- int i = 0;
- uint32_t offset = 0;
- bank->num_sectors = bank->size/sectorSize;
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- for (i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = sectorSize;
- offset += bank->sectors[i].size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 0;
- }
-
- info->target = get_target(CMD_ARGV[5]);
- if (info->target == NULL) {
- LOG_ERROR("target '%s' not defined", CMD_ARGV[5]);
- free(info->memory);
- free(info);
- return ERROR_FAIL;
- }
- return ERROR_OK;
-}
-
-static int faux_erase(struct flash_bank *bank, int first, int last)
-{
- struct faux_flash_bank *info = bank->driver_priv;
- memset(info->memory + first*sectorSize, 0xff, sectorSize*(last-first + 1));
- return ERROR_OK;
-}
-
-static int faux_protect(struct flash_bank *bank, int set, int first, int last)
-{
- LOG_USER("set protection sector %d to %d to %s", first, last, set ? "on" : "off");
- return ERROR_OK;
-}
-
-static int faux_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct faux_flash_bank *info = bank->driver_priv;
- memcpy(info->memory + offset, buffer, count);
- return ERROR_OK;
-}
-
-static int faux_protect_check(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-static int faux_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- snprintf(buf, buf_size, "faux flash driver");
- return ERROR_OK;
-}
-
-static int faux_probe(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-static const struct command_registration faux_command_handlers[] = {
- {
- .name = "faux",
- .mode = COMMAND_ANY,
- .help = "faux flash command group",
- .chain = hello_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver faux_flash = {
- .name = "faux",
- .commands = faux_command_handlers,
- .flash_bank_command = faux_flash_bank_command,
- .erase = faux_erase,
- .protect = faux_protect,
- .write = faux_write,
- .read = default_flash_read,
- .probe = faux_probe,
- .auto_probe = faux_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = faux_protect_check,
- .info = faux_info
-};
[18/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ocl.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ocl.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ocl.c
deleted file mode 100755
index c547d9a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ocl.c
+++ /dev/null
@@ -1,345 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "ocl.h"
-#include <target/embeddedice.h>
-
-struct ocl_priv {
- struct arm_jtag *jtag_info;
- unsigned int buflen;
- unsigned int bufalign;
-};
-
-static int ocl_erase_check(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-static int ocl_protect_check(struct flash_bank *bank)
-{
- return ERROR_OK;
-}
-
-/* flash_bank ocl 0 0 0 0 <target#> */
-FLASH_BANK_COMMAND_HANDLER(ocl_flash_bank_command)
-{
- struct arm7_9_common *arm7_9;
- struct ocl_priv *ocl;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- arm7_9 = target_to_arm7_9(bank->target);
- if (!is_arm7_9(arm7_9))
- return ERROR_TARGET_INVALID;
-
- ocl = bank->driver_priv = malloc(sizeof(struct ocl_priv));
- ocl->jtag_info = &arm7_9->jtag_info;
- ocl->buflen = 0;
- ocl->bufalign = 1;
-
- return ERROR_OK;
-}
-
-static int ocl_erase(struct flash_bank *bank, int first, int last)
-{
- struct ocl_priv *ocl = bank->driver_priv;
- int retval;
- uint32_t dcc_buffer[3];
-
- /* check preconditions */
- if (bank->num_sectors == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (bank->target->state != TARGET_RUNNING) {
- LOG_ERROR("target has to be running to communicate with the loader");
- return ERROR_TARGET_NOT_RUNNING;
- }
-
- if ((first == 0) && (last == bank->num_sectors - 1)) {
- dcc_buffer[0] = OCL_ERASE_ALL;
- retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 1);
- if (retval != ERROR_OK)
- return retval;
- } else {
- dcc_buffer[0] = OCL_ERASE_BLOCK;
- dcc_buffer[1] = first;
- dcc_buffer[2] = last;
- retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 3);
- if (retval != ERROR_OK)
- return retval;
- }
-
- /* wait for response, fixed timeout of 1 s */
- retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000);
- if (retval != ERROR_OK)
- return retval;
-
- /* receive response */
- retval = embeddedice_receive(ocl->jtag_info, dcc_buffer + 1, 1);
- if (retval != ERROR_OK)
- return retval;
-
- if (dcc_buffer[1] != OCL_CMD_DONE) {
- if (dcc_buffer[0] == OCL_ERASE_ALL)
- LOG_ERROR("loader response to OCL_ERASE_ALL 0x%08" PRIx32 "", dcc_buffer[1]);
- else
- LOG_ERROR("loader response to OCL_ERASE_BLOCK 0x%08" PRIx32 "", dcc_buffer[1]);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int ocl_protect(struct flash_bank *bank, int set, int first, int last)
-{
- return ERROR_OK;
-}
-
-static int ocl_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct ocl_priv *ocl = bank->driver_priv;
- int retval;
- uint32_t *dcc_buffer;
- uint32_t *dcc_bufptr;
- int byteofs;
- int runlen;
- uint32_t chksum;
-
- int i;
-
- /* check preconditions */
- if (ocl->buflen == 0 || ocl->bufalign == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (bank->target->state != TARGET_RUNNING) {
- LOG_ERROR("target has to be running to communicate with the loader");
- return ERROR_TARGET_NOT_RUNNING;
- }
-
- /* allocate buffer for max. ocl buffer + overhead */
- dcc_buffer = malloc(sizeof(uint32_t)*(ocl->buflen/4 + 3));
-
- while (count) {
- if (count + (offset % ocl->bufalign) > ocl->buflen)
- runlen = ocl->buflen - (offset % ocl->bufalign);
- else
- runlen = count;
-
- dcc_buffer[0] = OCL_FLASH_BLOCK | runlen;
- dcc_buffer[1] = offset;
- dcc_bufptr = &dcc_buffer[2];
-
- *dcc_bufptr = 0xffffffff;
- byteofs = (offset % ocl->bufalign) % 4;
- chksum = OCL_CHKS_INIT;
-
- /* copy data to DCC buffer in proper byte order and properly aligned */
- for (i = 0; i < runlen; i++) {
- switch (byteofs++) {
- case 0:
- *dcc_bufptr &= *(buffer++) | 0xffffff00;
- break;
- case 1:
- *dcc_bufptr &= ((*(buffer++)) << 8) | 0xffff00ff;
- break;
- case 2:
- *dcc_bufptr &= ((*(buffer++)) << 16) | 0xff00ffff;
- break;
- case 3:
- *dcc_bufptr &= ((*(buffer++)) << 24) | 0x00ffffff;
- chksum ^= *(dcc_bufptr++);
- *dcc_bufptr = 0xffffffff;
- byteofs = 0;
- break;
- }
- }
-
- /* add the remaining word to checksum */
- if (byteofs)
- chksum ^= *(dcc_bufptr++);
-
- *(dcc_bufptr++) = chksum;
-
- /* send the data */
- retval = embeddedice_send(ocl->jtag_info, dcc_buffer, dcc_bufptr-dcc_buffer);
- if (retval != ERROR_OK) {
- free(dcc_buffer);
- return retval;
- }
-
- /* wait for response, fixed timeout of 1 s */
- retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000);
- if (retval != ERROR_OK) {
- free(dcc_buffer);
- return retval;
- }
-
- /* receive response */
- retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
- if (retval != ERROR_OK) {
- free(dcc_buffer);
- return retval;
- }
-
- if (dcc_buffer[0] != OCL_CMD_DONE) {
- LOG_ERROR("loader response to OCL_FLASH_BLOCK 0x%08" PRIx32 "", dcc_buffer[0]);
- free(dcc_buffer);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- count -= runlen;
- offset += runlen;
- }
-
- free(dcc_buffer);
- return ERROR_OK;
-}
-
-static int ocl_probe(struct flash_bank *bank)
-{
- struct ocl_priv *ocl = bank->driver_priv;
- int retval;
- uint32_t dcc_buffer[1];
- int sectsize;
- int i;
-
- /* purge pending data in DCC */
- embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
-
- dcc_buffer[0] = OCL_PROBE;
- retval = embeddedice_send(ocl->jtag_info, dcc_buffer, 1);
- if (retval != ERROR_OK)
- return retval;
-
- /* wait for response, fixed timeout of 1 s */
- retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 1000);
- if (retval != ERROR_OK)
- return retval;
-
- /* receive response */
- retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
- if (retval != ERROR_OK)
- return retval;
-
- if (dcc_buffer[0] != OCL_CMD_DONE) {
- LOG_ERROR("loader response to OCL_PROBE 0x%08" PRIx32 "", dcc_buffer[0]);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* receive and fill in parameters, detection of loader is important, receive it one by one */
- retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0);
- if (retval != ERROR_OK)
- return retval;
- retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
- if (retval != ERROR_OK)
- return retval;
- bank->base = dcc_buffer[0];
-
- retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0);
- if (retval != ERROR_OK)
- return retval;
- retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
- if (retval != ERROR_OK)
- return retval;
- bank->size = dcc_buffer[0];
-
- retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0);
- if (retval != ERROR_OK)
- return retval;
- retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
- if (retval != ERROR_OK)
- return retval;
- bank->num_sectors = dcc_buffer[0];
-
- retval = embeddedice_handshake(ocl->jtag_info, EICE_COMM_CTRL_WBIT, 0);
- if (retval != ERROR_OK)
- return retval;
- retval = embeddedice_receive(ocl->jtag_info, dcc_buffer, 1);
- if (retval != ERROR_OK)
- return retval;
- ocl->buflen = dcc_buffer[0] & 0xffff;
- ocl->bufalign = dcc_buffer[0] >> 16;
-
- bank->sectors = realloc(bank->sectors, sizeof(struct flash_sector)*bank->num_sectors);
- if (bank->num_sectors == 0) {
- LOG_ERROR("number of sectors shall be non zero value");
- return ERROR_FLASH_BANK_INVALID;
- }
- if (bank->size % bank->num_sectors) {
- LOG_ERROR("bank size not divisible by number of sectors");
- return ERROR_FLASH_BANK_INVALID;
- }
- sectsize = bank->size / bank->num_sectors;
- for (i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = i * sectsize;
- bank->sectors[i].size = sectsize;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- if (ocl->bufalign == 0)
- ocl->bufalign = 1;
-
- if (ocl->buflen == 0) {
- LOG_ERROR("buflen shall be non zero value");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- if ((ocl->bufalign > ocl->buflen) || (ocl->buflen % ocl->bufalign)) {
- LOG_ERROR("buflen is not multiple of bufalign");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- if (ocl->buflen % 4) {
- LOG_ERROR("buflen shall be divisible by 4");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- return ERROR_OK;
-}
-
-static int ocl_auto_probe(struct flash_bank *bank)
-{
- struct ocl_priv *ocl = bank->driver_priv;
-
- if (ocl->buflen == 0 || ocl->bufalign == 0)
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- return ERROR_OK;
-}
-
-struct flash_driver ocl_flash = {
- .name = "ocl",
- .flash_bank_command = ocl_flash_bank_command,
- .erase = ocl_erase,
- .protect = ocl_protect,
- .write = ocl_write,
- .read = default_flash_read,
- .probe = ocl_probe,
- .erase_check = ocl_erase_check,
- .protect_check = ocl_protect_check,
- .auto_probe = ocl_auto_probe,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ocl.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ocl.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ocl.h
deleted file mode 100755
index d056b46..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/ocl.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007 by Pavel Chromy *
- * chromy@asix.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef OCL_H
-#define OCL_H
-
-/* command/response mask */
-#define OCL_CMD_MASK 0xFFFF0000L
-
-/* commads */
-#define OCL_FLASH_BLOCK 0x0CFB0000L
-#define OCL_ERASE_BLOCK 0x0CEB0000L
-#define OCL_ERASE_ALL 0x0CEA0000L
-#define OCL_PROBE 0x0CBE0000L
-
-/* responses */
-#define OCL_CMD_DONE 0x0ACD0000L
-#define OCL_CMD_ERR 0x0ACE0000L
-#define OCL_CHKS_FAIL 0x0ACF0000L
-#define OCL_BUFF_OVER 0x0AB00000L
-
-#define OCL_CHKS_INIT 0xC100CD0CL
-
-#endif /* OCL_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/pic32mx.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/pic32mx.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/pic32mx.c
deleted file mode 100755
index ce5bffb..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/pic32mx.c
+++ /dev/null
@@ -1,936 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2008 by John McCarthy *
- * jgmcc@magma.ca *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include <jtag/jtag.h>
-#include "imp.h"
-#include <target/algorithm.h>
-#include <target/mips32.h>
-#include <target/mips_m4k.h>
-
-#define PIC32MX_MANUF_ID 0x029
-
-/* pic32mx memory locations */
-
-#define PIC32MX_PHYS_RAM 0x00000000
-#define PIC32MX_PHYS_PGM_FLASH 0x1D000000
-#define PIC32MX_PHYS_PERIPHERALS 0x1F800000
-#define PIC32MX_PHYS_BOOT_FLASH 0x1FC00000
-
-/*
- * Translate Virtual and Physical addresses.
- * Note: These macros only work for KSEG0/KSEG1 addresses.
- */
-
-#define Virt2Phys(v) ((v) & 0x1FFFFFFF)
-
-/* pic32mx configuration register locations */
-
-#define PIC32MX_DEVCFG0_1_2 0xBFC00BFC
-#define PIC32MX_DEVCFG0 0xBFC02FFC
-#define PIC32MX_DEVCFG1 0xBFC02FF8
-#define PIC32MX_DEVCFG2 0xBFC02FF4
-#define PIC32MX_DEVCFG3 0xBFC02FF0
-#define PIC32MX_DEVID 0xBF80F220
-
-#define PIC32MX_BMXPFMSZ 0xBF882060
-#define PIC32MX_BMXBOOTSZ 0xBF882070
-#define PIC32MX_BMXDRMSZ 0xBF882040
-
-/* pic32mx flash controller register locations */
-
-#define PIC32MX_NVMCON 0xBF80F400
-#define PIC32MX_NVMCONCLR 0xBF80F404
-#define PIC32MX_NVMCONSET 0xBF80F408
-#define PIC32MX_NVMCONINV 0xBF80F40C
-#define NVMCON_NVMWR (1 << 15)
-#define NVMCON_NVMWREN (1 << 14)
-#define NVMCON_NVMERR (1 << 13)
-#define NVMCON_LVDERR (1 << 12)
-#define NVMCON_LVDSTAT (1 << 11)
-#define NVMCON_OP_PFM_ERASE 0x5
-#define NVMCON_OP_PAGE_ERASE 0x4
-#define NVMCON_OP_ROW_PROG 0x3
-#define NVMCON_OP_WORD_PROG 0x1
-#define NVMCON_OP_NOP 0x0
-
-#define PIC32MX_NVMKEY 0xBF80F410
-#define PIC32MX_NVMADDR 0xBF80F420
-#define PIC32MX_NVMADDRCLR 0xBF80F424
-#define PIC32MX_NVMADDRSET 0xBF80F428
-#define PIC32MX_NVMADDRINV 0xBF80F42C
-#define PIC32MX_NVMDATA 0xBF80F430
-#define PIC32MX_NVMSRCADDR 0xBF80F440
-
-/* flash unlock keys */
-
-#define NVMKEY1 0xAA996655
-#define NVMKEY2 0x556699AA
-
-#define MX_1_2 1 /* PIC32mx1xx/2xx */
-
-struct pic32mx_flash_bank {
- int probed;
- int dev_type; /* Default 0. 1 for Pic32MX1XX/2XX variant */
-};
-
-/*
- * DEVID values as per PIC32MX Flash Programming Specification Rev J
- */
-
-static const struct pic32mx_devs_s {
- uint32_t devid;
- const char *name;
-} pic32mx_devs[] = {
- {0x04A07053, "110F016B"},
- {0x04A09053, "110F016C"},
- {0x04A0B053, "110F016D"},
- {0x04A06053, "120F032B"},
- {0x04A08053, "120F032C"},
- {0x04A0A053, "120F032D"},
- {0x04D07053, "130F064B"},
- {0x04D09053, "130F064C"},
- {0x04D0B053, "130F064D"},
- {0x04D06053, "150F128B"},
- {0x04D08053, "150F128C"},
- {0x04D0A053, "150F128D"},
- {0x04A01053, "210F016B"},
- {0x04A03053, "210F016C"},
- {0x04A05053, "210F016D"},
- {0x04A00053, "220F032B"},
- {0x04A02053, "220F032C"},
- {0x04A04053, "220F032D"},
- {0x04D01053, "230F064B"},
- {0x04D03053, "230F064C"},
- {0x04D05053, "230F064D"},
- {0x04D00053, "250F128B"},
- {0x04D02053, "250F128C"},
- {0x04D04053, "250F128D"},
- {0x00938053, "360F512L"},
- {0x00934053, "360F256L"},
- {0x0092D053, "340F128L"},
- {0x0092A053, "320F128L"},
- {0x00916053, "340F512H"},
- {0x00912053, "340F256H"},
- {0x0090D053, "340F128H"},
- {0x0090A053, "320F128H"},
- {0x00906053, "320F064H"},
- {0x00902053, "320F032H"},
- {0x00978053, "460F512L"},
- {0x00974053, "460F256L"},
- {0x0096D053, "440F128L"},
- {0x00952053, "440F256H"},
- {0x00956053, "440F512H"},
- {0x0094D053, "440F128H"},
- {0x00942053, "420F032H"},
- {0x04307053, "795F512L"},
- {0x0430E053, "795F512H"},
- {0x04306053, "775F512L"},
- {0x0430D053, "775F512H"},
- {0x04312053, "775F256L"},
- {0x04303053, "775F256H"},
- {0x04417053, "764F128L"},
- {0x0440B053, "764F128H"},
- {0x04341053, "695F512L"},
- {0x04325053, "695F512H"},
- {0x04311053, "675F512L"},
- {0x0430C053, "675F512H"},
- {0x04305053, "675F256L"},
- {0x0430B053, "675F256H"},
- {0x04413053, "664F128L"},
- {0x04407053, "664F128H"},
- {0x04411053, "664F064L"},
- {0x04405053, "664F064H"},
- {0x0430F053, "575F512L"},
- {0x04309053, "575F512H"},
- {0x04333053, "575F256L"},
- {0x04317053, "575F256H"},
- {0x0440F053, "564F128L"},
- {0x04403053, "564F128H"},
- {0x0440D053, "564F064L"},
- {0x04401053, "564F064H"},
- {0x04400053, "534F064H"},
- {0x0440C053, "534F064L"},
- {0x00000000, NULL}
-};
-
-/* flash bank pic32mx <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
-{
- struct pic32mx_flash_bank *pic32mx_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank));
- bank->driver_priv = pic32mx_info;
-
- pic32mx_info->probed = 0;
- pic32mx_info->dev_type = 0;
-
- return ERROR_OK;
-}
-
-static uint32_t pic32mx_get_flash_status(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- uint32_t status;
-
- target_read_u32(target, PIC32MX_NVMCON, &status);
-
- return status;
-}
-
-static uint32_t pic32mx_wait_status_busy(struct flash_bank *bank, int timeout)
-{
- uint32_t status;
-
- /* wait for busy to clear */
- while (((status = pic32mx_get_flash_status(bank)) & NVMCON_NVMWR) && (timeout-- > 0)) {
- LOG_DEBUG("status: 0x%" PRIx32, status);
- alive_sleep(1);
- }
- if (timeout <= 0)
- LOG_DEBUG("timeout: status: 0x%" PRIx32, status);
-
- return status;
-}
-
-static int pic32mx_nvm_exec(struct flash_bank *bank, uint32_t op, uint32_t timeout)
-{
- struct target *target = bank->target;
- uint32_t status;
-
- target_write_u32(target, PIC32MX_NVMCON, NVMCON_NVMWREN | op);
-
- /* unlock flash registers */
- target_write_u32(target, PIC32MX_NVMKEY, NVMKEY1);
- target_write_u32(target, PIC32MX_NVMKEY, NVMKEY2);
-
- /* start operation */
- target_write_u32(target, PIC32MX_NVMCONSET, NVMCON_NVMWR);
-
- status = pic32mx_wait_status_busy(bank, timeout);
-
- /* lock flash registers */
- target_write_u32(target, PIC32MX_NVMCONCLR, NVMCON_NVMWREN);
-
- return status;
-}
-
-static int pic32mx_protect_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
-
- uint32_t config0_address;
- uint32_t devcfg0;
- int s;
- int num_pages;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (pic32mx_info->dev_type == MX_1_2)
- config0_address = PIC32MX_DEVCFG0_1_2;
- else
- config0_address = PIC32MX_DEVCFG0;
-
- target_read_u32(target, config0_address, &devcfg0);
-
- if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
- num_pages = 0xffff; /* All pages protected */
- else if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
- if (devcfg0 & (1 << 24))
- num_pages = 0; /* All pages unprotected */
- else
- num_pages = 0xffff; /* All pages protected */
- } else {
- /* pgm flash */
- if (pic32mx_info->dev_type == MX_1_2)
- num_pages = (~devcfg0 >> 10) & 0x3f;
- else
- num_pages = (~devcfg0 >> 12) & 0xff;
- }
-
- for (s = 0; s < bank->num_sectors && s < num_pages; s++)
- bank->sectors[s].is_protected = 1;
- for (; s < bank->num_sectors; s++)
- bank->sectors[s].is_protected = 0;
-
- return ERROR_OK;
-}
-
-static int pic32mx_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- int i;
- uint32_t status;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first == 0) && (last == (bank->num_sectors - 1))
- && (Virt2Phys(bank->base) == PIC32MX_PHYS_PGM_FLASH)) {
- /* this will only erase the Program Flash (PFM), not the Boot Flash (BFM)
- * we need to use the MTAP to perform a full erase */
- LOG_DEBUG("Erasing entire program flash");
- status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50);
- if (status & NVMCON_NVMERR)
- return ERROR_FLASH_OPERATION_FAILED;
- if (status & NVMCON_LVDERR)
- return ERROR_FLASH_OPERATION_FAILED;
- return ERROR_OK;
- }
-
- for (i = first; i <= last; i++) {
- target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset));
-
- status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
-
- if (status & NVMCON_NVMERR)
- return ERROR_FLASH_OPERATION_FAILED;
- if (status & NVMCON_LVDERR)
- return ERROR_FLASH_OPERATION_FAILED;
- bank->sectors[i].is_erased = 1;
- }
-
- return ERROR_OK;
-}
-
-static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- return ERROR_OK;
-}
-
-/* see contib/loaders/flash/pic32mx.s for src */
-
-static uint32_t pic32mx_flash_write_code[] = {
- /* write: */
- 0x3C08AA99, /* lui $t0, 0xaa99 */
- 0x35086655, /* ori $t0, 0x6655 */
- 0x3C095566, /* lui $t1, 0x5566 */
- 0x352999AA, /* ori $t1, 0x99aa */
- 0x3C0ABF80, /* lui $t2, 0xbf80 */
- 0x354AF400, /* ori $t2, 0xf400 */
- 0x340B4003, /* ori $t3, $zero, 0x4003 */
- 0x340C8000, /* ori $t4, $zero, 0x8000 */
- /* write_row: */
- 0x2CD30080, /* sltiu $s3, $a2, 128 */
- 0x16600008, /* bne $s3, $zero, write_word */
- 0x340D4000, /* ori $t5, $zero, 0x4000 */
- 0xAD450020, /* sw $a1, 32($t2) */
- 0xAD440040, /* sw $a0, 64($t2) */
- 0x04110016, /* bal progflash */
- 0x24840200, /* addiu $a0, $a0, 512 */
- 0x24A50200, /* addiu $a1, $a1, 512 */
- 0x1000FFF7, /* beq $zero, $zero, write_row */
- 0x24C6FF80, /* addiu $a2, $a2, -128 */
- /* write_word: */
- 0x3C15A000, /* lui $s5, 0xa000 */
- 0x36B50000, /* ori $s5, $s5, 0x0 */
- 0x00952025, /* or $a0, $a0, $s5 */
- 0x10000008, /* beq $zero, $zero, next_word */
- 0x340B4001, /* ori $t3, $zero, 0x4001 */
- /* prog_word: */
- 0x8C940000, /* lw $s4, 0($a0) */
- 0xAD540030, /* sw $s4, 48($t2) */
- 0xAD450020, /* sw $a1, 32($t2) */
- 0x04110009, /* bal progflash */
- 0x24840004, /* addiu $a0, $a0, 4 */
- 0x24A50004, /* addiu $a1, $a1, 4 */
- 0x24C6FFFF, /* addiu $a2, $a2, -1 */
- /* next_word: */
- 0x14C0FFF8, /* bne $a2, $zero, prog_word */
- 0x00000000, /* nop */
- /* done: */
- 0x10000002, /* beq $zero, $zero, exit */
- 0x24040000, /* addiu $a0, $zero, 0 */
- /* error: */
- 0x26240000, /* addiu $a0, $s1, 0 */
- /* exit: */
- 0x7000003F, /* sdbbp */
- /* progflash: */
- 0xAD4B0000, /* sw $t3, 0($t2) */
- 0xAD480010, /* sw $t0, 16($t2) */
- 0xAD490010, /* sw $t1, 16($t2) */
- 0xAD4C0008, /* sw $t4, 8($t2) */
- /* waitflash: */
- 0x8D500000, /* lw $s0, 0($t2) */
- 0x020C8024, /* and $s0, $s0, $t4 */
- 0x1600FFFD, /* bne $s0, $zero, waitflash */
- 0x00000000, /* nop */
- 0x00000000, /* nop */
- 0x00000000, /* nop */
- 0x00000000, /* nop */
- 0x00000000, /* nop */
- 0x8D510000, /* lw $s1, 0($t2) */
- 0x30113000, /* andi $s1, $zero, 0x3000 */
- 0x1620FFEF, /* bne $s1, $zero, error */
- 0xAD4D0004, /* sw $t5, 4($t2) */
- 0x03E00008, /* jr $ra */
- 0x00000000 /* nop */
-};
-
-static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[3];
- uint32_t row_size;
- int retval = ERROR_OK;
-
- struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
- struct mips32_algorithm mips32_info;
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(pic32mx_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* Change values for counters and row size, depending on variant */
- if (pic32mx_info->dev_type == MX_1_2) {
- /* 128 byte row */
- pic32mx_flash_write_code[8] = 0x2CD30020;
- pic32mx_flash_write_code[14] = 0x24840080;
- pic32mx_flash_write_code[15] = 0x24A50080;
- pic32mx_flash_write_code[17] = 0x24C6FFE0;
- row_size = 128;
- } else {
- /* 512 byte row */
- pic32mx_flash_write_code[8] = 0x2CD30080;
- pic32mx_flash_write_code[14] = 0x24840200;
- pic32mx_flash_write_code[15] = 0x24A50200;
- pic32mx_flash_write_code[17] = 0x24C6FF80;
- row_size = 512;
- }
-
- uint8_t code[sizeof(pic32mx_flash_write_code)];
- target_buffer_set_u32_array(target, code, ARRAY_SIZE(pic32mx_flash_write_code),
- pic32mx_flash_write_code);
- retval = target_write_buffer(target, write_algorithm->address, sizeof(code), code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- mips32_info.common_magic = MIPS32_COMMON_MAGIC;
- mips32_info.isa_mode = MIPS32_ISA_MIPS32;
-
- init_reg_param(®_params[0], "r4", 32, PARAM_IN_OUT);
- init_reg_param(®_params[1], "r5", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r6", 32, PARAM_OUT);
-
- int row_offset = offset % row_size;
- uint8_t *new_buffer = NULL;
- if (row_offset && (count >= (row_size / 4))) {
- new_buffer = malloc(buffer_size);
- if (new_buffer == NULL) {
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
- memset(new_buffer, 0xff, row_offset);
- address -= row_offset;
- } else
- row_offset = 0;
-
- while (count > 0) {
- uint32_t status;
- uint32_t thisrun_count;
-
- if (row_offset) {
- thisrun_count = (count > ((buffer_size - row_offset) / 4)) ?
- ((buffer_size - row_offset) / 4) : count;
-
- memcpy(new_buffer + row_offset, buffer, thisrun_count * 4);
-
- retval = target_write_buffer(target, source->address,
- row_offset + thisrun_count * 4, new_buffer);
- if (retval != ERROR_OK)
- break;
- } else {
- thisrun_count = (count > (buffer_size / 4)) ?
- (buffer_size / 4) : count;
-
- retval = target_write_buffer(target, source->address,
- thisrun_count * 4, buffer);
- if (retval != ERROR_OK)
- break;
- }
-
- buf_set_u32(reg_params[0].value, 0, 32, Virt2Phys(source->address));
- buf_set_u32(reg_params[1].value, 0, 32, Virt2Phys(address));
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count + row_offset / 4);
-
- retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- write_algorithm->address,
- 0, 10000, &mips32_info);
- if (retval != ERROR_OK) {
- LOG_ERROR("error executing pic32mx flash write algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- status = buf_get_u32(reg_params[0].value, 0, 32);
-
- if (status & NVMCON_NVMERR) {
- LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- if (status & NVMCON_LVDERR) {
- LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- buffer += thisrun_count * 4;
- address += thisrun_count * 4;
- count -= thisrun_count;
- if (row_offset) {
- address += row_offset;
- row_offset = 0;
- }
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
- if (new_buffer != NULL)
- free(new_buffer);
- return retval;
-}
-
-static int pic32mx_write_word(struct flash_bank *bank, uint32_t address, uint32_t word)
-{
- struct target *target = bank->target;
-
- target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(address));
- target_write_u32(target, PIC32MX_NVMDATA, word);
-
- return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5);
-}
-
-static int pic32mx_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- uint32_t words_remaining = (count / 4);
- uint32_t bytes_remaining = (count & 0x00000003);
- uint32_t address = bank->base + offset;
- uint32_t bytes_written = 0;
- uint32_t status;
- int retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- LOG_DEBUG("writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32
- " count: 0x%8.8" PRIx32 "", bank->base, offset, count);
-
- if (offset & 0x3) {
- LOG_WARNING("offset 0x%" PRIx32 "breaks required 4-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* multiple words (4-byte) to be programmed? */
- if (words_remaining > 0) {
- /* try using a block write */
- retval = pic32mx_write_block(bank, buffer, offset, words_remaining);
- if (retval != ERROR_OK) {
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single dword accesses */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
- } else if (retval == ERROR_FLASH_OPERATION_FAILED) {
- LOG_ERROR("flash writing failed");
- return retval;
- }
- } else {
- buffer += words_remaining * 4;
- address += words_remaining * 4;
- words_remaining = 0;
- }
- }
-
- while (words_remaining > 0) {
- uint32_t value;
- memcpy(&value, buffer + bytes_written, sizeof(uint32_t));
-
- status = pic32mx_write_word(bank, address, value);
-
- if (status & NVMCON_NVMERR) {
- LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (status & NVMCON_LVDERR) {
- LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- bytes_written += 4;
- words_remaining--;
- address += 4;
- }
-
- if (bytes_remaining) {
- uint32_t value = 0xffffffff;
- memcpy(&value, buffer + bytes_written, bytes_remaining);
-
- status = pic32mx_write_word(bank, address, value);
-
- if (status & NVMCON_NVMERR) {
- LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (status & NVMCON_LVDERR) {
- LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
-
- return ERROR_OK;
-}
-
-static int pic32mx_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
- struct mips32_common *mips32 = target->arch_info;
- struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
- int i;
- uint32_t num_pages = 0;
- uint32_t device_id;
- int page_size;
-
- pic32mx_info->probed = 0;
-
- device_id = ejtag_info->idcode;
- LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%04x, ver 0x%02x)",
- device_id,
- (unsigned)((device_id >> 1) & 0x7ff),
- (unsigned)((device_id >> 12) & 0xffff),
- (unsigned)((device_id >> 28) & 0xf));
-
- if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) {
- LOG_WARNING("Cannot identify target as a PIC32MX family.");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* Check for PIC32mx1xx/2xx */
- for (i = 0; pic32mx_devs[i].name != NULL; i++) {
- if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
- if ((*(pic32mx_devs[i].name) == '1') || (*(pic32mx_devs[i].name) == '2'))
- pic32mx_info->dev_type = MX_1_2;
- break;
- }
- }
-
- if (pic32mx_info->dev_type == MX_1_2)
- page_size = 1024;
- else
- page_size = 4096;
-
-
- if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
- /* 0x1FC00000: Boot flash size */
-#if 0
- /* for some reason this register returns 8k for the boot bank size
- * this does not match the docs, so for now set the boot bank at a
- * fixed 12k */
- if (target_read_u32(target, PIC32MX_BMXBOOTSZ, &num_pages) != ERROR_OK) {
- LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 12k flash");
- num_pages = (12 * 1024);
- }
-#else
- /* fixed 12k boot bank - see comments above */
- if (pic32mx_info->dev_type == MX_1_2)
- num_pages = (3 * 1024);
- else
- num_pages = (12 * 1024);
-#endif
- } else {
- /* read the flash size from the device */
- if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
- if (pic32mx_info->dev_type == MX_1_2) {
- LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash");
- num_pages = (32 * 1024);
- } else {
- LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
- num_pages = (512 * 1024);
- }
- }
- }
-
- LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- /* calculate numbers of pages */
- num_pages /= page_size;
- bank->size = (num_pages * page_size);
- bank->num_sectors = num_pages;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
-
- for (i = 0; i < (int)num_pages; i++) {
- bank->sectors[i].offset = i * page_size;
- bank->sectors[i].size = page_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- pic32mx_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int pic32mx_auto_probe(struct flash_bank *bank)
-{
- struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
- if (pic32mx_info->probed)
- return ERROR_OK;
- return pic32mx_probe(bank);
-}
-
-static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct target *target = bank->target;
- struct mips32_common *mips32 = target->arch_info;
- struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
- uint32_t device_id;
- int printed = 0, i;
-
- device_id = ejtag_info->idcode;
-
- if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) {
- snprintf(buf, buf_size,
- "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
- (unsigned)((device_id >> 1) & 0x7ff),
- PIC32MX_MANUF_ID);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- for (i = 0; pic32mx_devs[i].name != NULL; i++) {
- if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
- printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
- break;
- }
- }
-
- if (pic32mx_devs[i].name == NULL)
- printed = snprintf(buf, buf_size, "Unknown");
-
- buf += printed;
- buf_size -= printed;
- snprintf(buf, buf_size, " Ver: 0x%02x",
- (unsigned)((device_id >> 28) & 0xf));
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
-{
- uint32_t address, value;
- int status, res;
-
- if (CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 2, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- if (address < bank->base || address >= (bank->base + bank->size)) {
- command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]);
- return ERROR_OK;
- }
-
- res = ERROR_OK;
- status = pic32mx_write_word(bank, address, value);
- if (status & NVMCON_NVMERR)
- res = ERROR_FLASH_OPERATION_FAILED;
- if (status & NVMCON_LVDERR)
- res = ERROR_FLASH_OPERATION_FAILED;
-
- if (res == ERROR_OK)
- command_print(CMD_CTX, "pic32mx pgm word complete");
- else
- command_print(CMD_CTX, "pic32mx pgm word failed (status = 0x%x)", status);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(pic32mx_handle_unlock_command)
-{
- uint32_t mchip_cmd;
- struct target *target = NULL;
- struct mips_m4k_common *mips_m4k;
- struct mips_ejtag *ejtag_info;
- int timeout = 10;
-
- if (CMD_ARGC < 1) {
- command_print(CMD_CTX, "pic32mx unlock <bank>");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- target = bank->target;
- mips_m4k = target_to_m4k(target);
- ejtag_info = &mips_m4k->mips32.ejtag_info;
-
- /* we have to use the MTAP to perform a full erase */
- mips_ejtag_set_instr(ejtag_info, MTAP_SW_MTAP);
- mips_ejtag_set_instr(ejtag_info, MTAP_COMMAND);
-
- /* first check status of device */
- mchip_cmd = MCHP_STATUS;
- mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
- if (mchip_cmd & (1 << 7)) {
- /* device is not locked */
- command_print(CMD_CTX, "pic32mx is already unlocked, erasing anyway");
- }
-
- /* unlock/erase device */
- mips_ejtag_drscan_8_out(ejtag_info, MCHP_ASERT_RST);
- jtag_add_sleep(200);
-
- mips_ejtag_drscan_8_out(ejtag_info, MCHP_ERASE);
-
- do {
- mchip_cmd = MCHP_STATUS;
- mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
- if (timeout-- == 0) {
- LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx32 "", mchip_cmd);
- break;
- }
- alive_sleep(1);
- } while ((mchip_cmd & (1 << 2)) || (!(mchip_cmd & (1 << 3))));
-
- mips_ejtag_drscan_8_out(ejtag_info, MCHP_DE_ASSERT_RST);
-
- /* select ejtag tap */
- mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
-
- command_print(CMD_CTX, "pic32mx unlocked.\n"
- "INFO: a reset or power cycle is required "
- "for the new settings to take effect.");
-
- return ERROR_OK;
-}
-
-static const struct command_registration pic32mx_exec_command_handlers[] = {
- {
- .name = "pgm_word",
- .usage = "<addr> <value> <bank>",
- .handler = pic32mx_handle_pgm_word_command,
- .mode = COMMAND_EXEC,
- .help = "program a word",
- },
- {
- .name = "unlock",
- .handler = pic32mx_handle_unlock_command,
- .mode = COMMAND_EXEC,
- .usage = "[bank_id]",
- .help = "Unlock/Erase entire device.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration pic32mx_command_handlers[] = {
- {
- .name = "pic32mx",
- .mode = COMMAND_ANY,
- .help = "pic32mx flash command group",
- .usage = "",
- .chain = pic32mx_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver pic32mx_flash = {
- .name = "pic32mx",
- .commands = pic32mx_command_handlers,
- .flash_bank_command = pic32mx_flash_bank_command,
- .erase = pic32mx_erase,
- .protect = pic32mx_protect,
- .write = pic32mx_write,
- .read = default_flash_read,
- .probe = pic32mx_probe,
- .auto_probe = pic32mx_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = pic32mx_protect_check,
- .info = pic32mx_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/psoc4.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/psoc4.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/psoc4.c
deleted file mode 100755
index 1827450..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/psoc4.c
+++ /dev/null
@@ -1,809 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 by Andreas Fritiofson *
- * andreas.fritiofson@gmail.com *
- * *
- * Copyright (C) 2014 by Tomas Vanek (PSoC 4 support derived from STM32) *
- * vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <jtag/jtag.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-/* device documets:
-
- PSoC(R) 4: PSoC 4200 Family Datasheet
- Document Number: 001-87197 Rev. *B Revised August 29, 2013
-
- PSoC 4100/4200 Family PSoC(R) 4 Architecture TRM
- Document No. 001-85634 Rev. *C March 25, 2014
-
- PSoC(R) 4 Registers TRM Spec.
- Document No. 001-85847 Rev. *A June 25, 2013
-
- CY8C41xx, CY8C42xx Programming Specifications
- Document No. 001-81799 Rev. *C March 4, 2014
-*/
-
-/* register locations */
-#define PSOC4_CPUSS_SYSREQ 0x40000004
-#define PSOC4_CPUSS_SYSARG 0x40000008
-#define PSOC4_TEST_MODE 0x40030014
-#define PSOC4_SPCIF_GEOMETRY 0x400E0000
-
-#define PSOC4_SFLASH_MACRO 0x0ffff000
-
-/* constants */
-#define PSOC4_SROM_KEY1 0xb6
-#define PSOC4_SROM_KEY2 0xd3
-#define PSOC4_SROM_SYSREQ_BIT (1<<31)
-#define PSOC4_SROM_HMASTER_BIT (1<<30)
-#define PSOC4_SROM_PRIVILEGED_BIT (1<<28)
-#define PSOC4_SROM_STATUS_SUCCEEDED 0xa0000000
-#define PSOC4_SROM_STATUS_FAILED 0xf0000000
-
-#define PSOC4_CMD_GET_SILICON_ID 0
-#define PSOC4_CMD_LOAD_LATCH 4
-#define PSOC4_CMD_WRITE_ROW 5
-#define PSOC4_CMD_PROGRAM_ROW 6
-#define PSOC4_CMD_ERASE_ALL 0xa
-#define PSOC4_CMD_CHECKSUM 0xb
-#define PSOC4_CMD_WRITE_PROTECTION 0xd
-
-#define PSOC4_CHIP_PROT_VIRGIN 0x0
-#define PSOC4_CHIP_PROT_OPEN 0x1
-#define PSOC4_CHIP_PROT_PROTECTED 0x2
-#define PSOC4_CHIP_PROT_KILL 0x4
-
-
-struct psoc4_chip_details {
- uint16_t id;
- const char *type;
- const char *package;
- uint32_t flash_size_in_kb;
-};
-
-/* list of PSoC 4 chips
- * flash_size_in_kb is not necessary as it can be decoded from SPCIF_GEOMETRY
- */
-const struct psoc4_chip_details psoc4_devices[] = {
- /* 4200 series */
- { 0x04A6, "CY8C4245PVI-482", "SSOP-28", .flash_size_in_kb = 32 },
- { 0x04B6, "CY8C4245LQI-483", "QFN-40", .flash_size_in_kb = 32 },
- { 0x04C8, "CY8C4245AXI-483", "TQFP-44", .flash_size_in_kb = 32 },
- { 0x04FB, "CY8C4245AXI-473", "TQFP-44", .flash_size_in_kb = 32 },
- { 0x04F0, "CY8C4244PVI-432", "SSOP-28", .flash_size_in_kb = 16 },
- { 0x04F1, "CY8C4244PVI-442", "SSOP-28", .flash_size_in_kb = 16 },
- { 0x04F6, "CY8C4244LQI-443", "QFN-40", .flash_size_in_kb = 16 },
- { 0x04FA, "CY8C4244AXI-443", "TQFP-44", .flash_size_in_kb = 16 },
-
- /* 4100 series */
- { 0x0410, "CY8C4124PVI-432", "SSOP-28", .flash_size_in_kb = 16 },
- { 0x0411, "CY8C4124PVI-442", "SSOP-28", .flash_size_in_kb = 16 },
- { 0x0416, "CY8C4124LQI-443", "QFN-40", .flash_size_in_kb = 16 },
- { 0x041A, "CY8C4124AXI-443", "TQFP-44", .flash_size_in_kb = 16 },
- { 0x041B, "CY8C4125AXI-473", "TQFP-44", .flash_size_in_kb = 32 },
- { 0x0412, "CY8C4125PVI-482", "SSOP-28", .flash_size_in_kb = 32 },
- { 0x0417, "CY8C4125LQI-483", "QFN-40", .flash_size_in_kb = 32 },
- { 0x041C, "CY8C4125AXI-483", "TQFP-44", .flash_size_in_kb = 32 },
-
- /* CCG1 series */
- { 0x0490, "CYPD1103-35FNXI", "CSP-35", .flash_size_in_kb = 32 },
- { 0x0489, "CYPD1121-40LQXI", "QFN-40", .flash_size_in_kb = 32 },
- { 0x048A, "CYPD1122-40LQXI", "QFN-40", .flash_size_in_kb = 32 },
- { 0x0491, "CYPD1131-35FNXI", "CSP-35", .flash_size_in_kb = 32 },
- { 0x0498, "CYPD1132-16SXI", "SOIC-16", .flash_size_in_kb = 32 },
- { 0x0481, "CYPD1134-28PVXI", "SSOP-28", .flash_size_in_kb = 32 },
- { 0x048B, "CYPD1134-40LQXI", "QFN-40", .flash_size_in_kb = 32 },
-};
-
-
-struct psoc4_flash_bank {
- uint32_t row_size;
- uint32_t user_bank_size;
- int probed;
- uint32_t silicon_id;
- uint8_t chip_protection;
- uint8_t cmd_program_row;
-};
-
-
-static const struct psoc4_chip_details *psoc4_details_by_id(uint32_t silicon_id)
-{
- const struct psoc4_chip_details *p = psoc4_devices;
- unsigned int i;
- uint16_t id = silicon_id >> 16; /* ignore die revision */
- for (i = 0; i < sizeof(psoc4_devices)/sizeof(psoc4_devices[0]); i++, p++) {
- if (p->id == id)
- return p;
- }
- LOG_DEBUG("Unknown PSoC 4 device silicon id 0x%08" PRIx32 ".", silicon_id);
- return NULL;
-}
-
-static const char *psoc4_decode_chip_protection(uint8_t protection)
-{
- switch (protection) {
- case PSOC4_CHIP_PROT_VIRGIN:
- return "protection VIRGIN";
- case PSOC4_CHIP_PROT_OPEN:
- return "protection open";
- case PSOC4_CHIP_PROT_PROTECTED:
- return "PROTECTED";
- case PSOC4_CHIP_PROT_KILL:
- return "protection KILL";
- default:
- LOG_WARNING("Unknown protection state 0x%02" PRIx8 "", protection);
- return "";
- }
-}
-
-
-/* flash bank <name> psoc <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(psoc4_flash_bank_command)
-{
- struct psoc4_flash_bank *psoc4_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- psoc4_info = calloc(1, sizeof(struct psoc4_flash_bank));
-
- bank->driver_priv = psoc4_info;
- psoc4_info->user_bank_size = bank->size;
-
- return ERROR_OK;
-}
-
-
-/* PSoC 4 system ROM request
- * Setting SROM_SYSREQ_BIT in CPUSS_SYSREQ register runs NMI service
- * in sysrem ROM. Algorithm just waits for NMI to finish.
- * When sysreq_params_size == 0 only one parameter is passed in CPUSS_SYSARG register.
- * Otherwise address of memory parameter block is set in CPUSS_SYSARG
- * and the first parameter is written to the first word of parameter block
- */
-static int psoc4_sysreq(struct target *target, uint8_t cmd, uint16_t cmd_param,
- uint32_t *sysreq_params, uint32_t sysreq_params_size)
-{
- struct working_area *sysreq_wait_algorithm;
- struct working_area *sysreq_mem;
-
- struct reg_param reg_params[1];
- struct armv7m_algorithm armv7m_info;
-
- int retval = ERROR_OK;
-
- uint32_t param1 = PSOC4_SROM_KEY1
- | ((PSOC4_SROM_KEY2 + cmd) << 8)
- | (cmd_param << 16);
-
- static uint8_t psoc4_sysreq_wait_code[] = {
- /* system request NMI is served immediately after algo run
- now we are done: break */
- 0x00, 0xbe, /* bkpt 0 */
- };
-
- const int code_words = (sizeof(psoc4_sysreq_wait_code) + 3) / 4;
- /* stack must be aligned */
- const int stack_size = 196;
- /* tested stack sizes on PSoC 4:
- ERASE_ALL 144
- PROGRAM_ROW 112
- other sysreq 68
- */
-
- /* allocate area for sysreq wait code and stack */
- if (target_alloc_working_area(target, code_words * 4 + stack_size,
- &sysreq_wait_algorithm) != ERROR_OK) {
- LOG_DEBUG("no working area for sysreq code");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* Write the code */
- retval = target_write_buffer(target,
- sysreq_wait_algorithm->address,
- sizeof(psoc4_sysreq_wait_code),
- psoc4_sysreq_wait_code);
- if (retval != ERROR_OK) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- goto cleanup_algo;
- }
-
- if (sysreq_params_size) {
- /* Allocate memory for sysreq_params */
- retval = target_alloc_working_area(target, sysreq_params_size, &sysreq_mem);
- if (retval != ERROR_OK) {
- LOG_WARNING("no working area for sysreq parameters");
-
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- goto cleanup_algo;
- }
-
- /* Write sysreq_params */
- sysreq_params[0] = param1;
- retval = target_write_buffer(target, sysreq_mem->address,
- sysreq_params_size, (uint8_t *)sysreq_params);
- if (retval != ERROR_OK)
- goto cleanup_mem;
-
- /* Set address of sysreq parameters block */
- retval = target_write_u32(target, PSOC4_CPUSS_SYSARG, sysreq_mem->address);
- if (retval != ERROR_OK)
- goto cleanup_mem;
-
- } else {
- /* Sysreq without memory block of parameters */
- /* Set register parameter */
- retval = target_write_u32(target, PSOC4_CPUSS_SYSARG, param1);
- if (retval != ERROR_OK)
- goto cleanup_mem;
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- /* sysreq stack */
- init_reg_param(®_params[0], "sp", 32, PARAM_OUT);
- buf_set_u32(reg_params[0].value, 0, 32,
- sysreq_wait_algorithm->address + sysreq_wait_algorithm->size);
-
- struct armv7m_common *armv7m = target_to_armv7m(target);
- if (armv7m == NULL) {
-
- /* something is very wrong if armv7m is NULL */
- LOG_ERROR("unable to get armv7m target");
- goto cleanup;
- }
-
- /* Set SROM request */
- retval = target_write_u32(target, PSOC4_CPUSS_SYSREQ,
- PSOC4_SROM_SYSREQ_BIT | PSOC4_SROM_HMASTER_BIT | cmd);
- if (retval != ERROR_OK)
- goto cleanup;
-
- /* Execute wait code */
- retval = target_run_algorithm(target, 0, NULL,
- sizeof(reg_params) / sizeof(*reg_params), reg_params,
- sysreq_wait_algorithm->address, 0, 1000, &armv7m_info);
- if (retval != ERROR_OK)
- LOG_ERROR("sysreq wait code execution failed");
-
-cleanup:
- destroy_reg_param(®_params[0]);
-
-cleanup_mem:
- if (sysreq_params_size)
- target_free_working_area(target, sysreq_mem);
-
-cleanup_algo:
- target_free_working_area(target, sysreq_wait_algorithm);
-
- return retval;
-}
-
-
-/* helper routine to get silicon ID from a PSoC 4 chip */
-static int psoc4_get_silicon_id(struct target *target, uint32_t *silicon_id, uint8_t *protection)
-{
- uint32_t params = PSOC4_SROM_KEY1
- | ((PSOC4_SROM_KEY2 + PSOC4_CMD_GET_SILICON_ID) << 8);
- uint32_t part0, part1;
-
- int retval = psoc4_sysreq(target, PSOC4_CMD_GET_SILICON_ID, 0, NULL, 0);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, PSOC4_CPUSS_SYSARG, &part0);
- if (retval != ERROR_OK)
- return retval;
-
- if (part0 == params) {
- LOG_ERROR("sysreq silicon id request not served");
- return ERROR_FAIL;
- }
-
- retval = target_read_u32(target, PSOC4_CPUSS_SYSREQ, &part1);
- if (retval != ERROR_OK)
- return retval;
-
- uint32_t silicon = ((part0 & 0xffff) << 16)
- | (((part0 >> 16) & 0xff) << 8)
- | (part1 & 0xff);
- uint8_t prot = (part1 >> 12) & 0xff;
-
- if (silicon_id)
- *silicon_id = silicon;
- if (protection)
- *protection = prot;
-
- LOG_DEBUG("silicon id: 0x%08" PRIx32 "", silicon);
- LOG_DEBUG("protection: 0x%02" PRIx8 "", prot);
- return retval;
-}
-
-
-static int psoc4_protect_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
-
- uint32_t prot_addr = PSOC4_SFLASH_MACRO;
- uint32_t protection;
- int i, s;
- int num_bits;
- int retval = ERROR_OK;
-
- num_bits = bank->num_sectors;
-
- for (i = 0; i < num_bits; i += 32) {
- retval = target_read_u32(target, prot_addr, &protection);
- if (retval != ERROR_OK)
- return retval;
-
- prot_addr += 4;
-
- for (s = 0; s < 32; s++) {
- if (i + s >= num_bits)
- break;
- bank->sectors[i + s].is_protected = (protection & (1 << s)) ? 1 : 0;
- }
- }
-
- retval = psoc4_get_silicon_id(target, NULL, &(psoc4_info->chip_protection));
- return retval;
-}
-
-
-static int psoc4_mass_erase(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- int i;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Call "Erase All" system ROM API */
- uint32_t param;
- int retval = psoc4_sysreq(target, PSOC4_CMD_ERASE_ALL,
- 0,
- ¶m, sizeof(param));
-
- if (retval == ERROR_OK)
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- return retval;
-}
-
-
-static int psoc4_erase(struct flash_bank *bank, int first, int last)
-{
- struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
- if (psoc4_info->cmd_program_row == PSOC4_CMD_WRITE_ROW) {
- LOG_INFO("Autoerase enabled, erase command ignored");
- return ERROR_OK;
- }
-
- if ((first == 0) && (last == (bank->num_sectors - 1)))
- return psoc4_mass_erase(bank);
-
- LOG_ERROR("Only mass erase available");
-
- return ERROR_FAIL;
-}
-
-
-static int psoc4_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct target *target = bank->target;
- struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
-
- if (psoc4_info->probed == 0)
- return ERROR_FAIL;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint32_t *sysrq_buffer = NULL;
- int retval;
- int num_bits = bank->num_sectors;
- const int param_sz = 8;
- int prot_sz = num_bits / 8;
- int chip_prot = PSOC4_CHIP_PROT_OPEN;
- int flash_macro = 0; /* PSoC 42xx has only macro 0 */
- int i;
-
- sysrq_buffer = calloc(1, param_sz + prot_sz);
- if (sysrq_buffer == NULL) {
- LOG_ERROR("no memory for row buffer");
- return ERROR_FAIL;
- }
-
- for (i = first; i < num_bits && i <= last; i++)
- bank->sectors[i].is_protected = set;
-
- uint32_t *p = sysrq_buffer + 2;
- for (i = 0; i < num_bits; i++) {
- if (bank->sectors[i].is_protected)
- p[i / 32] |= 1 << (i % 32);
- }
-
- /* Call "Load Latch" system ROM API */
- sysrq_buffer[1] = prot_sz - 1;
- retval = psoc4_sysreq(target, PSOC4_CMD_LOAD_LATCH,
- 0, /* Byte number in latch from what to write */
- sysrq_buffer, param_sz + psoc4_info->row_size);
- if (retval != ERROR_OK)
- goto cleanup;
-
- /* Call "Write Protection" system ROM API */
- retval = psoc4_sysreq(target, PSOC4_CMD_WRITE_PROTECTION,
- chip_prot | (flash_macro << 8), NULL, 0);
-cleanup:
- if (retval != ERROR_OK)
- psoc4_protect_check(bank);
-
- if (sysrq_buffer)
- free(sysrq_buffer);
-
- return retval;
-}
-
-
-COMMAND_HANDLER(psoc4_handle_flash_autoerase_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
- bool enable = psoc4_info->cmd_program_row == PSOC4_CMD_WRITE_ROW;
-
- if (CMD_ARGC >= 2)
- COMMAND_PARSE_ON_OFF(CMD_ARGV[1], enable);
-
- if (enable) {
- psoc4_info->cmd_program_row = PSOC4_CMD_WRITE_ROW;
- LOG_INFO("Flash auto-erase enabled, non mass erase commands will be ignored.");
- } else {
- psoc4_info->cmd_program_row = PSOC4_CMD_PROGRAM_ROW;
- LOG_INFO("Flash auto-erase disabled. Use psoc mass_erase before flash programming.");
- }
-
- return retval;
-}
-
-
-static int psoc4_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t *sysrq_buffer = NULL;
- int retval = ERROR_OK;
- const int param_sz = 8;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x1) {
- LOG_ERROR("offset 0x%08" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- sysrq_buffer = malloc(param_sz + psoc4_info->row_size);
- if (sysrq_buffer == NULL) {
- LOG_ERROR("no memory for row buffer");
- return ERROR_FAIL;
- }
-
- uint8_t *row_buffer = (uint8_t *)sysrq_buffer + param_sz;
- uint32_t row_num = offset / psoc4_info->row_size;
- uint32_t row_offset = offset - row_num * psoc4_info->row_size;
- if (row_offset)
- memset(row_buffer, 0, row_offset);
-
- bool save_poll = jtag_poll_get_enabled();
- jtag_poll_set_enabled(false);
-
- while (count) {
- uint32_t chunk_size = psoc4_info->row_size - row_offset;
- if (chunk_size > count) {
- chunk_size = count;
- memset(row_buffer + chunk_size, 0, psoc4_info->row_size - chunk_size);
- }
- memcpy(row_buffer + row_offset, buffer, chunk_size);
- LOG_DEBUG("offset / row: 0x%08" PRIx32 " / %" PRIu32 ", size %" PRIu32 "",
- offset, row_offset, chunk_size);
-
- /* Call "Load Latch" system ROM API */
- sysrq_buffer[1] = psoc4_info->row_size - 1;
- retval = psoc4_sysreq(target, PSOC4_CMD_LOAD_LATCH,
- 0, /* Byte number in latch from what to write */
- sysrq_buffer, param_sz + psoc4_info->row_size);
- if (retval != ERROR_OK)
- goto cleanup;
-
- /* Call "Program Row" or "Write Row" system ROM API */
- uint32_t sysrq_param;
- retval = psoc4_sysreq(target, psoc4_info->cmd_program_row,
- row_num & 0xffff,
- &sysrq_param, sizeof(sysrq_param));
- if (retval != ERROR_OK)
- goto cleanup;
-
- buffer += chunk_size;
- row_num++;
- row_offset = 0;
- count -= chunk_size;
- }
-
-cleanup:
- jtag_poll_set_enabled(save_poll);
-
- if (sysrq_buffer)
- free(sysrq_buffer);
-
- return retval;
-}
-
-
-static int psoc4_probe(struct flash_bank *bank)
-{
- struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t flash_size_in_kb = 0;
- uint32_t max_flash_size_in_kb;
- uint32_t cpu_id;
- uint32_t silicon_id;
- uint32_t row_size;
- uint32_t base_address = 0x00000000;
- uint8_t protection;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- psoc4_info->probed = 0;
- psoc4_info->cmd_program_row = PSOC4_CMD_PROGRAM_ROW;
-
- /* Get the CPUID from the ARM Core
- * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0432c/DDI0432C_cortex_m0_r0p0_trm.pdf 4.2.1 */
- int retval = target_read_u32(target, 0xE000ED00, &cpu_id);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("cpu id = 0x%08" PRIx32 "", cpu_id);
-
- /* set page size, protection granularity and max flash size depending on family */
- switch ((cpu_id >> 4) & 0xFFF) {
- case 0xc20: /* M0 -> PSoC4 */
- row_size = 128;
- max_flash_size_in_kb = 32;
- break;
- default:
- LOG_WARNING("Cannot identify target as a PSoC 4 family.");
- return ERROR_FAIL;
- }
-
- uint32_t spcif_geometry;
- retval = target_read_u32(target, PSOC4_SPCIF_GEOMETRY, &spcif_geometry);
- if (retval == ERROR_OK) {
- row_size = 128 * ((spcif_geometry >> 22) & 3);
- flash_size_in_kb = (spcif_geometry & 0xffff) * 256 / 1024;
- LOG_INFO("SPCIF geometry: %" PRIu32 " kb flash, row %" PRIu32 " bytes.",
- flash_size_in_kb, row_size);
- }
-
- /* Early revisions of ST-Link v2 have some problem reading PSOC4_SPCIF_GEOMETRY
- and an error is reported late. Dummy read gets this error. */
- uint32_t dummy;
- target_read_u32(target, PSOC4_CPUSS_SYSREQ, &dummy);
-
- /* get silicon ID from target. */
- retval = psoc4_get_silicon_id(target, &silicon_id, &protection);
- if (retval != ERROR_OK)
- return retval;
-
- const struct psoc4_chip_details *details = psoc4_details_by_id(silicon_id);
- if (details) {
- LOG_INFO("%s device detected.", details->type);
- if (flash_size_in_kb == 0)
- flash_size_in_kb = details->flash_size_in_kb;
- else if (flash_size_in_kb != details->flash_size_in_kb)
- LOG_ERROR("Flash size mismatch");
- }
-
- psoc4_info->row_size = row_size;
- psoc4_info->silicon_id = silicon_id;
- psoc4_info->chip_protection = protection;
-
- /* failed reading flash size or flash size invalid (early silicon),
- * default to max target family */
- if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
- LOG_WARNING("PSoC 4 flash size failed, probe inaccurate - assuming %" PRIu32 " k flash",
- max_flash_size_in_kb);
- flash_size_in_kb = max_flash_size_in_kb;
- }
-
- /* if the user sets the size manually then ignore the probed value
- * this allows us to work around devices that have a invalid flash size register value */
- if (psoc4_info->user_bank_size) {
- LOG_INFO("ignoring flash probed value, using configured bank size");
- flash_size_in_kb = psoc4_info->user_bank_size / 1024;
- }
-
- LOG_INFO("flash size = %" PRIu32 " kbytes", flash_size_in_kb);
-
- /* did we assign flash size? */
- assert(flash_size_in_kb != 0xffff);
-
- /* calculate numbers of pages */
- uint32_t num_rows = flash_size_in_kb * 1024 / row_size;
-
- /* check that calculation result makes sense */
- assert(num_rows > 0);
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->base = base_address;
- bank->size = num_rows * row_size;
- bank->num_sectors = num_rows;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_rows);
-
- uint32_t i;
- for (i = 0; i < num_rows; i++) {
- bank->sectors[i].offset = i * row_size;
- bank->sectors[i].size = row_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- LOG_INFO("flash bank set %" PRIu32 " rows", num_rows);
- psoc4_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int psoc4_auto_probe(struct flash_bank *bank)
-{
- struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
- if (psoc4_info->probed)
- return ERROR_OK;
- return psoc4_probe(bank);
-}
-
-
-static int get_psoc4_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct psoc4_flash_bank *psoc4_info = bank->driver_priv;
- int printed = 0;
-
- if (psoc4_info->probed == 0)
- return ERROR_FAIL;
-
- const struct psoc4_chip_details *details = psoc4_details_by_id(psoc4_info->silicon_id);
-
- if (details) {
- uint32_t chip_revision = psoc4_info->silicon_id & 0xffff;
- printed = snprintf(buf, buf_size, "PSoC 4 %s rev 0x%04" PRIx32 " package %s",
- details->type, chip_revision, details->package);
- } else
- printed = snprintf(buf, buf_size, "PSoC 4 silicon id 0x%08" PRIx32 "",
- psoc4_info->silicon_id);
-
- buf += printed;
- buf_size -= printed;
-
- const char *prot_txt = psoc4_decode_chip_protection(psoc4_info->chip_protection);
- uint32_t size_in_kb = bank->size / 1024;
- snprintf(buf, buf_size, " flash %" PRIu32 " kb %s", size_in_kb, prot_txt);
- return ERROR_OK;
-}
-
-
-COMMAND_HANDLER(psoc4_handle_mass_erase_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = psoc4_mass_erase(bank);
- if (retval == ERROR_OK)
- command_print(CMD_CTX, "psoc mass erase complete");
- else
- command_print(CMD_CTX, "psoc mass erase failed");
-
- return retval;
-}
-
-
-static const struct command_registration psoc4_exec_command_handlers[] = {
- {
- .name = "mass_erase",
- .handler = psoc4_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Erase entire flash device.",
- },
- {
- .name = "flash_autoerase",
- .handler = psoc4_handle_flash_autoerase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id on|off",
- .help = "Set autoerase mode for flash bank.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration psoc4_command_handlers[] = {
- {
- .name = "psoc4",
- .mode = COMMAND_ANY,
- .help = "PSoC 4 flash command group",
- .usage = "",
- .chain = psoc4_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver psoc4_flash = {
- .name = "psoc4",
- .commands = psoc4_command_handlers,
- .flash_bank_command = psoc4_flash_bank_command,
- .erase = psoc4_erase,
- .protect = psoc4_protect,
- .write = psoc4_write,
- .read = default_flash_read,
- .probe = psoc4_probe,
- .auto_probe = psoc4_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = psoc4_protect_check,
- .info = get_psoc4_info,
-};
[12/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/xmc1xxx.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/xmc1xxx.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/xmc1xxx.c
deleted file mode 100755
index bb2ec12..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/xmc1xxx.c
+++ /dev/null
@@ -1,549 +0,0 @@
-/*
- * XMC1000 flash driver
- *
- * Copyright (c) 2016 Andreas F�rber
- *
- * License: GPL-2.0+
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-#define FLASH_BASE 0x10000000
-#define PAU_BASE 0x40000000
-#define SCU_BASE 0x40010000
-#define NVM_BASE 0x40050000
-
-#define FLASH_CS0 (FLASH_BASE + 0xf00)
-
-#define PAU_FLSIZE (PAU_BASE + 0x404)
-
-#define SCU_IDCHIP (SCU_BASE + 0x004)
-
-#define NVMSTATUS (NVM_BASE + 0x00)
-#define NVMPROG (NVM_BASE + 0x04)
-#define NVMCONF (NVM_BASE + 0x08)
-
-#define NVMSTATUS_BUSY (1 << 0)
-#define NVMSTATUS_VERR_MASK (0x3 << 2)
-
-#define NVMPROG_ACTION_OPTYPE_IDLE_VERIFY (0 << 0)
-#define NVMPROG_ACTION_OPTYPE_WRITE (1 << 0)
-#define NVMPROG_ACTION_OPTYPE_PAGE_ERASE (2 << 0)
-
-#define NVMPROG_ACTION_ONE_SHOT_ONCE (1 << 4)
-#define NVMPROG_ACTION_ONE_SHOT_CONTINUOUS (2 << 4)
-
-#define NVMPROG_ACTION_VERIFY_EACH (1 << 6)
-#define NVMPROG_ACTION_VERIFY_NO (2 << 6)
-#define NVMPROG_ACTION_VERIFY_ARRAY (3 << 6)
-
-#define NVMPROG_ACTION_IDLE 0x00
-#define NVMPROG_ACTION_MASK 0xff
-
-#define NVM_WORD_SIZE 4
-#define NVM_BLOCK_SIZE (4 * NVM_WORD_SIZE)
-#define NVM_PAGE_SIZE (16 * NVM_BLOCK_SIZE)
-
-struct xmc1xxx_flash_bank {
- bool probed;
-};
-
-static int xmc1xxx_nvm_set_idle(struct target *target)
-{
- return target_write_u16(target, NVMPROG, NVMPROG_ACTION_IDLE);
-}
-
-static int xmc1xxx_nvm_check_idle(struct target *target)
-{
- uint16_t val;
- int retval;
-
- retval = target_read_u16(target, NVMPROG, &val);
- if (retval != ERROR_OK)
- return retval;
- if ((val & NVMPROG_ACTION_MASK) != NVMPROG_ACTION_IDLE) {
- LOG_WARNING("NVMPROG.ACTION");
- retval = xmc1xxx_nvm_set_idle(target);
- }
-
- return retval;
-}
-
-static int xmc1xxx_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- struct working_area *workarea;
- struct reg_param reg_params[3];
- struct armv7m_algorithm armv7m_algo;
- unsigned i;
- int retval, sector;
- const uint8_t erase_code[] = {
-#include "../../../contrib/loaders/flash/xmc1xxx/erase.inc"
- };
-
- LOG_DEBUG("Infineon XMC1000 erase sectors %d to %d", first, last);
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = xmc1xxx_nvm_check_idle(target);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_alloc_working_area(target, sizeof(erase_code),
- &workarea);
- if (retval != ERROR_OK) {
- LOG_ERROR("No working area available.");
- retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- goto err_alloc_code;
- }
- retval = target_write_buffer(target, workarea->address,
- sizeof(erase_code), erase_code);
- if (retval != ERROR_OK)
- goto err_write_code;
-
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
-
- buf_set_u32(reg_params[0].value, 0, 32, NVM_BASE);
- buf_set_u32(reg_params[1].value, 0, 32, bank->base +
- bank->sectors[first].offset);
- buf_set_u32(reg_params[2].value, 0, 32, bank->base +
- bank->sectors[last].offset + bank->sectors[last].size);
-
- retval = target_run_algorithm(target,
- 0, NULL,
- ARRAY_SIZE(reg_params), reg_params,
- workarea->address, 0,
- 1000, &armv7m_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing flash sector erase "
- "programming algorithm");
- retval = xmc1xxx_nvm_set_idle(target);
- if (retval != ERROR_OK)
- LOG_WARNING("Couldn't restore NVMPROG.ACTION");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run;
- }
-
- for (sector = first; sector <= last; sector++)
- bank->sectors[sector].is_erased = 1;
-
-err_run:
- for (i = 0; i < ARRAY_SIZE(reg_params); i++)
- destroy_reg_param(®_params[i]);
-
-err_write_code:
- target_free_working_area(target, workarea);
-
-err_alloc_code:
- return retval;
-}
-
-static int xmc1xxx_erase_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct working_area *workarea;
- struct reg_param reg_params[3];
- struct armv7m_algorithm armv7m_algo;
- uint16_t val;
- unsigned i;
- int retval, sector;
- const uint8_t erase_check_code[] = {
-#include "../../../contrib/loaders/flash/xmc1xxx/erase_check.inc"
- };
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = target_alloc_working_area(target, sizeof(erase_check_code),
- &workarea);
- if (retval != ERROR_OK) {
- LOG_ERROR("No working area available.");
- retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- goto err_alloc_code;
- }
- retval = target_write_buffer(target, workarea->address,
- sizeof(erase_check_code), erase_check_code);
- if (retval != ERROR_OK)
- goto err_write_code;
-
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
-
- buf_set_u32(reg_params[0].value, 0, 32, NVM_BASE);
-
- for (sector = 0; sector < bank->num_sectors; sector++) {
- uint32_t start = bank->base + bank->sectors[sector].offset;
- buf_set_u32(reg_params[1].value, 0, 32, start);
- buf_set_u32(reg_params[2].value, 0, 32, start + bank->sectors[sector].size);
-
- retval = xmc1xxx_nvm_check_idle(target);
- if (retval != ERROR_OK)
- goto err_nvmprog;
-
- LOG_DEBUG("Erase-checking 0x%08" PRIx32, start);
- retval = target_run_algorithm(target,
- 0, NULL,
- ARRAY_SIZE(reg_params), reg_params,
- workarea->address, 0,
- 1000, &armv7m_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing flash sector erase check "
- "programming algorithm");
- retval = xmc1xxx_nvm_set_idle(target);
- if (retval != ERROR_OK)
- LOG_WARNING("Couldn't restore NVMPROG.ACTION");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run;
- }
-
- retval = target_read_u16(target, NVMSTATUS, &val);
- if (retval != ERROR_OK) {
- LOG_ERROR("Couldn't read NVMSTATUS");
- goto err_nvmstatus;
- }
- bank->sectors[sector].is_erased = (val & NVMSTATUS_VERR_MASK) ? 0 : 1;
- }
-
-err_nvmstatus:
-err_run:
-err_nvmprog:
- for (i = 0; i < ARRAY_SIZE(reg_params); i++)
- destroy_reg_param(®_params[i]);
-
-err_write_code:
- target_free_working_area(target, workarea);
-
-err_alloc_code:
- return retval;
-}
-
-static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t byte_count)
-{
- struct target *target = bank->target;
- struct working_area *code_workarea, *data_workarea;
- struct reg_param reg_params[4];
- struct armv7m_algorithm armv7m_algo;
- uint32_t block_count = DIV_ROUND_UP(byte_count, NVM_BLOCK_SIZE);
- unsigned i;
- int retval;
- const uint8_t write_code[] = {
-#include "../../../contrib/loaders/flash/xmc1xxx/write.inc"
- };
-
- LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRId32 " bytes)",
- offset, byte_count);
-
- if (offset & (NVM_BLOCK_SIZE - 1)) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required block alignment",
- offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
- if (byte_count & (NVM_BLOCK_SIZE - 1)) {
- LOG_WARNING("length %" PRId32 " is not block aligned, rounding up",
- byte_count);
- }
-
- if (target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = target_alloc_working_area(target, sizeof(write_code),
- &code_workarea);
- if (retval != ERROR_OK) {
- LOG_ERROR("No working area available for write code.");
- retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- goto err_alloc_code;
- }
- retval = target_write_buffer(target, code_workarea->address,
- sizeof(write_code), write_code);
- if (retval != ERROR_OK)
- goto err_write_code;
-
- retval = target_alloc_working_area(target, MAX(NVM_BLOCK_SIZE,
- MIN(block_count * NVM_BLOCK_SIZE, target_get_working_area_avail(target))),
- &data_workarea);
- if (retval != ERROR_OK) {
- LOG_ERROR("No working area available for write data.");
- retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- goto err_alloc_data;
- }
-
- armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_algo.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
-
- buf_set_u32(reg_params[0].value, 0, 32, NVM_BASE);
-
- while (byte_count > 0) {
- uint32_t blocks = MIN(block_count, data_workarea->size / NVM_BLOCK_SIZE);
- uint32_t addr = bank->base + offset;
-
- LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" PRIx32,
- MIN(blocks * NVM_BLOCK_SIZE, byte_count),
- data_workarea->address);
-
- retval = target_write_buffer(target, data_workarea->address,
- MIN(blocks * NVM_BLOCK_SIZE, byte_count), buffer);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error writing data buffer");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_write_data;
- }
- if (byte_count < blocks * NVM_BLOCK_SIZE) {
- retval = target_write_memory(target,
- data_workarea->address + byte_count, 1,
- blocks * NVM_BLOCK_SIZE - byte_count,
- &bank->default_padded_value);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error writing data padding");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_write_pad;
- }
- }
-
- LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)",
- addr, addr + blocks * NVM_BLOCK_SIZE - 1, blocks);
-
- retval = xmc1xxx_nvm_check_idle(target);
- if (retval != ERROR_OK)
- goto err_nvmprog;
-
- buf_set_u32(reg_params[1].value, 0, 32, addr);
- buf_set_u32(reg_params[2].value, 0, 32, data_workarea->address);
- buf_set_u32(reg_params[3].value, 0, 32, blocks);
-
- retval = target_run_algorithm(target,
- 0, NULL,
- ARRAY_SIZE(reg_params), reg_params,
- code_workarea->address, 0,
- 5 * 60 * 1000, &armv7m_algo);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing flash write "
- "programming algorithm");
- retval = xmc1xxx_nvm_set_idle(target);
- if (retval != ERROR_OK)
- LOG_WARNING("Couldn't restore NVMPROG.ACTION");
- retval = ERROR_FLASH_OPERATION_FAILED;
- goto err_run;
- }
-
- block_count -= blocks;
- offset += blocks * NVM_BLOCK_SIZE;
- buffer += blocks * NVM_BLOCK_SIZE;
- byte_count -= MIN(blocks * NVM_BLOCK_SIZE, byte_count);
- }
-
-err_run:
-err_nvmprog:
-err_write_pad:
-err_write_data:
- for (i = 0; i < ARRAY_SIZE(reg_params); i++)
- destroy_reg_param(®_params[i]);
-
- target_free_working_area(target, data_workarea);
-err_alloc_data:
-err_write_code:
- target_free_working_area(target, code_workarea);
-
-err_alloc_code:
- return retval;
-}
-
-static int xmc1xxx_protect_check(struct flash_bank *bank)
-{
- uint32_t nvmconf;
- int i, num_protected, retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = target_read_u32(bank->target, NVMCONF, &nvmconf);
- if (retval != ERROR_OK) {
- LOG_ERROR("Cannot read NVMCONF register.");
- return retval;
- }
- LOG_DEBUG("NVMCONF = %08" PRIx32, nvmconf);
-
- num_protected = (nvmconf >> 4) & 0xff;
-
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_protected = (i < num_protected) ? 1 : 0;
-
- return ERROR_OK;
-}
-
-static int xmc1xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
-{
- uint32_t chipid[8];
- int i, retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* Obtain the 8-word Chip Identification Number */
- for (i = 0; i < 7; i++) {
- retval = target_read_u32(bank->target, FLASH_CS0 + i * 4, &chipid[i]);
- if (retval != ERROR_OK) {
- LOG_ERROR("Cannot read CS0 register %i.", i);
- return retval;
- }
- LOG_DEBUG("ID[%d] = %08" PRIX32, i, chipid[i]);
- }
- retval = target_read_u32(bank->target, SCU_BASE + 0x000, &chipid[7]);
- if (retval != ERROR_OK) {
- LOG_ERROR("Cannot read DBGROMID register.");
- return retval;
- }
- LOG_DEBUG("ID[7] = %08" PRIX32, chipid[7]);
-
- snprintf(buf, buf_size, "XMC%" PRIx32 "00 %X flash %uKB ROM %uKB SRAM %uKB",
- (chipid[0] >> 12) & 0xff,
- 0xAA + (chipid[7] >> 28) - 1,
- (((chipid[6] >> 12) & 0x3f) - 1) * 4,
- (((chipid[4] >> 8) & 0x3f) * 256) / 1024,
- (((chipid[5] >> 8) & 0x1f) * 256 * 4) / 1024);
-
- return ERROR_OK;
-}
-
-static int xmc1xxx_probe(struct flash_bank *bank)
-{
- struct xmc1xxx_flash_bank *xmc_bank = bank->driver_priv;
- uint32_t flash_addr = bank->base;
- uint32_t idchip, flsize;
- int i, retval;
-
- if (xmc_bank->probed)
- return ERROR_OK;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = target_read_u32(bank->target, SCU_IDCHIP, &idchip);
- if (retval != ERROR_OK) {
- LOG_ERROR("Cannot read IDCHIP register.");
- return retval;
- }
-
- if ((idchip & 0xffff0000) != 0x10000) {
- LOG_ERROR("IDCHIP register does not match XMC1xxx.");
- return ERROR_FAIL;
- }
-
- LOG_DEBUG("IDCHIP = %08" PRIx32, idchip);
-
- retval = target_read_u32(bank->target, PAU_FLSIZE, &flsize);
- if (retval != ERROR_OK) {
- LOG_ERROR("Cannot read FLSIZE register.");
- return retval;
- }
-
- bank->num_sectors = 1 + ((flsize >> 12) & 0x3f) - 1;
- bank->size = bank->num_sectors * 4 * 1024;
- bank->sectors = calloc(bank->num_sectors,
- sizeof(struct flash_sector));
- for (i = 0; i < bank->num_sectors; i++) {
- if (i == 0) {
- bank->sectors[i].size = 0x200;
- bank->sectors[i].offset = 0xE00;
- flash_addr += 0x1000;
- } else {
- bank->sectors[i].size = 4 * 1024;
- bank->sectors[i].offset = flash_addr - bank->base;
- flash_addr += bank->sectors[i].size;
- }
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
- }
-
- xmc_bank->probed = true;
-
- return ERROR_OK;
-}
-
-static int xmc1xxx_auto_probe(struct flash_bank *bank)
-{
- struct xmc1xxx_flash_bank *xmc_bank = bank->driver_priv;
-
- if (xmc_bank->probed)
- return ERROR_OK;
-
- return xmc1xxx_probe(bank);
-}
-
-FLASH_BANK_COMMAND_HANDLER(xmc1xxx_flash_bank_command)
-{
- struct xmc1xxx_flash_bank *xmc_bank;
-
- xmc_bank = malloc(sizeof(struct xmc1xxx_flash_bank));
- if (!xmc_bank)
- return ERROR_FLASH_OPERATION_FAILED;
-
- xmc_bank->probed = false;
-
- bank->driver_priv = xmc_bank;
-
- return ERROR_OK;
-}
-
-static const struct command_registration xmc1xxx_exec_command_handlers[] = {
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration xmc1xxx_command_handlers[] = {
- {
- .name = "xmc1xxx",
- .mode = COMMAND_ANY,
- .help = "xmc1xxx flash command group",
- .usage = "",
- .chain = xmc1xxx_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver xmc1xxx_flash = {
- .name = "xmc1xxx",
- .commands = xmc1xxx_command_handlers,
- .flash_bank_command = xmc1xxx_flash_bank_command,
- .info = xmc1xxx_get_info_command,
- .probe = xmc1xxx_probe,
- .auto_probe = xmc1xxx_auto_probe,
- .protect_check = xmc1xxx_protect_check,
- .read = default_flash_read,
- .erase = xmc1xxx_erase,
- .erase_check = xmc1xxx_erase_check,
- .write = xmc1xxx_write,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/xmc4xxx.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/xmc4xxx.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/xmc4xxx.c
deleted file mode 100755
index 4fa273b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/xmc4xxx.c
+++ /dev/null
@@ -1,1444 +0,0 @@
-/**************************************************************************
-* Copyright (C) 2015 Jeff Ciesielski <je...@gmail.com> *
-* *
-* This program is free software; you can redistribute it and/or modify *
-* it under the terms of the GNU General Public License as published by *
-* the Free Software Foundation; either version 2 of the License, or *
-* (at your option) any later version. *
-* *
-* This program is distributed in the hope that it will be useful, *
-* but WITHOUT ANY WARRANTY; without even the implied warranty of *
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-* GNU General Public License for more details. *
-* *
-***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-/* Maximum number of sectors */
-#define MAX_XMC_SECTORS 12
-
-/* System control unit registers */
-#define SCU_REG_BASE 0x50004000
-
-#define SCU_ID_CHIP 0x04
-
-/* Base of the non-cached flash memory */
-#define PFLASH_BASE 0x0C000000
-
-/* User configuration block offsets */
-#define UCB0_BASE 0x00000000
-#define UCB1_BASE 0x00000400
-#define UCB2_BASE 0x00000800
-
-/* Flash register base */
-#define FLASH_REG_BASE 0x58000000
-
-/* PMU ID Registers */
-#define FLASH_REG_PMU_ID (FLASH_REG_BASE | 0x0508)
-
-/* PMU Fields */
-#define PMU_MOD_REV_MASK 0xFF
-#define PMU_MOD_TYPE_MASK 0xFF00
-#define PMU_MOD_NO_MASK 0xFFFF0000
-
-/* Prefetch Config */
-#define FLASH_REG_PREF_PCON (FLASH_REG_BASE | 0x4000)
-
-/* Prefetch Fields */
-#define PCON_IBYP (1 << 0)
-#define PCON_IINV (1 << 1)
-
-/* Flash ID Register */
-#define FLASH_REG_FLASH0_ID (FLASH_REG_BASE | 0x2008)
-
-/* Flash Status Register */
-#define FLASH_REG_FLASH0_FSR (FLASH_REG_BASE | 0x2010)
-
-#define FSR_PBUSY (0)
-#define FSR_FABUSY (1)
-#define FSR_PROG (4)
-#define FSR_ERASE (5)
-#define FSR_PFPAGE (6)
-#define FSR_PFOPER (8)
-#define FSR_SQER (10)
-#define FSR_PROER (11)
-#define FSR_PFSBER (12)
-#define FSR_PFDBER (14)
-#define FSR_PROIN (16)
-#define FSR_RPROIN (18)
-#define FSR_RPRODIS (19)
-#define FSR_WPROIN0 (21)
-#define FSR_WPROIN1 (22)
-#define FSR_WPROIN2 (23)
-#define FSR_WPRODIS0 (25)
-#define FSR_WPRODIS1 (26)
-#define FSR_SLM (28)
-#define FSR_VER (31)
-
-#define FSR_PBUSY_MASK (0x01 << FSR_PBUSY)
-#define FSR_FABUSY_MASK (0x01 << FSR_FABUSY)
-#define FSR_PROG_MASK (0x01 << FSR_PROG)
-#define FSR_ERASE_MASK (0x01 << FSR_ERASE)
-#define FSR_PFPAGE_MASK (0x01 << FSR_PFPAGE)
-#define FSR_PFOPER_MASK (0x01 << FSR_PFOPER)
-#define FSR_SQER_MASK (0x01 << FSR_SQER)
-#define FSR_PROER_MASK (0x01 << FSR_PROER)
-#define FSR_PFSBER_MASK (0x01 << FSR_PFSBER)
-#define FSR_PFDBER_MASK (0x01 << FSR_PFDBER)
-#define FSR_PROIN_MASK (0x01 << FSR_PROIN)
-#define FSR_RPROIN_MASK (0x01 << FSR_RPROIN)
-#define FSR_RPRODIS_MASK (0x01 << FSR_RPRODIS)
-#define FSR_WPROIN0_MASK (0x01 << FSR_WPROIN0)
-#define FSR_WPROIN1_MASK (0x01 << FSR_WPROIN1)
-#define FSR_WPROIN2_MASK (0x01 << FSR_WPROIN2)
-#define FSR_WPRODIS0_MASK (0x01 << FSR_WPRODIS0)
-#define FSR_WPRODIS1_MASK (0x01 << FSR_WPRODIS1)
-#define FSR_SLM_MASK (0x01 << FSR_SLM)
-#define FSR_VER_MASK (0x01 << FSR_VER)
-
-/* Flash Config Register */
-#define FLASH_REG_FLASH0_FCON (FLASH_REG_BASE | 0x2014)
-
-#define FCON_WSPFLASH (0)
-#define FCON_WSECPF (4)
-#define FCON_IDLE (13)
-#define FCON_ESLDIS (14)
-#define FCON_SLEEP (15)
-#define FCON_RPA (16)
-#define FCON_DCF (17)
-#define FCON_DDF (18)
-#define FCON_VOPERM (24)
-#define FCON_SQERM (25)
-#define FCON_PROERM (26)
-#define FCON_PFSBERM (27)
-#define FCON_PFDBERM (29)
-#define FCON_EOBM (31)
-
-#define FCON_WSPFLASH_MASK (0x0f << FCON_WSPFLASH)
-#define FCON_WSECPF_MASK (0x01 << FCON_WSECPF)
-#define FCON_IDLE_MASK (0x01 << FCON_IDLE)
-#define FCON_ESLDIS_MASK (0x01 << FCON_ESLDIS)
-#define FCON_SLEEP_MASK (0x01 << FCON_SLEEP)
-#define FCON_RPA_MASK (0x01 << FCON_RPA)
-#define FCON_DCF_MASK (0x01 << FCON_DCF)
-#define FCON_DDF_MASK (0x01 << FCON_DDF)
-#define FCON_VOPERM_MASK (0x01 << FCON_VOPERM)
-#define FCON_SQERM_MASK (0x01 << FCON_SQERM)
-#define FCON_PROERM_MASK (0x01 << FCON_PROERM)
-#define FCON_PFSBERM_MASK (0x01 << FCON_PFSBERM)
-#define FCON_PFDBERM_MASK (0x01 << FCON_PFDBERM)
-#define FCON_EOBM_MASK (0x01 << FCON_EOBM)
-
-/* Flash Margin Control Register */
-#define FLASH_REG_FLASH0_MARP (FLASH_REG_BASE | 0x2018)
-
-#define MARP_MARGIN (0)
-#define MARP_TRAPDIS (15)
-
-#define MARP_MARGIN_MASK (0x0f << MARP_MARGIN)
-#define MARP_TRAPDIS_MASK (0x01 << MARP_TRAPDIS)
-
-/* Flash Protection Registers */
-#define FLASH_REG_FLASH0_PROCON0 (FLASH_REG_BASE | 0x2020)
-#define FLASH_REG_FLASH0_PROCON1 (FLASH_REG_BASE | 0x2024)
-#define FLASH_REG_FLASH0_PROCON2 (FLASH_REG_BASE | 0x2028)
-
-#define PROCON_S0L (0)
-#define PROCON_S1L (1)
-#define PROCON_S2L (2)
-#define PROCON_S3L (3)
-#define PROCON_S4L (4)
-#define PROCON_S5L (5)
-#define PROCON_S6L (6)
-#define PROCON_S7L (7)
-#define PROCON_S8L (8)
-#define PROCON_S9L (9)
-#define PROCON_S10_S11L (10)
-#define PROCON_RPRO (15)
-
-#define PROCON_S0L_MASK (0x01 << PROCON_S0L)
-#define PROCON_S1L_MASK (0x01 << PROCON_S1L)
-#define PROCON_S2L_MASK (0x01 << PROCON_S2L)
-#define PROCON_S3L_MASK (0x01 << PROCON_S3L)
-#define PROCON_S4L_MASK (0x01 << PROCON_S4L)
-#define PROCON_S5L_MASK (0x01 << PROCON_S5L)
-#define PROCON_S6L_MASK (0x01 << PROCON_S6L)
-#define PROCON_S7L_MASK (0x01 << PROCON_S7L)
-#define PROCON_S8L_MASK (0x01 << PROCON_S8L)
-#define PROCON_S9L_MASK (0x01 << PROCON_S9L)
-#define PROCON_S10_S11L_MASK (0x01 << PROCON_S10_S11L)
-#define PROCON_RPRO_MASK (0x01 << PROCON_RPRO)
-
-#define FLASH_PROTECT_CONFIRMATION_CODE 0x8AFE15C3
-
-/* Flash controller configuration values */
-#define FLASH_ID_XMC4500 0xA2
-#define FLASH_ID_XMC4700_4800 0x92
-#define FLASH_ID_XMC4100_4200 0x9C
-#define FLASH_ID_XMC4400 0x9F
-
-/* Timeouts */
-#define FLASH_OP_TIMEOUT 5000
-
-/* Flash commands (write/erase/protect) are performed using special
- * command sequences that are written to magic addresses in the flash controller */
-/* Command sequence addresses. See reference manual, section 8: Flash Command Sequences */
-#define FLASH_CMD_ERASE_1 0x0C005554
-#define FLASH_CMD_ERASE_2 0x0C00AAA8
-#define FLASH_CMD_ERASE_3 FLASH_CMD_ERASE_1
-#define FLASH_CMD_ERASE_4 FLASH_CMD_ERASE_1
-#define FLASH_CMD_ERASE_5 FLASH_CMD_ERASE_2
-/* ERASE_6 is the sector base address */
-
-#define FLASH_CMD_CLEAR_STATUS FLASH_CMD_ERASE_1
-
-#define FLASH_CMD_ENTER_PAGEMODE FLASH_CMD_ERASE_1
-
-#define FLASH_CMD_LOAD_PAGE_1 0x0C0055F0
-#define FLASH_CMD_LOAD_PAGE_2 0x0C0055F4
-
-#define FLASH_CMD_WRITE_PAGE_1 FLASH_CMD_ERASE_1
-#define FLASH_CMD_WRITE_PAGE_2 FLASH_CMD_ERASE_2
-#define FLASH_CMD_WRITE_PAGE_3 FLASH_CMD_ERASE_1
-/* WRITE_PAGE_4 is the page base address */
-
-#define FLASH_CMD_TEMP_UNPROT_1 FLASH_CMD_ERASE_1
-#define FLASH_CMD_TEMP_UNPROT_2 FLASH_CMD_ERASE_2
-#define FLASH_CMD_TEMP_UNPROT_3 0x0C00553C
-#define FLASH_CMD_TEMP_UNPROT_4 FLASH_CMD_ERASE_2
-#define FLASH_CMD_TEMP_UNPROT_5 FLASH_CMD_ERASE_2
-#define FLASH_CMD_TEMP_UNPROT_6 0x0C005558
-
-struct xmc4xxx_flash_bank {
- bool probed;
-
- /* We need the flash controller ID to choose the sector layout */
- uint32_t fcon_id;
-
- /* Passwords used for protection operations */
- uint32_t pw1;
- uint32_t pw2;
- bool pw_set;
-
- /* Protection flags */
- bool read_protected;
-
- bool write_prot_otp[MAX_XMC_SECTORS];
-};
-
-struct xmc4xxx_command_seq {
- uint32_t address;
- uint32_t magic;
-};
-
-/* Sector capacities. See section 8 of xmc4x00_rm */
-static const unsigned int sector_capacity_8[8] = {
- 16, 16, 16, 16, 16, 16, 16, 128
-};
-
-static const unsigned int sector_capacity_9[9] = {
- 16, 16, 16, 16, 16, 16, 16, 128, 256
-};
-
-static const unsigned int sector_capacity_12[12] = {
- 16, 16, 16, 16, 16, 16, 16, 16, 128, 256, 256, 256
-};
-
-static const unsigned int sector_capacity_16[16] = {
- 16, 16, 16, 16, 16, 16, 16, 16, 128, 256, 256, 256, 256, 256, 256, 256
-};
-
-static int xmc4xxx_write_command_sequence(struct flash_bank *bank,
- struct xmc4xxx_command_seq *seq,
- int seq_len)
-{
- int res = ERROR_OK;
-
- for (int i = 0; i < seq_len; i++) {
- res = target_write_u32(bank->target, seq[i].address,
- seq[i].magic);
- if (res != ERROR_OK)
- return res;
- }
-
- return ERROR_OK;
-}
-
-static int xmc4xxx_load_bank_layout(struct flash_bank *bank)
-{
- const unsigned int *capacity = NULL;
-
- /* At this point, we know which flash controller ID we're
- * talking to and simply need to fill out the bank structure accordingly */
- LOG_DEBUG("%d sectors", bank->num_sectors);
-
- switch (bank->num_sectors) {
- case 8:
- capacity = sector_capacity_8;
- break;
- case 9:
- capacity = sector_capacity_9;
- break;
- case 12:
- capacity = sector_capacity_12;
- break;
- case 16:
- capacity = sector_capacity_16;
- break;
- default:
- LOG_ERROR("Unexpected number of sectors, %d\n",
- bank->num_sectors);
- return ERROR_FAIL;
- }
-
- /* This looks like a bank that we understand, now we know the
- * corresponding sector capacities and we can add those up into the
- * bank size. */
- uint32_t total_offset = 0;
- bank->sectors = calloc(bank->num_sectors,
- sizeof(struct flash_sector));
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].size = capacity[i] * 1024;
- bank->sectors[i].offset = total_offset;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = -1;
-
- bank->size += bank->sectors[i].size;
- LOG_DEBUG("\t%d: %uk", i, capacity[i]);
- total_offset += bank->sectors[i].size;
- }
-
- /* This part doesn't follow the typical standard of 0xff
- * being the default padding value.*/
- bank->default_padded_value = 0x00;
-
- return ERROR_OK;
-}
-
-static int xmc4xxx_probe(struct flash_bank *bank)
-{
- int res;
- uint32_t devid, config;
- struct xmc4xxx_flash_bank *fb = bank->driver_priv;
- uint8_t flash_id;
-
- if (fb->probed)
- return ERROR_OK;
-
- /* It's not possible for the DAP to access the OTP locations needed for
- * probing the part info and Flash geometry so we require that the target
- * be halted before proceeding. */
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* The SCU registers contain the ID of the chip */
- res = target_read_u32(bank->target, SCU_REG_BASE + SCU_ID_CHIP, &devid);
- if (res != ERROR_OK) {
- LOG_ERROR("Cannot read device identification register.");
- return res;
- }
-
- /* Make sure this is a XMC4000 family device */
- if ((devid & 0xF0000) != 0x40000 && devid != 0) {
- LOG_ERROR("Platform ID doesn't match XMC4xxx: 0x%08" PRIx32, devid);
- return ERROR_FAIL;
- }
-
- LOG_DEBUG("Found XMC4xxx with devid: 0x%08" PRIx32, devid);
-
- /* Now sanity-check the Flash controller itself. */
- res = target_read_u32(bank->target, FLASH_REG_FLASH0_ID,
- &config);
- if (res != ERROR_OK) {
- LOG_ERROR("Cannot read Flash bank configuration.");
- return res;
- }
- flash_id = (config & 0xff0000) >> 16;
-
- /* The Flash configuration register is our only means of
- * determining the sector layout. We need to make sure that
- * we understand the type of controller we're dealing with */
- switch (flash_id) {
- case FLASH_ID_XMC4100_4200:
- bank->num_sectors = 8;
- LOG_DEBUG("XMC4xxx: XMC4100/4200 detected.");
- break;
- case FLASH_ID_XMC4400:
- bank->num_sectors = 9;
- LOG_DEBUG("XMC4xxx: XMC4400 detected.");
- break;
- case FLASH_ID_XMC4500:
- bank->num_sectors = 12;
- LOG_DEBUG("XMC4xxx: XMC4500 detected.");
- break;
- case FLASH_ID_XMC4700_4800:
- bank->num_sectors = 16;
- LOG_DEBUG("XMC4xxx: XMC4700/4800 detected.");
- break;
- default:
- LOG_ERROR("XMC4xxx: Unexpected flash ID. got %02" PRIx8,
- flash_id);
- return ERROR_FAIL;
- }
-
- /* Retrieve information about the particular bank we're probing and fill in
- * the bank structure accordingly. */
- res = xmc4xxx_load_bank_layout(bank);
- if (res == ERROR_OK) {
- /* We're done */
- fb->probed = true;
- } else {
- LOG_ERROR("Unable to load bank information.");
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static int xmc4xxx_get_sector_start_addr(struct flash_bank *bank,
- int sector, uint32_t *ret_addr)
-{
- /* Make sure we understand this sector */
- if (sector > bank->num_sectors)
- return ERROR_FAIL;
-
- *ret_addr = bank->base + bank->sectors[sector].offset;
-
- return ERROR_OK;
-
-}
-
-static int xmc4xxx_clear_flash_status(struct flash_bank *bank)
-{
- int res;
- /* TODO: Do we need to check for sequence error? */
- LOG_INFO("Clearing flash status");
- res = target_write_u32(bank->target, FLASH_CMD_CLEAR_STATUS,
- 0xF5);
- if (res != ERROR_OK) {
- LOG_ERROR("Unable to write erase command sequence");
- return res;
- }
-
- return ERROR_OK;
-}
-
-static int xmc4xxx_get_flash_status(struct flash_bank *bank, uint32_t *status)
-{
- int res;
-
- res = target_read_u32(bank->target, FLASH_REG_FLASH0_FSR, status);
-
- if (res != ERROR_OK)
- LOG_ERROR("Cannot read flash status register.");
-
- return res;
-}
-
-static int xmc4xxx_wait_status_busy(struct flash_bank *bank, int timeout)
-{
- int res;
- uint32_t status;
-
- res = xmc4xxx_get_flash_status(bank, &status);
- if (res != ERROR_OK)
- return res;
-
- /* While the flash controller is busy, wait */
- while (status & FSR_PBUSY_MASK) {
- res = xmc4xxx_get_flash_status(bank, &status);
- if (res != ERROR_OK)
- return res;
-
- if (timeout-- <= 0) {
- LOG_ERROR("Timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- keep_alive();
- }
-
- if (status & FSR_PROER_MASK) {
- LOG_ERROR("XMC4xxx flash protected");
- res = ERROR_FAIL;
- }
-
- return res;
-}
-
-static int xmc4xxx_erase_sector(struct flash_bank *bank, uint32_t address,
- bool user_config)
-{
- int res;
- uint32_t status;
-
- /* See reference manual table 8.4: Command Sequences for Flash Control */
- struct xmc4xxx_command_seq erase_cmd_seq[6] = {
- {FLASH_CMD_ERASE_1, 0xAA},
- {FLASH_CMD_ERASE_2, 0x55},
- {FLASH_CMD_ERASE_3, 0x80},
- {FLASH_CMD_ERASE_4, 0xAA},
- {FLASH_CMD_ERASE_5, 0x55},
- {0xFF, 0xFF} /* Needs filled in */
- };
-
- /* We need to fill in the base address of the sector we'll be
- * erasing, as well as the magic code that determines whether
- * this is a standard flash sector or a user configuration block */
-
- erase_cmd_seq[5].address = address;
- if (user_config) {
- /* Removing flash protection requires the addition of
- * the base address */
- erase_cmd_seq[5].address += bank->base;
- erase_cmd_seq[5].magic = 0xC0;
- } else {
- erase_cmd_seq[5].magic = 0x30;
- }
-
- res = xmc4xxx_write_command_sequence(bank, erase_cmd_seq,
- ARRAY_SIZE(erase_cmd_seq));
- if (res != ERROR_OK)
- return res;
-
- /* Read the flash status register */
- res = target_read_u32(bank->target, FLASH_REG_FLASH0_FSR, &status);
- if (res != ERROR_OK) {
- LOG_ERROR("Cannot read flash status register.");
- return res;
- }
-
- /* Check for a sequence error */
- if (status & FSR_SQER_MASK) {
- LOG_ERROR("Error with flash erase sequence");
- return ERROR_FAIL;
- }
-
- /* Make sure a flash erase was triggered */
- if (!(status & FSR_ERASE_MASK)) {
- LOG_ERROR("Flash failed to erase");
- return ERROR_FAIL;
- }
-
- /* Now we must wait for the erase operation to end */
- res = xmc4xxx_wait_status_busy(bank, FLASH_OP_TIMEOUT);
-
- return res;
-}
-
-static int xmc4xxx_erase(struct flash_bank *bank, int first, int last)
-{
- struct xmc4xxx_flash_bank *fb = bank->driver_priv;
- int res;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Unable to erase, target is not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!fb->probed) {
- res = xmc4xxx_probe(bank);
- if (res != ERROR_OK)
- return res;
- }
-
- uint32_t tmp_addr;
- /* Loop through the sectors and erase each one */
- for (int i = first; i <= last; i++) {
- res = xmc4xxx_get_sector_start_addr(bank, i, &tmp_addr);
- if (res != ERROR_OK) {
- LOG_ERROR("Invalid sector %d", i);
- return res;
- }
-
- LOG_DEBUG("Erasing sector %d @ 0x%08"PRIx32, i, tmp_addr);
-
- res = xmc4xxx_erase_sector(bank, tmp_addr, false);
- if (res != ERROR_OK) {
- LOG_ERROR("Unable to write erase command sequence");
- goto clear_status_and_exit;
- }
-
- /* Now we must wait for the erase operation to end */
- res = xmc4xxx_wait_status_busy(bank, FLASH_OP_TIMEOUT);
-
- if (res != ERROR_OK)
- goto clear_status_and_exit;
-
- bank->sectors[i].is_erased = 1;
- }
-
-clear_status_and_exit:
- res = xmc4xxx_clear_flash_status(bank);
- return res;
-
-}
-
-static int xmc4xxx_enter_page_mode(struct flash_bank *bank)
-{
- int res;
- uint32_t status;
-
- res = target_write_u32(bank->target, FLASH_CMD_ENTER_PAGEMODE, 0x50);
- if (res != ERROR_OK) {
- LOG_ERROR("Unable to write enter page mode command");
- return ERROR_FAIL;
- }
-
- res = xmc4xxx_get_flash_status(bank, &status);
-
- if (res != ERROR_OK)
- return res;
-
- /* Make sure we're in page mode */
- if (!(status & FSR_PFPAGE_MASK)) {
- LOG_ERROR("Unable to enter page mode");
- return ERROR_FAIL;
- }
-
- /* Make sure we didn't encounter a sequence error */
- if (status & FSR_SQER_MASK) {
- LOG_ERROR("Sequence error while entering page mode");
- return ERROR_FAIL;
- }
-
- return res;
-}
-
-/* The logical erase value of an xmc4xxx memory cell is 0x00,
- * therefore, we cannot use the built in flash blank check and must
- * implement our own */
-
-/** Checks whether a memory region is zeroed. */
-static int xmc4xxx_blank_check_memory(struct target *target,
- uint32_t address, uint32_t count, uint32_t *blank)
-{
- struct working_area *erase_check_algorithm;
- struct reg_param reg_params[3];
- struct armv7m_algorithm armv7m_info;
- int retval;
-
- static const uint8_t erase_check_code[] = {
-#include "../../../contrib/loaders/erase_check/armv7m_0_erase_check.inc"
- };
-
- /* make sure we have a working area */
- if (target_alloc_working_area(target, sizeof(erase_check_code),
- &erase_check_algorithm) != ERROR_OK)
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-
- retval = target_write_buffer(target, erase_check_algorithm->address,
- sizeof(erase_check_code), (uint8_t *)erase_check_code);
- if (retval != ERROR_OK)
- goto cleanup;
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- buf_set_u32(reg_params[0].value, 0, 32, address);
-
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- buf_set_u32(reg_params[1].value, 0, 32, count);
-
- init_reg_param(®_params[2], "r2", 32, PARAM_IN_OUT);
- buf_set_u32(reg_params[2].value, 0, 32, 0x00);
-
- retval = target_run_algorithm(target,
- 0,
- NULL,
- 3,
- reg_params,
- erase_check_algorithm->address,
- erase_check_algorithm->address + (sizeof(erase_check_code) - 2),
- 10000,
- &armv7m_info);
-
- if (retval == ERROR_OK)
- *blank = buf_get_u32(reg_params[2].value, 0, 32);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
-cleanup:
- target_free_working_area(target, erase_check_algorithm);
-
- return retval;
-}
-
-static int xmc4xxx_flash_blank_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- int i;
- int retval = ERROR_OK;
- uint32_t blank;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- for (i = 0; i < bank->num_sectors; i++) {
- uint32_t address = bank->base + bank->sectors[i].offset;
- uint32_t size = bank->sectors[i].size;
-
- LOG_DEBUG("Erase checking 0x%08"PRIx32, address);
- retval = xmc4xxx_blank_check_memory(target, address, size, &blank);
-
- if (retval != ERROR_OK)
- break;
-
- if (blank == 0x00)
- bank->sectors[i].is_erased = 1;
- else
- bank->sectors[i].is_erased = 0;
- }
-
- return retval;
-}
-
-static int xmc4xxx_write_page(struct flash_bank *bank, const uint8_t *pg_buf,
- uint32_t offset, bool user_config)
-{
- int res;
- uint32_t status;
-
- /* Base of the flash write command */
- struct xmc4xxx_command_seq write_cmd_seq[4] = {
- {FLASH_CMD_WRITE_PAGE_1, 0xAA},
- {FLASH_CMD_WRITE_PAGE_2, 0x55},
- {FLASH_CMD_WRITE_PAGE_3, 0xFF}, /* Needs filled in */
- {0xFF, 0xFF} /* Needs filled in */
- };
-
- /* The command sequence differs depending on whether this is
- * being written to standard flash or the user configuration
- * area */
- if (user_config)
- write_cmd_seq[2].magic = 0xC0;
- else
- write_cmd_seq[2].magic = 0xA0;
-
- /* Finally, we need to add the address that this page will be
- * written to */
- write_cmd_seq[3].address = bank->base + offset;
- write_cmd_seq[3].magic = 0xAA;
-
-
- /* Flash pages are written 256 bytes at a time. For each 256
- * byte chunk, we need to:
- * 1. Enter page mode. This activates the flash write buffer
- * 2. Load the page buffer with data (2x 32 bit words at a time)
- * 3. Burn the page buffer into its intended location
- * If the starting offset is not on a 256 byte boundary, we
- * will need to pad the beginning of the write buffer
- * accordingly. Likewise, if the last page does not fill the
- * buffer, we should pad it to avoid leftover data from being
- * written to flash
- */
- res = xmc4xxx_enter_page_mode(bank);
- if (res != ERROR_OK)
- return res;
-
- /* Copy the data into the page buffer*/
- for (int i = 0; i < 256; i += 8) {
- uint32_t w_lo = target_buffer_get_u32(bank->target, &pg_buf[i]);
- uint32_t w_hi = target_buffer_get_u32(bank->target, &pg_buf[i + 4]);
- LOG_DEBUG("WLO: %08"PRIx32, w_lo);
- LOG_DEBUG("WHI: %08"PRIx32, w_hi);
-
- /* Data is loaded 2x 32 bit words at a time */
- res = target_write_u32(bank->target, FLASH_CMD_LOAD_PAGE_1, w_lo);
- if (res != ERROR_OK)
- return res;
-
- res = target_write_u32(bank->target, FLASH_CMD_LOAD_PAGE_2, w_hi);
- if (res != ERROR_OK)
- return res;
-
- /* Check for an error */
- res = xmc4xxx_get_flash_status(bank, &status);
- if (res != ERROR_OK)
- return res;
-
- if (status & FSR_SQER_MASK) {
- LOG_ERROR("Error loading page buffer");
- return ERROR_FAIL;
- }
- }
-
- /* The page buffer is now full, time to commit it to flash */
-
- res = xmc4xxx_write_command_sequence(bank, write_cmd_seq, ARRAY_SIZE(write_cmd_seq));
- if (res != ERROR_OK) {
- LOG_ERROR("Unable to enter write command sequence");
- return res;
- }
-
- /* Read the flash status register */
- res = xmc4xxx_get_flash_status(bank, &status);
- if (res != ERROR_OK)
- return res;
-
- /* Check for a sequence error */
- if (status & FSR_SQER_MASK) {
- LOG_ERROR("Error with flash write sequence");
- return ERROR_FAIL;
- }
-
- /* Make sure a flash write was triggered */
- if (!(status & FSR_PROG_MASK)) {
- LOG_ERROR("Failed to write flash page");
- return ERROR_FAIL;
- }
-
- /* Wait for the write operation to end */
- res = xmc4xxx_wait_status_busy(bank, FLASH_OP_TIMEOUT);
- if (res != ERROR_OK)
- return res;
-
- /* TODO: Verify that page was written without error */
- return res;
-}
-
-static int xmc4xxx_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct xmc4xxx_flash_bank *fb = bank->driver_priv;
- int res = ERROR_OK;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Unable to erase, target is not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!fb->probed) {
- res = xmc4xxx_probe(bank);
- if (res != ERROR_OK)
- return res;
- }
-
- /* Make sure we won't run off the end of the flash bank */
- if ((offset + count) > (bank->size)) {
- LOG_ERROR("Attempting to write past the end of flash");
- return ERROR_FAIL;
- }
-
-
- /* Attempt to write the passed in buffer to flash */
- /* Pages are written 256 bytes at a time, we need to handle
- * scenarios where padding is required at the beginning and
- * end of a page */
- while (count) {
- /* page working area */
- uint8_t tmp_buf[256] = {0};
-
- /* Amount of data we'll be writing to this page */
- int remaining;
- int end_pad;
-
- remaining = MIN(count, sizeof(tmp_buf));
- end_pad = sizeof(tmp_buf) - remaining;
-
- /* Make sure we're starting on a page boundary */
- int start_pad = offset % 256;
- if (start_pad) {
- LOG_INFO("Write does not start on a 256 byte boundary. "
- "Padding by %d bytes", start_pad);
- memset(tmp_buf, 0xff, start_pad);
- /* Subtract the amount of start offset from
- * the amount of data we'll need to write */
- remaining -= start_pad;
- }
-
- /* Remove the amount we'll be writing from the total count */
- count -= remaining;
-
- /* Now copy in the remaining data */
- memcpy(&tmp_buf[start_pad], buffer, remaining);
-
- if (end_pad) {
- LOG_INFO("Padding end of page @%08"PRIx32" by %d bytes",
- bank->base + offset, end_pad);
- memset(&tmp_buf[256 - end_pad], 0xff, end_pad);
- }
-
- /* Now commit this page to flash, if there was start
- * padding, we should subtract that from the target offset */
- res = xmc4xxx_write_page(bank, tmp_buf, (offset - start_pad), false);
- if (res != ERROR_OK) {
- LOG_ERROR("Unable to write flash page");
- goto abort_write_and_exit;
- }
-
- /* Advance the buffer pointer */
- buffer += remaining;
-
- /* Advance the offset */
- offset += remaining;
- }
-
-abort_write_and_exit:
- xmc4xxx_clear_flash_status(bank);
- return res;
-
-}
-
-static int xmc4xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct xmc4xxx_flash_bank *fb = bank->driver_priv;
- uint32_t scu_idcode;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* The SCU registers contain the ID of the chip */
- int res = target_read_u32(bank->target, SCU_REG_BASE + SCU_ID_CHIP, &scu_idcode);
- if (res != ERROR_OK) {
- LOG_ERROR("Cannot read device identification register.");
- return res;
- }
-
- uint16_t dev_id = (scu_idcode & 0xfff0) >> 4;
- uint16_t rev_id = scu_idcode & 0xf;
- const char *dev_str;
- const char *rev_str = NULL;
-
- switch (dev_id) {
- case 0x100:
- dev_str = "XMC4100";
-
- switch (rev_id) {
- case 0x1:
- rev_str = "AA";
- break;
- case 0x2:
- rev_str = "AB";
- break;
- }
- break;
- case 0x200:
- dev_str = "XMC4200";
-
- switch (rev_id) {
- case 0x1:
- rev_str = "AA";
- break;
- case 0x2:
- rev_str = "AB";
- break;
- }
- break;
- case 0x400:
- dev_str = "XMC4400";
-
- switch (rev_id) {
- case 0x1:
- rev_str = "AA";
- break;
- case 0x2:
- rev_str = "AB";
- break;
- }
- break;
- case 0:
- /* XMC4500 EES AA13 with date codes before GE212
- * had zero SCU_IDCHIP
- */
- dev_str = "XMC4500 EES";
- rev_str = "AA13";
- break;
- case 0x500:
- dev_str = "XMC4500";
-
- switch (rev_id) {
- case 0x2:
- rev_str = "AA";
- break;
- case 0x3:
- rev_str = "AB";
- break;
- case 0x4:
- rev_str = "AC";
- break;
- }
- break;
- case 0x700:
- dev_str = "XMC4700";
-
- switch (rev_id) {
- case 0x1:
- rev_str = "EES-AA";
- break;
- }
- break;
- case 0x800:
- dev_str = "XMC4800";
-
- switch (rev_id) {
- case 0x1:
- rev_str = "EES-AA";
- break;
- }
- break;
-
- default:
- snprintf(buf, buf_size,
- "Cannot identify target as an XMC4xxx. SCU_ID: %"PRIx32"\n",
- scu_idcode);
- return ERROR_OK;
- }
-
- /* String to declare protection data held in the private driver */
- char prot_str[512] = {0};
- if (fb->read_protected)
- snprintf(prot_str, sizeof(prot_str), "\nFlash is read protected");
-
- bool otp_enabled = false;
- for (int i = 0; i < bank->num_sectors; i++)
- if (fb->write_prot_otp[i])
- otp_enabled = true;
-
- /* If OTP Write protection is enabled (User 2), list each
- * sector that has it enabled */
- char otp_str[8];
- if (otp_enabled) {
- strcat(prot_str, "\nOTP Protection is enabled for sectors:\n");
- for (int i = 0; i < bank->num_sectors; i++) {
- if (fb->write_prot_otp[i]) {
- snprintf(otp_str, sizeof(otp_str), "- %d\n", i);
- strncat(prot_str, otp_str, ARRAY_SIZE(otp_str));
- }
- }
- }
-
- if (rev_str != NULL)
- snprintf(buf, buf_size, "%s - Rev: %s%s",
- dev_str, rev_str, prot_str);
- else
- snprintf(buf, buf_size, "%s - Rev: unknown (0x%01x)%s",
- dev_str, rev_id, prot_str);
-
- return ERROR_OK;
-}
-
-static int xmc4xxx_temp_unprotect(struct flash_bank *bank, int user_level)
-{
- struct xmc4xxx_flash_bank *fb;
- int res = ERROR_OK;
- uint32_t status = 0;
-
- struct xmc4xxx_command_seq temp_unprot_seq[6] = {
- {FLASH_CMD_TEMP_UNPROT_1, 0xAA},
- {FLASH_CMD_TEMP_UNPROT_2, 0x55},
- {FLASH_CMD_TEMP_UNPROT_3, 0xFF}, /* Needs filled in */
- {FLASH_CMD_TEMP_UNPROT_4, 0xFF}, /* Needs filled in */
- {FLASH_CMD_TEMP_UNPROT_5, 0xFF}, /* Needs filled in */
- {FLASH_CMD_TEMP_UNPROT_6, 0x05}
- };
-
- if (user_level < 0 || user_level > 2) {
- LOG_ERROR("Invalid user level, must be 0-2");
- return ERROR_FAIL;
- }
-
- fb = bank->driver_priv;
-
- /* Fill in the user level and passwords */
- temp_unprot_seq[2].magic = user_level;
- temp_unprot_seq[3].magic = fb->pw1;
- temp_unprot_seq[4].magic = fb->pw2;
-
- res = xmc4xxx_write_command_sequence(bank, temp_unprot_seq,
- ARRAY_SIZE(temp_unprot_seq));
- if (res != ERROR_OK) {
- LOG_ERROR("Unable to write temp unprotect sequence");
- return res;
- }
-
- res = xmc4xxx_get_flash_status(bank, &status);
- if (res != ERROR_OK)
- return res;
-
- if (status & FSR_WPRODIS0) {
- LOG_INFO("Flash is temporarily unprotected");
- } else {
- LOG_INFO("Unable to disable flash protection");
- res = ERROR_FAIL;
- }
-
-
- return res;
-}
-
-static int xmc4xxx_flash_unprotect(struct flash_bank *bank, int32_t level)
-{
- uint32_t addr;
- int res;
-
- if ((level < 0) || (level > 1)) {
- LOG_ERROR("Invalid user level. Must be 0-1");
- return ERROR_FAIL;
- }
-
- switch (level) {
- case 0:
- addr = UCB0_BASE;
- break;
- case 1:
- addr = UCB1_BASE;
- break;
- }
-
- res = xmc4xxx_erase_sector(bank, addr, true);
-
- if (res != ERROR_OK)
- LOG_ERROR("Error erasing user configuration block");
-
- return res;
-}
-
-/* Reference: "XMC4500 Flash Protection.pptx" app note */
-static int xmc4xxx_flash_protect(struct flash_bank *bank, int level, bool read_protect,
- int first, int last)
-{
- /* User configuration block buffers */
- uint8_t ucp0_buf[8 * sizeof(uint32_t)] = {0};
- uint32_t ucb_base = 0;
- uint32_t procon = 0;
- int res = ERROR_OK;
- uint32_t status = 0;
- bool proin = false;
-
- struct xmc4xxx_flash_bank *fb = bank->driver_priv;
-
- /* Read protect only works for user 0, make sure we don't try
- * to do something silly */
- if (level != 0 && read_protect) {
- LOG_ERROR("Read protection is for user level 0 only!");
- return ERROR_FAIL;
- }
-
- /* Check to see if protection is already installed for the
- * specified user level. If it is, the user configuration
- * block will need to be erased before we can continue */
-
- /* Grab the flash status register*/
- res = xmc4xxx_get_flash_status(bank, &status);
- if (res != ERROR_OK)
- return res;
-
- switch (level) {
- case 0:
- if ((status & FSR_RPROIN_MASK) || (status & FSR_WPROIN0_MASK))
- proin = true;
- break;
- case 1:
- if (status & FSR_WPROIN1_MASK)
- proin = true;
- break;
- case 2:
- if (status & FSR_WPROIN2_MASK)
- proin = true;
- break;
- }
-
- if (proin) {
- LOG_ERROR("Flash protection is installed for user %d"
- " and must be removed before continuing", level);
- return ERROR_FAIL;
- }
-
- /* If this device has 12 flash sectors, protection for
- * sectors 10 & 11 are handled jointly. If we are trying to
- * write all sectors, we should decrement
- * last to ensure we don't write to a register bit that
- * doesn't exist*/
- if ((bank->num_sectors == 12) && (last == 12))
- last--;
-
- /* We need to fill out the procon register representation
- * that we will be writing to the device */
- for (int i = first; i <= last; i++)
- procon |= 1 << i;
-
- /* If read protection is requested, set the appropriate bit
- * (we checked that this is allowed above) */
- if (read_protect)
- procon |= PROCON_RPRO_MASK;
-
- LOG_DEBUG("Setting flash protection with procon:");
- LOG_DEBUG("PROCON: %"PRIx32, procon);
-
- /* First we need to copy in the procon register to the buffer
- * we're going to attempt to write. This is written twice */
- target_buffer_set_u32(bank->target, &ucp0_buf[0 * 4], procon);
- target_buffer_set_u32(bank->target, &ucp0_buf[2 * 4], procon);
-
- /* Now we must copy in both flash passwords. As with the
- * procon data, this must be written twice (4 total words
- * worth of data) */
- target_buffer_set_u32(bank->target, &ucp0_buf[4 * 4], fb->pw1);
- target_buffer_set_u32(bank->target, &ucp0_buf[5 * 4], fb->pw2);
- target_buffer_set_u32(bank->target, &ucp0_buf[6 * 4], fb->pw1);
- target_buffer_set_u32(bank->target, &ucp0_buf[7 * 4], fb->pw2);
-
- /* Finally, (if requested) we copy in the confirmation
- * code so that the protection is permanent and will
- * require a password to undo. */
- target_buffer_set_u32(bank->target, &ucp0_buf[0 * 4], FLASH_PROTECT_CONFIRMATION_CODE);
- target_buffer_set_u32(bank->target, &ucp0_buf[2 * 4], FLASH_PROTECT_CONFIRMATION_CODE);
-
- /* Now that the data is copied into place, we must write
- * these pages into flash */
-
- /* The user configuration block base depends on what level of
- * protection we're trying to install, select the proper one */
- switch (level) {
- case 0:
- ucb_base = UCB0_BASE;
- break;
- case 1:
- ucb_base = UCB1_BASE;
- break;
- case 2:
- ucb_base = UCB2_BASE;
- break;
- }
-
- /* Write the user config pages */
- res = xmc4xxx_write_page(bank, ucp0_buf, ucb_base, true);
- if (res != ERROR_OK) {
- LOG_ERROR("Error writing user configuration block 0");
- return res;
- }
-
- return ERROR_OK;
-}
-
-static int xmc4xxx_protect(struct flash_bank *bank, int set, int first, int last)
-{
- int ret;
- struct xmc4xxx_flash_bank *fb = bank->driver_priv;
-
- /* Check for flash passwords */
- if (!fb->pw_set) {
- LOG_ERROR("Flash passwords not set, use xmc4xxx flash_password to set them");
- return ERROR_FAIL;
- }
-
- /* We want to clear flash protection temporarily*/
- if (set == 0) {
- LOG_WARNING("Flash protection will be temporarily disabled"
- " for all pages (User 0 only)!");
- ret = xmc4xxx_temp_unprotect(bank, 0);
- return ret;
- }
-
- /* Install write protection for user 0 on the specified pages */
- ret = xmc4xxx_flash_protect(bank, 0, false, first, last);
-
- return ret;
-}
-
-static int xmc4xxx_protect_check(struct flash_bank *bank)
-{
- int ret;
- uint32_t protection[3] = {0};
- struct xmc4xxx_flash_bank *fb = bank->driver_priv;
-
- ret = target_read_u32(bank->target, FLASH_REG_FLASH0_PROCON0, &protection[0]);
- if (ret != ERROR_OK) {
- LOG_ERROR("Unable to read flash User0 protection register");
- return ret;
- }
-
- ret = target_read_u32(bank->target, FLASH_REG_FLASH0_PROCON1, &protection[1]);
- if (ret != ERROR_OK) {
- LOG_ERROR("Unable to read flash User1 protection register");
- return ret;
- }
-
- ret = target_read_u32(bank->target, FLASH_REG_FLASH0_PROCON2, &protection[2]);
- if (ret != ERROR_OK) {
- LOG_ERROR("Unable to read flash User2 protection register");
- return ret;
- }
-
- int sectors = bank->num_sectors;
-
- /* On devices with 12 sectors, sectors 10 & 11 are ptected
- * together instead of individually */
- if (sectors == 12)
- sectors--;
-
- /* Clear the protection status */
- for (int i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].is_protected = 0;
- fb->write_prot_otp[i] = false;
- }
- fb->read_protected = false;
-
- /* The xmc4xxx series supports 3 levels of user protection
- * (User0, User1 (low priority), and User 2(OTP), we need to
- * check all 3 */
- for (unsigned int i = 0; i < ARRAY_SIZE(protection); i++) {
-
- /* Check for write protection on every available
- * sector */
- for (int j = 0; j < sectors; j++) {
- int set = (protection[i] & (1 << j)) ? 1 : 0;
- bank->sectors[j].is_protected |= set;
-
- /* Handle sector 11 */
- if (j == 10)
- bank->sectors[j + 1].is_protected |= set;
-
- /* User 2 indicates this protection is
- * permanent, make note in the private driver structure */
- if (i == 2 && set) {
- fb->write_prot_otp[j] = true;
-
- /* Handle sector 11 */
- if (j == 10)
- fb->write_prot_otp[j + 1] = true;
- }
-
- }
- }
-
- /* XMC4xxx also supports read proptection, make a note
- * in the private driver structure */
- if (protection[0] & PROCON_RPRO_MASK)
- fb->read_protected = true;
-
- return ERROR_OK;
-}
-
-FLASH_BANK_COMMAND_HANDLER(xmc4xxx_flash_bank_command)
-{
- bank->driver_priv = malloc(sizeof(struct xmc4xxx_flash_bank));
-
- if (!bank->driver_priv)
- return ERROR_FLASH_OPERATION_FAILED;
-
- (void)memset(bank->driver_priv, 0, sizeof(struct xmc4xxx_flash_bank));
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(xmc4xxx_handle_flash_password_command)
-{
- int res;
- struct flash_bank *bank;
-
- if (CMD_ARGC < 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- res = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (res != ERROR_OK)
- return res;
-
- struct xmc4xxx_flash_bank *fb = bank->driver_priv;
-
- errno = 0;
-
- /* We skip over the flash bank */
- fb->pw1 = strtol(CMD_ARGV[1], NULL, 16);
-
- if (errno)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- fb->pw2 = strtol(CMD_ARGV[2], NULL, 16);
-
- if (errno)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- fb->pw_set = true;
-
- command_print(CMD_CTX, "XMC4xxx flash passwords set to:\n");
- command_print(CMD_CTX, "-0x%08"PRIx32"\n", fb->pw1);
- command_print(CMD_CTX, "-0x%08"PRIx32"\n", fb->pw2);
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(xmc4xxx_handle_flash_unprotect_command)
-{
- struct flash_bank *bank;
- int res;
- int32_t level;
-
- if (CMD_ARGC < 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- res = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (res != ERROR_OK)
- return res;
-
- COMMAND_PARSE_NUMBER(s32, CMD_ARGV[1], level);
-
- res = xmc4xxx_flash_unprotect(bank, level);
-
- return res;
-}
-
-static const struct command_registration xmc4xxx_exec_command_handlers[] = {
- {
- .name = "flash_password",
- .handler = xmc4xxx_handle_flash_password_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id password1 password2",
- .help = "Set the flash passwords used for protect operations. "
- "Passwords should be in standard hex form (0x00000000). "
- "(You must call this before any other protect commands) "
- "NOTE: The xmc4xxx's UCB area only allows for FOUR cycles. "
- "Please use protection carefully!",
- },
- {
- .name = "flash_unprotect",
- .handler = xmc4xxx_handle_flash_unprotect_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id user_level[0-1]",
- .help = "Permanently Removes flash protection (read and write) "
- "for the specified user level",
- }, COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration xmc4xxx_command_handlers[] = {
- {
- .name = "xmc4xxx",
- .mode = COMMAND_ANY,
- .help = "xmc4xxx flash command group",
- .usage = "",
- .chain = xmc4xxx_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver xmc4xxx_flash = {
- .name = "xmc4xxx",
- .commands = xmc4xxx_command_handlers,
- .flash_bank_command = xmc4xxx_flash_bank_command,
- .erase = xmc4xxx_erase,
- .write = xmc4xxx_write,
- .read = default_flash_read,
- .probe = xmc4xxx_probe,
- .auto_probe = xmc4xxx_probe,
- .erase_check = xmc4xxx_flash_blank_check,
- .info = xmc4xxx_get_info_command,
- .protect_check = xmc4xxx_protect_check,
- .protect = xmc4xxx_protect,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/startup.tcl
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/startup.tcl b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/startup.tcl
deleted file mode 100755
index fbb8d8e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/startup.tcl
+++ /dev/null
@@ -1,110 +0,0 @@
-# Defines basic Tcl procs for OpenOCD flash module
-
-#
-# program utility proc
-# usage: program filename
-# optional args: verify, reset, exit and address
-#
-
-proc program_error {description exit} {
- if {$exit == 1} {
- echo $description
- shutdown error
- }
-
- error $description
-}
-
-proc program {filename args} {
- set exit 0
-
- foreach arg $args {
- if {[string equal $arg "verify"]} {
- set verify 1
- } elseif {[string equal $arg "reset"]} {
- set reset 1
- } elseif {[string equal $arg "exit"]} {
- set exit 1
- } else {
- set address $arg
- }
- }
-
- # make sure init is called
- if {[catch {init}] != 0} {
- program_error "** OpenOCD init failed **" 1
- }
-
- # reset target and call any init scripts
- if {[catch {reset init}] != 0} {
- program_error "** Unable to reset target **" $exit
- }
-
- # start programming phase
- echo "** Programming Started **"
- if {[info exists address]} {
- set flash_args "$filename $address"
- } else {
- set flash_args "$filename"
- }
-
- if {[catch {eval flash write_image erase $flash_args}] == 0} {
- echo "** Programming Finished **"
- if {[info exists verify]} {
- # verify phase
- echo "** Verify Started **"
- if {[catch {eval verify_image $flash_args}] == 0} {
- echo "** Verified OK **"
- } else {
- program_error "** Verify Failed **" $exit
- }
- }
-
- if {[info exists reset]} {
- # reset target if requested
- # also disable target polling, we are shutting down anyway
- poll off
- echo "** Resetting Target **"
- reset run
- }
- } else {
- program_error "** Programming Failed **" $exit
- }
-
- if {$exit == 1} {
- shutdown
- }
- return
-}
-
-add_help_text program "write an image to flash, address is only required for binary images. verify, reset, exit are optional"
-add_usage_text program "<filename> \[address\] \[verify\] \[reset\] \[exit\]"
-
-# stm32f0x uses the same flash driver as the stm32f1x
-# this alias enables the use of either name.
-proc stm32f0x args {
- eval stm32f1x $args
-}
-
-# stm32f3x uses the same flash driver as the stm32f1x
-# this alias enables the use of either name.
-proc stm32f3x args {
- eval stm32f1x $args
-}
-
-# stm32f4x uses the same flash driver as the stm32f2x
-# this alias enables the use of either name.
-proc stm32f4x args {
- eval stm32f2x $args
-}
-
-# ease migration to updated flash driver
-proc stm32x args {
- echo "DEPRECATED! use 'stm32f1x $args' not 'stm32x $args'"
- eval stm32f1x $args
-}
-
-proc stm32f2xxx args {
- echo "DEPRECATED! use 'stm32f2x $args' not 'stm32f2xxx $args'"
- eval stm32f2x $args
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/hello.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/hello.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/hello.c
deleted file mode 100755
index f103ed2..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/hello.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include <config.h>
-#endif
-#include <helper/log.h>
-
-COMMAND_HANDLER(handle_foo_command)
-{
- if (CMD_ARGC < 1 || CMD_ARGC > 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- uint32_t address;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
-
- const char *msg = "<unchanged>";
- if (CMD_ARGC == 2) {
- bool enable;
- COMMAND_PARSE_ENABLE(CMD_ARGV[1], enable);
- msg = enable ? "enable" : "disable";
- }
-
- LOG_INFO("%s: address=0x%8.8" PRIx32 " enabled=%s", CMD_NAME, address, msg);
- return ERROR_OK;
-}
-
-static bool foo_flag;
-
-COMMAND_HANDLER(handle_flag_command)
-{
- return CALL_COMMAND_HANDLER(handle_command_parse_bool,
- &foo_flag, "foo flag");
-}
-
-static const struct command_registration foo_command_handlers[] = {
- {
- .name = "bar",
- .handler = &handle_foo_command,
- .mode = COMMAND_ANY,
- .usage = "address ['enable'|'disable']",
- .help = "an example command",
- },
- {
- .name = "baz",
- .handler = &handle_foo_command,
- .mode = COMMAND_ANY,
- .usage = "address ['enable'|'disable']",
- .help = "a sample command",
- },
- {
- .name = "flag",
- .handler = &handle_flag_command,
- .mode = COMMAND_ANY,
- .usage = "[on|off]",
- .help = "set a flag",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static COMMAND_HELPER(handle_hello_args, const char **sep, const char **name)
-{
- if (CMD_ARGC > 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
- if (1 == CMD_ARGC) {
- *sep = " ";
- *name = CMD_ARGV[0];
- } else
- *sep = *name = "";
-
- return ERROR_OK;
-}
-COMMAND_HANDLER(handle_hello_command)
-{
- const char *sep, *name;
- int retval = CALL_COMMAND_HANDLER(handle_hello_args, &sep, &name);
- if (ERROR_OK == retval)
- command_print(CMD_CTX, "Greetings%s%s!", sep, name);
- return retval;
-}
-
-const struct command_registration hello_command_handlers[] = {
- {
- .name = "hello",
- .handler = handle_hello_command,
- .mode = COMMAND_ANY,
- .help = "prints a warm welcome",
- .usage = "[name]",
- },
- {
- .name = "foo",
- .mode = COMMAND_ANY,
- .help = "example command handler skeleton",
-
- .chain = foo_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/hello.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/hello.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/hello.h
deleted file mode 100755
index d066951..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/hello.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef OPENOCD_HELLO_H
-#define OPENOCD_HELLO_H
-
-struct command_registration;
-
-/**
- * Export the registration for the hello command group, so it can be
- * embedded in example drivers.
- */
-extern const struct command_registration hello_command_handlers[];
-
-#endif /* OPENOCD_HELLO_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/Makefile.am
deleted file mode 100755
index 64caf98..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/Makefile.am
+++ /dev/null
@@ -1,56 +0,0 @@
-include $(top_srcdir)/common.mk
-
-METASOURCES = AUTO
-noinst_LTLIBRARIES = libhelper.la
-
-CONFIGFILES = options.c time_support_common.c
-
-libhelper_la_CPPFLAGS = $(AM_CPPFLAGS) $(LIBUSB1_CFLAGS)
-
-libhelper_la_SOURCES = \
- binarybuffer.c \
- $(CONFIGFILES) \
- configuration.c \
- log.c \
- command.c \
- time_support.c \
- replacements.c \
- fileio.c \
- util.c \
- jep106.c \
- jim-nvp.c
-
-if IOUTIL
-libhelper_la_SOURCES += ioutil.c
-else
-libhelper_la_SOURCES += ioutil_stubs.c
-endif
-
-libhelper_la_CFLAGS =
-if IS_MINGW
-# FD_* macros are sloppy with their signs on MinGW32 platform
-libhelper_la_CFLAGS += -Wno-sign-compare
-endif
-
-noinst_HEADERS = \
- binarybuffer.h \
- configuration.h \
- ioutil.h \
- list.h \
- util.h \
- types.h \
- log.h \
- command.h \
- time_support.h \
- replacements.h \
- fileio.h \
- system.h \
- bin2char.sh \
- jep106.h \
- jep106.inc \
- update_jep106.pl \
- jim-nvp.h
-
-EXTRA_DIST = startup.tcl
-
-MAINTAINERCLEANFILES = $(srcdir)/Makefile.in
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/bin2char.sh
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/bin2char.sh b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/bin2char.sh
deleted file mode 100755
index 85a0fd6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/bin2char.sh
+++ /dev/null
@@ -1,14 +0,0 @@
-#!/bin/sh
-
-[ $# != 0 ] && {
- echo "Usage: $0"
- echo
- echo "Read binary data from standard input and write it as a comma separated"
- echo "list of hexadecimal byte values to standard ouput. The output is usable"
- echo "as a C array initializer. It is terminated with a comma so it can be"
- echo "continued e.g. for zero termination."
- exit 1
-}
-
-echo "/* Autogenerated with $0 */"
-od -v -A n -t x1 | sed 's/ *\(..\) */0x\1,/g'
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/binarybuffer.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/binarybuffer.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/binarybuffer.c
deleted file mode 100755
index 3cadabd..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/binarybuffer.c
+++ /dev/null
@@ -1,420 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2004, 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "log.h"
-#include "binarybuffer.h"
-
-static const unsigned char bit_reverse_table256[] = {
- 0x00, 0x80, 0x40, 0xC0, 0x20, 0xA0, 0x60, 0xE0, 0x10, 0x90, 0x50, 0xD0, 0x30, 0xB0, 0x70, 0xF0,
- 0x08, 0x88, 0x48, 0xC8, 0x28, 0xA8, 0x68, 0xE8, 0x18, 0x98, 0x58, 0xD8, 0x38, 0xB8, 0x78, 0xF8,
- 0x04, 0x84, 0x44, 0xC4, 0x24, 0xA4, 0x64, 0xE4, 0x14, 0x94, 0x54, 0xD4, 0x34, 0xB4, 0x74, 0xF4,
- 0x0C, 0x8C, 0x4C, 0xCC, 0x2C, 0xAC, 0x6C, 0xEC, 0x1C, 0x9C, 0x5C, 0xDC, 0x3C, 0xBC, 0x7C, 0xFC,
- 0x02, 0x82, 0x42, 0xC2, 0x22, 0xA2, 0x62, 0xE2, 0x12, 0x92, 0x52, 0xD2, 0x32, 0xB2, 0x72, 0xF2,
- 0x0A, 0x8A, 0x4A, 0xCA, 0x2A, 0xAA, 0x6A, 0xEA, 0x1A, 0x9A, 0x5A, 0xDA, 0x3A, 0xBA, 0x7A, 0xFA,
- 0x06, 0x86, 0x46, 0xC6, 0x26, 0xA6, 0x66, 0xE6, 0x16, 0x96, 0x56, 0xD6, 0x36, 0xB6, 0x76, 0xF6,
- 0x0E, 0x8E, 0x4E, 0xCE, 0x2E, 0xAE, 0x6E, 0xEE, 0x1E, 0x9E, 0x5E, 0xDE, 0x3E, 0xBE, 0x7E, 0xFE,
- 0x01, 0x81, 0x41, 0xC1, 0x21, 0xA1, 0x61, 0xE1, 0x11, 0x91, 0x51, 0xD1, 0x31, 0xB1, 0x71, 0xF1,
- 0x09, 0x89, 0x49, 0xC9, 0x29, 0xA9, 0x69, 0xE9, 0x19, 0x99, 0x59, 0xD9, 0x39, 0xB9, 0x79, 0xF9,
- 0x05, 0x85, 0x45, 0xC5, 0x25, 0xA5, 0x65, 0xE5, 0x15, 0x95, 0x55, 0xD5, 0x35, 0xB5, 0x75, 0xF5,
- 0x0D, 0x8D, 0x4D, 0xCD, 0x2D, 0xAD, 0x6D, 0xED, 0x1D, 0x9D, 0x5D, 0xDD, 0x3D, 0xBD, 0x7D, 0xFD,
- 0x03, 0x83, 0x43, 0xC3, 0x23, 0xA3, 0x63, 0xE3, 0x13, 0x93, 0x53, 0xD3, 0x33, 0xB3, 0x73, 0xF3,
- 0x0B, 0x8B, 0x4B, 0xCB, 0x2B, 0xAB, 0x6B, 0xEB, 0x1B, 0x9B, 0x5B, 0xDB, 0x3B, 0xBB, 0x7B, 0xFB,
- 0x07, 0x87, 0x47, 0xC7, 0x27, 0xA7, 0x67, 0xE7, 0x17, 0x97, 0x57, 0xD7, 0x37, 0xB7, 0x77, 0xF7,
- 0x0F, 0x8F, 0x4F, 0xCF, 0x2F, 0xAF, 0x6F, 0xEF, 0x1F, 0x9F, 0x5F, 0xDF, 0x3F, 0xBF, 0x7F, 0xFF
-};
-
-void *buf_cpy(const void *from, void *_to, unsigned size)
-{
- if (NULL == from || NULL == _to)
- return NULL;
-
- /* copy entire buffer */
- memcpy(_to, from, DIV_ROUND_UP(size, 8));
-
- /* mask out bits that don't belong to the buffer */
- unsigned trailing_bits = size % 8;
- if (trailing_bits) {
- uint8_t *to = _to;
- to[size / 8] &= (1 << trailing_bits) - 1;
- }
- return _to;
-}
-
-static bool buf_cmp_masked(uint8_t a, uint8_t b, uint8_t m)
-{
- return (a & m) != (b & m);
-}
-static bool buf_cmp_trailing(uint8_t a, uint8_t b, uint8_t m, unsigned trailing)
-{
- uint8_t mask = (1 << trailing) - 1;
- return buf_cmp_masked(a, b, mask & m);
-}
-
-bool buf_cmp(const void *_buf1, const void *_buf2, unsigned size)
-{
- if (!_buf1 || !_buf2)
- return _buf1 != _buf2;
-
- unsigned last = size / 8;
- if (memcmp(_buf1, _buf2, last) != 0)
- return false;
-
- unsigned trailing = size % 8;
- if (!trailing)
- return false;
-
- const uint8_t *buf1 = _buf1, *buf2 = _buf2;
- return buf_cmp_trailing(buf1[last], buf2[last], 0xff, trailing);
-}
-
-bool buf_cmp_mask(const void *_buf1, const void *_buf2,
- const void *_mask, unsigned size)
-{
- if (!_buf1 || !_buf2)
- return _buf1 != _buf2 || _buf1 != _mask;
-
- const uint8_t *buf1 = _buf1, *buf2 = _buf2, *mask = _mask;
- unsigned last = size / 8;
- for (unsigned i = 0; i < last; i++) {
- if (buf_cmp_masked(buf1[i], buf2[i], mask[i]))
- return true;
- }
- unsigned trailing = size % 8;
- if (!trailing)
- return false;
- return buf_cmp_trailing(buf1[last], buf2[last], mask[last], trailing);
-}
-
-
-void *buf_set_ones(void *_buf, unsigned size)
-{
- uint8_t *buf = _buf;
- if (!buf)
- return NULL;
-
- memset(buf, 0xff, size / 8);
-
- unsigned trailing_bits = size % 8;
- if (trailing_bits)
- buf[size / 8] = (1 << trailing_bits) - 1;
-
- return buf;
-}
-
-void *buf_set_buf(const void *_src, unsigned src_start,
- void *_dst, unsigned dst_start, unsigned len)
-{
- const uint8_t *src = _src;
- uint8_t *dst = _dst;
- unsigned i, sb, db, sq, dq, lb, lq;
-
- sb = src_start / 8;
- db = dst_start / 8;
- sq = src_start % 8;
- dq = dst_start % 8;
- lb = len / 8;
- lq = len % 8;
-
- src += sb;
- dst += db;
-
- /* check if both buffers are on byte boundary and
- * len is a multiple of 8bit so we can simple copy
- * the buffer */
- if ((sq == 0) && (dq == 0) && (lq == 0)) {
- for (i = 0; i < lb; i++)
- *dst++ = *src++;
- return _dst;
- }
-
- /* fallback to slow bit copy */
- for (i = 0; i < len; i++) {
- if (((*src >> (sq&7)) & 1) == 1)
- *dst |= 1 << (dq&7);
- else
- *dst &= ~(1 << (dq&7));
- if (sq++ == 7) {
- sq = 0;
- src++;
- }
- if (dq++ == 7) {
- dq = 0;
- dst++;
- }
- }
-
- return _dst;
-}
-
-uint32_t flip_u32(uint32_t value, unsigned int num)
-{
- uint32_t c = (bit_reverse_table256[value & 0xff] << 24) |
- (bit_reverse_table256[(value >> 8) & 0xff] << 16) |
- (bit_reverse_table256[(value >> 16) & 0xff] << 8) |
- (bit_reverse_table256[(value >> 24) & 0xff]);
-
- if (num < 32)
- c = c >> (32 - num);
-
- return c;
-}
-
-static int ceil_f_to_u32(float x)
-{
- if (x < 0) /* return zero for negative numbers */
- return 0;
-
- uint32_t y = x; /* cut off fraction */
-
- if ((x - y) > 0.0) /* if there was a fractional part, increase by one */
- y++;
-
- return y;
-}
-
-char *buf_to_str(const void *_buf, unsigned buf_len, unsigned radix)
-{
- float factor;
- switch (radix) {
- case 16:
- factor = 2.0; /* log(256) / log(16) = 2.0 */
- break;
- case 10:
- factor = 2.40824; /* log(256) / log(10) = 2.40824 */
- break;
- case 8:
- factor = 2.66667; /* log(256) / log(8) = 2.66667 */
- break;
- default:
- return NULL;
- }
-
- unsigned str_len = ceil_f_to_u32(DIV_ROUND_UP(buf_len, 8) * factor);
- char *str = calloc(str_len + 1, 1);
-
- const uint8_t *buf = _buf;
- int b256_len = DIV_ROUND_UP(buf_len, 8);
- for (int i = b256_len - 1; i >= 0; i--) {
- uint32_t tmp = buf[i];
- if (((unsigned)i == (buf_len / 8)) && (buf_len % 8))
- tmp &= (0xff >> (8 - (buf_len % 8)));
-
- /* base-256 digits */
- for (unsigned j = str_len; j > 0; j--) {
- tmp += (uint32_t)str[j-1] * 256;
- str[j-1] = (uint8_t)(tmp % radix);
- tmp /= radix;
- }
- }
-
- const char * const DIGITS = "0123456789ABCDEF";
- for (unsigned j = 0; j < str_len; j++)
- str[j] = DIGITS[(int)str[j]];
-
- return str;
-}
-
-/** identify radix, and skip radix-prefix (0, 0x or 0X) */
-static void str_radix_guess(const char **_str, unsigned *_str_len,
- unsigned *_radix)
-{
- unsigned radix = *_radix;
- if (0 != radix)
- return;
- const char *str = *_str;
- unsigned str_len = *_str_len;
- if (str[0] == '0' && (str[1] == 'x' || str[1] == 'X')) {
- radix = 16;
- str += 2;
- str_len -= 2;
- } else if ((str[0] == '0') && (str_len != 1)) {
- radix = 8;
- str += 1;
- str_len -= 1;
- } else
- radix = 10;
- *_str = str;
- *_str_len = str_len;
- *_radix = radix;
-}
-
-int str_to_buf(const char *str, unsigned str_len,
- void *_buf, unsigned buf_len, unsigned radix)
-{
- str_radix_guess(&str, &str_len, &radix);
-
- float factor;
- if (radix == 16)
- factor = 0.5; /* log(16) / log(256) = 0.5 */
- else if (radix == 10)
- factor = 0.41524; /* log(10) / log(256) = 0.41524 */
- else if (radix == 8)
- factor = 0.375; /* log(8) / log(256) = 0.375 */
- else
- return 0;
-
- /* copy to zero-terminated buffer */
- char *charbuf = strndup(str, str_len);
-
- /* number of digits in base-256 notation */
- unsigned b256_len = ceil_f_to_u32(str_len * factor);
- uint8_t *b256_buf = calloc(b256_len, 1);
-
- /* go through zero terminated buffer
- * input digits (ASCII) */
- unsigned i;
- for (i = 0; charbuf[i]; i++) {
- uint32_t tmp = charbuf[i];
- if ((tmp >= '0') && (tmp <= '9'))
- tmp = (tmp - '0');
- else if ((tmp >= 'a') && (tmp <= 'f'))
- tmp = (tmp - 'a' + 10);
- else if ((tmp >= 'A') && (tmp <= 'F'))
- tmp = (tmp - 'A' + 10);
- else
- continue; /* skip characters other than [0-9,a-f,A-F] */
-
- if (tmp >= radix)
- continue; /* skip digits invalid for the current radix */
-
- /* base-256 digits */
- for (unsigned j = 0; j < b256_len; j++) {
- tmp += (uint32_t)b256_buf[j] * radix;
- b256_buf[j] = (uint8_t)(tmp & 0xFF);
- tmp >>= 8;
- }
-
- }
-
- uint8_t *buf = _buf;
- for (unsigned j = 0; j < DIV_ROUND_UP(buf_len, 8); j++) {
- if (j < b256_len)
- buf[j] = b256_buf[j];
- else
- buf[j] = 0;
- }
-
- /* mask out bits that don't belong to the buffer */
- if (buf_len % 8)
- buf[(buf_len / 8)] &= 0xff >> (8 - (buf_len % 8));
-
- free(b256_buf);
- free(charbuf);
-
- return i;
-}
-
-void bit_copy_queue_init(struct bit_copy_queue *q)
-{
- INIT_LIST_HEAD(&q->list);
-}
-
-int bit_copy_queued(struct bit_copy_queue *q, uint8_t *dst, unsigned dst_offset, const uint8_t *src,
- unsigned src_offset, unsigned bit_count)
-{
- struct bit_copy_queue_entry *qe = malloc(sizeof(*qe));
- if (!qe)
- return ERROR_FAIL;
-
- qe->dst = dst;
- qe->dst_offset = dst_offset;
- qe->src = src;
- qe->src_offset = src_offset;
- qe->bit_count = bit_count;
- list_add_tail(&qe->list, &q->list);
-
- return ERROR_OK;
-}
-
-void bit_copy_execute(struct bit_copy_queue *q)
-{
- struct bit_copy_queue_entry *qe;
- struct bit_copy_queue_entry *tmp;
- list_for_each_entry_safe(qe, tmp, &q->list, list) {
- bit_copy(qe->dst, qe->dst_offset, qe->src, qe->src_offset, qe->bit_count);
- list_del(&qe->list);
- free(qe);
- }
-}
-
-void bit_copy_discard(struct bit_copy_queue *q)
-{
- struct bit_copy_queue_entry *qe;
- struct bit_copy_queue_entry *tmp;
- list_for_each_entry_safe(qe, tmp, &q->list, list) {
- list_del(&qe->list);
- free(qe);
- }
-}
-
-int unhexify(char *bin, const char *hex, int count)
-{
- int i, tmp;
-
- for (i = 0; i < count; i++) {
- if (sscanf(hex + (2 * i), "%02x", &tmp) != 1)
- return i;
- bin[i] = tmp;
- }
-
- return i;
-}
-
-int hexify(char *hex, const char *bin, int count, int out_maxlen)
-{
- int i, cmd_len = 0;
-
- /* May use a length, or a null-terminated string as input. */
- if (count == 0)
- count = strlen(bin);
-
- for (i = 0; i < count; i++)
- cmd_len += snprintf(hex + cmd_len, out_maxlen - cmd_len, "%02x", bin[i] & 0xff);
-
- return cmd_len;
-}
-
-void buffer_shr(void *_buf, unsigned buf_len, unsigned count)
-{
- unsigned i;
- unsigned char *buf = _buf;
- unsigned bytes_to_remove;
- unsigned shift;
-
- bytes_to_remove = count / 8;
- shift = count - (bytes_to_remove * 8);
-
- for (i = 0; i < (buf_len - 1); i++)
- buf[i] = (buf[i] >> shift) | ((buf[i+1] << (8 - shift)) & 0xff);
-
- buf[(buf_len - 1)] = buf[(buf_len - 1)] >> shift;
-
- if (bytes_to_remove) {
- memmove(buf, &buf[bytes_to_remove], buf_len - bytes_to_remove);
- memset(&buf[buf_len - bytes_to_remove], 0, bytes_to_remove);
- }
-}
[13/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/tcl.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/tcl.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/tcl.c
deleted file mode 100755
index cf0daf3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/tcl.c
+++ /dev/null
@@ -1,1115 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2007,2008 �yvind Harboe <oy...@zylin.com> *
- * Copyright (C) 2008 by Spencer Oliver <sp...@spen-soft.co.uk> *
- * Copyright (C) 2009 Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#include "imp.h"
-#include <helper/time_support.h>
-#include <target/image.h>
-
-/**
- * @file
- * Implements Tcl commands used to access NOR flash facilities.
- */
-
-COMMAND_HELPER(flash_command_get_bank_maybe_probe, unsigned name_index,
- struct flash_bank **bank, bool do_probe)
-{
- const char *name = CMD_ARGV[name_index];
- int retval;
- if (do_probe) {
- retval = get_flash_bank_by_name(name, bank);
- } else {
- *bank = get_flash_bank_by_name_noprobe(name);
- retval = ERROR_OK;
- }
-
- if (retval != ERROR_OK)
- return retval;
- if (*bank)
- return ERROR_OK;
-
- unsigned bank_num;
- COMMAND_PARSE_NUMBER(uint, name, bank_num);
-
- if (do_probe) {
- return get_flash_bank_by_num(bank_num, bank);
- } else {
- *bank = get_flash_bank_by_num_noprobe(bank_num);
- retval = (bank) ? ERROR_OK : ERROR_FAIL;
- return retval;
- }
-}
-
-COMMAND_HELPER(flash_command_get_bank, unsigned name_index,
- struct flash_bank **bank)
-{
- return CALL_COMMAND_HANDLER(flash_command_get_bank_maybe_probe,
- name_index, bank, true);
-}
-
-COMMAND_HANDLER(handle_flash_info_command)
-{
- struct flash_bank *p;
- int j = 0;
- int retval;
-
- if (CMD_ARGC != 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
- if (retval != ERROR_OK)
- return retval;
-
- if (p != NULL) {
- char buf[1024];
-
- /* attempt auto probe */
- retval = p->driver->auto_probe(p);
- if (retval != ERROR_OK)
- return retval;
-
- /* We must query the hardware to avoid printing stale information! */
- retval = p->driver->protect_check(p);
- if (retval != ERROR_OK)
- return retval;
-
- command_print(CMD_CTX,
- "#%d : %s at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32
- ", buswidth %i, chipwidth %i",
- p->bank_number,
- p->driver->name,
- p->base,
- p->size,
- p->bus_width,
- p->chip_width);
- for (j = 0; j < p->num_sectors; j++) {
- char *protect_state;
-
- if (p->sectors[j].is_protected == 0)
- protect_state = "not protected";
- else if (p->sectors[j].is_protected == 1)
- protect_state = "protected";
- else
- protect_state = "protection state unknown";
-
- command_print(CMD_CTX,
- "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s",
- j,
- p->sectors[j].offset,
- p->sectors[j].size,
- p->sectors[j].size >> 10,
- protect_state);
- }
-
- if (p->driver->info != NULL) {
- retval = p->driver->info(p, buf, sizeof(buf));
- if (retval == ERROR_OK)
- command_print(CMD_CTX, "%s", buf);
- else
- LOG_ERROR("error retrieving flash info");
- }
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_flash_probe_command)
-{
- struct flash_bank *p;
- int retval;
-
- if (CMD_ARGC != 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- retval = CALL_COMMAND_HANDLER(flash_command_get_bank_maybe_probe, 0, &p, false);
- if (retval != ERROR_OK)
- return retval;
-
- if (p) {
- retval = p->driver->probe(p);
- if (retval == ERROR_OK)
- command_print(CMD_CTX,
- "flash '%s' found at 0x%8.8" PRIx32,
- p->driver->name,
- p->base);
- } else {
- command_print(CMD_CTX, "flash bank '#%s' is out of bounds", CMD_ARGV[0]);
- retval = ERROR_FAIL;
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_flash_erase_check_command)
-{
- if (CMD_ARGC != 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *p;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- int j;
- retval = p->driver->erase_check(p);
- if (retval == ERROR_OK)
- command_print(CMD_CTX, "successfully checked erase state");
- else {
- command_print(CMD_CTX,
- "unknown error when checking erase state of flash bank #%s at 0x%8.8" PRIx32,
- CMD_ARGV[0],
- p->base);
- }
-
- for (j = 0; j < p->num_sectors; j++) {
- char *erase_state;
-
- if (p->sectors[j].is_erased == 0)
- erase_state = "not erased";
- else if (p->sectors[j].is_erased == 1)
- erase_state = "erased";
- else
- erase_state = "erase state unknown";
-
- command_print(CMD_CTX,
- "\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s",
- j,
- p->sectors[j].offset,
- p->sectors[j].size,
- p->sectors[j].size >> 10,
- erase_state);
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_flash_erase_address_command)
-{
- struct flash_bank *p;
- int retval = ERROR_OK;
- uint32_t address;
- uint32_t length;
- bool do_pad = false;
- bool do_unlock = false;
- struct target *target = get_current_target(CMD_CTX);
-
- while (CMD_ARGC >= 3) {
- /* Optionally pad out the address range to block/sector
- * boundaries. We can't know if there's data in that part
- * of the flash; only do padding if we're told to.
- */
- if (strcmp("pad", CMD_ARGV[0]) == 0)
- do_pad = true;
- else if (strcmp("unlock", CMD_ARGV[0]) == 0)
- do_unlock = true;
- else
- return ERROR_COMMAND_SYNTAX_ERROR;
- CMD_ARGC--;
- CMD_ARGV++;
- }
- if (CMD_ARGC != 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], length);
-
- if (length <= 0) {
- command_print(CMD_CTX, "Length must be >0");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- retval = get_flash_bank_by_addr(target, address, true, &p);
- if (retval != ERROR_OK)
- return retval;
-
- /* We can't know if we did a resume + halt, in which case we no longer know the erased state
- **/
- flash_set_dirty();
-
- struct duration bench;
- duration_start(&bench);
-
- if (do_unlock)
- retval = flash_unlock_address_range(target, address, length);
-
- if (retval == ERROR_OK)
- retval = flash_erase_address_range(target, do_pad, address, length);
-
- if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
- command_print(CMD_CTX, "erased address 0x%8.8" PRIx32 " (length %" PRIi32 ")"
- " in %fs (%0.3f KiB/s)", address, length,
- duration_elapsed(&bench), duration_kbps(&bench, length));
- }
-
- return retval;
-}
-
-static int flash_check_sector_parameters(struct command_context *cmd_ctx,
- uint32_t first, uint32_t last, uint32_t num_sectors)
-{
- if (!(first <= last)) {
- command_print(cmd_ctx, "ERROR: "
- "first sector must be <= last sector");
- return ERROR_FAIL;
- }
-
- if (!(last <= (num_sectors - 1))) {
- command_print(cmd_ctx, "ERROR: last sector must be <= %d",
- (int) num_sectors - 1);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_flash_erase_command)
-{
- if (CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- uint32_t first;
- uint32_t last;
-
- struct flash_bank *p;
- int retval;
-
- retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
- if (retval != ERROR_OK)
- return retval;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], first);
- if (strcmp(CMD_ARGV[2], "last") == 0)
- last = p->num_sectors - 1;
- else
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last);
-
- retval = flash_check_sector_parameters(CMD_CTX, first, last, p->num_sectors);
- if (retval != ERROR_OK)
- return retval;
-
- struct duration bench;
- duration_start(&bench);
-
- retval = flash_driver_erase(p, first, last);
-
- if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
- command_print(CMD_CTX, "erased sectors %" PRIu32 " "
- "through %" PRIu32 " on flash bank %d "
- "in %fs", first, last, p->bank_number, duration_elapsed(&bench));
- }
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_flash_protect_command)
-{
- if (CMD_ARGC != 4)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- uint32_t first;
- uint32_t last;
-
- struct flash_bank *p;
- int retval;
-
- retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
- if (retval != ERROR_OK)
- return retval;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], first);
- if (strcmp(CMD_ARGV[2], "last") == 0)
- last = p->num_sectors - 1;
- else
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last);
-
- bool set;
- COMMAND_PARSE_ON_OFF(CMD_ARGV[3], set);
-
- retval = flash_check_sector_parameters(CMD_CTX, first, last, p->num_sectors);
- if (retval != ERROR_OK)
- return retval;
-
- retval = flash_driver_protect(p, set, first, last);
- if (retval == ERROR_OK) {
- command_print(CMD_CTX, "%s protection for sectors %i "
- "through %i on flash bank %d",
- (set) ? "set" : "cleared", (int) first,
- (int) last, p->bank_number);
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_flash_write_image_command)
-{
- struct target *target = get_current_target(CMD_CTX);
-
- struct image image;
- uint32_t written;
-
- int retval;
-
- /* flash auto-erase is disabled by default*/
- int auto_erase = 0;
- bool auto_unlock = false;
-
- while (CMD_ARGC) {
- if (strcmp(CMD_ARGV[0], "erase") == 0) {
- auto_erase = 1;
- CMD_ARGV++;
- CMD_ARGC--;
- command_print(CMD_CTX, "auto erase enabled");
- } else if (strcmp(CMD_ARGV[0], "unlock") == 0) {
- auto_unlock = true;
- CMD_ARGV++;
- CMD_ARGC--;
- command_print(CMD_CTX, "auto unlock enabled");
- } else
- break;
- }
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- if (!target) {
- LOG_ERROR("no target selected");
- return ERROR_FAIL;
- }
-
- struct duration bench;
- duration_start(&bench);
-
- if (CMD_ARGC >= 2) {
- image.base_address_set = 1;
- COMMAND_PARSE_NUMBER(llong, CMD_ARGV[1], image.base_address);
- } else {
- image.base_address_set = 0;
- image.base_address = 0x0;
- }
-
- image.start_address_set = 0;
-
- retval = image_open(&image, CMD_ARGV[0], (CMD_ARGC == 3) ? CMD_ARGV[2] : NULL);
- if (retval != ERROR_OK)
- return retval;
-
- retval = flash_write_unlock(target, &image, &written, auto_erase, auto_unlock);
- if (retval != ERROR_OK) {
- image_close(&image);
- return retval;
- }
-
- if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
- command_print(CMD_CTX, "wrote %" PRIu32 " bytes from file %s "
- "in %fs (%0.3f KiB/s)", written, CMD_ARGV[0],
- duration_elapsed(&bench), duration_kbps(&bench, written));
- }
-
- image_close(&image);
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_flash_fill_command)
-{
- int err = ERROR_OK;
- uint32_t address;
- uint32_t pattern;
- uint32_t count;
- uint32_t wrote = 0;
- uint32_t cur_size = 0;
- uint32_t chunk_count;
- struct target *target = get_current_target(CMD_CTX);
- unsigned i;
- uint32_t wordsize;
- int retval = ERROR_OK;
-
- static size_t const chunksize = 1024;
- uint8_t *chunk = NULL, *readback = NULL;
-
- if (CMD_ARGC != 3) {
- retval = ERROR_COMMAND_SYNTAX_ERROR;
- goto done;
- }
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], address);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], pattern);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], count);
-
- chunk = malloc(chunksize);
- if (chunk == NULL)
- return ERROR_FAIL;
-
- readback = malloc(chunksize);
- if (readback == NULL) {
- free(chunk);
- return ERROR_FAIL;
- }
-
- if (count == 0)
- goto done;
-
- switch (CMD_NAME[4]) {
- case 'w':
- wordsize = 4;
- break;
- case 'h':
- wordsize = 2;
- break;
- case 'b':
- wordsize = 1;
- break;
- default:
- retval = ERROR_COMMAND_SYNTAX_ERROR;
- goto done;
- }
-
- chunk_count = MIN(count, (chunksize / wordsize));
- switch (wordsize) {
- case 4:
- for (i = 0; i < chunk_count; i++)
- target_buffer_set_u32(target, chunk + i * wordsize, pattern);
- break;
- case 2:
- for (i = 0; i < chunk_count; i++)
- target_buffer_set_u16(target, chunk + i * wordsize, pattern);
- break;
- case 1:
- memset(chunk, pattern, chunk_count);
- break;
- default:
- LOG_ERROR("BUG: can't happen");
- exit(-1);
- }
-
- struct duration bench;
- duration_start(&bench);
-
- for (wrote = 0; wrote < (count*wordsize); wrote += cur_size) {
- struct flash_bank *bank;
-
- retval = get_flash_bank_by_addr(target, address, true, &bank);
- if (retval != ERROR_OK)
- goto done;
-
- cur_size = MIN((count * wordsize - wrote), chunksize);
- err = flash_driver_write(bank, chunk, address - bank->base + wrote, cur_size);
- if (err != ERROR_OK) {
- retval = err;
- goto done;
- }
-
- err = flash_driver_read(bank, readback, address - bank->base + wrote, cur_size);
- if (err != ERROR_OK) {
- retval = err;
- goto done;
- }
-
- for (i = 0; i < cur_size; i++) {
- if (readback[i] != chunk[i]) {
- LOG_ERROR(
- "Verification error address 0x%08" PRIx32 ", read back 0x%02x, expected 0x%02x",
- address + wrote + i,
- readback[i],
- chunk[i]);
- retval = ERROR_FAIL;
- goto done;
- }
- }
- }
-
- if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
- command_print(CMD_CTX, "wrote %" PRIu32 " bytes to 0x%8.8" PRIx32
- " in %fs (%0.3f KiB/s)", wrote, address,
- duration_elapsed(&bench), duration_kbps(&bench, wrote));
- }
-
-done:
- free(readback);
- free(chunk);
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_flash_write_bank_command)
-{
- uint32_t offset;
- uint8_t *buffer;
- struct fileio *fileio;
-
- if (CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct duration bench;
- duration_start(&bench);
-
- struct flash_bank *p;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], offset);
-
- if (fileio_open(&fileio, CMD_ARGV[1], FILEIO_READ, FILEIO_BINARY) != ERROR_OK)
- return ERROR_OK;
-
- size_t filesize;
- retval = fileio_size(fileio, &filesize);
- if (retval != ERROR_OK) {
- fileio_close(fileio);
- return retval;
- }
-
- buffer = malloc(filesize);
- if (buffer == NULL) {
- fileio_close(fileio);
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
- size_t buf_cnt;
- if (fileio_read(fileio, filesize, buffer, &buf_cnt) != ERROR_OK) {
- free(buffer);
- fileio_close(fileio);
- return ERROR_OK;
- }
-
- retval = flash_driver_write(p, buffer, offset, buf_cnt);
-
- free(buffer);
- buffer = NULL;
-
- if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
- command_print(CMD_CTX, "wrote %zu bytes from file %s to flash bank %u"
- " at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
- filesize, CMD_ARGV[1], p->bank_number, offset,
- duration_elapsed(&bench), duration_kbps(&bench, filesize));
- }
-
- fileio_close(fileio);
-
- return retval;
-}
-
-COMMAND_HANDLER(handle_flash_read_bank_command)
-{
- uint32_t offset;
- uint8_t *buffer;
- struct fileio *fileio;
- uint32_t length;
- size_t written;
-
- if (CMD_ARGC != 4)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct duration bench;
- duration_start(&bench);
-
- struct flash_bank *p;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], offset);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], length);
-
- buffer = malloc(length);
- if (buffer == NULL) {
- LOG_ERROR("Out of memory");
- return ERROR_FAIL;
- }
-
- retval = flash_driver_read(p, buffer, offset, length);
- if (retval != ERROR_OK) {
- LOG_ERROR("Read error");
- free(buffer);
- return retval;
- }
-
- retval = fileio_open(&fileio, CMD_ARGV[1], FILEIO_WRITE, FILEIO_BINARY);
- if (retval != ERROR_OK) {
- LOG_ERROR("Could not open file");
- free(buffer);
- return retval;
- }
-
- retval = fileio_write(fileio, length, buffer, &written);
- fileio_close(fileio);
- free(buffer);
- if (retval != ERROR_OK) {
- LOG_ERROR("Could not write file");
- return ERROR_FAIL;
- }
-
- if (duration_measure(&bench) == ERROR_OK)
- command_print(CMD_CTX, "wrote %ld bytes to file %s from flash bank %u"
- " at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
- (long)written, CMD_ARGV[1], p->bank_number, offset,
- duration_elapsed(&bench), duration_kbps(&bench, written));
-
- return retval;
-}
-
-
-COMMAND_HANDLER(handle_flash_verify_bank_command)
-{
- uint32_t offset;
- uint8_t *buffer_file, *buffer_flash;
- struct fileio *fileio;
- size_t read_cnt;
- size_t filesize;
- int differ;
-
- if (CMD_ARGC != 3)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct duration bench;
- duration_start(&bench);
-
- struct flash_bank *p;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], offset);
-
- retval = fileio_open(&fileio, CMD_ARGV[1], FILEIO_READ, FILEIO_BINARY);
- if (retval != ERROR_OK) {
- LOG_ERROR("Could not open file");
- return retval;
- }
-
- retval = fileio_size(fileio, &filesize);
- if (retval != ERROR_OK) {
- fileio_close(fileio);
- return retval;
- }
-
- buffer_file = malloc(filesize);
- if (buffer_file == NULL) {
- LOG_ERROR("Out of memory");
- fileio_close(fileio);
- return ERROR_FAIL;
- }
-
- retval = fileio_read(fileio, filesize, buffer_file, &read_cnt);
- fileio_close(fileio);
- if (retval != ERROR_OK) {
- LOG_ERROR("File read failure");
- free(buffer_file);
- return retval;
- }
-
- if (read_cnt != filesize) {
- LOG_ERROR("Short read");
- free(buffer_file);
- return ERROR_FAIL;
- }
-
- buffer_flash = malloc(filesize);
- if (buffer_flash == NULL) {
- LOG_ERROR("Out of memory");
- free(buffer_file);
- return ERROR_FAIL;
- }
-
- retval = flash_driver_read(p, buffer_flash, offset, read_cnt);
- if (retval != ERROR_OK) {
- LOG_ERROR("Flash read error");
- free(buffer_flash);
- free(buffer_file);
- return retval;
- }
-
- if (duration_measure(&bench) == ERROR_OK)
- command_print(CMD_CTX, "read %ld bytes from file %s and flash bank %u"
- " at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
- (long)read_cnt, CMD_ARGV[1], p->bank_number, offset,
- duration_elapsed(&bench), duration_kbps(&bench, read_cnt));
-
- differ = memcmp(buffer_file, buffer_flash, read_cnt);
- command_print(CMD_CTX, "contents %s", differ ? "differ" : "match");
- if (differ) {
- uint32_t t;
- int diffs = 0;
- for (t = 0; t < read_cnt; t++) {
- if (buffer_flash[t] == buffer_file[t])
- continue;
- command_print(CMD_CTX, "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
- diffs, t + offset, buffer_flash[t], buffer_file[t]);
- if (diffs++ >= 127) {
- command_print(CMD_CTX, "More than 128 errors, the rest are not printed.");
- break;
- }
- keep_alive();
- }
- }
- free(buffer_flash);
- free(buffer_file);
-
- return differ ? ERROR_FAIL : ERROR_OK;
-}
-
-void flash_set_dirty(void)
-{
- struct flash_bank *c;
- int i;
-
- /* set all flash to require erasing */
- for (c = flash_bank_list(); c; c = c->next) {
- for (i = 0; i < c->num_sectors; i++)
- c->sectors[i].is_erased = 0;
- }
-}
-
-COMMAND_HANDLER(handle_flash_padded_value_command)
-{
- if (CMD_ARGC != 2)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *p;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &p);
- if (ERROR_OK != retval)
- return retval;
-
- COMMAND_PARSE_NUMBER(u8, CMD_ARGV[1], p->default_padded_value);
-
- command_print(CMD_CTX, "Default padded value set to 0x%" PRIx8 " for flash bank %u", \
- p->default_padded_value, p->bank_number);
-
- return retval;
-}
-
-static const struct command_registration flash_exec_command_handlers[] = {
- {
- .name = "probe",
- .handler = handle_flash_probe_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Identify a flash bank.",
- },
- {
- .name = "info",
- .handler = handle_flash_info_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Print information about a flash bank.",
- },
- {
- .name = "erase_check",
- .handler = handle_flash_erase_check_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Check erase state of all blocks in a "
- "flash bank.",
- },
- {
- .name = "erase_sector",
- .handler = handle_flash_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id first_sector_num last_sector_num",
- .help = "Erase a range of sectors in a flash bank.",
- },
- {
- .name = "erase_address",
- .handler = handle_flash_erase_address_command,
- .mode = COMMAND_EXEC,
- .usage = "['pad'] ['unlock'] address length",
- .help = "Erase flash sectors starting at address and "
- "continuing for length bytes. If 'pad' is specified, "
- "data outside that range may also be erased: the start "
- "address may be decreased, and length increased, so "
- "that all of the first and last sectors are erased. "
- "If 'unlock' is specified, then the flash is unprotected "
- "before erasing.",
-
- },
- {
- .name = "fillw",
- .handler = handle_flash_fill_command,
- .mode = COMMAND_EXEC,
- .usage = "address value n",
- .help = "Fill n words with 32-bit value, starting at "
- "word address. (No autoerase.)",
- },
- {
- .name = "fillh",
- .handler = handle_flash_fill_command,
- .mode = COMMAND_EXEC,
- .usage = "address value n",
- .help = "Fill n halfwords with 16-bit value, starting at "
- "word address. (No autoerase.)",
- },
- {
- .name = "fillb",
- .handler = handle_flash_fill_command,
- .mode = COMMAND_EXEC,
- .usage = "address value n",
- .help = "Fill n bytes with 8-bit value, starting at "
- "word address. (No autoerase.)",
- },
- {
- .name = "write_bank",
- .handler = handle_flash_write_bank_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id filename offset",
- .help = "Write binary data from file to flash bank, "
- "starting at specified byte offset from the "
- "beginning of the bank.",
- },
- {
- .name = "write_image",
- .handler = handle_flash_write_image_command,
- .mode = COMMAND_EXEC,
- .usage = "[erase] [unlock] filename [offset [file_type]]",
- .help = "Write an image to flash. Optionally first unprotect "
- "and/or erase the region to be used. Allow optional "
- "offset from beginning of bank (defaults to zero)",
- },
- {
- .name = "read_bank",
- .handler = handle_flash_read_bank_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id filename offset length",
- .help = "Read binary data from flash bank to file, "
- "starting at specified byte offset from the "
- "beginning of the bank.",
- },
- {
- .name = "verify_bank",
- .handler = handle_flash_verify_bank_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id filename offset",
- .help = "Read binary data from flash bank and file, "
- "starting at specified byte offset from the "
- "beginning of the bank. Compare the contents.",
- },
- {
- .name = "protect",
- .handler = handle_flash_protect_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id first_sector [last_sector|'last'] "
- "('on'|'off')",
- .help = "Turn protection on or off for a range of sectors "
- "in a given flash bank.",
- },
- {
- .name = "padded_value",
- .handler = handle_flash_padded_value_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id value",
- .help = "Set default flash padded value",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static int flash_init_drivers(struct command_context *cmd_ctx)
-{
- if (!flash_bank_list())
- return ERROR_OK;
-
- struct command *parent = command_find_in_context(cmd_ctx, "flash");
- return register_commands(cmd_ctx, parent, flash_exec_command_handlers);
-}
-
-COMMAND_HANDLER(handle_flash_bank_command)
-{
- if (CMD_ARGC < 7) {
- LOG_ERROR("usage: flash bank <name> <driver> "
- "<base> <size> <chip_width> <bus_width> <target>");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- /* save bank name and advance arguments for compatibility */
- const char *bank_name = *CMD_ARGV++;
- CMD_ARGC--;
-
- struct target *target = get_target(CMD_ARGV[5]);
- if (target == NULL) {
- LOG_ERROR("target '%s' not defined", CMD_ARGV[5]);
- return ERROR_FAIL;
- }
-
- const char *driver_name = CMD_ARGV[0];
- struct flash_driver *driver = flash_driver_find_by_name(driver_name);
- if (NULL == driver) {
- /* no matching flash driver found */
- LOG_ERROR("flash driver '%s' not found", driver_name);
- return ERROR_FAIL;
- }
-
- /* check the flash bank name is unique */
- if (get_flash_bank_by_name_noprobe(bank_name) != NULL) {
- /* flash bank name already exists */
- LOG_ERROR("flash bank name '%s' already exists", bank_name);
- return ERROR_FAIL;
- }
-
- /* register flash specific commands */
- if (NULL != driver->commands) {
- int retval = register_commands(CMD_CTX, NULL,
- driver->commands);
- if (ERROR_OK != retval) {
- LOG_ERROR("couldn't register '%s' commands",
- driver_name);
- return ERROR_FAIL;
- }
- }
-
- struct flash_bank *c = malloc(sizeof(*c));
- c->name = strdup(bank_name);
- c->target = target;
- c->driver = driver;
- c->driver_priv = NULL;
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], c->base);
- COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], c->size);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[3], c->chip_width);
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[4], c->bus_width);
- c->default_padded_value = 0xff;
- c->num_sectors = 0;
- c->sectors = NULL;
- c->next = NULL;
-
- int retval;
- retval = CALL_COMMAND_HANDLER(driver->flash_bank_command, c);
- if (ERROR_OK != retval) {
- LOG_ERROR("'%s' driver rejected flash bank at 0x%8.8" PRIx32 "; usage: %s",
- driver_name, c->base, driver->usage);
- free(c);
- return retval;
- }
-
- if (driver->usage == NULL)
- LOG_DEBUG("'%s' driver usage field missing", driver_name);
-
- flash_bank_add(c);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_flash_banks_command)
-{
- if (CMD_ARGC != 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- unsigned n = 0;
- for (struct flash_bank *p = flash_bank_list(); p; p = p->next, n++) {
- LOG_USER("#%d : %s (%s) at 0x%8.8" PRIx32 ", size 0x%8.8" PRIx32 ", "
- "buswidth %u, chipwidth %u", p->bank_number,
- p->name, p->driver->name, p->base, p->size,
- p->bus_width, p->chip_width);
- }
- return ERROR_OK;
-}
-
-static int jim_flash_list(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
-{
- if (argc != 1) {
- Jim_WrongNumArgs(interp, 1, argv,
- "no arguments to 'flash list' command");
- return JIM_ERR;
- }
-
- Jim_Obj *list = Jim_NewListObj(interp, NULL, 0);
-
- for (struct flash_bank *p = flash_bank_list(); p; p = p->next) {
- Jim_Obj *elem = Jim_NewListObj(interp, NULL, 0);
-
- Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, "name", -1));
- Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, p->driver->name, -1));
- Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, "base", -1));
- Jim_ListAppendElement(interp, elem, Jim_NewIntObj(interp, p->base));
- Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, "size", -1));
- Jim_ListAppendElement(interp, elem, Jim_NewIntObj(interp, p->size));
- Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, "bus_width", -1));
- Jim_ListAppendElement(interp, elem, Jim_NewIntObj(interp, p->bus_width));
- Jim_ListAppendElement(interp, elem, Jim_NewStringObj(interp, "chip_width", -1));
- Jim_ListAppendElement(interp, elem, Jim_NewIntObj(interp, p->chip_width));
-
- Jim_ListAppendElement(interp, list, elem);
- }
-
- Jim_SetResult(interp, list);
-
- return JIM_OK;
-}
-
-COMMAND_HANDLER(handle_flash_init_command)
-{
- if (CMD_ARGC != 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- static bool flash_initialized;
- if (flash_initialized) {
- LOG_INFO("'flash init' has already been called");
- return ERROR_OK;
- }
- flash_initialized = true;
-
- LOG_DEBUG("Initializing flash devices...");
- return flash_init_drivers(CMD_CTX);
-}
-
-static const struct command_registration flash_config_command_handlers[] = {
- {
- .name = "bank",
- .handler = handle_flash_bank_command,
- .mode = COMMAND_CONFIG,
- .usage = "bank_id driver_name base_address size_bytes "
- "chip_width_bytes bus_width_bytes target "
- "[driver_options ...]",
- .help = "Define a new bank with the given name, "
- "using the specified NOR flash driver.",
- },
- {
- .name = "init",
- .mode = COMMAND_CONFIG,
- .handler = handle_flash_init_command,
- .help = "Initialize flash devices.",
- },
- {
- .name = "banks",
- .mode = COMMAND_ANY,
- .handler = handle_flash_banks_command,
- .help = "Display table with information about flash banks.",
- },
- {
- .name = "list",
- .mode = COMMAND_ANY,
- .jim_handler = jim_flash_list,
- .help = "Returns a list of details about the flash banks.",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration flash_command_handlers[] = {
- {
- .name = "flash",
- .mode = COMMAND_ANY,
- .help = "NOR flash command group",
- .chain = flash_config_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-int flash_register_commands(struct command_context *cmd_ctx)
-{
- return register_commands(cmd_ctx, NULL, flash_command_handlers);
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/tms470.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/tms470.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/tms470.c
deleted file mode 100755
index 86858a8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/tms470.c
+++ /dev/null
@@ -1,1191 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2007,2008 by Christopher Kilgour *
- * techie |_at_| whiterocker |_dot_| com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-
-/* ----------------------------------------------------------------------
- * Internal Support, Helpers
- * ---------------------------------------------------------------------- */
-
-struct tms470_flash_bank {
- unsigned ordinal;
-
- /* device identification register */
- uint32_t device_ident_reg;
- uint32_t silicon_version;
- uint32_t technology_family;
- uint32_t rom_flash;
- uint32_t part_number;
- const char *part_name;
-
-};
-
-static const struct flash_sector TMS470R1A256_SECTORS[] = {
- {0x00000000, 0x00002000, -1, -1},
- {0x00002000, 0x00002000, -1, -1},
- {0x00004000, 0x00002000, -1, -1},
- {0x00006000, 0x00002000, -1, -1},
- {0x00008000, 0x00008000, -1, -1},
- {0x00010000, 0x00008000, -1, -1},
- {0x00018000, 0x00008000, -1, -1},
- {0x00020000, 0x00008000, -1, -1},
- {0x00028000, 0x00008000, -1, -1},
- {0x00030000, 0x00008000, -1, -1},
- {0x00038000, 0x00002000, -1, -1},
- {0x0003A000, 0x00002000, -1, -1},
- {0x0003C000, 0x00002000, -1, -1},
- {0x0003E000, 0x00002000, -1, -1},
-};
-
-#define TMS470R1A256_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A256_SECTORS)
-
-static const struct flash_sector TMS470R1A288_BANK0_SECTORS[] = {
- {0x00000000, 0x00002000, -1, -1},
- {0x00002000, 0x00002000, -1, -1},
- {0x00004000, 0x00002000, -1, -1},
- {0x00006000, 0x00002000, -1, -1},
-};
-
-#define TMS470R1A288_BANK0_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A288_BANK0_SECTORS)
-
-static const struct flash_sector TMS470R1A288_BANK1_SECTORS[] = {
- {0x00040000, 0x00010000, -1, -1},
- {0x00050000, 0x00010000, -1, -1},
- {0x00060000, 0x00010000, -1, -1},
- {0x00070000, 0x00010000, -1, -1},
-};
-
-#define TMS470R1A288_BANK1_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A288_BANK1_SECTORS)
-
-static const struct flash_sector TMS470R1A384_BANK0_SECTORS[] = {
- {0x00000000, 0x00002000, -1, -1},
- {0x00002000, 0x00002000, -1, -1},
- {0x00004000, 0x00004000, -1, -1},
- {0x00008000, 0x00004000, -1, -1},
- {0x0000C000, 0x00004000, -1, -1},
- {0x00010000, 0x00004000, -1, -1},
- {0x00014000, 0x00004000, -1, -1},
- {0x00018000, 0x00002000, -1, -1},
- {0x0001C000, 0x00002000, -1, -1},
- {0x0001E000, 0x00002000, -1, -1},
-};
-
-#define TMS470R1A384_BANK0_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A384_BANK0_SECTORS)
-
-static const struct flash_sector TMS470R1A384_BANK1_SECTORS[] = {
- {0x00020000, 0x00008000, -1, -1},
- {0x00028000, 0x00008000, -1, -1},
- {0x00030000, 0x00008000, -1, -1},
- {0x00038000, 0x00008000, -1, -1},
-};
-
-#define TMS470R1A384_BANK1_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A384_BANK1_SECTORS)
-
-static const struct flash_sector TMS470R1A384_BANK2_SECTORS[] = {
- {0x00040000, 0x00008000, -1, -1},
- {0x00048000, 0x00008000, -1, -1},
- {0x00050000, 0x00008000, -1, -1},
- {0x00058000, 0x00008000, -1, -1},
-};
-
-#define TMS470R1A384_BANK2_NUM_SECTORS \
- ARRAY_SIZE(TMS470R1A384_BANK2_SECTORS)
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_read_part_info(struct flash_bank *bank)
-{
- struct tms470_flash_bank *tms470_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t device_ident_reg;
- uint32_t silicon_version;
- uint32_t technology_family;
- uint32_t rom_flash;
- uint32_t part_number;
- const char *part_name;
-
- /* we shall not rely on the caller in this test, this function allocates memory,
- thus and executing the code more than once may cause memory leak */
- if (tms470_info->device_ident_reg)
- return ERROR_OK;
-
- /* read and parse the device identification register */
- target_read_u32(target, 0xFFFFFFF0, &device_ident_reg);
-
- LOG_INFO("device_ident_reg = 0x%08" PRIx32 "", device_ident_reg);
-
- if ((device_ident_reg & 7) == 0) {
- LOG_WARNING("Cannot identify target as a TMS470 family.");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- silicon_version = (device_ident_reg >> 12) & 0xF;
- technology_family = (device_ident_reg >> 11) & 1;
- rom_flash = (device_ident_reg >> 10) & 1;
- part_number = (device_ident_reg >> 3) & 0x7f;
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- /*
- * If the part number is known, determine if the flash bank is valid
- * based on the base address being within the known flash bank
- * ranges. Then fixup/complete the remaining fields of the flash
- * bank structure.
- */
- switch (part_number) {
- case 0x0a:
- part_name = "TMS470R1A256";
-
- if (bank->base >= 0x00040000) {
- LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".",
- part_name,
- bank->base);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- tms470_info->ordinal = 0;
- bank->base = 0x00000000;
- bank->size = 256 * 1024;
- bank->num_sectors = TMS470R1A256_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A256_SECTORS));
- if (!bank->sectors)
- return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A256_SECTORS, sizeof(TMS470R1A256_SECTORS));
- break;
-
- case 0x2b:
- part_name = "TMS470R1A288";
-
- if (bank->base < 0x00008000) {
- tms470_info->ordinal = 0;
- bank->base = 0x00000000;
- bank->size = 32 * 1024;
- bank->num_sectors = TMS470R1A288_BANK0_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A288_BANK0_SECTORS));
- if (!bank->sectors)
- return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A288_BANK0_SECTORS,
- sizeof(TMS470R1A288_BANK0_SECTORS));
- } else if ((bank->base >= 0x00040000) && (bank->base < 0x00080000)) {
- tms470_info->ordinal = 1;
- bank->base = 0x00040000;
- bank->size = 256 * 1024;
- bank->num_sectors = TMS470R1A288_BANK1_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A288_BANK1_SECTORS));
- if (!bank->sectors)
- return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A288_BANK1_SECTORS,
- sizeof(TMS470R1A288_BANK1_SECTORS));
- } else {
- LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".",
- part_name, bank->base);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- break;
-
- case 0x2d:
- part_name = "TMS470R1A384";
-
- if (bank->base < 0x00020000) {
- tms470_info->ordinal = 0;
- bank->base = 0x00000000;
- bank->size = 128 * 1024;
- bank->num_sectors = TMS470R1A384_BANK0_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A384_BANK0_SECTORS));
- if (!bank->sectors)
- return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A384_BANK0_SECTORS,
- sizeof(TMS470R1A384_BANK0_SECTORS));
- } else if ((bank->base >= 0x00020000) && (bank->base < 0x00040000)) {
- tms470_info->ordinal = 1;
- bank->base = 0x00020000;
- bank->size = 128 * 1024;
- bank->num_sectors = TMS470R1A384_BANK1_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A384_BANK1_SECTORS));
- if (!bank->sectors)
- return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A384_BANK1_SECTORS,
- sizeof(TMS470R1A384_BANK1_SECTORS));
- } else if ((bank->base >= 0x00040000) && (bank->base < 0x00060000)) {
- tms470_info->ordinal = 2;
- bank->base = 0x00040000;
- bank->size = 128 * 1024;
- bank->num_sectors = TMS470R1A384_BANK2_NUM_SECTORS;
- bank->sectors = malloc(sizeof(TMS470R1A384_BANK2_SECTORS));
- if (!bank->sectors)
- return ERROR_FLASH_OPERATION_FAILED;
- (void)memcpy(bank->sectors, TMS470R1A384_BANK2_SECTORS,
- sizeof(TMS470R1A384_BANK2_SECTORS));
- } else {
- LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".",
- part_name, bank->base);
- return ERROR_FLASH_OPERATION_FAILED;
- }
- break;
-
- default:
- LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.",
- (unsigned)part_number);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* turn off memory selects */
- target_write_u32(target, 0xFFFFFFE4, 0x00000000);
- target_write_u32(target, 0xFFFFFFE0, 0x00000000);
-
- bank->chip_width = 32;
- bank->bus_width = 32;
-
- LOG_INFO("Identified %s, ver=%d, core=%s, nvmem=%s.",
- part_name,
- (int)(silicon_version),
- (technology_family ? "1.8v" : "3.3v"),
- (rom_flash ? "rom" : "flash"));
-
- tms470_info->device_ident_reg = device_ident_reg;
- tms470_info->silicon_version = silicon_version;
- tms470_info->technology_family = technology_family;
- tms470_info->rom_flash = rom_flash;
- tms470_info->part_number = part_number;
- tms470_info->part_name = part_name;
-
- /*
- * Disable reset on address access violation.
- */
- target_write_u32(target, 0xFFFFFFE0, 0x00004007);
-
- return ERROR_OK;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static uint32_t keysSet;
-static uint32_t flashKeys[4];
-
-COMMAND_HANDLER(tms470_handle_flash_keyset_command)
-{
- if (CMD_ARGC > 4)
- return ERROR_COMMAND_SYNTAX_ERROR;
- else if (CMD_ARGC == 4) {
- int i;
-
- for (i = 0; i < 4; i++) {
- int start = (0 == strncmp(CMD_ARGV[i], "0x", 2)) ? 2 : 0;
-
- if (1 != sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flashKeys[i])) {
- command_print(CMD_CTX, "could not process flash key %s",
- CMD_ARGV[i]);
- LOG_ERROR("could not process flash key %s", CMD_ARGV[i]);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- }
-
- keysSet = 1;
- } else if (CMD_ARGC != 0) {
- command_print(CMD_CTX, "tms470 flash_keyset <key0> <key1> <key2> <key3>");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (keysSet) {
- command_print(CMD_CTX,
- "using flash keys 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 "",
- flashKeys[0],
- flashKeys[1],
- flashKeys[2],
- flashKeys[3]);
- } else
- command_print(CMD_CTX, "flash keys not set");
-
- return ERROR_OK;
-}
-
-static const uint32_t FLASH_KEYS_ALL_ONES[] = { 0xFFFFFFFF, 0xFFFFFFFF,
- 0xFFFFFFFF, 0xFFFFFFFF,};
-
-static const uint32_t FLASH_KEYS_ALL_ZEROS[] = { 0x00000000, 0x00000000,
- 0x00000000, 0x00000000,};
-
-static const uint32_t FLASH_KEYS_MIX1[] = { 0xf0fff0ff, 0xf0fff0ff,
- 0xf0fff0ff, 0xf0fff0ff};
-
-static const uint32_t FLASH_KEYS_MIX2[] = { 0x0000ffff, 0x0000ffff,
- 0x0000ffff, 0x0000ffff};
-
-/* ---------------------------------------------------------------------- */
-
-static int oscMHz = 12;
-
-COMMAND_HANDLER(tms470_handle_osc_megahertz_command)
-{
- if (CMD_ARGC > 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
- else if (CMD_ARGC == 1)
- sscanf(CMD_ARGV[0], "%d", &oscMHz);
-
- if (oscMHz <= 0) {
- LOG_ERROR("osc_megahertz must be positive and non-zero!");
- command_print(CMD_CTX, "osc_megahertz must be positive and non-zero!");
- oscMHz = 12;
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- command_print(CMD_CTX, "osc_megahertz=%d", oscMHz);
-
- return ERROR_OK;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int plldis;
-
-COMMAND_HANDLER(tms470_handle_plldis_command)
-{
- if (CMD_ARGC > 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
- else if (CMD_ARGC == 1) {
- sscanf(CMD_ARGV[0], "%d", &plldis);
- plldis = plldis ? 1 : 0;
- }
-
- command_print(CMD_CTX, "plldis=%d", plldis);
-
- return ERROR_OK;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_check_flash_unlocked(struct target *target)
-{
- uint32_t fmbbusy;
-
- target_read_u32(target, 0xFFE89C08, &fmbbusy);
- LOG_INFO("tms470 fmbbusy = 0x%08" PRIx32 " -> %s",
- fmbbusy,
- fmbbusy & 0x8000 ? "unlocked" : "LOCKED");
- return fmbbusy & 0x8000 ? ERROR_OK : ERROR_FLASH_OPERATION_FAILED;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_try_flash_keys(struct target *target, const uint32_t *key_set)
-{
- uint32_t glbctrl, fmmstat;
- int retval = ERROR_FLASH_OPERATION_FAILED;
-
- /* set GLBCTRL.4 */
- target_read_u32(target, 0xFFFFFFDC, &glbctrl);
- target_write_u32(target, 0xFFFFFFDC, glbctrl | 0x10);
-
- /* only perform the key match when 3VSTAT is clear */
- target_read_u32(target, 0xFFE8BC0C, &fmmstat);
- if (!(fmmstat & 0x08)) {
- unsigned i;
- uint32_t fmbptr, fmbac2, orig_fmregopt;
-
- target_write_u32(target, 0xFFE8BC04, fmmstat & ~0x07);
-
- /* wait for pump ready */
- do {
- target_read_u32(target, 0xFFE8A814, &fmbptr);
- alive_sleep(1);
- } while (!(fmbptr & 0x0200));
-
- /* force max wait states */
- target_read_u32(target, 0xFFE88004, &fmbac2);
- target_write_u32(target, 0xFFE88004, fmbac2 | 0xff);
-
- /* save current access mode, force normal read mode */
- target_read_u32(target, 0xFFE89C00, &orig_fmregopt);
- target_write_u32(target, 0xFFE89C00, 0x00);
-
- for (i = 0; i < 4; i++) {
- uint32_t tmp;
-
- /* There is no point displaying the value of tmp, it is
- * filtered by the chip. The purpose of this read is to
- * prime the unlocking logic rather than read out the value.
- */
- target_read_u32(target, 0x00001FF0 + 4 * i, &tmp);
-
- LOG_INFO("tms470 writing fmpkey = 0x%08" PRIx32 "", key_set[i]);
- target_write_u32(target, 0xFFE89C0C, key_set[i]);
- }
-
- if (ERROR_OK == tms470_check_flash_unlocked(target)) {
- /*
- * There seems to be a side-effect of reading the FMPKEY
- * register in that it re-enables the protection. So we
- * re-enable it.
- */
- for (i = 0; i < 4; i++) {
- uint32_t tmp;
-
- target_read_u32(target, 0x00001FF0 + 4 * i, &tmp);
- target_write_u32(target, 0xFFE89C0C, key_set[i]);
- }
- retval = ERROR_OK;
- }
-
- /* restore settings */
- target_write_u32(target, 0xFFE89C00, orig_fmregopt);
- target_write_u32(target, 0xFFE88004, fmbac2);
- }
-
- /* clear config bit */
- target_write_u32(target, 0xFFFFFFDC, glbctrl);
-
- return retval;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_unlock_flash(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- const uint32_t *p_key_sets[5];
- unsigned i, key_set_count;
-
- if (keysSet) {
- key_set_count = 5;
- p_key_sets[0] = flashKeys;
- p_key_sets[1] = FLASH_KEYS_ALL_ONES;
- p_key_sets[2] = FLASH_KEYS_ALL_ZEROS;
- p_key_sets[3] = FLASH_KEYS_MIX1;
- p_key_sets[4] = FLASH_KEYS_MIX2;
- } else {
- key_set_count = 4;
- p_key_sets[0] = FLASH_KEYS_ALL_ONES;
- p_key_sets[1] = FLASH_KEYS_ALL_ZEROS;
- p_key_sets[2] = FLASH_KEYS_MIX1;
- p_key_sets[3] = FLASH_KEYS_MIX2;
- }
-
- for (i = 0; i < key_set_count; i++) {
- if (tms470_try_flash_keys(target, p_key_sets[i]) == ERROR_OK) {
- LOG_INFO("tms470 flash is unlocked");
- return ERROR_OK;
- }
- }
-
- LOG_WARNING("tms470 could not unlock flash memory protection level 2");
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_flash_initialize_internal_state_machine(struct flash_bank *bank)
-{
- uint32_t fmmac2, fmmac1, fmmaxep, k, delay, glbctrl, sysclk;
- struct target *target = bank->target;
- struct tms470_flash_bank *tms470_info = bank->driver_priv;
- int result = ERROR_OK;
-
- /*
- * Select the desired bank to be programmed by writing BANK[2:0] of
- * FMMAC2.
- */
- target_read_u32(target, 0xFFE8BC04, &fmmac2);
- fmmac2 &= ~0x0007;
- fmmac2 |= (tms470_info->ordinal & 7);
- target_write_u32(target, 0xFFE8BC04, fmmac2);
- LOG_DEBUG("set fmmac2 = 0x%04" PRIx32 "", fmmac2);
-
- /*
- * Disable level 1 sector protection by setting bit 15 of FMMAC1.
- */
- target_read_u32(target, 0xFFE8BC00, &fmmac1);
- fmmac1 |= 0x8000;
- target_write_u32(target, 0xFFE8BC00, fmmac1);
- LOG_DEBUG("set fmmac1 = 0x%04" PRIx32 "", fmmac1);
-
- /*
- * FMTCREG = 0x2fc0;
- */
- target_write_u32(target, 0xFFE8BC10, 0x2fc0);
- LOG_DEBUG("set fmtcreg = 0x2fc0");
-
- /*
- * MAXPP = 50
- */
- target_write_u32(target, 0xFFE8A07C, 50);
- LOG_DEBUG("set fmmaxpp = 50");
-
- /*
- * MAXCP = 0xf000 + 2000
- */
- target_write_u32(target, 0xFFE8A084, 0xf000 + 2000);
- LOG_DEBUG("set fmmaxcp = 0x%04x", 0xf000 + 2000);
-
- /*
- * configure VHV
- */
- target_read_u32(target, 0xFFE8A080, &fmmaxep);
- if (fmmaxep == 0xf000) {
- fmmaxep = 0xf000 + 4095;
- target_write_u32(target, 0xFFE8A80C, 0x9964);
- LOG_DEBUG("set fmptr3 = 0x9964");
- } else {
- fmmaxep = 0xa000 + 4095;
- target_write_u32(target, 0xFFE8A80C, 0x9b64);
- LOG_DEBUG("set fmptr3 = 0x9b64");
- }
- target_write_u32(target, 0xFFE8A080, fmmaxep);
- LOG_DEBUG("set fmmaxep = 0x%04" PRIx32 "", fmmaxep);
-
- /*
- * FMPTR4 = 0xa000
- */
- target_write_u32(target, 0xFFE8A810, 0xa000);
- LOG_DEBUG("set fmptr4 = 0xa000");
-
- /*
- * FMPESETUP, delay parameter selected based on clock frequency.
- *
- * According to the TI App Note SPNU257 and flashing code, delay is
- * int((sysclk(MHz) + 1) / 2), with a minimum of 5. The system
- * clock is usually derived from the ZPLL module, and selected by
- * the plldis global.
- */
- target_read_u32(target, 0xFFFFFFDC, &glbctrl);
- sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * oscMHz / (1 + (glbctrl & 7));
- delay = (sysclk > 10) ? (sysclk + 1) / 2 : 5;
- target_write_u32(target, 0xFFE8A018, (delay << 4) | (delay << 8));
- LOG_DEBUG("set fmpsetup = 0x%04" PRIx32 "", (delay << 4) | (delay << 8));
-
- /*
- * FMPVEVACCESS, based on delay.
- */
- k = delay | (delay << 8);
- target_write_u32(target, 0xFFE8A05C, k);
- LOG_DEBUG("set fmpvevaccess = 0x%04" PRIx32 "", k);
-
- /*
- * FMPCHOLD, FMPVEVHOLD, FMPVEVSETUP, based on delay.
- */
- k <<= 1;
- target_write_u32(target, 0xFFE8A034, k);
- LOG_DEBUG("set fmpchold = 0x%04" PRIx32 "", k);
- target_write_u32(target, 0xFFE8A040, k);
- LOG_DEBUG("set fmpvevhold = 0x%04" PRIx32 "", k);
- target_write_u32(target, 0xFFE8A024, k);
- LOG_DEBUG("set fmpvevsetup = 0x%04" PRIx32 "", k);
-
- /*
- * FMCVACCESS, based on delay.
- */
- k = delay * 16;
- target_write_u32(target, 0xFFE8A060, k);
- LOG_DEBUG("set fmcvaccess = 0x%04" PRIx32 "", k);
-
- /*
- * FMCSETUP, based on delay.
- */
- k = 0x3000 | delay * 20;
- target_write_u32(target, 0xFFE8A020, k);
- LOG_DEBUG("set fmcsetup = 0x%04" PRIx32 "", k);
-
- /*
- * FMEHOLD, based on delay.
- */
- k = (delay * 20) << 2;
- target_write_u32(target, 0xFFE8A038, k);
- LOG_DEBUG("set fmehold = 0x%04" PRIx32 "", k);
-
- /*
- * PWIDTH, CWIDTH, EWIDTH, based on delay.
- */
- target_write_u32(target, 0xFFE8A050, delay * 8);
- LOG_DEBUG("set fmpwidth = 0x%04" PRIx32 "", delay * 8);
- target_write_u32(target, 0xFFE8A058, delay * 1000);
- LOG_DEBUG("set fmcwidth = 0x%04" PRIx32 "", delay * 1000);
- target_write_u32(target, 0xFFE8A054, delay * 5400);
- LOG_DEBUG("set fmewidth = 0x%04" PRIx32 "", delay * 5400);
-
- return result;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_flash_status(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- int result = ERROR_OK;
- uint32_t fmmstat;
-
- target_read_u32(target, 0xFFE8BC0C, &fmmstat);
- LOG_DEBUG("set fmmstat = 0x%04" PRIx32 "", fmmstat);
-
- if (fmmstat & 0x0080) {
- LOG_WARNING("tms470 flash command: erase still active after busy clear.");
- result = ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (fmmstat & 0x0040) {
- LOG_WARNING("tms470 flash command: program still active after busy clear.");
- result = ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (fmmstat & 0x0020) {
- LOG_WARNING("tms470 flash command: invalid data command.");
- result = ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (fmmstat & 0x0010) {
- LOG_WARNING("tms470 flash command: program, erase or validate sector failed.");
- result = ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (fmmstat & 0x0008) {
- LOG_WARNING("tms470 flash command: voltage instability detected.");
- result = ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (fmmstat & 0x0006) {
- LOG_WARNING("tms470 flash command: command suspend detected.");
- result = ERROR_FLASH_OPERATION_FAILED;
- }
-
- if (fmmstat & 0x0001) {
- LOG_WARNING("tms470 flash command: sector was locked.");
- result = ERROR_FLASH_OPERATION_FAILED;
- }
-
- return result;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_erase_sector(struct flash_bank *bank, int sector)
-{
- uint32_t glbctrl, orig_fmregopt, fmbsea, fmbseb, fmmstat;
- struct target *target = bank->target;
- uint32_t flashAddr = bank->base + bank->sectors[sector].offset;
- int result = ERROR_OK;
-
- /*
- * Set the bit GLBCTRL4 of the GLBCTRL register (in the System
- * module) to enable writing to the flash registers }.
- */
- target_read_u32(target, 0xFFFFFFDC, &glbctrl);
- target_write_u32(target, 0xFFFFFFDC, glbctrl | 0x10);
- LOG_DEBUG("set glbctrl = 0x%08" PRIx32 "", glbctrl | 0x10);
-
- /* Force normal read mode. */
- target_read_u32(target, 0xFFE89C00, &orig_fmregopt);
- target_write_u32(target, 0xFFE89C00, 0);
- LOG_DEBUG("set fmregopt = 0x%08x", 0);
-
- (void)tms470_flash_initialize_internal_state_machine(bank);
-
- /*
- * Select one or more bits in FMBSEA or FMBSEB to disable Level 1
- * protection for the particular sector to be erased/written.
- */
- if (sector < 16) {
- target_read_u32(target, 0xFFE88008, &fmbsea);
- target_write_u32(target, 0xFFE88008, fmbsea | (1 << sector));
- LOG_DEBUG("set fmbsea = 0x%04" PRIx32 "", fmbsea | (1 << sector));
- } else {
- target_read_u32(target, 0xFFE8800C, &fmbseb);
- target_write_u32(target, 0xFFE8800C, fmbseb | (1 << (sector - 16)));
- LOG_DEBUG("set fmbseb = 0x%04" PRIx32 "", fmbseb | (1 << (sector - 16)));
- }
- bank->sectors[sector].is_protected = 0;
-
- /*
- * clear status regiser, sent erase command, kickoff erase
- */
- target_write_u16(target, flashAddr, 0x0040);
- LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0040", flashAddr);
- target_write_u16(target, flashAddr, 0x0020);
- LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0020", flashAddr);
- target_write_u16(target, flashAddr, 0xffff);
- LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0xffff", flashAddr);
-
- /*
- * Monitor FMMSTAT, busy until clear, then check and other flags for
- * ultimate result of the operation.
- */
- do {
- target_read_u32(target, 0xFFE8BC0C, &fmmstat);
- if (fmmstat & 0x0100)
- alive_sleep(1);
- } while (fmmstat & 0x0100);
-
- result = tms470_flash_status(bank);
-
- if (sector < 16) {
- target_write_u32(target, 0xFFE88008, fmbsea);
- LOG_DEBUG("set fmbsea = 0x%04" PRIx32 "", fmbsea);
- bank->sectors[sector].is_protected = fmbsea & (1 << sector) ? 0 : 1;
- } else {
- target_write_u32(target, 0xFFE8800C, fmbseb);
- LOG_DEBUG("set fmbseb = 0x%04" PRIx32 "", fmbseb);
- bank->sectors[sector].is_protected = fmbseb & (1 << (sector - 16)) ? 0 : 1;
- }
- target_write_u32(target, 0xFFE89C00, orig_fmregopt);
- LOG_DEBUG("set fmregopt = 0x%08" PRIx32 "", orig_fmregopt);
- target_write_u32(target, 0xFFFFFFDC, glbctrl);
- LOG_DEBUG("set glbctrl = 0x%08" PRIx32 "", glbctrl);
-
- if (result == ERROR_OK)
- bank->sectors[sector].is_erased = 1;
-
- return result;
-}
-
-/*----------------------------------------------------------------------
- * Implementation of Flash Driver Interfaces
- *---------------------------------------------------------------------- */
-
-static const struct command_registration tms470_any_command_handlers[] = {
- {
- .name = "flash_keyset",
- .usage = "<key0> <key1> <key2> <key3>",
- .handler = tms470_handle_flash_keyset_command,
- .mode = COMMAND_ANY,
- .help = "tms470 flash_keyset <key0> <key1> <key2> <key3>",
- },
- {
- .name = "osc_megahertz",
- .usage = "<MHz>",
- .handler = tms470_handle_osc_megahertz_command,
- .mode = COMMAND_ANY,
- .help = "tms470 osc_megahertz <MHz>",
- },
- {
- .name = "plldis",
- .usage = "<0 | 1>",
- .handler = tms470_handle_plldis_command,
- .mode = COMMAND_ANY,
- .help = "tms470 plldis <0/1>",
- },
- COMMAND_REGISTRATION_DONE
-};
-static const struct command_registration tms470_command_handlers[] = {
- {
- .name = "tms470",
- .mode = COMMAND_ANY,
- .help = "TI tms470 flash command group",
- .usage = "",
- .chain = tms470_any_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_erase(struct flash_bank *bank, int first, int last)
-{
- struct tms470_flash_bank *tms470_info = bank->driver_priv;
- int sector, result = ERROR_OK;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- tms470_read_part_info(bank);
-
- if ((first < 0) || (first >= bank->num_sectors) || (last < 0) ||
- (last >= bank->num_sectors) || (first > last)) {
- LOG_ERROR("Sector range %d to %d invalid.", first, last);
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- result = tms470_unlock_flash(bank);
- if (result != ERROR_OK)
- return result;
-
- for (sector = first; sector <= last; sector++) {
- LOG_INFO("Erasing tms470 bank %d sector %d...", tms470_info->ordinal, sector);
-
- result = tms470_erase_sector(bank, sector);
-
- if (result != ERROR_OK) {
- LOG_ERROR("tms470 could not erase flash sector.");
- break;
- } else
- LOG_INFO("sector erased successfully.");
- }
-
- return result;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct tms470_flash_bank *tms470_info = bank->driver_priv;
- struct target *target = bank->target;
- uint32_t fmmac2, fmbsea, fmbseb;
- int sector;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- tms470_read_part_info(bank);
-
- if ((first < 0) || (first >= bank->num_sectors) || (last < 0) ||
- (last >= bank->num_sectors) || (first > last)) {
- LOG_ERROR("Sector range %d to %d invalid.", first, last);
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- /* enable the appropriate bank */
- target_read_u32(target, 0xFFE8BC04, &fmmac2);
- target_write_u32(target, 0xFFE8BC04, (fmmac2 & ~7) | tms470_info->ordinal);
-
- /* get the original sector proection flags for this bank */
- target_read_u32(target, 0xFFE88008, &fmbsea);
- target_read_u32(target, 0xFFE8800C, &fmbseb);
-
- for (sector = 0; sector < bank->num_sectors; sector++) {
- if (sector < 16) {
- fmbsea = set ? fmbsea & ~(1 << sector) : fmbsea | (1 << sector);
- bank->sectors[sector].is_protected = set ? 1 : 0;
- } else {
- fmbseb = set ? fmbseb &
- ~(1 << (sector - 16)) : fmbseb | (1 << (sector - 16));
- bank->sectors[sector].is_protected = set ? 1 : 0;
- }
- }
-
- /* update the protection bits */
- target_write_u32(target, 0xFFE88008, fmbsea);
- target_write_u32(target, 0xFFE8800C, fmbseb);
-
- return ERROR_OK;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t glbctrl, fmbac2, orig_fmregopt, fmbsea, fmbseb, fmmaxpp, fmmstat;
- int result = ERROR_OK;
- uint32_t i;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- tms470_read_part_info(bank);
-
- LOG_INFO("Writing %" PRId32 " bytes starting at 0x%08" PRIx32 "", count, bank->base +
- offset);
-
- /* set GLBCTRL.4 */
- target_read_u32(target, 0xFFFFFFDC, &glbctrl);
- target_write_u32(target, 0xFFFFFFDC, glbctrl | 0x10);
-
- (void)tms470_flash_initialize_internal_state_machine(bank);
-
- /* force max wait states */
- target_read_u32(target, 0xFFE88004, &fmbac2);
- target_write_u32(target, 0xFFE88004, fmbac2 | 0xff);
-
- /* save current access mode, force normal read mode */
- target_read_u32(target, 0xFFE89C00, &orig_fmregopt);
- target_write_u32(target, 0xFFE89C00, 0x00);
-
- /*
- * Disable Level 1 protection for all sectors to be erased/written.
- */
- target_read_u32(target, 0xFFE88008, &fmbsea);
- target_write_u32(target, 0xFFE88008, 0xffff);
- target_read_u32(target, 0xFFE8800C, &fmbseb);
- target_write_u32(target, 0xFFE8800C, 0xffff);
-
- /* read MAXPP */
- target_read_u32(target, 0xFFE8A07C, &fmmaxpp);
-
- for (i = 0; i < count; i += 2) {
- uint32_t addr = bank->base + offset + i;
- uint16_t word = (((uint16_t) buffer[i]) << 8) | (uint16_t) buffer[i + 1];
-
- if (word != 0xffff) {
- LOG_INFO("writing 0x%04x at 0x%08" PRIx32 "", word, addr);
-
- /* clear status register */
- target_write_u16(target, addr, 0x0040);
- /* program flash command */
- target_write_u16(target, addr, 0x0010);
- /* burn the 16-bit word (big-endian) */
- target_write_u16(target, addr, word);
-
- /*
- * Monitor FMMSTAT, busy until clear, then check and other flags
- * for ultimate result of the operation.
- */
- do {
- target_read_u32(target, 0xFFE8BC0C, &fmmstat);
- if (fmmstat & 0x0100)
- alive_sleep(1);
- } while (fmmstat & 0x0100);
-
- if (fmmstat & 0x3ff) {
- LOG_ERROR("fmstat = 0x%04" PRIx32 "", fmmstat);
- LOG_ERROR(
- "Could not program word 0x%04x at address 0x%08" PRIx32 ".",
- word,
- addr);
- result = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
- } else
- LOG_INFO("skipping 0xffff at 0x%08" PRIx32 "", addr);
- }
-
- /* restore */
- target_write_u32(target, 0xFFE88008, fmbsea);
- target_write_u32(target, 0xFFE8800C, fmbseb);
- target_write_u32(target, 0xFFE88004, fmbac2);
- target_write_u32(target, 0xFFE89C00, orig_fmregopt);
- target_write_u32(target, 0xFFFFFFDC, glbctrl);
-
- return result;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_probe(struct flash_bank *bank)
-{
- if (bank->target->state != TARGET_HALTED) {
- LOG_WARNING("Cannot communicate... target not halted.");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- return tms470_read_part_info(bank);
-}
-
-static int tms470_auto_probe(struct flash_bank *bank)
-{
- struct tms470_flash_bank *tms470_info = bank->driver_priv;
-
- if (tms470_info->device_ident_reg)
- return ERROR_OK;
- return tms470_probe(bank);
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_erase_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct tms470_flash_bank *tms470_info = bank->driver_priv;
- int sector, result = ERROR_OK;
- uint32_t fmmac2, fmbac2, glbctrl, orig_fmregopt;
- static uint8_t buffer[64 * 1024];
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!tms470_info->device_ident_reg)
- tms470_read_part_info(bank);
-
- /* set GLBCTRL.4 */
- target_read_u32(target, 0xFFFFFFDC, &glbctrl);
- target_write_u32(target, 0xFFFFFFDC, glbctrl | 0x10);
-
- /* save current access mode, force normal read mode */
- target_read_u32(target, 0xFFE89C00, &orig_fmregopt);
- target_write_u32(target, 0xFFE89C00, 0x00);
-
- /* enable the appropriate bank */
- target_read_u32(target, 0xFFE8BC04, &fmmac2);
- target_write_u32(target, 0xFFE8BC04, (fmmac2 & ~7) | tms470_info->ordinal);
-
- /* TCR = 0 */
- target_write_u32(target, 0xFFE8BC10, 0x2fc0);
-
- /* clear TEZ in fmbrdy */
- target_write_u32(target, 0xFFE88010, 0x0b);
-
- /* save current wait states, force max */
- target_read_u32(target, 0xFFE88004, &fmbac2);
- target_write_u32(target, 0xFFE88004, fmbac2 | 0xff);
-
- /*
- * The TI primitives inspect the flash memory by reading one 32-bit
- * word at a time. Here we read an entire sector and inspect it in
- * an attempt to reduce the JTAG overhead.
- */
- for (sector = 0; sector < bank->num_sectors; sector++) {
- if (bank->sectors[sector].is_erased != 1) {
- uint32_t i, addr = bank->base + bank->sectors[sector].offset;
-
- LOG_INFO("checking flash bank %d sector %d", tms470_info->ordinal, sector);
-
- target_read_buffer(target, addr, bank->sectors[sector].size, buffer);
-
- bank->sectors[sector].is_erased = 1;
- for (i = 0; i < bank->sectors[sector].size; i++) {
- if (buffer[i] != 0xff) {
- LOG_WARNING("tms470 bank %d, sector %d, not erased.",
- tms470_info->ordinal,
- sector);
- LOG_WARNING(
- "at location 0x%08" PRIx32 ": flash data is 0x%02x.",
- addr + i,
- buffer[i]);
-
- bank->sectors[sector].is_erased = 0;
- break;
- }
- }
- }
- if (bank->sectors[sector].is_erased != 1) {
- result = ERROR_FLASH_SECTOR_NOT_ERASED;
- break;
- } else
- LOG_INFO("sector erased");
- }
-
- /* reset TEZ, wait states, read mode, GLBCTRL.4 */
- target_write_u32(target, 0xFFE88010, 0x0f);
- target_write_u32(target, 0xFFE88004, fmbac2);
- target_write_u32(target, 0xFFE89C00, orig_fmregopt);
- target_write_u32(target, 0xFFFFFFDC, glbctrl);
-
- return result;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int tms470_protect_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct tms470_flash_bank *tms470_info = bank->driver_priv;
- int sector, result = ERROR_OK;
- uint32_t fmmac2, fmbsea, fmbseb;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (!tms470_info->device_ident_reg)
- tms470_read_part_info(bank);
-
- /* enable the appropriate bank */
- target_read_u32(target, 0xFFE8BC04, &fmmac2);
- target_write_u32(target, 0xFFE8BC04, (fmmac2 & ~7) | tms470_info->ordinal);
-
- target_read_u32(target, 0xFFE88008, &fmbsea);
- target_read_u32(target, 0xFFE8800C, &fmbseb);
-
- for (sector = 0; sector < bank->num_sectors; sector++) {
- int protected;
-
- if (sector < 16) {
- protected = fmbsea & (1 << sector) ? 0 : 1;
- bank->sectors[sector].is_protected = protected;
- } else {
- protected = fmbseb & (1 << (sector - 16)) ? 0 : 1;
- bank->sectors[sector].is_protected = protected;
- }
-
- LOG_DEBUG("bank %d sector %d is %s",
- tms470_info->ordinal,
- sector,
- protected ? "protected" : "not protected");
- }
-
- return result;
-}
-
-/* ---------------------------------------------------------------------- */
-
-static int get_tms470_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- int used = 0;
- struct tms470_flash_bank *tms470_info = bank->driver_priv;
-
- if (!tms470_info->device_ident_reg)
- tms470_read_part_info(bank);
-
- if (!tms470_info->device_ident_reg) {
- (void)snprintf(buf, buf_size, "Cannot identify target as a TMS470\n");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- used =
- snprintf(buf, buf_size, "\ntms470 information: Chip is %s\n",
- tms470_info->part_name);
- buf += used;
- buf_size -= used;
-
- snprintf(buf, buf_size, "Flash protection level 2 is %s\n",
- tms470_check_flash_unlocked(bank->target) == ERROR_OK ? "disabled" : "enabled");
-
- return ERROR_OK;
-}
-
-/* ---------------------------------------------------------------------- */
-
-/*
- * flash bank tms470 <base> <size> <chip_width> <bus_width> <target>
- * [options...]
- */
-
-FLASH_BANK_COMMAND_HANDLER(tms470_flash_bank_command)
-{
- bank->driver_priv = malloc(sizeof(struct tms470_flash_bank));
-
- if (!bank->driver_priv)
- return ERROR_FLASH_OPERATION_FAILED;
-
- (void)memset(bank->driver_priv, 0, sizeof(struct tms470_flash_bank));
-
- return ERROR_OK;
-}
-
-struct flash_driver tms470_flash = {
- .name = "tms470",
- .commands = tms470_command_handlers,
- .flash_bank_command = tms470_flash_bank_command,
- .erase = tms470_erase,
- .protect = tms470_protect,
- .write = tms470_write,
- .read = default_flash_read,
- .probe = tms470_probe,
- .auto_probe = tms470_auto_probe,
- .erase_check = tms470_erase_check,
- .protect_check = tms470_protect_check,
- .info = get_tms470_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/virtual.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/virtual.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/virtual.c
deleted file mode 100755
index 599a9c0..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/virtual.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-
-static struct flash_bank *virtual_get_master_bank(struct flash_bank *bank)
-{
- struct flash_bank *master_bank;
-
- master_bank = get_flash_bank_by_name_noprobe(bank->driver_priv);
- if (master_bank == NULL)
- LOG_ERROR("master flash bank '%s' does not exist", (char *)bank->driver_priv);
-
- return master_bank;
-}
-
-static void virtual_update_bank_info(struct flash_bank *bank)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
-
- if (master_bank == NULL)
- return;
-
- /* update the info we do not have */
- bank->size = master_bank->size;
- bank->chip_width = master_bank->chip_width;
- bank->bus_width = master_bank->bus_width;
- bank->default_padded_value = master_bank->default_padded_value;
- bank->num_sectors = master_bank->num_sectors;
- bank->sectors = master_bank->sectors;
-}
-
-FLASH_BANK_COMMAND_HANDLER(virtual_flash_bank_command)
-{
- if (CMD_ARGC < 7)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* get the master flash bank */
- const char *bank_name = CMD_ARGV[6];
- struct flash_bank *master_bank = get_flash_bank_by_name_noprobe(bank_name);
-
- if (master_bank == NULL) {
- LOG_ERROR("master flash bank '%s' does not exist", bank_name);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- /* save master bank name - use this to get settings later */
- bank->driver_priv = strdup(bank_name);
-
- return ERROR_OK;
-}
-
-static int virtual_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
- int retval;
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* call master handler */
- retval = master_bank->driver->protect(master_bank, set, first, last);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int virtual_protect_check(struct flash_bank *bank)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
- int retval;
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* call master handler */
- retval = master_bank->driver->protect_check(master_bank);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int virtual_erase(struct flash_bank *bank, int first, int last)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
- int retval;
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* call master handler */
- retval = master_bank->driver->erase(master_bank, first, last);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int virtual_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
- int retval;
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* call master handler */
- retval = master_bank->driver->write(master_bank, buffer, offset, count);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int virtual_probe(struct flash_bank *bank)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
- int retval;
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* call master handler */
- retval = master_bank->driver->probe(master_bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* update the info we do not have */
- virtual_update_bank_info(bank);
-
- return ERROR_OK;
-}
-
-static int virtual_auto_probe(struct flash_bank *bank)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
- int retval;
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* call master handler */
- retval = master_bank->driver->auto_probe(master_bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* update the info we do not have */
- virtual_update_bank_info(bank);
-
- return ERROR_OK;
-}
-
-static int virtual_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- snprintf(buf, buf_size, "%s driver for flash bank %s at 0x%8.8" PRIx32 "",
- bank->driver->name, master_bank->name, master_bank->base);
-
- return ERROR_OK;
-}
-
-static int virtual_blank_check(struct flash_bank *bank)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
- int retval;
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* call master handler */
- retval = master_bank->driver->erase_check(master_bank);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int virtual_flash_read(struct flash_bank *bank,
- uint8_t *buffer, uint32_t offset, uint32_t count)
-{
- struct flash_bank *master_bank = virtual_get_master_bank(bank);
- int retval;
-
- if (master_bank == NULL)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* call master handler */
- retval = master_bank->driver->read(master_bank, buffer, offset, count);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-struct flash_driver virtual_flash = {
- .name = "virtual",
- .flash_bank_command = virtual_flash_bank_command,
- .erase = virtual_erase,
- .protect = virtual_protect,
- .write = virtual_write,
- .read = virtual_flash_read,
- .probe = virtual_probe,
- .auto_probe = virtual_auto_probe,
- .erase_check = virtual_blank_check,
- .protect_check = virtual_protect_check,
- .info = virtual_info,
-};
[20/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf52.c.rej
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf52.c.rej b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf52.c.rej
deleted file mode 100644
index 5a4b892..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/nrf52.c.rej
+++ /dev/null
@@ -1,1059 +0,0 @@
-***************
-*** 0 ****
---- 1,1056 ----
-+ /***************************************************************************
-+ * Copyright (C) 2013 Synapse Product Development *
-+ * Andrey Smirnov <an...@...> *
-+ * Angus Gratton <gu...@...> *
-+ * Erdem U. Altunyurt <sp...@...> *
-+ * *
-+ * Ported nrf51 flash driver to the nrf52 Copyright (C) 2016 *
-+ * by Job Vranish <jv...@...> *
-+ * *
-+ * This program is free software; you can redistribute it and/or modify *
-+ * it under the terms of the GNU General Public License as published by *
-+ * the Free Software Foundation; either version 2 of the License, or *
-+ * (at your option) any later version. *
-+ * *
-+ * This program is distributed in the hope that it will be useful, *
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of *
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
-+ * GNU General Public License for more details. *
-+ * *
-+ * You should have received a copy of the GNU General Public License *
-+ * along with this program; if not, write to the *
-+ * Free Software Foundation, Inc., *
-+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
-+ ***************************************************************************/
-+
-+ #ifdef HAVE_CONFIG_H
-+ #include "config.h"
-+ #endif
-+
-+ #include "imp.h"
-+ #include <target/algorithm.h>
-+ #include <target/armv7m.h>
-+ #include <helper/types.h>
-+
-+ enum {
-+ NRF52_FLASH_BASE = 0x00000000,
-+ };
-+
-+ enum nrf52_ficr_registers {
-+ NRF52_FICR_BASE = 0x10000000, /* Factory Information Configuration Registers */
-+
-+ #define NRF52_FICR_REG(offset) (NRF52_FICR_BASE + offset)
-+
-+ NRF52_FICR_CODEPAGESIZE = NRF52_FICR_REG(0x010),
-+ NRF52_FICR_CODESIZE = NRF52_FICR_REG(0x014),
-+ NRF52_FICR_CLENR0 = NRF52_FICR_REG(0x028),
-+ NRF52_FICR_PPFC = NRF52_FICR_REG(0x02C),
-+ NRF52_FICR_NUMRAMBLOCK = NRF52_FICR_REG(0x034),
-+ NRF52_FICR_SIZERAMBLOCK0 = NRF52_FICR_REG(0x038),
-+ NRF52_FICR_SIZERAMBLOCK1 = NRF52_FICR_REG(0x03C),
-+ NRF52_FICR_SIZERAMBLOCK2 = NRF52_FICR_REG(0x040),
-+ NRF52_FICR_SIZERAMBLOCK3 = NRF52_FICR_REG(0x044),
-+ NRF52_FICR_CONFIGID = NRF52_FICR_REG(0x05C),
-+ NRF52_FICR_DEVICEID0 = NRF52_FICR_REG(0x060),
-+ NRF52_FICR_DEVICEID1 = NRF52_FICR_REG(0x064),
-+ NRF52_FICR_ER0 = NRF52_FICR_REG(0x080),
-+ NRF52_FICR_ER1 = NRF52_FICR_REG(0x084),
-+ NRF52_FICR_ER2 = NRF52_FICR_REG(0x088),
-+ NRF52_FICR_ER3 = NRF52_FICR_REG(0x08C),
-+ NRF52_FICR_IR0 = NRF52_FICR_REG(0x090),
-+ NRF52_FICR_IR1 = NRF52_FICR_REG(0x094),
-+ NRF52_FICR_IR2 = NRF52_FICR_REG(0x098),
-+ NRF52_FICR_IR3 = NRF52_FICR_REG(0x09C),
-+ NRF52_FICR_DEVICEADDRTYPE = NRF52_FICR_REG(0x0A0),
-+ NRF52_FICR_DEVICEADDR0 = NRF52_FICR_REG(0x0A4),
-+ NRF52_FICR_DEVICEADDR1 = NRF52_FICR_REG(0x0A8),
-+ };
-+
-+ enum nrf52_uicr_registers {
-+ NRF52_UICR_BASE = 0x10001000, /* User Information
-+ * Configuration Regsters */
-+
-+ NRF52_UICR_SIZE = 0x100,
-+
-+ #define NRF52_UICR_REG(offset) (NRF52_UICR_BASE + offset)
-+
-+ NRF52_UICR_CLENR0 = NRF52_UICR_REG(0x000),
-+ NRF52_UICR_RBPCONF = NRF52_UICR_REG(0x004),
-+ NRF52_UICR_XTALFREQ = NRF52_UICR_REG(0x008),
-+ NRF52_UICR_FWID = NRF52_UICR_REG(0x010),
-+ };
-+
-+ enum nrf52_nvmc_registers {
-+ NRF52_NVMC_BASE = 0x4001E000, /* Non-Volatile Memory
-+ * Controller Regsters */
-+
-+ #define NRF52_NVMC_REG(offset) (NRF52_NVMC_BASE + offset)
-+
-+ NRF52_NVMC_READY = NRF52_NVMC_REG(0x400),
-+ NRF52_NVMC_CONFIG = NRF52_NVMC_REG(0x504),
-+ NRF52_NVMC_ERASEPAGE = NRF52_NVMC_REG(0x508),
-+ NRF52_NVMC_ERASEALL = NRF52_NVMC_REG(0x50C),
-+ NRF52_NVMC_ERASEUICR = NRF52_NVMC_REG(0x514),
-+ };
-+
-+ enum nrf52_nvmc_config_bits {
-+ NRF52_NVMC_CONFIG_REN = 0x00,
-+ NRF52_NVMC_CONFIG_WEN = 0x01,
-+ NRF52_NVMC_CONFIG_EEN = 0x02,
-+
-+ };
-+
-+ struct nrf52_info {
-+ uint32_t code_page_size;
-+ uint32_t code_memory_size;
-+
-+ struct {
-+ bool probed;
-+ int (*write) (struct flash_bank *bank,
-+ struct nrf52_info *chip,
-+ const uint8_t *buffer, uint32_t offset, uint32_t count);
-+ } bank[2];
-+ struct target *target;
-+ };
-+
-+ struct nrf52_device_spec {
-+ uint16_t hwid;
-+ // The following two fields are informational only
-+ const char *variant;
-+ const char *build_code;
-+ // This is used to verify flash size read from device registers matches
-+ // what's expected
-+ unsigned int flash_size_kb;
-+ };
-+
-+ static const struct nrf52_device_spec nrf52_known_devices_table[] = {
-+ {
-+ .hwid = 0x0053,
-+ .variant = "QFAA",
-+ .build_code = "AA",
-+ .flash_size_kb = 512,
-+ },
-+ };
-+
-+ static int nrf52_bank_is_probed(struct flash_bank *bank)
-+ {
-+ struct nrf52_info *chip = bank->driver_priv;
-+
-+ assert(chip != NULL);
-+
-+ return chip->bank[bank->bank_number].probed;
-+ }
-+ static int nrf52_probe(struct flash_bank *bank);
-+
-+ static int nrf52_get_probed_chip_if_halted(struct flash_bank *bank, struct nrf52_info **chip)
-+ {
-+ if (bank->target->state != TARGET_HALTED) {
-+ LOG_ERROR("Target not halted");
-+ return ERROR_TARGET_NOT_HALTED;
-+ }
-+
-+ *chip = bank->driver_priv;
-+
-+ int probed = nrf52_bank_is_probed(bank);
-+ if (probed < 0)
-+ return probed;
-+ else if (!probed)
-+ return nrf52_probe(bank);
-+ else
-+ return ERROR_OK;
-+ }
-+
-+ static int nrf52_wait_for_nvmc(struct nrf52_info *chip)
-+ {
-+ uint32_t ready;
-+ int res;
-+ int timeout = 100;
-+
-+ do {
-+ res = target_read_u32(chip->target, NRF52_NVMC_READY, &ready);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read NVMC_READY register");
-+ return res;
-+ }
-+
-+ if (ready == 0x00000001)
-+ return ERROR_OK;
-+
-+ alive_sleep(1);
-+ } while (timeout--);
-+
-+ LOG_DEBUG("Timed out waiting for NVMC_READY");
-+ return ERROR_FLASH_BUSY;
-+ }
-+
-+ static int nrf52_nvmc_erase_enable(struct nrf52_info *chip)
-+ {
-+ int res;
-+ res = target_write_u32(chip->target,
-+ NRF52_NVMC_CONFIG,
-+ NRF52_NVMC_CONFIG_EEN);
-+
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Failed to enable erase operation");
-+ return res;
-+ }
-+
-+ /*
-+ According to NVMC examples in Nordic SDK busy status must be
-+ checked after writing to NVMC_CONFIG
-+ */
-+ res = nrf52_wait_for_nvmc(chip);
-+ if (res != ERROR_OK)
-+ LOG_ERROR("Erase enable did not complete");
-+
-+ return res;
-+ }
-+
-+ static int nrf52_nvmc_write_enable(struct nrf52_info *chip)
-+ {
-+ int res;
-+ res = target_write_u32(chip->target,
-+ NRF52_NVMC_CONFIG,
-+ NRF52_NVMC_CONFIG_WEN);
-+
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Failed to enable write operation");
-+ return res;
-+ }
-+
-+ /*
-+ According to NVMC examples in Nordic SDK busy status must be
-+ checked after writing to NVMC_CONFIG
-+ */
-+ res = nrf52_wait_for_nvmc(chip);
-+ if (res != ERROR_OK)
-+ LOG_ERROR("Write enable did not complete");
-+
-+ return res;
-+ }
-+
-+ static int nrf52_nvmc_read_only(struct nrf52_info *chip)
-+ {
-+ int res;
-+ res = target_write_u32(chip->target,
-+ NRF52_NVMC_CONFIG,
-+ NRF52_NVMC_CONFIG_REN);
-+
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Failed to enable read-only operation");
-+ return res;
-+ }
-+ /*
-+ According to NVMC examples in Nordic SDK busy status must be
-+ checked after writing to NVMC_CONFIG
-+ */
-+ res = nrf52_wait_for_nvmc(chip);
-+ if (res != ERROR_OK)
-+ LOG_ERROR("Read only enable did not complete");
-+
-+ return res;
-+ }
-+
-+ static int nrf52_nvmc_generic_erase(struct nrf52_info *chip,
-+ uint32_t erase_register, uint32_t erase_value)
-+ {
-+ int res;
-+
-+ res = nrf52_nvmc_erase_enable(chip);
-+ if (res != ERROR_OK)
-+ goto error;
-+
-+ res = target_write_u32(chip->target,
-+ erase_register,
-+ erase_value);
-+ if (res != ERROR_OK)
-+ goto set_read_only;
-+
-+ res = nrf52_wait_for_nvmc(chip);
-+ if (res != ERROR_OK)
-+ goto set_read_only;
-+
-+ return nrf52_nvmc_read_only(chip);
-+
-+ set_read_only:
-+ nrf52_nvmc_read_only(chip);
-+ error:
-+ LOG_ERROR("Failed to erase reg: 0x%08"PRIx32" val: 0x%08"PRIx32,
-+ erase_register, erase_value);
-+ return ERROR_FAIL;
-+ }
-+
-+ static int nrf52_protect_check(struct flash_bank *bank)
-+ {
-+ int res;
-+ uint32_t clenr0;
-+
-+ /* UICR cannot be write protected so just return early */
-+ if (bank->base == NRF52_UICR_BASE)
-+ return ERROR_OK;
-+
-+ struct nrf52_info *chip = bank->driver_priv;
-+
-+ assert(chip != NULL);
-+
-+ res = target_read_u32(chip->target, NRF52_FICR_CLENR0,
-+ &clenr0);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read code region 0 size[FICR]");
-+ return res;
-+ }
-+
-+ if (clenr0 == 0xFFFFFFFF) {
-+ res = target_read_u32(chip->target, NRF52_UICR_CLENR0,
-+ &clenr0);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read code region 0 size[UICR]");
-+ return res;
-+ }
-+ }
-+
-+ for (int i = 0; i < bank->num_sectors; i++)
-+ bank->sectors[i].is_protected =
-+ clenr0 != 0xFFFFFFFF && bank->sectors[i].offset < clenr0;
-+
-+ return ERROR_OK;
-+ }
-+
-+ static int nrf52_protect(struct flash_bank *bank, int set, int first, int last)
-+ {
-+ int res;
-+ uint32_t clenr0, ppfc;
-+ struct nrf52_info *chip;
-+
-+ /* UICR cannot be write protected so just bail out early */
-+ if (bank->base == NRF52_UICR_BASE)
-+ return ERROR_FAIL;
-+
-+ res = nrf52_get_probed_chip_if_halted(bank, &chip);
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ if (first != 0) {
-+ LOG_ERROR("Code region 0 must start at the begining of the bank");
-+ return ERROR_FAIL;
-+ }
-+
-+ res = target_read_u32(chip->target, NRF52_FICR_PPFC,
-+ &ppfc);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read PPFC register");
-+ return res;
-+ }
-+
-+ if ((ppfc & 0xFF) == 0x00) {
-+ LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings");
-+ return ERROR_FAIL;
-+ };
-+
-+ res = target_read_u32(chip->target, NRF52_UICR_CLENR0,
-+ &clenr0);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read code region 0 size[UICR]");
-+ return res;
-+ }
-+
-+ if (clenr0 == 0xFFFFFFFF) {
-+ res = target_write_u32(chip->target, NRF52_UICR_CLENR0,
-+ clenr0);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't write code region 0 size[UICR]");
-+ return res;
-+ }
-+
-+ } else {
-+ LOG_ERROR("You need to perform chip erase before changing the protection settings");
-+ }
-+
-+ nrf52_protect_check(bank);
-+
-+ return ERROR_OK;
-+ }
-+
-+ static int nrf52_probe(struct flash_bank *bank)
-+ {
-+ uint32_t hwid;
-+ int res;
-+ struct nrf52_info *chip = bank->driver_priv;
-+
-+ res = target_read_u32(chip->target, NRF52_FICR_CONFIGID, &hwid);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read CONFIGID register");
-+ return res;
-+ }
-+
-+ hwid &= 0xFFFF; /* HWID is stored in the lower two
-+ * bytes of the CONFIGID register */
-+
-+ const struct nrf52_device_spec *spec = NULL;
-+ for (size_t i = 0; i < ARRAY_SIZE(nrf52_known_devices_table); i++)
-+ if (hwid == nrf52_known_devices_table[i].hwid) {
-+ spec = &nrf52_known_devices_table[i];
-+ break;
-+ }
-+
-+ if (!chip->bank[0].probed && !chip->bank[1].probed) {
-+ if (spec)
-+ LOG_INFO("nRF51822-%s(build code: %s) %ukB Flash",
-+ spec->variant, spec->build_code, spec->flash_size_kb);
-+ else
-+ LOG_WARNING("Unknown device (HWID 0x%08" PRIx32 ")", hwid);
-+ }
-+
-+
-+ if (bank->base == NRF52_FLASH_BASE) {
-+ res = target_read_u32(chip->target, NRF52_FICR_CODEPAGESIZE,
-+ &chip->code_page_size);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read code page size");
-+ return res;
-+ }
-+
-+ res = target_read_u32(chip->target, NRF52_FICR_CODESIZE,
-+ &chip->code_memory_size);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read code memory size");
-+ return res;
-+ }
-+
-+ bank->size = chip->code_memory_size * chip->code_page_size;
-+ bank->num_sectors = bank->size / chip->code_page_size;
-+ bank->sectors = calloc(bank->num_sectors,
-+ sizeof((bank->sectors)[0]));
-+ if (!bank->sectors)
-+ return ERROR_FLASH_BANK_NOT_PROBED;
-+
-+ unsigned int code_memory_size_kb = bank->size / 1024;
-+
-+ if (spec && code_memory_size_kb != spec->flash_size_kb) {
-+ LOG_INFO("Chip's reported Flash capacity (%ukB) di not match expected one (%ukB)", code_memory_size_kb, spec->flash_size_kb);
-+ return ERROR_FAIL;
-+ }
-+
-+ /* Fill out the sector information: all NRF51 sectors are the same size and
-+ * there is always a fixed number of them. */
-+ for (int i = 0; i < bank->num_sectors; i++) {
-+ bank->sectors[i].size = chip->code_page_size;
-+ bank->sectors[i].offset = i * chip->code_page_size;
-+
-+ /* mark as unknown */
-+ bank->sectors[i].is_erased = -1;
-+ bank->sectors[i].is_protected = -1;
-+ }
-+
-+ nrf52_protect_check(bank);
-+
-+ chip->bank[0].probed = true;
-+ } else {
-+ bank->size = NRF52_UICR_SIZE;
-+ bank->num_sectors = 1;
-+ bank->sectors = calloc(bank->num_sectors,
-+ sizeof((bank->sectors)[0]));
-+ if (!bank->sectors)
-+ return ERROR_FLASH_BANK_NOT_PROBED;
-+
-+ bank->sectors[0].size = bank->size;
-+ bank->sectors[0].offset = 0;
-+
-+ /* mark as unknown */
-+ bank->sectors[0].is_erased = 0;
-+ bank->sectors[0].is_protected = 0;
-+
-+ chip->bank[1].probed = true;
-+ }
-+
-+ return ERROR_OK;
-+ }
-+
-+ static int nrf52_auto_probe(struct flash_bank *bank)
-+ {
-+ int probed = nrf52_bank_is_probed(bank);
-+
-+ if (probed < 0)
-+ return probed;
-+ else if (probed)
-+ return ERROR_OK;
-+ else
-+ return nrf52_probe(bank);
-+ }
-+
-+ static struct flash_sector *nrf52_find_sector_by_address(struct flash_bank *bank, uint32_t address)
-+ {
-+ struct nrf52_info *chip = bank->driver_priv;
-+
-+ for (int i = 0; i < bank->num_sectors; i++)
-+ if (bank->sectors[i].offset <= address &&
-+ address < (bank->sectors[i].offset + chip->code_page_size))
-+ return &bank->sectors[i];
-+ return NULL;
-+ }
-+
-+ static int nrf52_erase_all(struct nrf52_info *chip)
-+ {
-+ LOG_DEBUG("Erasing all non-volatile memory");
-+ return nrf52_nvmc_generic_erase(chip,
-+ NRF52_NVMC_ERASEALL,
-+ 0x00000001);
-+ }
-+
-+ static int nrf52_erase_page(struct flash_bank *bank,
-+ struct nrf52_info *chip,
-+ struct flash_sector *sector)
-+ {
-+ int res;
-+
-+ LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset);
-+ if (sector->is_protected) {
-+ LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset);
-+ return ERROR_FAIL;
-+ }
-+
-+ if (bank->base == NRF52_UICR_BASE) {
-+ uint32_t ppfc;
-+ res = target_read_u32(chip->target, NRF52_FICR_PPFC,
-+ &ppfc);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read PPFC register");
-+ return res;
-+ }
-+
-+ if ((ppfc & 0xFF) == 0xFF) {
-+ /* We can't erase the UICR. Double-check to
-+ see if it's already erased before complaining. */
-+ default_flash_blank_check(bank);
-+ if (sector->is_erased == 1)
-+ return ERROR_OK;
-+
-+ LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region");
-+ return ERROR_FAIL;
-+ };
-+
-+ res = nrf52_nvmc_generic_erase(chip,
-+ NRF52_NVMC_ERASEUICR,
-+ 0x00000001);
-+
-+
-+ } else {
-+ res = nrf52_nvmc_generic_erase(chip,
-+ NRF52_NVMC_ERASEPAGE,
-+ sector->offset);
-+ }
-+
-+ if (res == ERROR_OK)
-+ sector->is_erased = 1;
-+
-+ return res;
-+ }
-+
-+ static const uint8_t nrf52_flash_write_code[] = {
-+ /* See contrib/loaders/flash/cortex-m0.S */
-+ /* <wait_fifo>: */
-+ 0x0d, 0x68, /* ldr r5, [r1, #0] */
-+ 0x00, 0x2d, /* cmp r5, #0 */
-+ 0x0b, 0xd0, /* beq.n 1e <exit> */
-+ 0x4c, 0x68, /* ldr r4, [r1, #4] */
-+ 0xac, 0x42, /* cmp r4, r5 */
-+ 0xf9, 0xd0, /* beq.n 0 <wait_fifo> */
-+ 0x20, 0xcc, /* ldmia r4!, {r5} */
-+ 0x20, 0xc3, /* stmia r3!, {r5} */
-+ 0x94, 0x42, /* cmp r4, r2 */
-+ 0x01, 0xd3, /* bcc.n 18 <no_wrap> */
-+ 0x0c, 0x46, /* mov r4, r1 */
-+ 0x08, 0x34, /* adds r4, #8 */
-+ /* <no_wrap>: */
-+ 0x4c, 0x60, /* str r4, [r1, #4] */
-+ 0x04, 0x38, /* subs r0, #4 */
-+ 0xf0, 0xd1, /* bne.n 0 <wait_fifo> */
-+ /* <exit>: */
-+ 0x00, 0xbe /* bkpt 0x0000 */
-+ };
-+
-+
-+ /* Start a low level flash write for the specified region */
-+ static int nrf52_ll_flash_write(struct nrf52_info *chip, uint32_t offset, const uint8_t *buffer, uint32_t bytes)
-+ {
-+ struct target *target = chip->target;
-+ uint32_t buffer_size = 8192;
-+ struct working_area *write_algorithm;
-+ struct working_area *source;
-+ uint32_t address = NRF52_FLASH_BASE + offset;
-+ struct reg_param reg_params[4];
-+ struct armv7m_algorithm armv7m_info;
-+ int retval = ERROR_OK;
-+
-+
-+ LOG_DEBUG("Writing buffer to flash offset=0x%"PRIx32" bytes=0x%"PRIx32, offset, bytes);
-+ assert(bytes % 4 == 0);
-+
-+ /* allocate working area with flash programming code */
-+ if (target_alloc_working_area(target, sizeof(nrf52_flash_write_code),
-+ &write_algorithm) != ERROR_OK) {
-+ LOG_WARNING("no working area available, falling back to slow memory writes");
-+
-+ for (; bytes > 0; bytes -= 4) {
-+ retval = target_write_memory(chip->target, offset, 4, 1, buffer);
-+ if (retval != ERROR_OK)
-+ return retval;
-+
-+ retval = nrf52_wait_for_nvmc(chip);
-+ if (retval != ERROR_OK)
-+ return retval;
-+
-+ offset += 4;
-+ buffer += 4;
-+ }
-+
-+ return ERROR_OK;
-+ }
-+
-+ LOG_WARNING("using fast async flash loader. This is currently supported");
-+ LOG_WARNING("only with ST-Link and CMSIS-DAP. If you have issues, add");
-+ LOG_WARNING("\"set WORKAREASIZE 0\" before sourcing nrf52.cfg to disable it");
-+
-+ retval = target_write_buffer(target, write_algorithm->address,
-+ sizeof(nrf52_flash_write_code),
-+ nrf52_flash_write_code);
-+ if (retval != ERROR_OK)
-+ return retval;
-+
-+ /* memory buffer */
-+ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
-+ buffer_size /= 2;
-+ buffer_size &= ~3UL; /* Make sure it's 4 byte aligned */
-+ if (buffer_size <= 256) {
-+ /* free working area, write algorithm already allocated */
-+ target_free_working_area(target, write_algorithm);
-+
-+ LOG_WARNING("No large enough working area available, can't do block memory writes");
-+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-+ }
-+ }
-+
-+ armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-+ armv7m_info.core_mode = ARM_MODE_THREAD;
-+
-+ init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* byte count */
-+ init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer start */
-+ init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* buffer end */
-+ init_reg_param(®_params[3], "r3", 32, PARAM_IN_OUT); /* target address */
-+
-+ buf_set_u32(reg_params[0].value, 0, 32, bytes);
-+ buf_set_u32(reg_params[1].value, 0, 32, source->address);
-+ buf_set_u32(reg_params[2].value, 0, 32, source->address + source->size);
-+ buf_set_u32(reg_params[3].value, 0, 32, address);
-+
-+ retval = target_run_flash_async_algorithm(target, buffer, bytes/4, 4,
-+ 0, NULL,
-+ 4, reg_params,
-+ source->address, source->size,
-+ write_algorithm->address, 0,
-+ &armv7m_info);
-+
-+ target_free_working_area(target, source);
-+ target_free_working_area(target, write_algorithm);
-+
-+ destroy_reg_param(®_params[0]);
-+ destroy_reg_param(®_params[1]);
-+ destroy_reg_param(®_params[2]);
-+ destroy_reg_param(®_params[3]);
-+
-+ return retval;
-+ }
-+
-+ /* Check and erase flash sectors in specified range then start a low level page write.
-+ start/end must be sector aligned.
-+ */
-+ static int nrf52_write_pages(struct flash_bank *bank, uint32_t start, uint32_t end, const uint8_t *buffer)
-+ {
-+ int res = ERROR_FAIL;
-+ struct nrf52_info *chip = bank->driver_priv;
-+ struct flash_sector *sector;
-+ uint32_t offset;
-+
-+ assert(start % chip->code_page_size == 0);
-+ assert(end % chip->code_page_size == 0);
-+
-+ /* Erase all sectors */
-+ for (offset = start; offset < end; offset += chip->code_page_size) {
-+ sector = nrf52_find_sector_by_address(bank, offset);
-+ if (!sector) {
-+ LOG_ERROR("Invalid sector @ 0x%08"PRIx32, offset);
-+ return ERROR_FLASH_SECTOR_INVALID;
-+ }
-+
-+ if (sector->is_protected) {
-+ LOG_ERROR("Can't erase protected sector @ 0x%08"PRIx32, offset);
-+ goto error;
-+ }
-+
-+ if (sector->is_erased != 1) { /* 1 = erased, 0= not erased, -1 = unknown */
-+ res = nrf52_erase_page(bank, chip, sector);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Failed to erase sector @ 0x%08"PRIx32, sector->offset);
-+ goto error;
-+ }
-+ }
-+ sector->is_erased = 0;
-+ }
-+
-+ res = nrf52_nvmc_write_enable(chip);
-+ if (res != ERROR_OK)
-+ goto error;
-+
-+ res = nrf52_ll_flash_write(chip, start, buffer, (end - start));
-+ if (res != ERROR_OK)
-+ goto set_read_only;
-+
-+ return nrf52_nvmc_read_only(chip);
-+
-+ set_read_only:
-+ nrf52_nvmc_read_only(chip);
-+ error:
-+ LOG_ERROR("Failed to write to nrf52 flash");
-+ return res;
-+ }
-+
-+ static int nrf52_erase(struct flash_bank *bank, int first, int last)
-+ {
-+ int res;
-+ struct nrf52_info *chip;
-+
-+ res = nrf52_get_probed_chip_if_halted(bank, &chip);
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ /* For each sector to be erased */
-+ for (int s = first; s <= last && res == ERROR_OK; s++)
-+ res = nrf52_erase_page(bank, chip, &bank->sectors[s]);
-+
-+ return res;
-+ }
-+
-+ static int nrf52_code_flash_write(struct flash_bank *bank,
-+ struct nrf52_info *chip,
-+ const uint8_t *buffer, uint32_t offset, uint32_t count)
-+ {
-+
-+ int res;
-+ /* Need to perform reads to fill any gaps we need to preserve in the first page,
-+ before the start of buffer, or in the last page, after the end of buffer */
-+ uint32_t first_page = offset/chip->code_page_size;
-+ uint32_t last_page = DIV_ROUND_UP(offset+count, chip->code_page_size);
-+
-+ uint32_t first_page_offset = first_page * chip->code_page_size;
-+ uint32_t last_page_offset = last_page * chip->code_page_size;
-+
-+ LOG_DEBUG("Padding write from 0x%08"PRIx32"-0x%08"PRIx32" as 0x%08"PRIx32"-0x%08"PRIx32,
-+ offset, offset+count, first_page_offset, last_page_offset);
-+
-+ uint32_t page_cnt = last_page - first_page;
-+ uint8_t buffer_to_flash[page_cnt*chip->code_page_size];
-+
-+ /* Fill in any space between start of first page and start of buffer */
-+ uint32_t pre = offset - first_page_offset;
-+ if (pre > 0) {
-+ res = target_read_memory(bank->target,
-+ first_page_offset,
-+ 1,
-+ pre,
-+ buffer_to_flash);
-+ if (res != ERROR_OK)
-+ return res;
-+ }
-+
-+ /* Fill in main contents of buffer */
-+ memcpy(buffer_to_flash+pre, buffer, count);
-+
-+ /* Fill in any space between end of buffer and end of last page */
-+ uint32_t post = last_page_offset - (offset+count);
-+ if (post > 0) {
-+ /* Retrieve the full row contents from Flash */
-+ res = target_read_memory(bank->target,
-+ offset + count,
-+ 1,
-+ post,
-+ buffer_to_flash+pre+count);
-+ if (res != ERROR_OK)
-+ return res;
-+ }
-+
-+ return nrf52_write_pages(bank, first_page_offset, last_page_offset, buffer_to_flash);
-+ }
-+
-+ static int nrf52_uicr_flash_write(struct flash_bank *bank,
-+ struct nrf52_info *chip,
-+ const uint8_t *buffer, uint32_t offset, uint32_t count)
-+ {
-+ int res;
-+ uint8_t uicr[NRF52_UICR_SIZE];
-+ struct flash_sector *sector = &bank->sectors[0];
-+
-+ if ((offset + count) > NRF52_UICR_SIZE)
-+ return ERROR_FAIL;
-+
-+ res = target_read_memory(bank->target,
-+ NRF52_UICR_BASE,
-+ 1,
-+ NRF52_UICR_SIZE,
-+ uicr);
-+
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ if (sector->is_erased != 1) {
-+ res = nrf52_erase_page(bank, chip, sector);
-+ if (res != ERROR_OK)
-+ return res;
-+ }
-+
-+ res = nrf52_nvmc_write_enable(chip);
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ memcpy(&uicr[offset], buffer, count);
-+
-+ res = nrf52_ll_flash_write(chip, NRF52_UICR_BASE, uicr, NRF52_UICR_SIZE);
-+ if (res != ERROR_OK) {
-+ nrf52_nvmc_read_only(chip);
-+ return res;
-+ }
-+
-+ return nrf52_nvmc_read_only(chip);
-+ }
-+
-+
-+ static int nrf52_write(struct flash_bank *bank, const uint8_t *buffer,
-+ uint32_t offset, uint32_t count)
-+ {
-+ int res;
-+ struct nrf52_info *chip;
-+
-+ res = nrf52_get_probed_chip_if_halted(bank, &chip);
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ return chip->bank[bank->bank_number].write(bank, chip, buffer, offset, count);
-+ }
-+
-+
-+ FLASH_BANK_COMMAND_HANDLER(nrf52_flash_bank_command)
-+ {
-+ static struct nrf52_info *chip;
-+
-+ switch (bank->base) {
-+ case NRF52_FLASH_BASE:
-+ bank->bank_number = 0;
-+ break;
-+ case NRF52_UICR_BASE:
-+ bank->bank_number = 1;
-+ break;
-+ default:
-+ LOG_ERROR("Invalid bank address 0x%08" PRIx32, bank->base);
-+ return ERROR_FAIL;
-+ }
-+
-+ if (!chip) {
-+ /* Create a new chip */
-+ chip = calloc(1, sizeof(*chip));
-+ if (!chip)
-+ return ERROR_FAIL;
-+
-+ chip->target = bank->target;
-+ }
-+
-+ switch (bank->base) {
-+ case NRF52_FLASH_BASE:
-+ chip->bank[bank->bank_number].write = nrf52_code_flash_write;
-+ break;
-+ case NRF52_UICR_BASE:
-+ chip->bank[bank->bank_number].write = nrf52_uicr_flash_write;
-+ break;
-+ }
-+
-+ chip->bank[bank->bank_number].probed = false;
-+ bank->driver_priv = chip;
-+
-+ return ERROR_OK;
-+ }
-+
-+ COMMAND_HANDLER(nrf52_handle_mass_erase_command)
-+ {
-+ int res;
-+ struct flash_bank *bank = NULL;
-+ struct target *target = get_current_target(CMD_CTX);
-+
-+ res = get_flash_bank_by_addr(target, NRF52_FLASH_BASE, true, &bank);
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ assert(bank != NULL);
-+
-+ struct nrf52_info *chip;
-+
-+ res = nrf52_get_probed_chip_if_halted(bank, &chip);
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ uint32_t ppfc;
-+
-+ res = target_read_u32(target, NRF52_FICR_PPFC,
-+ &ppfc);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read PPFC register");
-+ return res;
-+ }
-+
-+ if ((ppfc & 0xFF) == 0x00) {
-+ LOG_ERROR("Code region 0 size was pre-programmed at the factory, "
-+ "mass erase command won't work.");
-+ return ERROR_FAIL;
-+ };
-+
-+ res = nrf52_erase_all(chip);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Failed to erase the chip");
-+ nrf52_protect_check(bank);
-+ return res;
-+ }
-+
-+ for (int i = 0; i < bank->num_sectors; i++)
-+ bank->sectors[i].is_erased = 1;
-+
-+ res = nrf52_protect_check(bank);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Failed to check chip's write protection");
-+ return res;
-+ }
-+
-+ res = get_flash_bank_by_addr(target, NRF52_UICR_BASE, true, &bank);
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ bank->sectors[0].is_erased = 1;
-+
-+ return ERROR_OK;
-+ }
-+
-+ static int nrf52_info(struct flash_bank *bank, char *buf, int buf_size)
-+ {
-+ int res;
-+
-+ struct nrf52_info *chip;
-+
-+ res = nrf52_get_probed_chip_if_halted(bank, &chip);
-+ if (res != ERROR_OK)
-+ return res;
-+
-+ static struct {
-+ const uint32_t address;
-+ uint32_t value;
-+ } ficr[] = {
-+ { .address = NRF52_FICR_CODEPAGESIZE },
-+ { .address = NRF52_FICR_CODESIZE },
-+ { .address = NRF52_FICR_CLENR0 },
-+ { .address = NRF52_FICR_PPFC },
-+ { .address = NRF52_FICR_NUMRAMBLOCK },
-+ { .address = NRF52_FICR_SIZERAMBLOCK0 },
-+ { .address = NRF52_FICR_SIZERAMBLOCK1 },
-+ { .address = NRF52_FICR_SIZERAMBLOCK2 },
-+ { .address = NRF52_FICR_SIZERAMBLOCK3 },
-+ { .address = NRF52_FICR_CONFIGID },
-+ { .address = NRF52_FICR_DEVICEID0 },
-+ { .address = NRF52_FICR_DEVICEID1 },
-+ { .address = NRF52_FICR_ER0 },
-+ { .address = NRF52_FICR_ER1 },
-+ { .address = NRF52_FICR_ER2 },
-+ { .address = NRF52_FICR_ER3 },
-+ { .address = NRF52_FICR_IR0 },
-+ { .address = NRF52_FICR_IR1 },
-+ { .address = NRF52_FICR_IR2 },
-+ { .address = NRF52_FICR_IR3 },
-+ { .address = NRF52_FICR_DEVICEADDRTYPE },
-+ { .address = NRF52_FICR_DEVICEADDR0 },
-+ { .address = NRF52_FICR_DEVICEADDR1 },
-+ };
-+
-+ for (size_t i = 0; i < ARRAY_SIZE(ficr); i++) {
-+ res = target_read_u32(chip->target, ficr[i].address,
-+ &ficr[i].value);
-+ if (res != ERROR_OK) {
-+ LOG_ERROR("Couldn't read %" PRIx32, ficr[i].address);
-+ return res;
-+ }
-+ }
-+
-+ snprintf(buf, buf_size,
-+ "\n[factory information control block]\n\n"
-+ "code page size: %"PRIu32"B\n"
-+ "code memory size: %"PRIu32"kB\n"
-+ "code region 0 size: %"PRIu32"kB\n"
-+ "pre-programmed code: %s\n"
-+ "number of ram blocks: %"PRIu32"\n"
-+ "ram block 0 size: %"PRIu32"B\n"
-+ "ram block 1 size: %"PRIu32"B\n"
-+ "ram block 2 size: %"PRIu32"B\n"
-+ "ram block 3 size: %"PRIu32 "B\n"
-+ "config id: %" PRIx32 "\n"
-+ "device id: 0x%"PRIx32"%08"PRIx32"\n"
-+ "encryption root: 0x%08"PRIx32"%08"PRIx32"%08"PRIx32"%08"PRIx32"\n"
-+ "identity root: 0x%08"PRIx32"%08"PRIx32"%08"PRIx32"%08"PRIx32"\n"
-+ "device address type: 0x%"PRIx32"\n"
-+ "device address: 0x%"PRIx32"%08"PRIx32"\n",
-+ ficr[0].value,
-+ ficr[1].value,
-+ (ficr[2].value == 0xFFFFFFFF) ? 0 : ficr[2].value / 1024,
-+ ((ficr[3].value & 0xFF) == 0x00) ? "present" : "not present",
-+ ficr[4].value,
-+ ficr[5].value,
-+ (ficr[6].value == 0xFFFFFFFF) ? 0 : ficr[6].value,
-+ (ficr[7].value == 0xFFFFFFFF) ? 0 : ficr[7].value,
-+ (ficr[8].value == 0xFFFFFFFF) ? 0 : ficr[8].value,
-+ ficr[9].value,
-+ ficr[10].value, ficr[11].value,
-+ ficr[12].value, ficr[13].value, ficr[14].value, ficr[15].value,
-+ ficr[16].value, ficr[17].value, ficr[18].value, ficr[19].value,
-+ ficr[20].value,
-+ ficr[21].value, ficr[22].value);
-+
-+ return ERROR_OK;
-+ }
-+
-+ static const struct command_registration nrf52_exec_command_handlers[] = {
-+ {
-+ .name = "mass_erase",
-+ .handler = nrf52_handle_mass_erase_command,
-+ .mode = COMMAND_EXEC,
-+ .help = "Erase all flash contents of the chip.",
-+ },
-+ COMMAND_REGISTRATION_DONE
-+ };
-+
-+ static const struct command_registration nrf52_command_handlers[] = {
-+ {
-+ .name = "nrf52",
-+ .mode = COMMAND_ANY,
-+ .help = "nrf52 flash command group",
-+ .usage = "",
-+ .chain = nrf52_exec_command_handlers,
-+ },
-+ COMMAND_REGISTRATION_DONE
-+ };
-+
-+ struct flash_driver nrf52_flash = {
-+ .name = "nrf52",
-+ .commands = nrf52_command_handlers,
-+ .flash_bank_command = nrf52_flash_bank_command,
-+ .info = nrf52_info,
-+ .erase = nrf52_erase,
-+ .protect = nrf52_protect,
-+ .write = nrf52_write,
-+ .read = default_flash_read,
-+ .probe = nrf52_probe,
-+ .auto_probe = nrf52_auto_probe,
-+ .erase_check = default_flash_blank_check,
-+ .protect_check = nrf52_protect_check,
-+ };
[15/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32l4x.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32l4x.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32l4x.c
deleted file mode 100755
index 32d5a0e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32l4x.c
+++ /dev/null
@@ -1,918 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2015 by Uwe Bonnes *
- * bon@elektron.ikp.physik.tu-darmstadt.de *
- *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-
-/* STM32L4xxx series for reference.
- *
- * RM0351
- * http://www.st.com/st-web-ui/static/active/en/resource/technical/document/reference_manual/DM00083560.pdf
- *
- * STM32L476RG Datasheet (for erase timing)
- * http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00108832.pdf
- *
- *
- * The device has normally two banks, but on 512 and 256 kiB devices an
- * option byte is available to map all sectors to the first bank.
- * Both STM32 banks are treated as one OpenOCD bank, as other STM32 devices
- * handlers do!
- *
- */
-
-/* Erase time can be as high as 25ms, 10x this and assume it's toast... */
-
-#define FLASH_ERASE_TIMEOUT 250
-
-#define STM32_FLASH_BASE 0x40022000
-#define STM32_FLASH_ACR 0x40022000
-#define STM32_FLASH_KEYR 0x40022008
-#define STM32_FLASH_OPTKEYR 0x4002200c
-#define STM32_FLASH_SR 0x40022010
-#define STM32_FLASH_CR 0x40022014
-#define STM32_FLASH_OPTR 0x40022020
-#define STM32_FLASH_WRP1AR 0x4002202c
-#define STM32_FLASH_WRP2AR 0x40022030
-#define STM32_FLASH_WRP1BR 0x4002204c
-#define STM32_FLASH_WRP2BR 0x40022050
-
-/* FLASH_CR register bits */
-
-#define FLASH_PG (1 << 0)
-#define FLASH_PER (1 << 1)
-#define FLASH_MER1 (1 << 2)
-#define FLASH_PAGE_SHIFT 3
-#define FLASH_CR_BKER (1 << 11)
-#define FLASH_MER2 (1 << 15)
-#define FLASH_STRT (1 << 16)
-#define FLASH_EOPIE (1 << 24)
-#define FLASH_ERRIE (1 << 25)
-#define FLASH_OPTLOCK (1 << 30)
-#define FLASH_LOCK (1 << 31)
-
-/* FLASH_SR register bits */
-
-#define FLASH_BSY (1 << 16)
-/* Fast programming not used => related errors not used*/
-#define FLASH_PGSERR (1 << 7) /* Programming sequence error */
-#define FLASH_SIZERR (1 << 6) /* Size error */
-#define FLASH_PGAERR (1 << 5) /* Programming alignment error */
-#define FLASH_WRPERR (1 << 4) /* Write protection error */
-#define FLASH_PROGERR (1 << 3) /* Programming error */
-#define FLASH_OPERR (1 << 1) /* Operation error */
-#define FLASH_EOP (1 << 0) /* End of operation */
-
-#define FLASH_ERROR (FLASH_PGSERR | FLASH_PGSERR | FLASH_PGAERR | FLASH_WRPERR | FLASH_OPERR)
-
-/* STM32_FLASH_OBR bit definitions (reading) */
-
-#define OPT_DUALBANK 21 /* dual flash bank only */
-
-/* register unlock keys */
-
-#define KEY1 0x45670123
-#define KEY2 0xCDEF89AB
-
-/* option register unlock key */
-#define OPTKEY1 0x08192A3B
-#define OPTKEY2 0x4C5D6E7F
-
-
-/* other registers */
-#define DBGMCU_IDCODE 0xE0042000
-#define FLASH_SIZE_REG 0x1FFF75E0
-
-struct stm32l4_options {
- uint8_t RDP;
- uint16_t bank_b_start;
- uint8_t user_options;
- uint8_t wpr1a_start;
- uint8_t wpr1a_end;
- uint8_t wpr1b_start;
- uint8_t wpr1b_end;
- uint8_t wpr2a_start;
- uint8_t wpr2a_end;
- uint8_t wpr2b_start;
- uint8_t wpr2b_end;
- /* Fixme: Handle PCROP */
-};
-
-struct stm32l4_flash_bank {
- struct stm32l4_options option_bytes;
- int probed;
-};
-
-/* flash bank stm32l4x <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(stm32l4_flash_bank_command)
-{
- struct stm32l4_flash_bank *stm32l4_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- stm32l4_info = malloc(sizeof(struct stm32l4_flash_bank));
- if (!stm32l4_info)
- return ERROR_FAIL; /* Checkme: What better error to use?*/
- bank->driver_priv = stm32l4_info;
-
- stm32l4_info->probed = 0;
-
- return ERROR_OK;
-}
-
-static inline int stm32l4_get_flash_reg(struct flash_bank *bank, uint32_t reg)
-{
- return reg;
-}
-
-static inline int stm32l4_get_flash_status(struct flash_bank *bank, uint32_t *status)
-{
- struct target *target = bank->target;
- return target_read_u32(
- target, stm32l4_get_flash_reg(bank, STM32_FLASH_SR), status);
-}
-
-static int stm32l4_wait_status_busy(struct flash_bank *bank, int timeout)
-{
- struct target *target = bank->target;
- uint32_t status;
- int retval = ERROR_OK;
-
- /* wait for busy to clear */
- for (;;) {
- retval = stm32l4_get_flash_status(bank, &status);
- if (retval != ERROR_OK)
- return retval;
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
- if ((status & FLASH_BSY) == 0)
- break;
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
-
-
- if (status & FLASH_WRPERR) {
- LOG_ERROR("stm32x device protected");
- retval = ERROR_FAIL;
- }
-
- /* Clear but report errors */
- if (status & FLASH_ERROR) {
- /* If this operation fails, we ignore it and report the original
- * retval
- */
- target_write_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_SR),
- status & FLASH_ERROR);
- }
- return retval;
-}
-
-static int stm32l4_unlock_reg(struct target *target)
-{
- uint32_t ctrl;
-
- /* first check if not already unlocked
- * otherwise writing on STM32_FLASH_KEYR will fail
- */
- int retval = target_read_u32(target, STM32_FLASH_CR, &ctrl);
- if (retval != ERROR_OK)
- return retval;
-
- if ((ctrl & FLASH_LOCK) == 0)
- return ERROR_OK;
-
- /* unlock flash registers */
- retval = target_write_u32(target, STM32_FLASH_KEYR, KEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, STM32_FLASH_KEYR, KEY2);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, STM32_FLASH_CR, &ctrl);
- if (retval != ERROR_OK)
- return retval;
-
- if (ctrl & FLASH_LOCK) {
- LOG_ERROR("flash not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
- return ERROR_TARGET_FAILURE;
- }
-
- return ERROR_OK;
-}
-
-static int stm32l4_unlock_option_reg(struct target *target)
-{
- uint32_t ctrl;
-
- int retval = target_read_u32(target, STM32_FLASH_CR, &ctrl);
- if (retval != ERROR_OK)
- return retval;
-
- if ((ctrl & FLASH_OPTLOCK) == 0)
- return ERROR_OK;
-
- /* unlock option registers */
- retval = target_write_u32(target, STM32_FLASH_OPTKEYR, OPTKEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, STM32_FLASH_OPTKEYR, OPTKEY2);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, STM32_FLASH_CR, &ctrl);
- if (retval != ERROR_OK)
- return retval;
-
- if (ctrl & FLASH_OPTLOCK) {
- LOG_ERROR("options not unlocked STM32_FLASH_CR: %" PRIx32, ctrl);
- return ERROR_TARGET_FAILURE;
- }
-
- return ERROR_OK;
-}
-
-static int stm32l4_read_options(struct flash_bank *bank)
-{
- uint32_t optiondata;
- struct stm32l4_flash_bank *stm32l4_info = NULL;
- struct target *target = bank->target;
-
- stm32l4_info = bank->driver_priv;
-
- /* read current option bytes */
- int retval = target_read_u32(target, STM32_FLASH_OPTR, &optiondata);
- if (retval != ERROR_OK)
- return retval;
-
- stm32l4_info->option_bytes.user_options = (optiondata >> 8) & 0x3ffff;
- stm32l4_info->option_bytes.RDP = optiondata & 0xff;
-
- retval = target_read_u32(target, STM32_FLASH_WRP1AR, &optiondata);
- if (retval != ERROR_OK)
- return retval;
- stm32l4_info->option_bytes.wpr1a_start = optiondata & 0xff;
- stm32l4_info->option_bytes.wpr1a_end = (optiondata >> 16) & 0xff;
-
- retval = target_read_u32(target, STM32_FLASH_WRP2AR, &optiondata);
- if (retval != ERROR_OK)
- return retval;
- stm32l4_info->option_bytes.wpr2a_start = optiondata & 0xff;
- stm32l4_info->option_bytes.wpr2a_end = (optiondata >> 16) & 0xff;
-
- retval = target_read_u32(target, STM32_FLASH_WRP1BR, &optiondata);
- if (retval != ERROR_OK)
- return retval;
- stm32l4_info->option_bytes.wpr1b_start = optiondata & 0xff;
- stm32l4_info->option_bytes.wpr1b_end = (optiondata >> 16) & 0xff;
-
- retval = target_read_u32(target, STM32_FLASH_WRP2BR, &optiondata);
- if (retval != ERROR_OK)
- return retval;
- stm32l4_info->option_bytes.wpr2b_start = optiondata & 0xff;
- stm32l4_info->option_bytes.wpr2b_end = (optiondata >> 16) & 0xff;
-
- if (stm32l4_info->option_bytes.RDP != 0xAA)
- LOG_INFO("Device Security Bit Set");
-
- return ERROR_OK;
-}
-
-static int stm32l4_write_options(struct flash_bank *bank)
-{
- struct stm32l4_flash_bank *stm32l4_info = NULL;
- struct target *target = bank->target;
- uint32_t optiondata;
-
- stm32l4_info = bank->driver_priv;
-
- (void) optiondata;
- (void) stm32l4_info;
-
- int retval = stm32l4_unlock_option_reg(target);
- if (retval != ERROR_OK)
- return retval;
- /* FIXME: Implement Option writing!*/
- return ERROR_OK;
-}
-
-static int stm32l4_protect_check(struct flash_bank *bank)
-{
- struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
-
- /* read write protection settings */
- int retval = stm32l4_read_options(bank);
- if (retval != ERROR_OK) {
- LOG_DEBUG("unable to read option bytes");
- return retval;
- }
-
- for (int i = 0; i < bank->num_sectors; i++) {
- if (i < stm32l4_info->option_bytes.bank_b_start) {
- if (((i >= stm32l4_info->option_bytes.wpr1a_start) &&
- (i <= stm32l4_info->option_bytes.wpr1a_end)) ||
- ((i >= stm32l4_info->option_bytes.wpr2a_start) &&
- (i <= stm32l4_info->option_bytes.wpr2a_end)))
- bank->sectors[i].is_protected = 1;
- else
- bank->sectors[i].is_protected = 0;
- } else {
- uint8_t snb;
- snb = i - stm32l4_info->option_bytes.bank_b_start + 256;
- if (((snb >= stm32l4_info->option_bytes.wpr1b_start) &&
- (snb <= stm32l4_info->option_bytes.wpr1b_end)) ||
- ((snb >= stm32l4_info->option_bytes.wpr2b_start) &&
- (snb <= stm32l4_info->option_bytes.wpr2b_end)))
- bank->sectors[i].is_protected = 1;
- else
- bank->sectors[i].is_protected = 0;
- }
- }
- return ERROR_OK;
-}
-
-static int stm32l4_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- int i;
-
- assert(first < bank->num_sectors);
- assert(last < bank->num_sectors);
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- int retval;
- retval = stm32l4_unlock_reg(target);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- Sector Erase
- To erase a sector, follow the procedure below:
- 1. Check that no Flash memory operation is ongoing by
- checking the BSY bit in the FLASH_SR register
- 2. Set the PER bit and select the page and bank
- you wish to erase in the FLASH_CR register
- 3. Set the STRT bit in the FLASH_CR register
- 4. Wait for the BSY bit to be cleared
- */
- struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
-
- for (i = first; i <= last; i++) {
- uint32_t erase_flags;
- erase_flags = FLASH_PER | FLASH_STRT;
-
- if (i >= stm32l4_info->option_bytes.bank_b_start) {
- uint8_t snb;
- snb = (i - stm32l4_info->option_bytes.bank_b_start) + 256;
- erase_flags |= snb << FLASH_PAGE_SHIFT | FLASH_CR_BKER;
- } else
- erase_flags |= i << FLASH_PAGE_SHIFT;
- retval = target_write_u32(target,
- stm32l4_get_flash_reg(bank, STM32_FLASH_CR), erase_flags);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- bank->sectors[i].is_erased = 1;
- }
-
- retval = target_write_u32(
- target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32l4_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct target *target = bank->target;
- struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* read protection settings */
- int retval = stm32l4_read_options(bank);
- if (retval != ERROR_OK) {
- LOG_DEBUG("unable to read option bytes");
- return retval;
- }
-
- (void)stm32l4_info;
- /* FIXME: Write First and last in a valid WRPxx_start/end combo*/
- retval = stm32l4_write_options(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-/* Count is in halfwords */
-static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
- struct reg_param reg_params[5];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* See contrib/loaders/flash/stm32l4x.S for source and
- * hints how to generate the data!
- */
-
- static const uint8_t stm32l4_flash_write_code[] = {
- 0xd0, 0xf8, 0x00, 0x80, 0xb8, 0xf1, 0x00, 0x0f, 0x21, 0xd0, 0x45, 0x68,
- 0xb8, 0xeb, 0x05, 0x06, 0x44, 0xbf, 0x76, 0x18, 0x36, 0x1a, 0x08, 0x2e,
- 0xf2, 0xd3, 0xdf, 0xf8, 0x36, 0x60, 0x66, 0x61, 0xf5, 0xe8, 0x02, 0x67,
- 0xe2, 0xe8, 0x02, 0x67, 0xbf, 0xf3, 0x4f, 0x8f, 0x26, 0x69, 0x16, 0xf4,
- 0x80, 0x3f, 0xfb, 0xd1, 0x16, 0xf0, 0xfa, 0x0f, 0x07, 0xd1, 0x8d, 0x42,
- 0x28, 0xbf, 0x00, 0xf1, 0x08, 0x05, 0x45, 0x60, 0x01, 0x3b, 0x13, 0xb1,
- 0xda, 0xe7, 0x00, 0x21, 0x41, 0x60, 0x30, 0x46, 0x00, 0xbe, 0x01, 0x00,
- 0x00, 0x00
- };
-
- if (target_alloc_working_area(target, sizeof(stm32l4_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(stm32l4_flash_write_code),
- stm32l4_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area_try(target, buffer_size, &source) !=
- ERROR_OK) {
- buffer_size /= 2;
- if (buffer_size <= 256) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* buffer end */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* target address */
- init_reg_param(®_params[3], "r3", 32, PARAM_OUT); /* count (double word-64bit) */
- init_reg_param(®_params[4], "r4", 32, PARAM_OUT); /* flash base */
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size);
- buf_set_u32(reg_params[2].value, 0, 32, address);
- buf_set_u32(reg_params[3].value, 0, 32, count / 4);
- buf_set_u32(reg_params[4].value, 0, 32, STM32_FLASH_BASE);
-
- retval = target_run_flash_async_algorithm(target, buffer, count, 2,
- 0, NULL,
- 5, reg_params,
- source->address, source->size,
- write_algorithm->address, 0,
- &armv7m_info);
-
- if (retval == ERROR_FLASH_OPERATION_FAILED) {
- LOG_ERROR("error executing stm32l4 flash write algorithm");
-
- uint32_t error = buf_get_u32(reg_params[0].value, 0, 32) & FLASH_ERROR;
-
- if (error & FLASH_WRPERR)
- LOG_ERROR("flash memory write protected");
-
- if (error != 0) {
- LOG_ERROR("flash write failed = %08" PRIx32, error);
- /* Clear but report errors */
- target_write_u32(target, STM32_FLASH_SR, error);
- retval = ERROR_FAIL;
- }
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- destroy_reg_param(®_params[3]);
- destroy_reg_param(®_params[4]);
-
- return retval;
-}
-
-static int stm32l4_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- int retval;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x7) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment",
- offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- if (count & 0x7) {
- LOG_WARNING("Padding %d bytes to keep 8-byte write size",
- count & 7);
- count = (count + 7) & ~7;
- /* This pads the write chunk with random bytes by overrunning the
- * write buffer. Padding with the erased pattern 0xff is purely
- * cosmetical, as 8-byte flash words are ECC secured and the first
- * write will program the ECC bits. A second write would need
- * to reprogramm these ECC bits.
- * But this can only be done after erase!
- */
- }
-
- retval = stm32l4_unlock_reg(target);
- if (retval != ERROR_OK)
- return retval;
-
- /* Only full double words (8-byte) can be programmed*/
- retval = stm32l4_write_block(bank, buffer, offset, count / 2);
- if (retval != ERROR_OK) {
- LOG_WARNING("block write failed");
- return retval;
- }
-
- LOG_WARNING("block write succeeded");
- return target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK);
-}
-
-static int stm32l4_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
- int i;
- uint16_t flash_size_in_kb = 0xffff;
- uint32_t device_id;
- uint32_t options;
- uint32_t base_address = 0x08000000;
-
- stm32l4_info->probed = 0;
-
- /* read stm32 device id register */
- int retval = target_read_u32(target, DBGMCU_IDCODE, &device_id);
- if (retval != ERROR_OK)
- return retval;
- LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
-
- /* set max flash size depending on family */
- switch (device_id & 0xfff) {
- case 0x415:
- break;
- default:
- LOG_WARNING("Cannot identify target as a STM32L4 family.");
- return ERROR_FAIL;
- }
-
- /* get flash size from target. */
- retval = target_read_u16(target, FLASH_SIZE_REG, &flash_size_in_kb);
-
- /* get options to for DUAL BANK. */
- retval = target_read_u32(target, STM32_FLASH_OPTR, &options);
-
- /* only devices with < 1024 kiB may be set to single bank dual banks */
- if ((flash_size_in_kb == 1024) || !(options & OPT_DUALBANK))
- stm32l4_info->option_bytes.bank_b_start = 256;
- else
- stm32l4_info->option_bytes.bank_b_start = flash_size_in_kb << 9;
-
- LOG_INFO("flash size = %dkbytes", flash_size_in_kb);
-
- /* did we assign flash size? */
- assert((flash_size_in_kb != 0xffff) && flash_size_in_kb);
-
- /* calculate numbers of pages */
- int num_pages = flash_size_in_kb / 2;
-
- /* check that calculation result makes sense */
- assert(num_pages > 0);
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->base = base_address;
- bank->size = num_pages * (1 << 11);
- bank->num_sectors = num_pages;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
- if (!bank->sectors)
- return ERROR_FAIL; /* Checkme: What better error to use?*/
-
- for (i = 0; i < num_pages; i++) {
- bank->sectors[i].offset = i << 11;
- bank->sectors[i].size = 1 << 11;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- stm32l4_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int stm32l4_auto_probe(struct flash_bank *bank)
-{
- struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
- if (stm32l4_info->probed)
- return ERROR_OK;
- return stm32l4_probe(bank);
-}
-
-static int get_stm32l4_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct target *target = bank->target;
- uint32_t dbgmcu_idcode;
-
- /* read stm32 device id register */
- int retval = target_read_u32(target, DBGMCU_IDCODE, &dbgmcu_idcode);
- if (retval != ERROR_OK)
- return retval;
-
- uint16_t device_id = dbgmcu_idcode & 0xffff;
- uint8_t rev_id = dbgmcu_idcode >> 28;
- uint8_t rev_minor = 0;
- int i;
-
- for (i = 16; i < 28; i++) {
- if (dbgmcu_idcode & (1 << i))
- rev_minor++;
- else
- break;
- }
-
- const char *device_str;
-
- switch (device_id) {
- case 0x6415:
- device_str = "STM32L4xx";
- break;
-
- default:
- snprintf(buf, buf_size, "Cannot identify target as a STM32L4\n");
- return ERROR_FAIL;
- }
-
- snprintf(buf, buf_size, "%s - Rev: %1d.%02d",
- device_str, rev_id, rev_minor);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32l4_handle_lock_command)
-{
- struct target *target = NULL;
- struct stm32l4_flash_bank *stm32l4_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- stm32l4_info = bank->driver_priv;
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (stm32l4_read_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "%s failed to read options",
- bank->driver->name);
- return ERROR_OK;
- }
-
- /* set readout protection */
- stm32l4_info->option_bytes.RDP = 0;
-
- if (stm32l4_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "%s failed to lock device", bank->driver->name);
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "%s locked", bank->driver->name);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32l4_handle_unlock_command)
-{
- struct target *target = NULL;
- struct stm32l4_flash_bank *stm32l4_info = NULL;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- stm32l4_info = bank->driver_priv;
- target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (stm32l4_read_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
- return ERROR_OK;
- }
-
- /* clear readout protection and complementary option bytes
- * this will also force a device unlock if set */
- stm32l4_info->option_bytes.RDP = 0xAA;
-
- if (stm32l4_write_options(bank) != ERROR_OK) {
- command_print(CMD_CTX, "%s failed to unlock device",
- bank->driver->name);
- return ERROR_OK;
- }
-
- command_print(CMD_CTX, "%s unlocked.\n"
- "INFO: a reset or power cycle is required "
- "for the new settings to take effect.", bank->driver->name);
-
- return ERROR_OK;
-}
-
-static int stm32l4_mass_erase(struct flash_bank *bank, uint32_t action)
-{
- int retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = stm32l4_unlock_reg(target);
- if (retval != ERROR_OK)
- return retval;
-
- /* mass erase flash memory */
- retval = target_write_u32(
- target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), action);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(
- target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR),
- action | FLASH_STRT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(
- target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_LOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
-{
- int i;
- uint32_t action;
-
- if (CMD_ARGC < 1) {
- command_print(CMD_CTX, "stm32x mass_erase <STM32L4 bank>");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- action = FLASH_MER1 | FLASH_MER2;
- retval = stm32l4_mass_erase(bank, action);
- if (retval == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "stm32x mass erase complete");
- } else {
- command_print(CMD_CTX, "stm32x mass erase failed");
- }
-
- return retval;
-}
-
-static const struct command_registration stm32l4_exec_command_handlers[] = {
- {
- .name = "lock",
- .handler = stm32l4_handle_lock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Lock entire flash device.",
- },
- {
- .name = "unlock",
- .handler = stm32l4_handle_unlock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Unlock entire protected flash device.",
- },
- {
- .name = "mass_erase",
- .handler = stm32l4_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Erase entire flash device.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration stm32l4_command_handlers[] = {
- {
- .name = "stm32l4x",
- .mode = COMMAND_ANY,
- .help = "stm32l4x flash command group",
- .usage = "",
- .chain = stm32l4_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver stm32l4x_flash = {
- .name = "stm32l4x",
- .commands = stm32l4_command_handlers,
- .flash_bank_command = stm32l4_flash_bank_command,
- .erase = stm32l4_erase,
- .protect = stm32l4_protect,
- .write = stm32l4_write,
- .read = default_flash_read,
- .probe = stm32l4_probe,
- .auto_probe = stm32l4_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = stm32l4_protect_check,
- .info = get_stm32l4_info,
-};
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32lx.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32lx.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32lx.c
deleted file mode 100755
index 2ae58cc..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stm32lx.c
+++ /dev/null
@@ -1,1424 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * Copyright (C) 2011 by Clement Burin des Roziers *
- * clement.burin-des-roziers@hikob.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-#include <target/cortex_m.h>
-
-/* stm32lx flash register locations */
-
-#define FLASH_ACR 0x00
-#define FLASH_PECR 0x04
-#define FLASH_PDKEYR 0x08
-#define FLASH_PEKEYR 0x0C
-#define FLASH_PRGKEYR 0x10
-#define FLASH_OPTKEYR 0x14
-#define FLASH_SR 0x18
-#define FLASH_OBR 0x1C
-#define FLASH_WRPR 0x20
-
-/* FLASH_ACR bites */
-#define FLASH_ACR__LATENCY (1<<0)
-#define FLASH_ACR__PRFTEN (1<<1)
-#define FLASH_ACR__ACC64 (1<<2)
-#define FLASH_ACR__SLEEP_PD (1<<3)
-#define FLASH_ACR__RUN_PD (1<<4)
-
-/* FLASH_PECR bits */
-#define FLASH_PECR__PELOCK (1<<0)
-#define FLASH_PECR__PRGLOCK (1<<1)
-#define FLASH_PECR__OPTLOCK (1<<2)
-#define FLASH_PECR__PROG (1<<3)
-#define FLASH_PECR__DATA (1<<4)
-#define FLASH_PECR__FTDW (1<<8)
-#define FLASH_PECR__ERASE (1<<9)
-#define FLASH_PECR__FPRG (1<<10)
-#define FLASH_PECR__EOPIE (1<<16)
-#define FLASH_PECR__ERRIE (1<<17)
-#define FLASH_PECR__OBL_LAUNCH (1<<18)
-
-/* FLASH_SR bits */
-#define FLASH_SR__BSY (1<<0)
-#define FLASH_SR__EOP (1<<1)
-#define FLASH_SR__ENDHV (1<<2)
-#define FLASH_SR__READY (1<<3)
-#define FLASH_SR__WRPERR (1<<8)
-#define FLASH_SR__PGAERR (1<<9)
-#define FLASH_SR__SIZERR (1<<10)
-#define FLASH_SR__OPTVERR (1<<11)
-
-/* Unlock keys */
-#define PEKEY1 0x89ABCDEF
-#define PEKEY2 0x02030405
-#define PRGKEY1 0x8C9DAEBF
-#define PRGKEY2 0x13141516
-#define OPTKEY1 0xFBEAD9C8
-#define OPTKEY2 0x24252627
-
-/* other registers */
-#define DBGMCU_IDCODE 0xE0042000
-#define DBGMCU_IDCODE_L0 0x40015800
-
-/* Constants */
-#define FLASH_SECTOR_SIZE 4096
-#define FLASH_BANK0_ADDRESS 0x08000000
-
-/* option bytes */
-#define OPTION_BYTES_ADDRESS 0x1FF80000
-
-#define OPTION_BYTE_0_PR1 0xFFFF0000
-#define OPTION_BYTE_0_PR0 0xFF5500AA
-
-static int stm32lx_unlock_program_memory(struct flash_bank *bank);
-static int stm32lx_lock_program_memory(struct flash_bank *bank);
-static int stm32lx_enable_write_half_page(struct flash_bank *bank);
-static int stm32lx_erase_sector(struct flash_bank *bank, int sector);
-static int stm32lx_wait_until_bsy_clear(struct flash_bank *bank);
-static int stm32lx_lock(struct flash_bank *bank);
-static int stm32lx_unlock(struct flash_bank *bank);
-static int stm32lx_mass_erase(struct flash_bank *bank);
-static int stm32lx_wait_until_bsy_clear_timeout(struct flash_bank *bank, int timeout);
-
-struct stm32lx_rev {
- uint16_t rev;
- const char *str;
-};
-
-struct stm32lx_part_info {
- uint16_t id;
- const char *device_str;
- const struct stm32lx_rev *revs;
- size_t num_revs;
- unsigned int page_size;
- unsigned int pages_per_sector;
- uint16_t max_flash_size_kb;
- uint16_t first_bank_size_kb; /* used when has_dual_banks is true */
- bool has_dual_banks;
-
- uint32_t flash_base; /* Flash controller registers location */
- uint32_t fsize_base; /* Location of FSIZE register */
-};
-
-struct stm32lx_flash_bank {
- int probed;
- uint32_t idcode;
- uint32_t user_bank_size;
- uint32_t flash_base;
-
- const struct stm32lx_part_info *part_info;
-};
-
-static const struct stm32lx_rev stm32_416_revs[] = {
- { 0x1000, "A" }, { 0x1008, "Y" }, { 0x1038, "W" }, { 0x1078, "V" },
-};
-static const struct stm32lx_rev stm32_417_revs[] = {
- { 0x1000, "A" }, { 0x1008, "Z" }, { 0x1018, "Y" }, { 0x1038, "X" }
-};
-static const struct stm32lx_rev stm32_425_revs[] = {
- { 0x1000, "A" }, { 0x2000, "B" }, { 0x2008, "Y" },
-};
-static const struct stm32lx_rev stm32_427_revs[] = {
- { 0x1000, "A" }, { 0x1018, "Y" }, { 0x1038, "X" },
-};
-static const struct stm32lx_rev stm32_429_revs[] = {
- { 0x1000, "A" }, { 0x1018, "Z" },
-};
-static const struct stm32lx_rev stm32_436_revs[] = {
- { 0x1000, "A" }, { 0x1008, "Z" }, { 0x1018, "Y" },
-};
-static const struct stm32lx_rev stm32_437_revs[] = {
- { 0x1000, "A" },
-};
-static const struct stm32lx_rev stm32_447_revs[] = {
- { 0x1000, "A" }, { 0x2000, "B" }, { 0x2008, "Z" },
-};
-static const struct stm32lx_rev stm32_457_revs[] = {
- { 0x1000, "A" }, { 0x1008, "Z" },
-};
-
-static const struct stm32lx_part_info stm32lx_parts[] = {
- {
- .id = 0x416,
- .revs = stm32_416_revs,
- .num_revs = ARRAY_SIZE(stm32_416_revs),
- .device_str = "STM32L1xx (Cat.1 - Low/Medium Density)",
- .page_size = 256,
- .pages_per_sector = 16,
- .max_flash_size_kb = 128,
- .has_dual_banks = false,
- .flash_base = 0x40023C00,
- .fsize_base = 0x1FF8004C,
- },
- {
- .id = 0x417,
- .revs = stm32_417_revs,
- .num_revs = ARRAY_SIZE(stm32_417_revs),
- .device_str = "STM32L0xx (Cat. 3)",
- .page_size = 128,
- .pages_per_sector = 32,
- .max_flash_size_kb = 64,
- .has_dual_banks = false,
- .flash_base = 0x40022000,
- .fsize_base = 0x1FF8007C,
- },
- {
- .id = 0x425,
- .revs = stm32_425_revs,
- .num_revs = ARRAY_SIZE(stm32_425_revs),
- .device_str = "STM32L0xx (Cat. 2)",
- .page_size = 128,
- .pages_per_sector = 32,
- .max_flash_size_kb = 32,
- .has_dual_banks = false,
- .flash_base = 0x40022000,
- .fsize_base = 0x1FF8007C,
- },
- {
- .id = 0x427,
- .revs = stm32_427_revs,
- .num_revs = ARRAY_SIZE(stm32_427_revs),
- .device_str = "STM32L1xx (Cat.3 - Medium+ Density)",
- .page_size = 256,
- .pages_per_sector = 16,
- .max_flash_size_kb = 256,
- .first_bank_size_kb = 192,
- .has_dual_banks = true,
- .flash_base = 0x40023C00,
- .fsize_base = 0x1FF800CC,
- },
- {
- .id = 0x429,
- .revs = stm32_429_revs,
- .num_revs = ARRAY_SIZE(stm32_429_revs),
- .device_str = "STM32L1xx (Cat.2)",
- .page_size = 256,
- .pages_per_sector = 16,
- .max_flash_size_kb = 128,
- .has_dual_banks = false,
- .flash_base = 0x40023C00,
- .fsize_base = 0x1FF8004C,
- },
- {
- .id = 0x436,
- .revs = stm32_436_revs,
- .num_revs = ARRAY_SIZE(stm32_436_revs),
- .device_str = "STM32L1xx (Cat.4/Cat.3 - Medium+/High Density)",
- .page_size = 256,
- .pages_per_sector = 16,
- .max_flash_size_kb = 384,
- .first_bank_size_kb = 192,
- .has_dual_banks = true,
- .flash_base = 0x40023C00,
- .fsize_base = 0x1FF800CC,
- },
- {
- .id = 0x437,
- .revs = stm32_437_revs,
- .num_revs = ARRAY_SIZE(stm32_437_revs),
- .device_str = "STM32L1xx (Cat.5/Cat.6)",
- .page_size = 256,
- .pages_per_sector = 16,
- .max_flash_size_kb = 512,
- .first_bank_size_kb = 256,
- .has_dual_banks = true,
- .flash_base = 0x40023C00,
- .fsize_base = 0x1FF800CC,
- },
- {
- .id = 0x447,
- .revs = stm32_447_revs,
- .num_revs = ARRAY_SIZE(stm32_447_revs),
- .device_str = "STM32L0xx (Cat.5)",
- .page_size = 128,
- .pages_per_sector = 32,
- .max_flash_size_kb = 192,
- .first_bank_size_kb = 128,
- .has_dual_banks = true,
- .flash_base = 0x40022000,
- .fsize_base = 0x1FF8007C,
- },
- {
- .id = 0x457,
- .revs = stm32_457_revs,
- .num_revs = ARRAY_SIZE(stm32_457_revs),
- .device_str = "STM32L0xx (Cat.1)",
- .page_size = 128,
- .pages_per_sector = 32,
- .max_flash_size_kb = 16,
- .has_dual_banks = false,
- .flash_base = 0x40022000,
- .fsize_base = 0x1FF8007C,
- },
-};
-
-/* flash bank stm32lx <base> <size> 0 0 <target#>
- */
-FLASH_BANK_COMMAND_HANDLER(stm32lx_flash_bank_command)
-{
- struct stm32lx_flash_bank *stm32lx_info;
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- /* Create the bank structure */
- stm32lx_info = calloc(1, sizeof(*stm32lx_info));
-
- /* Check allocation */
- if (stm32lx_info == NULL) {
- LOG_ERROR("failed to allocate bank structure");
- return ERROR_FAIL;
- }
-
- bank->driver_priv = stm32lx_info;
-
- stm32lx_info->probed = 0;
- stm32lx_info->user_bank_size = bank->size;
-
- /* the stm32l erased value is 0x00 */
- bank->default_padded_value = 0x00;
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(stm32lx_handle_mass_erase_command)
-{
- int i;
-
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = stm32lx_mass_erase(bank);
- if (retval == ERROR_OK) {
- /* set all sectors as erased */
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(CMD_CTX, "stm32lx mass erase complete");
- } else {
- command_print(CMD_CTX, "stm32lx mass erase failed");
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(stm32lx_handle_lock_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = stm32lx_lock(bank);
-
- if (retval == ERROR_OK)
- command_print(CMD_CTX, "STM32Lx locked, takes effect after power cycle.");
- else
- command_print(CMD_CTX, "STM32Lx lock failed");
-
- return retval;
-}
-
-COMMAND_HANDLER(stm32lx_handle_unlock_command)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (ERROR_OK != retval)
- return retval;
-
- retval = stm32lx_unlock(bank);
-
- if (retval == ERROR_OK)
- command_print(CMD_CTX, "STM32Lx unlocked, takes effect after power cycle.");
- else
- command_print(CMD_CTX, "STM32Lx unlock failed");
-
- return retval;
-}
-
-static int stm32lx_protect_check(struct flash_bank *bank)
-{
- int retval;
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
-
- uint32_t wrpr;
-
- /*
- * Read the WRPR word, and check each bit (corresponding to each
- * flash sector
- */
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_WRPR,
- &wrpr);
- if (retval != ERROR_OK)
- return retval;
-
- for (int i = 0; i < bank->num_sectors; i++) {
- if (wrpr & (1 << i))
- bank->sectors[i].is_protected = 1;
- else
- bank->sectors[i].is_protected = 0;
- }
- return ERROR_OK;
-}
-
-static int stm32lx_erase(struct flash_bank *bank, int first, int last)
-{
- int retval;
-
- /*
- * It could be possible to do a mass erase if all sectors must be
- * erased, but it is not implemented yet.
- */
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /*
- * Loop over the selected sectors and erase them
- */
- for (int i = first; i <= last; i++) {
- retval = stm32lx_erase_sector(bank, i);
- if (retval != ERROR_OK)
- return retval;
- bank->sectors[i].is_erased = 1;
- }
- return ERROR_OK;
-}
-
-static int stm32lx_protect(struct flash_bank *bank, int set, int first,
- int last)
-{
- LOG_WARNING("protection of the STM32L flash is not implemented");
- return ERROR_OK;
-}
-
-static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
-
- uint32_t hp_nb = stm32lx_info->part_info->page_size / 2;
- uint32_t buffer_size = 16384;
- struct working_area *write_algorithm;
- struct working_area *source;
- uint32_t address = bank->base + offset;
-
- struct reg_param reg_params[3];
- struct armv7m_algorithm armv7m_info;
-
- int retval = ERROR_OK;
-
- /* see contib/loaders/flash/stm32lx.S for src */
-
- static const uint8_t stm32lx_flash_write_code[] = {
- /* write_word: */
- 0x00, 0x23, /* movs r3, #0 */
- 0x04, 0xe0, /* b test_done */
-
- /* write_word: */
- 0x51, 0xf8, 0x04, 0xcb, /* ldr ip, [r1], #4 */
- 0x40, 0xf8, 0x04, 0xcb, /* str ip, [r0], #4 */
- 0x01, 0x33, /* adds r3, #1 */
-
- /* test_done: */
- 0x93, 0x42, /* cmp r3, r2 */
- 0xf8, 0xd3, /* bcc write_word */
- 0x00, 0xbe, /* bkpt 0 */
- };
-
- /* Make sure we're performing a half-page aligned write. */
- if (count % hp_nb) {
- LOG_ERROR("The byte count must be %" PRIu32 "B-aligned but count is %" PRIi32 "B)", hp_nb, count);
- return ERROR_FAIL;
- }
-
- /* flash write code */
- if (target_alloc_working_area(target, sizeof(stm32lx_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_DEBUG("no working area for block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- /* Write the flashing code */
- retval = target_write_buffer(target,
- write_algorithm->address,
- sizeof(stm32lx_flash_write_code),
- stm32lx_flash_write_code);
- if (retval != ERROR_OK) {
- target_free_working_area(target, write_algorithm);
- return retval;
- }
-
- /* Allocate half pages memory */
- while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
- if (buffer_size > 1024)
- buffer_size -= 1024;
- else
- buffer_size /= 2;
-
- if (buffer_size <= stm32lx_info->part_info->page_size) {
- /* we already allocated the writing code, but failed to get a
- * buffer, free the algorithm */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("no large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
-
- /* Enable half-page write */
- retval = stm32lx_enable_write_half_page(bank);
- if (retval != ERROR_OK) {
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
- return retval;
- }
-
- struct armv7m_common *armv7m = target_to_armv7m(target);
- if (armv7m == NULL) {
-
- /* something is very wrong if armv7m is NULL */
- LOG_ERROR("unable to get armv7m target");
- return retval;
- }
-
- /* save any DEMCR flags and configure target to catch any Hard Faults */
- uint32_t demcr_save = armv7m->demcr;
- armv7m->demcr = VC_HARDERR;
-
- /* Loop while there are bytes to write */
- while (count > 0) {
- uint32_t this_count;
- this_count = (count > buffer_size) ? buffer_size : count;
-
- /* Write the next half pages */
- retval = target_write_buffer(target, source->address, this_count, buffer);
- if (retval != ERROR_OK)
- break;
-
- /* 4: Store useful information in the registers */
- /* the destination address of the copy (R0) */
- buf_set_u32(reg_params[0].value, 0, 32, address);
- /* The source address of the copy (R1) */
- buf_set_u32(reg_params[1].value, 0, 32, source->address);
- /* The length of the copy (R2) */
- buf_set_u32(reg_params[2].value, 0, 32, this_count / 4);
-
- /* 5: Execute the bunch of code */
- retval = target_run_algorithm(target, 0, NULL, sizeof(reg_params)
- / sizeof(*reg_params), reg_params,
- write_algorithm->address, 0, 10000, &armv7m_info);
- if (retval != ERROR_OK)
- break;
-
- /* check for Hard Fault */
- if (armv7m->exception_number == 3)
- break;
-
- /* 6: Wait while busy */
- retval = stm32lx_wait_until_bsy_clear(bank);
- if (retval != ERROR_OK)
- break;
-
- buffer += this_count;
- address += this_count;
- count -= this_count;
- }
-
- /* restore previous flags */
- armv7m->demcr = demcr_save;
-
- if (armv7m->exception_number == 3) {
-
- /* the stm32l15x devices seem to have an issue when blank.
- * if a ram loader is executed on a blank device it will
- * Hard Fault, this issue does not happen for a already programmed device.
- * A related issue is described in the stm32l151xx errata (Doc ID 17721 Rev 6 - 2.1.3).
- * The workaround of handling the Hard Fault exception does work, but makes the
- * loader more complicated, as a compromise we manually write the pages, programming time
- * is reduced by 50% using this slower method.
- */
-
- LOG_WARNING("couldn't use loader, falling back to page memory writes");
-
- while (count > 0) {
- uint32_t this_count;
- this_count = (count > hp_nb) ? hp_nb : count;
-
- /* Write the next half pages */
- retval = target_write_buffer(target, address, this_count, buffer);
- if (retval != ERROR_OK)
- break;
-
- /* Wait while busy */
- retval = stm32lx_wait_until_bsy_clear(bank);
- if (retval != ERROR_OK)
- break;
-
- buffer += this_count;
- address += this_count;
- count -= this_count;
- }
- }
-
- if (retval == ERROR_OK)
- retval = stm32lx_lock_program_memory(bank);
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
- return retval;
-}
-
-static int stm32lx_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
-
- uint32_t hp_nb = stm32lx_info->part_info->page_size / 2;
- uint32_t halfpages_number;
- uint32_t bytes_remaining = 0;
- uint32_t address = bank->base + offset;
- uint32_t bytes_written = 0;
- int retval, retval2;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset & 0x3) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- retval = stm32lx_unlock_program_memory(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* first we need to write any unaligned head bytes upto
- * the next 128 byte page */
-
- if (offset % hp_nb)
- bytes_remaining = MIN(count, hp_nb - (offset % hp_nb));
-
- while (bytes_remaining > 0) {
- uint8_t value[4] = {0xff, 0xff, 0xff, 0xff};
-
- /* copy remaining bytes into the write buffer */
- uint32_t bytes_to_write = MIN(4, bytes_remaining);
- memcpy(value, buffer + bytes_written, bytes_to_write);
-
- retval = target_write_buffer(target, address, 4, value);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- bytes_written += bytes_to_write;
- bytes_remaining -= bytes_to_write;
- address += 4;
-
- retval = stm32lx_wait_until_bsy_clear(bank);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- }
-
- offset += bytes_written;
- count -= bytes_written;
-
- /* this should always pass this check here */
- assert((offset % hp_nb) == 0);
-
- /* calculate half pages */
- halfpages_number = count / hp_nb;
-
- if (halfpages_number) {
- retval = stm32lx_write_half_pages(bank, buffer + bytes_written, offset, hp_nb * halfpages_number);
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* attempt slow memory writes */
- LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
- halfpages_number = 0;
- } else {
- if (retval != ERROR_OK)
- return ERROR_FAIL;
- }
- }
-
- /* write any remaining bytes */
- uint32_t page_bytes_written = hp_nb * halfpages_number;
- bytes_written += page_bytes_written;
- address += page_bytes_written;
- bytes_remaining = count - page_bytes_written;
-
- retval = stm32lx_unlock_program_memory(bank);
- if (retval != ERROR_OK)
- return retval;
-
- while (bytes_remaining > 0) {
- uint8_t value[4] = {0xff, 0xff, 0xff, 0xff};
-
- /* copy remaining bytes into the write buffer */
- uint32_t bytes_to_write = MIN(4, bytes_remaining);
- memcpy(value, buffer + bytes_written, bytes_to_write);
-
- retval = target_write_buffer(target, address, 4, value);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
-
- bytes_written += bytes_to_write;
- bytes_remaining -= bytes_to_write;
- address += 4;
-
- retval = stm32lx_wait_until_bsy_clear(bank);
- if (retval != ERROR_OK)
- goto reset_pg_and_lock;
- }
-
-reset_pg_and_lock:
- retval2 = stm32lx_lock_program_memory(bank);
- if (retval == ERROR_OK)
- retval = retval2;
-
- return retval;
-}
-
-static int stm32lx_read_id_code(struct target *target, uint32_t *id)
-{
- /* read stm32 device id register */
- int retval = target_read_u32(target, DBGMCU_IDCODE, id);
- if (retval != ERROR_OK)
- return retval;
-
- /* STM32L0 parts will have 0 there, try reading the L0's location for
- * DBG_IDCODE in case this is an L0 part. */
- if (*id == 0)
- retval = target_read_u32(target, DBGMCU_IDCODE_L0, id);
-
- return retval;
-}
-
-static int stm32lx_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- int i;
- uint16_t flash_size_in_kb;
- uint32_t device_id;
- uint32_t base_address = FLASH_BANK0_ADDRESS;
- uint32_t second_bank_base;
-
- stm32lx_info->probed = 0;
- stm32lx_info->part_info = NULL;
-
- int retval = stm32lx_read_id_code(bank->target, &device_id);
- if (retval != ERROR_OK)
- return retval;
-
- stm32lx_info->idcode = device_id;
-
- LOG_DEBUG("device id = 0x%08" PRIx32 "", device_id);
-
- for (unsigned int n = 0; n < ARRAY_SIZE(stm32lx_parts); n++) {
- if ((device_id & 0xfff) == stm32lx_parts[n].id)
- stm32lx_info->part_info = &stm32lx_parts[n];
- }
-
- if (!stm32lx_info->part_info) {
- LOG_WARNING("Cannot identify target as a STM32L family.");
- return ERROR_FAIL;
- } else {
- LOG_INFO("Device: %s", stm32lx_info->part_info->device_str);
- }
-
- stm32lx_info->flash_base = stm32lx_info->part_info->flash_base;
-
- /* Get the flash size from target. */
- retval = target_read_u16(target, stm32lx_info->part_info->fsize_base,
- &flash_size_in_kb);
-
- /* 0x436 devices report their flash size as a 0 or 1 code indicating 384K
- * or 256K, respectively. Please see RM0038 r8 or newer and refer to
- * section 30.1.1. */
- if (retval == ERROR_OK && (device_id & 0xfff) == 0x436) {
- if (flash_size_in_kb == 0)
- flash_size_in_kb = 384;
- else if (flash_size_in_kb == 1)
- flash_size_in_kb = 256;
- }
-
- /* Failed reading flash size or flash size invalid (early silicon),
- * default to max target family */
- if (retval != ERROR_OK || flash_size_in_kb == 0xffff || flash_size_in_kb == 0) {
- LOG_WARNING("STM32L flash size failed, probe inaccurate - assuming %dk flash",
- stm32lx_info->part_info->max_flash_size_kb);
- flash_size_in_kb = stm32lx_info->part_info->max_flash_size_kb;
- } else if (flash_size_in_kb > stm32lx_info->part_info->max_flash_size_kb) {
- LOG_WARNING("STM32L probed flash size assumed incorrect since FLASH_SIZE=%dk > %dk, - assuming %dk flash",
- flash_size_in_kb, stm32lx_info->part_info->max_flash_size_kb,
- stm32lx_info->part_info->max_flash_size_kb);
- flash_size_in_kb = stm32lx_info->part_info->max_flash_size_kb;
- }
-
- if (stm32lx_info->part_info->has_dual_banks) {
- /* Use the configured base address to determine if this is the first or second flash bank.
- * Verify that the base address is reasonably correct and determine the flash bank size
- */
- second_bank_base = base_address +
- stm32lx_info->part_info->first_bank_size_kb * 1024;
- if (bank->base == second_bank_base || !bank->base) {
- /* This is the second bank */
- base_address = second_bank_base;
- flash_size_in_kb = flash_size_in_kb -
- stm32lx_info->part_info->first_bank_size_kb;
- } else if (bank->base == base_address) {
- /* This is the first bank */
- flash_size_in_kb = stm32lx_info->part_info->first_bank_size_kb;
- } else {
- LOG_WARNING("STM32L flash bank base address config is incorrect."
- " 0x%" PRIx32 " but should rather be 0x%" PRIx32 " or 0x%" PRIx32,
- bank->base, base_address, second_bank_base);
- return ERROR_FAIL;
- }
- LOG_INFO("STM32L flash has dual banks. Bank (%d) size is %dkb, base address is 0x%" PRIx32,
- bank->bank_number, flash_size_in_kb, base_address);
- } else {
- LOG_INFO("STM32L flash size is %dkb, base address is 0x%" PRIx32, flash_size_in_kb, base_address);
- }
-
- /* if the user sets the size manually then ignore the probed value
- * this allows us to work around devices that have a invalid flash size register value */
- if (stm32lx_info->user_bank_size) {
- flash_size_in_kb = stm32lx_info->user_bank_size / 1024;
- LOG_INFO("ignoring flash probed value, using configured bank size: %dkbytes", flash_size_in_kb);
- }
-
- /* calculate numbers of sectors (4kB per sector) */
- int num_sectors = (flash_size_in_kb * 1024) / FLASH_SECTOR_SIZE;
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- bank->size = flash_size_in_kb * 1024;
- bank->base = base_address;
- bank->num_sectors = num_sectors;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_sectors);
- if (bank->sectors == NULL) {
- LOG_ERROR("failed to allocate bank sectors");
- return ERROR_FAIL;
- }
-
- for (i = 0; i < num_sectors; i++) {
- bank->sectors[i].offset = i * FLASH_SECTOR_SIZE;
- bank->sectors[i].size = FLASH_SECTOR_SIZE;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
-
- stm32lx_info->probed = 1;
-
- return ERROR_OK;
-}
-
-static int stm32lx_auto_probe(struct flash_bank *bank)
-{
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
-
- if (stm32lx_info->probed)
- return ERROR_OK;
-
- return stm32lx_probe(bank);
-}
-
-static int stm32lx_erase_check(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- const int buffer_size = 4096;
- int i;
- uint32_t nBytes;
- int retval = ERROR_OK;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint8_t *buffer = malloc(buffer_size);
- if (buffer == NULL) {
- LOG_ERROR("failed to allocate read buffer");
- return ERROR_FAIL;
- }
-
- for (i = 0; i < bank->num_sectors; i++) {
- uint32_t j;
- bank->sectors[i].is_erased = 1;
-
- /* Loop chunk by chunk over the sector */
- for (j = 0; j < bank->sectors[i].size; j += buffer_size) {
- uint32_t chunk;
- chunk = buffer_size;
- if (chunk > (j - bank->sectors[i].size))
- chunk = (j - bank->sectors[i].size);
-
- retval = target_read_memory(target, bank->base
- + bank->sectors[i].offset + j, 4, chunk / 4, buffer);
- if (retval != ERROR_OK)
- break;
-
- for (nBytes = 0; nBytes < chunk; nBytes++) {
- if (buffer[nBytes] != 0x00) {
- bank->sectors[i].is_erased = 0;
- break;
- }
- }
- }
- if (retval != ERROR_OK)
- break;
- }
- free(buffer);
-
- return retval;
-}
-
-/* This method must return a string displaying information about the bank */
-static int stm32lx_get_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
-
- if (!stm32lx_info->probed) {
- int retval = stm32lx_probe(bank);
- if (retval != ERROR_OK) {
- snprintf(buf, buf_size,
- "Unable to find bank information.");
- return retval;
- }
- }
-
- const struct stm32lx_part_info *info = stm32lx_info->part_info;
-
- if (info) {
- const char *rev_str = NULL;
- uint16_t rev_id = stm32lx_info->idcode >> 16;
-
- for (unsigned int i = 0; i < info->num_revs; i++)
- if (rev_id == info->revs[i].rev)
- rev_str = info->revs[i].str;
-
- if (rev_str != NULL) {
- snprintf(buf, buf_size,
- "%s - Rev: %s",
- stm32lx_info->part_info->device_str, rev_str);
- } else {
- snprintf(buf, buf_size,
- "%s - Rev: unknown (0x%04x)",
- stm32lx_info->part_info->device_str, rev_id);
- }
-
- return ERROR_OK;
- } else {
- snprintf(buf, buf_size, "Cannot identify target as a STM32Lx");
-
- return ERROR_FAIL;
- }
-}
-
-static const struct command_registration stm32lx_exec_command_handlers[] = {
- {
- .name = "mass_erase",
- .handler = stm32lx_handle_mass_erase_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Erase entire flash device. including available EEPROM",
- },
- {
- .name = "lock",
- .handler = stm32lx_handle_lock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Increase the readout protection to Level 1.",
- },
- {
- .name = "unlock",
- .handler = stm32lx_handle_unlock_command,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = "Lower the readout protection from Level 1 to 0.",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration stm32lx_command_handlers[] = {
- {
- .name = "stm32lx",
- .mode = COMMAND_ANY,
- .help = "stm32lx flash command group",
- .usage = "",
- .chain = stm32lx_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-struct flash_driver stm32lx_flash = {
- .name = "stm32lx",
- .commands = stm32lx_command_handlers,
- .flash_bank_command = stm32lx_flash_bank_command,
- .erase = stm32lx_erase,
- .protect = stm32lx_protect,
- .write = stm32lx_write,
- .read = default_flash_read,
- .probe = stm32lx_probe,
- .auto_probe = stm32lx_auto_probe,
- .erase_check = stm32lx_erase_check,
- .protect_check = stm32lx_protect_check,
- .info = stm32lx_get_info,
-};
-
-/* Static methods implementation */
-static int stm32lx_unlock_program_memory(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- int retval;
- uint32_t reg32;
-
- /*
- * Unlocking the program memory is done by unlocking the PECR,
- * then by writing the 2 PRGKEY to the PRGKEYR register
- */
-
- /* check flash is not already unlocked */
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- ®32);
- if (retval != ERROR_OK)
- return retval;
-
- if ((reg32 & FLASH_PECR__PRGLOCK) == 0)
- return ERROR_OK;
-
- /* To unlock the PECR write the 2 PEKEY to the PEKEYR register */
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PEKEYR,
- PEKEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PEKEYR,
- PEKEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* Make sure it worked */
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- ®32);
- if (retval != ERROR_OK)
- return retval;
-
- if (reg32 & FLASH_PECR__PELOCK) {
- LOG_ERROR("PELOCK is not cleared :(");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PRGKEYR,
- PRGKEY1);
- if (retval != ERROR_OK)
- return retval;
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PRGKEYR,
- PRGKEY2);
- if (retval != ERROR_OK)
- return retval;
-
- /* Make sure it worked */
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- ®32);
- if (retval != ERROR_OK)
- return retval;
-
- if (reg32 & FLASH_PECR__PRGLOCK) {
- LOG_ERROR("PRGLOCK is not cleared :(");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-static int stm32lx_enable_write_half_page(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- int retval;
- uint32_t reg32;
-
- /**
- * Unlock the program memory, then set the FPRG bit in the PECR register.
- */
- retval = stm32lx_unlock_program_memory(bank);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- ®32);
- if (retval != ERROR_OK)
- return retval;
-
- reg32 |= FLASH_PECR__FPRG;
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- reg32);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- ®32);
- if (retval != ERROR_OK)
- return retval;
-
- reg32 |= FLASH_PECR__PROG;
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- reg32);
-
- return retval;
-}
-
-static int stm32lx_lock_program_memory(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- int retval;
- uint32_t reg32;
-
- /* To lock the program memory, simply set the lock bit and lock PECR */
-
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- ®32);
- if (retval != ERROR_OK)
- return retval;
-
- reg32 |= FLASH_PECR__PRGLOCK;
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- reg32);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- ®32);
- if (retval != ERROR_OK)
- return retval;
-
- reg32 |= FLASH_PECR__PELOCK;
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- reg32);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32lx_erase_sector(struct flash_bank *bank, int sector)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- int retval;
- uint32_t reg32;
-
- /*
- * To erase a sector (i.e. stm32lx_info->part_info.pages_per_sector pages),
- * first unlock the memory, loop over the pages of this sector
- * and write 0x0 to its first word.
- */
-
- retval = stm32lx_unlock_program_memory(bank);
- if (retval != ERROR_OK)
- return retval;
-
- for (int page = 0; page < (int)stm32lx_info->part_info->pages_per_sector;
- page++) {
- reg32 = FLASH_PECR__PROG | FLASH_PECR__ERASE;
- retval = target_write_u32(target,
- stm32lx_info->flash_base + FLASH_PECR, reg32);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32lx_wait_until_bsy_clear(bank);
- if (retval != ERROR_OK)
- return retval;
-
- uint32_t addr = bank->base + bank->sectors[sector].offset + (page
- * stm32lx_info->part_info->page_size);
- retval = target_write_u32(target, addr, 0x0);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32lx_wait_until_bsy_clear(bank);
- if (retval != ERROR_OK)
- return retval;
- }
-
- retval = stm32lx_lock_program_memory(bank);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static inline int stm32lx_get_flash_status(struct flash_bank *bank, uint32_t *status)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
-
- return target_read_u32(target, stm32lx_info->flash_base + FLASH_SR, status);
-}
-
-static int stm32lx_wait_until_bsy_clear(struct flash_bank *bank)
-{
- return stm32lx_wait_until_bsy_clear_timeout(bank, 100);
-}
-
-static int stm32lx_unlock_options_bytes(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- int retval;
- uint32_t reg32;
-
- /*
- * Unlocking the options bytes is done by unlocking the PECR,
- * then by writing the 2 FLASH_PEKEYR to the FLASH_OPTKEYR register
- */
-
- /* check flash is not already unlocked */
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, ®32);
- if (retval != ERROR_OK)
- return retval;
-
- if ((reg32 & FLASH_PECR__OPTLOCK) == 0)
- return ERROR_OK;
-
- if ((reg32 & FLASH_PECR__PELOCK) != 0) {
-
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PEKEYR, PEKEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PEKEYR, PEKEY2);
- if (retval != ERROR_OK)
- return retval;
- }
-
- /* To unlock the PECR write the 2 OPTKEY to the FLASH_OPTKEYR register */
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_OPTKEYR, OPTKEY1);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_OPTKEYR, OPTKEY2);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32lx_wait_until_bsy_clear_timeout(struct flash_bank *bank, int timeout)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- uint32_t status;
- int retval = ERROR_OK;
-
- /* wait for busy to clear */
- for (;;) {
- retval = stm32lx_get_flash_status(bank, &status);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_DEBUG("status: 0x%" PRIx32 "", status);
- if ((status & FLASH_SR__BSY) == 0)
- break;
-
- if (timeout-- <= 0) {
- LOG_ERROR("timed out waiting for flash");
- return ERROR_FAIL;
- }
- alive_sleep(1);
- }
-
- if (status & FLASH_SR__WRPERR) {
- LOG_ERROR("access denied / write protected");
- retval = ERROR_FAIL;
- }
-
- if (status & FLASH_SR__PGAERR) {
- LOG_ERROR("invalid program address");
- retval = ERROR_FAIL;
- }
-
- /* Clear but report errors */
- if (status & FLASH_SR__OPTVERR) {
- /* If this operation fails, we ignore it and report the original retval */
- target_write_u32(target, stm32lx_info->flash_base + FLASH_SR, status & FLASH_SR__OPTVERR);
- }
-
- return retval;
-}
-
-static int stm32lx_obl_launch(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = bank->driver_priv;
- int retval;
-
- /* This will fail as the target gets immediately rebooted */
- target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR,
- FLASH_PECR__OBL_LAUNCH);
-
- size_t tries = 10;
- do {
- target_halt(target);
- retval = target_poll(target);
- } while (--tries > 0 &&
- (retval != ERROR_OK || target->state != TARGET_HALTED));
-
- return tries ? ERROR_OK : ERROR_FAIL;
-}
-
-static int stm32lx_lock(struct flash_bank *bank)
-{
- int retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = stm32lx_unlock_options_bytes(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* set the RDP protection level to 1 */
- retval = target_write_u32(target, OPTION_BYTES_ADDRESS, OPTION_BYTE_0_PR1);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32lx_unlock(struct flash_bank *bank)
-{
- int retval;
- struct target *target = bank->target;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = stm32lx_unlock_options_bytes(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* set the RDP protection level to 0 */
- retval = target_write_u32(target, OPTION_BYTES_ADDRESS, OPTION_BYTE_0_PR0);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32lx_wait_until_bsy_clear_timeout(bank, 30000);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stm32lx_mass_erase(struct flash_bank *bank)
-{
- int retval;
- struct target *target = bank->target;
- struct stm32lx_flash_bank *stm32lx_info = NULL;
- uint32_t reg32;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- stm32lx_info = bank->driver_priv;
-
- retval = stm32lx_lock(bank);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32lx_obl_launch(bank);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32lx_unlock(bank);
- if (retval != ERROR_OK)
- return retval;
-
- retval = stm32lx_obl_launch(bank);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_read_u32(target, stm32lx_info->flash_base + FLASH_PECR, ®32);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_u32(target, stm32lx_info->flash_base + FLASH_PECR, reg32 | FLASH_PECR__OPTLOCK);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stmsmi.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stmsmi.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stmsmi.c
deleted file mode 100755
index 6f73c36..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/stmsmi.c
+++ /dev/null
@@ -1,659 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Antonio Borneo <bo...@gmail.com> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/* STM Serial Memory Interface (SMI) controller is a SPI bus controller
- * specifically designed for SPI memories.
- * Only SPI "mode 3" (CPOL=1 and CPHA=1) is supported.
- * Two working modes are available:
- * - SW mode: the SPI is controlled by SW. Any custom commands can be sent
- * on the bus.
- * - HW mode: the SPI but is under SMI control. Memory content is directly
- * accessible in CPU memory space. CPU can read, write and execute memory
- * content. */
-
-/* ATTENTION:
- * To have flash memory mapped in CPU memory space, the SMI controller
- * have to be in "HW mode". This requires following constraints:
- * 1) The command "reset init" have to initialize SMI controller and put
- * it in HW mode;
- * 2) every command in this file have to return to prompt in HW mode. */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include "spi.h"
-#include <jtag/jtag.h>
-#include <helper/time_support.h>
-
-#define SMI_READ_REG(a) (_SMI_READ_REG(a))
-#define _SMI_READ_REG(a) \
-{ \
- int __a; \
- uint32_t __v; \
- \
- __a = target_read_u32(target, io_base + (a), &__v); \
- if (__a != ERROR_OK) \
- return __a; \
- __v; \
-}
-
-#define SMI_WRITE_REG(a, v) \
-{ \
- int __r; \
- \
- __r = target_write_u32(target, io_base + (a), (v)); \
- if (__r != ERROR_OK) \
- return __r; \
-}
-
-#define SMI_POLL_TFF(timeout) \
-{ \
- int __r; \
- \
- __r = poll_tff(target, io_base, timeout); \
- if (__r != ERROR_OK) \
- return __r; \
-}
-
-#define SMI_SET_SW_MODE() SMI_WRITE_REG(SMI_CR1, \
- SMI_READ_REG(SMI_CR1) | SMI_SW_MODE)
-#define SMI_SET_HWWB_MODE() SMI_WRITE_REG(SMI_CR1, \
- (SMI_READ_REG(SMI_CR1) | SMI_WB_MODE) & ~SMI_SW_MODE)
-#define SMI_SET_HW_MODE() SMI_WRITE_REG(SMI_CR1, \
- SMI_READ_REG(SMI_CR1) & ~(SMI_SW_MODE | SMI_WB_MODE))
-#define SMI_CLEAR_TFF() SMI_WRITE_REG(SMI_SR, ~SMI_TFF)
-
-#define SMI_BANK_SIZE (0x01000000)
-
-#define SMI_CR1 (0x00) /* Control register 1 */
-#define SMI_CR2 (0x04) /* Control register 2 */
-#define SMI_SR (0x08) /* Status register */
-#define SMI_TR (0x0c) /* TX */
-#define SMI_RR (0x10) /* RX */
-
-/* fields in SMI_CR1 */
-#define SMI_SW_MODE 0x10000000 /* set to enable SW Mode */
-#define SMI_WB_MODE 0x20000000 /* Write Burst Mode */
-
-/* fields in SMI_CR2 */
-#define SMI_TX_LEN_1 0x00000001 /* data length = 1 byte */
-#define SMI_TX_LEN_4 0x00000004 /* data length = 4 byte */
-#define SMI_RX_LEN_3 0x00000030 /* data length = 3 byte */
-#define SMI_SEND 0x00000080 /* Send data */
-#define SMI_RSR 0x00000400 /* reads status reg */
-#define SMI_WE 0x00000800 /* Write Enable */
-#define SMI_SEL_BANK0 0x00000000 /* Select Bank0 */
-#define SMI_SEL_BANK1 0x00001000 /* Select Bank1 */
-#define SMI_SEL_BANK2 0x00002000 /* Select Bank2 */
-#define SMI_SEL_BANK3 0x00003000 /* Select Bank3 */
-
-/* fields in SMI_SR */
-#define SMI_TFF 0x00000100 /* Transfer Finished Flag */
-
-/* Commands */
-#define SMI_READ_ID 0x0000009F /* Read Flash Identification */
-
-/* Timeout in ms */
-#define SMI_CMD_TIMEOUT (100)
-#define SMI_PROBE_TIMEOUT (100)
-#define SMI_MAX_TIMEOUT (3000)
-
-struct stmsmi_flash_bank {
- int probed;
- uint32_t io_base;
- uint32_t bank_num;
- const struct flash_device *dev;
-};
-
-struct stmsmi_target {
- char *name;
- uint32_t tap_idcode;
- uint32_t smi_base;
- uint32_t io_base;
-};
-
-static const struct stmsmi_target target_devices[] = {
- /* name, tap_idcode, smi_base, io_base */
- { "SPEAr3xx/6xx", 0x07926041, 0xf8000000, 0xfc000000 },
- { "STR75x", 0x4f1f0041, 0x80000000, 0x90000000 },
- { NULL, 0, 0, 0 }
-};
-
-FLASH_BANK_COMMAND_HANDLER(stmsmi_flash_bank_command)
-{
- struct stmsmi_flash_bank *stmsmi_info;
-
- LOG_DEBUG("%s", __func__);
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- stmsmi_info = malloc(sizeof(struct stmsmi_flash_bank));
- if (stmsmi_info == NULL) {
- LOG_ERROR("not enough memory");
- return ERROR_FAIL;
- }
-
- bank->driver_priv = stmsmi_info;
- stmsmi_info->probed = 0;
-
- return ERROR_OK;
-}
-
-/* Poll transmit finished flag */
-/* timeout in ms */
-static int poll_tff(struct target *target, uint32_t io_base, int timeout)
-{
- long long endtime;
-
- if (SMI_READ_REG(SMI_SR) & SMI_TFF)
- return ERROR_OK;
-
- endtime = timeval_ms() + timeout;
- do {
- alive_sleep(1);
- if (SMI_READ_REG(SMI_SR) & SMI_TFF)
- return ERROR_OK;
- } while (timeval_ms() < endtime);
-
- LOG_ERROR("Timeout while polling TFF");
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-/* Read the status register of the external SPI flash chip.
- * The operation is triggered by setting SMI_RSR bit.
- * SMI sends the proper SPI command (0x05) and returns value in SMI_SR */
-static int read_status_reg(struct flash_bank *bank, uint32_t *status)
-{
- struct target *target = bank->target;
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- uint32_t io_base = stmsmi_info->io_base;
-
- /* clear transmit finished flag */
- SMI_CLEAR_TFF();
-
- /* Read status */
- SMI_WRITE_REG(SMI_CR2, stmsmi_info->bank_num | SMI_RSR);
-
- /* Poll transmit finished flag */
- SMI_POLL_TFF(SMI_CMD_TIMEOUT);
-
- /* clear transmit finished flag */
- SMI_CLEAR_TFF();
-
- *status = SMI_READ_REG(SMI_SR) & 0x0000ffff;
-
- /* clean-up SMI_CR2 */
- SMI_WRITE_REG(SMI_CR2, 0); /* AB: Required ? */
-
- return ERROR_OK;
-}
-
-/* check for WIP (write in progress) bit in status register */
-/* timeout in ms */
-static int wait_till_ready(struct flash_bank *bank, int timeout)
-{
- uint32_t status;
- int retval;
- long long endtime;
-
- endtime = timeval_ms() + timeout;
- do {
- /* read flash status register */
- retval = read_status_reg(bank, &status);
- if (retval != ERROR_OK)
- return retval;
-
- if ((status & SPIFLASH_BSY_BIT) == 0)
- return ERROR_OK;
- alive_sleep(1);
- } while (timeval_ms() < endtime);
-
- LOG_ERROR("timeout");
- return ERROR_FAIL;
-}
-
-/* Send "write enable" command to SPI flash chip.
- * The operation is triggered by setting SMI_WE bit, and SMI sends
- * the proper SPI command (0x06) */
-static int smi_write_enable(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- uint32_t io_base = stmsmi_info->io_base;
- uint32_t status;
- int retval;
-
- /* Enter in HW mode */
- SMI_SET_HW_MODE(); /* AB: is this correct ?*/
-
- /* clear transmit finished flag */
- SMI_CLEAR_TFF();
-
- /* Send write enable command */
- SMI_WRITE_REG(SMI_CR2, stmsmi_info->bank_num | SMI_WE);
-
- /* Poll transmit finished flag */
- SMI_POLL_TFF(SMI_CMD_TIMEOUT);
-
- /* read flash status register */
- retval = read_status_reg(bank, &status);
- if (retval != ERROR_OK)
- return retval;
-
- /* Check write enabled */
- if ((status & SPIFLASH_WE_BIT) == 0) {
- LOG_ERROR("Cannot enable write to flash. Status=0x%08" PRIx32, status);
- return ERROR_FAIL;
- }
-
- return ERROR_OK;
-}
-
-static uint32_t erase_command(struct stmsmi_flash_bank *stmsmi_info,
- uint32_t offset)
-{
- union {
- uint32_t command;
- uint8_t x[4];
- } cmd;
-
- cmd.x[0] = stmsmi_info->dev->erase_cmd;
- cmd.x[1] = offset >> 16;
- cmd.x[2] = offset >> 8;
- cmd.x[3] = offset;
-
- return cmd.command;
-}
-
-static int smi_erase_sector(struct flash_bank *bank, int sector)
-{
- struct target *target = bank->target;
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- uint32_t io_base = stmsmi_info->io_base;
- uint32_t cmd;
- int retval;
-
- retval = smi_write_enable(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* Switch to SW mode to send sector erase command */
- SMI_SET_SW_MODE();
-
- /* clear transmit finished flag */
- SMI_CLEAR_TFF();
-
- /* send SPI command "block erase" */
- cmd = erase_command(stmsmi_info, bank->sectors[sector].offset);
- SMI_WRITE_REG(SMI_TR, cmd);
- SMI_WRITE_REG(SMI_CR2, stmsmi_info->bank_num | SMI_SEND | SMI_TX_LEN_4);
-
- /* Poll transmit finished flag */
- SMI_POLL_TFF(SMI_CMD_TIMEOUT);
-
- /* poll WIP for end of self timed Sector Erase cycle */
- retval = wait_till_ready(bank, SMI_MAX_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stmsmi_erase(struct flash_bank *bank, int first, int last)
-{
- struct target *target = bank->target;
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- uint32_t io_base = stmsmi_info->io_base;
- int retval = ERROR_OK;
- int sector;
-
- LOG_DEBUG("%s: from sector %d to sector %d", __func__, first, last);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if ((first < 0) || (last < first) || (last >= bank->num_sectors)) {
- LOG_ERROR("Flash sector invalid");
- return ERROR_FLASH_SECTOR_INVALID;
- }
-
- if (!(stmsmi_info->probed)) {
- LOG_ERROR("Flash bank not probed");
- return ERROR_FLASH_BANK_NOT_PROBED;
- }
-
- for (sector = first; sector <= last; sector++) {
- if (bank->sectors[sector].is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
- return ERROR_FAIL;
- }
- }
-
- for (sector = first; sector <= last; sector++) {
- retval = smi_erase_sector(bank, sector);
- if (retval != ERROR_OK)
- break;
- keep_alive();
- }
-
- /* Switch to HW mode before return to prompt */
- SMI_SET_HW_MODE();
- return retval;
-}
-
-static int stmsmi_protect(struct flash_bank *bank, int set,
- int first, int last)
-{
- int sector;
-
- for (sector = first; sector <= last; sector++)
- bank->sectors[sector].is_protected = set;
- return ERROR_OK;
-}
-
-static int smi_write_buffer(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t address, uint32_t len)
-{
- struct target *target = bank->target;
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- uint32_t io_base = stmsmi_info->io_base;
- int retval;
-
- LOG_DEBUG("%s: address=0x%08" PRIx32 " len=0x%08" PRIx32,
- __func__, address, len);
-
- retval = smi_write_enable(bank);
- if (retval != ERROR_OK)
- return retval;
-
- /* HW mode, write burst mode */
- SMI_SET_HWWB_MODE();
-
- retval = target_write_buffer(target, address, len, buffer);
- if (retval != ERROR_OK)
- return retval;
-
- return ERROR_OK;
-}
-
-static int stmsmi_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- struct target *target = bank->target;
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- uint32_t io_base = stmsmi_info->io_base;
- uint32_t cur_count, page_size, page_offset;
- int sector;
- int retval = ERROR_OK;
-
- LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32,
- __func__, offset, count);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (offset + count > stmsmi_info->dev->size_in_bytes) {
- LOG_WARNING("Write pasts end of flash. Extra data discarded.");
- count = stmsmi_info->dev->size_in_bytes - offset;
- }
-
- /* Check sector protection */
- for (sector = 0; sector < bank->num_sectors; sector++) {
- /* Start offset in or before this sector? */
- /* End offset in or behind this sector? */
- if ((offset <
- (bank->sectors[sector].offset + bank->sectors[sector].size))
- && ((offset + count - 1) >= bank->sectors[sector].offset)
- && bank->sectors[sector].is_protected) {
- LOG_ERROR("Flash sector %d protected", sector);
- return ERROR_FAIL;
- }
- }
-
- page_size = stmsmi_info->dev->pagesize;
-
- /* unaligned buffer head */
- if (count > 0 && (offset & 3) != 0) {
- cur_count = 4 - (offset & 3);
- if (cur_count > count)
- cur_count = count;
- retval = smi_write_buffer(bank, buffer, bank->base + offset,
- cur_count);
- if (retval != ERROR_OK)
- goto err;
- offset += cur_count;
- buffer += cur_count;
- count -= cur_count;
- }
-
- page_offset = offset % page_size;
- /* central part, aligned words */
- while (count >= 4) {
- /* clip block at page boundary */
- if (page_offset + count > page_size)
- cur_count = page_size - page_offset;
- else
- cur_count = count & ~3;
-
- retval = smi_write_buffer(bank, buffer, bank->base + offset,
- cur_count);
- if (retval != ERROR_OK)
- goto err;
-
- page_offset = 0;
- buffer += cur_count;
- offset += cur_count;
- count -= cur_count;
-
- keep_alive();
- }
-
- /* buffer tail */
- if (count > 0)
- retval = smi_write_buffer(bank, buffer, bank->base + offset, count);
-
-err:
- /* Switch to HW mode before return to prompt */
- SMI_SET_HW_MODE();
- return retval;
-}
-
-/* Return ID of flash device */
-/* On exit, SW mode is kept */
-static int read_flash_id(struct flash_bank *bank, uint32_t *id)
-{
- struct target *target = bank->target;
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- uint32_t io_base = stmsmi_info->io_base;
- int retval;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- /* poll WIP */
- retval = wait_till_ready(bank, SMI_PROBE_TIMEOUT);
- if (retval != ERROR_OK)
- return retval;
-
- /* enter in SW mode */
- SMI_SET_SW_MODE();
-
- /* clear transmit finished flag */
- SMI_CLEAR_TFF();
-
- /* Send SPI command "read ID" */
- SMI_WRITE_REG(SMI_TR, SMI_READ_ID);
- SMI_WRITE_REG(SMI_CR2,
- stmsmi_info->bank_num | SMI_SEND | SMI_RX_LEN_3 | SMI_TX_LEN_1);
-
- /* Poll transmit finished flag */
- SMI_POLL_TFF(SMI_CMD_TIMEOUT);
-
- /* clear transmit finished flag */
- SMI_CLEAR_TFF();
-
- /* read ID from Receive Register */
- *id = SMI_READ_REG(SMI_RR) & 0x00ffffff;
- return ERROR_OK;
-}
-
-static int stmsmi_probe(struct flash_bank *bank)
-{
- struct target *target = bank->target;
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- uint32_t io_base;
- struct flash_sector *sectors;
- uint32_t id = 0; /* silence uninitialized warning */
- const struct stmsmi_target *target_device;
- int retval;
-
- if (stmsmi_info->probed)
- free(bank->sectors);
- stmsmi_info->probed = 0;
-
- for (target_device = target_devices ; target_device->name ; ++target_device)
- if (target_device->tap_idcode == target->tap->idcode)
- break;
- if (!target_device->name) {
- LOG_ERROR("Device ID 0x%" PRIx32 " is not known as SMI capable",
- target->tap->idcode);
- return ERROR_FAIL;
- }
-
- switch (bank->base - target_device->smi_base) {
- case 0:
- stmsmi_info->bank_num = SMI_SEL_BANK0;
- break;
- case SMI_BANK_SIZE:
- stmsmi_info->bank_num = SMI_SEL_BANK1;
- break;
- case 2*SMI_BANK_SIZE:
- stmsmi_info->bank_num = SMI_SEL_BANK2;
- break;
- case 3*SMI_BANK_SIZE:
- stmsmi_info->bank_num = SMI_SEL_BANK3;
- break;
- default:
- LOG_ERROR("Invalid SMI base address 0x%" PRIx32, bank->base);
- return ERROR_FAIL;
- }
- io_base = target_device->io_base;
- stmsmi_info->io_base = io_base;
-
- LOG_DEBUG("Valid SMI on device %s at address 0x%" PRIx32,
- target_device->name, bank->base);
-
- /* read and decode flash ID; returns in SW mode */
- retval = read_flash_id(bank, &id);
- SMI_SET_HW_MODE();
- if (retval != ERROR_OK)
- return retval;
-
- stmsmi_info->dev = NULL;
- for (const struct flash_device *p = flash_devices; p->name ; p++)
- if (p->device_id == id) {
- stmsmi_info->dev = p;
- break;
- }
-
- if (!stmsmi_info->dev) {
- LOG_ERROR("Unknown flash device (ID 0x%08" PRIx32 ")", id);
- return ERROR_FAIL;
- }
-
- LOG_INFO("Found flash device \'%s\' (ID 0x%08" PRIx32 ")",
- stmsmi_info->dev->name, stmsmi_info->dev->device_id);
-
- /* Set correct size value */
- bank->size = stmsmi_info->dev->size_in_bytes;
-
- /* create and fill sectors array */
- bank->num_sectors =
- stmsmi_info->dev->size_in_bytes / stmsmi_info->dev->sectorsize;
- sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
- if (sectors == NULL) {
- LOG_ERROR("not enough memory");
- return ERROR_FAIL;
- }
-
- for (int sector = 0; sector < bank->num_sectors; sector++) {
- sectors[sector].offset = sector * stmsmi_info->dev->sectorsize;
- sectors[sector].size = stmsmi_info->dev->sectorsize;
- sectors[sector].is_erased = -1;
- sectors[sector].is_protected = 1;
- }
-
- bank->sectors = sectors;
- stmsmi_info->probed = 1;
- return ERROR_OK;
-}
-
-static int stmsmi_auto_probe(struct flash_bank *bank)
-{
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
- if (stmsmi_info->probed)
- return ERROR_OK;
- return stmsmi_probe(bank);
-}
-
-static int stmsmi_protect_check(struct flash_bank *bank)
-{
- /* Nothing to do. Protection is only handled in SW. */
- return ERROR_OK;
-}
-
-static int get_stmsmi_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- struct stmsmi_flash_bank *stmsmi_info = bank->driver_priv;
-
- if (!(stmsmi_info->probed)) {
- snprintf(buf, buf_size,
- "\nSMI flash bank not probed yet\n");
- return ERROR_OK;
- }
-
- snprintf(buf, buf_size, "\nSMI flash information:\n"
- " Device \'%s\' (ID 0x%08" PRIx32 ")\n",
- stmsmi_info->dev->name, stmsmi_info->dev->device_id);
-
- return ERROR_OK;
-}
-
-struct flash_driver stmsmi_flash = {
- .name = "stmsmi",
- .flash_bank_command = stmsmi_flash_bank_command,
- .erase = stmsmi_erase,
- .protect = stmsmi_protect,
- .write = stmsmi_write,
- .read = default_flash_read,
- .probe = stmsmi_probe,
- .auto_probe = stmsmi_auto_probe,
- .erase_check = default_flash_blank_check,
- .protect_check = stmsmi_protect_check,
- .info = get_stmsmi_info,
-};
[34/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam3.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam3.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam3.c
deleted file mode 100755
index 9d119bb..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/at91sam3.c
+++ /dev/null
@@ -1,3776 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2009 by Duane Ellis *
- * openocd@duaneellis.com *
- * *
- * Copyright (C) 2010 by Olaf L�ke (at91sam3s* support) *
- * olaf@uni-paderborn.de *
- * *
- * Copyright (C) 2011 by Olivier Schonken (at91sam3x* support) * *
- * and Jim Norris *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the *
- * GNU General public License for more details. *
- * *
- * You should have received a copy of the GNU General public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
-****************************************************************************/
-
-/* Some of the the lower level code was based on code supplied by
- * ATMEL under this copyright. */
-
-/* BEGIN ATMEL COPYRIGHT */
-/* ----------------------------------------------------------------------------
- * ATMEL Microcontroller Software Support
- * ----------------------------------------------------------------------------
- * Copyright (c) 2009, Atmel Corporation
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the disclaimer below.
- *
- * Atmel's name may not be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
- * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
- * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
- * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
- * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- * ----------------------------------------------------------------------------
- */
-/* END ATMEL COPYRIGHT */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "imp.h"
-#include <helper/time_support.h>
-
-#define REG_NAME_WIDTH (12)
-
-/* at91sam3u series (has one or two flash banks) */
-#define FLASH_BANK0_BASE_U 0x00080000
-#define FLASH_BANK1_BASE_U 0x00100000
-
-/* at91sam3s series (has always one flash bank) */
-#define FLASH_BANK_BASE_S 0x00400000
-
-/* at91sam3sd series (has always two flash banks) */
-#define FLASH_BANK0_BASE_SD FLASH_BANK_BASE_S
-#define FLASH_BANK1_BASE_512K_SD (FLASH_BANK0_BASE_SD+(512*1024/2))
-
-
-/* at91sam3n series (has always one flash bank) */
-#define FLASH_BANK_BASE_N 0x00400000
-
-/* at91sam3a/x series has two flash banks*/
-#define FLASH_BANK0_BASE_AX 0x00080000
-/*Bank 1 of the at91sam3a/x series starts at 0x00080000 + half flash size*/
-#define FLASH_BANK1_BASE_256K_AX 0x000A0000
-#define FLASH_BANK1_BASE_512K_AX 0x000C0000
-
-#define AT91C_EFC_FCMD_GETD (0x0) /* (EFC) Get Flash Descriptor */
-#define AT91C_EFC_FCMD_WP (0x1) /* (EFC) Write Page */
-#define AT91C_EFC_FCMD_WPL (0x2) /* (EFC) Write Page and Lock */
-#define AT91C_EFC_FCMD_EWP (0x3) /* (EFC) Erase Page and Write Page */
-#define AT91C_EFC_FCMD_EWPL (0x4) /* (EFC) Erase Page and Write Page then Lock */
-#define AT91C_EFC_FCMD_EA (0x5) /* (EFC) Erase All */
-/* cmd6 is not present in the at91sam3u4/2/1 data sheet table 17-2 */
-/* #define AT91C_EFC_FCMD_EPL (0x6) // (EFC) Erase plane? */
-/* cmd7 is not present in the at91sam3u4/2/1 data sheet table 17-2 */
-/* #define AT91C_EFC_FCMD_EPA (0x7) // (EFC) Erase pages? */
-#define AT91C_EFC_FCMD_SLB (0x8) /* (EFC) Set Lock Bit */
-#define AT91C_EFC_FCMD_CLB (0x9) /* (EFC) Clear Lock Bit */
-#define AT91C_EFC_FCMD_GLB (0xA) /* (EFC) Get Lock Bit */
-#define AT91C_EFC_FCMD_SFB (0xB) /* (EFC) Set Fuse Bit */
-#define AT91C_EFC_FCMD_CFB (0xC) /* (EFC) Clear Fuse Bit */
-#define AT91C_EFC_FCMD_GFB (0xD) /* (EFC) Get Fuse Bit */
-#define AT91C_EFC_FCMD_STUI (0xE) /* (EFC) Start Read Unique ID */
-#define AT91C_EFC_FCMD_SPUI (0xF) /* (EFC) Stop Read Unique ID */
-
-#define offset_EFC_FMR 0
-#define offset_EFC_FCR 4
-#define offset_EFC_FSR 8
-#define offset_EFC_FRR 12
-
-extern struct flash_driver at91sam3_flash;
-
-static float _tomhz(uint32_t freq_hz)
-{
- float f;
-
- f = ((float)(freq_hz)) / 1000000.0;
- return f;
-}
-
-/* How the chip is configured. */
-struct sam3_cfg {
- uint32_t unique_id[4];
-
- uint32_t slow_freq;
- uint32_t rc_freq;
- uint32_t mainosc_freq;
- uint32_t plla_freq;
- uint32_t mclk_freq;
- uint32_t cpu_freq;
- uint32_t fclk_freq;
- uint32_t pclk0_freq;
- uint32_t pclk1_freq;
- uint32_t pclk2_freq;
-
-
-#define SAM3_CHIPID_CIDR (0x400E0740)
- uint32_t CHIPID_CIDR;
-#define SAM3_CHIPID_CIDR2 (0x400E0940) /*SAM3X and SAM3A cidr at this address*/
- uint32_t CHIPID_CIDR2;
-#define SAM3_CHIPID_EXID (0x400E0744)
- uint32_t CHIPID_EXID;
-#define SAM3_CHIPID_EXID2 (0x400E0944) /*SAM3X and SAM3A cidr at this address*/
- uint32_t CHIPID_EXID2;
-
-
-#define SAM3_PMC_BASE (0x400E0400)
-#define SAM3_PMC_SCSR (SAM3_PMC_BASE + 0x0008)
- uint32_t PMC_SCSR;
-#define SAM3_PMC_PCSR (SAM3_PMC_BASE + 0x0018)
- uint32_t PMC_PCSR;
-#define SAM3_CKGR_UCKR (SAM3_PMC_BASE + 0x001c)
- uint32_t CKGR_UCKR;
-#define SAM3_CKGR_MOR (SAM3_PMC_BASE + 0x0020)
- uint32_t CKGR_MOR;
-#define SAM3_CKGR_MCFR (SAM3_PMC_BASE + 0x0024)
- uint32_t CKGR_MCFR;
-#define SAM3_CKGR_PLLAR (SAM3_PMC_BASE + 0x0028)
- uint32_t CKGR_PLLAR;
-#define SAM3_PMC_MCKR (SAM3_PMC_BASE + 0x0030)
- uint32_t PMC_MCKR;
-#define SAM3_PMC_PCK0 (SAM3_PMC_BASE + 0x0040)
- uint32_t PMC_PCK0;
-#define SAM3_PMC_PCK1 (SAM3_PMC_BASE + 0x0044)
- uint32_t PMC_PCK1;
-#define SAM3_PMC_PCK2 (SAM3_PMC_BASE + 0x0048)
- uint32_t PMC_PCK2;
-#define SAM3_PMC_SR (SAM3_PMC_BASE + 0x0068)
- uint32_t PMC_SR;
-#define SAM3_PMC_IMR (SAM3_PMC_BASE + 0x006c)
- uint32_t PMC_IMR;
-#define SAM3_PMC_FSMR (SAM3_PMC_BASE + 0x0070)
- uint32_t PMC_FSMR;
-#define SAM3_PMC_FSPR (SAM3_PMC_BASE + 0x0074)
- uint32_t PMC_FSPR;
-};
-
-/*
- * The AT91SAM3N data sheet 04-Oct-2010, AT91SAM3U data sheet 22-Aug-2011
- * and AT91SAM3S data sheet 09-Feb-2011 state that for flash writes
- * the flash wait state (FWS) should be set to 6. It seems like that the
- * cause of the problem is not the flash itself, but the flash write
- * buffer. Ie the wait states have to be set before writing into the
- * buffer.
- * Tested and confirmed with SAM3N and SAM3U
- */
-
-struct sam3_bank_private {
- int probed;
- /* DANGER: THERE ARE DRAGONS HERE.. */
- /* NOTE: If you add more 'ghost' pointers */
- /* be aware that you must *manually* update */
- /* these pointers in the function sam3_GetDetails() */
- /* See the comment "Here there be dragons" */
-
- /* so we can find the chip we belong to */
- struct sam3_chip *pChip;
- /* so we can find the original bank pointer */
- struct flash_bank *pBank;
- unsigned bank_number;
- uint32_t controller_address;
- uint32_t base_address;
- uint32_t flash_wait_states;
- bool present;
- unsigned size_bytes;
- unsigned nsectors;
- unsigned sector_size;
- unsigned page_size;
-};
-
-struct sam3_chip_details {
- /* THERE ARE DRAGONS HERE.. */
- /* note: If you add pointers here */
- /* be careful about them as they */
- /* may need to be updated inside */
- /* the function: "sam3_GetDetails() */
- /* which copy/overwrites the */
- /* 'runtime' copy of this structure */
- uint32_t chipid_cidr;
- const char *name;
-
- unsigned n_gpnvms;
-#define SAM3_N_NVM_BITS 3
- unsigned gpnvm[SAM3_N_NVM_BITS];
- unsigned total_flash_size;
- unsigned total_sram_size;
- unsigned n_banks;
-#define SAM3_MAX_FLASH_BANKS 2
- /* these are "initialized" from the global const data */
- struct sam3_bank_private bank[SAM3_MAX_FLASH_BANKS];
-};
-
-struct sam3_chip {
- struct sam3_chip *next;
- int probed;
-
- /* this is "initialized" from the global const structure */
- struct sam3_chip_details details;
- struct target *target;
- struct sam3_cfg cfg;
-};
-
-
-struct sam3_reg_list {
- uint32_t address; size_t struct_offset; const char *name;
- void (*explain_func)(struct sam3_chip *pInfo);
-};
-
-static struct sam3_chip *all_sam3_chips;
-
-static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
-{
- struct target *t;
- static struct sam3_chip *p;
-
- t = get_current_target(cmd_ctx);
- if (!t) {
- command_print(cmd_ctx, "No current target?");
- return NULL;
- }
-
- p = all_sam3_chips;
- if (!p) {
- /* this should not happen */
- /* the command is not registered until the chip is created? */
- command_print(cmd_ctx, "No SAM3 chips exist?");
- return NULL;
- }
-
- while (p) {
- if (p->target == t)
- return p;
- p = p->next;
- }
- command_print(cmd_ctx, "Cannot find SAM3 chip?");
- return NULL;
-}
-
-/* these are used to *initialize* the "pChip->details" structure. */
-static const struct sam3_chip_details all_sam3_details[] = {
- /* Start at91sam3u* series */
- {
- .chipid_cidr = 0x28100960,
- .name = "at91sam3u4e",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 52 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_U,
- .controller_address = 0x400e0800,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 16,
- .sector_size = 8192,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_U,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 16,
- .sector_size = 8192,
- .page_size = 256,
- },
- },
- },
-
- {
- .chipid_cidr = 0x281a0760,
- .name = "at91sam3u2e",
- .total_flash_size = 128 * 1024,
- .total_sram_size = 36 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_U,
- .controller_address = 0x400e0800,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 16,
- .sector_size = 8192,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
- {
- .chipid_cidr = 0x28190560,
- .name = "at91sam3u1e",
- .total_flash_size = 64 * 1024,
- .total_sram_size = 20 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
-
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_U,
- .controller_address = 0x400e0800,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 64 * 1024,
- .nsectors = 8,
- .sector_size = 8192,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x28000960,
- .name = "at91sam3u4c",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 52 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
- {
- {
-/* .bank[0] = { */
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_U,
- .controller_address = 0x400e0800,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 16,
- .sector_size = 8192,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_U,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 16,
- .sector_size = 8192,
- .page_size = 256,
- },
- },
- },
-
- {
- .chipid_cidr = 0x280a0760,
- .name = "at91sam3u2c",
- .total_flash_size = 128 * 1024,
- .total_sram_size = 36 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_U,
- .controller_address = 0x400e0800,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 16,
- .sector_size = 8192,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
- {
- .chipid_cidr = 0x28090560,
- .name = "at91sam3u1c",
- .total_flash_size = 64 * 1024,
- .total_sram_size = 20 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
-
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_U,
- .controller_address = 0x400e0800,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 64 * 1024,
- .nsectors = 8,
- .sector_size = 8192,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
-
- /* Start at91sam3s* series */
-
- /* Note: The preliminary at91sam3s datasheet says on page 302 */
- /* that the flash controller is at address 0x400E0800. */
- /* This is _not_ the case, the controller resides at address 0x400e0a00. */
- {
- .chipid_cidr = 0x28A00960,
- .name = "at91sam3s4c",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 48 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
-
- {
- .chipid_cidr = 0x28900960,
- .name = "at91sam3s4b",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 48 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x28800960,
- .name = "at91sam3s4a",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 48 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x28AA0760,
- .name = "at91sam3s2c",
- .total_flash_size = 128 * 1024,
- .total_sram_size = 32 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x289A0760,
- .name = "at91sam3s2b",
- .total_flash_size = 128 * 1024,
- .total_sram_size = 32 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x298B0A60,
- .name = "at91sam3sd8a",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_512K_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
- },
- },
- {
- .chipid_cidr = 0x299B0A60,
- .name = "at91sam3sd8b",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_512K_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
- },
- },
- {
- .chipid_cidr = 0x29ab0a60,
- .name = "at91sam3sd8c",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_512K_SD,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
- },
- },
- {
- .chipid_cidr = 0x288A0760,
- .name = "at91sam3s2a",
- .total_flash_size = 128 * 1024,
- .total_sram_size = 32 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x28A90560,
- .name = "at91sam3s1c",
- .total_flash_size = 64 * 1024,
- .total_sram_size = 16 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 64 * 1024,
- .nsectors = 4,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x28990560,
- .name = "at91sam3s1b",
- .total_flash_size = 64 * 1024,
- .total_sram_size = 16 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 64 * 1024,
- .nsectors = 4,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x28890560,
- .name = "at91sam3s1a",
- .total_flash_size = 64 * 1024,
- .total_sram_size = 16 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 64 * 1024,
- .nsectors = 4,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x288B0A60,
- .name = "at91sam3s8a",
- .total_flash_size = 256 * 2048,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 2048,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x289B0A60,
- .name = "at91sam3s8b",
- .total_flash_size = 256 * 2048,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 2048,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
- {
- .chipid_cidr = 0x28AB0A60,
- .name = "at91sam3s8c",
- .total_flash_size = 256 * 2048,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 2,
- .n_banks = 1,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_S,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 2048,
- .nsectors = 16,
- .sector_size = 32768,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
-
- },
- },
- },
-
- /* Start at91sam3n* series */
- {
- .chipid_cidr = 0x29540960,
- .name = "at91sam3n4c",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 24 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29440960,
- .name = "at91sam3n4b",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 24 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29340960,
- .name = "at91sam3n4a",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 24 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29590760,
- .name = "at91sam3n2c",
- .total_flash_size = 128 * 1024,
- .total_sram_size = 16 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29490760,
- .name = "at91sam3n2b",
- .total_flash_size = 128 * 1024,
- .total_sram_size = 16 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29390760,
- .name = "at91sam3n2a",
- .total_flash_size = 128 * 1024,
- .total_sram_size = 16 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29580560,
- .name = "at91sam3n1c",
- .total_flash_size = 64 * 1024,
- .total_sram_size = 8 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 64 * 1024,
- .nsectors = 4,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29480560,
- .name = "at91sam3n1b",
- .total_flash_size = 64 * 1024,
- .total_sram_size = 8 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 64 * 1024,
- .nsectors = 4,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29380560,
- .name = "at91sam3n1a",
- .total_flash_size = 64 * 1024,
- .total_sram_size = 8 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 64 * 1024,
- .nsectors = 4,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29480360,
- .name = "at91sam3n0b",
- .total_flash_size = 32 * 1024,
- .total_sram_size = 8 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 32 * 1024,
- .nsectors = 2,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29380360,
- .name = "at91sam3n0a",
- .total_flash_size = 32 * 1024,
- .total_sram_size = 8 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 32 * 1024,
- .nsectors = 2,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29450260,
- .name = "at91sam3n00b",
- .total_flash_size = 16 * 1024,
- .total_sram_size = 4 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 16 * 1024,
- .nsectors = 1,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
- {
- .chipid_cidr = 0x29350260,
- .name = "at91sam3n00a",
- .total_flash_size = 16 * 1024,
- .total_sram_size = 4 * 1024,
- .n_gpnvms = 3,
- .n_banks = 1,
-
-/* .bank[0] = { */
- {
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK_BASE_N,
- .controller_address = 0x400e0A00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 16 * 1024,
- .nsectors = 1,
- .sector_size = 16384,
- .page_size = 256,
- },
-
-/* .bank[1] = { */
- {
- .present = 0,
- .probed = 0,
- .bank_number = 1,
- },
- },
- },
-
-
- /* Start at91sam3a series*/
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
-
- {
- .chipid_cidr = 0x283E0A60,
- .name = "at91sam3a8c",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 96 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_AX,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_512K_AX,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
-
- },
- },
- },
- {
- .chipid_cidr = 0x283B0960,
- .name = "at91sam3a4c",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_AX,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_256K_AX,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
-
- },
- },
- },
-
- /* Start at91sam3x* series */
- /* System boots at address 0x0 */
- /* gpnvm[1] = selects boot code */
- /* if gpnvm[1] == 0 */
- /* boot is via "SAMBA" (rom) */
- /* else */
- /* boot is via FLASH */
- /* Selection is via gpnvm[2] */
- /* endif */
- /* */
- /* NOTE: banks 0 & 1 switch places */
- /* if gpnvm[2] == 0 */
- /* Bank0 is the boot rom */
- /* else */
- /* Bank1 is the boot rom */
- /* endif */
- /*at91sam3x8h - ES has an incorrect CIDR of 0x286E0A20*/
- {
- .chipid_cidr = 0x286E0A20,
- .name = "at91sam3x8h - ES",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 96 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_AX,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_512K_AX,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
-
- },
- },
- },
- /*at91sam3x8h - ES2 and up uses the correct CIDR of 0x286E0A60*/
- {
- .chipid_cidr = 0x286E0A60,
- .name = "at91sam3x8h",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 96 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_AX,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_512K_AX,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
-
- },
- },
- },
- {
- .chipid_cidr = 0x285E0A60,
- .name = "at91sam3x8e",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 96 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_AX,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_512K_AX,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
-
- },
- },
- },
- {
- .chipid_cidr = 0x284E0A60,
- .name = "at91sam3x8c",
- .total_flash_size = 512 * 1024,
- .total_sram_size = 96 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_AX,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_512K_AX ,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 256 * 1024,
- .nsectors = 16,
- .sector_size = 16384,
- .page_size = 256,
-
- },
- },
- },
- {
- .chipid_cidr = 0x285B0960,
- .name = "at91sam3x4e",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_AX,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_256K_AX,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
-
- },
- },
- },
- {
- .chipid_cidr = 0x284B0960,
- .name = "at91sam3x4c",
- .total_flash_size = 256 * 1024,
- .total_sram_size = 64 * 1024,
- .n_gpnvms = 3,
- .n_banks = 2,
- {
-/* .bank[0] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 0,
- .base_address = FLASH_BANK0_BASE_AX,
- .controller_address = 0x400e0a00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
- },
-/* .bank[1] = { */
- {
- .probed = 0,
- .pChip = NULL,
- .pBank = NULL,
- .bank_number = 1,
- .base_address = FLASH_BANK1_BASE_256K_AX,
- .controller_address = 0x400e0c00,
- .flash_wait_states = 6, /* workaround silicon bug */
- .present = 1,
- .size_bytes = 128 * 1024,
- .nsectors = 8,
- .sector_size = 16384,
- .page_size = 256,
-
- },
- },
- },
- /* terminate */
- {
- .chipid_cidr = 0,
- .name = NULL,
- }
-};
-
-/* Globals above */
-/***********************************************************************
- **********************************************************************
- **********************************************************************
- **********************************************************************
- **********************************************************************
- **********************************************************************/
-/* *ATMEL* style code - from the SAM3 driver code */
-
-/**
- * Get the current status of the EEFC and
- * the value of some status bits (LOCKE, PROGE).
- * @param pPrivate - info about the bank
- * @param v - result goes here
- */
-static int EFC_GetStatus(struct sam3_bank_private *pPrivate, uint32_t *v)
-{
- int r;
- r = target_read_u32(pPrivate->pChip->target,
- pPrivate->controller_address + offset_EFC_FSR,
- v);
- LOG_DEBUG("Status: 0x%08x (lockerror: %d, cmderror: %d, ready: %d)",
- (unsigned int)(*v),
- ((unsigned int)((*v >> 2) & 1)),
- ((unsigned int)((*v >> 1) & 1)),
- ((unsigned int)((*v >> 0) & 1)));
-
- return r;
-}
-
-/**
- * Get the result of the last executed command.
- * @param pPrivate - info about the bank
- * @param v - result goes here
- */
-static int EFC_GetResult(struct sam3_bank_private *pPrivate, uint32_t *v)
-{
- int r;
- uint32_t rv;
- r = target_read_u32(pPrivate->pChip->target,
- pPrivate->controller_address + offset_EFC_FRR,
- &rv);
- if (v)
- *v = rv;
- LOG_DEBUG("Result: 0x%08x", ((unsigned int)(rv)));
- return r;
-}
-
-static int EFC_StartCommand(struct sam3_bank_private *pPrivate,
- unsigned command, unsigned argument)
-{
- uint32_t n, v;
- int r;
- int retry;
-
- retry = 0;
-do_retry:
-
- /* Check command & argument */
- switch (command) {
-
- case AT91C_EFC_FCMD_WP:
- case AT91C_EFC_FCMD_WPL:
- case AT91C_EFC_FCMD_EWP:
- case AT91C_EFC_FCMD_EWPL:
- /* case AT91C_EFC_FCMD_EPL: */
- /* case AT91C_EFC_FCMD_EPA: */
- case AT91C_EFC_FCMD_SLB:
- case AT91C_EFC_FCMD_CLB:
- n = (pPrivate->size_bytes / pPrivate->page_size);
- if (argument >= n)
- LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
- break;
-
- case AT91C_EFC_FCMD_SFB:
- case AT91C_EFC_FCMD_CFB:
- if (argument >= pPrivate->pChip->details.n_gpnvms) {
- LOG_ERROR("*BUG*: Embedded flash has only %d GPNVMs",
- pPrivate->pChip->details.n_gpnvms);
- }
- break;
-
- case AT91C_EFC_FCMD_GETD:
- case AT91C_EFC_FCMD_EA:
- case AT91C_EFC_FCMD_GLB:
- case AT91C_EFC_FCMD_GFB:
- case AT91C_EFC_FCMD_STUI:
- case AT91C_EFC_FCMD_SPUI:
- if (argument != 0)
- LOG_ERROR("Argument is meaningless for cmd: %d", command);
- break;
- default:
- LOG_ERROR("Unknown command %d", command);
- break;
- }
-
- if (command == AT91C_EFC_FCMD_SPUI) {
- /* this is a very special situation. */
- /* Situation (1) - error/retry - see below */
- /* And we are being called recursively */
- /* Situation (2) - normal, finished reading unique id */
- } else {
- /* it should be "ready" */
- EFC_GetStatus(pPrivate, &v);
- if (v & 1) {
- /* then it is ready */
- /* we go on */
- } else {
- if (retry) {
- /* we have done this before */
- /* the controller is not responding. */
- LOG_ERROR("flash controller(%d) is not ready! Error",
- pPrivate->bank_number);
- return ERROR_FAIL;
- } else {
- retry++;
- LOG_ERROR("Flash controller(%d) is not ready, attempting reset",
- pPrivate->bank_number);
- /* we do that by issuing the *STOP* command */
- EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0);
- /* above is recursive, and further recursion is blocked by */
- /* if (command == AT91C_EFC_FCMD_SPUI) above */
- goto do_retry;
- }
- }
- }
-
- v = (0x5A << 24) | (argument << 8) | command;
- LOG_DEBUG("Command: 0x%08x", ((unsigned int)(v)));
- r = target_write_u32(pPrivate->pBank->target,
- pPrivate->controller_address + offset_EFC_FCR, v);
- if (r != ERROR_OK)
- LOG_DEBUG("Error Write failed");
- return r;
-}
-
-/**
- * Performs the given command and wait until its completion (or an error).
- * @param pPrivate - info about the bank
- * @param command - Command to perform.
- * @param argument - Optional command argument.
- * @param status - put command status bits here
- */
-static int EFC_PerformCommand(struct sam3_bank_private *pPrivate,
- unsigned command,
- unsigned argument,
- uint32_t *status)
-{
-
- int r;
- uint32_t v;
- long long ms_now, ms_end;
-
- /* default */
- if (status)
- *status = 0;
-
- r = EFC_StartCommand(pPrivate, command, argument);
- if (r != ERROR_OK)
- return r;
-
- ms_end = 500 + timeval_ms();
-
- do {
- r = EFC_GetStatus(pPrivate, &v);
- if (r != ERROR_OK)
- return r;
- ms_now = timeval_ms();
- if (ms_now > ms_end) {
- /* error */
- LOG_ERROR("Command timeout");
- return ERROR_FAIL;
- }
- } while ((v & 1) == 0);
-
- /* error bits.. */
- if (status)
- *status = (v & 0x6);
- return ERROR_OK;
-
-}
-
-/**
- * Read the unique ID.
- * @param pPrivate - info about the bank
- * The unique ID is stored in the 'pPrivate' structure.
- */
-static int FLASHD_ReadUniqueID(struct sam3_bank_private *pPrivate)
-{
- int r;
- uint32_t v;
- int x;
- /* assume 0 */
- pPrivate->pChip->cfg.unique_id[0] = 0;
- pPrivate->pChip->cfg.unique_id[1] = 0;
- pPrivate->pChip->cfg.unique_id[2] = 0;
- pPrivate->pChip->cfg.unique_id[3] = 0;
-
- LOG_DEBUG("Begin");
- r = EFC_StartCommand(pPrivate, AT91C_EFC_FCMD_STUI, 0);
- if (r < 0)
- return r;
-
- for (x = 0; x < 4; x++) {
- r = target_read_u32(pPrivate->pChip->target,
- pPrivate->pBank->base + (x * 4),
- &v);
- if (r < 0)
- return r;
- pPrivate->pChip->cfg.unique_id[x] = v;
- }
-
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SPUI, 0, NULL);
- LOG_DEBUG("End: R=%d, id = 0x%08x, 0x%08x, 0x%08x, 0x%08x",
- r,
- (unsigned int)(pPrivate->pChip->cfg.unique_id[0]),
- (unsigned int)(pPrivate->pChip->cfg.unique_id[1]),
- (unsigned int)(pPrivate->pChip->cfg.unique_id[2]),
- (unsigned int)(pPrivate->pChip->cfg.unique_id[3]));
- return r;
-
-}
-
-/**
- * Erases the entire flash.
- * @param pPrivate - the info about the bank.
- */
-static int FLASHD_EraseEntireBank(struct sam3_bank_private *pPrivate)
-{
- LOG_DEBUG("Here");
- return EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_EA, 0, NULL);
-}
-
-/**
- * Gets current GPNVM state.
- * @param pPrivate - info about the bank.
- * @param gpnvm - GPNVM bit index.
- * @param puthere - result stored here.
- */
-/* ------------------------------------------------------------------------------ */
-static int FLASHD_GetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm, unsigned *puthere)
-{
- uint32_t v;
- int r;
-
- LOG_DEBUG("Here");
- if (pPrivate->bank_number != 0) {
- LOG_ERROR("GPNVM only works with Bank0");
- return ERROR_FAIL;
- }
-
- if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
- LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
- gpnvm, pPrivate->pChip->details.n_gpnvms);
- return ERROR_FAIL;
- }
-
- /* Get GPNVMs status */
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GFB, 0, NULL);
- if (r != ERROR_OK) {
- LOG_ERROR("Failed");
- return r;
- }
-
- r = EFC_GetResult(pPrivate, &v);
-
- if (puthere) {
- /* Check if GPNVM is set */
- /* get the bit and make it a 0/1 */
- *puthere = (v >> gpnvm) & 1;
- }
-
- return r;
-}
-
-/**
- * Clears the selected GPNVM bit.
- * @param pPrivate info about the bank
- * @param gpnvm GPNVM index.
- * @returns 0 if successful; otherwise returns an error code.
- */
-static int FLASHD_ClrGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm)
-{
- int r;
- unsigned v;
-
- LOG_DEBUG("Here");
- if (pPrivate->bank_number != 0) {
- LOG_ERROR("GPNVM only works with Bank0");
- return ERROR_FAIL;
- }
-
- if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
- LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
- gpnvm, pPrivate->pChip->details.n_gpnvms);
- return ERROR_FAIL;
- }
-
- r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v);
- if (r != ERROR_OK) {
- LOG_DEBUG("Failed: %d", r);
- return r;
- }
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CFB, gpnvm, NULL);
- LOG_DEBUG("End: %d", r);
- return r;
-}
-
-/**
- * Sets the selected GPNVM bit.
- * @param pPrivate info about the bank
- * @param gpnvm GPNVM index.
- */
-static int FLASHD_SetGPNVM(struct sam3_bank_private *pPrivate, unsigned gpnvm)
-{
- int r;
- unsigned v;
-
- if (pPrivate->bank_number != 0) {
- LOG_ERROR("GPNVM only works with Bank0");
- return ERROR_FAIL;
- }
-
- if (gpnvm >= pPrivate->pChip->details.n_gpnvms) {
- LOG_ERROR("Invalid GPNVM %d, max: %d, ignored",
- gpnvm, pPrivate->pChip->details.n_gpnvms);
- return ERROR_FAIL;
- }
-
- r = FLASHD_GetGPNVM(pPrivate, gpnvm, &v);
- if (r != ERROR_OK)
- return r;
- if (v) {
- /* already set */
- r = ERROR_OK;
- } else {
- /* set it */
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SFB, gpnvm, NULL);
- }
- return r;
-}
-
-/**
- * Returns a bit field (at most 64) of locked regions within a page.
- * @param pPrivate info about the bank
- * @param v where to store locked bits
- */
-static int FLASHD_GetLockBits(struct sam3_bank_private *pPrivate, uint32_t *v)
-{
- int r;
- LOG_DEBUG("Here");
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_GLB, 0, NULL);
- if (r == ERROR_OK)
- r = EFC_GetResult(pPrivate, v);
- LOG_DEBUG("End: %d", r);
- return r;
-}
-
-/**
- * Unlocks all the regions in the given address range.
- * @param pPrivate info about the bank
- * @param start_sector first sector to unlock
- * @param end_sector last (inclusive) to unlock
- */
-
-static int FLASHD_Unlock(struct sam3_bank_private *pPrivate,
- unsigned start_sector,
- unsigned end_sector)
-{
- int r;
- uint32_t status;
- uint32_t pg;
- uint32_t pages_per_sector;
-
- pages_per_sector = pPrivate->sector_size / pPrivate->page_size;
-
- /* Unlock all pages */
- while (start_sector <= end_sector) {
- pg = start_sector * pages_per_sector;
-
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_CLB, pg, &status);
- if (r != ERROR_OK)
- return r;
- start_sector++;
- }
-
- return ERROR_OK;
-}
-
-/**
- * Locks regions
- * @param pPrivate - info about the bank
- * @param start_sector - first sector to lock
- * @param end_sector - last sector (inclusive) to lock
- */
-static int FLASHD_Lock(struct sam3_bank_private *pPrivate,
- unsigned start_sector,
- unsigned end_sector)
-{
- uint32_t status;
- uint32_t pg;
- uint32_t pages_per_sector;
- int r;
-
- pages_per_sector = pPrivate->sector_size / pPrivate->page_size;
-
- /* Lock all pages */
- while (start_sector <= end_sector) {
- pg = start_sector * pages_per_sector;
-
- r = EFC_PerformCommand(pPrivate, AT91C_EFC_FCMD_SLB, pg, &status);
- if (r != ERROR_OK)
- return r;
- start_sector++;
- }
- return ERROR_OK;
-}
-
-/****** END SAM3 CODE ********/
-
-/* begin helpful debug code */
-/* print the fieldname, the field value, in dec & hex, and return field value */
-static uint32_t sam3_reg_fieldname(struct sam3_chip *pChip,
- const char *regname,
- uint32_t value,
- unsigned shift,
- unsigned width)
-{
- uint32_t v;
- int hwidth, dwidth;
-
-
- /* extract the field */
- v = value >> shift;
- v = v & ((1 << width)-1);
- if (width <= 16) {
- hwidth = 4;
- dwidth = 5;
- } else {
- hwidth = 8;
- dwidth = 12;
- }
-
- /* show the basics */
- LOG_USER_N("\t%*s: %*" PRIu32 " [0x%0*" PRIx32 "] ",
- REG_NAME_WIDTH, regname,
- dwidth, v,
- hwidth, v);
- return v;
-}
-
-static const char _unknown[] = "unknown";
-static const char *const eproc_names[] = {
- _unknown, /* 0 */
- "arm946es", /* 1 */
- "arm7tdmi", /* 2 */
- "cortex-m3", /* 3 */
- "arm920t", /* 4 */
- "arm926ejs", /* 5 */
- _unknown, /* 6 */
- _unknown, /* 7 */
- _unknown, /* 8 */
- _unknown, /* 9 */
- _unknown, /* 10 */
- _unknown, /* 11 */
- _unknown, /* 12 */
- _unknown, /* 13 */
- _unknown, /* 14 */
- _unknown, /* 15 */
-};
-
-#define nvpsize2 nvpsize /* these two tables are identical */
-static const char *const nvpsize[] = {
- "none", /* 0 */
- "8K bytes", /* 1 */
- "16K bytes", /* 2 */
- "32K bytes", /* 3 */
- _unknown, /* 4 */
- "64K bytes", /* 5 */
- _unknown, /* 6 */
- "128K bytes", /* 7 */
- _unknown, /* 8 */
- "256K bytes", /* 9 */
- "512K bytes", /* 10 */
- _unknown, /* 11 */
- "1024K bytes", /* 12 */
- _unknown, /* 13 */
- "2048K bytes", /* 14 */
- _unknown, /* 15 */
-};
-
-static const char *const sramsize[] = {
- "48K Bytes", /* 0 */
- "1K Bytes", /* 1 */
- "2K Bytes", /* 2 */
- "6K Bytes", /* 3 */
- "112K Bytes", /* 4 */
- "4K Bytes", /* 5 */
- "80K Bytes", /* 6 */
- "160K Bytes", /* 7 */
- "8K Bytes", /* 8 */
- "16K Bytes", /* 9 */
- "32K Bytes", /* 10 */
- "64K Bytes", /* 11 */
- "128K Bytes", /* 12 */
- "256K Bytes", /* 13 */
- "96K Bytes", /* 14 */
- "512K Bytes", /* 15 */
-
-};
-
-static const struct archnames { unsigned value; const char *name; } archnames[] = {
- { 0x19, "AT91SAM9xx Series" },
- { 0x29, "AT91SAM9XExx Series" },
- { 0x34, "AT91x34 Series" },
- { 0x37, "CAP7 Series" },
- { 0x39, "CAP9 Series" },
- { 0x3B, "CAP11 Series" },
- { 0x40, "AT91x40 Series" },
- { 0x42, "AT91x42 Series" },
- { 0x55, "AT91x55 Series" },
- { 0x60, "AT91SAM7Axx Series" },
- { 0x61, "AT91SAM7AQxx Series" },
- { 0x63, "AT91x63 Series" },
- { 0x70, "AT91SAM7Sxx Series" },
- { 0x71, "AT91SAM7XCxx Series" },
- { 0x72, "AT91SAM7SExx Series" },
- { 0x73, "AT91SAM7Lxx Series" },
- { 0x75, "AT91SAM7Xxx Series" },
- { 0x76, "AT91SAM7SLxx Series" },
- { 0x80, "ATSAM3UxC Series (100-pin version)" },
- { 0x81, "ATSAM3UxE Series (144-pin version)" },
- { 0x83, "ATSAM3AxC Series (100-pin version)" },
- { 0x84, "ATSAM3XxC Series (100-pin version)" },
- { 0x85, "ATSAM3XxE Series (144-pin version)" },
- { 0x86, "ATSAM3XxG Series (208/217-pin version)" },
- { 0x88, "ATSAM3SxA Series (48-pin version)" },
- { 0x89, "ATSAM3SxB Series (64-pin version)" },
- { 0x8A, "ATSAM3SxC Series (100-pin version)" },
- { 0x92, "AT91x92 Series" },
- { 0x93, "ATSAM3NxA Series (48-pin version)" },
- { 0x94, "ATSAM3NxB Series (64-pin version)" },
- { 0x95, "ATSAM3NxC Series (100-pin version)" },
- { 0x98, "ATSAM3SDxA Series (48-pin version)" },
- { 0x99, "ATSAM3SDxB Series (64-pin version)" },
- { 0x9A, "ATSAM3SDxC Series (100-pin version)" },
- { 0xA5, "ATSAM5A" },
- { 0xF0, "AT75Cxx Series" },
- { -1, NULL },
-};
-
-static const char *const nvptype[] = {
- "rom", /* 0 */
- "romless or onchip flash", /* 1 */
- "embedded flash memory",/* 2 */
- "rom(nvpsiz) + embedded flash (nvpsiz2)", /* 3 */
- "sram emulating flash", /* 4 */
- _unknown, /* 5 */
- _unknown, /* 6 */
- _unknown, /* 7 */
-};
-
-static const char *_yes_or_no(uint32_t v)
-{
- if (v)
- return "YES";
- else
- return "NO";
-}
-
-static const char *const _rc_freq[] = {
- "4 MHz", "8 MHz", "12 MHz", "reserved"
-};
-
-static void sam3_explain_ckgr_mor(struct sam3_chip *pChip)
-{
- uint32_t v;
- uint32_t rcen;
-
- v = sam3_reg_fieldname(pChip, "MOSCXTEN", pChip->cfg.CKGR_MOR, 0, 1);
- LOG_USER("(main xtal enabled: %s)", _yes_or_no(v));
- v = sam3_reg_fieldname(pChip, "MOSCXTBY", pChip->cfg.CKGR_MOR, 1, 1);
- LOG_USER("(main osc bypass: %s)", _yes_or_no(v));
- rcen = sam3_reg_fieldname(pChip, "MOSCRCEN", pChip->cfg.CKGR_MOR, 3, 1);
- LOG_USER("(onchip RC-OSC enabled: %s)", _yes_or_no(rcen));
- v = sam3_reg_fieldname(pChip, "MOSCRCF", pChip->cfg.CKGR_MOR, 4, 3);
- LOG_USER("(onchip RC-OSC freq: %s)", _rc_freq[v]);
-
- pChip->cfg.rc_freq = 0;
- if (rcen) {
- switch (v) {
- default:
- pChip->cfg.rc_freq = 0;
- break;
- case 0:
- pChip->cfg.rc_freq = 4 * 1000 * 1000;
- break;
- case 1:
- pChip->cfg.rc_freq = 8 * 1000 * 1000;
- break;
- case 2:
- pChip->cfg.rc_freq = 12 * 1000 * 1000;
- break;
- }
- }
-
- v = sam3_reg_fieldname(pChip, "MOSCXTST", pChip->cfg.CKGR_MOR, 8, 8);
- LOG_USER("(startup clks, time= %f uSecs)",
- ((float)(v * 1000000)) / ((float)(pChip->cfg.slow_freq)));
- v = sam3_reg_fieldname(pChip, "MOSCSEL", pChip->cfg.CKGR_MOR, 24, 1);
- LOG_USER("(mainosc source: %s)",
- v ? "external xtal" : "internal RC");
-
- v = sam3_reg_fieldname(pChip, "CFDEN", pChip->cfg.CKGR_MOR, 25, 1);
- LOG_USER("(clock failure enabled: %s)",
- _yes_or_no(v));
-}
-
-static void sam3_explain_chipid_cidr(struct sam3_chip *pChip)
-{
- int x;
- uint32_t v;
- const char *cp;
-
- sam3_reg_fieldname(pChip, "Version", pChip->cfg.CHIPID_CIDR, 0, 5);
- LOG_USER_N("\n");
-
- v = sam3_reg_fieldname(pChip, "EPROC", pChip->cfg.CHIPID_CIDR, 5, 3);
- LOG_USER("%s", eproc_names[v]);
-
- v = sam3_reg_fieldname(pChip, "NVPSIZE", pChip->cfg.CHIPID_CIDR, 8, 4);
- LOG_USER("%s", nvpsize[v]);
-
- v = sam3_reg_fieldname(pChip, "NVPSIZE2", pChip->cfg.CHIPID_CIDR, 12, 4);
- LOG_USER("%s", nvpsize2[v]);
-
- v = sam3_reg_fieldname(pChip, "SRAMSIZE", pChip->cfg.CHIPID_CIDR, 16, 4);
- LOG_USER("%s", sramsize[v]);
-
- v = sam3_reg_fieldname(pChip, "ARCH", pChip->cfg.CHIPID_CIDR, 20, 8);
- cp = _unknown;
- for (x = 0; archnames[x].name; x++) {
- if (v == archnames[x].value) {
- cp = archnames[x].name;
- break;
- }
- }
-
- LOG_USER("%s", cp);
-
- v = sam3_reg_fieldname(pChip, "NVPTYP", pChip->cfg.CHIPID_CIDR, 28, 3);
- LOG_USER("%s", nvptype[v]);
-
- v = sam3_reg_fieldname(pChip, "EXTID", pChip->cfg.CHIPID_CIDR, 31, 1);
- LOG_USER("(exists: %s)", _yes_or_no(v));
-}
-
-static void sam3_explain_ckgr_mcfr(struct sam3_chip *pChip)
-{
- uint32_t v;
-
- v = sam3_reg_fieldname(pChip, "MAINFRDY", pChip->cfg.CKGR_MCFR, 16, 1);
- LOG_USER("(main ready: %s)", _yes_or_no(v));
-
- v = sam3_reg_fieldname(pChip, "MAINF", pChip->cfg.CKGR_MCFR, 0, 16);
-
- v = (v * pChip->cfg.slow_freq) / 16;
- pChip->cfg.mainosc_freq = v;
-
- LOG_USER("(%3.03f Mhz (%" PRIu32 ".%03" PRIu32 "khz slowclk)",
- _tomhz(v),
- (uint32_t)(pChip->cfg.slow_freq / 1000),
- (uint32_t)(pChip->cfg.slow_freq % 1000));
-}
-
-static void sam3_explain_ckgr_plla(struct sam3_chip *pChip)
-{
- uint32_t mula, diva;
-
- diva = sam3_reg_fieldname(pChip, "DIVA", pChip->cfg.CKGR_PLLAR, 0, 8);
- LOG_USER_N("\n");
- mula = sam3_reg_fieldname(pChip, "MULA", pChip->cfg.CKGR_PLLAR, 16, 11);
- LOG_USER_N("\n");
- pChip->cfg.plla_freq = 0;
- if (mula == 0)
- LOG_USER("\tPLLA Freq: (Disabled,mula = 0)");
- else if (diva == 0)
- LOG_USER("\tPLLA Freq: (Disabled,diva = 0)");
- else if (diva >= 1) {
- pChip->cfg.plla_freq = (pChip->cfg.mainosc_freq * (mula + 1) / diva);
- LOG_USER("\tPLLA Freq: %3.03f MHz",
- _tomhz(pChip->cfg.plla_freq));
- }
-}
-
-static void sam3_explain_mckr(struct sam3_chip *pChip)
-{
- uint32_t css, pres, fin = 0;
- int pdiv = 0;
- const char *cp = NULL;
-
- css = sam3_reg_fieldname(pChip, "CSS", pChip->cfg.PMC_MCKR, 0, 2);
- switch (css & 3) {
- case 0:
- fin = pChip->cfg.slow_freq;
- cp = "slowclk";
- break;
- case 1:
- fin = pChip->cfg.mainosc_freq;
- cp = "mainosc";
- break;
- case 2:
- fin = pChip->cfg.plla_freq;
- cp = "plla";
- break;
- case 3:
- if (pChip->cfg.CKGR_UCKR & (1 << 16)) {
- fin = 480 * 1000 * 1000;
- cp = "upll";
- } else {
- fin = 0;
- cp = "upll (*ERROR* UPLL is disabled)";
- }
- break;
- default:
- assert(0);
- break;
- }
-
- LOG_USER("%s (%3.03f Mhz)",
- cp,
- _tomhz(fin));
- pres = sam3_reg_fieldname(pChip, "PRES", pChip->cfg.PMC_MCKR, 4, 3);
- switch (pres & 0x07) {
- case 0:
- pdiv = 1;
- cp = "selected clock";
- break;
- case 1:
- pdiv = 2;
- cp = "clock/2";
- break;
- case 2:
- pdiv = 4;
- cp = "clock/4";
- break;
- case 3:
- pdiv = 8;
- cp = "clock/8";
- break;
- case 4:
- pdiv = 16;
- cp = "clock/16";
- break;
- case 5:
- pdiv = 32;
- cp = "clock/32";
- break;
- case 6:
- pdiv = 64;
- cp = "clock/64";
- break;
- case 7:
- pdiv = 6;
- cp = "clock/6";
- break;
- default:
- assert(0);
- break;
- }
- LOG_USER("(%s)", cp);
- fin = fin / pdiv;
- /* sam3 has a *SINGLE* clock - */
- /* other at91 series parts have divisors for these. */
- pChip->cfg.cpu_freq = fin;
- pChip->cfg.mclk_freq = fin;
- pChip->cfg.fclk_freq = fin;
- LOG_USER("\t\tResult CPU Freq: %3.03f",
- _tomhz(fin));
-}
-
-#if 0
-static struct sam3_chip *target2sam3(struct target *pTarget)
-{
- struct sam3_chip *pChip;
-
- if (pTarget == NULL)
- return NULL;
-
- pChip = all_sam3_chips;
- while (pChip) {
- if (pChip->target == pTarget)
- break; /* return below */
- else
- pChip = pChip->next;
- }
- return pChip;
-}
-#endif
-
-static uint32_t *sam3_get_reg_ptr(struct sam3_cfg *pCfg, const struct sam3_reg_list *pList)
-{
- /* this function exists to help */
- /* keep funky offsetof() errors */
- /* and casting from causing bugs */
-
- /* By using prototypes - we can detect what would */
- /* be casting errors. */
-
- return (uint32_t *)(void *)(((char *)(pCfg)) + pList->struct_offset);
-}
-
-
-#define SAM3_ENTRY(NAME, FUNC) { .address = SAM3_ ## NAME, .struct_offset = offsetof( \
- struct sam3_cfg, \
- NAME), # NAME, FUNC }
-static const struct sam3_reg_list sam3_all_regs[] = {
- SAM3_ENTRY(CKGR_MOR, sam3_explain_ckgr_mor),
- SAM3_ENTRY(CKGR_MCFR, sam3_explain_ckgr_mcfr),
- SAM3_ENTRY(CKGR_PLLAR, sam3_explain_ckgr_plla),
- SAM3_ENTRY(CKGR_UCKR, NULL),
- SAM3_ENTRY(PMC_FSMR, NULL),
- SAM3_ENTRY(PMC_FSPR, NULL),
- SAM3_ENTRY(PMC_IMR, NULL),
- SAM3_ENTRY(PMC_MCKR, sam3_explain_mckr),
- SAM3_ENTRY(PMC_PCK0, NULL),
- SAM3_ENTRY(PMC_PCK1, NULL),
- SAM3_ENTRY(PMC_PCK2, NULL),
- SAM3_ENTRY(PMC_PCSR, NULL),
- SAM3_ENTRY(PMC_SCSR, NULL),
- SAM3_ENTRY(PMC_SR, NULL),
- SAM3_ENTRY(CHIPID_CIDR, sam3_explain_chipid_cidr),
- SAM3_ENTRY(CHIPID_CIDR2, sam3_explain_chipid_cidr),
- SAM3_ENTRY(CHIPID_EXID, NULL),
- SAM3_ENTRY(CHIPID_EXID2, NULL),
- /* TERMINATE THE LIST */
- { .name = NULL }
-};
-#undef SAM3_ENTRY
-
-static struct sam3_bank_private *get_sam3_bank_private(struct flash_bank *bank)
-{
- return bank->driver_priv;
-}
-
-/**
- * Given a pointer to where it goes in the structure,
- * determine the register name, address from the all registers table.
- */
-static const struct sam3_reg_list *sam3_GetReg(struct sam3_chip *pChip, uint32_t *goes_here)
-{
- const struct sam3_reg_list *pReg;
-
- pReg = &(sam3_all_regs[0]);
- while (pReg->name) {
- uint32_t *pPossible;
-
- /* calculate where this one go.. */
- /* it is "possibly" this register. */
-
- pPossible = ((uint32_t *)(void *)(((char *)(&(pChip->cfg))) + pReg->struct_offset));
-
- /* well? Is it this register */
- if (pPossible == goes_here) {
- /* Jump for joy! */
- return pReg;
- }
-
- /* next... */
- pReg++;
- }
- /* This is *TOTAL*PANIC* - we are totally screwed. */
- LOG_ERROR("INVALID SAM3 REGISTER");
- return NULL;
-}
-
-static int sam3_ReadThisReg(struct sam3_chip *pChip, uint32_t *goes_here)
-{
- const struct sam3_reg_list *pReg;
- int r;
-
- pReg = sam3_GetReg(pChip, goes_here);
- if (!pReg)
- return ERROR_FAIL;
-
- r = target_read_u32(pChip->target, pReg->address, goes_here);
- if (r != ERROR_OK) {
- LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d",
- pReg->name, (unsigned)(pReg->address), r);
- }
- return r;
-}
-
-static int sam3_ReadAllRegs(struct sam3_chip *pChip)
-{
- int r;
- const struct sam3_reg_list *pReg;
-
- pReg = &(sam3_all_regs[0]);
- while (pReg->name) {
- r = sam3_ReadThisReg(pChip,
- sam3_get_reg_ptr(&(pChip->cfg), pReg));
- if (r != ERROR_OK) {
- LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d",
- pReg->name, ((unsigned)(pReg->address)), r);
- return r;
- }
- pReg++;
- }
-
- /* Chip identification register
- *
- * Unfortunately, the chip identification register is not at
- * a constant address across all of the SAM3 series'. As a
- * consequence, a simple heuristic is used to find where it's
- * at...
- *
- * If the contents at the first address is zero, then we know
- * that the second address is where the chip id register is.
- * We can deduce this because for those SAM's that have the
- * chip id @ 0x400e0940, the first address, 0x400e0740, is
- * located in the memory map of the Power Management Controller
- * (PMC). Furthermore, the address is not used by the PMC.
- * So when read, the memory controller returns zero.*/
- if (pChip->cfg.CHIPID_CIDR == 0) {
- /*Put the correct CIDR and EXID values in the pChip structure */
- pChip->cfg.CHIPID_CIDR = pChip->cfg.CHIPID_CIDR2;
- pChip->cfg.CHIPID_EXID = pChip->cfg.CHIPID_EXID2;
- }
- return ERROR_OK;
-}
-
-static int sam3_GetInfo(struct sam3_chip *pChip)
-{
- const struct sam3_reg_list *pReg;
- uint32_t regval;
-
- pReg = &(sam3_all_regs[0]);
- while (pReg->name) {
- /* display all regs */
- LOG_DEBUG("Start: %s", pReg->name);
- regval = *sam3_get_reg_ptr(&(pChip->cfg), pReg);
- LOG_USER("%*s: [0x%08" PRIx32 "] -> 0x%08" PRIx32,
- REG_NAME_WIDTH,
- pReg->name,
- pReg->address,
- regval);
- if (pReg->explain_func)
- (*(pReg->explain_func))(pChip);
- LOG_DEBUG("End: %s", pReg->name);
- pReg++;
- }
- LOG_USER(" rc-osc: %3.03f MHz", _tomhz(pChip->cfg.rc_freq));
- LOG_USER(" mainosc: %3.03f MHz", _tomhz(pChip->cfg.mainosc_freq));
- LOG_USER(" plla: %3.03f MHz", _tomhz(pChip->cfg.plla_freq));
- LOG_USER(" cpu-freq: %3.03f MHz", _tomhz(pChip->cfg.cpu_freq));
- LOG_USER("mclk-freq: %3.03f MHz", _tomhz(pChip->cfg.mclk_freq));
-
- LOG_USER(" UniqueId: 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32 " 0x%08" PRIx32,
- pChip->cfg.unique_id[0],
- pChip->cfg.unique_id[1],
- pChip->cfg.unique_id[2],
- pChip->cfg.unique_id[3]);
-
- return ERROR_OK;
-}
-
-static int sam3_erase_check(struct flash_bank *bank)
-{
- int x;
-
- LOG_DEBUG("Here");
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
- if (0 == bank->num_sectors) {
- LOG_ERROR("Target: not supported/not probed");
- return ERROR_FAIL;
- }
-
- LOG_INFO("sam3 - supports auto-erase, erase_check ignored");
- for (x = 0; x < bank->num_sectors; x++)
- bank->sectors[x].is_erased = 1;
-
- LOG_DEBUG("Done");
- return ERROR_OK;
-}
-
-static int sam3_protect_check(struct flash_bank *bank)
-{
- int r;
- uint32_t v = 0;
- unsigned x;
- struct sam3_bank_private *pPrivate;
-
- LOG_DEBUG("Begin");
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- pPrivate = get_sam3_bank_private(bank);
- if (!pPrivate) {
- LOG_ERROR("no private for this bank?");
- return ERROR_FAIL;
- }
- if (!(pPrivate->probed))
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- r = FLASHD_GetLockBits(pPrivate, &v);
- if (r != ERROR_OK) {
- LOG_DEBUG("Failed: %d", r);
- return r;
- }
-
- for (x = 0; x < pPrivate->nsectors; x++)
- bank->sectors[x].is_protected = (!!(v & (1 << x)));
- LOG_DEBUG("Done");
- return ERROR_OK;
-}
-
-FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command)
-{
- struct sam3_chip *pChip;
-
- pChip = all_sam3_chips;
-
- /* is this an existing chip? */
- while (pChip) {
- if (pChip->target == bank->target)
- break;
- pChip = pChip->next;
- }
-
- if (!pChip) {
- /* this is a *NEW* chip */
- pChip = calloc(1, sizeof(struct sam3_chip));
- if (!pChip) {
- LOG_ERROR("NO RAM!");
- return ERROR_FAIL;
- }
- pChip->target = bank->target;
- /* insert at head */
- pChip->next = all_sam3_chips;
- all_sam3_chips = pChip;
- pChip->target = bank->target;
- /* assumption is this runs at 32khz */
- pChip->cfg.slow_freq = 32768;
- pChip->probed = 0;
- }
-
- switch (bank->base) {
- default:
- LOG_ERROR("Address 0x%08x invalid bank address (try 0x%08x or 0x%08x "
- "[at91sam3u series] or 0x%08x [at91sam3s series] or "
- "0x%08x [at91sam3n series] or 0x%08x or 0x%08x or 0x%08x[at91sam3ax series] )",
- ((unsigned int)(bank->base)),
- ((unsigned int)(FLASH_BANK0_BASE_U)),
- ((unsigned int)(FLASH_BANK1_BASE_U)),
- ((unsigned int)(FLASH_BANK_BASE_S)),
- ((unsigned int)(FLASH_BANK_BASE_N)),
- ((unsigned int)(FLASH_BANK0_BASE_AX)),
- ((unsigned int)(FLASH_BANK1_BASE_256K_AX)),
- ((unsigned int)(FLASH_BANK1_BASE_512K_AX)));
- return ERROR_FAIL;
- break;
-
- /* at91sam3s and at91sam3n series only has bank 0*/
- /* at91sam3u and at91sam3ax series has the same address for bank 0*/
- case FLASH_BANK_BASE_S:
- case FLASH_BANK0_BASE_U:
- bank->driver_priv = &(pChip->details.bank[0]);
- bank->bank_number = 0;
- pChip->details.bank[0].pChip = pChip;
- pChip->details.bank[0].pBank = bank;
- break;
-
- /* Bank 1 of at91sam3u or at91sam3ax series */
- case FLASH_BANK1_BASE_U:
- case FLASH_BANK1_BASE_256K_AX:
- case FLASH_BANK1_BASE_512K_AX:
- bank->driver_priv = &(pChip->details.bank[1]);
- bank->bank_number = 1;
- pChip->details.bank[1].pChip = pChip;
- pChip->details.bank[1].pBank = bank;
- break;
- }
-
- /* we initialize after probing. */
- return ERROR_OK;
-}
-
-static int sam3_GetDetails(struct sam3_bank_private *pPrivate)
-{
- const struct sam3_chip_details *pDetails;
- struct sam3_chip *pChip;
- struct flash_bank *saved_banks[SAM3_MAX_FLASH_BANKS];
- unsigned x;
-
- LOG_DEBUG("Begin");
- pDetails = all_sam3_details;
- while (pDetails->name) {
- /* Compare cidr without version bits */
- if (((pDetails->chipid_cidr ^ pPrivate->pChip->cfg.CHIPID_CIDR) & 0xFFFFFFE0) == 0)
- break;
- else
- pDetails++;
- }
- if (pDetails->name == NULL) {
- LOG_ERROR("SAM3 ChipID 0x%08x not found in table (perhaps you can ID this chip?)",
- (unsigned int)(pPrivate->pChip->cfg.CHIPID_CIDR));
- /* Help the victim, print details about the chip */
- LOG_INFO("SAM3 CHIPID_CIDR: 0x%08" PRIx32 " decodes as follows",
- pPrivate->pChip->cfg.CHIPID_CIDR);
- sam3_explain_chipid_cidr(pPrivate->pChip);
- return ERROR_FAIL;
- }
-
- /* DANGER: THERE ARE DRAGONS HERE */
-
- /* get our pChip - it is going */
- /* to be over-written shortly */
- pChip = pPrivate->pChip;
-
- /* Note that, in reality: */
- /* */
- /* pPrivate = &(pChip->details.bank[0]) */
- /* or pPrivate = &(pChip->details.bank[1]) */
- /* */
-
- /* save the "bank" pointers */
- for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++)
- saved_banks[x] = pChip->details.bank[x].pBank;
-
- /* Overwrite the "details" structure. */
- memcpy(&(pPrivate->pChip->details),
- pDetails,
- sizeof(pPrivate->pChip->details));
-
- /* now fix the ghosted pointers */
- for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++) {
- pChip->details.bank[x].pChip = pChip;
- pChip->details.bank[x].pBank = saved_banks[x];
- }
-
- /* update the *BANK*SIZE* */
-
- LOG_DEBUG("End");
- return ERROR_OK;
-}
-
-static int _sam3_probe(struct flash_bank *bank, int noise)
-{
- unsigned x;
- int r;
- struct sam3_bank_private *pPrivate;
-
-
- LOG_DEBUG("Begin: Bank: %d, Noise: %d", bank->bank_number, noise);
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- pPrivate = get_sam3_bank_private(bank);
- if (!pPrivate) {
- LOG_ERROR("Invalid/unknown bank number");
- return ERROR_FAIL;
- }
-
- r = sam3_ReadAllRegs(pPrivate->pChip);
- if (r != ERROR_OK)
- return r;
-
- LOG_DEBUG("Here");
- if (pPrivate->pChip->probed)
- r = sam3_GetInfo(pPrivate->pChip);
- else
- r = sam3_GetDetails(pPrivate);
- if (r != ERROR_OK)
- return r;
-
- /* update the flash bank size */
- for (x = 0; x < SAM3_MAX_FLASH_BANKS; x++) {
- if (bank->base == pPrivate->pChip->details.bank[x].base_address) {
- bank->size = pPrivate->pChip->details.bank[x].size_bytes;
- break;
- }
- }
-
- if (bank->sectors == NULL) {
- bank->sectors = calloc(pPrivate->nsectors, (sizeof((bank->sectors)[0])));
- if (bank->sectors == NULL) {
- LOG_ERROR("No memory!");
- return ERROR_FAIL;
- }
- bank->num_sectors = pPrivate->nsectors;
-
- for (x = 0; ((int)(x)) < bank->num_sectors; x++) {
- bank->sectors[x].size = pPrivate->sector_size;
- bank->sectors[x].offset = x * (pPrivate->sector_size);
- /* mark as unknown */
- bank->sectors[x].is_erased = -1;
- bank->sectors[x].is_protected = -1;
- }
- }
-
- pPrivate->probed = 1;
-
- r = sam3_protect_check(bank);
- if (r != ERROR_OK)
- return r;
-
- LOG_DEBUG("Bank = %d, nbanks = %d",
- pPrivate->bank_number, pPrivate->pChip->details.n_banks);
- if ((pPrivate->bank_number + 1) == pPrivate->pChip->details.n_banks) {
- /* read unique id, */
- /* it appears to be associated with the *last* flash bank. */
- FLASHD_ReadUniqueID(pPrivate);
- }
-
- return r;
-}
-
-static int sam3_probe(struct flash_bank *bank)
-{
- return _sam3_probe(bank, 1);
-}
-
-static int sam3_auto_probe(struct flash_bank *bank)
-{
- return _sam3_probe(bank, 0);
-}
-
-static int sam3_erase(struct flash_bank *bank, int first, int last)
-{
- struct sam3_bank_private *pPrivate;
- int r;
-
- LOG_DEBUG("Here");
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- r = sam3_auto_probe(bank);
- if (r != ERROR_OK) {
- LOG_DEBUG("Here,r=%d", r);
- return r;
- }
-
- pPrivate = get_sam3_bank_private(bank);
- if (!(pPrivate->probed))
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if ((first == 0) && ((last + 1) == ((int)(pPrivate->nsectors)))) {
- /* whole chip */
- LOG_DEBUG("Here");
- return FLASHD_EraseEntireBank(pPrivate);
- }
- LOG_INFO("sam3 auto-erases while programming (request ignored)");
- return ERROR_OK;
-}
-
-static int sam3_protect(struct flash_bank *bank, int set, int first, int last)
-{
- struct sam3_bank_private *pPrivate;
- int r;
-
- LOG_DEBUG("Here");
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- pPrivate = get_sam3_bank_private(bank);
- if (!(pPrivate->probed))
- return ERROR_FLASH_BANK_NOT_PROBED;
-
- if (set)
- r = FLASHD_Lock(pPrivate, (unsigned)(first), (unsigned)(last));
- else
- r = FLASHD_Unlock(pPrivate, (unsigned)(first), (unsigned)(last));
- LOG_DEBUG("End: r=%d", r);
-
- return r;
-
-}
-
-static int sam3_page_read(struct sam3_bank_private *pPrivate, unsigned pagenum, uint8_t *buf)
-{
- uint32_t adr;
- int r;
-
- adr = pagenum * pPrivate->page_size;
- adr += pPrivate->base_address;
-
- r = target_read_memory(pPrivate->pChip->target,
- adr,
- 4, /* THIS*MUST*BE* in 32bit values */
- pPrivate->page_size / 4,
- buf);
- if (r != ERROR_OK)
- LOG_ERROR("SAM3: Flash program failed to read page phys address: 0x%08x",
- (unsigned int)(adr));
- return r;
-}
-
-static int sam3_page_write(struct sam3_bank_private *pPrivate, unsigned pagenum, const uint8_t *buf)
-{
- uint32_t adr;
- uint32_t status;
- uint32_t fmr; /* EEFC Flash Mode Register */
- int r;
-
- adr = pagenum * pPrivate->page_size;
- adr += pPrivate->base_address;
-
- /* Get flash mode register value */
- r = target_read_u32(pPrivate->pChip->target, pPrivate->controller_address, &fmr);
- if (r != ERROR_OK)
- LOG_DEBUG("Error Read failed: read flash mode register");
-
- /* Clear flash wait state field */
- fmr &= 0xfffff0ff;
-
- /* set FWS (flash wait states) field in the FMR (flash mode register) */
- fmr |= (pPrivate->flash_wait_states << 8);
-
- LOG_DEBUG("Flash Mode: 0x%08x", ((unsigned int)(fmr)));
- r = target_write_u32(pPrivate->pBank->target, pPrivate->controller_address, fmr);
- if (r != ERROR_OK)
- LOG_DEBUG("Error Write failed: set flash mode register");
-
- LOG_DEBUG("Wr Page %u @ phys address: 0x%08x", pagenum, (unsigned int)(adr));
- r = target_write_memory(pPrivate->pChip->target,
- adr,
- 4, /* THIS*MUST*BE* in 32bit values */
- pPrivate->page_size / 4,
- buf);
- if (r != ERROR_OK) {
- LOG_ERROR("SAM3: Failed to write (buffer) page at phys address 0x%08x",
- (unsigned int)(adr));
- return r;
- }
-
- r = EFC_PerformCommand(pPrivate,
- /* send Erase & Write Page */
- AT91C_EFC_FCMD_EWP,
- pagenum,
- &status);
-
- if (r != ERROR_OK)
- LOG_ERROR("SAM3: Error performing Erase & Write page @ phys address 0x%08x",
- (unsigned int)(adr));
- if (status & (1 << 2)) {
- LOG_ERROR("SAM3: Page @ Phys address 0x%08x is locked", (unsigned int)(adr));
- return ERROR_FAIL;
- }
- if (status & (1 << 1)) {
- LOG_ERROR("SAM3: Flash Command error @phys address 0x%08x", (unsigned int)(adr));
- return ERROR_FAIL;
- }
- return ERROR_OK;
-}
-
-static int sam3_write(struct flash_bank *bank,
- const uint8_t *buffer,
- uint32_t offset,
- uint32_t count)
-{
- in
<TRUNCATED>
[26/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/kinetis.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/kinetis.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/kinetis.c
deleted file mode 100755
index 3a9d4ac..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/flash/nor/kinetis.c
+++ /dev/null
@@ -1,1993 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2011 by Mathias Kuester *
- * kesmtp@freenet.de *
- * *
- * Copyright (C) 2011 sleep(5) ltd *
- * tomas@sleepfive.com *
- * *
- * Copyright (C) 2012 by Christopher D. Kilgour *
- * techie at whiterocker.com *
- * *
- * Copyright (C) 2013 Nemui Trinomius *
- * nemuisan_kawausogasuki@live.jp *
- * *
- * Copyright (C) 2015 Tomas Vanek *
- * vanekt@fbl.cz *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "jtag/interface.h"
-#include "imp.h"
-#include <helper/binarybuffer.h>
-#include <target/target_type.h>
-#include <target/algorithm.h>
-#include <target/armv7m.h>
-#include <target/cortex_m.h>
-
-/*
- * Implementation Notes
- *
- * The persistent memories in the Kinetis chip families K10 through
- * K70 are all manipulated with the Flash Memory Module. Some
- * variants call this module the FTFE, others call it the FTFL. To
- * indicate that both are considered here, we use FTFX.
- *
- * Within the module, according to the chip variant, the persistent
- * memory is divided into what Freescale terms Program Flash, FlexNVM,
- * and FlexRAM. All chip variants have Program Flash. Some chip
- * variants also have FlexNVM and FlexRAM, which always appear
- * together.
- *
- * A given Kinetis chip may have 1, 2 or 4 blocks of flash. Here we map
- * each block to a separate bank. Each block size varies by chip and
- * may be determined by the read-only SIM_FCFG1 register. The sector
- * size within each bank/block varies by chip, and may be 1, 2 or 4k.
- * The sector size may be different for flash and FlexNVM.
- *
- * The first half of the flash (1 or 2 blocks) is always Program Flash
- * and always starts at address 0x00000000. The "PFLSH" flag, bit 23
- * of the read-only SIM_FCFG2 register, determines whether the second
- * half of the flash is also Program Flash or FlexNVM+FlexRAM. When
- * PFLSH is set, the second from the first half. When PFLSH is clear,
- * the second half of flash is FlexNVM and always starts at address
- * 0x10000000. FlexRAM, which is also present when PFLSH is clear,
- * always starts at address 0x14000000.
- *
- * The Flash Memory Module provides a register set where flash
- * commands are loaded to perform flash operations like erase and
- * program. Different commands are available depending on whether
- * Program Flash or FlexNVM/FlexRAM is being manipulated. Although
- * the commands used are quite consistent between flash blocks, the
- * parameters they accept differ according to the flash sector size.
- *
- */
-
-/* Addressess */
-#define FLEXRAM 0x14000000
-
-#define FMC_PFB01CR 0x4001f004
-#define FTFx_FSTAT 0x40020000
-#define FTFx_FCNFG 0x40020001
-#define FTFx_FCCOB3 0x40020004
-#define FTFx_FPROT3 0x40020010
-#define FTFx_FDPROT 0x40020017
-#define SIM_SDID 0x40048024
-#define SIM_SOPT1 0x40047000
-#define SIM_FCFG1 0x4004804c
-#define SIM_FCFG2 0x40048050
-#define WDOG_STCTRH 0x40052000
-#define SMC_PMCTRL 0x4007E001
-#define SMC_PMSTAT 0x4007E003
-
-/* Values */
-#define PM_STAT_RUN 0x01
-#define PM_STAT_VLPR 0x04
-#define PM_CTRL_RUNM_RUN 0x00
-
-/* Commands */
-#define FTFx_CMD_BLOCKSTAT 0x00
-#define FTFx_CMD_SECTSTAT 0x01
-#define FTFx_CMD_LWORDPROG 0x06
-#define FTFx_CMD_SECTERASE 0x09
-#define FTFx_CMD_SECTWRITE 0x0b
-#define FTFx_CMD_MASSERASE 0x44
-#define FTFx_CMD_PGMPART 0x80
-#define FTFx_CMD_SETFLEXRAM 0x81
-
-/* The older Kinetis K series uses the following SDID layout :
- * Bit 31-16 : 0
- * Bit 15-12 : REVID
- * Bit 11-7 : DIEID
- * Bit 6-4 : FAMID
- * Bit 3-0 : PINID
- *
- * The newer Kinetis series uses the following SDID layout :
- * Bit 31-28 : FAMID
- * Bit 27-24 : SUBFAMID
- * Bit 23-20 : SERIESID
- * Bit 19-16 : SRAMSIZE
- * Bit 15-12 : REVID
- * Bit 6-4 : Reserved (0)
- * Bit 3-0 : PINID
- *
- * We assume that if bits 31-16 are 0 then it's an older
- * K-series MCU.
- */
-
-#define KINETIS_SOPT1_RAMSIZE_MASK 0x0000F000
-#define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
-
-#define KINETIS_SDID_K_SERIES_MASK 0x0000FFFF
-
-#define KINETIS_SDID_DIEID_MASK 0x00000F80
-
-#define KINETIS_SDID_DIEID_K22FN128 0x00000680 /* smaller pflash with FTFA */
-#define KINETIS_SDID_DIEID_K22FN256 0x00000A80
-#define KINETIS_SDID_DIEID_K22FN512 0x00000E80
-#define KINETIS_SDID_DIEID_K24FN256 0x00000700
-
-#define KINETIS_SDID_DIEID_K24FN1M 0x00000300 /* Detect Errata 7534 */
-
-/* We can't rely solely on the FAMID field to determine the MCU
- * type since some FAMID values identify multiple MCUs with
- * different flash sector sizes (K20 and K22 for instance).
- * Therefore we combine it with the DIEID bits which may possibly
- * break if Freescale bumps the DIEID for a particular MCU. */
-#define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
-#define KINETIS_K_SDID_K10_M50 0x00000000
-#define KINETIS_K_SDID_K10_M72 0x00000080
-#define KINETIS_K_SDID_K10_M100 0x00000100
-#define KINETIS_K_SDID_K10_M120 0x00000180
-#define KINETIS_K_SDID_K11 0x00000220
-#define KINETIS_K_SDID_K12 0x00000200
-#define KINETIS_K_SDID_K20_M50 0x00000010
-#define KINETIS_K_SDID_K20_M72 0x00000090
-#define KINETIS_K_SDID_K20_M100 0x00000110
-#define KINETIS_K_SDID_K20_M120 0x00000190
-#define KINETIS_K_SDID_K21_M50 0x00000230
-#define KINETIS_K_SDID_K21_M120 0x00000330
-#define KINETIS_K_SDID_K22_M50 0x00000210
-#define KINETIS_K_SDID_K22_M120 0x00000310
-#define KINETIS_K_SDID_K30_M72 0x000000A0
-#define KINETIS_K_SDID_K30_M100 0x00000120
-#define KINETIS_K_SDID_K40_M72 0x000000B0
-#define KINETIS_K_SDID_K40_M100 0x00000130
-#define KINETIS_K_SDID_K50_M72 0x000000E0
-#define KINETIS_K_SDID_K51_M72 0x000000F0
-#define KINETIS_K_SDID_K53 0x00000170
-#define KINETIS_K_SDID_K60_M100 0x00000140
-#define KINETIS_K_SDID_K60_M150 0x000001C0
-#define KINETIS_K_SDID_K70_M150 0x000001D0
-
-#define KINETIS_SDID_SERIESID_MASK 0x00F00000
-#define KINETIS_SDID_SERIESID_K 0x00000000
-#define KINETIS_SDID_SERIESID_KL 0x00100000
-#define KINETIS_SDID_SERIESID_KW 0x00500000
-#define KINETIS_SDID_SERIESID_KV 0x00600000
-
-#define KINETIS_SDID_SUBFAMID_MASK 0x0F000000
-#define KINETIS_SDID_SUBFAMID_KX0 0x00000000
-#define KINETIS_SDID_SUBFAMID_KX1 0x01000000
-#define KINETIS_SDID_SUBFAMID_KX2 0x02000000
-#define KINETIS_SDID_SUBFAMID_KX3 0x03000000
-#define KINETIS_SDID_SUBFAMID_KX4 0x04000000
-#define KINETIS_SDID_SUBFAMID_KX5 0x05000000
-#define KINETIS_SDID_SUBFAMID_KX6 0x06000000
-
-#define KINETIS_SDID_FAMILYID_MASK 0xF0000000
-#define KINETIS_SDID_FAMILYID_K0X 0x00000000
-#define KINETIS_SDID_FAMILYID_K1X 0x10000000
-#define KINETIS_SDID_FAMILYID_K2X 0x20000000
-#define KINETIS_SDID_FAMILYID_K3X 0x30000000
-#define KINETIS_SDID_FAMILYID_K4X 0x40000000
-#define KINETIS_SDID_FAMILYID_K6X 0x60000000
-#define KINETIS_SDID_FAMILYID_K7X 0x70000000
-
-struct kinetis_flash_bank {
- bool probed;
- uint32_t sector_size;
- uint32_t max_flash_prog_size;
- uint32_t protection_size;
- uint32_t prog_base; /* base address for FTFx operations */
- /* same as bank->base for pflash, differs for FlexNVM */
- uint32_t protection_block; /* number of first protection block in this bank */
-
- uint32_t sim_sdid;
- uint32_t sim_fcfg1;
- uint32_t sim_fcfg2;
-
- enum {
- FC_AUTO = 0,
- FC_PFLASH,
- FC_FLEX_NVM,
- FC_FLEX_RAM,
- } flash_class;
-
- enum {
- FS_PROGRAM_SECTOR = 1,
- FS_PROGRAM_LONGWORD = 2,
- FS_PROGRAM_PHRASE = 4, /* Unsupported */
- FS_INVALIDATE_CACHE = 8,
- } flash_support;
-};
-
-#define MDM_REG_STAT 0x00
-#define MDM_REG_CTRL 0x04
-#define MDM_REG_ID 0xfc
-
-#define MDM_STAT_FMEACK (1<<0)
-#define MDM_STAT_FREADY (1<<1)
-#define MDM_STAT_SYSSEC (1<<2)
-#define MDM_STAT_SYSRES (1<<3)
-#define MDM_STAT_FMEEN (1<<5)
-#define MDM_STAT_BACKDOOREN (1<<6)
-#define MDM_STAT_LPEN (1<<7)
-#define MDM_STAT_VLPEN (1<<8)
-#define MDM_STAT_LLSMODEXIT (1<<9)
-#define MDM_STAT_VLLSXMODEXIT (1<<10)
-#define MDM_STAT_CORE_HALTED (1<<16)
-#define MDM_STAT_CORE_SLEEPDEEP (1<<17)
-#define MDM_STAT_CORESLEEPING (1<<18)
-
-#define MEM_CTRL_FMEIP (1<<0)
-#define MEM_CTRL_DBG_DIS (1<<1)
-#define MEM_CTRL_DBG_REQ (1<<2)
-#define MEM_CTRL_SYS_RES_REQ (1<<3)
-#define MEM_CTRL_CORE_HOLD_RES (1<<4)
-#define MEM_CTRL_VLLSX_DBG_REQ (1<<5)
-#define MEM_CTRL_VLLSX_DBG_ACK (1<<6)
-#define MEM_CTRL_VLLSX_STAT_ACK (1<<7)
-
-#define MDM_ACCESS_TIMEOUT 3000 /* iterations */
-
-static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
-{
- int retval;
- LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
-
- retval = dap_queue_ap_write(dap_ap(dap, 1), reg, value);
- if (retval != ERROR_OK) {
- LOG_DEBUG("MDM: failed to queue a write request");
- return retval;
- }
-
- retval = dap_run(dap);
- if (retval != ERROR_OK) {
- LOG_DEBUG("MDM: dap_run failed");
- return retval;
- }
-
-
- return ERROR_OK;
-}
-
-static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
-{
- int retval;
-
- retval = dap_queue_ap_read(dap_ap(dap, 1), reg, result);
- if (retval != ERROR_OK) {
- LOG_DEBUG("MDM: failed to queue a read request");
- return retval;
- }
-
- retval = dap_run(dap);
- if (retval != ERROR_OK) {
- LOG_DEBUG("MDM: dap_run failed");
- return retval;
- }
-
- LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32, reg, *result);
- return ERROR_OK;
-}
-
-static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value)
-{
- uint32_t val;
- int retval;
- int timeout = MDM_ACCESS_TIMEOUT;
-
- do {
- retval = kinetis_mdm_read_register(dap, reg, &val);
- if (retval != ERROR_OK || (val & mask) == value)
- return retval;
-
- alive_sleep(1);
- } while (timeout--);
-
- LOG_DEBUG("MDM: polling timed out");
- return ERROR_FAIL;
-}
-
-/*
- * This function implements the procedure to mass erase the flash via
- * SWD/JTAG on Kinetis K and L series of devices as it is described in
- * AN4835 "Production Flash Programming Best Practices for Kinetis K-
- * and L-series MCUs" Section 4.2.1
- */
-COMMAND_HANDLER(kinetis_mdm_mass_erase)
-{
- struct target *target = get_current_target(CMD_CTX);
- struct cortex_m_common *cortex_m = target_to_cm(target);
- struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
-
- if (!dap) {
- LOG_ERROR("Cannot perform mass erase with a high-level adapter");
- return ERROR_FAIL;
- }
-
- int retval;
-
- /*
- * ... Power on the processor, or if power has already been
- * applied, assert the RESET pin to reset the processor. For
- * devices that do not have a RESET pin, write the System
- * Reset Request bit in the MDM-AP control register after
- * establishing communication...
- */
-
- /* assert SRST */
- if (jtag_get_reset_config() & RESET_HAS_SRST)
- adapter_assert_reset();
- else
- LOG_WARNING("Attempting mass erase without hardware reset. This is not reliable; "
- "it's recommended you connect SRST and use ``reset_config srst_only''.");
-
- retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, MEM_CTRL_SYS_RES_REQ);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * ... Read the MDM-AP status register until the Flash Ready bit sets...
- */
- retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
- MDM_STAT_FREADY | MDM_STAT_SYSRES,
- MDM_STAT_FREADY);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM : flash ready timeout");
- return retval;
- }
-
- /*
- * ... Write the MDM-AP control register to set the Flash Mass
- * Erase in Progress bit. This will start the mass erase
- * process...
- */
- retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL,
- MEM_CTRL_SYS_RES_REQ | MEM_CTRL_FMEIP);
- if (retval != ERROR_OK)
- return retval;
-
- /* As a sanity check make sure that device started mass erase procedure */
- retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
- MDM_STAT_FMEACK, MDM_STAT_FMEACK);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * ... Read the MDM-AP control register until the Flash Mass
- * Erase in Progress bit clears...
- */
- retval = kinetis_mdm_poll_register(dap, MDM_REG_CTRL,
- MEM_CTRL_FMEIP,
- 0);
- if (retval != ERROR_OK)
- return retval;
-
- /*
- * ... Negate the RESET signal or clear the System Reset Request
- * bit in the MDM-AP control register...
- */
- retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, 0);
- if (retval != ERROR_OK)
- return retval;
-
- if (jtag_get_reset_config() & RESET_HAS_SRST) {
- /* halt MCU otherwise it loops in hard fault - WDOG reset cycle */
- target->reset_halt = true;
- target->type->assert_reset(target);
- target->type->deassert_reset(target);
- }
-
- return ERROR_OK;
-}
-
-static const uint32_t kinetis_known_mdm_ids[] = {
- 0x001C0000, /* Kinetis-K Series */
- 0x001C0020, /* Kinetis-L/M/V/E Series */
-};
-
-/*
- * This function implements the procedure to connect to
- * SWD/JTAG on Kinetis K and L series of devices as it is described in
- * AN4835 "Production Flash Programming Best Practices for Kinetis K-
- * and L-series MCUs" Section 4.1.1
- */
-COMMAND_HANDLER(kinetis_check_flash_security_status)
-{
- struct target *target = get_current_target(CMD_CTX);
- struct cortex_m_common *cortex_m = target_to_cm(target);
- struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
-
- if (!dap) {
- LOG_WARNING("Cannot check flash security status with a high-level adapter");
- return ERROR_OK;
- }
-
- uint32_t val;
- int retval;
-
- /*
- * ... The MDM-AP ID register can be read to verify that the
- * connection is working correctly...
- */
- retval = kinetis_mdm_read_register(dap, MDM_REG_ID, &val);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM: failed to read ID register");
- goto fail;
- }
-
- bool found = false;
- for (size_t i = 0; i < ARRAY_SIZE(kinetis_known_mdm_ids); i++) {
- if (val == kinetis_known_mdm_ids[i]) {
- found = true;
- break;
- }
- }
-
- if (!found)
- LOG_WARNING("MDM: unknown ID %08" PRIX32, val);
-
- /*
- * ... Read the MDM-AP status register until the Flash Ready bit sets...
- */
- retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
- MDM_STAT_FREADY,
- MDM_STAT_FREADY);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM: flash ready timeout");
- goto fail;
- }
-
- /*
- * ... Read the System Security bit to determine if security is enabled.
- * If System Security = 0, then proceed. If System Security = 1, then
- * communication with the internals of the processor, including the
- * flash, will not be possible without issuing a mass erase command or
- * unsecuring the part through other means (backdoor key unlock)...
- */
- retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM: failed to read MDM_REG_STAT");
- goto fail;
- }
-
- if ((val & (MDM_STAT_SYSSEC | MDM_STAT_CORE_HALTED)) == MDM_STAT_SYSSEC) {
- LOG_WARNING("MDM: Secured MCU state detected however it may be a false alarm");
- LOG_WARNING("MDM: Halting target to detect secured state reliably");
-
- retval = target_halt(target);
- if (retval == ERROR_OK)
- retval = target_wait_state(target, TARGET_HALTED, 100);
-
- if (retval != ERROR_OK) {
- LOG_WARNING("MDM: Target not halted, trying reset halt");
- target->reset_halt = true;
- target->type->assert_reset(target);
- target->type->deassert_reset(target);
- }
-
- /* re-read status */
- retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
- if (retval != ERROR_OK) {
- LOG_ERROR("MDM: failed to read MDM_REG_STAT");
- goto fail;
- }
- }
-
- if (val & MDM_STAT_SYSSEC) {
- jtag_poll_set_enabled(false);
-
- LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
- LOG_WARNING("**** ****");
- LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that, ****");
- LOG_WARNING("**** with exception for very basic communication, JTAG/SWD ****");
- LOG_WARNING("**** interface will NOT work. In order to restore its ****");
- LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase' ****");
- LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD. ****");
- LOG_WARNING("**** ****");
- LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
- } else {
- LOG_INFO("MDM: Chip is unsecured. Continuing.");
- jtag_poll_set_enabled(true);
- }
-
- return ERROR_OK;
-
-fail:
- LOG_ERROR("MDM: Failed to check security status of the MCU. Cannot proceed further");
- jtag_poll_set_enabled(false);
- return retval;
-}
-
-FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
-{
- struct kinetis_flash_bank *bank_info;
-
- if (CMD_ARGC < 6)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- LOG_INFO("add flash_bank kinetis %s", bank->name);
-
- bank_info = malloc(sizeof(struct kinetis_flash_bank));
-
- memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
-
- bank->driver_priv = bank_info;
-
- return ERROR_OK;
-}
-
-/* Disable the watchdog on Kinetis devices */
-int kinetis_disable_wdog(struct target *target, uint32_t sim_sdid)
-{
- struct working_area *wdog_algorithm;
- struct armv7m_algorithm armv7m_info;
- uint16_t wdog;
- int retval;
-
- static const uint8_t kinetis_unlock_wdog_code[] = {
-#include "../../../contrib/loaders/watchdog/armv7m_kinetis_wdog.inc"
- };
-
- /* Decide whether the connected device needs watchdog disabling.
- * Disable for all Kx and KVx devices, return if it is a KLx */
-
- if ((sim_sdid & KINETIS_SDID_SERIESID_MASK) == KINETIS_SDID_SERIESID_KL)
- return ERROR_OK;
-
- /* The connected device requires watchdog disabling. */
- retval = target_read_u16(target, WDOG_STCTRH, &wdog);
- if (retval != ERROR_OK)
- return retval;
-
- if ((wdog & 0x1) == 0) {
- /* watchdog already disabled */
- return ERROR_OK;
- }
- LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%x)", wdog);
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- retval = target_alloc_working_area(target, sizeof(kinetis_unlock_wdog_code), &wdog_algorithm);
- if (retval != ERROR_OK)
- return retval;
-
- retval = target_write_buffer(target, wdog_algorithm->address,
- sizeof(kinetis_unlock_wdog_code), (uint8_t *)kinetis_unlock_wdog_code);
- if (retval != ERROR_OK) {
- target_free_working_area(target, wdog_algorithm);
- return retval;
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- retval = target_run_algorithm(target, 0, NULL, 0, NULL, wdog_algorithm->address,
- wdog_algorithm->address + (sizeof(kinetis_unlock_wdog_code) - 2),
- 10000, &armv7m_info);
-
- if (retval != ERROR_OK)
- LOG_ERROR("error executing kinetis wdog unlock algorithm");
-
- retval = target_read_u16(target, WDOG_STCTRH, &wdog);
- if (retval != ERROR_OK)
- return retval;
- LOG_INFO("WDOG_STCTRLH = 0x%x", wdog);
-
- target_free_working_area(target, wdog_algorithm);
-
- return retval;
-}
-
-COMMAND_HANDLER(kinetis_disable_wdog_handler)
-{
- int result;
- uint32_t sim_sdid;
- struct target *target = get_current_target(CMD_CTX);
-
- if (CMD_ARGC > 0)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- result = target_read_u32(target, SIM_SDID, &sim_sdid);
- if (result != ERROR_OK) {
- LOG_ERROR("Failed to read SIMSDID");
- return result;
- }
-
- result = kinetis_disable_wdog(target, sim_sdid);
- return result;
-}
-
-
-/* Kinetis Program-LongWord Microcodes */
-static const uint8_t kinetis_flash_write_code[] = {
- /* Params:
- * r0 - workarea buffer
- * r1 - target address
- * r2 - wordcount
- * Clobbered:
- * r4 - tmp
- * r5 - tmp
- * r6 - tmp
- * r7 - tmp
- */
-
- /* .L1: */
- /* for(register uint32_t i=0;i<wcount;i++){ */
- 0x04, 0x1C, /* mov r4, r0 */
- 0x00, 0x23, /* mov r3, #0 */
- /* .L2: */
- 0x0E, 0x1A, /* sub r6, r1, r0 */
- 0xA6, 0x19, /* add r6, r4, r6 */
- 0x93, 0x42, /* cmp r3, r2 */
- 0x16, 0xD0, /* beq .L9 */
- /* .L5: */
- /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
- 0x0B, 0x4D, /* ldr r5, .L10 */
- 0x2F, 0x78, /* ldrb r7, [r5] */
- 0x7F, 0xB2, /* sxtb r7, r7 */
- 0x00, 0x2F, /* cmp r7, #0 */
- 0xFA, 0xDA, /* bge .L5 */
- /* FTFx_FSTAT = FTFA_FSTAT_ACCERR_MASK|FTFA_FSTAT_FPVIOL_MASK|FTFA_FSTAT_RDCO */
- 0x70, 0x27, /* mov r7, #112 */
- 0x2F, 0x70, /* strb r7, [r5] */
- /* FTFx_FCCOB3 = faddr; */
- 0x09, 0x4F, /* ldr r7, .L10+4 */
- 0x3E, 0x60, /* str r6, [r7] */
- 0x06, 0x27, /* mov r7, #6 */
- /* FTFx_FCCOB0 = 0x06; */
- 0x08, 0x4E, /* ldr r6, .L10+8 */
- 0x37, 0x70, /* strb r7, [r6] */
- /* FTFx_FCCOB7 = *pLW; */
- 0x80, 0xCC, /* ldmia r4!, {r7} */
- 0x08, 0x4E, /* ldr r6, .L10+12 */
- 0x37, 0x60, /* str r7, [r6] */
- /* FTFx_FSTAT = FTFA_FSTAT_CCIF_MASK; */
- 0x80, 0x27, /* mov r7, #128 */
- 0x2F, 0x70, /* strb r7, [r5] */
- /* .L4: */
- /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
- 0x2E, 0x78, /* ldrb r6, [r5] */
- 0x77, 0xB2, /* sxtb r7, r6 */
- 0x00, 0x2F, /* cmp r7, #0 */
- 0xFB, 0xDA, /* bge .L4 */
- 0x01, 0x33, /* add r3, r3, #1 */
- 0xE4, 0xE7, /* b .L2 */
- /* .L9: */
- 0x00, 0xBE, /* bkpt #0 */
- /* .L10: */
- 0x00, 0x00, 0x02, 0x40, /* .word 1073872896 */
- 0x04, 0x00, 0x02, 0x40, /* .word 1073872900 */
- 0x07, 0x00, 0x02, 0x40, /* .word 1073872903 */
- 0x08, 0x00, 0x02, 0x40, /* .word 1073872904 */
-};
-
-/* Program LongWord Block Write */
-static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t wcount)
-{
- struct target *target = bank->target;
- uint32_t buffer_size = 2048; /* Default minimum value */
- struct working_area *write_algorithm;
- struct working_area *source;
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
- uint32_t address = kinfo->prog_base + offset;
- struct reg_param reg_params[3];
- struct armv7m_algorithm armv7m_info;
- int retval = ERROR_OK;
-
- /* Params:
- * r0 - workarea buffer
- * r1 - target address
- * r2 - wordcount
- * Clobbered:
- * r4 - tmp
- * r5 - tmp
- * r6 - tmp
- * r7 - tmp
- */
-
- /* Increase buffer_size if needed */
- if (buffer_size < (target->working_area_size/2))
- buffer_size = (target->working_area_size/2);
-
- LOG_INFO("Kinetis: FLASH Write ...");
-
- /* check code alignment */
- if (offset & 0x1) {
- LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
- }
-
- /* allocate working area with flash programming code */
- if (target_alloc_working_area(target, sizeof(kinetis_flash_write_code),
- &write_algorithm) != ERROR_OK) {
- LOG_WARNING("no working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
-
- retval = target_write_buffer(target, write_algorithm->address,
- sizeof(kinetis_flash_write_code), kinetis_flash_write_code);
- if (retval != ERROR_OK)
- return retval;
-
- /* memory buffer */
- while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
- buffer_size /= 4;
- if (buffer_size <= 256) {
- /* free working area, write algorithm already allocated */
- target_free_working_area(target, write_algorithm);
-
- LOG_WARNING("No large enough working area available, can't do block memory writes");
- return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
- }
- }
-
- armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
- armv7m_info.core_mode = ARM_MODE_THREAD;
-
- init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* *pLW (*buffer) */
- init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* faddr */
- init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* number of words to program */
-
- /* write code buffer and use Flash programming code within kinetis */
- /* Set breakpoint to 0 with time-out of 1000 ms */
- while (wcount > 0) {
- uint32_t thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
-
- retval = target_write_buffer(target, source->address, thisrun_count * 4, buffer);
- if (retval != ERROR_OK)
- break;
-
- buf_set_u32(reg_params[0].value, 0, 32, source->address);
- buf_set_u32(reg_params[1].value, 0, 32, address);
- buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
-
- retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
- write_algorithm->address, 0, 100000, &armv7m_info);
- if (retval != ERROR_OK) {
- LOG_ERROR("Error executing kinetis Flash programming algorithm");
- retval = ERROR_FLASH_OPERATION_FAILED;
- break;
- }
-
- buffer += thisrun_count * 4;
- address += thisrun_count * 4;
- wcount -= thisrun_count;
- }
-
- target_free_working_area(target, source);
- target_free_working_area(target, write_algorithm);
-
- destroy_reg_param(®_params[0]);
- destroy_reg_param(®_params[1]);
- destroy_reg_param(®_params[2]);
-
- return retval;
-}
-
-static int kinetis_protect(struct flash_bank *bank, int set, int first, int last)
-{
- LOG_WARNING("kinetis_protect not supported yet");
- /* FIXME: TODO */
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- return ERROR_FLASH_BANK_INVALID;
-}
-
-static int kinetis_protect_check(struct flash_bank *bank)
-{
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
- int result;
- int i, b;
- uint32_t fprot, psec;
-
- if (bank->target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- if (kinfo->flash_class == FC_PFLASH) {
- uint8_t buffer[4];
-
- /* read protection register */
- result = target_read_memory(bank->target, FTFx_FPROT3, 1, 4, buffer);
-
- if (result != ERROR_OK)
- return result;
-
- fprot = target_buffer_get_u32(bank->target, buffer);
- /* Every bit protects 1/32 of the full flash (not necessarily just this bank) */
-
- } else if (kinfo->flash_class == FC_FLEX_NVM) {
- uint8_t fdprot;
-
- /* read protection register */
- result = target_read_memory(bank->target, FTFx_FDPROT, 1, 1, &fdprot);
-
- if (result != ERROR_OK)
- return result;
-
- fprot = fdprot;
-
- } else {
- LOG_ERROR("Protection checks for FlexRAM not supported");
- return ERROR_FLASH_BANK_INVALID;
- }
-
- b = kinfo->protection_block;
- for (psec = 0, i = 0; i < bank->num_sectors; i++) {
- if ((fprot >> b) & 1)
- bank->sectors[i].is_protected = 0;
- else
- bank->sectors[i].is_protected = 1;
-
- psec += bank->sectors[i].size;
-
- if (psec >= kinfo->protection_size) {
- psec = 0;
- b++;
- }
- }
-
- return ERROR_OK;
-}
-
-static int kinetis_ftfx_command(struct target *target, uint8_t fcmd, uint32_t faddr,
- uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
- uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
- uint8_t *ftfx_fstat)
-{
- uint8_t command[12] = {faddr & 0xff, (faddr >> 8) & 0xff, (faddr >> 16) & 0xff, fcmd,
- fccob7, fccob6, fccob5, fccob4,
- fccobb, fccoba, fccob9, fccob8};
- int result, i;
- uint8_t buffer;
-
- /* wait for done */
- for (i = 0; i < 50; i++) {
- result =
- target_read_memory(target, FTFx_FSTAT, 1, 1, &buffer);
-
- if (result != ERROR_OK)
- return result;
-
- if (buffer & 0x80)
- break;
-
- buffer = 0x00;
- }
-
- if (buffer != 0x80) {
- /* reset error flags */
- buffer = 0x30;
- result =
- target_write_memory(target, FTFx_FSTAT, 1, 1, &buffer);
- if (result != ERROR_OK)
- return result;
- }
-
- result = target_write_memory(target, FTFx_FCCOB3, 4, 3, command);
-
- if (result != ERROR_OK)
- return result;
-
- /* start command */
- buffer = 0x80;
- result = target_write_memory(target, FTFx_FSTAT, 1, 1, &buffer);
- if (result != ERROR_OK)
- return result;
-
- /* wait for done */
- for (i = 0; i < 240; i++) { /* Need longtime for "Mass Erase" Command Nemui Changed */
- result =
- target_read_memory(target, FTFx_FSTAT, 1, 1, ftfx_fstat);
-
- if (result != ERROR_OK)
- return result;
-
- if (*ftfx_fstat & 0x80)
- break;
- }
-
- if ((*ftfx_fstat & 0xf0) != 0x80) {
- LOG_ERROR
- ("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
- *ftfx_fstat, command[3], command[2], command[1], command[0],
- command[7], command[6], command[5], command[4],
- command[11], command[10], command[9], command[8]);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-
-static int kinetis_check_run_mode(struct target *target)
-{
- int result, i;
- uint8_t pmctrl, pmstat;
-
- if (target->state != TARGET_HALTED) {
- LOG_ERROR("Target not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- result = target_read_u8(target, SMC_PMSTAT, &pmstat);
- if (result != ERROR_OK)
- return result;
-
- if (pmstat == PM_STAT_RUN)
- return ERROR_OK;
-
- if (pmstat == PM_STAT_VLPR) {
- /* It is safe to switch from VLPR to RUN mode without changing clock */
- LOG_INFO("Switching from VLPR to RUN mode.");
- pmctrl = PM_CTRL_RUNM_RUN;
- result = target_write_u8(target, SMC_PMCTRL, pmctrl);
- if (result != ERROR_OK)
- return result;
-
- for (i = 100; i; i--) {
- result = target_read_u8(target, SMC_PMSTAT, &pmstat);
- if (result != ERROR_OK)
- return result;
-
- if (pmstat == PM_STAT_RUN)
- return ERROR_OK;
- }
- }
-
- LOG_ERROR("Flash operation not possible in current run mode: SMC_PMSTAT: 0x%x", pmstat);
- LOG_ERROR("Issue a 'reset init' command.");
- return ERROR_TARGET_NOT_HALTED;
-}
-
-
-static void kinetis_invalidate_flash_cache(struct flash_bank *bank)
-{
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
- uint8_t pfb01cr_byte2 = 0xf0;
-
- if (!(kinfo->flash_support & FS_INVALIDATE_CACHE))
- return;
-
- target_write_memory(bank->target, FMC_PFB01CR + 2, 1, 1, &pfb01cr_byte2);
- return;
-}
-
-
-static int kinetis_erase(struct flash_bank *bank, int first, int last)
-{
- int result, i;
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
-
- result = kinetis_check_run_mode(bank->target);
- if (result != ERROR_OK)
- return result;
-
- if ((first > bank->num_sectors) || (last > bank->num_sectors))
- return ERROR_FLASH_OPERATION_FAILED;
-
- /*
- * FIXME: TODO: use the 'Erase Flash Block' command if the
- * requested erase is PFlash or NVM and encompasses the entire
- * block. Should be quicker.
- */
- for (i = first; i <= last; i++) {
- uint8_t ftfx_fstat;
- /* set command and sector address */
- result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTERASE, kinfo->prog_base + bank->sectors[i].offset,
- 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
-
- if (result != ERROR_OK) {
- LOG_WARNING("erase sector %d failed", i);
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- bank->sectors[i].is_erased = 1;
- }
-
- kinetis_invalidate_flash_cache(bank);
-
- if (first == 0) {
- LOG_WARNING
- ("flash configuration field erased, please reset the device");
- }
-
- return ERROR_OK;
-}
-
-static int kinetis_make_ram_ready(struct target *target)
-{
- int result;
- uint8_t ftfx_fstat;
- uint8_t ftfx_fcnfg;
-
- /* check if ram ready */
- result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg);
- if (result != ERROR_OK)
- return result;
-
- if (ftfx_fcnfg & (1 << 1))
- return ERROR_OK; /* ram ready */
-
- /* make flex ram available */
- result = kinetis_ftfx_command(target, FTFx_CMD_SETFLEXRAM, 0x00ff0000,
- 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
- if (result != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
-
- /* check again */
- result = target_read_memory(target, FTFx_FCNFG, 1, 1, &ftfx_fcnfg);
- if (result != ERROR_OK)
- return result;
-
- if (ftfx_fcnfg & (1 << 1))
- return ERROR_OK; /* ram ready */
-
- return ERROR_FLASH_OPERATION_FAILED;
-}
-
-static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
- uint32_t offset, uint32_t count)
-{
- unsigned int i, result, fallback = 0;
- uint32_t wc;
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
- uint8_t *new_buffer = NULL;
-
- result = kinetis_check_run_mode(bank->target);
- if (result != ERROR_OK)
- return result;
-
- if (!(kinfo->flash_support & FS_PROGRAM_SECTOR)) {
- /* fallback to longword write */
- fallback = 1;
- LOG_WARNING("This device supports Program Longword execution only.");
- } else {
- result = kinetis_make_ram_ready(bank->target);
- if (result != ERROR_OK) {
- fallback = 1;
- LOG_WARNING("FlexRAM not ready, fallback to slow longword write.");
- }
- }
-
- LOG_DEBUG("flash write @08%" PRIX32, offset);
-
-
- /* program section command */
- if (fallback == 0) {
- /*
- * Kinetis uses different terms for the granularity of
- * sector writes, e.g. "phrase" or "128 bits". We use
- * the generic term "chunk". The largest possible
- * Kinetis "chunk" is 16 bytes (128 bits).
- */
- unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
- unsigned prog_size_bytes = kinfo->max_flash_prog_size;
- for (i = 0; i < count; i += prog_size_bytes) {
- uint8_t residual_buffer[16];
- uint8_t ftfx_fstat;
- uint32_t section_count = prog_size_bytes / prog_section_chunk_bytes;
- uint32_t residual_wc = 0;
-
- /*
- * Assume the word count covers an entire
- * sector.
- */
- wc = prog_size_bytes / 4;
-
- /*
- * If bytes to be programmed are less than the
- * full sector, then determine the number of
- * full-words to program, and put together the
- * residual buffer so that a full "section"
- * may always be programmed.
- */
- if ((count - i) < prog_size_bytes) {
- /* number of bytes to program beyond full section */
- unsigned residual_bc = (count-i) % prog_section_chunk_bytes;
-
- /* number of complete words to copy directly from buffer */
- wc = (count - i - residual_bc) / 4;
-
- /* number of total sections to write, including residual */
- section_count = DIV_ROUND_UP((count-i), prog_section_chunk_bytes);
-
- /* any residual bytes delivers a whole residual section */
- residual_wc = (residual_bc ? prog_section_chunk_bytes : 0)/4;
-
- /* clear residual buffer then populate residual bytes */
- (void) memset(residual_buffer, 0xff, prog_section_chunk_bytes);
- (void) memcpy(residual_buffer, &buffer[i+4*wc], residual_bc);
- }
-
- LOG_DEBUG("write section @ %08" PRIX32 " with length %" PRIu32 " bytes",
- offset + i, (uint32_t)wc*4);
-
- /* write data to flexram as whole-words */
- result = target_write_memory(bank->target, FLEXRAM, 4, wc,
- buffer + i);
-
- if (result != ERROR_OK) {
- LOG_ERROR("target_write_memory failed");
- return result;
- }
-
- /* write the residual words to the flexram */
- if (residual_wc) {
- result = target_write_memory(bank->target,
- FLEXRAM+4*wc,
- 4, residual_wc,
- residual_buffer);
-
- if (result != ERROR_OK) {
- LOG_ERROR("target_write_memory failed");
- return result;
- }
- }
-
- /* execute section-write command */
- result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTWRITE, kinfo->prog_base + offset + i,
- section_count>>8, section_count, 0, 0,
- 0, 0, 0, 0, &ftfx_fstat);
-
- if (result != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
- /* program longword command, not supported in "SF3" devices */
- else if (kinfo->flash_support & FS_PROGRAM_LONGWORD) {
- if (count & 0x3) {
- uint32_t old_count = count;
- count = (old_count | 3) + 1;
- new_buffer = malloc(count);
- if (new_buffer == NULL) {
- LOG_ERROR("odd number of bytes to write and no memory "
- "for padding buffer");
- return ERROR_FAIL;
- }
- LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " "
- "and padding with 0xff", old_count, count);
- memset(new_buffer, 0xff, count);
- buffer = memcpy(new_buffer, buffer, old_count);
- }
-
- uint32_t words_remaining = count / 4;
-
- kinetis_disable_wdog(bank->target, kinfo->sim_sdid);
-
- /* try using a block write */
- int retval = kinetis_write_block(bank, buffer, offset, words_remaining);
-
- if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
- /* if block write failed (no sufficient working area),
- * we use normal (slow) single word accesses */
- LOG_WARNING("couldn't use block writes, falling back to single "
- "memory accesses");
-
- for (i = 0; i < count; i += 4) {
- uint8_t ftfx_fstat;
-
- LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i));
-
- uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
- memcpy(padding, buffer + i, MIN(4, count-i));
-
- result = kinetis_ftfx_command(bank->target, FTFx_CMD_LWORDPROG, kinfo->prog_base + offset + i,
- padding[3], padding[2], padding[1], padding[0],
- 0, 0, 0, 0, &ftfx_fstat);
-
- if (result != ERROR_OK)
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
- } else {
- LOG_ERROR("Flash write strategy not implemented");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- kinetis_invalidate_flash_cache(bank);
- return ERROR_OK;
-}
-
-static int kinetis_probe(struct flash_bank *bank)
-{
- int result, i;
- uint32_t offset = 0;
- uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg1_depart;
- uint8_t fcfg2_maxaddr0, fcfg2_pflsh, fcfg2_maxaddr1;
- uint32_t nvm_size = 0, pf_size = 0, df_size = 0, ee_size = 0;
- unsigned num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0, first_nvm_bank = 0,
- pflash_sector_size_bytes = 0, nvm_sector_size_bytes = 0;
- struct target *target = bank->target;
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
-
- kinfo->probed = false;
-
- result = target_read_u32(target, SIM_SDID, &kinfo->sim_sdid);
- if (result != ERROR_OK)
- return result;
-
- if ((kinfo->sim_sdid & (~KINETIS_SDID_K_SERIES_MASK)) == 0) {
- /* older K-series MCU */
- uint32_t mcu_type = kinfo->sim_sdid & KINETIS_K_SDID_TYPE_MASK;
-
- switch (mcu_type) {
- case KINETIS_K_SDID_K10_M50:
- case KINETIS_K_SDID_K20_M50:
- /* 1kB sectors */
- pflash_sector_size_bytes = 1<<10;
- nvm_sector_size_bytes = 1<<10;
- num_blocks = 2;
- kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- break;
- case KINETIS_K_SDID_K10_M72:
- case KINETIS_K_SDID_K20_M72:
- case KINETIS_K_SDID_K30_M72:
- case KINETIS_K_SDID_K30_M100:
- case KINETIS_K_SDID_K40_M72:
- case KINETIS_K_SDID_K40_M100:
- case KINETIS_K_SDID_K50_M72:
- /* 2kB sectors, 1kB FlexNVM sectors */
- pflash_sector_size_bytes = 2<<10;
- nvm_sector_size_bytes = 1<<10;
- num_blocks = 2;
- kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- kinfo->max_flash_prog_size = 1<<10;
- break;
- case KINETIS_K_SDID_K10_M100:
- case KINETIS_K_SDID_K20_M100:
- case KINETIS_K_SDID_K11:
- case KINETIS_K_SDID_K12:
- case KINETIS_K_SDID_K21_M50:
- case KINETIS_K_SDID_K22_M50:
- case KINETIS_K_SDID_K51_M72:
- case KINETIS_K_SDID_K53:
- case KINETIS_K_SDID_K60_M100:
- /* 2kB sectors */
- pflash_sector_size_bytes = 2<<10;
- nvm_sector_size_bytes = 2<<10;
- num_blocks = 2;
- kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- break;
- case KINETIS_K_SDID_K21_M120:
- case KINETIS_K_SDID_K22_M120:
- /* 4kB sectors (MK21FN1M0, MK21FX512, MK22FN1M0, MK22FX512) */
- pflash_sector_size_bytes = 4<<10;
- kinfo->max_flash_prog_size = 1<<10;
- nvm_sector_size_bytes = 4<<10;
- num_blocks = 2;
- kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- break;
- case KINETIS_K_SDID_K10_M120:
- case KINETIS_K_SDID_K20_M120:
- case KINETIS_K_SDID_K60_M150:
- case KINETIS_K_SDID_K70_M150:
- /* 4kB sectors */
- pflash_sector_size_bytes = 4<<10;
- nvm_sector_size_bytes = 4<<10;
- num_blocks = 4;
- kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- break;
- default:
- LOG_ERROR("Unsupported K-family FAMID");
- }
- } else {
- /* Newer K-series or KL series MCU */
- switch (kinfo->sim_sdid & KINETIS_SDID_SERIESID_MASK) {
- case KINETIS_SDID_SERIESID_K:
- switch (kinfo->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK)) {
- case KINETIS_SDID_FAMILYID_K0X | KINETIS_SDID_SUBFAMID_KX2:
- /* K02FN64, K02FN128: FTFA, 2kB sectors */
- pflash_sector_size_bytes = 2<<10;
- num_blocks = 1;
- kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
- break;
-
- case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX2: {
- /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
- uint32_t sopt1;
- result = target_read_u32(target, SIM_SOPT1, &sopt1);
- if (result != ERROR_OK)
- return result;
-
- if (((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN1M) &&
- ((sopt1 & KINETIS_SOPT1_RAMSIZE_MASK) == KINETIS_SOPT1_RAMSIZE_K24FN1M)) {
- /* MK24FN1M */
- pflash_sector_size_bytes = 4<<10;
- num_blocks = 2;
- kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- kinfo->max_flash_prog_size = 1<<10;
- break;
- }
- if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN128
- || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN256
- || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN512) {
- /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */
- pflash_sector_size_bytes = 2<<10;
- /* autodetect 1 or 2 blocks */
- kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
- break;
- }
- LOG_ERROR("Unsupported Kinetis K22 DIEID");
- break;
- }
- case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX4:
- pflash_sector_size_bytes = 4<<10;
- if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN256) {
- /* K24FN256 - smaller pflash with FTFA */
- num_blocks = 1;
- kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
- break;
- }
- /* K24FN1M without errata 7534 */
- num_blocks = 2;
- kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- kinfo->max_flash_prog_size = 1<<10;
- break;
-
- case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX3:
- case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX1: /* errata 7534 - should be K63 */
- /* K63FN1M0 */
- case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX4:
- case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX2: /* errata 7534 - should be K64 */
- /* K64FN1M0, K64FX512 */
- pflash_sector_size_bytes = 4<<10;
- nvm_sector_size_bytes = 4<<10;
- kinfo->max_flash_prog_size = 1<<10;
- num_blocks = 2;
- kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- break;
-
- case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX6:
- /* K26FN2M0 */
- case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX6:
- /* K66FN2M0, K66FX1M0 */
- pflash_sector_size_bytes = 4<<10;
- nvm_sector_size_bytes = 4<<10;
- kinfo->max_flash_prog_size = 1<<10;
- num_blocks = 4;
- kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR | FS_INVALIDATE_CACHE;
- break;
- default:
- LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
- }
- break;
-
- case KINETIS_SDID_SERIESID_KL:
- /* KL-series */
- pflash_sector_size_bytes = 1<<10;
- nvm_sector_size_bytes = 1<<10;
- /* autodetect 1 or 2 blocks */
- kinfo->flash_support = FS_PROGRAM_LONGWORD;
- break;
-
- case KINETIS_SDID_SERIESID_KV:
- /* KV-series */
- switch (kinfo->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK)) {
- case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX0:
- /* KV10: FTFA, 1kB sectors */
- pflash_sector_size_bytes = 1<<10;
- num_blocks = 1;
- kinfo->flash_support = FS_PROGRAM_LONGWORD;
- break;
-
- case KINETIS_SDID_FAMILYID_K1X | KINETIS_SDID_SUBFAMID_KX1:
- /* KV11: FTFA, 2kB sectors */
- pflash_sector_size_bytes = 2<<10;
- num_blocks = 1;
- kinfo->flash_support = FS_PROGRAM_LONGWORD;
- break;
-
- case KINETIS_SDID_FAMILYID_K3X | KINETIS_SDID_SUBFAMID_KX0:
- /* KV30: FTFA, 2kB sectors, 1 block */
- case KINETIS_SDID_FAMILYID_K3X | KINETIS_SDID_SUBFAMID_KX1:
- /* KV31: FTFA, 2kB sectors, 2 blocks */
- pflash_sector_size_bytes = 2<<10;
- /* autodetect 1 or 2 blocks */
- kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
- break;
-
- case KINETIS_SDID_FAMILYID_K4X | KINETIS_SDID_SUBFAMID_KX2:
- case KINETIS_SDID_FAMILYID_K4X | KINETIS_SDID_SUBFAMID_KX4:
- case KINETIS_SDID_FAMILYID_K4X | KINETIS_SDID_SUBFAMID_KX6:
- /* KV4x: FTFA, 4kB sectors */
- pflash_sector_size_bytes = 4<<10;
- num_blocks = 1;
- kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_INVALIDATE_CACHE;
- break;
-
- default:
- LOG_ERROR("Unsupported KV FAMILYID SUBFAMID");
- }
- break;
-
- default:
- LOG_ERROR("Unsupported K-series");
- }
- }
-
- if (pflash_sector_size_bytes == 0) {
- LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32, kinfo->sim_sdid);
- return ERROR_FLASH_OPER_UNSUPPORTED;
- }
-
- result = target_read_u32(target, SIM_FCFG1, &kinfo->sim_fcfg1);
- if (result != ERROR_OK)
- return result;
-
- result = target_read_u32(target, SIM_FCFG2, &kinfo->sim_fcfg2);
- if (result != ERROR_OK)
- return result;
-
- LOG_DEBUG("SDID: 0x%08" PRIX32 " FCFG1: 0x%08" PRIX32 " FCFG2: 0x%08" PRIX32, kinfo->sim_sdid,
- kinfo->sim_fcfg1, kinfo->sim_fcfg2);
-
- fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
- fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
- fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
- fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f);
-
- fcfg2_pflsh = (uint8_t)((kinfo->sim_fcfg2 >> 23) & 0x01);
- fcfg2_maxaddr0 = (uint8_t)((kinfo->sim_fcfg2 >> 24) & 0x7f);
- fcfg2_maxaddr1 = (uint8_t)((kinfo->sim_fcfg2 >> 16) & 0x7f);
-
- if (num_blocks == 0)
- num_blocks = fcfg2_maxaddr1 ? 2 : 1;
- else if (fcfg2_maxaddr1 == 0 && num_blocks >= 2) {
- num_blocks = 1;
- LOG_WARNING("MAXADDR1 is zero, number of flash banks adjusted to 1");
- } else if (fcfg2_maxaddr1 != 0 && num_blocks == 1) {
- num_blocks = 2;
- LOG_WARNING("MAXADDR1 is non zero, number of flash banks adjusted to 2");
- }
-
- /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
- if (!fcfg2_pflsh) {
- switch (fcfg1_nvmsize) {
- case 0x03:
- case 0x05:
- case 0x07:
- case 0x09:
- case 0x0b:
- nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
- break;
- case 0x0f:
- if (pflash_sector_size_bytes >= 4<<10)
- nvm_size = 512<<10;
- else
- /* K20_100 */
- nvm_size = 256<<10;
- break;
- default:
- nvm_size = 0;
- break;
- }
-
- switch (fcfg1_eesize) {
- case 0x00:
- case 0x01:
- case 0x02:
- case 0x03:
- case 0x04:
- case 0x05:
- case 0x06:
- case 0x07:
- case 0x08:
- case 0x09:
- ee_size = (16 << (10 - fcfg1_eesize));
- break;
- default:
- ee_size = 0;
- break;
- }
-
- switch (fcfg1_depart) {
- case 0x01:
- case 0x02:
- case 0x03:
- case 0x04:
- case 0x05:
- case 0x06:
- df_size = nvm_size - (4096 << fcfg1_depart);
- break;
- case 0x08:
- df_size = 0;
- break;
- case 0x09:
- case 0x0a:
- case 0x0b:
- case 0x0c:
- case 0x0d:
- df_size = 4096 << (fcfg1_depart & 0x7);
- break;
- default:
- df_size = nvm_size;
- break;
- }
- }
-
- switch (fcfg1_pfsize) {
- case 0x03:
- case 0x05:
- case 0x07:
- case 0x09:
- case 0x0b:
- case 0x0d:
- pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
- break;
- case 0x0f:
- /* a peculiar case: Freescale states different sizes for 0xf
- * K02P64M100SFARM 128 KB ... duplicate of code 0x7
- * K22P121M120SF8RM 256 KB ... duplicate of code 0x9
- * K22P121M120SF7RM 512 KB ... duplicate of code 0xb
- * K22P100M120SF5RM 1024 KB ... duplicate of code 0xd
- * K26P169M180SF5RM 2048 KB ... the only unique value
- * fcfg2_maxaddr0 seems to be the only clue to pf_size
- * Checking fcfg2_maxaddr0 later in this routine is pointless then
- */
- if (fcfg2_pflsh)
- pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks;
- else
- pf_size = ((uint32_t)fcfg2_maxaddr0 << 13) * num_blocks / 2;
- if (pf_size != 2048<<10)
- LOG_WARNING("SIM_FCFG1 PFSIZE = 0xf: please check if pflash is %u KB", pf_size>>10);
-
- break;
- default:
- pf_size = 0;
- break;
- }
-
- LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d",
- nvm_size, pf_size, ee_size, fcfg2_pflsh);
-
- num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
- first_nvm_bank = num_pflash_blocks;
- num_nvm_blocks = num_blocks - num_pflash_blocks;
-
- LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
- num_blocks, num_pflash_blocks, num_nvm_blocks);
-
- LOG_INFO("Probing flash info for bank %d", bank->bank_number);
-
- if ((unsigned)bank->bank_number < num_pflash_blocks) {
- /* pflash, banks start at address zero */
- kinfo->flash_class = FC_PFLASH;
- bank->size = (pf_size / num_pflash_blocks);
- bank->base = 0x00000000 + bank->size * bank->bank_number;
- kinfo->prog_base = bank->base;
- kinfo->sector_size = pflash_sector_size_bytes;
- /* pflash is divided into 32 protection areas for
- * parts with more than 32K of PFlash. For parts with
- * less the protection unit is set to 1024 bytes */
- kinfo->protection_size = MAX(pf_size / 32, 1024);
- kinfo->protection_block = (32 / num_pflash_blocks) * bank->bank_number;
-
- } else if ((unsigned)bank->bank_number < num_blocks) {
- /* nvm, banks start at address 0x10000000 */
- unsigned nvm_ord = bank->bank_number - first_nvm_bank;
- uint32_t limit;
-
- kinfo->flash_class = FC_FLEX_NVM;
- bank->size = (nvm_size / num_nvm_blocks);
- bank->base = 0x10000000 + bank->size * nvm_ord;
- kinfo->prog_base = 0x00800000 + bank->size * nvm_ord;
- kinfo->sector_size = nvm_sector_size_bytes;
- if (df_size == 0) {
- kinfo->protection_size = 0;
- } else {
- for (i = df_size; ~i & 1; i >>= 1)
- ;
- if (i == 1)
- kinfo->protection_size = df_size / 8; /* data flash size = 2^^n */
- else
- kinfo->protection_size = nvm_size / 8; /* TODO: verify on SF1, not documented in RM */
- }
- kinfo->protection_block = (8 / num_nvm_blocks) * nvm_ord;
-
- /* EEPROM backup part of FlexNVM is not accessible, use df_size as a limit */
- if (df_size > bank->size * nvm_ord)
- limit = df_size - bank->size * nvm_ord;
- else
- limit = 0;
-
- if (bank->size > limit) {
- bank->size = limit;
- LOG_DEBUG("FlexNVM bank %d limited to 0x%08" PRIx32 " due to active EEPROM backup",
- bank->bank_number, limit);
- }
-
- } else if ((unsigned)bank->bank_number == num_blocks) {
- LOG_ERROR("FlexRAM support not yet implemented");
- return ERROR_FLASH_OPER_UNSUPPORTED;
- } else {
- LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
- bank->bank_number, num_blocks);
- return ERROR_FLASH_BANK_INVALID;
- }
-
- if (bank->bank_number == 0 && ((uint32_t)fcfg2_maxaddr0 << 13) != bank->size)
- LOG_WARNING("MAXADDR0 0x%02" PRIx8 " check failed,"
- " please report to OpenOCD mailing list", fcfg2_maxaddr0);
- if (fcfg2_pflsh) {
- if (bank->bank_number == 1 && ((uint32_t)fcfg2_maxaddr1 << 13) != bank->size)
- LOG_WARNING("MAXADDR1 0x%02" PRIx8 " check failed,"
- " please report to OpenOCD mailing list", fcfg2_maxaddr1);
- } else {
- if ((unsigned)bank->bank_number == first_nvm_bank
- && ((uint32_t)fcfg2_maxaddr1 << 13) != df_size)
- LOG_WARNING("FlexNVM MAXADDR1 0x%02" PRIx8 " check failed,"
- " please report to OpenOCD mailing list", fcfg2_maxaddr1);
- }
-
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
-
- if (kinfo->sector_size == 0) {
- LOG_ERROR("Unknown sector size for bank %d", bank->bank_number);
- return ERROR_FLASH_BANK_INVALID;
- }
-
- if (kinfo->flash_support & FS_PROGRAM_SECTOR
- && kinfo->max_flash_prog_size == 0) {
- kinfo->max_flash_prog_size = kinfo->sector_size;
- /* Program section size is equal to sector size by default */
- }
-
- bank->num_sectors = bank->size / kinfo->sector_size;
-
- if (bank->num_sectors > 0) {
- /* FlexNVM bank can be used for EEPROM backup therefore zero sized */
- bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
-
- for (i = 0; i < bank->num_sectors; i++) {
- bank->sectors[i].offset = offset;
- bank->sectors[i].size = kinfo->sector_size;
- offset += kinfo->sector_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
- }
- }
-
- kinfo->probed = true;
-
- return ERROR_OK;
-}
-
-static int kinetis_auto_probe(struct flash_bank *bank)
-{
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
-
- if (kinfo && kinfo->probed)
- return ERROR_OK;
-
- return kinetis_probe(bank);
-}
-
-static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
-{
- const char *bank_class_names[] = {
- "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
- };
-
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
-
- (void) snprintf(buf, buf_size,
- "%s driver for %s flash bank %s at 0x%8.8" PRIx32 "",
- bank->driver->name, bank_class_names[kinfo->flash_class],
- bank->name, bank->base);
-
- return ERROR_OK;
-}
-
-static int kinetis_blank_check(struct flash_bank *bank)
-{
- struct kinetis_flash_bank *kinfo = bank->driver_priv;
- int result;
-
- /* suprisingly blank check does not work in VLPR and HSRUN modes */
- result = kinetis_check_run_mode(bank->target);
- if (result != ERROR_OK)
- return result;
-
- if (kinfo->flash_class == FC_PFLASH || kinfo->flash_class == FC_FLEX_NVM) {
- bool block_dirty = false;
- uint8_t ftfx_fstat;
-
- if (kinfo->flash_class == FC_FLEX_NVM) {
- uint8_t fcfg1_depart = (uint8_t)((kinfo->sim_fcfg1 >> 8) & 0x0f);
- /* block operation cannot be used on FlexNVM when EEPROM backup partition is set */
- if (fcfg1_depart != 0xf && fcfg1_depart != 0)
- block_dirty = true;
- }
-
- if (!block_dirty) {
- /* check if whole bank is blank */
- result = kinetis_ftfx_command(bank->target, FTFx_CMD_BLOCKSTAT, kinfo->prog_base,
- 0, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
-
- if (result != ERROR_OK || (ftfx_fstat & 0x01))
- block_dirty = true;
- }
-
- if (block_dirty) {
- /* the whole bank is not erased, check sector-by-sector */
- int i;
- for (i = 0; i < bank->num_sectors; i++) {
- /* normal margin */
- result = kinetis_ftfx_command(bank->target, FTFx_CMD_SECTSTAT,
- kinfo->prog_base + bank->sectors[i].offset,
- 1, 0, 0, 0, 0, 0, 0, 0, &ftfx_fstat);
-
- if (result == ERROR_OK) {
- bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
- } else {
- LOG_DEBUG("Ignoring errored PFlash sector blank-check");
- bank->sectors[i].is_erased = -1;
- }
- }
- } else {
- /* the whole bank is erased, update all sectors */
- int i;
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
- }
- } else {
- LOG_WARNING("kinetis_blank_check not supported yet for FlexRAM");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- return ERROR_OK;
-}
-
-
-COMMAND_HANDLER(kinetis_nvm_partition)
-{
- int result, i;
- unsigned long par, log2 = 0, ee1 = 0, ee2 = 0;
- enum { SHOW_INFO, DF_SIZE, EEBKP_SIZE } sz_type = SHOW_INFO;
- bool enable;
- uint8_t ftfx_fstat;
- uint8_t load_flex_ram = 1;
- uint8_t ee_size_code = 0x3f;
- uint8_t flex_nvm_partition_code = 0;
- uint8_t ee_split = 3;
- struct target *target = get_current_target(CMD_CTX);
- struct flash_bank *bank;
- struct kinetis_flash_bank *kinfo;
- uint32_t sim_fcfg1;
-
- if (CMD_ARGC >= 2) {
- if (strcmp(CMD_ARGV[0], "dataflash") == 0)
- sz_type = DF_SIZE;
- else if (strcmp(CMD_ARGV[0], "eebkp") == 0)
- sz_type = EEBKP_SIZE;
-
- par = strtoul(CMD_ARGV[1], NULL, 10);
- while (par >> (log2 + 3))
- log2++;
- }
- switch (sz_type) {
- case SHOW_INFO:
- result = target_read_u32(target, SIM_FCFG1, &sim_fcfg1);
- if (result != ERROR_OK)
- return result;
-
- flex_nvm_partition_code = (uint8_t)((sim_fcfg1 >> 8) & 0x0f);
- switch (flex_nvm_partition_code) {
- case 0:
- command_print(CMD_CTX, "No EEPROM backup, data flash only");
- break;
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- command_print(CMD_CTX, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
- break;
- case 8:
- command_print(CMD_CTX, "No data flash, EEPROM backup only");
- break;
- case 0x9:
- case 0xA:
- case 0xB:
- case 0xC:
- case 0xD:
- case 0xE:
- command_print(CMD_CTX, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
- break;
- case 0xf:
- command_print(CMD_CTX, "No EEPROM backup, data flash only (DEPART not set)");
- break;
- default:
- command_print(CMD_CTX, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
- }
- return ERROR_OK;
-
- case DF_SIZE:
- flex_nvm_partition_code = 0x8 | log2;
- break;
-
- case EEBKP_SIZE:
- flex_nvm_partition_code = log2;
- break;
- }
-
- if (CMD_ARGC == 3)
- ee1 = ee2 = strtoul(CMD_ARGV[2], NULL, 10) / 2;
- else if (CMD_ARGC >= 4) {
- ee1 = strtoul(CMD_ARGV[2], NULL, 10);
- ee2 = strtoul(CMD_ARGV[3], NULL, 10);
- }
-
- enable = ee1 + ee2 > 0;
- if (enable) {
- for (log2 = 2; ; log2++) {
- if (ee1 + ee2 == (16u << 10) >> log2)
- break;
- if (ee1 + ee2 > (16u << 10) >> log2 || log2 >= 9) {
- LOG_ERROR("Unsupported EEPROM size");
- return ERROR_FLASH_OPERATION_FAILED;
- }
- }
-
- if (ee1 * 3 == ee2)
- ee_split = 1;
- else if (ee1 * 7 == ee2)
- ee_split = 0;
- else if (ee1 != ee2) {
- LOG_ERROR("Unsupported EEPROM sizes ratio");
- return ERROR_FLASH_OPERATION_FAILED;
- }
-
- ee_size_code = log2 | ee_split << 4;
- }
-
- if (CMD_ARGC >= 5)
- COMMAND_PARSE_ON_OFF(CMD_ARGV[4], enable);
- if (enable)
- load_flex_ram = 0;
-
- LOG_INFO("DEPART 0x%" PRIx8 ", EEPROM size code 0x%" PRIx8,
- flex_nvm_partition_code, ee_size_code);
-
- result = kinetis_check_run_mode(target);
- if (result != ERROR_OK)
- return result;
-
- result = kinetis_ftfx_command(target, FTFx_CMD_PGMPART, load_flex_ram,
- ee_size_code, flex_nvm_partition_code, 0, 0,
- 0, 0, 0, 0, &ftfx_fstat);
- if (result != ERROR_OK)
- return result;
-
- command_print(CMD_CTX, "FlexNVM partition set. Please reset MCU.");
-
- for (i = 1; i < 4; i++) {
- bank = get_flash_bank_by_num_noprobe(i);
- if (bank == NULL)
- break;
-
- kinfo = bank->driver_priv;
- if (kinfo && kinfo->flash_class == FC_FLEX_NVM)
- kinfo->probed = false; /* re-probe before next use */
- }
-
- command_print(CMD_CTX, "FlexNVM banks will be re-probed to set new data flash size.");
- return ERROR_OK;
-}
-
-
-static const struct command_registration kinetis_security_command_handlers[] = {
- {
- .name = "check_security",
- .mode = COMMAND_EXEC,
- .help = "",
- .usage = "",
- .handler = kinetis_check_flash_security_status,
- },
- {
- .name = "mass_erase",
- .mode = COMMAND_EXEC,
- .help = "",
- .usage = "",
- .handler = kinetis_mdm_mass_erase,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration kinetis_exec_command_handlers[] = {
- {
- .name = "mdm",
- .mode = COMMAND_ANY,
- .help = "",
- .usage = "",
- .chain = kinetis_security_command_handlers,
- },
- {
- .name = "disable_wdog",
- .mode = COMMAND_EXEC,
- .help = "Disable the watchdog timer",
- .usage = "",
- .handler = kinetis_disable_wdog_handler,
- },
- {
- .name = "nvm_partition",
- .mode = COMMAND_EXEC,
- .help = "Show/set data flash or EEPROM backup size in kilobytes,"
- " set two EEPROM sizes in bytes and FlexRAM loading during reset",
- .usage = "('info'|'dataflash' size|'eebkp' size) [eesize1 eesize2] ['on'|'off']",
- .handler = kinetis_nvm_partition,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration kinetis_command_handler[] = {
- {
- .name = "kinetis",
- .mode = COMMAND_ANY,
- .help = "kinetis flash controller commands",
- .usage = "",
- .chain = kinetis_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
-
-
-struct flash_driver kinetis_flash = {
- .name = "kinetis",
- .commands = kinetis_command_handler,
- .flash_bank_command = kinetis_flash_bank_command,
- .erase = kinetis_erase,
- .protect = kinetis_protect,
- .write = kinetis_write,
- .read = default_flash_read,
- .probe = kinetis_probe,
- .auto_probe = kinetis_auto_probe,
- .erase_check = kinetis_blank_check,
- .protect_check = kinetis_protect_check,
- .info = kinetis_info,
-};
[48/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/itmdump.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/itmdump.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/itmdump.c
deleted file mode 100755
index 8963894..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/itmdump.c
+++ /dev/null
@@ -1,459 +0,0 @@
-/*
- * Copyright (C) 2010 by David Brownell
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or (at
- * your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-/*
- * Simple utility to parse and dump ARM Cortex-M3 SWO trace output. Once the
- * mechanisms work right, this information can be used for various purposes
- * including profiling (particularly easy for flat PC-sample profiles) and
- * for debugging.
- *
- * SWO is the Single Wire Output found on some ARM cores, most notably on the
- * Cortex-M3. It combines data from several sources:
- *
- * - Software trace (ITM): so-called "printf-style" application messaging
- * using "ITM stimulus ports"; and differential timestamps.
- * - Hardware trace (DWT): for profiling counters and comparator matches.
- * - TPIU may issue sync packets.
- *
- * The trace data format is defined in Appendix E, "Debug ITM and DWT packet
- * protocol", of the ARMv7-M Architecture Reference Manual (DDI 0403C). It
- * is a superset of the ITM data format from the Coresight TRM.
- *
- * The trace data has two encodings. The working assumption is that data
- * gets into this program using the UART encoding.
- */
-
-#include <errno.h>
-#include <libgen.h>
-#include <stdio.h>
-#include <stdbool.h>
-#include <string.h>
-#include <unistd.h>
-
-unsigned int dump_swit;
-
-/* Example ITM trace word (0xWWXXYYZZ) parsing for task events, sent
- * on port 31 (Reserved for "the" RTOS in CMSIS v1.30)
- * WWXX: event code (0..3 pre-assigned, 4..15 reserved)
- * YY: task priority
- * ZZ: task number
- *
- * NOTE that this specific encoding could be space-optimized; and that
- * trace data streams could also be history-sensitive.
- */
-static void show_task(int port, unsigned data)
-{
- unsigned code = data >> 16;
- char buf[16];
-
- if (dump_swit)
- return;
-
- switch (code) {
- case 0:
- strcpy(buf, "run");
- break;
- case 1:
- strcpy(buf, "block");
- break;
- case 2:
- strcpy(buf, "create");
- break;
- case 3:
- strcpy(buf, "destroy");
- break;
- /* 4..15 reserved for other infrastructure ops */
- default:
- sprintf(buf, "code %d", code);
- break;
- }
- printf("TASK %d, pri %d: %s",
- (data >> 0) & 0xff,
- (data >> 8) & 0xff,
- buf);
-}
-
-static void show_reserved(FILE *f, char *label, int c)
-{
- unsigned i;
-
- if (dump_swit)
- return;
-
- printf("%s - %#02x", label, c);
-
- for (i = 0; (c & 0x80) && i < 4; i++) {
- c = fgetc(f);
- if (c == EOF) {
- printf("(ERROR %d - %s) ", errno, strerror(errno));
- break;
- }
- printf(" %#02x", c);
- }
-
- printf("\n");
-}
-
-static bool read_varlen(FILE *f, int c, unsigned *value)
-{
- unsigned size;
- unsigned char buf[4];
-
- *value = 0;
-
- switch (c & 3) {
- case 3:
- size = 4;
- break;
- case 2:
- size = 2;
- break;
- case 1:
- size = 1;
- break;
- default:
- printf("INVALID SIZE\n");
- return false;
- }
-
- memset(buf, 0, sizeof buf);
- if (fread(buf, 1, size, f) != size)
- goto err;
-
- *value = (buf[3] << 24)
- + (buf[2] << 16)
- + (buf[1] << 8)
- + (buf[0] << 0);
- return true;
-
-err:
- printf("(ERROR %d - %s)\n", errno, strerror(errno));
- return false;
-}
-
-static void show_hard(FILE *f, int c)
-{
- unsigned type = c >> 3;
- unsigned value;
- char *label;
-
- if (dump_swit)
- return;
-
- printf("DWT - ");
-
- if (!read_varlen(f, c, &value))
- return;
- printf("%#x", value);
-
- switch (type) {
- case 0: /* event counter wrapping */
- printf("overflow %s%s%s%s%s%s",
- (value & (1 << 5)) ? "cyc " : "",
- (value & (1 << 4)) ? "fold " : "",
- (value & (1 << 3)) ? "lsu " : "",
- (value & (1 << 2)) ? "slp " : "",
- (value & (1 << 1)) ? "exc " : "",
- (value & (1 << 0)) ? "cpi " : "");
- break;
- case 1: /* exception tracing */
- switch (value >> 12) {
- case 1:
- label = "entry to";
- break;
- case 2:
- label = "exit from";
- break;
- case 3:
- label = "return to";
- break;
- default:
- label = "?";
- break;
- }
- printf("%s exception %d", label, value & 0x1ff);
- break;
- case 2: /* PC sampling */
- if (c == 0x15)
- printf("PC - sleep");
- else
- printf("PC - %#08x", value);
- break;
- case 8: /* data tracing, pc value */
- case 10:
- case 12:
- case 14:
- printf("Data trace %d, PC %#08x", (c >> 4) & 3, value);
- /* optionally followed by data value */
- break;
- case 9: /* data tracing, address offset */
- case 11:
- case 13:
- case 15:
- printf("Data trace %d, address offset %#04x",
- (c >> 4) & 3, value);
- /* always followed by data value */
- break;
- case 16 ... 23: /* data tracing, data value */
- printf("Data trace %d, ", (c >> 4) & 3);
- label = (c & 0x8) ? "write" : "read";
- switch (c & 3) {
- case 3:
- printf("word %s, value %#08x", label, value);
- break;
- case 2:
- printf("halfword %s, value %#04x", label, value);
- break;
- case 1:
- printf("byte %s, value %#02x", label, value);
- break;
- }
- break;
- default:
- printf("UNDEFINED, rawtype: %x", type);
- break;
- }
-
- printf("\n");
- return;
-}
-
-/*
- * Table of SWIT (SoftWare InstrumentTation) message dump formats, for
- * ITM port 0..31 application data.
- *
- * Eventually this should be customizable; all usage is application defined.
- *
- * REVISIT there can be up to 256 trace ports, via "ITM Extension" packets
- */
-struct {
- int port;
- void (*show)(int port, unsigned data);
-} format[] = {
- { .port = 31, .show = show_task, },
-};
-
-static void show_swit(FILE *f, int c)
-{
- unsigned port = c >> 3;
- unsigned value = 0;
- unsigned i;
-
- if (port + 1 == dump_swit) {
- if (!read_varlen(f, c, &value))
- return;
- printf("%c", value);
- return;
- }
-
- if (!read_varlen(f, c, &value))
- return;
-
- if (dump_swit)
- return;
-
- printf("SWIT %u - ", port);
-
- printf("%#08x", value);
-
- for (i = 0; i < sizeof(format) / sizeof(format[0]); i++) {
- if (format[i].port == port) {
- printf(", ");
- format[i].show(port, value);
- break;
- }
- }
-
- printf("\n");
- return;
-}
-
-static void show_timestamp(FILE *f, int c)
-{
- unsigned counter = 0;
- char *label = "";
- bool delayed = false;
-
- if (dump_swit)
- return;
-
- printf("TIMESTAMP - ");
-
- /* Format 2: header only */
- if (!(c & 0x80)) {
- switch (c) {
- case 0: /* sync packet -- coding error! */
- case 0x70: /* overflow -- ditto! */
- printf("ERROR - %#02x\n", c);
- break;
- default:
- /* synchronous to ITM */
- counter = c >> 4;
- goto done;
- }
- return;
- }
-
- /* Format 1: one to four bytes of data too */
- switch (c >> 4) {
- default:
- label = ", reserved control\n";
- break;
- case 0xc:
- /* synchronous to ITM */
- break;
- case 0xd:
- label = ", timestamp delayed";
- delayed = true;
- break;
- case 0xe:
- label = ", packet delayed";
- delayed = true;
- break;
- case 0xf:
- label = ", packet and timetamp delayed";
- delayed = true;
- break;
- }
-
- c = fgetc(f);
- if (c == EOF)
- goto err;
- counter = c & 0x7f;
- if (!(c & 0x80))
- goto done;
-
- c = fgetc(f);
- if (c == EOF)
- goto err;
- counter |= (c & 0x7f) << 7;
- if (!(c & 0x80))
- goto done;
-
- c = fgetc(f);
- if (c == EOF)
- goto err;
- counter |= (c & 0x7f) << 14;
- if (!(c & 0x80))
- goto done;
-
- c = fgetc(f);
- if (c == EOF)
- goto err;
- counter |= (c & 0x7f) << 21;
-
-done:
- /* REVISIT should we try to convert from delta values? */
- printf("+%u%s\n", counter, label);
- return;
-
-err:
- printf("(ERROR %d - %s) ", errno, strerror(errno));
- goto done;
-}
-
-int main(int argc, char **argv)
-{
- FILE *f = stdin;
- int c;
-
- /* parse arguments */
- while ((c = getopt(argc, argv, "f:d:")) != EOF) {
- switch (c) {
- case 'f':
- /* e.g. from UART connected to /dev/ttyUSB0 */
- f = fopen(optarg, "r");
- if (!f) {
- perror(optarg);
- return 1;
- }
- break;
- case 'd':
- dump_swit = atoi(optarg);
- break;
- default:
- fprintf(stderr, "usage: %s [-f input]",
- basename(argv[0]));
- return 1;
- }
- }
-
- /* Parse data ... records have a header then data bytes.
- * NOTE: we assume getc() deals in 8-bit bytes.
- */
- bool overflow = false;
-
- while ((c = getc(f)) != EOF) {
-
- /* Sync packet ... 7 zeroes, 0x80 */
- if (c == 0) {
- int i;
-
- for (i = 0; i < 6; i++) {
- c = fgetc(f);
- if (c == EOF)
- break;
- if (c != 0)
- goto bad_sync;
- }
- c = fgetc(f);
- if (c == 0x80) {
- printf("SYNC\n");
- continue;
- }
-bad_sync:
- printf("BAD SYNC\n");
- continue;
- }
-
- /* Overflow packet */
- if (c == 0x70) {
- /* REVISIT later, report just what overflowed!
- * Timestamp and SWIT can happen. Non-ITM too?
- */
- overflow = true;
- printf("OVERFLOW ...\n");
- continue;
- }
- overflow = false;
-
- switch (c & 0x0f) {
- case 0x00: /* Timestamp */
- show_timestamp(f, c);
- break;
- case 0x04: /* "Reserved" */
- show_reserved(f, "RESERVED", c);
- break;
- case 0x08: /* ITM Extension */
- /* FIXME someday, handle these ... */
- show_reserved(f, "ITM EXT", c);
- break;
- case 0x0c: /* DWT Extension */
- show_reserved(f, "DWT EXT", c);
- break;
- default:
- if (c & 4)
- show_hard(f, c);
- else
- show_swit(f, c);
- break;
- }
-
- }
-
- return 0;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/README
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/README b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/README
deleted file mode 100755
index d67ccce..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/README
+++ /dev/null
@@ -1,19 +0,0 @@
-This code is an example of using the openocd debug message system.
-
-Before the message output is seen in the debug window, the functionality
-will need enabling:
-
-From the gdb prompt:
-monitor target_request debugmsgs enable
-monitor trace point 1
-
-From the Telnet prompt:
-target_request debugmsgs enable
-trace point 1
-
-To see how many times the trace point was hit:
-(monitor) trace point 1
-
-Spen
-spen@spen-soft.co.uk
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/dcc_stdio.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/dcc_stdio.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/dcc_stdio.c
deleted file mode 100755
index 5a457e7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/dcc_stdio.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2008 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * Copyright (C) 2008 by Frederik Kriewtz *
- * frederik@kriewitz.eu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#include "dcc_stdio.h"
-
-#define TARGET_REQ_TRACEMSG 0x00
-#define TARGET_REQ_DEBUGMSG_ASCII 0x01
-#define TARGET_REQ_DEBUGMSG_HEXMSG(size) (0x01 | ((size & 0xff) << 8))
-#define TARGET_REQ_DEBUGCHAR 0x02
-
-#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_6SM__)
-
-/* we use the System Control Block DCRDR reg to simulate a arm7_9 dcc channel
- * DCRDR[7:0] is used by target for status
- * DCRDR[15:8] is used by target for write buffer
- * DCRDR[23:16] is used for by host for status
- * DCRDR[31:24] is used for by host for write buffer */
-
-#define NVIC_DBG_DATA_R (*((volatile unsigned short *)0xE000EDF8))
-
-#define BUSY 1
-
-void dbg_write(unsigned long dcc_data)
-{
- int len = 4;
-
- while (len--)
- {
- /* wait for data ready */
- while (NVIC_DBG_DATA_R & BUSY);
-
- /* write our data and set write flag - tell host there is data*/
- NVIC_DBG_DATA_R = (unsigned short)(((dcc_data & 0xff) << 8) | BUSY);
- dcc_data >>= 8;
- }
-}
-
-#elif defined(__ARM_ARCH_4T__) || defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_5T__)
-
-void dbg_write(unsigned long dcc_data)
-{
- unsigned long dcc_status;
-
- do {
- asm volatile("mrc p14, 0, %0, c0, c0" : "=r" (dcc_status));
- } while (dcc_status & 0x2);
-
- asm volatile("mcr p14, 0, %0, c1, c0" : : "r" (dcc_data));
-}
-
-#else
- #error unsupported target
-#endif
-
-void dbg_trace_point(unsigned long number)
-{
- dbg_write(TARGET_REQ_TRACEMSG | (number << 8));
-}
-
-void dbg_write_u32(const unsigned long *val, long len)
-{
- dbg_write(TARGET_REQ_DEBUGMSG_HEXMSG(4) | ((len & 0xffff) << 16));
-
- while (len > 0)
- {
- dbg_write(*val);
-
- val++;
- len--;
- }
-}
-
-void dbg_write_u16(const unsigned short *val, long len)
-{
- unsigned long dcc_data;
-
- dbg_write(TARGET_REQ_DEBUGMSG_HEXMSG(2) | ((len & 0xffff) << 16));
-
- while (len > 0)
- {
- dcc_data = val[0]
- | ((len > 1) ? val[1] << 16: 0x0000);
-
- dbg_write(dcc_data);
-
- val += 2;
- len -= 2;
- }
-}
-
-void dbg_write_u8(const unsigned char *val, long len)
-{
- unsigned long dcc_data;
-
- dbg_write(TARGET_REQ_DEBUGMSG_HEXMSG(1) | ((len & 0xffff) << 16));
-
- while (len > 0)
- {
- dcc_data = val[0]
- | ((len > 1) ? val[1] << 8 : 0x00)
- | ((len > 2) ? val[2] << 16 : 0x00)
- | ((len > 3) ? val[3] << 24 : 0x00);
-
- dbg_write(dcc_data);
-
- val += 4;
- len -= 4;
- }
-}
-
-void dbg_write_str(const char *msg)
-{
- long len;
- unsigned long dcc_data;
-
- for (len = 0; msg[len] && (len < 65536); len++);
-
- dbg_write(TARGET_REQ_DEBUGMSG_ASCII | ((len & 0xffff) << 16));
-
- while (len > 0)
- {
- dcc_data = msg[0]
- | ((len > 1) ? msg[1] << 8 : 0x00)
- | ((len > 2) ? msg[2] << 16 : 0x00)
- | ((len > 3) ? msg[3] << 24 : 0x00);
- dbg_write(dcc_data);
-
- msg += 4;
- len -= 4;
- }
-}
-
-void dbg_write_char(char msg)
-{
- dbg_write(TARGET_REQ_DEBUGCHAR | ((msg & 0xff) << 16));
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/dcc_stdio.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/dcc_stdio.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/dcc_stdio.h
deleted file mode 100755
index cb87ab3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/dcc_stdio.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2008 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef DCC_STDIO_H
-#define DCC_STDIO_H
-
-void dbg_trace_point(unsigned long number);
-
-void dbg_write_u32(const unsigned long *val, long len);
-void dbg_write_u16(const unsigned short *val, long len);
-void dbg_write_u8(const unsigned char *val, long len);
-
-void dbg_write_str(const char *msg);
-void dbg_write_char(char msg);
-
-#endif /* DCC_STDIO_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/example.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/example.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/example.c
deleted file mode 100755
index 2cbef20..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/libdcc/example.c
+++ /dev/null
@@ -1,58 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * Copyright (C) 2008 by Frederik Kriewtz *
- * frederik@kriewitz.eu *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#include "dcc_stdio.h"
-
-/* enable openocd debugmsg at the gdb prompt:
- * monitor target_request debugmsgs enable
- *
- * create a trace point:
- * monitor trace point 1
- *
- * to show how often the trace point was hit:
- * monitor trace point
-*/
-
-int main(void)
-{
- dbg_write_str("hello world");
-
- dbg_write_char('t');
- dbg_write_char('e');
- dbg_write_char('s');
- dbg_write_char('t');
- dbg_write_char('\n');
-
- unsigned long test_u32 = 0x01234567;
- dbg_write_u32(&test_u32, 1);
-
- static const unsigned short test_u16[] = {0x0123, 0x4567, 0x89AB, 0xCDEF, 0x0123, 0x4567, 0x89AB, 0xCDEF};
- dbg_write_u16(test_u16, 8);
-
- static const unsigned char test_u8[] = {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 0x99, 0xAA, 0xBB, 0xCC, 0XDD, 0xEE, 0xFF};
- dbg_write_u8(test_u8, 16);
-
- while(1)
- {
- dbg_trace_point(0);
- }
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/README
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/README b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/README
deleted file mode 100755
index 41236ef..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/README
+++ /dev/null
@@ -1,33 +0,0 @@
-Included in these directories are the src to the various ram loaders used
-within openocd.
-
-** target checksum loaders **
-
-checksum/armv4_5_crc.s :
- - ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code
-
-checksum/armv7m_crc.s :
- - ARMv7m checksum loader : see target/armv7m.c:cortex_m_crc_code
-
-checksum/mips32.s :
- - MIPS32 checksum loader : see target/mips32.c:mips_crc_code
-
-** target flash loaders **
-
-flash/pic32mx.s :
- - Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code
-
-flash/stellaris.s :
- - TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code
-
-flash/stm32x.s :
- - ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code
-
-flash/str7x.s :
- - ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code
-
-flash/str9x.s :
- - ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code
-
-Spencer Oliver
-spen@spen-soft.co.uk
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/armv4_5_crc.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/armv4_5_crc.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/armv4_5_crc.s
deleted file mode 100755
index 8f62dc8..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/armv4_5_crc.s
+++ /dev/null
@@ -1,58 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- r0 - address in - crc out
- r1 - char count
-*/
-
- .text
- .arm
-
-_start:
-main:
- mov r2, r0
- mov r0, #0xffffffff /* crc */
- mov r3, r1
- mov r4, #0
- b ncomp
-nbyte:
- ldrb r1, [r2, r4]
- ldr r7, CRC32XOR
- eor r0, r0, r1, asl #24
- mov r5, #0
-loop:
- cmp r0, #0
- mov r6, r0, asl #1
- add r5, r5, #1
- mov r0, r6
- eorlt r0, r6, r7
- cmp r5, #8
- bne loop
- add r4, r4, #1
-ncomp:
- cmp r4, r3
- bne nbyte
-end:
- bkpt #0
-
-CRC32XOR: .word 0x04c11db7
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/armv7m_crc.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/armv7m_crc.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/armv7m_crc.s
deleted file mode 100755
index 923875a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/armv7m_crc.s
+++ /dev/null
@@ -1,71 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- parameters:
- r0 - address in - crc out
- r1 - char count
-*/
-
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
- .thumb_func
-
- .align 2
-
-_start:
-main:
- mov r2, r0
- movs r0, #0
- mvns r0, r0
- ldr r6, CRC32XOR
- mov r3, r1
- movs r4, #0
- b ncomp
-nbyte:
- ldrb r1, [r2, r4]
- lsls r1, r1, #24
- eors r0, r0, r1
- movs r5, #0
-loop:
- cmp r0, #0
- bge notset
- lsls r0, r0, #1
- eors r0, r0, r6
- b cont
-notset:
- lsls r0, r0, #1
-cont:
- adds r5, r5, #1
- cmp r5, #8
- bne loop
- adds r4, r4, #1
-ncomp:
- cmp r4, r3
- bne nbyte
- bkpt #0
-
- .align 2
-
-CRC32XOR: .word 0x04c11db7
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/mips32.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/mips32.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/mips32.s
deleted file mode 100755
index 3073d87..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/checksum/mips32.s
+++ /dev/null
@@ -1,72 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .global main
- .text
- .set noreorder
-
-/* params:
- * $a0 address in
- * $a1 byte count
- * vars
- * $a0 crc
- * $a1 crc data byte
- * temps:
- * t3 v0 a3 a2 t0 v1
- */
-
-.ent main
-main:
- addiu $t4, $a0, 0 /* address in */
- addiu $t2, $a1, 0 /* count */
-
- addiu $a0, $zero, 0xffffffff /* a0 crc - result */
-
- beq $zero, $zero, ncomp
- addiu $t3, $zero, 0 /* clear bytes read */
-
-nbyte:
- lb $a1, ($t4) /* load byte from source address */
- addi $t4, $t4, 1 /* inc byte count */
-
-crc:
- sll $a1, $a1, 24
- lui $v0, 0x04c1
- xor $a0, $a0, $a1
- ori $a3, $v0, 0x1db7
- addu $a2, $zero, $zero /* clear bit count */
-loop:
- sll $t0, $a0, 1
- addiu $a2, $a2, 1 /* inc bit count */
- slti $a0, $a0, 0
- xor $t1, $t0, $a3
- movn $t0, $t1, $a0
- slti $v1, $a2, 8 /* 8bits processed */
- bne $v1, $zero, loop
- addu $a0, $t0, $zero
-
-ncomp:
- bne $t2, $t3, nbyte /* all bytes processed */
- addiu $t3, $t3, 1
-
-wait:
- sdbbp
-
-.end main
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv4_5_erase_check.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv4_5_erase_check.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv4_5_erase_check.s
deleted file mode 100755
index 6d075a9..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv4_5_erase_check.s
+++ /dev/null
@@ -1,41 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- parameters:
- r0 - address in
- r1 - byte count
- r2 - mask - result out
-*/
-
- .text
- .arm
-
-loop:
- ldrb r3, [r0], #1
- and r2, r2, r3
- subs r1, r1, #1
- bne loop
-end:
- bkpt #0
-
-CRC32XOR: .word 0x04c11db7
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_0_erase_check.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_0_erase_check.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_0_erase_check.inc
deleted file mode 100755
index 76115ec..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_0_erase_check.inc
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Autogenerated with ../../../src/helper/bin2char.sh */
-0x03,0x78,0x01,0x30,0x1a,0x43,0x01,0x39,0xfa,0xd1,0x00,0xbe,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_0_erase_check.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_0_erase_check.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_0_erase_check.s
deleted file mode 100755
index 6b1e92a..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_0_erase_check.s
+++ /dev/null
@@ -1,45 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2014 by Jeff Ciesielski *
- * jeffciesielski@gmail.com *
- * *
- * Based on the armv7m erase checker by: *
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- ***************************************************************************/
-
-/*
- parameters:
- r0 - address in
- r1 - byte count
- r2 - mask - result out
-*/
-
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
- .thumb_func
-
- .align 2
-
-loop:
- ldrb r3, [r0]
- adds r0, #1
- orrs r2, r2, r3
- subs r1, r1, #1
- bne loop
-end:
- bkpt #0
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_erase_check.inc
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_erase_check.inc b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_erase_check.inc
deleted file mode 100755
index 1fe25cd..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_erase_check.inc
+++ /dev/null
@@ -1,2 +0,0 @@
-/* Autogenerated with ../../../src/helper/bin2char.sh */
-0x03,0x78,0x01,0x30,0x1a,0x40,0x01,0x39,0xfa,0xd1,0x00,0xbe,
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_erase_check.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_erase_check.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_erase_check.s
deleted file mode 100755
index 886e3e2..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/erase_check/armv7m_erase_check.s
+++ /dev/null
@@ -1,45 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2010 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-/*
- parameters:
- r0 - address in
- r1 - byte count
- r2 - mask - result out
-*/
-
- .text
- .syntax unified
- .cpu cortex-m0
- .thumb
- .thumb_func
-
- .align 2
-
-loop:
- ldrb r3, [r0]
- adds r0, #1
- ands r2, r2, r3
- subs r1, r1, #1
- bne loop
-end:
- bkpt #0
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_16.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_16.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_16.s
deleted file mode 100755
index c35b651..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_16.s
+++ /dev/null
@@ -1,57 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv4
-
- .section .init
-
-/* algorithm register usage:
- * r0: source address (in RAM)
- * r1: target address (in Flash)
- * r2: count
- * r3: flash write command
- * r4: status byte (returned to host)
- * r5: busy test pattern
- * r6: error test pattern
- */
-
-loop:
- ldrh r4, [r0], #2
- strh r3, [r1]
- strh r4, [r1]
-busy:
- ldrh r4, [r1]
- and r7, r4, r5
- cmp r7, r5
- bne busy
- tst r4, r6
- bne done
- subs r2, r2, #1
- beq done
- add r1, r1, #2
- b loop
-done:
- b done
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_32.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_32.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_32.s
deleted file mode 100755
index db47717..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_32.s
+++ /dev/null
@@ -1,57 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv4
-
- .section .init
-
-/* algorithm register usage:
- * r0: source address (in RAM)
- * r1: target address (in Flash)
- * r2: count
- * r3: flash write command
- * r4: status byte (returned to host)
- * r5: busy test pattern
- * r6: error test pattern
- */
-
-loop:
- ldr r4, [r0], #4
- str r3, [r1]
- str r4, [r1]
-busy:
- ldr r4, [r1]
- and r7, r4, r5
- cmp r7, r5
- bne busy
- tst r4, r6
- bne done
- subs r2, r2, #1
- beq done
- add r1, r1, #4
- b loop
-done:
- b done
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_8.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_8.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_8.s
deleted file mode 100755
index d50acd2..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_intel_8.s
+++ /dev/null
@@ -1,57 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv4
-
- .section .init
-
-/* algorithm register usage:
- * r0: source address (in RAM)
- * r1: target address (in Flash)
- * r2: count
- * r3: flash write command
- * r4: status byte (returned to host)
- * r5: busy test pattern
- * r6: error test pattern
- */
-
-loop:
- ldrb r4, [r0], #1
- strb r3, [r1]
- strb r4, [r1]
-busy:
- ldrb r4, [r1]
- and r7, r4, r5
- cmp r7, r5
- bne busy
- tst r4, r6
- bne done
- subs r2, r2, #1
- beq done
- add r1, r1, #1
- b loop
-done:
- b done
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_16.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_16.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_16.s
deleted file mode 100755
index 5327271..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_16.s
+++ /dev/null
@@ -1,75 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv4
-
- .section .init
-
-/* input parameters - */
-/* R0 = source address */
-/* R1 = destination address */
-/* R2 = number of writes */
-/* R3 = flash write command */
-/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/* R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/* R6 = value read from flash to test status */
-/* R7 = holding register */
-/* unlock registers - */
-/* R8 = unlock1_addr */
-/* R9 = unlock1_cmd */
-/* R10 = unlock2_addr */
-/* R11 = unlock2_cmd */
-
-code:
- ldrh r5, [r0], #2
- strh r9, [r8]
- strh r11, [r10]
- strh r3, [r8]
- strh r5, [r1]
- nop
-busy:
- ldrh r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- beq cont /* b if DQ7 == Data7 */
- ands r6, r6, r4, lsr #2
- beq busy /* b if DQ5 low */
- ldrh r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- beq cont /* b if DQ7 == Data7 */
- mov r5, #0 /* 0x0 - return 0x00, error */
- bne done
-cont:
- subs r2, r2, #1 /* 0x1 */
- moveq r5, #128 /* 0x80 */
- beq done
- add r1, r1, #2 /* 0x2 */
- b code
-done:
- b done
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s
deleted file mode 100755
index 919f6e1..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_16_dq7.s
+++ /dev/null
@@ -1,66 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv4
-
- .section .init
-
-/* input parameters - */
-/* R0 = source address */
-/* R1 = destination address */
-/* R2 = number of writes */
-/* R3 = flash write command */
-/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/* R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/* R6 = value read from flash to test status */
-/* R7 = holding register */
-/* unlock registers - */
-/* R8 = unlock1_addr */
-/* R9 = unlock1_cmd */
-/* R10 = unlock2_addr */
-/* R11 = unlock2_cmd */
-
-code:
- ldrh r5, [r0], #2
- strh r9, [r8]
- strh r11, [r10]
- strh r3, [r8]
- strh r5, [r1]
- nop
-busy:
- ldrh r6, [r1]
- eor r7, r5, r6
- ands r7, #0x80
- bne busy
- subs r2, r2, #1 /* 0x1 */
- moveq r5, #128 /* 0x80 */
- beq done
- add r1, r1, #2 /* 0x2 */
- b code
-done:
- b done
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_32.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_32.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_32.s
deleted file mode 100755
index c8f87b1..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_32.s
+++ /dev/null
@@ -1,75 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv4
-
- .section .init
-
-/* input parameters - */
-/* R0 = source address */
-/* R1 = destination address */
-/* R2 = number of writes */
-/* R3 = flash write command */
-/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/* R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/* R6 = value read from flash to test status */
-/* R7 = holding register */
-/* unlock registers - */
-/* R8 = unlock1_addr */
-/* R9 = unlock1_cmd */
-/* R10 = unlock2_addr */
-/* R11 = unlock2_cmd */
-
-code:
- ldr r5, [r0], #4
- str r9, [r8]
- str r11, [r10]
- str r3, [r8]
- str r5, [r1]
- nop
-busy:
- ldr r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- beq cont /* b if DQ7 == Data7 */
- ands r6, r6, r4, lsr #2
- beq busy /* b if DQ5 low */
- ldr r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- beq cont /* b if DQ7 == Data7 */
- mov r5, #0 /* 0x0 - return 0x00, error */
- bne done
-cont:
- subs r2, r2, #1 /* 0x1 */
- moveq r5, #128 /* 0x80 */
- beq done
- add r1, r1, #4 /* 0x4 */
- b code
-done:
- b done
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_8.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_8.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_8.s
deleted file mode 100755
index 46018e1..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv4_5_cfi_span_8.s
+++ /dev/null
@@ -1,75 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .arm
- .arch armv4
-
- .section .init
-
-/* input parameters - */
-/* R0 = source address */
-/* R1 = destination address */
-/* R2 = number of writes */
-/* R3 = flash write command */
-/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/* R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/* R6 = value read from flash to test status */
-/* R7 = holding register */
-/* unlock registers - */
-/* R8 = unlock1_addr */
-/* R9 = unlock1_cmd */
-/* R10 = unlock2_addr */
-/* R11 = unlock2_cmd */
-
-code:
- ldrb r5, [r0], #1
- strb r9, [r8]
- strb r11, [r10]
- strb r3, [r8]
- strb r5, [r1]
- nop
-busy:
- ldrb r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- beq cont /* b if DQ7 == Data7 */
- ands r6, r6, r4, lsr #2
- beq busy /* b if DQ5 low */
- ldrb r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- beq cont /* b if DQ7 == Data7 */
- mov r5, #0 /* 0x0 - return 0x00, error */
- bne done
-cont:
- subs r2, r2, #1 /* 0x1 */
- moveq r5, #128 /* 0x80 */
- beq done
- add r1, r1, #1 /* 0x1 */
- b code
-done:
- b done
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_cfi_span_16.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_cfi_span_16.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_cfi_span_16.s
deleted file mode 100755
index d4915a7..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_cfi_span_16.s
+++ /dev/null
@@ -1,81 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .arch armv7-m
- .thumb
- .thumb_func
-
- .align 2
-
-/* input parameters - */
-/* R0 = source address */
-/* R1 = destination address */
-/* R2 = number of writes */
-/* R3 = flash write command */
-/* R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
-/* output parameters - */
-/* R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/* R6 = value read from flash to test status */
-/* R7 = holding register */
-/* unlock registers - */
-/* R8 = unlock1_addr */
-/* R9 = unlock1_cmd */
-/* R10 = unlock2_addr */
-/* R11 = unlock2_cmd */
-
-code:
- ldrh r5, [r0], #2
- strh r9, [r8]
- strh r11, [r10]
- strh r3, [r8]
- strh r5, [r1]
- nop
-busy:
- ldrh r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- beq cont /* b if DQ7 == Data7 */
- ands r6, r6, r4, lsr #2
- beq busy /* b if DQ5 low */
- ldrh r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- beq cont /* b if DQ7 == Data7 */
- mov r5, #0 /* 0x0 - return 0x00, error */
- bne done
-cont:
- subs r2, r2, #1 /* 0x1 */
- beq success
- add r1, r1, #2 /* 0x2 */
- b code
-
-success:
- mov r5, #128 /* 0x80 */
- b done
-
-done:
- bkpt #0
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_cfi_span_16_dq7.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_cfi_span_16_dq7.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_cfi_span_16_dq7.s
deleted file mode 100755
index 5b29a3b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_cfi_span_16_dq7.s
+++ /dev/null
@@ -1,72 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005, 2007 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * Copyright (C) 2010 Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .arch armv7-m
- .thumb
- .thumb_func
-
- .align 2
-
-/* input parameters - */
-/* R0 = source address */
-/* R1 = destination address */
-/* R2 = number of writes */
-/* R3 = flash write command */
-/* R4 = constant to mask DQ7 bits */
-/* output parameters - */
-/* R5 = 0x80 ok 0x00 bad */
-/* temp registers - */
-/* R6 = value read from flash to test status */
-/* R7 = holding register */
-/* unlock registers - */
-/* R8 = unlock1_addr */
-/* R9 = unlock1_cmd */
-/* R10 = unlock2_addr */
-/* R11 = unlock2_cmd */
-
-code:
- ldrh r5, [r0], #2
- strh r9, [r8]
- strh r11, [r10]
- strh r3, [r8]
- strh r5, [r1]
- nop
-busy:
- ldrh r6, [r1]
- eor r7, r5, r6
- ands r7, r4, r7
- bne busy
- subs r2, r2, #1 /* 0x1 */
- beq success
- add r1, r1, #2 /* 0x2 */
- b code
-
-success:
- mov r5, #128 /* 0x80 */
- b done
-
-done:
- bkpt #0
-
- .end
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_io.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_io.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_io.s
deleted file mode 100755
index 797981c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/armv7m_io.s
+++ /dev/null
@@ -1,60 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2013 by Henrik Nilsson *
- * henrik.nilsson@bytequest.se *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
- .text
- .syntax unified
- .arch armv7-m
- .thumb
- .thumb_func
-
- .align 4
-
-/* Inputs:
- * r0 buffer address
- * r1 NAND data address (byte wide)
- * r2 buffer length
- */
-read:
- ldrb r3, [r1]
- strb r3, [r0], #1
- subs r2, r2, #1
- bne read
-
-done_read:
- bkpt #0
-
- .align 4
-
-/* Inputs:
- * r0 NAND data address (byte wide)
- * r1 buffer address
- * r2 buffer length
- */
-write:
- ldrb r3, [r1], #1
- strb r3, [r0]
- subs r2, r2, #1
- bne write
-
-done_write:
- bkpt #0
-
- .end
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script
deleted file mode 100755
index 85450c1..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/at91sam7x_ocl_flash.script
+++ /dev/null
@@ -1,4 +0,0 @@
-soft_reset_halt
-load_image at91sam7x_ocl.bin 0x200000
-resume 0x200000
-flash probe 0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld
deleted file mode 100755
index ea06931..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/at91sam7x_ram.ld
+++ /dev/null
@@ -1,132 +0,0 @@
-/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-*
-* History:
-*
-* 30.03.06 mifi First Version
-****************************************************************************/
-
-
-ENTRY(ResetHandler)
-SEARCH_DIR(.)
-
-/*
- * Define stack size here
- */
-FIQ_STACK_SIZE = 0x0100;
-IRQ_STACK_SIZE = 0x0100;
-ABT_STACK_SIZE = 0x0100;
-UND_STACK_SIZE = 0x0100;
-SVC_STACK_SIZE = 0x0100;
-
-
-MEMORY
-{
- ram : org = 0x00200000, len = 64k
-}
-
-/*
- * Do not change the next code
- */
-SECTIONS
-{
- .text :
- {
- *(.vectors);
- . = ALIGN(4);
- *(.init);
- . = ALIGN(4);
- *(.text);
- . = ALIGN(4);
- *(.rodata);
- . = ALIGN(4);
- *(.rodata*);
- . = ALIGN(4);
- *(.glue_7t);
- . = ALIGN(4);
- *(.glue_7);
- . = ALIGN(4);
- etext = .;
- } > ram
-
- .data :
- {
- PROVIDE (__data_start = .);
- *(.data)
- . = ALIGN(4);
- edata = .;
- _edata = .;
- PROVIDE (__data_end = .);
- } > ram
-
- .bss :
- {
- PROVIDE (__bss_start = .);
- *(.bss)
- *(COMMON)
- . = ALIGN(4);
- PROVIDE (__bss_end = .);
-
- . = ALIGN(256);
-
- PROVIDE (__stack_start = .);
-
- PROVIDE (__stack_fiq_start = .);
- . += FIQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_fiq_end = .);
-
- PROVIDE (__stack_irq_start = .);
- . += IRQ_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_irq_end = .);
-
- PROVIDE (__stack_abt_start = .);
- . += ABT_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_abt_end = .);
-
- PROVIDE (__stack_und_start = .);
- . += UND_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_und_end = .);
-
- PROVIDE (__stack_svc_start = .);
- . += SVC_STACK_SIZE;
- . = ALIGN(4);
- PROVIDE (__stack_svc_end = .);
- PROVIDE (__stack_end = .);
- PROVIDE (__heap_start = .);
- } > ram
-
-}
-/*** EOF ***/
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/crt.s
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/crt.s b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/crt.s
deleted file mode 100755
index 2e434bb..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/loaders/flash/at91sam7x/crt.s
+++ /dev/null
@@ -1,223 +0,0 @@
-/****************************************************************************
-* Copyright (c) 2006 by Michael Fischer. All rights reserved.
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*
-* 1. Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* 2. Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in the
-* documentation and/or other materials provided with the distribution.
-* 3. Neither the name of the author nor the names of its contributors may
-* be used to endorse or promote products derived from this software
-* without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
-* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
-* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
-* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
-* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-* SUCH DAMAGE.
-*
-****************************************************************************
-*
-* History:
-*
-* 18.12.06 mifi First Version
-* The hardware initialization is based on the startup file
-* crtat91sam7x256_rom.S from NutOS 4.2.1.
-* Therefore partial copyright by egnite Software GmbH.
-****************************************************************************/
-
-/*
- * Some defines for the program status registers
- */
- ARM_MODE_USER = 0x10 /* Normal User Mode */
- ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
- ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
- ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
- ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
- ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
- ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
- ARM_MODE_MASK = 0x1F
-
- I_BIT = 0x80 /* disable IRQ when I bit is set */
- F_BIT = 0x40 /* disable IRQ when I bit is set */
-
-/*
- * Register Base Address
- */
- AIC_BASE = 0xFFFFF000
- AIC_EOICR_OFF = 0x130
- AIC_IDCR_OFF = 0x124
-
- RSTC_MR = 0xFFFFFD08
- RSTC_KEY = 0xA5000000
- RSTC_URSTEN = 0x00000001
-
- WDT_BASE = 0xFFFFFD40
- WDT_MR_OFF = 0x00000004
- WDT_WDDIS = 0x00008000
-
- MC_BASE = 0xFFFFFF00
- MC_FMR_OFF = 0x00000060
- MC_FWS_1FWS = 0x00480100
-
- .section .vectors,"ax"
- .code 32
-
-/****************************************************************************/
-/* Vector table and reset entry */
-/****************************************************************************/
-_vectors:
- ldr pc, ResetAddr /* Reset */
- ldr pc, UndefAddr /* Undefined instruction */
- ldr pc, SWIAddr /* Software interrupt */
- ldr pc, PAbortAddr /* Prefetch abort */
- ldr pc, DAbortAddr /* Data abort */
- ldr pc, ReservedAddr /* Reserved */
- ldr pc, IRQAddr /* IRQ interrupt */
- ldr pc, FIQAddr /* FIQ interrupt */
-
-
-ResetAddr: .word ResetHandler
-UndefAddr: .word UndefHandler
-SWIAddr: .word SWIHandler
-PAbortAddr: .word PAbortHandler
-DAbortAddr: .word DAbortHandler
-ReservedAddr: .word 0
-IRQAddr: .word IRQHandler
-FIQAddr: .word FIQHandler
-
- .ltorg
-
- .section .init, "ax"
- .code 32
-
- .global ResetHandler
- .global ExitFunction
- .extern main
-/****************************************************************************/
-/* Reset handler */
-/****************************************************************************/
-ResetHandler:
- /*
- * The watchdog is enabled after processor reset. Disable it.
- */
- ldr r1, =WDT_BASE
- ldr r0, =WDT_WDDIS
- str r0, [r1, #WDT_MR_OFF]
-
-
- /*
- * Enable user reset: assertion length programmed to 1ms
- */
- ldr r0, =(RSTC_KEY | RSTC_URSTEN | (4 << 8))
- ldr r1, =RSTC_MR
- str r0, [r1, #0]
-
-
- /*
- * Use 2 cycles for flash access.
- */
- ldr r1, =MC_BASE
- ldr r0, =MC_FWS_1FWS
- str r0, [r1, #MC_FMR_OFF]
-
-
- /*
- * Disable all interrupts. Useful for debugging w/o target reset.
- */
- ldr r1, =AIC_BASE
- mvn r0, #0
- str r0, [r1, #AIC_EOICR_OFF]
- str r0, [r1, #AIC_IDCR_OFF]
-
-
- /*
- * Setup a stack for each mode
- */
- msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
- ldr sp, =__stack_und_end
-
- msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
- ldr sp, =__stack_abt_end
-
- msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
- ldr sp, =__stack_fiq_end
-
- msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
- ldr sp, =__stack_irq_end
-
- msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
- ldr sp, =__stack_svc_end
-
-
- /*
- * Clear .bss section
- */
- ldr r1, =__bss_start
- ldr r2, =__bss_end
- ldr r3, =0
-bss_clear_loop:
- cmp r1, r2
- strne r3, [r1], #+4
- bne bss_clear_loop
-
-
- /*
- * Jump to main
- */
- mrs r0, cpsr
- bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
- msr cpsr, r0
-
- mov r0, #0 /* No arguments */
- mov r1, #0 /* No arguments */
- ldr r2, =main
- mov lr, pc
- bx r2 /* And jump... */
-
-ExitFunction:
- nop
- nop
- nop
- b ExitFunction
-
-
-/****************************************************************************/
-/* Default interrupt handler */
-/****************************************************************************/
-
-UndefHandler:
- b UndefHandler
-
-SWIHandler:
- b SWIHandler
-
-PAbortHandler:
- b PAbortHandler
-
-DAbortHandler:
- b DAbortHandler
-
-IRQHandler:
- b IRQHandler
-
-FIQHandler:
- b FIQHandler
-
- .weak ExitFunction
- .weak UndefHandler, PAbortHandler, DAbortHandler
- .weak IRQHandler, FIQHandler
-
- .ltorg
-/*** EOF ***/
[45/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/xsvf_tools/svf2xsvf.py
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/xsvf_tools/svf2xsvf.py b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/xsvf_tools/svf2xsvf.py
deleted file mode 100755
index 113e0a6..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/xsvf_tools/svf2xsvf.py
+++ /dev/null
@@ -1,729 +0,0 @@
-#!/usr/bin/python3.0
-
-# Copyright 2008, SoftPLC Corporation http://softplc.com
-# Dick Hollenbeck dick@softplc.com
-
-
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; either version 2
-# of the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, you may find one here:
-# http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
-# or you may search the http://www.gnu.org website for the version 2 license,
-# or you may write to the Free Software Foundation, Inc.,
-# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
-
-
-# A python program to convert an SVF file to an XSVF file. There is an
-# option to include comments containing the source file line number from the origin
-# SVF file before each outputted XSVF statement.
-#
-# We deviate from the XSVF spec in that we introduce a new command called
-# XWAITSTATE which directly flows from the SVF RUNTEST command. Unfortunately
-# XRUNSTATE was ill conceived and is not used here. We also add support for the
-# three Lattice extensions to SVF: LCOUNT, LDELAY, and LSDR. The xsvf file
-# generated from this program is suitable for use with the xsvf player in
-# OpenOCD with my modifications to xsvf.c.
-#
-# This program is written for python 3.0, and it is not easy to change this
-# back to 2.x. You may find it easier to use python 3.x even if that means
-# building it.
-
-
-import re
-import sys
-import struct
-
-
-# There are both ---<Lexer>--- and ---<Parser>--- sections to this program
-
-
-if len( sys.argv ) < 3:
- print("usage %s <svf_filename> <xsvf_filename>" % sys.argv[0])
- exit(1)
-
-
-inputFilename = sys.argv[1]
-outputFilename = sys.argv[2]
-
-doCOMMENTs = True # Save XCOMMENTs in the output xsvf file
-#doCOMMENTs = False # Save XCOMMENTs in the output xsvf file
-
-# pick your file encoding
-file_encoding = 'ISO-8859-1'
-#file_encoding = 'utf-8'
-
-
-xrepeat = 0 # argument to XREPEAT, gives retry count for masked compares
-
-
-#-----< Lexer >---------------------------------------------------------------
-
-StateBin = (RESET,IDLE,
- DRSELECT,DRCAPTURE,DRSHIFT,DREXIT1,DRPAUSE,DREXIT2,DRUPDATE,
- IRSELECT,IRCAPTURE,IRSHIFT,IREXIT1,IRPAUSE,IREXIT2,IRUPDATE) = range(16)
-
-# Any integer index into this tuple will be equal to its corresponding StateBin value
-StateTxt = ("RESET","IDLE",
- "DRSELECT","DRCAPTURE","DRSHIFT","DREXIT1","DRPAUSE","DREXIT2","DRUPDATE",
- "IRSELECT","IRCAPTURE","IRSHIFT","IREXIT1","IRPAUSE","IREXIT2","IRUPDATE")
-
-
-(XCOMPLETE,XTDOMASK,XSIR,XSDR,XRUNTEST,hole0,hole1,XREPEAT,XSDRSIZE,XSDRTDO,
- XSETSDRMASKS,XSDRINC,XSDRB,XSDRC,XSDRE,XSDRTDOB,XSDRTDOC,
- XSDRTDOE,XSTATE,XENDIR,XENDDR,XSIR2,XCOMMENT,XWAIT,XWAITSTATE,
- LCOUNT,LDELAY,LSDR,XTRST) = range(29)
-
-#Note: LCOUNT, LDELAY, and LSDR are Lattice extensions to SVF and provide a way to loop back
-# and check a completion status, essentially waiting on a part until it signals that it is done.
-# For example below: loop 25 times, each time through the loop do a LDELAY (same as a true RUNTEST)
-# and exit loop when LSDR compares match.
-"""
-LCOUNT 25;
-! Step to DRPAUSE give 5 clocks and wait for 1.00e+000 SEC.
-LDELAY DRPAUSE 5 TCK 1.00E-003 SEC;
-! Test for the completed status. Match means pass.
-! Loop back to LDELAY line if not match and loop count less than 25.
-LSDR 1 TDI (0)
- TDO (1);
-"""
-
-#XTRST is an opcode Xilinx seemed to have missed and it comes from the SVF TRST statement.
-
-LineNumber = 1
-
-def s_ident(scanner, token): return ("ident", token.upper(), LineNumber)
-
-def s_hex(scanner, token):
- global LineNumber
- LineNumber = LineNumber + token.count('\n')
- token = ''.join(token.split())
- return ("hex", token[1:-1], LineNumber)
-
-def s_int(scanner, token): return ("int", int(token), LineNumber)
-def s_float(scanner, token): return ("float", float(token), LineNumber)
-#def s_comment(scanner, token): return ("comment", token, LineNumber)
-def s_semicolon(scanner, token): return ("semi", token, LineNumber)
-
-def s_nl(scanner,token):
- global LineNumber
- LineNumber = LineNumber + 1
- #print( 'LineNumber=', LineNumber, file=sys.stderr )
- return None
-
-#2.00E-002
-
-scanner = re.Scanner([
- (r"[a-zA-Z]\w*", s_ident),
-# (r"[-+]?[0-9]+[.]?[0-9]*([eE][-+]?[0-9]+)?", s_float),
- (r"[-+]?[0-9]+(([.][0-9eE+-]*)|([eE]+[-+]?[0-9]+))", s_float),
- (r"\d+", s_int),
- (r"\(([0-9a-fA-F]|\s)*\)", s_hex),
- (r"(!|//).*$", None),
- (r";", s_semicolon),
- (r"\n",s_nl),
- (r"\s*", None),
- ],
- re.MULTILINE
- )
-
-# open the file using the given encoding
-file = open( sys.argv[1], encoding=file_encoding )
-
-# read all svf file input into string "input"
-input = file.read()
-
-file.close()
-
-# Lexer:
-# create a list of tuples containing (tokenType, tokenValue, LineNumber)
-tokens = scanner.scan( input )[0]
-
-input = None # allow gc to reclaim memory holding file
-
-#for tokenType, tokenValue, ln in tokens: print( "line %d: %s" % (ln, tokenType), tokenValue )
-
-
-#-----<parser>-----------------------------------------------------------------
-
-tokVal = tokType = tokLn = None
-
-tup = iter( tokens )
-
-def nextTok():
- """
- Function to read the next token from tup into tokType, tokVal, tokLn (linenumber)
- which are globals.
- """
- global tokType, tokVal, tokLn, tup
- tokType, tokVal, tokLn = tup.__next__()
-
-
-class ParseError(Exception):
- """A class to hold a parsing error message"""
- def __init__(self, linenumber, token, message):
- self.linenumber = linenumber
- self.token = token
- self.message = message
- def __str__(self):
- global inputFilename
- return "Error in file \'%s\' at line %d near token %s\n %s" % (
- inputFilename, self.linenumber, repr(self.token), self.message)
-
-
-class MASKSET(object):
- """
- Class MASKSET holds a set of bit vectors, all of which are related, will all
- have the same length, and are associated with one of the seven shiftOps:
- HIR, HDR, TIR, TDR, SIR, SDR, LSDR. One of these holds a mask, smask, tdi, tdo, and a
- size.
- """
- def __init__(self, name):
- self.empty()
- self.name = name
-
- def empty(self):
- self.mask = bytearray()
- self.smask = bytearray()
- self.tdi = bytearray()
- self.tdo = bytearray()
- self.size = 0
-
- def syncLengths( self, sawTDI, sawTDO, sawMASK, sawSMASK, newSize ):
- """
- Set all the lengths equal in the event some of the masks were
- not seen as part of the last change set.
- """
- if self.size == newSize:
- return
-
- if newSize == 0:
- self.empty()
- return
-
- # If an SIR was given without a MASK(), then use a mask of all zeros.
- # this is not consistent with the SVF spec, but it makes sense because
- # it would be odd to be testing an instruction register read out of a
- # tap without giving a mask for it. Also, lattice seems to agree and is
- # generating SVF files that comply with this philosophy.
- if self.name == 'SIR' and not sawMASK:
- self.mask = bytearray( newSize )
-
- if newSize != len(self.mask):
- self.mask = bytearray( newSize )
- if self.name == 'SDR': # leave mask for HIR,HDR,TIR,TDR,SIR zeros
- for i in range( newSize ):
- self.mask[i] = 1
-
- if newSize != len(self.tdo):
- self.tdo = bytearray( newSize )
-
- if newSize != len(self.tdi):
- self.tdi = bytearray( newSize )
-
- if newSize != len(self.smask):
- self.smask = bytearray( newSize )
-
- self.size = newSize
-#-----</MASKSET>-----
-
-
-def makeBitArray( hexString, bitCount ):
- """
- Converts a packed sequence of hex ascii characters into a bytearray where
- each element in the array holds exactly one bit. Only "bitCount" bits are
- scanned and these must be the least significant bits in the hex number. That
- is, it is legal to have some unused bits in the must significant hex nibble
- of the input "hexString". The string is scanned starting from the backend,
- then just before returning we reverse the array. This way the append()
- method can be used, which I assume is faster than an insert.
- """
- global tokLn
- a = bytearray()
- length = bitCount
- hexString = list(hexString)
- hexString.reverse()
- #print(hexString)
- for c in hexString:
- if length <= 0:
- break;
- c = int(c, 16)
- for mask in [1,2,4,8]:
- if length <= 0:
- break;
- length = length - 1
- a.append( (c & mask) != 0 )
- if length > 0:
- raise ParseError( tokLn, hexString, "Insufficient hex characters for given length of %d" % bitCount )
- a.reverse()
- #print(a)
- return a
-
-
-def makeXSVFbytes( bitarray ):
- """
- Make a bytearray which is contains the XSVF bits which will be written
- directly to disk. The number of bytes needed is calculated from the size
- of the argument bitarray.
- """
- bitCount = len(bitarray)
- byteCount = (bitCount+7)//8
- ba = bytearray( byteCount )
- firstBit = (bitCount % 8) - 1
- if firstBit == -1:
- firstBit = 7
- bitNdx = 0
- for byteNdx in range(byteCount):
- mask = 1<<firstBit
- byte = 0
- while mask:
- if bitarray[bitNdx]:
- byte |= mask;
- mask = mask >> 1
- bitNdx = bitNdx + 1
- ba[byteNdx] = byte
- firstBit = 7
- return ba
-
-
-def writeComment( outputFile, shiftOp_linenum, shiftOp ):
- """
- Write an XCOMMENT record to outputFile
- """
- comment = "%s @%d\0" % (shiftOp, shiftOp_linenum) # \0 is terminating nul
- ba = bytearray(1)
- ba[0] = XCOMMENT
- ba += comment.encode()
- outputFile.write( ba )
-
-
-def combineBitVectors( trailer, meat, header ):
- """
- Combine the 3 bit vectors comprizing a transmission. Since the least
- significant bits are sent first, the header is put onto the list last so
- they are sent first from that least significant position.
- """
- ret = bytearray()
- ret.extend( trailer )
- ret.extend( meat )
- ret.extend( header )
- return ret
-
-
-def writeRUNTEST( outputFile, run_state, end_state, run_count, min_time, tokenTxt ):
- """
- Write the output for the SVF RUNTEST command.
- run_count - the number of clocks
- min_time - the number of seconds
- tokenTxt - either RUNTEST or LDELAY
- """
- # convert from secs to usecs
- min_time = int( min_time * 1000000)
-
- # the SVF RUNTEST command does NOT map to the XSVF XRUNTEST command. Check the SVF spec, then
- # read the XSVF command. They are not the same. Use an XSVF XWAITSTATE to
- # implement the required behavior of the SVF RUNTEST command.
- if doCOMMENTs:
- writeComment( output, tokLn, tokenTxt )
-
- if tokenTxt == 'RUNTEST':
- obuf = bytearray(11)
- obuf[0] = XWAITSTATE
- obuf[1] = run_state
- obuf[2] = end_state
- struct.pack_into(">i", obuf, 3, run_count ) # big endian 4 byte int to obuf
- struct.pack_into(">i", obuf, 7, min_time ) # big endian 4 byte int to obuf
- outputFile.write( obuf )
- else: # == 'LDELAY'
- obuf = bytearray(10)
- obuf[0] = LDELAY
- obuf[1] = run_state
- # LDELAY has no end_state
- struct.pack_into(">i", obuf, 2, run_count ) # big endian 4 byte int to obuf
- struct.pack_into(">i", obuf, 6, min_time ) # big endian 4 byte int to obuf
- outputFile.write( obuf )
-
-
-output = open( outputFilename, mode='wb' )
-
-hir = MASKSET('HIR')
-hdr = MASKSET('HDR')
-tir = MASKSET('TIR')
-tdr = MASKSET('TDR')
-sir = MASKSET('SIR')
-sdr = MASKSET('SDR')
-
-
-expecting_eof = True
-
-
-# one of the commands that take the shiftParts after the length, the parse
-# template for all of these commands is identical
-shiftOps = ('SDR', 'SIR', 'LSDR', 'HDR', 'HIR', 'TDR', 'TIR')
-
-# the order must correspond to shiftOps, this holds the MASKSETS. 'LSDR' shares sdr with 'SDR'
-shiftSets = (sdr, sir, sdr, hdr, hir, tdr, tir )
-
-# what to expect as parameters to a shiftOp, i.e. after a SDR length or SIR length
-shiftParts = ('TDI', 'TDO', 'MASK', 'SMASK')
-
-# the set of legal states which can trail the RUNTEST command
-run_state_allowed = ('IRPAUSE', 'DRPAUSE', 'RESET', 'IDLE')
-
-enddr_state_allowed = ('DRPAUSE', 'IDLE')
-endir_state_allowed = ('IRPAUSE', 'IDLE')
-
-trst_mode_allowed = ('ON', 'OFF', 'Z', 'ABSENT')
-
-enddr_state = IDLE
-endir_state = IDLE
-
-frequency = 1.00e+006 # HZ;
-
-# change detection for xsdrsize and xtdomask
-xsdrsize = -1 # the last one sent, send only on change
-xtdomask = bytearray() # the last one sent, send only on change
-
-
-# we use a number of single byte writes for the XSVF command below
-cmdbuf = bytearray(1)
-
-
-# Save the XREPEAT setting into the file as first thing.
-obuf = bytearray(2)
-obuf[0] = XREPEAT
-obuf[1] = xrepeat
-output.write( obuf )
-
-
-try:
- while 1:
- expecting_eof = True
- nextTok()
- expecting_eof = False
- # print( tokType, tokVal, tokLn )
-
- if tokVal in shiftOps:
- shiftOp_linenum = tokLn
- shiftOp = tokVal
-
- set = shiftSets[shiftOps.index(shiftOp)]
-
- # set flags false, if we see one later, set that one true later
- sawTDI = sawTDO = sawMASK = sawSMASK = False
-
- nextTok()
- if tokType != 'int':
- raise ParseError( tokLn, tokVal, "Expecting 'int' giving %s length, got '%s'" % (shiftOp, tokType) )
- length = tokVal
-
- nextTok()
-
- while tokVal != ';':
- if tokVal not in shiftParts:
- raise ParseError( tokLn, tokVal, "Expecting TDI, TDO, MASK, SMASK, or ';'")
- shiftPart = tokVal
-
- nextTok()
-
- if tokType != 'hex':
- raise ParseError( tokLn, tokVal, "Expecting hex bits" )
- bits = makeBitArray( tokVal, length )
-
- if shiftPart == 'TDI':
- sawTDI = True
- set.tdi = bits
-
- elif shiftPart == 'TDO':
- sawTDO = True
- set.tdo = bits
-
- elif shiftPart == 'MASK':
- sawMASK = True
- set.mask = bits
-
- elif shiftPart == 'SMASK':
- sawSMASK = True
- set.smask = bits
-
- nextTok()
-
- set.syncLengths( sawTDI, sawTDO, sawMASK, sawSMASK, length )
-
- # process all the gathered parameters and generate outputs here
- if shiftOp == 'SIR':
- if doCOMMENTs:
- writeComment( output, shiftOp_linenum, 'SIR' )
-
- tdi = combineBitVectors( tir.tdi, sir.tdi, hir.tdi )
- if len(tdi) > 255:
- obuf = bytearray(3)
- obuf[0] = XSIR2
- struct.pack_into( ">h", obuf, 1, len(tdi) )
- else:
- obuf = bytearray(2)
- obuf[0] = XSIR
- obuf[1] = len(tdi)
- output.write( obuf )
- obuf = makeXSVFbytes( tdi )
- output.write( obuf )
-
- elif shiftOp == 'SDR':
- if doCOMMENTs:
- writeComment( output, shiftOp_linenum, shiftOp )
-
- if not sawTDO:
- # pass a zero filled bit vector for the sdr.mask
- mask = combineBitVectors( tdr.mask, bytearray(sdr.size), hdr.mask )
- tdi = combineBitVectors( tdr.tdi, sdr.tdi, hdr.tdi )
-
- if xsdrsize != len(tdi):
- xsdrsize = len(tdi)
- cmdbuf[0] = XSDRSIZE
- output.write( cmdbuf )
- obuf = bytearray(4)
- struct.pack_into( ">i", obuf, 0, xsdrsize ) # big endian 4 byte int to obuf
- output.write( obuf )
-
- if xtdomask != mask:
- xtdomask = mask
- cmdbuf[0] = XTDOMASK
- output.write( cmdbuf )
- obuf = makeXSVFbytes( mask )
- output.write( obuf )
-
- cmdbuf[0] = XSDR
- output.write( cmdbuf )
- obuf = makeXSVFbytes( tdi )
- output.write( obuf )
-
- else:
- mask = combineBitVectors( tdr.mask, sdr.mask, hdr.mask )
- tdi = combineBitVectors( tdr.tdi, sdr.tdi, hdr.tdi )
- tdo = combineBitVectors( tdr.tdo, sdr.tdo, hdr.tdo )
-
- if xsdrsize != len(tdi):
- xsdrsize = len(tdi)
- cmdbuf[0] = XSDRSIZE
- output.write( cmdbuf )
- obuf = bytearray(4)
- struct.pack_into(">i", obuf, 0, xsdrsize ) # big endian 4 byte int to obuf
- output.write( obuf )
-
- if xtdomask != mask:
- xtdomask = mask
- cmdbuf[0] = XTDOMASK
- output.write( cmdbuf )
- obuf = makeXSVFbytes( mask )
- output.write( obuf )
-
- cmdbuf[0] = XSDRTDO
- output.write( cmdbuf )
- obuf = makeXSVFbytes( tdi )
- output.write( obuf )
- obuf = makeXSVFbytes( tdo )
- output.write( obuf )
- #print( "len(tdo)=", len(tdo), "len(tdr.tdo)=", len(tdr.tdo), "len(sdr.tdo)=", len(sdr.tdo), "len(hdr.tdo)=", len(hdr.tdo) )
-
- elif shiftOp == 'LSDR':
- if doCOMMENTs:
- writeComment( output, shiftOp_linenum, shiftOp )
-
- mask = combineBitVectors( tdr.mask, sdr.mask, hdr.mask )
- tdi = combineBitVectors( tdr.tdi, sdr.tdi, hdr.tdi )
- tdo = combineBitVectors( tdr.tdo, sdr.tdo, hdr.tdo )
-
- if xsdrsize != len(tdi):
- xsdrsize = len(tdi)
- cmdbuf[0] = XSDRSIZE
- output.write( cmdbuf )
- obuf = bytearray(4)
- struct.pack_into(">i", obuf, 0, xsdrsize ) # big endian 4 byte int to obuf
- output.write( obuf )
-
- if xtdomask != mask:
- xtdomask = mask
- cmdbuf[0] = XTDOMASK
- output.write( cmdbuf )
- obuf = makeXSVFbytes( mask )
- output.write( obuf )
-
- cmdbuf[0] = LSDR
- output.write( cmdbuf )
- obuf = makeXSVFbytes( tdi )
- output.write( obuf )
- obuf = makeXSVFbytes( tdo )
- output.write( obuf )
- #print( "len(tdo)=", len(tdo), "len(tdr.tdo)=", len(tdr.tdo), "len(sdr.tdo)=", len(sdr.tdo), "len(hdr.tdo)=", len(hdr.tdo) )
-
- elif tokVal == 'RUNTEST' or tokVal == 'LDELAY':
- # e.g. from lattice tools:
- # "RUNTEST IDLE 5 TCK 1.00E-003 SEC;"
- saveTok = tokVal
- nextTok()
- min_time = 0
- run_count = 0
- max_time = 600 # ten minutes
- if tokVal in run_state_allowed:
- run_state = StateTxt.index(tokVal)
- end_state = run_state # bottom of page 17 of SVF spec
- nextTok()
- if tokType != 'int' and tokType != 'float':
- raise ParseError( tokLn, tokVal, "Expecting 'int' or 'float' after RUNTEST [run_state]")
- timeval = tokVal;
- nextTok()
- if tokVal != 'TCK' and tokVal != 'SEC' and tokVal != 'SCK':
- raise ParseError( tokLn, tokVal, "Expecting 'TCK' or 'SEC' or 'SCK' after RUNTEST [run_state] (run_count|min_time)")
- if tokVal == 'TCK' or tokVal == 'SCK':
- run_count = int( timeval )
- else:
- min_time = timeval
- nextTok()
- if tokType == 'int' or tokType == 'float':
- min_time = tokVal
- nextTok()
- if tokVal != 'SEC':
- raise ParseError( tokLn, tokVal, "Expecting 'SEC' after RUNTEST [run_state] run_count min_time")
- nextTok()
- if tokVal == 'MAXIMUM':
- nextTok()
- if tokType != 'int' and tokType != 'float':
- raise ParseError( tokLn, tokVal, "Expecting 'max_time' after RUNTEST [run_state] min_time SEC MAXIMUM")
- max_time = tokVal
- nextTok()
- if tokVal != 'SEC':
- raise ParseError( tokLn, tokVal, "Expecting 'max_time' after RUNTEST [run_state] min_time SEC MAXIMUM max_time")
- nextTok()
- if tokVal == 'ENDSTATE':
- nextTok()
- if tokVal not in run_state_allowed:
- raise ParseError( tokLn, tokVal, "Expecting 'run_state' after RUNTEST .... ENDSTATE")
- end_state = StateTxt.index(tokVal)
- nextTok()
- if tokVal != ';':
- raise ParseError( tokLn, tokVal, "Expecting ';' after RUNTEST ....")
- # print( "run_count=", run_count, "min_time=", min_time,
- # "max_time=", max_time, "run_state=", State[run_state], "end_state=", State[end_state] )
- writeRUNTEST( output, run_state, end_state, run_count, min_time, saveTok )
-
- elif tokVal == 'LCOUNT':
- nextTok()
- if tokType != 'int':
- raise ParseError( tokLn, tokVal, "Expecting integer 'count' after LCOUNT")
- loopCount = tokVal
- nextTok()
- if tokVal != ';':
- raise ParseError( tokLn, tokVal, "Expecting ';' after LCOUNT count")
- if doCOMMENTs:
- writeComment( output, tokLn, 'LCOUNT' )
- obuf = bytearray(5)
- obuf[0] = LCOUNT
- struct.pack_into(">i", obuf, 1, loopCount ) # big endian 4 byte int to obuf
- output.write( obuf )
-
- elif tokVal == 'ENDDR':
- nextTok()
- if tokVal not in enddr_state_allowed:
- raise ParseError( tokLn, tokVal, "Expecting 'stable_state' after ENDDR. (one of: DRPAUSE, IDLE)")
- enddr_state = StateTxt.index(tokVal)
- nextTok()
- if tokVal != ';':
- raise ParseError( tokLn, tokVal, "Expecting ';' after ENDDR stable_state")
- if doCOMMENTs:
- writeComment( output, tokLn, 'ENDDR' )
- obuf = bytearray(2)
- obuf[0] = XENDDR
- # Page 10 of the March 1999 SVF spec shows that RESET is also allowed here.
- # Yet the XSVF spec has no provision for that, and uses a non-standard, i.e.
- # boolean argument to XENDDR which only handles two of the 3 intended states.
- obuf[1] = 1 if enddr_state == DRPAUSE else 0
- output.write( obuf )
-
- elif tokVal == 'ENDIR':
- nextTok()
- if tokVal not in endir_state_allowed:
- raise ParseError( tokLn, tokVal, "Expecting 'stable_state' after ENDIR. (one of: IRPAUSE, IDLE)")
- endir_state = StateTxt.index(tokVal)
- nextTok()
- if tokVal != ';':
- raise ParseError( tokLn, tokVal, "Expecting ';' after ENDIR stable_state")
- if doCOMMENTs:
- writeComment( output, tokLn, 'ENDIR' )
- obuf = bytearray(2)
- obuf[0] = XENDIR
- # Page 10 of the March 1999 SVF spec shows that RESET is also allowed here.
- # Yet the XSVF spec has no provision for that, and uses a non-standard, i.e.
- # boolean argument to XENDDR which only handles two of the 3 intended states.
- obuf[1] = 1 if endir_state == IRPAUSE else 0
- output.write( obuf )
-
- elif tokVal == 'STATE':
- nextTok()
- ln = tokLn
- while tokVal != ';':
- if tokVal not in StateTxt:
- raise ParseError( tokLn, tokVal, "Expecting 'stable_state' after STATE")
- stable_state = StateTxt.index( tokVal )
-
- if doCOMMENTs and ln != -1:
- writeComment( output, ln, 'STATE' )
- ln = -1 # save comment only once
-
- obuf = bytearray(2)
- obuf[0] = XSTATE
- obuf[1] = stable_state
- output.write( obuf )
- nextTok()
-
- elif tokVal == 'FREQUENCY':
- nextTok()
- if tokVal != ';':
- if tokType != 'int' and tokType != 'float':
- raise ParseError( tokLn, tokVal, "Expecting 'cycles HZ' after FREQUENCY")
- frequency = tokVal
- nextTok()
- if tokVal != 'HZ':
- raise ParseError( tokLn, tokVal, "Expecting 'HZ' after FREQUENCY cycles")
- nextTok()
- if tokVal != ';':
- raise ParseError( tokLn, tokVal, "Expecting ';' after FREQUENCY cycles HZ")
-
- elif tokVal == 'TRST':
- nextTok()
- if tokVal not in trst_mode_allowed:
- raise ParseError( tokLn, tokVal, "Expecting 'ON|OFF|Z|ABSENT' after TRST")
- trst_mode = tokVal
- nextTok()
- if tokVal != ';':
- raise ParseError( tokLn, tokVal, "Expecting ';' after TRST trst_mode")
- if doCOMMENTs:
- writeComment( output, tokLn, 'TRST %s' % trst_mode )
- obuf = bytearray( 2 )
- obuf[0] = XTRST
- obuf[1] = trst_mode_allowed.index( trst_mode ) # use the index as the binary argument to XTRST opcode
- output.write( obuf )
-
- else:
- raise ParseError( tokLn, tokVal, "Unknown token '%s'" % tokVal)
-
-except StopIteration:
- if not expecting_eof:
- print( "Unexpected End of File at line ", tokLn )
-
-except ParseError as pe:
- print( "\n", pe )
-
-finally:
- # print( "closing file" )
- cmdbuf[0] = XCOMPLETE
- output.write( cmdbuf )
- output.close()
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/xsvf_tools/xsvfdump.py
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/xsvf_tools/xsvfdump.py b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/xsvf_tools/xsvfdump.py
deleted file mode 100755
index e65f8d5..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/contrib/xsvf_tools/xsvfdump.py
+++ /dev/null
@@ -1,268 +0,0 @@
-#!/usr/bin/python3.0
-
-# Copyright 2008, SoftPLC Corporation http://softplc.com
-# Dick Hollenbeck dick@softplc.com
-
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; either version 2
-# of the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, you may find one here:
-# http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
-# or you may search the http://www.gnu.org website for the version 2 license,
-# or you may write to the Free Software Foundation, Inc.,
-# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
-
-# Dump an Xilinx XSVF file to stdout
-
-# This program is written for python 3.0, and it is not easy to change this
-# back to 2.x. You may find it easier to use python 3.x even if that means
-# building it.
-
-
-import sys
-import struct
-
-
-LABEL = "A script to dump an XSVF file to stdout"
-
-
-Xsdrsize = 0
-
-
-(XCOMPLETE,XTDOMASK,XSIR,XSDR,XRUNTEST,hole0,hole1,XREPEAT,XSDRSIZE,XSDRTDO,
- XSETSDRMASKS,XSDRINC,XSDRB,XSDRC,XSDRE,XSDRTDOB,XSDRTDOC,
- XSDRTDOE,XSTATE,XENDIR,XENDDR,XSIR2,XCOMMENT,XWAIT,XWAITSTATE,
- LCOUNT,LDELAY,LSDR,XTRST) = range(29)
-
-
-(RESET,IDLE,
- DRSELECT,DRCAPTURE,DRSHIFT,DREXIT1,DRPAUSE,DREXIT2,DRUPDATE,
- IRSELECT,IRCAPTURE,IRSHIFT,IREXIT1,IRPAUSE,IREXIT2,IRUPDATE) = range(16)
-
-
-State = ("RESET","IDLE",
- "DRSELECT","DRCAPTURE","DRSHIFT","DREXIT1","DRPAUSE","DREXIT2","DRUPDATE",
- "IRSELECT","IRCAPTURE","IRSHIFT","IREXIT1","IRPAUSE","IREXIT2","IRUPDATE")
-
-
-trst_mode_allowed = ('ON', 'OFF', 'Z', 'ABSENT')
-
-
-Setsdrmasks = 0
-SetsdrmasksOnesCount = 0
-
-def ReadSDRMASKS( f, len ):
- global Setsdrmasks, SetsdrmasksOnesCount
- byteCount = (len+7)//8
- Setsdrmasks = f.read( byteCount )
- ls = []
- SetsdrmasksOnesCount = 0
- for b in Setsdrmasks:
- ls.append( "%x" % ((b & 0xf0) >> 4) )
- ls.append( "%x" % ( b & 0x0f ) )
- for i in range(8):
- if b & (1<<i):
- SetsdrmasksOnesCount = SetsdrmasksOnesCount +1
- return ''.join(ls)
-
-
-def bytes2hexString( f, len ):
- byteCount = (len+7)//8
- bytebuf = f.read( byteCount )
- ls = []
- for b in bytebuf:
- ls.append( "%x" % ((b & 0xf0) >> 4) )
- ls.append( "%x" % ( b & 0x0f ) )
- return ''.join(ls)
-
-
-def ReadByte( f ):
- """Read a byte from a file and return it as an int in least significant 8 bits"""
- b = f.read(1)
- if b:
- return 0xff & b[0];
- else:
- return -1
-
-
-def ShowState( state ):
- """return the given state int as a state string"""
- #return "0x%02x" % state # comment this out to get textual state form
- global State
- if 0 <= state <= IRUPDATE:
- return State[state]
- else:
- return "Unknown state 0x%02x" % state
-
-
-def ShowOpcode( op, f ):
- """return the given byte as an opcode string"""
- global Xsdrsize
- if op == XCOMPLETE:
- print("XCOMPLETE")
-
- elif op == XTDOMASK:
- buf = bytes2hexString( f, Xsdrsize )
- print("XTDOMASK 0x%s" % buf)
-
- elif op == XSIR:
- len = ReadByte( f )
- buf = bytes2hexString( f, len )
- print("XSIR 0x%02X 0x%s" % (len, buf))
-
- elif op == XSDR:
- tdi = bytes2hexString( f, Xsdrsize )
- print("XSDR 0x%s" % tdi)
-
- elif op == XRUNTEST:
- len = struct.unpack( '>i', f.read(4) )[0]
- print("XRUNTEST 0x%08X" % len)
-
- elif op == XREPEAT:
- len = ReadByte( f )
- print("XREPEAT 0x%02X" % len)
-
- elif op == XSDRSIZE:
- Xsdrsize = struct.unpack( '>i', f.read(4) )[0]
- #print("XSDRSIZE 0x%08X" % Xsdrsize, file=sys.stderr )
- print("XSDRSIZE 0x%08X %d" % (Xsdrsize, Xsdrsize) )
-
- elif op == XSDRTDO:
- tdi = bytes2hexString( f, Xsdrsize )
- tdo = bytes2hexString( f, Xsdrsize )
- print("XSDRTDO 0x%s 0x%s" % (tdi, tdo) )
-
- elif op == XSETSDRMASKS:
- addrmask = bytes2hexString( f, Xsdrsize )
- datamask = ReadSDRMASKS( f, Xsdrsize )
- print("XSETSDRMASKS 0x%s 0x%s" % (addrmask, datamask) )
-
- elif op == XSDRINC:
- startaddr = bytes2hexString( f, Xsdrsize )
- len = ReadByte(f)
- print("XSDRINC 0x%s 0x%02X" % (startaddr, len), end='' )
- for numTimes in range(len):
- data = bytes2hexString( f, SetsdrmasksOnesCount)
- print(" 0x%s" % data )
- print() # newline
-
- elif op == XSDRB:
- tdi = bytes2hexString( f, Xsdrsize )
- print("XSDRB 0x%s" % tdi )
-
- elif op == XSDRC:
- tdi = bytes2hexString( f, Xsdrsize )
- print("XSDRC 0x%s" % tdi )
-
- elif op == XSDRE:
- tdi = bytes2hexString( f, Xsdrsize )
- print("XSDRE 0x%s" % tdi )
-
- elif op == XSDRTDOB:
- tdo = bytes2hexString( f, Xsdrsize )
- print("XSDRTDOB 0x%s" % tdo )
-
- elif op == XSDRTDOC:
- tdi = bytes2hexString( f, Xsdrsize )
- tdo = bytes2hexString( f, Xsdrsize )
- print("XSDRTDOC 0x%s 0x%s" % (tdi, tdo) )
-
- elif op == XSDRTDOE:
- tdi = bytes2hexString( f, Xsdrsize )
- tdo = bytes2hexString( f, Xsdrsize )
- print("XSDRTDOE 0x%s 0x%s" % (tdi, tdo) )
-
- elif op == XSTATE:
- b = ReadByte(f)
- print("XSTATE %s" % ShowState(b))
-
- elif op == XENDIR:
- b = ReadByte( f )
- print("XENDIR %s" % 'IRPAUSE' if b==1 else 'IDLE')
-
- elif op == XENDDR:
- b = ReadByte( f )
- print("XENDDR %s" % 'DRPAUSE' if b==1 else 'IDLE')
-
- elif op == XSIR2:
- len = struct.unpack( '>H', f.read(2) )[0]
- buf = bytes2hexString( f, len )
- print("XSIR2 0x%04X 0x%s" % (len, buf))
-
- elif op == XCOMMENT:
- cmt = []
- while 1:
- b = ReadByte(f)
- if b == 0: # terminating nul
- break;
- cmt.append( chr(b) )
- print("XCOMMENT \"%s\"" % ''.join(cmt) )
-
- elif op == XWAIT:
- run_state = ReadByte(f)
- end_state = ReadByte(f)
- useconds = struct.unpack( '>i', f.read(4) )[0]
- print("XWAIT %s %s" % (ShowState(run_state), ShowState(end_state)), useconds)
-
- elif op == XWAITSTATE:
- run_state = ReadByte(f)
- end_state = ReadByte(f)
- clocks = struct.unpack( '>i', f.read(4) )[0]
- useconds = struct.unpack( '>i', f.read(4) )[0]
- print("XWAITSTATE %s %s CLOCKS=%d USECS=%d" % (ShowState(run_state), ShowState(end_state), clocks, useconds) )
-
- elif op == LCOUNT:
- loop_count = struct.unpack( '>i', f.read(4) )[0]
- print("LCOUNT", loop_count )
-
- elif op == LDELAY:
- run_state = ReadByte(f)
- clocks = struct.unpack( '>i', f.read(4) )[0]
- useconds = struct.unpack( '>i', f.read(4) )[0]
- print("LDELAY %s CLOCKS=%d USECS=%d" % (ShowState(run_state), clocks, useconds) )
-
- elif op == LSDR:
- tdi = bytes2hexString( f, Xsdrsize )
- tdo = bytes2hexString( f, Xsdrsize )
- print("LSDR 0x%s 0x%s" % (tdi, tdo) )
-
- elif op == XTRST:
- # the argument is a single byte and it is the index into "trst_mode_allowed"
- trst_mode = ReadByte(f)
- if trst_mode <= 3:
- print("TRST %s" % trst_mode_allowed[trst_mode] )
- else:
- print("TRST 0x%02X" % trst_mode );
-
- else:
- print("UNKNOWN op 0x%02X %d" % (op, op))
- exit(1)
-
-
-def main():
-
- if len( sys.argv ) < 2:
- print("usage %s <xsvf_filename>" % sys.argv[0])
- exit(1)
-
- f = open( sys.argv[1], 'rb' )
-
- opcode = ReadByte( f )
- while opcode != -1:
- # print the position within the file, then the command
- print( "%d: " % f.tell(), end='' )
- ShowOpcode( opcode, f )
- opcode = ReadByte(f)
-
-
-if __name__ == "__main__":
- main()
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/INSTALL.txt
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/INSTALL.txt b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/INSTALL.txt
deleted file mode 100755
index c329be2..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/INSTALL.txt
+++ /dev/null
@@ -1,204 +0,0 @@
-TODO!!! this should be merged into openocd.texi!!!
-
-
-Prerequisites
-=============
-
-When building with support for FTDI FT2232 based devices, you need at least
-one of the following libraries:
-
-- libftdi (http://www.intra2net.com/opensource/ftdi/)
-- libftd2xx (http://www.ftdichip.com/Drivers/D2XX.htm)
-
-On Windows, you need either Cygwin or MinGW, but compilation for MinGW is also
-possible using a Cygwin host.
-
-Basic Installation
-==================
-
- OpenOCD is distributed without autotools generated files, i.e. without a
-configure script. Run ./bootstrap in the openocd directory to have all
-necessary files generated.
-
- You have to explicitly enable desired JTAG interfaces during configure:
-
-./configure --enable-parport --enable-ft2232-libftdi (OR --enable-ft2232-ftd2xx) \
- --enable-amtjtagaccel
-
- Under Windows/Cygwin, only the ftd2xx driver is supported for FT2232 based
-devices. You have to specify the location of the FTDI driver package with the
---with-ftd2xx=/full/path/name option.
-
-Under Linux you can choose to build the parport driver with support for
-/dev/parportN instead of the default access with direct port I/O using
---enable-parport_ppdev. This has the advantage of running OpenOCD without root
-privileges at the expense of a slight performance decrease. This is also
-available on FreeBSD using PPI, but the naming of the devices is different.
-
-Generic installation instructions
-=================================
-
- These are generic installation instructions.
-
- The `configure' shell script attempts to guess correct values for
-various system-dependent variables used during compilation. It uses
-those values to create a `Makefile' in each directory of the package.
-It may also create one or more `.h' files containing system-dependent
-definitions. Finally, it creates a shell script `config.status' that
-you can run in the future to recreate the current configuration, a file
-`config.cache' that saves the results of its tests to speed up
-reconfiguring, and a file `config.log' containing compiler output
-(useful mainly for debugging `configure').
-
- If you need to do unusual things to compile the package, please try
-to figure out how `configure' could check whether to do them, and mail
-diffs or instructions to the address given in the `README' so they can
-be considered for the next release. If at some point `config.cache'
-contains results you don't want to keep, you may remove or edit it.
-
- The file `configure.in' is used to create `configure' by a program
-called `autoconf'. You only need `configure.in' if you want to change
-it or regenerate `configure' using a newer version of `autoconf'.
-
-The simplest way to compile this package is:
-
- 1. `cd' to the directory containing the package's source code and type
- `./configure' to configure the package for your system. If you're
- using `csh' on an old version of System V, you might need to type
- `sh ./configure' instead to prevent `csh' from trying to execute
- `configure' itself.
-
- Running `configure' takes a while. While running, it prints some
- messages telling which features it is checking for.
-
- 2. Type `make' to compile the package.
-
- 3. Type `make install' to install the programs and any data files and
- documentation.
-
- 4. You can remove the program binaries and object files from the
- source code directory by typing `make clean'.
-
-Compilers and Options
-=====================
-
- Some systems require unusual options for compilation or linking that
-the `configure' script does not know about. You can give `configure'
-initial values for variables by setting them in the environment. Using
-a Bourne-compatible shell, you can do that on the command line like
-this:
- CC=c89 CFLAGS=-O2 LIBS=-lposix ./configure
-
-Or on systems that have the `env' program, you can do it like this:
- env CPPFLAGS=-I/usr/local/include LDFLAGS=-s ./configure
-
-Compiling For Multiple Architectures
-====================================
-
- You can compile the package for more than one kind of computer at the
-same time, by placing the object files for each architecture in their
-own directory. To do this, you must use a version of `make' that
-supports the `VPATH' variable, such as GNU `make'. `cd' to the
-directory where you want the object files and executables to go and run
-the `configure' script. `configure' automatically checks for the
-source code in the directory that `configure' is in and in `..'.
-
- If you have to use a `make' that does not supports the `VPATH'
-variable, you have to compile the package for one architecture at a time
-in the source code directory. After you have installed the package for
-one architecture, use `make distclean' before reconfiguring for another
-architecture.
-
-Installation Names
-==================
-
- By default, `make install' will install the package's files in
-`/usr/local/bin', `/usr/local/man', etc. You can specify an
-installation prefix other than `/usr/local' by giving `configure' the
-option `--prefix=PATH'.
-
- You can specify separate installation prefixes for
-architecture-specific files and architecture-independent files. If you
-give `configure' the option `--exec-prefix=PATH', the package will use
-PATH as the prefix for installing programs and libraries.
-Documentation and other data files will still use the regular prefix.
-
- If the package supports it, you can cause programs to be installed
-with an extra prefix or suffix on their names by giving `configure' the
-option `--program-prefix=PREFIX' or `--program-suffix=SUFFIX'.
-
-Optional Features
-=================
-
- Some packages pay attention to `--enable-FEATURE' options to
-`configure', where FEATURE indicates an optional part of the package.
-They may also pay attention to `--with-PACKAGE' options, where PACKAGE
-is something like `gnu-as' or `x' (for the X Window System). The
-`README' should mention any `--enable-' and `--with-' options that the
-package recognizes.
-
- For packages that use the X Window System, `configure' can usually
-find the X include and library files automatically, but if it doesn't,
-you can use the `configure' options `--x-includes=DIR' and
-`--x-libraries=DIR' to specify their locations.
-
-Specifying the System Type
-==========================
-
- There may be some features `configure' can not figure out
-automatically, but needs to determine by the type of host the package
-will run on. Usually `configure' can figure that out, but if it prints
-a message saying it can not guess the host type, give it the
-`--host=TYPE' option. TYPE can either be a short name for the system
-type, such as `sun4', or a canonical name with three fields:
- CPU-COMPANY-SYSTEM
-
-See the file `config.sub' for the possible values of each field. If
-`config.sub' isn't included in this package, then this package doesn't
-need to know the host type.
-
- If you are building compiler tools for cross-compiling, you can also
-use the `--target=TYPE' option to select the type of system they will
-produce code for and the `--build=TYPE' option to select the type of
-system on which you are compiling the package.
-
-Sharing Defaults
-================
-
- If you want to set default values for `configure' scripts to share,
-you can create a site shell script called `config.site' that gives
-default values for variables like `CC', `cache_file', and `prefix'.
-`configure' looks for `PREFIX/share/config.site' if it exists, then
-`PREFIX/etc/config.site' if it exists. Or, you can set the
-`CONFIG_SITE' environment variable to the location of the site script.
-A warning: not all `configure' scripts look for a site script.
-
-Operation Controls
-==================
-
- `configure' recognizes the following options to control how it
-operates.
-
-`--cache-file=FILE'
- Use and save the results of the tests in FILE instead of
- `./config.cache'. Set FILE to `/dev/null' to disable caching, for
- debugging `configure'.
-
-`--help'
- Print a summary of the options to `configure', and exit.
-
-`--quiet'
-`--silent'
-`-q'
- Do not print messages saying which checks are being made.
-
-`--srcdir=DIR'
- Look for the package's source code in directory DIR. Usually
- `configure' can determine that directory automatically.
-
-`--version'
- Print the version of Autoconf used to generate the `configure'
- script, and exit.
-
-`configure' also accepts some other, not widely useful, options.
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/Makefile.am
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/Makefile.am b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/Makefile.am
deleted file mode 100755
index 935c8f9..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/Makefile.am
+++ /dev/null
@@ -1,13 +0,0 @@
-info_TEXINFOS = openocd.texi
-openocd_TEXINFOS = fdl.texi
-man_MANS = openocd.1
-EXTRA_DIST = openocd.1 \
- manual \
- INSTALL.txt
-
-MAINTAINERCLEANFILES = \
- $(srcdir)/Makefile.in \
- $(srcdir)/mdate-sh \
- $(srcdir)/stamp-vti \
- $(srcdir)/version.texi \
- $(srcdir)/texinfo.tex
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/fdl.texi
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/fdl.texi b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/fdl.texi
deleted file mode 100755
index a18c33e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/fdl.texi
+++ /dev/null
@@ -1,452 +0,0 @@
-@c -*-texinfo-*-
-@node License
-@appendix The GNU Free Documentation License.
-@center Version 1.2, November 2002
-
-@c This file is intended to be included within another document,
-@c hence no sectioning command or @node.
-
-@display
-Copyright @copyright{} 2000,2001,2002 Free Software Foundation, Inc.
-51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA
-
-Everyone is permitted to copy and distribute verbatim copies
-of this license document, but changing it is not allowed.
-@end display
-
-@enumerate 0
-@item
-PREAMBLE
-
-The purpose of this License is to make a manual, textbook, or other
-functional and useful document @dfn{free} in the sense of freedom: to
-assure everyone the effective freedom to copy and redistribute it,
-with or without modifying it, either commercially or noncommercially.
-Secondarily, this License preserves for the author and publisher a way
-to get credit for their work, while not being considered responsible
-for modifications made by others.
-
-This License is a kind of ``copyleft'', which means that derivative
-works of the document must themselves be free in the same sense. It
-complements the GNU General Public License, which is a copyleft
-license designed for free software.
-
-We have designed this License in order to use it for manuals for free
-software, because free software needs free documentation: a free
-program should come with manuals providing the same freedoms that the
-software does. But this License is not limited to software manuals;
-it can be used for any textual work, regardless of subject matter or
-whether it is published as a printed book. We recommend this License
-principally for works whose purpose is instruction or reference.
-
-@item
-APPLICABILITY AND DEFINITIONS
-
-This License applies to any manual or other work, in any medium, that
-contains a notice placed by the copyright holder saying it can be
-distributed under the terms of this License. Such a notice grants a
-world-wide, royalty-free license, unlimited in duration, to use that
-work under the conditions stated herein. The ``Document'', below,
-refers to any such manual or work. Any member of the public is a
-licensee, and is addressed as ``you''. You accept the license if you
-copy, modify or distribute the work in a way requiring permission
-under copyright law.
-
-A ``Modified Version'' of the Document means any work containing the
-Document or a portion of it, either copied verbatim, or with
-modifications and/or translated into another language.
-
-A ``Secondary Section'' is a named appendix or a front-matter section
-of the Document that deals exclusively with the relationship of the
-publishers or authors of the Document to the Document's overall
-subject (or to related matters) and contains nothing that could fall
-directly within that overall subject. (Thus, if the Document is in
-part a textbook of mathematics, a Secondary Section may not explain
-any mathematics.) The relationship could be a matter of historical
-connection with the subject or with related matters, or of legal,
-commercial, philosophical, ethical or political position regarding
-them.
-
-The ``Invariant Sections'' are certain Secondary Sections whose titles
-are designated, as being those of Invariant Sections, in the notice
-that says that the Document is released under this License. If a
-section does not fit the above definition of Secondary then it is not
-allowed to be designated as Invariant. The Document may contain zero
-Invariant Sections. If the Document does not identify any Invariant
-Sections then there are none.
-
-The ``Cover Texts'' are certain short passages of text that are listed,
-as Front-Cover Texts or Back-Cover Texts, in the notice that says that
-the Document is released under this License. A Front-Cover Text may
-be at most 5 words, and a Back-Cover Text may be at most 25 words.
-
-A ``Transparent'' copy of the Document means a machine-readable copy,
-represented in a format whose specification is available to the
-general public, that is suitable for revising the document
-straightforwardly with generic text editors or (for images composed of
-pixels) generic paint programs or (for drawings) some widely available
-drawing editor, and that is suitable for input to text formatters or
-for automatic translation to a variety of formats suitable for input
-to text formatters. A copy made in an otherwise Transparent file
-format whose markup, or absence of markup, has been arranged to thwart
-or discourage subsequent modification by readers is not Transparent.
-An image format is not Transparent if used for any substantial amount
-of text. A copy that is not ``Transparent'' is called ``Opaque''.
-
-Examples of suitable formats for Transparent copies include plain
-@sc{ascii} without markup, Texinfo input format, La@TeX{} input
-format, @acronym{SGML} or @acronym{XML} using a publicly available
-@acronym{DTD}, and standard-conforming simple @acronym{HTML},
-PostScript or @acronym{PDF} designed for human modification. Examples
-of transparent image formats include @acronym{PNG}, @acronym{XCF} and
-@acronym{JPG}. Opaque formats include proprietary formats that can be
-read and edited only by proprietary word processors, @acronym{SGML} or
-@acronym{XML} for which the @acronym{DTD} and/or processing tools are
-not generally available, and the machine-generated @acronym{HTML},
-PostScript or @acronym{PDF} produced by some word processors for
-output purposes only.
-
-The ``Title Page'' means, for a printed book, the title page itself,
-plus such following pages as are needed to hold, legibly, the material
-this License requires to appear in the title page. For works in
-formats which do not have any title page as such, ``Title Page'' means
-the text near the most prominent appearance of the work's title,
-preceding the beginning of the body of the text.
-
-A section ``Entitled XYZ'' means a named subunit of the Document whose
-title either is precisely XYZ or contains XYZ in parentheses following
-text that translates XYZ in another language. (Here XYZ stands for a
-specific section name mentioned below, such as ``Acknowledgements'',
-``Dedications'', ``Endorsements'', or ``History''.) To ``Preserve the Title''
-of such a section when you modify the Document means that it remains a
-section ``Entitled XYZ'' according to this definition.
-
-The Document may include Warranty Disclaimers next to the notice which
-states that this License applies to the Document. These Warranty
-Disclaimers are considered to be included by reference in this
-License, but only as regards disclaiming warranties: any other
-implication that these Warranty Disclaimers may have is void and has
-no effect on the meaning of this License.
-
-@item
-VERBATIM COPYING
-
-You may copy and distribute the Document in any medium, either
-commercially or noncommercially, provided that this License, the
-copyright notices, and the license notice saying this License applies
-to the Document are reproduced in all copies, and that you add no other
-conditions whatsoever to those of this License. You may not use
-technical measures to obstruct or control the reading or further
-copying of the copies you make or distribute. However, you may accept
-compensation in exchange for copies. If you distribute a large enough
-number of copies you must also follow the conditions in section 3.
-
-You may also lend copies, under the same conditions stated above, and
-you may publicly display copies.
-
-@item
-COPYING IN QUANTITY
-
-If you publish printed copies (or copies in media that commonly have
-printed covers) of the Document, numbering more than 100, and the
-Document's license notice requires Cover Texts, you must enclose the
-copies in covers that carry, clearly and legibly, all these Cover
-Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
-the back cover. Both covers must also clearly and legibly identify
-you as the publisher of these copies. The front cover must present
-the full title with all words of the title equally prominent and
-visible. You may add other material on the covers in addition.
-Copying with changes limited to the covers, as long as they preserve
-the title of the Document and satisfy these conditions, can be treated
-as verbatim copying in other respects.
-
-If the required texts for either cover are too voluminous to fit
-legibly, you should put the first ones listed (as many as fit
-reasonably) on the actual cover, and continue the rest onto adjacent
-pages.
-
-If you publish or distribute Opaque copies of the Document numbering
-more than 100, you must either include a machine-readable Transparent
-copy along with each Opaque copy, or state in or with each Opaque copy
-a computer-network location from which the general network-using
-public has access to download using public-standard network protocols
-a complete Transparent copy of the Document, free of added material.
-If you use the latter option, you must take reasonably prudent steps,
-when you begin distribution of Opaque copies in quantity, to ensure
-that this Transparent copy will remain thus accessible at the stated
-location until at least one year after the last time you distribute an
-Opaque copy (directly or through your agents or retailers) of that
-edition to the public.
-
-It is requested, but not required, that you contact the authors of the
-Document well before redistributing any large number of copies, to give
-them a chance to provide you with an updated version of the Document.
-
-@item
-MODIFICATIONS
-
-You may copy and distribute a Modified Version of the Document under
-the conditions of sections 2 and 3 above, provided that you release
-the Modified Version under precisely this License, with the Modified
-Version filling the role of the Document, thus licensing distribution
-and modification of the Modified Version to whoever possesses a copy
-of it. In addition, you must do these things in the Modified Version:
-
-@enumerate A
-@item
-Use in the Title Page (and on the covers, if any) a title distinct
-from that of the Document, and from those of previous versions
-(which should, if there were any, be listed in the History section
-of the Document). You may use the same title as a previous version
-if the original publisher of that version gives permission.
-
-@item
-List on the Title Page, as authors, one or more persons or entities
-responsible for authorship of the modifications in the Modified
-Version, together with at least five of the principal authors of the
-Document (all of its principal authors, if it has fewer than five),
-unless they release you from this requirement.
-
-@item
-State on the Title page the name of the publisher of the
-Modified Version, as the publisher.
-
-@item
-Preserve all the copyright notices of the Document.
-
-@item
-Add an appropriate copyright notice for your modifications
-adjacent to the other copyright notices.
-
-@item
-Include, immediately after the copyright notices, a license notice
-giving the public permission to use the Modified Version under the
-terms of this License, in the form shown in the Addendum below.
-
-@item
-Preserve in that license notice the full lists of Invariant Sections
-and required Cover Texts given in the Document's license notice.
-
-@item
-Include an unaltered copy of this License.
-
-@item
-Preserve the section Entitled ``History'', Preserve its Title, and add
-to it an item stating at least the title, year, new authors, and
-publisher of the Modified Version as given on the Title Page. If
-there is no section Entitled ``History'' in the Document, create one
-stating the title, year, authors, and publisher of the Document as
-given on its Title Page, then add an item describing the Modified
-Version as stated in the previous sentence.
-
-@item
-Preserve the network location, if any, given in the Document for
-public access to a Transparent copy of the Document, and likewise
-the network locations given in the Document for previous versions
-it was based on. These may be placed in the ``History'' section.
-You may omit a network location for a work that was published at
-least four years before the Document itself, or if the original
-publisher of the version it refers to gives permission.
-
-@item
-For any section Entitled ``Acknowledgements'' or ``Dedications'', Preserve
-the Title of the section, and preserve in the section all the
-substance and tone of each of the contributor acknowledgements and/or
-dedications given therein.
-
-@item
-Preserve all the Invariant Sections of the Document,
-unaltered in their text and in their titles. Section numbers
-or the equivalent are not considered part of the section titles.
-
-@item
-Delete any section Entitled ``Endorsements''. Such a section
-may not be included in the Modified Version.
-
-@item
-Do not retitle any existing section to be Entitled ``Endorsements'' or
-to conflict in title with any Invariant Section.
-
-@item
-Preserve any Warranty Disclaimers.
-@end enumerate
-
-If the Modified Version includes new front-matter sections or
-appendices that qualify as Secondary Sections and contain no material
-copied from the Document, you may at your option designate some or all
-of these sections as invariant. To do this, add their titles to the
-list of Invariant Sections in the Modified Version's license notice.
-These titles must be distinct from any other section titles.
-
-You may add a section Entitled ``Endorsements'', provided it contains
-nothing but endorsements of your Modified Version by various
-parties---for example, statements of peer review or that the text has
-been approved by an organization as the authoritative definition of a
-standard.
-
-You may add a passage of up to five words as a Front-Cover Text, and a
-passage of up to 25 words as a Back-Cover Text, to the end of the list
-of Cover Texts in the Modified Version. Only one passage of
-Front-Cover Text and one of Back-Cover Text may be added by (or
-through arrangements made by) any one entity. If the Document already
-includes a cover text for the same cover, previously added by you or
-by arrangement made by the same entity you are acting on behalf of,
-you may not add another; but you may replace the old one, on explicit
-permission from the previous publisher that added the old one.
-
-The author(s) and publisher(s) of the Document do not by this License
-give permission to use their names for publicity for or to assert or
-imply endorsement of any Modified Version.
-
-@item
-COMBINING DOCUMENTS
-
-You may combine the Document with other documents released under this
-License, under the terms defined in section 4 above for modified
-versions, provided that you include in the combination all of the
-Invariant Sections of all of the original documents, unmodified, and
-list them all as Invariant Sections of your combined work in its
-license notice, and that you preserve all their Warranty Disclaimers.
-
-The combined work need only contain one copy of this License, and
-multiple identical Invariant Sections may be replaced with a single
-copy. If there are multiple Invariant Sections with the same name but
-different contents, make the title of each such section unique by
-adding at the end of it, in parentheses, the name of the original
-author or publisher of that section if known, or else a unique number.
-Make the same adjustment to the section titles in the list of
-Invariant Sections in the license notice of the combined work.
-
-In the combination, you must combine any sections Entitled ``History''
-in the various original documents, forming one section Entitled
-``History''; likewise combine any sections Entitled ``Acknowledgements'',
-and any sections Entitled ``Dedications''. You must delete all
-sections Entitled ``Endorsements.''
-
-@item
-COLLECTIONS OF DOCUMENTS
-
-You may make a collection consisting of the Document and other documents
-released under this License, and replace the individual copies of this
-License in the various documents with a single copy that is included in
-the collection, provided that you follow the rules of this License for
-verbatim copying of each of the documents in all other respects.
-
-You may extract a single document from such a collection, and distribute
-it individually under this License, provided you insert a copy of this
-License into the extracted document, and follow this License in all
-other respects regarding verbatim copying of that document.
-
-@item
-AGGREGATION WITH INDEPENDENT WORKS
-
-A compilation of the Document or its derivatives with other separate
-and independent documents or works, in or on a volume of a storage or
-distribution medium, is called an ``aggregate'' if the copyright
-resulting from the compilation is not used to limit the legal rights
-of the compilation's users beyond what the individual works permit.
-When the Document is included in an aggregate, this License does not
-apply to the other works in the aggregate which are not themselves
-derivative works of the Document.
-
-If the Cover Text requirement of section 3 is applicable to these
-copies of the Document, then if the Document is less than one half of
-the entire aggregate, the Document's Cover Texts may be placed on
-covers that bracket the Document within the aggregate, or the
-electronic equivalent of covers if the Document is in electronic form.
-Otherwise they must appear on printed covers that bracket the whole
-aggregate.
-
-@item
-TRANSLATION
-
-Translation is considered a kind of modification, so you may
-distribute translations of the Document under the terms of section 4.
-Replacing Invariant Sections with translations requires special
-permission from their copyright holders, but you may include
-translations of some or all Invariant Sections in addition to the
-original versions of these Invariant Sections. You may include a
-translation of this License, and all the license notices in the
-Document, and any Warranty Disclaimers, provided that you also include
-the original English version of this License and the original versions
-of those notices and disclaimers. In case of a disagreement between
-the translation and the original version of this License or a notice
-or disclaimer, the original version will prevail.
-
-If a section in the Document is Entitled ``Acknowledgements'',
-``Dedications'', or ``History'', the requirement (section 4) to Preserve
-its Title (section 1) will typically require changing the actual
-title.
-
-@item
-TERMINATION
-
-You may not copy, modify, sublicense, or distribute the Document except
-as expressly provided for under this License. Any other attempt to
-copy, modify, sublicense or distribute the Document is void, and will
-automatically terminate your rights under this License. However,
-parties who have received copies, or rights, from you under this
-License will not have their licenses terminated so long as such
-parties remain in full compliance.
-
-@item
-FUTURE REVISIONS OF THIS LICENSE
-
-The Free Software Foundation may publish new, revised versions
-of the GNU Free Documentation License from time to time. Such new
-versions will be similar in spirit to the present version, but may
-differ in detail to address new problems or concerns. See
-@uref{http://www.gnu.org/copyleft/}.
-
-Each version of the License is given a distinguishing version number.
-If the Document specifies that a particular numbered version of this
-License ``or any later version'' applies to it, you have the option of
-following the terms and conditions either of that specified version or
-of any later version that has been published (not as a draft) by the
-Free Software Foundation. If the Document does not specify a version
-number of this License, you may choose any version ever published (not
-as a draft) by the Free Software Foundation.
-@end enumerate
-
-@unnumberedsec ADDENDUM: How to use this License for your documents
-
-To use this License in a document you have written, include a copy of
-the License in the document and put the following copyright and
-license notices just after the title page:
-
-@smallexample
-@group
- Copyright (C) @var{year} @var{your name}.
- Permission is granted to copy, distribute and/or modify this document
- under the terms of the GNU Free Documentation License, Version 1.2
- or any later version published by the Free Software Foundation;
- with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
- Texts. A copy of the license is included in the section entitled ``GNU
- Free Documentation License''.
-@end group
-@end smallexample
-
-If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
-replace the ``with@dots{}Texts.'' line with this:
-
-@smallexample
-@group
- with the Invariant Sections being @var{list their titles}, with
- the Front-Cover Texts being @var{list}, and with the Back-Cover Texts
- being @var{list}.
-@end group
-@end smallexample
-
-If you have Invariant Sections without Cover Texts, or some other
-combination of the three, merge those two alternatives to suit the
-situation.
-
-If your document contains nontrivial examples of program code, we
-recommend releasing these examples in parallel under your choice of
-free software license, such as the GNU General Public License,
-to permit their use in free software.
-
-@c Local Variables:
-@c ispell-local-pdict: "ispell-dict"
-@c End:
-
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-/** @page appdocs OpenOCD Application APIs
-
-The top-level APIs in the OpenOCD library allow applications to integrate
-all of the low-level functionality using a set of simple function calls.
-
-These function calls do not exist in a re-usable form, but
-contributions to create and document them will be welcome.
-
- */
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-/** @page flashdocs OpenOCD Flash APIs
-
-OpenOCD provides its Flash APIs for developers to support different
-types of flash devices, some of which are built-in to target devices
-while others may be connected via standard memory interface (e.g. CFI,
-FMI, etc.).
-
-The Flash module provides the following APIs:
-
- - @subpage flashcfi
- - @subpage flashnand
- - @subpage flashtarget
-
-This section needs to be expanded.
-
-*/
-
-
-/** @page flashcfi OpenOCD CFI Flash API
-
-This section needs to be expanded to describe OpenOCD's CFI Flash API.
-
-*/
-
-/** @page flashnand OpenOCD NAND Flash API
-
-This section needs to be expanded to describe OpenOCD's NAND Flash API.
-
-*/
-
-/** @page flashtarget OpenOCD Target Flash API
-
-This section needs to be expanded to describe OpenOCD's Target Flash API.
-
-*/
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-/** @page helperdocs OpenOCD Helper APIs
-
-OpenOCD uses several low-level APIs as the foundation for high-level APIs:
-
- - @subpage helperporting
- - @subpage helperjim
- - @subpage helpercommand
- - @subpage helperlogging
- - @subpage helperbuffers
-
-This section needs to be expanded.
-
- */
-
-/** @page helperporting OpenOCD Types/Portability APIs
-
-This section needs to be expanded to describe OpenOCD's type and
-portability API.
-
- */
-
-/** @page helperjim OpenOCD Jim API
-
-The Jim API provides access to a small-footprint TCL implementation.
-
-Visit http://jim.tcl.tk/ for more information on Jim.
-
-This section needs to be expanded to describe OpenOCD's Jim API.
-
- */
-
-/** @page helpercommand OpenOCD Command API
-
-OpenOCD's command API allows modules to register callbacks that are then
-available to the scripting services. It provides the mechanism for
-these commands to be dispatched to the module using a standard
-interface. It provides macros for defining functions that use and
-extend this interface.
-
-@section helpercmdhandler Command Handlers
-
-Command handlers are functions with a particular signature, which can
-be extended by modules for passing additional parameters to helpers or
-another layer of handlers.
-
-@subsection helpercmdhandlerdef Defining and Calling Command Handlers
-
-These functions should be defined using the @c COMMAND_HANDLER macro.
-These methods must be defined as static, as their principal entry point
-should be the run_command dispatch mechanism.
-
-Command helper functions that require access to the full set of
-parameters should be defined using the @c COMMAND_HELPER. These must be
-declared static by you, as sometimes you might want to share a helper
-among several files (e.g. @c s3c24xx_nand.h).
-
-Both types of routines must be called using the @c CALL_COMMAND_HANDLER macro.
-Calls using this macro to normal handlers require the name of the command
-handler (which can be a name or function pointer). Calls to helpers and
-derived handlers must pass those extra parameters specified by their
-definitions; however, lexical capture is used for the core parameters.
-This dirty trick is being used as a stop-gap measure while the API is
-migrated to one that passes a pointer to a structure containing the
-same ingredients. At that point, this macro will be removed and callers
-will be able to use direct invocations.
-
-Thus, the following macros can be used to define and call command
-handlers or helpers:
-
-- @c COMMAND_HANDLER - declare or define a command handler.
-- @c COMMAND_HELPER - declare or define a derived command handler or helper.
-- @c CALL_COMMAND_HANDLER - call a command handler/helper.
-
-@subsection helpercmdhandlermacros Command Handler Macros
-
-In addition, the following macros may be used in the context of
-command handlers and helpers:
-- @c CMD_CTX - the current @c command_context
-- @c CMD_NAME - invoked command name
-- @c CMD_ARGC - the number of command arguments
-- @c CMD_ARGV - array of command argument strings
-
-@section helpercmdregister Command Registration
-
-In order to use a command handler, it must be registered with the
-command subsystem. All commands are registered with command_registration
-structures, specifying the name of the command, its handler, its allowed
-mode(s) of execution, and strings that provide usage and help text.
-A single handler may be registered using multiple names, but any name
-may have only one handler associated with it.
-
-The @c register_commands() and @c register_commands() functions provide
-registration, while the @c unregister_command() and
-@c unregister_all_commands() functions will remove existing commands.
-These may be called at any time, allowing the command set to change in
-response to system actions.
-
-@subsection helpercmdjim Jim Command Registration
-
-The command_registration structure provides support for registering
-native Jim command handlers (@c jim_handler) too. For these handlers,
-the module can provide help and usage support; however, this mechanism
-allows Jim handlers to be called as sub-commands of other commands.
-These commands may be registered with a private data value (@c
-jim_handler_data) that will be available when called, as with low-level
-Jim command registration.
-
-A command may have a normal @c handler or a @c jim_handler, but not both.
-
-@subsection helpercmdregisterchains Command Chaining
-
-When using register_commands(), the array of commands may reference
-other arrays. When the @c chain field is filled in a
-command_registration record, the commands on in the chained list will
-added in one of two places. If the record defines a new command, then
-the chained commands are added under it; otherwise, the commands are
-added in the same context as the other commands in the array.
-
-@section helpercmdprimer Command Development Primer
-
-This @ref primercommand provides details about the @c hello module,
-showing how the pieces described on this page fit together.
-
- */
-
-/** @page helperlogging OpenOCD Logging API
-
-This section needs to be expanded to describe OpenOCD's Logging API.
-
- */
-
-/** @page helperbuffers OpenOCD Byte Buffer API
-
-This section needs to be expanded to describe OpenOCD's Byte Buffer API.
-
- */
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/jtag.txt b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/jtag.txt
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--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/jtag.txt
+++ /dev/null
@@ -1,73 +0,0 @@
-/** @page jtagdocs JTAG APIs
-
-For new developers unfamiliar with the technology, @ref primerjtag provides
-a brief introduction to the IEEE JTAG interface.
-
-The OpenOCD JTAG library API covers several functional areas. The jtag
-@b core communicates through the @b minidriver API with either its full
-@a driver implementation (src/jtag/jtag_driver.c) or a @a minidriver .
-Internally, the @b command API is used by the JTAG driver for managing
-asynchronous transactions.
-
-- @subpage jtagcore
- - @b public API routines
- - declared in @c src/jtag/jtag.h
- - used by other modules
-
-- @subpage jtagtcl
- - @b private TCL handling routines
- - defined in @c src/jtag/tcl.c
- - registers and handles Jim commands that configure and use the JTAG core
-
-- @subpage jtagcmd
- - @b private command queue API
- - declared in @c src/jtag/commands.h
- - provides routines used internally by the full JTAG drivers.
-
-- @subpage jtagiface
- - @b private interface driver API
- - declared in @c src/jtag/interface.h
- - used by the core, minidrivers, and the full interface device drivers.
- - allows implementing new interface device drivers.
- - includes the Cable/TAP API (commands starting with @c tap_)
-
-- @subpage jtagdriver
- - @b private minidriver API
- - declared in @c src/jtag/minidriver.h
- - used @a only by the core and minidriver implementations:
- - @c jtag_driver.c (in-tree OpenOCD drivers)
- - @c zy1000/build/include/jtag_minidriver.h (ZY1000 minidriver)
- - future implementations (on other embedded hosts)
- - interface device drivers do @b not need this API.
-
- */
-
-/** @page jtagcore JTAG Core API
-
-This section needs to be expanded.
-
- */
-
-/** @page jtagtcl JTAG TCL API
-
-This section needs to be expanded.
-
- */
-
-/** @page jtagcmd JTAG Command API
-
-This section needs to be expanded.
-
- */
-
-/** @page jtagiface JTAG Interface API
-
-This section needs to be expanded.
-
- */
-
-/** @page jtagdriver JTAG Minidriver API
-
-This section needs to be expanded.
-
- */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/doc/manual/jtag/drivers/remote_bitbang.txt
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-/** @remote_bitbangpage OpenOCD Developer's Guide
-
-The remote_bitbang JTAG driver is used to drive JTAG from a remote process. The
-remote_bitbang driver communicates via TCP or UNIX sockets with some remote
-process using an ASCII encoding of the bitbang interface. The remote process
-presumably then drives the JTAG however it pleases. The remote process should
-act as a server, listening for connections from the openocd remote_bitbang
-driver.
-
-The remote bitbang driver is useful for debugging software running on
-processors which are being simulated.
-
-The bitbang interface consists of the following functions.
-
-blink on
- Blink a light somewhere. The argument on is either 1 or 0.
-
-read
- Sample the value of tdo.
-
-write tck tms tdi
- Set the value of tck, tms, and tdi.
-
-reset trst srst
- Set the value of trst, srst.
-
-An additional function, quit, is added to the remote_bitbang interface to
-indicate there will be no more requests and the connection with the remote
-driver should be closed.
-
-These five functions are encoded in ascii by assigning a single character to
-each possible request. The assignments are:
-
- B - Blink on
- b - Blink off
- R - Read request
- Q - Quit request
- 0 - Write 0 0 0
- 1 - Write 0 0 1
- 2 - Write 0 1 0
- 3 - Write 0 1 1
- 4 - Write 1 0 0
- 5 - Write 1 0 1
- 6 - Write 1 1 0
- 7 - Write 1 1 1
- r - Reset 0 0
- s - Reset 0 1
- t - Reset 1 0
- u - Reset 1 1
-
-The read response is encoded in ascii as either digit 0 or 1.
-
- */
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-/** @mainpage OpenOCD Developer's Guide
-
-Welcome to the OpenOCD Developer's Guide -- the developer's resource for
-learning about the internal architecture of the OpenOCD project. @par
-
-In addition, this document contains the tactical and strategic plans
-and processes that have been developed by and for the OpenOCD community.
-
-Developers that want to contribute to OpenOCD should read the following
-sections before starting work:
-
-- The List of @subpage thelist enumerates opportunities for improving or
-extending the OpenOCD platform. If your ideas are on The List, you might
-check the mailing list archives to find the status of your feature (or bug).
-- The @subpage styleguide provides rules that developers should
- follow when writing new code for OpenOCD.
-- The @subpage patchguide provides policies that developers should
- follow when submitting patches to the project.
-- The @subpage bugs page contains the content of the BUGS file, which
- provides instructions for submitting bug reports to the maintainers.
-- The @subpage releases page describes the project's release process.
-
-@ref primer provide introductory materials for new developers on various
-specific topics.
-
-Finally, the @ref oocd pages explain how the code has been organized
-into layers of APIs, providing an overview of how they fit together.
-These pages attempt to give developers a high-level perspective of the
-various code modules provided by OpenOCD.
-
- */
-
-/** @page primer OpenOCD Technical Primers
-
-This pages lists Technical Primers available for OpenOCD Developers.
-They seek to provide information to pull novices up the learning curves
-associated with the fundamental technologies used by OpenOCD.
-
-- @subpage primerdocs
-- @subpage primerautotools
-- @subpage primertcl
-- @subpage primerjtag
-
-The above documents should bridge any "ancillary" gaps in contributor
-knowledge, without having to learn the complete languages or technology.
-They should provide enough information for experienced developers to
-learn how to make "correct" changes when creating patches.
-
-Beyond the fundamentals, the following primers provide introductory
-tutorials for OpenOCD's sub-systems. These complement the @ref oocd
-pages that provide more high-level perspective on related topics.
-
-- @subpage primercommand
-
-In all cases, these Primers should use idiomatic conventions that the
-community has agreed are the "right way of doing things". In this
-respect, these documents typically assume some familiarity with the
-information contained in one or more @ref styleguide, or they will
-directly refer to specific style guides as supplemental reading.
-
-Contributions or suggestions for new Technical Primers are welcome.
-
- */
-
-/** @page oocd OpenOCD Architecture
-
-The OpenOCD library consists of several APIs that build together to
-provide the support functionality. The following list shows how these
-modules are stacked in the current implementation (from bottom to top):
-
-- @subpage helperdocs
- - @ref helperporting
- - @ref helperjim
- - @ref helpercommand
- - @ref helperlogging
-- @subpage jtagdocs
- - @ref jtagcore
- - @ref jtagtcl
- - @ref jtagcmd
- - @ref jtagiface
- - @ref jtagdriver
-- @subpage targetdocs
- - @ref targetarm
- - @ref targetnotarm
- - @ref targetmips
- - @ref targetregister
- - @ref targetimage
- - @ref targettrace
-- @subpage flashdocs
- - @ref flashcfi
- - @ref flashnand
- - @ref flashtarget
-- @subpage serverdocs
- - @ref servergdb
- - @ref servertelnet
- - @ref serverhttp
-- @subpage appdocs
-
-Obviously, there are some nuances to the stack that are not shown by
-this linear list of layers.
-
-The List of @ref thelist enumerates opportunities for improving or
-extending the OpenOCD platform.
-
- */
[51/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
remove untarred files for openocd
Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/repo
Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/commit/69f466b5
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/tree/69f466b5
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/diff/69f466b5
Branch: refs/heads/master
Commit: 69f466b516dd72ac0dfce153d485c9d9838830d5
Parents: e302582
Author: aditihilbert <ad...@runtime.io>
Authored: Thu Jun 16 14:40:51 2016 -0700
Committer: aditihilbert <ad...@runtime.io>
Committed: Thu Jun 16 14:40:51 2016 -0700
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.../AUTHORS.ChangeLog | 10 -
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.../COPYING | 339 -
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.../Makefile.am | 112 -
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.../tcl/interface/ftdi/luminary-icdi.cfg | 25 -
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.../tcl/interface/ftdi/olimex-arm-jtag-swd.cfg | 9 -
.../tcl/interface/ftdi/olimex-arm-usb-ocd-h.cfg | 14 -
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.../interface/ftdi/olimex-arm-usb-tiny-h.cfg | 14 -
.../tcl/interface/ftdi/olimex-jtag-tiny.cfg | 14 -
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.../tcl/interface/ftdi/opendous_ftdi.cfg | 17 -
.../tcl/interface/ftdi/openocd-usb-hs.cfg | 13 -
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.../tcl/interface/ftdi/swd-resistor-hack.cfg | 26 -
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.../tcl/interface/ftdi/tumpa-lite.cfg | 12 -
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.../tcl/interface/ftdi/vpaclink.cfg | 19 -
.../tcl/interface/ftdi/xds100v2.cfg | 58 -
.../tcl/interface/hilscher_nxhx10_etm.cfg | 11 -
.../tcl/interface/hilscher_nxhx500_etm.cfg | 11 -
.../tcl/interface/hilscher_nxhx500_re.cfg | 11 -
.../tcl/interface/hilscher_nxhx50_etm.cfg | 11 -
.../tcl/interface/hilscher_nxhx50_re.cfg | 11 -
.../tcl/interface/hitex_str9-comstick.cfg | 11 -
.../tcl/interface/icebear.cfg | 11 -
.../tcl/interface/jlink.cfg | 14 -
.../tcl/interface/jtag-lock-pick_tiny_2.cfg | 10 -
.../tcl/interface/jtag_vpi.cfg | 18 -
.../tcl/interface/jtagkey-tiny.cfg | 9 -
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.../tcl/interface/jtagkey2.cfg | 11 -
.../tcl/interface/jtagkey2p.cfg | 11 -
.../tcl/interface/kt-link.cfg | 10 -
.../tcl/interface/lisa-l.cfg | 11 -
.../tcl/interface/luminary-icdi.cfg | 21 -
.../tcl/interface/luminary-lm3s811.cfg | 18 -
.../tcl/interface/luminary.cfg | 31 -
.../tcl/interface/minimodule.cfg | 10 -
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.../tcl/interface/neodb.cfg | 10 -
.../tcl/interface/ngxtech.cfg | 10 -
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.../tcl/interface/olimex-arm-usb-ocd.cfg | 11 -
.../tcl/interface/olimex-arm-usb-tiny-h.cfg | 11 -
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.../tcl/interface/oocdlink.cfg | 12 -
.../tcl/interface/opendous.cfg | 7 -
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.../tcl/interface/openjtag.cfg | 8 -
.../tcl/interface/openocd-usb-hs.cfg | 11 -
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.../tcl/interface/openrd.cfg | 12 -
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.../tcl/interface/raspberrypi-native.cfg | 35 -
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.../tcl/interface/redbee-econotag.cfg | 13 -
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.../tcl/interface/rlink.cfg | 8 -
.../tcl/interface/sheevaplug.cfg | 12 -
.../tcl/interface/signalyzer-h2.cfg | 11 -
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.../tcl/interface/stm32-stick.cfg | 11 -
.../tcl/interface/sysfsgpio-raspberrypi.cfg | 21 -
.../tcl/interface/ti-icdi.cfg | 13 -
.../tcl/interface/turtelizer2.cfg | 15 -
.../tcl/interface/ulink.cfg | 8 -
.../tcl/interface/usb-jtag.cfg | 37 -
.../tcl/interface/usbprog.cfg | 10 -
.../tcl/interface/vpaclink.cfg | 10 -
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.../tcl/interface/xds100v2.cfg | 10 -
.../tcl/mem_helper.tcl | 22 -
.../tcl/memory.tcl | 133 -
.../tcl/mmr_helpers.tcl | 72 -
.../target/1986\320\262\320\2651\321\202.cfg" | 63 -
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.../tcl/target/alphascale_asm9260t.cfg | 25 -
.../tcl/target/altera_fpgasoc.cfg | 64 -
.../tcl/target/am335x.cfg | 78 -
.../tcl/target/am437x.cfg | 999 -
.../tcl/target/amdm37x.cfg | 211 -
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.../tcl/target/at91sam3XXX.cfg | 87 -
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.../tcl/target/at91sam4sd32x.cfg | 9 -
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.../tcl/target/at91sam7se512.cfg | 39 -
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.../tcl/target/at91sam9.cfg | 37 -
.../tcl/target/at91sam9260.cfg | 19 -
.../target/at91sam9260_ext_RAM_ext_flash.cfg | 89 -
.../tcl/target/at91sam9261.cfg | 14 -
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.../tcl/target/at91sam9g10.cfg | 16 -
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.../tcl/target/at91samdXX.cfg | 87 -
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.../tcl/target/bcm281xx.cfg | 33 -
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.../tcl/target/bcm5352e.cfg | 7 -
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.../tcl/target/c100.cfg | 42 -
.../tcl/target/c100config.tcl | 412 -
.../tcl/target/c100helper.tcl | 506 -
.../tcl/target/c100regs.tcl | 493 -
.../tcl/target/cc2538.cfg | 16 -
.../tcl/target/cc26xx.cfg | 43 -
.../tcl/target/cc32xx.cfg | 53 -
.../tcl/target/cs351x.cfg | 31 -
.../tcl/target/davinci.cfg | 377 -
.../tcl/target/dragonite.cfg | 31 -
.../tcl/target/dsp56321.cfg | 37 -
.../tcl/target/dsp568013.cfg | 76 -
.../tcl/target/dsp568037.cfg | 72 -
.../tcl/target/efm32.cfg | 43 -
.../tcl/target/efm32_stlink.cfg | 2 -
.../tcl/target/em357.cfg | 76 -
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.../tcl/target/epc9301.cfg | 32 -
.../tcl/target/exynos5250.cfg | 23 -
.../tcl/target/faux.cfg | 30 -
.../tcl/target/feroceon.cfg | 31 -
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.../tcl/target/fm4_mb9bf.cfg | 18 -
.../tcl/target/fm4_s6e2cc.cfg | 19 -
.../tcl/target/gp326xxxa.cfg | 94 -
.../tcl/target/hilscher_netx10.cfg | 31 -
.../tcl/target/hilscher_netx50.cfg | 50 -
.../tcl/target/hilscher_netx500.cfg | 47 -
.../tcl/target/icepick.cfg | 142 -
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.../tcl/target/lpc11xx.cfg | 8 -
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.../tcl/target/lpc13xx.cfg | 8 -
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.../tcl/target/lpc1850.cfg | 34 -
.../tcl/target/lpc1xxx.cfg | 159 -
.../tcl/target/lpc2103.cfg | 21 -
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.../tcl/target/lpc2129.cfg | 21 -
.../tcl/target/lpc2148.cfg | 21 -
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.../tcl/target/lpc2378.cfg | 21 -
.../tcl/target/lpc2460.cfg | 21 -
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.../tcl/target/lpc2900.cfg | 66 -
.../tcl/target/lpc2xxx.cfg | 44 -
.../tcl/target/lpc3131.cfg | 76 -
.../tcl/target/lpc3250.cfg | 43 -
.../tcl/target/lpc40xx.cfg | 8 -
.../tcl/target/lpc4350.cfg | 70 -
.../tcl/target/lpc4357.cfg | 12 -
.../tcl/target/lpc4370.cfg | 85 -
.../tcl/target/lpc8xx.cfg | 10 -
.../tcl/target/mc13224v.cfg | 54 -
.../tcl/target/mdr32f9q2i.cfg | 62 -
.../tcl/target/nds32v2.cfg | 10 -
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.../tcl/target/nrf51.cfg | 60 -
.../tcl/target/nrf51_stlink.tcl | 2 -
.../tcl/target/nrf52.cfg | 41 -
.../tcl/target/nuc910.cfg | 27 -
.../tcl/target/numicro.cfg | 60 -
.../tcl/target/omap2420.cfg | 61 -
.../tcl/target/omap3530.cfg | 74 -
.../tcl/target/omap4430.cfg | 127 -
.../tcl/target/omap4460.cfg | 126 -
.../tcl/target/omap5912.cfg | 52 -
.../tcl/target/omapl138.cfg | 66 -
.../tcl/target/or1k.cfg | 72 -
.../tcl/target/pic32mx.cfg | 90 -
.../tcl/target/psoc4.cfg | 152 -
.../tcl/target/pxa255.cfg | 59 -
.../tcl/target/pxa270.cfg | 50 -
.../tcl/target/pxa3xx.cfg | 86 -
.../tcl/target/quark_d20xx.cfg | 50 -
.../tcl/target/quark_x10xx.cfg | 52 -
.../tcl/target/readme.txt | 41 -
.../tcl/target/renesas_s7g2.cfg | 50 -
.../tcl/target/samsung_s3c2410.cfg | 36 -
.../tcl/target/samsung_s3c2440.cfg | 35 -
.../tcl/target/samsung_s3c2450.cfg | 48 -
.../tcl/target/samsung_s3c4510.cfg | 24 -
.../tcl/target/samsung_s3c6410.cfg | 51 -
.../tcl/target/sharp_lh79532.cfg | 26 -
.../tcl/target/sim3x.cfg | 55 -
.../tcl/target/smp8634.cfg | 31 -
.../tcl/target/spear3xx.cfg | 41 -
.../tcl/target/stellaris.cfg | 176 -
.../tcl/target/stellaris_icdi.cfg | 2 -
.../tcl/target/stm32_stlink.cfg | 1 -
.../tcl/target/stm32f0x.cfg | 86 -
.../tcl/target/stm32f0x_stlink.cfg | 2 -
.../tcl/target/stm32f1x.cfg | 109 -
.../tcl/target/stm32f1x_stlink.cfg | 2 -
.../tcl/target/stm32f2x.cfg | 96 -
.../tcl/target/stm32f2x_stlink.cfg | 2 -
.../tcl/target/stm32f3x.cfg | 127 -
.../tcl/target/stm32f3x_stlink.cfg | 2 -
.../tcl/target/stm32f4x.cfg | 127 -
.../tcl/target/stm32f4x_stlink.cfg | 2 -
.../tcl/target/stm32f7x.cfg | 92 -
.../tcl/target/stm32l0.cfg | 77 -
.../tcl/target/stm32l1.cfg | 126 -
.../tcl/target/stm32l1x_dual_bank.cfg | 8 -
.../tcl/target/stm32l4x.cfg | 106 -
.../tcl/target/stm32lx_stlink.cfg | 2 -
.../tcl/target/stm32w108_stlink.cfg | 2 -
.../tcl/target/stm32w108xx.cfg | 70 -
.../tcl/target/stm32xl.cfg | 6 -
.../tcl/target/str710.cfg | 53 -
.../tcl/target/str730.cfg | 54 -
.../tcl/target/str750.cfg | 72 -
.../tcl/target/str912.cfg | 71 -
.../tcl/target/swj-dp.tcl | 34 -
.../tcl/target/test_reset_syntax_error.cfg | 17 -
.../tcl/target/test_syntax_error.cfg | 4 -
.../tcl/target/ti-ar7.cfg | 30 -
.../tcl/target/ti-cjtag.cfg | 32 -
.../tcl/target/ti_calypso.cfg | 57 -
.../tcl/target/ti_dm355.cfg | 109 -
.../tcl/target/ti_dm365.cfg | 101 -
.../tcl/target/ti_dm6446.cfg | 81 -
.../tcl/target/ti_rm4x.cfg | 1 -
.../tcl/target/ti_tms570.cfg | 74 -
.../tcl/target/ti_tms570ls20xxx.cfg | 6 -
.../tcl/target/ti_tms570ls3137.cfg | 5 -
.../tcl/target/tmpa900.cfg | 46 -
.../tcl/target/tmpa910.cfg | 47 -
.../tcl/target/u8500.cfg | 332 -
.../tcl/target/vybrid_vf6xx.cfg | 36 -
.../tcl/target/xmc1xxx.cfg | 40 -
.../tcl/target/xmc4xxx.cfg | 59 -
.../tcl/target/xmos_xs1-xau8a-10_arm.cfg | 16 -
.../tcl/target/zynq_7000.cfg | 26 -
.../target/\320\2721879x\320\2611\321\217.cfg" | 35 -
.../tcl/test/selftest.cfg | 17 -
.../tcl/test/syntax1.cfg | 30 -
.../tcl/tools/firmware-recovery.tcl | 112 -
.../tcl/tools/memtest.tcl | 189 -
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.../testing/results/v0.4.0-rc1/LPC2148.html | 933 -
.../testing/results/v0.4.0-rc1/SAM7.html | 853 -
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.../testing/results/v0.4.0-rc1/STR912.html | 1008 -
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.../tools/uncrustify1.sh | 30 -
.../uncrustify.cfg | 142 -
1426 files changed, 337921 deletions(-)
----------------------------------------------------------------------
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/AUTHORS
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/AUTHORS b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/AUTHORS
deleted file mode 100755
index 2a989f3..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/AUTHORS
+++ /dev/null
@@ -1,12 +0,0 @@
-Dominic Rath <Do...@gmx.de>
-Magnus Lundin <lu...@mlu.mine.nu>
-Michael Fischer <fi...@t-online.de>
-Spencer Oliver <sp...@spen-soft.co.uk>
-Carsten Schlote <sc...@vahanus.net>
-�yvind Harboe <oy...@zylin.com>
-Duane Ellis <op...@duaneellis.com>
-Michael Schwingen <mi...@schwingen.org>
-Rick Altherr <kc...@users.berlios.de>
-David Brownell <db...@users.sourceforge.net>
-Vincint Palatin <vp...@users.berlios.de>
-Zachary T Welch <zw...@superlucidity.net>
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/AUTHORS.ChangeLog
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/AUTHORS.ChangeLog b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/AUTHORS.ChangeLog
deleted file mode 100755
index b2b5e6b..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/AUTHORS.ChangeLog
+++ /dev/null
@@ -1,10 +0,0 @@
-drath:Dominic Rath <Do...@gmx.de>
-mlu:Magnus Lundin <lu...@mlu.mine.nu>
-mifi:Michael Fischer <fi...@t-online.de>
-ntfreak:Spencer Oliver <sp...@spen-soft.co.uk>
-duane:Duane Ellis <op...@duaneellis.com>
-oharboe:�yvind Harboe <oy...@zylin.com>
-kc8apf:Rick Altherr <kc...@users.berlios.de>
-zwelch:Zachary T Welch <zw...@superlucidity.net>
-vpalatin:Vincent Palatin <vp...@users.berlios.de>
-bodylove:Carsten Schlote <sc...@vahanus.net>
[09/51] [partial] incubator-mynewt-site git commit: remove untarred
files for openocd
Posted by ad...@apache.org.
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/list.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/list.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/list.h
deleted file mode 100755
index 302b910..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/list.h
+++ /dev/null
@@ -1,737 +0,0 @@
-#ifndef _LINUX_LIST_H
-#define _LINUX_LIST_H
-
-/* begin local changes */
-#include <helper/types.h>
-
-#define prefetch(x) ((void)x)
-#define LIST_POISON1 NULL
-#define LIST_POISON2 NULL
-
-struct list_head {
- struct list_head *next, *prev;
-};
-struct hlist_head {
- struct hlist_node *first;
-};
-struct hlist_node {
- struct hlist_node *next, **pprev;
-};
-/* end local changes */
-
-/*
- * Simple doubly linked list implementation.
- *
- * Some of the internal functions ("__xxx") are useful when
- * manipulating whole lists rather than single entries, as
- * sometimes we already know the next/prev entries and we can
- * generate better code by using them directly rather than
- * using the generic single-entry routines.
- */
-
-#define LIST_HEAD_INIT(name) { &(name), &(name) }
-
-#define LIST_HEAD(name) \
- struct list_head name = LIST_HEAD_INIT(name)
-
-static inline void INIT_LIST_HEAD(struct list_head *list)
-{
- list->next = list;
- list->prev = list;
-}
-
-/*
- * Insert a new entry between two known consecutive entries.
- *
- * This is only for internal list manipulation where we know
- * the prev/next entries already!
- */
-#ifndef CONFIG_DEBUG_LIST
-static inline void __list_add(struct list_head *new,
- struct list_head *prev,
- struct list_head *next)
-{
- next->prev = new;
- new->next = next;
- new->prev = prev;
- prev->next = new;
-}
-#else
-extern void __list_add(struct list_head *new,
- struct list_head *prev,
- struct list_head *next);
-#endif
-
-/**
- * list_add - add a new entry
- * @new: new entry to be added
- * @head: list head to add it after
- *
- * Insert a new entry after the specified head.
- * This is good for implementing stacks.
- */
-static inline void list_add(struct list_head *new, struct list_head *head)
-{
- __list_add(new, head, head->next);
-}
-
-
-/**
- * list_add_tail - add a new entry
- * @new: new entry to be added
- * @head: list head to add it before
- *
- * Insert a new entry before the specified head.
- * This is useful for implementing queues.
- */
-static inline void list_add_tail(struct list_head *new, struct list_head *head)
-{
- __list_add(new, head->prev, head);
-}
-
-/*
- * Delete a list entry by making the prev/next entries
- * point to each other.
- *
- * This is only for internal list manipulation where we know
- * the prev/next entries already!
- */
-static inline void __list_del(struct list_head *prev, struct list_head *next)
-{
- next->prev = prev;
- prev->next = next;
-}
-
-/**
- * list_del - deletes entry from list.
- * @entry: the element to delete from the list.
- * Note: list_empty() on entry does not return true after this, the entry is
- * in an undefined state.
- */
-#ifndef CONFIG_DEBUG_LIST
-static inline void __list_del_entry(struct list_head *entry)
-{
- __list_del(entry->prev, entry->next);
-}
-
-static inline void list_del(struct list_head *entry)
-{
- __list_del(entry->prev, entry->next);
- entry->next = LIST_POISON1;
- entry->prev = LIST_POISON2;
-}
-#else
-extern void __list_del_entry(struct list_head *entry);
-extern void list_del(struct list_head *entry);
-#endif
-
-/**
- * list_replace - replace old entry by new one
- * @old : the element to be replaced
- * @new : the new element to insert
- *
- * If @old was empty, it will be overwritten.
- */
-static inline void list_replace(struct list_head *old,
- struct list_head *new)
-{
- new->next = old->next;
- new->next->prev = new;
- new->prev = old->prev;
- new->prev->next = new;
-}
-
-static inline void list_replace_init(struct list_head *old,
- struct list_head *new)
-{
- list_replace(old, new);
- INIT_LIST_HEAD(old);
-}
-
-/**
- * list_del_init - deletes entry from list and reinitialize it.
- * @entry: the element to delete from the list.
- */
-static inline void list_del_init(struct list_head *entry)
-{
- __list_del_entry(entry);
- INIT_LIST_HEAD(entry);
-}
-
-/**
- * list_move - delete from one list and add as another's head
- * @list: the entry to move
- * @head: the head that will precede our entry
- */
-static inline void list_move(struct list_head *list, struct list_head *head)
-{
- __list_del_entry(list);
- list_add(list, head);
-}
-
-/**
- * list_move_tail - delete from one list and add as another's tail
- * @list: the entry to move
- * @head: the head that will follow our entry
- */
-static inline void list_move_tail(struct list_head *list,
- struct list_head *head)
-{
- __list_del_entry(list);
- list_add_tail(list, head);
-}
-
-/**
- * list_is_last - tests whether @list is the last entry in list @head
- * @list: the entry to test
- * @head: the head of the list
- */
-static inline int list_is_last(const struct list_head *list,
- const struct list_head *head)
-{
- return list->next == head;
-}
-
-/**
- * list_empty - tests whether a list is empty
- * @head: the list to test.
- */
-static inline int list_empty(const struct list_head *head)
-{
- return head->next == head;
-}
-
-/**
- * list_empty_careful - tests whether a list is empty and not being modified
- * @head: the list to test
- *
- * Description:
- * tests whether a list is empty _and_ checks that no other CPU might be
- * in the process of modifying either member (next or prev)
- *
- * NOTE: using list_empty_careful() without synchronization
- * can only be safe if the only activity that can happen
- * to the list entry is list_del_init(). Eg. it cannot be used
- * if another CPU could re-list_add() it.
- */
-static inline int list_empty_careful(const struct list_head *head)
-{
- struct list_head *next = head->next;
- return (next == head) && (next == head->prev);
-}
-
-/**
- * list_rotate_left - rotate the list to the left
- * @head: the head of the list
- */
-static inline void list_rotate_left(struct list_head *head)
-{
- struct list_head *first;
-
- if (!list_empty(head)) {
- first = head->next;
- list_move_tail(first, head);
- }
-}
-
-/**
- * list_is_singular - tests whether a list has just one entry.
- * @head: the list to test.
- */
-static inline int list_is_singular(const struct list_head *head)
-{
- return !list_empty(head) && (head->next == head->prev);
-}
-
-static inline void __list_cut_position(struct list_head *list,
- struct list_head *head, struct list_head *entry)
-{
- struct list_head *new_first = entry->next;
- list->next = head->next;
- list->next->prev = list;
- list->prev = entry;
- entry->next = list;
- head->next = new_first;
- new_first->prev = head;
-}
-
-/**
- * list_cut_position - cut a list into two
- * @list: a new list to add all removed entries
- * @head: a list with entries
- * @entry: an entry within head, could be the head itself
- * and if so we won't cut the list
- *
- * This helper moves the initial part of @head, up to and
- * including @entry, from @head to @list. You should
- * pass on @entry an element you know is on @head. @list
- * should be an empty list or a list you do not care about
- * losing its data.
- *
- */
-static inline void list_cut_position(struct list_head *list,
- struct list_head *head, struct list_head *entry)
-{
- if (list_empty(head))
- return;
- if (list_is_singular(head) &&
- (head->next != entry && head != entry))
- return;
- if (entry == head)
- INIT_LIST_HEAD(list);
- else
- __list_cut_position(list, head, entry);
-}
-
-static inline void __list_splice(const struct list_head *list,
- struct list_head *prev,
- struct list_head *next)
-{
- struct list_head *first = list->next;
- struct list_head *last = list->prev;
-
- first->prev = prev;
- prev->next = first;
-
- last->next = next;
- next->prev = last;
-}
-
-/**
- * list_splice - join two lists, this is designed for stacks
- * @list: the new list to add.
- * @head: the place to add it in the first list.
- */
-static inline void list_splice(const struct list_head *list,
- struct list_head *head)
-{
- if (!list_empty(list))
- __list_splice(list, head, head->next);
-}
-
-/**
- * list_splice_tail - join two lists, each list being a queue
- * @list: the new list to add.
- * @head: the place to add it in the first list.
- */
-static inline void list_splice_tail(struct list_head *list,
- struct list_head *head)
-{
- if (!list_empty(list))
- __list_splice(list, head->prev, head);
-}
-
-/**
- * list_splice_init - join two lists and reinitialise the emptied list.
- * @list: the new list to add.
- * @head: the place to add it in the first list.
- *
- * The list at @list is reinitialised
- */
-static inline void list_splice_init(struct list_head *list,
- struct list_head *head)
-{
- if (!list_empty(list)) {
- __list_splice(list, head, head->next);
- INIT_LIST_HEAD(list);
- }
-}
-
-/**
- * list_splice_tail_init - join two lists and reinitialise the emptied list
- * @list: the new list to add.
- * @head: the place to add it in the first list.
- *
- * Each of the lists is a queue.
- * The list at @list is reinitialised
- */
-static inline void list_splice_tail_init(struct list_head *list,
- struct list_head *head)
-{
- if (!list_empty(list)) {
- __list_splice(list, head->prev, head);
- INIT_LIST_HEAD(list);
- }
-}
-
-/**
- * list_entry - get the struct for this entry
- * @ptr: the &struct list_head pointer.
- * @type: the type of the struct this is embedded in.
- * @member: the name of the list_struct within the struct.
- */
-#define list_entry(ptr, type, member) \
- container_of(ptr, type, member)
-
-/**
- * list_first_entry - get the first element from a list
- * @ptr: the list head to take the element from.
- * @type: the type of the struct this is embedded in.
- * @member: the name of the list_struct within the struct.
- *
- * Note, that list is expected to be not empty.
- */
-#define list_first_entry(ptr, type, member) \
- list_entry((ptr)->next, type, member)
-
-/**
- * list_for_each - iterate over a list
- * @pos: the &struct list_head to use as a loop cursor.
- * @head: the head for your list.
- */
-#define list_for_each(pos, head) \
- for (pos = (head)->next; prefetch(pos->next), pos != (head); \
- pos = pos->next)
-
-/**
- * __list_for_each - iterate over a list
- * @pos: the &struct list_head to use as a loop cursor.
- * @head: the head for your list.
- *
- * This variant differs from list_for_each() in that it's the
- * simplest possible list iteration code, no prefetching is done.
- * Use this for code that knows the list to be very short (empty
- * or 1 entry) most of the time.
- */
-#define __list_for_each(pos, head) \
- for (pos = (head)->next; pos != (head); pos = pos->next)
-
-/**
- * list_for_each_prev - iterate over a list backwards
- * @pos: the &struct list_head to use as a loop cursor.
- * @head: the head for your list.
- */
-#define list_for_each_prev(pos, head) \
- for (pos = (head)->prev; prefetch(pos->prev), pos != (head); \
- pos = pos->prev)
-
-/**
- * list_for_each_safe - iterate over a list safe against removal of list entry
- * @pos: the &struct list_head to use as a loop cursor.
- * @n: another &struct list_head to use as temporary storage
- * @head: the head for your list.
- */
-#define list_for_each_safe(pos, n, head) \
- for (pos = (head)->next, n = pos->next; pos != (head); \
- pos = n, n = pos->next)
-
-/**
- * list_for_each_prev_safe - iterate over a list backwards safe against removal of list entry
- * @pos: the &struct list_head to use as a loop cursor.
- * @n: another &struct list_head to use as temporary storage
- * @head: the head for your list.
- */
-#define list_for_each_prev_safe(pos, n, head) \
- for (pos = (head)->prev, n = pos->prev; \
- prefetch(pos->prev), pos != (head); \
- pos = n, n = pos->prev)
-
-/**
- * list_for_each_entry - iterate over list of given type
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- */
-#define list_for_each_entry(pos, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member); \
- prefetch(pos->member.next), &pos->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member))
-
-/**
- * list_for_each_entry_reverse - iterate backwards over list of given type.
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- */
-#define list_for_each_entry_reverse(pos, head, member) \
- for (pos = list_entry((head)->prev, typeof(*pos), member); \
- prefetch(pos->member.prev), &pos->member != (head); \
- pos = list_entry(pos->member.prev, typeof(*pos), member))
-
-/**
- * list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue()
- * @pos: the type * to use as a start point
- * @head: the head of the list
- * @member: the name of the list_struct within the struct.
- *
- * Prepares a pos entry for use as a start point in list_for_each_entry_continue().
- */
-#define list_prepare_entry(pos, head, member) \
- ((pos) ? : list_entry(head, typeof(*pos), member))
-
-/**
- * list_for_each_entry_continue - continue iteration over list of given type
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- *
- * Continue to iterate over list of given type, continuing after
- * the current position.
- */
-#define list_for_each_entry_continue(pos, head, member) \
- for (pos = list_entry(pos->member.next, typeof(*pos), member); \
- prefetch(pos->member.next), &pos->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member))
-
-/**
- * list_for_each_entry_continue_reverse - iterate backwards from the given point
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- *
- * Start to iterate over list of given type backwards, continuing after
- * the current position.
- */
-#define list_for_each_entry_continue_reverse(pos, head, member) \
- for (pos = list_entry(pos->member.prev, typeof(*pos), member); \
- prefetch(pos->member.prev), &pos->member != (head); \
- pos = list_entry(pos->member.prev, typeof(*pos), member))
-
-/**
- * list_for_each_entry_from - iterate over list of given type from the current point
- * @pos: the type * to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- *
- * Iterate over list of given type, continuing from current position.
- */
-#define list_for_each_entry_from(pos, head, member) \
- for (; prefetch(pos->member.next), &pos->member != (head); \
- pos = list_entry(pos->member.next, typeof(*pos), member))
-
-/**
- * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry
- * @pos: the type * to use as a loop cursor.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- */
-#define list_for_each_entry_safe(pos, n, head, member) \
- for (pos = list_entry((head)->next, typeof(*pos), member), \
- n = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.next, typeof(*n), member))
-
-/**
- * list_for_each_entry_safe_continue - continue list iteration safe against removal
- * @pos: the type * to use as a loop cursor.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- *
- * Iterate over list of given type, continuing after current point,
- * safe against removal of list entry.
- */
-#define list_for_each_entry_safe_continue(pos, n, head, member) \
- for (pos = list_entry(pos->member.next, typeof(*pos), member), \
- n = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.next, typeof(*n), member))
-
-/**
- * list_for_each_entry_safe_from - iterate over list from current point safe against removal
- * @pos: the type * to use as a loop cursor.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- *
- * Iterate over list of given type from current point, safe against
- * removal of list entry.
- */
-#define list_for_each_entry_safe_from(pos, n, head, member) \
- for (n = list_entry(pos->member.next, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.next, typeof(*n), member))
-
-/**
- * list_for_each_entry_safe_reverse - iterate backwards over list safe against removal
- * @pos: the type * to use as a loop cursor.
- * @n: another type * to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the list_struct within the struct.
- *
- * Iterate backwards over list of given type, safe against removal
- * of list entry.
- */
-#define list_for_each_entry_safe_reverse(pos, n, head, member) \
- for (pos = list_entry((head)->prev, typeof(*pos), member), \
- n = list_entry(pos->member.prev, typeof(*pos), member); \
- &pos->member != (head); \
- pos = n, n = list_entry(n->member.prev, typeof(*n), member))
-
-/**
- * list_safe_reset_next - reset a stale list_for_each_entry_safe loop
- * @pos: the loop cursor used in the list_for_each_entry_safe loop
- * @n: temporary storage used in list_for_each_entry_safe
- * @member: the name of the list_struct within the struct.
- *
- * list_safe_reset_next is not safe to use in general if the list may be
- * modified concurrently (eg. the lock is dropped in the loop body). An
- * exception to this is if the cursor element (pos) is pinned in the list,
- * and list_safe_reset_next is called after re-taking the lock and before
- * completing the current iteration of the loop body.
- */
-#define list_safe_reset_next(pos, n, member) \
- n = list_entry(pos->member.next, typeof(*pos), member)
-
-/*
- * Double linked lists with a single pointer list head.
- * Mostly useful for hash tables where the two pointer list head is
- * too wasteful.
- * You lose the ability to access the tail in O(1).
- */
-
-#define HLIST_HEAD_INIT { .first = NULL }
-#define HLIST_HEAD(name) struct hlist_head name = { .first = NULL }
-#define INIT_HLIST_HEAD(ptr) ((ptr)->first = NULL)
-static inline void INIT_HLIST_NODE(struct hlist_node *h)
-{
- h->next = NULL;
- h->pprev = NULL;
-}
-
-static inline int hlist_unhashed(const struct hlist_node *h)
-{
- return !h->pprev;
-}
-
-static inline int hlist_empty(const struct hlist_head *h)
-{
- return !h->first;
-}
-
-static inline void __hlist_del(struct hlist_node *n)
-{
- struct hlist_node *next = n->next;
- struct hlist_node **pprev = n->pprev;
- *pprev = next;
- if (next)
- next->pprev = pprev;
-}
-
-static inline void hlist_del(struct hlist_node *n)
-{
- __hlist_del(n);
- n->next = LIST_POISON1;
- n->pprev = LIST_POISON2;
-}
-
-static inline void hlist_del_init(struct hlist_node *n)
-{
- if (!hlist_unhashed(n)) {
- __hlist_del(n);
- INIT_HLIST_NODE(n);
- }
-}
-
-static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h)
-{
- struct hlist_node *first = h->first;
- n->next = first;
- if (first)
- first->pprev = &n->next;
- h->first = n;
- n->pprev = &h->first;
-}
-
-/* next must be != NULL */
-static inline void hlist_add_before(struct hlist_node *n,
- struct hlist_node *next)
-{
- n->pprev = next->pprev;
- n->next = next;
- next->pprev = &n->next;
- *(n->pprev) = n;
-}
-
-static inline void hlist_add_after(struct hlist_node *n,
- struct hlist_node *next)
-{
- next->next = n->next;
- n->next = next;
- next->pprev = &n->next;
-
- if (next->next)
- next->next->pprev = &next->next;
-}
-
-/* after that we'll appear to be on some hlist and hlist_del will work */
-static inline void hlist_add_fake(struct hlist_node *n)
-{
- n->pprev = &n->next;
-}
-
-/*
- * Move a list from one list head to another. Fixup the pprev
- * reference of the first entry if it exists.
- */
-static inline void hlist_move_list(struct hlist_head *old,
- struct hlist_head *new)
-{
- new->first = old->first;
- if (new->first)
- new->first->pprev = &new->first;
- old->first = NULL;
-}
-
-#define hlist_entry(ptr, type, member) container_of(ptr, type, member)
-
-#define hlist_for_each(pos, head) \
- for (pos = (head)->first; pos && ({ prefetch(pos->next); 1; }); \
- pos = pos->next)
-
-#define hlist_for_each_safe(pos, n, head) \
- for (pos = (head)->first; pos && ({ n = pos->next; 1; }); \
- pos = n)
-
-/**
- * hlist_for_each_entry - iterate over list of given type
- * @tpos: the type * to use as a loop cursor.
- * @pos: the &struct hlist_node to use as a loop cursor.
- * @head: the head for your list.
- * @member: the name of the hlist_node within the struct.
- */
-#define hlist_for_each_entry(tpos, pos, head, member) \
- for (pos = (head)->first; \
- pos && ({ prefetch(pos->next); 1; }) && \
- ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
- pos = pos->next)
-
-/**
- * hlist_for_each_entry_continue - iterate over a hlist continuing after current point
- * @tpos: the type * to use as a loop cursor.
- * @pos: the &struct hlist_node to use as a loop cursor.
- * @member: the name of the hlist_node within the struct.
- */
-#define hlist_for_each_entry_continue(tpos, pos, member) \
- for (pos = (pos)->next; \
- pos && ({ prefetch(pos->next); 1; }) && \
- ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
- pos = pos->next)
-
-/**
- * hlist_for_each_entry_from - iterate over a hlist continuing from current point
- * @tpos: the type * to use as a loop cursor.
- * @pos: the &struct hlist_node to use as a loop cursor.
- * @member: the name of the hlist_node within the struct.
- */
-#define hlist_for_each_entry_from(tpos, pos, member) \
- for (; pos && ({ prefetch(pos->next); 1; }) && \
- ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
- pos = pos->next)
-
-/**
- * hlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry
- * @tpos: the type * to use as a loop cursor.
- * @pos: the &struct hlist_node to use as a loop cursor.
- * @n: another &struct hlist_node to use as temporary storage
- * @head: the head for your list.
- * @member: the name of the hlist_node within the struct.
- */
-#define hlist_for_each_entry_safe(tpos, pos, n, head, member) \
- for (pos = (head)->first; \
- pos && ({ n = pos->next; 1; }) && \
- ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; }); \
- pos = n)
-
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/log.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/log.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/log.c
deleted file mode 100755
index 0bea1c5..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/log.c
+++ /dev/null
@@ -1,469 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007-2010 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "log.h"
-#include "command.h"
-#include "time_support.h"
-
-#include <stdarg.h>
-
-#ifdef _DEBUG_FREE_SPACE_
-#ifdef HAVE_MALLOC_H
-#include <malloc.h>
-#else
-#error "malloc.h is required to use --enable-malloc-logging"
-#endif
-#endif
-
-int debug_level = -1;
-
-static FILE *log_output;
-static struct log_callback *log_callbacks;
-
-static long long last_time;
-static long long current_time;
-
-static long long start;
-
-static const char * const log_strings[5] = {
- "User : ",
- "Error: ",
- "Warn : ", /* want a space after each colon, all same width, colons aligned */
- "Info : ",
- "Debug: "
-};
-
-static int count;
-
-static struct store_log_forward *log_head;
-static int log_forward_count;
-
-struct store_log_forward {
- struct store_log_forward *next;
- const char *file;
- int line;
- const char *function;
- const char *string;
-};
-
-/* either forward the log to the listeners or store it for possible forwarding later */
-static void log_forward(const char *file, unsigned line, const char *function, const char *string)
-{
- if (log_forward_count == 0) {
- struct log_callback *cb, *next;
- cb = log_callbacks;
- /* DANGER!!!! the log callback can remove itself!!!! */
- while (cb) {
- next = cb->next;
- cb->fn(cb->priv, file, line, function, string);
- cb = next;
- }
- } else {
- struct store_log_forward *log = malloc(sizeof(struct store_log_forward));
- log->file = strdup(file);
- log->line = line;
- log->function = strdup(function);
- log->string = strdup(string);
- log->next = NULL;
- if (log_head == NULL)
- log_head = log;
- else {
- /* append to tail */
- struct store_log_forward *t;
- t = log_head;
- while (t->next != NULL)
- t = t->next;
- t->next = log;
- }
- }
-}
-
-/* The log_puts() serves to somewhat different goals:
- *
- * - logging
- * - feeding low-level info to the user in GDB or Telnet
- *
- * The latter dictates that strings without newline are not logged, lest there
- * will be *MANY log lines when sending one char at the time(e.g.
- * target_request.c).
- *
- */
-static void log_puts(enum log_levels level,
- const char *file,
- int line,
- const char *function,
- const char *string)
-{
- char *f;
- if (level == LOG_LVL_OUTPUT) {
- /* do not prepend any headers, just print out what we were given and return */
- fputs(string, log_output);
- fflush(log_output);
- return;
- }
-
- f = strrchr(file, '/');
- if (f != NULL)
- file = f + 1;
-
- if (strlen(string) > 0) {
- if (debug_level >= LOG_LVL_DEBUG) {
- /* print with count and time information */
- int t = (int)(timeval_ms()-start);
-#ifdef _DEBUG_FREE_SPACE_
- struct mallinfo info;
- info = mallinfo();
-#endif
- fprintf(log_output, "%s%d %d %s:%d %s()"
-#ifdef _DEBUG_FREE_SPACE_
- " %d"
-#endif
- ": %s", log_strings[level + 1], count, t, file, line, function,
-#ifdef _DEBUG_FREE_SPACE_
- info.fordblks,
-#endif
- string);
- } else {
- /* if we are using gdb through pipes then we do not want any output
- * to the pipe otherwise we get repeated strings */
- fprintf(log_output, "%s%s",
- (level > LOG_LVL_USER) ? log_strings[level + 1] : "", string);
- }
- } else {
- /* Empty strings are sent to log callbacks to keep e.g. gdbserver alive, here we do
- *nothing. */
- }
-
- fflush(log_output);
-
- /* Never forward LOG_LVL_DEBUG, too verbose and they can be found in the log if need be */
- if (level <= LOG_LVL_INFO)
- log_forward(file, line, function, string);
-}
-
-void log_printf(enum log_levels level,
- const char *file,
- unsigned line,
- const char *function,
- const char *format,
- ...)
-{
- char *string;
- va_list ap;
-
- count++;
- if (level > debug_level)
- return;
-
- va_start(ap, format);
-
- string = alloc_vprintf(format, ap);
- if (string != NULL) {
- log_puts(level, file, line, function, string);
- free(string);
- }
-
- va_end(ap);
-}
-
-void log_printf_lf(enum log_levels level,
- const char *file,
- unsigned line,
- const char *function,
- const char *format,
- ...)
-{
- char *string;
- va_list ap;
-
- count++;
- if (level > debug_level)
- return;
-
- va_start(ap, format);
-
- string = alloc_vprintf(format, ap);
- if (string != NULL) {
- strcat(string, "\n"); /* alloc_vprintf guaranteed the buffer to be at least one
- *char longer */
- log_puts(level, file, line, function, string);
- free(string);
- }
-
- va_end(ap);
-}
-
-COMMAND_HANDLER(handle_debug_level_command)
-{
- if (CMD_ARGC == 1) {
- int new_level;
- COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], new_level);
- if ((new_level > LOG_LVL_DEBUG) || (new_level < LOG_LVL_SILENT)) {
- LOG_ERROR("level must be between %d and %d", LOG_LVL_SILENT, LOG_LVL_DEBUG);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- debug_level = new_level;
- } else if (CMD_ARGC > 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- command_print(CMD_CTX, "debug_level: %i", debug_level);
-
- return ERROR_OK;
-}
-
-COMMAND_HANDLER(handle_log_output_command)
-{
- if (CMD_ARGC == 1) {
- FILE *file = fopen(CMD_ARGV[0], "w");
-
- if (file)
- log_output = file;
- }
-
- return ERROR_OK;
-}
-
-static struct command_registration log_command_handlers[] = {
- {
- .name = "log_output",
- .handler = handle_log_output_command,
- .mode = COMMAND_ANY,
- .help = "redirect logging to a file (default: stderr)",
- .usage = "file_name",
- },
- {
- .name = "debug_level",
- .handler = handle_debug_level_command,
- .mode = COMMAND_ANY,
- .help = "Sets the verbosity level of debugging output. "
- "0 shows errors only; 1 adds warnings; "
- "2 (default) adds other info; 3 adds debugging.",
- .usage = "number",
- },
- COMMAND_REGISTRATION_DONE
-};
-
-int log_register_commands(struct command_context *cmd_ctx)
-{
- return register_commands(cmd_ctx, NULL, log_command_handlers);
-}
-
-void log_init(void)
-{
- /* set defaults for daemon configuration,
- * if not set by cmdline or cfgfile */
- if (debug_level == -1)
- debug_level = LOG_LVL_INFO;
-
- char *debug_env = getenv("OPENOCD_DEBUG_LEVEL");
- if (NULL != debug_env) {
- int value;
- int retval = parse_int(debug_env, &value);
- if (ERROR_OK == retval &&
- debug_level >= LOG_LVL_SILENT &&
- debug_level <= LOG_LVL_DEBUG)
- debug_level = value;
- }
-
- if (log_output == NULL)
- log_output = stderr;
-
- start = last_time = timeval_ms();
-}
-
-int set_log_output(struct command_context *cmd_ctx, FILE *output)
-{
- log_output = output;
- return ERROR_OK;
-}
-
-/* add/remove log callback handler */
-int log_add_callback(log_callback_fn fn, void *priv)
-{
- struct log_callback *cb;
-
- /* prevent the same callback to be registered more than once, just for sure */
- for (cb = log_callbacks; cb; cb = cb->next) {
- if (cb->fn == fn && cb->priv == priv)
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- /* alloc memory, it is safe just to return in case of an error, no need for the caller to
- *check this */
- cb = malloc(sizeof(struct log_callback));
- if (cb == NULL)
- return ERROR_BUF_TOO_SMALL;
-
- /* add item to the beginning of the linked list */
- cb->fn = fn;
- cb->priv = priv;
- cb->next = log_callbacks;
- log_callbacks = cb;
-
- return ERROR_OK;
-}
-
-int log_remove_callback(log_callback_fn fn, void *priv)
-{
- struct log_callback *cb, **p;
-
- for (p = &log_callbacks; (cb = *p); p = &(*p)->next) {
- if (cb->fn == fn && cb->priv == priv) {
- *p = cb->next;
- free(cb);
- return ERROR_OK;
- }
- }
-
- /* no such item */
- return ERROR_COMMAND_SYNTAX_ERROR;
-}
-
-/* return allocated string w/printf() result */
-char *alloc_vprintf(const char *fmt, va_list ap)
-{
- va_list ap_copy;
- int len;
- char *string;
-
- /* determine the length of the buffer needed */
- va_copy(ap_copy, ap);
- len = vsnprintf(NULL, 0, fmt, ap_copy);
- va_end(ap_copy);
-
- /* allocate and make room for terminating zero. */
- /* FIXME: The old version always allocated at least one byte extra and
- * other code depend on that. They should be probably be fixed, but for
- * now reserve the extra byte. */
- string = malloc(len + 2);
- if (string == NULL)
- return NULL;
-
- /* do the real work */
- vsnprintf(string, len + 1, fmt, ap);
-
- return string;
-}
-
-char *alloc_printf(const char *format, ...)
-{
- char *string;
- va_list ap;
- va_start(ap, format);
- string = alloc_vprintf(format, ap);
- va_end(ap);
- return string;
-}
-
-/* Code must return to the server loop before 1000ms has returned or invoke
- * this function.
- *
- * The GDB connection will time out if it spends >2000ms and you'll get nasty
- * error messages from GDB:
- *
- * Ignoring packet error, continuing...
- * Reply contains invalid hex digit 116
- *
- * While it is possible use "set remotetimeout" to more than the default 2000ms
- * in GDB, OpenOCD guarantees that it sends keep-alive packages on the
- * GDB protocol and it is a bug in OpenOCD not to either return to the server
- * loop or invoke keep_alive() every 1000ms.
- *
- * This function will send a keep alive packet if >500ms has passed since last time
- * it was invoked.
- *
- * Note that this function can be invoked often, so it needs to be relatively
- * fast when invoked more often than every 500ms.
- *
- */
-void keep_alive()
-{
- current_time = timeval_ms();
- if (current_time-last_time > 1000) {
- extern int gdb_actual_connections;
-
- if (gdb_actual_connections)
- LOG_WARNING("keep_alive() was not invoked in the "
- "1000ms timelimit. GDB alive packet not "
- "sent! (%lld). Workaround: increase "
- "\"set remotetimeout\" in GDB",
- current_time-last_time);
- else
- LOG_DEBUG("keep_alive() was not invoked in the "
- "1000ms timelimit (%lld). This may cause "
- "trouble with GDB connections.",
- current_time-last_time);
- }
- if (current_time-last_time > 500) {
- /* this will keep the GDB connection alive */
- LOG_USER_N("%s", "");
-
- /* DANGER!!!! do not add code to invoke e.g. target event processing,
- * jim timer processing, etc. it can cause infinite recursion +
- * jim event callbacks need to happen at a well defined time,
- * not anywhere keep_alive() is invoked.
- *
- * These functions should be invoked at a well defined spot in server.c
- */
-
- last_time = current_time;
- }
-}
-
-/* reset keep alive timer without sending message */
-void kept_alive()
-{
- current_time = timeval_ms();
- last_time = current_time;
-}
-
-/* if we sleep for extended periods of time, we must invoke keep_alive() intermittantly */
-void alive_sleep(uint64_t ms)
-{
- uint64_t napTime = 10;
- for (uint64_t i = 0; i < ms; i += napTime) {
- uint64_t sleep_a_bit = ms - i;
- if (sleep_a_bit > napTime)
- sleep_a_bit = napTime;
-
- usleep(sleep_a_bit * 1000);
- keep_alive();
- }
-}
-
-void busy_sleep(uint64_t ms)
-{
- uint64_t then = timeval_ms();
- while (timeval_ms() - then < ms) {
- /*
- * busy wait
- */
- }
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/log.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/log.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/log.h
deleted file mode 100755
index 7f9f32c..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/log.h
+++ /dev/null
@@ -1,144 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef ERROR_H
-#define ERROR_H
-
-#include <helper/command.h>
-
-/* To achieve C99 printf compatibility in MinGW, gnu_printf should be
- * used for __attribute__((format( ... ))), with GCC v4.4 or later
- */
-#if (defined(IS_MINGW) && (((__GNUC__ << 16) + __GNUC_MINOR__) >= 0x00040004))
-#define PRINTF_ATTRIBUTE_FORMAT gnu_printf
-#else
-#define PRINTF_ATTRIBUTE_FORMAT printf
-#endif
-
-/* logging priorities
- * LOG_LVL_SILENT - turn off all output. In lieu of try + catch this can be used as a
- * feeble ersatz.
- * LOG_LVL_USER - user messages. Could be anything from information
- * to progress messags. These messages do not represent
- * incorrect or unexpected behaviour, just normal execution.
- * LOG_LVL_ERROR - fatal errors, that are likely to cause program abort
- * LOG_LVL_WARNING - non-fatal errors, that may be resolved later
- * LOG_LVL_INFO - state information, etc.
- * LOG_LVL_DEBUG - debug statements, execution trace
- */
-enum log_levels {
- LOG_LVL_SILENT = -3,
- LOG_LVL_OUTPUT = -2,
- LOG_LVL_USER = -1,
- LOG_LVL_ERROR = 0,
- LOG_LVL_WARNING = 1,
- LOG_LVL_INFO = 2,
- LOG_LVL_DEBUG = 3
-};
-
-void log_printf(enum log_levels level, const char *file, unsigned line,
- const char *function, const char *format, ...)
-__attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6)));
-void log_printf_lf(enum log_levels level, const char *file, unsigned line,
- const char *function, const char *format, ...)
-__attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 5, 6)));
-
-/**
- * Initialize logging module. Call during program startup.
- */
-void log_init(void);
-int set_log_output(struct command_context *cmd_ctx, FILE *output);
-
-int log_register_commands(struct command_context *cmd_ctx);
-
-void keep_alive(void);
-void kept_alive(void);
-
-void alive_sleep(uint64_t ms);
-void busy_sleep(uint64_t ms);
-
-typedef void (*log_callback_fn)(void *priv, const char *file, unsigned line,
- const char *function, const char *string);
-
-struct log_callback {
- log_callback_fn fn;
- void *priv;
- struct log_callback *next;
-};
-
-int log_add_callback(log_callback_fn fn, void *priv);
-int log_remove_callback(log_callback_fn fn, void *priv);
-
-char *alloc_vprintf(const char *fmt, va_list ap);
-char *alloc_printf(const char *fmt, ...);
-
-extern int debug_level;
-
-/* Avoid fn call and building parameter list if we're not outputting the information.
- * Matters on feeble CPUs for DEBUG/INFO statements that are involved frequently */
-
-#define LOG_LEVEL_IS(FOO) ((debug_level) >= (FOO))
-
-#define LOG_DEBUG(expr ...) \
- do { \
- if (debug_level >= LOG_LVL_DEBUG) \
- log_printf_lf(LOG_LVL_DEBUG, \
- __FILE__, __LINE__, __func__, \
- expr); \
- } while (0)
-
-#define LOG_INFO(expr ...) \
- log_printf_lf(LOG_LVL_INFO, __FILE__, __LINE__, __func__, expr)
-
-#define LOG_WARNING(expr ...) \
- log_printf_lf(LOG_LVL_WARNING, __FILE__, __LINE__, __func__, expr)
-
-#define LOG_ERROR(expr ...) \
- log_printf_lf(LOG_LVL_ERROR, __FILE__, __LINE__, __func__, expr)
-
-#define LOG_USER(expr ...) \
- log_printf_lf(LOG_LVL_USER, __FILE__, __LINE__, __func__, expr)
-
-#define LOG_USER_N(expr ...) \
- log_printf(LOG_LVL_USER, __FILE__, __LINE__, __func__, expr)
-
-#define LOG_OUTPUT(expr ...) \
- log_printf(LOG_LVL_OUTPUT, __FILE__, __LINE__, __func__, expr)
-
-/* general failures
- * error codes < 100
- */
-#define ERROR_OK (0)
-#define ERROR_NO_CONFIG_FILE (-2)
-#define ERROR_BUF_TOO_SMALL (-3)
-/* see "Error:" log entry for meaningful message to the user. The caller should
- * make no assumptions about what went wrong and try to handle the problem.
- */
-#define ERROR_FAIL (-4)
-#define ERROR_WAIT (-5)
-
-
-#endif /* LOG_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/options.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/options.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/options.c
deleted file mode 100755
index b13d466..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/options.c
+++ /dev/null
@@ -1,232 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2004, 2005 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007-2010 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "configuration.h"
-#include "log.h"
-#include "command.h"
-
-#include <getopt.h>
-
-static int help_flag, version_flag;
-
-static const struct option long_options[] = {
- {"help", no_argument, &help_flag, 1},
- {"version", no_argument, &version_flag, 1},
- {"debug", optional_argument, 0, 'd'},
- {"file", required_argument, 0, 'f'},
- {"search", required_argument, 0, 's'},
- {"log_output", required_argument, 0, 'l'},
- {"command", required_argument, 0, 'c'},
- {"pipe", no_argument, 0, 'p'},
- {0, 0, 0, 0}
-};
-
-int configuration_output_handler(struct command_context *context, const char *line)
-{
- LOG_USER_N("%s", line);
-
- return ERROR_OK;
-}
-
-#ifdef _WIN32
-static char *find_suffix(const char *text, const char *suffix)
-{
- size_t text_len = strlen(text);
- size_t suffix_len = strlen(suffix);
-
- if (suffix_len == 0)
- return (char *)text + text_len;
-
- if (suffix_len > text_len || strncmp(text + text_len - suffix_len, suffix, suffix_len) != 0)
- return NULL; /* Not a suffix of text */
-
- return (char *)text + text_len - suffix_len;
-}
-#endif
-
-static void add_default_dirs(void)
-{
- const char *run_prefix;
- char *path;
-
-#ifdef _WIN32
- char strExePath[MAX_PATH];
- GetModuleFileName(NULL, strExePath, MAX_PATH);
-
- /* Strip executable file name, leaving path */
- *strrchr(strExePath, '\\') = '\0';
-
- /* Convert path separators to UNIX style, should work on Windows also. */
- for (char *p = strExePath; *p; p++) {
- if (*p == '\\')
- *p = '/';
- }
-
- char *end_of_prefix = find_suffix(strExePath, BINDIR);
- if (end_of_prefix != NULL)
- *end_of_prefix = '\0';
-
- run_prefix = strExePath;
-#else
- run_prefix = "";
-#endif
-
- LOG_DEBUG("bindir=%s", BINDIR);
- LOG_DEBUG("pkgdatadir=%s", PKGDATADIR);
- LOG_DEBUG("run_prefix=%s", run_prefix);
-
- /*
- * The directory containing OpenOCD-supplied scripts should be
- * listed last in the built-in search order, so the user can
- * override these scripts with site-specific customizations.
- */
- const char *home = getenv("HOME");
-
- if (home) {
- path = alloc_printf("%s/.openocd", home);
- if (path) {
- add_script_search_dir(path);
- free(path);
- }
- }
-
- path = getenv("OPENOCD_SCRIPTS");
-
- if (path)
- add_script_search_dir(path);
-
-#ifdef _WIN32
- const char *appdata = getenv("APPDATA");
-
- if (appdata) {
- path = alloc_printf("%s/OpenOCD", appdata);
- if (path) {
- add_script_search_dir(path);
- free(path);
- }
- }
-#endif
-
- path = alloc_printf("%s%s%s", run_prefix, PKGDATADIR, "/site");
- if (path) {
- add_script_search_dir(path);
- free(path);
- }
-
- path = alloc_printf("%s%s%s", run_prefix, PKGDATADIR, "/scripts");
- if (path) {
- add_script_search_dir(path);
- free(path);
- }
-}
-
-int parse_cmdline_args(struct command_context *cmd_ctx, int argc, char *argv[])
-{
- int c;
-
- while (1) {
- /* getopt_long stores the option index here. */
- int option_index = 0;
-
- c = getopt_long(argc, argv, "hvd::l:f:s:c:p", long_options, &option_index);
-
- /* Detect the end of the options. */
- if (c == -1)
- break;
-
- switch (c) {
- case 0:
- break;
- case 'h': /* --help | -h */
- help_flag = 1;
- break;
- case 'v': /* --version | -v */
- version_flag = 1;
- break;
- case 'f': /* --file | -f */
- {
- char *command = alloc_printf("script {%s}", optarg);
- add_config_command(command);
- free(command);
- break;
- }
- case 's': /* --search | -s */
- add_script_search_dir(optarg);
- break;
- case 'd': /* --debug | -d */
- {
- char *command = alloc_printf("debug_level %s", optarg ? optarg : "3");
- command_run_line(cmd_ctx, command);
- free(command);
- break;
- }
- case 'l': /* --log_output | -l */
- if (optarg) {
- char *command = alloc_printf("log_output %s", optarg);
- command_run_line(cmd_ctx, command);
- free(command);
- }
- break;
- case 'c': /* --command | -c */
- if (optarg)
- add_config_command(optarg);
- break;
- case 'p':
- /* to replicate the old syntax this needs to be synchronous
- * otherwise the gdb stdin will overflow with the warning message */
- command_run_line(cmd_ctx, "gdb_port pipe; log_output openocd.log");
- LOG_WARNING("deprecated option: -p/--pipe. Use '-c \"gdb_port pipe; "
- "log_output openocd.log\"' instead.");
- break;
- }
- }
-
- if (help_flag) {
- LOG_OUTPUT("Open On-Chip Debugger\nLicensed under GNU GPL v2\n");
- LOG_OUTPUT("--help | -h\tdisplay this help\n");
- LOG_OUTPUT("--version | -v\tdisplay OpenOCD version\n");
- LOG_OUTPUT("--file | -f\tuse configuration file <name>\n");
- LOG_OUTPUT("--search | -s\tdir to search for config files and scripts\n");
- LOG_OUTPUT("--debug | -d\tset debug level <0-3>\n");
- LOG_OUTPUT("--log_output | -l\tredirect log output to file <name>\n");
- LOG_OUTPUT("--command | -c\trun <command>\n");
- exit(-1);
- }
-
- if (version_flag) {
- /* Nothing to do, version gets printed automatically. */
- /* It is not an error to request the VERSION number. */
- exit(0);
- }
-
- /* paths specified on the command line take precedence over these
- * built-in paths
- */
- add_default_dirs();
-
- return ERROR_OK;
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/replacements.c
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/replacements.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/replacements.c
deleted file mode 100755
index bb23dd9..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/replacements.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-/* DANGER!!!! These must be defined *BEFORE* replacements.h and the malloc() macro!!!! */
-
-#include <stdlib.h>
-#include <string.h>
-/*
- * clear_malloc
- *
- * will alloc memory and clear it
- */
-void *clear_malloc(size_t size)
-{
- void *t = malloc(size);
- if (t != NULL)
- memset(t, 0x00, size);
- return t;
-}
-
-void *fill_malloc(size_t size)
-{
- void *t = malloc(size);
- if (t != NULL) {
- /* We want to initialize memory to some known bad state.
- * 0 and 0xff yields 0 and -1 as integers, which often
- * have meaningful values. 0x5555... is not often a valid
- * integer and is quite easily spotted in the debugger
- * also it is almost certainly an invalid address */
- memset(t, 0x55, size);
- }
- return t;
-}
-
-#define IN_REPLACEMENTS_C
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-#ifdef HAVE_STRINGS_H
-#include <strings.h>
-#endif
-
-#ifdef _WIN32
-#include <io.h>
-#endif
-
-/* replacements for gettimeofday */
-#ifndef HAVE_GETTIMEOFDAY
-
-/* Windows */
-#ifdef _WIN32
-
-#ifndef __GNUC__
-#define EPOCHFILETIME (116444736000000000i64)
-#else
-#define EPOCHFILETIME (116444736000000000LL)
-#endif
-
-int gettimeofday(struct timeval *tv, struct timezone *tz)
-{
- FILETIME ft;
- LARGE_INTEGER li;
- __int64 t;
- static int tzflag;
-
- if (tv) {
- GetSystemTimeAsFileTime(&ft);
- li.LowPart = ft.dwLowDateTime;
- li.HighPart = ft.dwHighDateTime;
- t = li.QuadPart; /* In 100-nanosecond intervals */
- t -= EPOCHFILETIME; /* Offset to the Epoch time */
- t /= 10; /* In microseconds */
- tv->tv_sec = (long)(t / 1000000);
- tv->tv_usec = (long)(t % 1000000);
- }
-
- if (tz) {
- if (!tzflag) {
- _tzset();
- tzflag++;
- }
- tz->tz_minuteswest = _timezone / 60;
- tz->tz_dsttime = _daylight;
- }
-
- return 0;
-}
-#endif /* _WIN32 */
-
-#endif /* HAVE_GETTIMEOFDAY */
-
-#ifndef HAVE_STRNLEN
-size_t strnlen(const char *s, size_t maxlen)
-{
- const char *end = (const char *)memchr(s, '\0', maxlen);
- return end ? (size_t) (end - s) : maxlen;
-}
-#endif
-
-#ifndef HAVE_STRNDUP
-char *strndup(const char *s, size_t n)
-{
- size_t len = strnlen(s, n);
- char *new = malloc(len + 1);
-
- if (new == NULL)
- return NULL;
-
- new[len] = '\0';
- return (char *) memcpy(new, s, len);
-}
-#endif
-
-#ifdef _WIN32
-int win_select(int max_fd, fd_set *rfds, fd_set *wfds, fd_set *efds, struct timeval *tv)
-{
- DWORD ms_total, limit;
- HANDLE handles[MAXIMUM_WAIT_OBJECTS];
- int handle_slot_to_fd[MAXIMUM_WAIT_OBJECTS];
- int n_handles = 0, i;
- fd_set sock_read, sock_write, sock_except;
- fd_set aread, awrite, aexcept;
- int sock_max_fd = -1;
- struct timeval tvslice;
- int retcode;
-
-#define SAFE_FD_ISSET(fd, set) (set != NULL && FD_ISSET(fd, set))
-
- /* calculate how long we need to wait in milliseconds */
- if (tv == NULL)
- ms_total = INFINITE;
- else {
- ms_total = tv->tv_sec * 1000;
- ms_total += tv->tv_usec / 1000;
- }
-
- FD_ZERO(&sock_read);
- FD_ZERO(&sock_write);
- FD_ZERO(&sock_except);
-
- /* build an array of handles for non-sockets */
- for (i = 0; i < max_fd; i++) {
- if (SAFE_FD_ISSET(i, rfds) || SAFE_FD_ISSET(i, wfds) || SAFE_FD_ISSET(i, efds)) {
- intptr_t handle = (intptr_t) _get_osfhandle(i);
- handles[n_handles] = (HANDLE)handle;
- if (handles[n_handles] == INVALID_HANDLE_VALUE) {
- /* socket */
- if (SAFE_FD_ISSET(i, rfds))
- FD_SET(i, &sock_read);
- if (SAFE_FD_ISSET(i, wfds))
- FD_SET(i, &sock_write);
- if (SAFE_FD_ISSET(i, efds))
- FD_SET(i, &sock_except);
- if (i > sock_max_fd)
- sock_max_fd = i;
- } else {
- handle_slot_to_fd[n_handles] = i;
- n_handles++;
- }
- }
- }
-
- if (n_handles == 0) {
- /* plain sockets only - let winsock handle the whole thing */
- return select(max_fd, rfds, wfds, efds, tv);
- }
-
- /* mixture of handles and sockets; lets multiplex between
- * winsock and waiting on the handles */
-
- FD_ZERO(&aread);
- FD_ZERO(&awrite);
- FD_ZERO(&aexcept);
-
- limit = GetTickCount() + ms_total;
- do {
- retcode = 0;
-
- if (sock_max_fd >= 0) {
- /* overwrite the zero'd sets here; the select call
- * will clear those that are not active */
- aread = sock_read;
- awrite = sock_write;
- aexcept = sock_except;
-
- tvslice.tv_sec = 0;
- tvslice.tv_usec = 1000;
-
- retcode = select(sock_max_fd + 1, &aread, &awrite, &aexcept, &tvslice);
- }
-
- if (n_handles > 0) {
- /* check handles */
- DWORD wret;
-
- wret = MsgWaitForMultipleObjects(n_handles,
- handles,
- FALSE,
- retcode > 0 ? 0 : 1,
- QS_ALLEVENTS);
-
- if (wret == WAIT_TIMEOUT) {
- /* set retcode to 0; this is the default.
- * select() may have set it to something else,
- * in which case we leave it alone, so this branch
- * does nothing */
- ;
- } else if (wret == WAIT_FAILED) {
- if (retcode == 0)
- retcode = -1;
- } else {
- if (retcode < 0)
- retcode = 0;
- for (i = 0; i < n_handles; i++) {
- if (WAIT_OBJECT_0 == WaitForSingleObject(handles[i], 0)) {
- if (SAFE_FD_ISSET(handle_slot_to_fd[i], rfds)) {
- DWORD dwBytes;
- intptr_t handle = (intptr_t) _get_osfhandle(
- handle_slot_to_fd[i]);
-
- if (PeekNamedPipe((HANDLE)handle, NULL, 0,
- NULL, &dwBytes, NULL)) {
- /* check to see if gdb pipe has data available */
- if (dwBytes) {
- FD_SET(handle_slot_to_fd[i], &aread);
- retcode++;
- }
- } else {
- FD_SET(handle_slot_to_fd[i], &aread);
- retcode++;
- }
- }
- if (SAFE_FD_ISSET(handle_slot_to_fd[i], wfds)) {
- FD_SET(handle_slot_to_fd[i], &awrite);
- retcode++;
- }
- if (SAFE_FD_ISSET(handle_slot_to_fd[i], efds)) {
- FD_SET(handle_slot_to_fd[i], &aexcept);
- retcode++;
- }
- }
- }
- }
- }
- } while (retcode == 0 && (ms_total == INFINITE || GetTickCount() < limit));
-
- if (rfds)
- *rfds = aread;
- if (wfds)
- *wfds = awrite;
- if (efds)
- *efds = aexcept;
-
- return retcode;
-}
-#endif
-
-#if defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME
-#include <libusb.h>
-/* Verbatim from git://git.libusb.org/libusb.git tag 1.0.9
- * The libusb_error enum is compatible down to v0.9.1
- */
-const char *libusb_error_name(int error_code)
-{
- enum libusb_error error = error_code;
- switch (error) {
- case LIBUSB_SUCCESS:
- return "LIBUSB_SUCCESS";
- case LIBUSB_ERROR_IO:
- return "LIBUSB_ERROR_IO";
- case LIBUSB_ERROR_INVALID_PARAM:
- return "LIBUSB_ERROR_INVALID_PARAM";
- case LIBUSB_ERROR_ACCESS:
- return "LIBUSB_ERROR_ACCESS";
- case LIBUSB_ERROR_NO_DEVICE:
- return "LIBUSB_ERROR_NO_DEVICE";
- case LIBUSB_ERROR_NOT_FOUND:
- return "LIBUSB_ERROR_NOT_FOUND";
- case LIBUSB_ERROR_BUSY:
- return "LIBUSB_ERROR_BUSY";
- case LIBUSB_ERROR_TIMEOUT:
- return "LIBUSB_ERROR_TIMEOUT";
- case LIBUSB_ERROR_OVERFLOW:
- return "LIBUSB_ERROR_OVERFLOW";
- case LIBUSB_ERROR_PIPE:
- return "LIBUSB_ERROR_PIPE";
- case LIBUSB_ERROR_INTERRUPTED:
- return "LIBUSB_ERROR_INTERRUPTED";
- case LIBUSB_ERROR_NO_MEM:
- return "LIBUSB_ERROR_NO_MEM";
- case LIBUSB_ERROR_NOT_SUPPORTED:
- return "LIBUSB_ERROR_NOT_SUPPORTED";
- case LIBUSB_ERROR_OTHER:
- return "LIBUSB_ERROR_OTHER";
- }
- return "**UNKNOWN**";
-}
-#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/replacements.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/replacements.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/replacements.h
deleted file mode 100755
index 2776602..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/replacements.h
+++ /dev/null
@@ -1,285 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef REPLACEMENTS_H
-#define REPLACEMENTS_H
-
-/* MIN,MAX macros */
-#ifndef MIN
-#define MIN(a, b) (((a) < (b)) ? (a) : (b))
-#endif
-#ifndef MAX
-#define MAX(a, b) (((a) > (b)) ? (a) : (b))
-#endif
-
-/* for systems that do not support ENOTSUP
- * win32 being one of them */
-#ifndef ENOTSUP
-#define ENOTSUP 134 /* Not supported */
-#endif
-
-/* for systems that do not support O_BINARY
- * linux being one of them */
-#ifndef O_BINARY
-#define O_BINARY 0
-#endif
-
-#ifndef HAVE_SYS_TIME_H
-
-#ifndef _TIMEVAL_DEFINED
-#define _TIMEVAL_DEFINED
-
-struct timeval {
- long tv_sec;
- long tv_usec;
-};
-
-#endif /* _TIMEVAL_DEFINED */
-
-#endif
-
-/* gettimeofday() */
-#ifndef HAVE_GETTIMEOFDAY
-
-#ifdef _WIN32
-struct timezone {
- int tz_minuteswest;
- int tz_dsttime;
-};
-#endif
-struct timezone;
-
-int gettimeofday(struct timeval *tv, struct timezone *tz);
-
-#endif
-
-#ifndef IN_REPLACEMENTS_C
-/**** clear_malloc & fill_malloc ****/
-void *clear_malloc(size_t size);
-void *fill_malloc(size_t size);
-#endif
-
-/*
- * Now you have 3 ways for the malloc function:
- *
- * 1. Do not change anything, use the original malloc
- *
- * 2. Use the clear_malloc function instead of the original malloc.
- * In this case you must use the following define:
- * #define malloc((_a)) clear_malloc((_a))
- *
- * 3. Use the fill_malloc function instead of the original malloc.
- * In this case you must use the following define:
- * #define malloc((_a)) fill_malloc((_a))
- *
- * We have figured out that there could exist some malloc problems
- * where variables are using without to be initialise. To find this
- * places, use the fill_malloc function. With this function we want
- * to initialize memory to some known bad state. This is quite easily
- * spotted in the debugger and will trap to an invalid address.
- *
- * clear_malloc can be used if you want to set not initialise
- * variable to 0.
- *
- * If you do not want to change the malloc function, to not use one of
- * the following macros. Which is the default way.
- */
-
-/* #define malloc(_a) clear_malloc(_a)
- * #define malloc(_a) fill_malloc(_a) */
-
-/* GNU extensions to the C library that may be missing on some systems */
-#ifndef HAVE_STRNDUP
-char *strndup(const char *s, size_t n);
-#endif /* HAVE_STRNDUP */
-
-#ifndef HAVE_STRNLEN
-size_t strnlen(const char *s, size_t maxlen);
-#endif /* HAVE_STRNLEN */
-
-#ifndef HAVE_USLEEP
-#ifdef _WIN32
-static inline unsigned usleep(unsigned int usecs)
-{
- Sleep((usecs/1000));
- return 0;
-}
-#else
-#error no usleep defined for your platform
-#endif
-#endif /* HAVE_USLEEP */
-
-/* Windows specific */
-#ifdef _WIN32
-
-#include <windows.h>
-#include <time.h>
-
-/* Windows does not declare sockaddr_un */
-#define UNIX_PATH_LEN 108
-struct sockaddr_un {
- uint16_t sun_family;
- char sun_path[UNIX_PATH_LEN];
-};
-
-/* win32 systems do not support ETIMEDOUT */
-
-#ifndef ETIMEDOUT
-#define ETIMEDOUT WSAETIMEDOUT
-#endif
-
-#if IS_MINGW == 1
-static inline unsigned char inb(unsigned short int port)
-{
- unsigned char _v;
- __asm__ __volatile__ ("inb %w1,%0" : "=a" (_v) : "Nd" (port));
- return _v;
-}
-
-static inline void outb(unsigned char value, unsigned short int port)
-{
- __asm__ __volatile__ ("outb %b0,%w1" : : "a" (value), "Nd" (port));
-}
-
-/* mingw does not have ffs, so use gcc builtin types */
-#define ffs __builtin_ffs
-
-#endif /* IS_MINGW */
-
-int win_select(int max_fd, fd_set *rfds, fd_set *wfds, fd_set *efds, struct timeval *tv);
-
-#endif /* _WIN32 */
-
-/* generic socket functions for Windows and Posix */
-static inline int write_socket(int handle, const void *buffer, unsigned int count)
-{
-#ifdef _WIN32
- return send(handle, buffer, count, 0);
-#else
- return write(handle, buffer, count);
-#endif
-}
-
-static inline int read_socket(int handle, void *buffer, unsigned int count)
-{
-#ifdef _WIN32
- return recv(handle, buffer, count, 0);
-#else
- return read(handle, buffer, count);
-#endif
-}
-
-static inline int close_socket(int sock)
-{
-#ifdef _WIN32
- return closesocket(sock);
-#else
- return close(sock);
-#endif
-}
-
-static inline void socket_nonblock(int fd)
-{
-#ifdef _WIN32
- unsigned long nonblock = 1;
- ioctlsocket(fd, FIONBIO, &nonblock);
-#else
- int oldopts = fcntl(fd, F_GETFL, 0);
- fcntl(fd, F_SETFL, oldopts | O_NONBLOCK);
-#endif
-}
-
-static inline int socket_select(int max_fd,
- fd_set *rfds,
- fd_set *wfds,
- fd_set *efds,
- struct timeval *tv)
-{
-#ifdef _WIN32
- return win_select(max_fd, rfds, wfds, efds, tv);
-#else
- return select(max_fd, rfds, wfds, efds, tv);
-#endif
-}
-
-#ifndef HAVE_ELF_H
-
-typedef uint32_t Elf32_Addr;
-typedef uint16_t Elf32_Half;
-typedef uint32_t Elf32_Off;
-typedef int32_t Elf32_Sword;
-typedef uint32_t Elf32_Word;
-typedef uint32_t Elf32_Size;
-typedef Elf32_Off Elf32_Hashelt;
-
-typedef struct {
- unsigned char e_ident[16]; /* Magic number and other info */
- Elf32_Half e_type; /* Object file type */
- Elf32_Half e_machine; /* Architecture */
- Elf32_Word e_version; /* Object file version */
- Elf32_Addr e_entry; /* Entry point virtual address */
- Elf32_Off e_phoff; /* Program header table file offset */
- Elf32_Off e_shoff; /* Section header table file offset */
- Elf32_Word e_flags; /* Processor-specific flags */
- Elf32_Half e_ehsize; /* ELF header size in bytes */
- Elf32_Half e_phentsize; /* Program header table entry size */
- Elf32_Half e_phnum; /* Program header table entry count */
- Elf32_Half e_shentsize; /* Section header table entry size */
- Elf32_Half e_shnum; /* Section header table entry count */
- Elf32_Half e_shstrndx; /* Section header string table index */
-} Elf32_Ehdr;
-
-#define ELFMAG "\177ELF"
-#define SELFMAG 4
-
-#define EI_CLASS 4 /* File class byte index */
-#define ELFCLASS32 1 /* 32-bit objects */
-#define ELFCLASS64 2 /* 64-bit objects */
-
-#define EI_DATA 5 /* Data encoding byte index */
-#define ELFDATA2LSB 1 /* 2's complement, little endian */
-#define ELFDATA2MSB 2 /* 2's complement, big endian */
-
-typedef struct {
- Elf32_Word p_type; /* Segment type */
- Elf32_Off p_offset; /* Segment file offset */
- Elf32_Addr p_vaddr; /* Segment virtual address */
- Elf32_Addr p_paddr; /* Segment physical address */
- Elf32_Size p_filesz; /* Segment size in file */
- Elf32_Size p_memsz; /* Segment size in memory */
- Elf32_Word p_flags; /* Segment flags */
- Elf32_Size p_align; /* Segment alignment */
-} Elf32_Phdr;
-
-#define PT_LOAD 1 /* Loadable program segment */
-
-#endif /* HAVE_ELF_H */
-
-#if defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME
-const char *libusb_error_name(int error_code);
-#endif /* defined HAVE_LIBUSB1 && !defined HAVE_LIBUSB_ERROR_NAME */
-
-#endif /* REPLACEMENTS_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/startup.tcl
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/startup.tcl b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/startup.tcl
deleted file mode 100755
index 4ca2cab..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/startup.tcl
+++ /dev/null
@@ -1,66 +0,0 @@
-# Defines basic Tcl procs that must exist for OpenOCD scripts to work.
-#
-# Embedded into OpenOCD executable
-#
-
-
-# We need to explicitly redirect this to the OpenOCD command
-# as Tcl defines the exit proc
-proc exit {} {
- ocd_throw exit
-}
-
-# All commands are registered with an 'ocd_' prefix, while the "real"
-# command is a wrapper that calls this function. Its primary purpose is
-# to discard 'handler' command output,
-proc ocd_bouncer {name args} {
- set cmd [format "ocd_%s" $name]
- set type [eval ocd_command type $cmd $args]
- set errcode error
- if {$type == "native"} {
- return [eval $cmd $args]
- } else {if {$type == "simple"} {
- set errcode [catch {eval $cmd $args}]
- if {$errcode == 0} {
- return ""
- } else {
- # 'classic' commands output error message as part of progress output
- set errmsg ""
- }
- } else {if {$type == "group"} {
- catch {eval ocd_usage $name $args}
- set errmsg [format "%s: command requires more arguments" \
- [concat $name " " $args]]
- } else {
- set errmsg [format "invalid subcommand \"%s\"" $args]
- }}}
- return -code $errcode $errmsg
-}
-
-# Try flipping / and \ to find file if the filename does not
-# match the precise spelling
-proc find {filename} {
- if {[catch {ocd_find $filename} t]==0} {
- return $t
- }
- if {[catch {ocd_find [string map {\ /} $filename} t]==0} {
- return $t
- }
- if {[catch {ocd_find [string map {/ \\} $filename} t]==0} {
- return $t
- }
- # make sure error message matches original input string
- return -code error "Can't find $filename"
-}
-add_usage_text find "<file>"
-add_help_text find "print full path to file according to OpenOCD search rules"
-
-# Find and run a script
-proc script {filename} {
- uplevel #0 [list source [find $filename]]
-}
-add_help_text script "filename of OpenOCD script (tcl) to run"
-add_usage_text script "<file>"
-
-#########
-
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/system.h
----------------------------------------------------------------------
diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/system.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/system.h
deleted file mode 100755
index a6dfd7e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/system.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Dominic Rath <Do...@gmx.de> *
- * Copyright (C) 2007-2008 by �yvind Harboe <oy...@zylin.com> *
- * Copyright (C) 2008 by Spencer Oliver <sp...@spen-soft.co.uk> *
- * Copyright (C) 2009 by Zachary T Welch <zw...@superlucidity.net> *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef SYSTEM_H
-#define SYSTEM_H
-
-/* standard C library header files */
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-#include <ctype.h>
-#include <errno.h>
-
-/* +++ AC_HEADER_TIME +++ */
-#ifdef TIME_WITH_SYS_TIME
-# include <sys/time.h>
-# include <time.h>
-#else
-# ifdef HAVE_SYS_TIME_H
-# include <sys/time.h>
-# else
-# include <time.h>
-# endif
-#endif
-/* --- AC_HEADER_TIME --- */
-
-/* +++ platform specific headers +++ */
-#ifdef _WIN32
-#include <winsock2.h>
-#include <ws2tcpip.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#endif
-/* --- platform specific headers --- */
-
-#ifdef HAVE_SYS_SOCKET_H
-#include <sys/socket.h>
-#endif
-#ifdef HAVE_POLL_H
-#include <poll.h>
-#endif
-
-#ifdef __ECOS
-/* missing from eCos */
-#ifndef EFAULT
-#define EFAULT 14 /* Bad address */
-#endif
-#endif
-
-#ifdef HAVE_NETINET_IN_H
-#include <netinet/in.h>
-#endif
-#ifdef HAVE_SYS_SELECT_H
-#include <sys/select.h> /* select, FD_SET and friends (POSIX.1-2001) */
-#endif
-#ifdef HAVE_SYS_PARAM_H
-#include <sys/param.h> /* for MIN/MAX macros */
-#endif
-#ifdef HAVE_UNISTD_H
-#include <unistd.h>
-#endif
-#ifdef HAVE_FCNTL_H
-#include <fcntl.h>
-#endif
-
-#ifndef true
-#define true 1
-#define false 0
-#endif
-
-#endif /* SYSTEM_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support.c
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support.c
deleted file mode 100755
index 780eb96..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "time_support.h"
-
-/* calculate difference between two struct timeval values */
-int timeval_subtract(struct timeval *result, struct timeval *x, struct timeval *y)
-{
- if (x->tv_usec < y->tv_usec) {
- int nsec = (y->tv_usec - x->tv_usec) / 1000000 + 1;
- y->tv_usec -= 1000000 * nsec;
- y->tv_sec += nsec;
- }
- if (x->tv_usec - y->tv_usec > 1000000) {
- int nsec = (x->tv_usec - y->tv_usec) / 1000000;
- y->tv_usec += 1000000 * nsec;
- y->tv_sec -= nsec;
- }
-
- result->tv_sec = x->tv_sec - y->tv_sec;
- result->tv_usec = x->tv_usec - y->tv_usec;
-
- /* Return 1 if result is negative. */
- return x->tv_sec < y->tv_sec;
-}
-
-int timeval_add_time(struct timeval *result, long sec, long usec)
-{
- result->tv_sec += sec;
- result->tv_usec += usec;
-
- while (result->tv_usec > 1000000) {
- result->tv_usec -= 1000000;
- result->tv_sec++;
- }
-
- return 0;
-}
-
-int duration_start(struct duration *duration)
-{
- return gettimeofday(&duration->start, NULL);
-}
-
-int duration_measure(struct duration *duration)
-{
- struct timeval end;
- int retval = gettimeofday(&end, NULL);
- if (0 == retval)
- timeval_subtract(&duration->elapsed, &end, &duration->start);
- return retval;
-}
-
-float duration_elapsed(const struct duration *duration)
-{
- float t = duration->elapsed.tv_sec;
- t += (float)duration->elapsed.tv_usec / 1000000.0;
- return t;
-}
-
-float duration_kbps(const struct duration *duration, size_t count)
-{
- return count / (1024.0 * duration_elapsed(duration));
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support.h
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support.h b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support.h
deleted file mode 100755
index 5a95e7e..0000000
--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifndef TIME_SUPPORT_H
-#define TIME_SUPPORT_H
-
-#ifdef TIME_WITH_SYS_TIME
-# include <sys/time.h>
-# include <time.h>
-#else
-# ifdef HAVE_SYS_TIME_H
-# include <sys/time.h>
-# else
-# include <time.h>
-# endif
-#endif
-
-int timeval_subtract(struct timeval *result, struct timeval *x, struct timeval *y);
-int timeval_add_time(struct timeval *result, long sec, long usec);
-
-/** @returns gettimeofday() timeval as 64-bit in ms */
-int64_t timeval_ms(void);
-
-struct duration {
- struct timeval start;
- struct timeval elapsed;
-};
-
-/** Update the duration->start field to start the @a duration measurement. */
-int duration_start(struct duration *duration);
-/** Update the duration->elapsed field to finish the @a duration measurment. */
-int duration_measure(struct duration *duration);
-
-/** @returns Elapsed time in seconds. */
-float duration_elapsed(const struct duration *duration);
-/** @returns KB/sec for the elapsed @a duration and @a count bytes. */
-float duration_kbps(const struct duration *duration, size_t count);
-
-#endif /* TIME_SUPPORT_H */
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-site/blob/69f466b5/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support_common.c
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diff --git a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support_common.c b/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support_common.c
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--- a/docs/os/tutorials/downloads/openocd-code-89bf96ffe6ac66c80407af8383b9d5adc0dc35f4/src/helper/time_support_common.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/***************************************************************************
- * Copyright (C) 2006 by Dominic Rath *
- * Dominic.Rath@gmx.de *
- * *
- * Copyright (C) 2007,2008 �yvind Harboe *
- * oyvind.harboe@zylin.com *
- * *
- * Copyright (C) 2008 by Spencer Oliver *
- * spen@spen-soft.co.uk *
- * *
- * This program is free software; you can redistribute it and/or modify *
- * it under the terms of the GNU General Public License as published by *
- * the Free Software Foundation; either version 2 of the License, or *
- * (at your option) any later version. *
- * *
- * This program is distributed in the hope that it will be useful, *
- * but WITHOUT ANY WARRANTY; without even the implied warranty of *
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
- * GNU General Public License for more details. *
- * *
- * You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
- ***************************************************************************/
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "time_support.h"
-
-/* simple and low overhead fetching of ms counter. Use only
- * the difference between ms counters returned from this fn.
- */
-int64_t timeval_ms()
-{
- struct timeval now;
- int retval = gettimeofday(&now, NULL);
- if (retval < 0)
- return retval;
- return (int64_t)now.tv_sec * 1000 + now.tv_usec / 1000;
-}