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Posted to commits@mynewt.apache.org by we...@apache.org on 2016/11/04 04:24:47 UTC
incubator-mynewt-core git commit: MYNEWT-409: Number of SPI and I2C
ports should come from syscfg
Repository: incubator-mynewt-core
Updated Branches:
refs/heads/develop 81fd02877 -> 2820439e0
MYNEWT-409: Number of SPI and I2C ports should come from syscfg
The changes insure that the number of spi and i2c ports come
from syscfg as opposed to a header file. Moved pin configurations
for nrf51 and nrf52 from nrf_drv_config.h into os_bsp.c
Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo
Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/2820439e
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/2820439e
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/2820439e
Branch: refs/heads/develop
Commit: 2820439e0209969b15aa63d18c75adb3639bf79a
Parents: 81fd028
Author: William San Filippo <wi...@runtime.io>
Authored: Thu Nov 3 21:22:50 2016 -0700
Committer: William San Filippo <wi...@runtime.io>
Committed: Thu Nov 3 21:24:38 2016 -0700
----------------------------------------------------------------------
apps/spitest/src/main.c | 5 ++-
apps/spitest/syscfg.yml | 2 +-
hw/bsp/arduino_primo_nrf52/src/os_bsp.c | 57 +++++++++++++++++++-------
hw/bsp/arduino_primo_nrf52/syscfg.yml | 20 +++++++--
hw/bsp/bmd300eval/include/bsp/bsp.h | 3 --
hw/bsp/bmd300eval/src/os_bsp.c | 57 +++++++++++++++++++-------
hw/bsp/bmd300eval/syscfg.yml | 20 +++++++--
hw/bsp/nrf51-arduino_101/src/os_bsp.c | 53 ++++++++++++++++++++++++
hw/bsp/nrf51-arduino_101/syscfg.yml | 21 +++++++---
hw/bsp/nrf51-blenano/src/os_bsp.c | 57 +++++++++++++++++++-------
hw/bsp/nrf51-blenano/syscfg.yml | 21 +++++++---
hw/bsp/nrf51dk-16kbram/include/bsp/bsp.h | 3 --
hw/bsp/nrf51dk-16kbram/src/os_bsp.c | 58 +++++++++++++++++++--------
hw/bsp/nrf51dk-16kbram/syscfg.yml | 21 +++++++---
hw/bsp/nrf51dk/include/bsp/bsp.h | 3 --
hw/bsp/nrf51dk/src/os_bsp.c | 57 +++++++++++++++++++-------
hw/bsp/nrf51dk/syscfg.yml | 21 +++++++---
hw/bsp/nrf52dk/include/bsp/bsp.h | 3 --
hw/bsp/nrf52dk/src/os_bsp.c | 57 +++++++++++++++++++-------
hw/bsp/nrf52dk/syscfg.yml | 20 +++++++--
hw/bsp/rb-nano2/src/os_bsp.c | 40 +++++++++++++++++-
hw/bsp/rb-nano2/syscfg.yml | 20 +++++++--
hw/mcu/nordic/nrf51xxx/src/hal_i2c.c | 13 +++---
hw/mcu/nordic/nrf51xxx/src/hal_spi.c | 36 ++++++++---------
hw/mcu/nordic/nrf52xxx/src/hal_i2c.c | 13 +++---
hw/mcu/nordic/nrf52xxx/src/hal_spi.c | 52 +++++++++++++-----------
26 files changed, 528 insertions(+), 205 deletions(-)
----------------------------------------------------------------------
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/apps/spitest/src/main.c
----------------------------------------------------------------------
diff --git a/apps/spitest/src/main.c b/apps/spitest/src/main.c
index 5f31162..969973f 100755
--- a/apps/spitest/src/main.c
+++ b/apps/spitest/src/main.c
@@ -65,10 +65,11 @@ int g_led_pin;
#define SPI_BAUDRATE 500
-#if MYNEWT_VAL(SPI_MASTER) || MYNEWT_VAL(SPI_0_MASTER)
+#if MYNEWT_VAL(SPI_0_MASTER)
#define SPI_MASTER 1
+#define SPI_SS_PIN (MYNEWT_VAL(SPI_0_MASTER_SS_PIN))
#endif
-#if MYNEWT_VAL(SPI_SLAVE) || MYNEWT_VAL(SPI_0_SLAVE)
+#if MYNEWT_VAL(SPI_0_SLAVE)
#define SPI_SLAVE 1
#endif
#ifdef SPI_MASTER
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/apps/spitest/syscfg.yml
----------------------------------------------------------------------
diff --git a/apps/spitest/syscfg.yml b/apps/spitest/syscfg.yml
index dc071b1..565626b 100644
--- a/apps/spitest/syscfg.yml
+++ b/apps/spitest/syscfg.yml
@@ -1,4 +1,4 @@
# Package: apps/spitest
syscfg.vals:
- - SHELL_TASK: 0
+ SHELL_TASK: 0
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/arduino_primo_nrf52/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/arduino_primo_nrf52/src/os_bsp.c b/hw/bsp/arduino_primo_nrf52/src/os_bsp.c
index 3bf58e2..448a021 100644
--- a/hw/bsp/arduino_primo_nrf52/src/os_bsp.c
+++ b/hw/bsp/arduino_primo_nrf52/src/os_bsp.c
@@ -28,10 +28,10 @@
#include "hal/hal_watchdog.h"
#include "mcu/nrf52_hal.h"
#include "uart/uart.h"
-#if MYNEWT_VAL(SPI_MASTER)
+#if MYNEWT_VAL(SPI_0_MASTER)
#include "nrf_drv_spi.h"
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
+#if MYNEWT_VAL(SPI_0_SLAVE)
#include "nrf_drv_spis.h"
#endif
#if MYNEWT_VAL(UART_0)
@@ -77,18 +77,47 @@ static struct nrf52_adc_dev_cfg os_bsp_adc0_config = {
};
#endif
+#if MYNEWT_VAL(SPI_0_MASTER)
+/*
+ * NOTE: do not set the ss pin here! This would cause the nordic SDK
+ * to start using the SS pin when configured as a master and this is
+ * not what our HAL expects. Our HAL expects that the SS pin, if used,
+ * is treated as a gpio line and is handled outside the SPI routines.
+ */
+static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+ .sck_pin = 24,
+ .mosi_pin = 23,
+ .miso_pin = 22,
+ .ss_pin = NRF_DRV_SPI_PIN_NOT_USED,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1,
+ .orc = 0xFF,
+ .frequency = NRF_DRV_SPI_FREQ_4M,
+ .mode = NRF_DRV_SPI_MODE_0,
+ .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST
+};
+#endif
+
+#if MYNEWT_VAL(SPI_0_SLAVE)
+static const nrf_drv_spis_config_t os_bsp_spi0s_cfg = {
+ .sck_pin = 24,
+ .mosi_pin = 23,
+ .miso_pin = 22,
+ .csn_pin = 19,
+ .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE,
+ .csn_pullup = NRF_GPIO_PIN_PULLUP,
+ .orc = NRF_DRV_SPIS_DEFAULT_ORC,
+ .def = NRF_DRV_SPIS_DEFAULT_DEF,
+ .mode = NRF_DRV_SPIS_MODE_0,
+ .bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1
+};
+#endif
+
void
hal_bsp_init(void)
{
int rc;
-#if MYNEWT_VAL(SPI_MASTER)
- nrf_drv_spi_config_t spi_cfg = NRF_DRV_SPI_DEFAULT_CONFIG(0);
-#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- nrf_drv_spis_config_t spi_cfg = NRF_DRV_SPIS_DEFAULT_CONFIG(0);
-#endif
-
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
@@ -114,15 +143,13 @@ hal_bsp_init(void)
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
-#if MYNEWT_VAL(SPI_MASTER)
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_MASTER);
+#if MYNEWT_VAL(SPI_0_MASTER)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- spi_cfg.csn_pin = SPI_SS_PIN;
- spi_cfg.csn_pullup = NRF_GPIO_PIN_PULLUP;
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_SLAVE);
+#if MYNEWT_VAL(SPI_0_SLAVE)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/arduino_primo_nrf52/syscfg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/arduino_primo_nrf52/syscfg.yml b/hw/bsp/arduino_primo_nrf52/syscfg.yml
index 3c13258..175cf14 100644
--- a/hw/bsp/arduino_primo_nrf52/syscfg.yml
+++ b/hw/bsp/arduino_primo_nrf52/syscfg.yml
@@ -77,11 +77,23 @@ syscfg.defs:
description: 'TBD'
value: 0
- SPI_MASTER:
- description: 'TBD'
+ SPI_0_MASTER:
+ description: 'SPI 0 master'
value: 0
- SPI_SLAVE:
- description: 'TBD'
+ SPI_0_MASTER_SS_PIN:
+ description: 'SPI 0 (master) SS pin number.'
+ value: 19
+ SPI_1_MASTER:
+ description: 'SPI 1 master'
+ value: 0
+ SPI_1_MASTER_SS_PIN:
+ description: 'SPI 1 (master) SS pin number.'
+ value: -1
+ SPI_0_SLAVE:
+ description: 'SPI 0 slave'
+ value: 0
+ SPI_1_SLAVE:
+ description: 'SPI 1 slave'
value: 0
TIMER_0:
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/bmd300eval/include/bsp/bsp.h
----------------------------------------------------------------------
diff --git a/hw/bsp/bmd300eval/include/bsp/bsp.h b/hw/bsp/bmd300eval/include/bsp/bsp.h
index c659adf..7c6df66 100644
--- a/hw/bsp/bmd300eval/include/bsp/bsp.h
+++ b/hw/bsp/bmd300eval/include/bsp/bsp.h
@@ -41,9 +41,6 @@ extern uint8_t _ram_start;
#define LED_BLINK_PIN (17)
#define LED_2 (18)
-/* SPI SS */
-#define SPI_SS_PIN (22)
-
/* UART info */
#define CONSOLE_UART "uart0"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/bmd300eval/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/bmd300eval/src/os_bsp.c b/hw/bsp/bmd300eval/src/os_bsp.c
index 755f39d..822f1a5 100644
--- a/hw/bsp/bmd300eval/src/os_bsp.c
+++ b/hw/bsp/bmd300eval/src/os_bsp.c
@@ -31,10 +31,10 @@
#include "os/os_dev.h"
#include "bsp.h"
-#if MYNEWT_VAL(SPI_MASTER)
+#if MYNEWT_VAL(SPI_0_MASTER)
#include "nrf_drv_spi.h"
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
+#if MYNEWT_VAL(SPI_0_SLAVE)
#include "nrf_drv_spis.h"
#endif
#include "nrf_drv_config.h"
@@ -74,18 +74,47 @@ static struct nrf52_adc_dev_cfg os_bsp_adc0_config = {
};
#endif
+#if MYNEWT_VAL(SPI_0_MASTER)
+/*
+ * NOTE: do not set the ss pin here! This would cause the nordic SDK
+ * to start using the SS pin when configured as a master and this is
+ * not what our HAL expects. Our HAL expects that the SS pin, if used,
+ * is treated as a gpio line and is handled outside the SPI routines.
+ */
+static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+ .sck_pin = 23,
+ .mosi_pin = 24,
+ .miso_pin = 25,
+ .ss_pin = NRF_DRV_SPI_PIN_NOT_USED,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1,
+ .orc = 0xFF,
+ .frequency = NRF_DRV_SPI_FREQ_4M,
+ .mode = NRF_DRV_SPI_MODE_0,
+ .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST
+};
+#endif
+
+#if MYNEWT_VAL(SPI_0_SLAVE)
+static const nrf_drv_spis_config_t os_bsp_spi0s_cfg = {
+ .sck_pin = 23,
+ .mosi_pin = 24,
+ .miso_pin = 25,
+ .csn_pin = 22,
+ .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE,
+ .csn_pullup = NRF_GPIO_PIN_PULLUP,
+ .orc = NRF_DRV_SPIS_DEFAULT_ORC,
+ .def = NRF_DRV_SPIS_DEFAULT_DEF,
+ .mode = NRF_DRV_SPIS_MODE_0,
+ .bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1
+};
+#endif
+
void
hal_bsp_init(void)
{
int rc;
-#if MYNEWT_VAL(SPI_MASTER)
- nrf_drv_spi_config_t spi_cfg = NRF_DRV_SPI_DEFAULT_CONFIG(0);
-#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- nrf_drv_spis_config_t spi_cfg = NRF_DRV_SPIS_DEFAULT_CONFIG(0);
-#endif
-
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
@@ -111,15 +140,13 @@ hal_bsp_init(void)
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
-#if MYNEWT_VAL(SPI_MASTER)
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_MASTER);
+#if MYNEWT_VAL(SPI_0_MASTER)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- spi_cfg.csn_pin = SPI_SS_PIN;
- spi_cfg.csn_pullup = NRF_GPIO_PIN_PULLUP;
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_SLAVE);
+#if MYNEWT_VAL(SPI_0_SLAVE)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/bmd300eval/syscfg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/bmd300eval/syscfg.yml b/hw/bsp/bmd300eval/syscfg.yml
index a84f75f..35837af 100644
--- a/hw/bsp/bmd300eval/syscfg.yml
+++ b/hw/bsp/bmd300eval/syscfg.yml
@@ -65,11 +65,23 @@ syscfg.defs:
description: 'Bitbanger UART'
value: 0
- SPI_MASTER:
- description: 'TBD'
+ SPI_0_MASTER:
+ description: 'SPI 0 master'
value: 0
- SPI_SLAVE:
- description: 'TBD'
+ SPI_0_MASTER_SS_PIN:
+ description: 'SPI 0 (master) SS pin number'
+ value: 22
+ SPI_1_MASTER:
+ description: 'SPI 1 master'
+ value: 0
+ SPI_1_MASTER_SS_PIN:
+ description: 'SPI 1 (master) SS pin number.'
+ value: -1
+ SPI_0_SLAVE:
+ description: 'SPI 0 slave'
+ value: 0
+ SPI_1_SLAVE:
+ description: 'SPI 1 slave'
value: 0
TIMER_0:
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51-arduino_101/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51-arduino_101/src/os_bsp.c b/hw/bsp/nrf51-arduino_101/src/os_bsp.c
index d0bb24d..4be5682 100644
--- a/hw/bsp/nrf51-arduino_101/src/os_bsp.c
+++ b/hw/bsp/nrf51-arduino_101/src/os_bsp.c
@@ -27,6 +27,13 @@
#include "nrf51.h"
#include "nrf51_bitfields.h"
#include "mcu/nrf51_hal.h"
+#if MYNEWT_VAL(SPI_0_MASTER)
+#include "nrf_drv_spi.h"
+#endif
+#if MYNEWT_VAL(SPI_1_SLAVE)
+#include "nrf_drv_spis.h"
+#endif
+#include "hal/hal_spi.h"
#include "os/os_dev.h"
#include "uart/uart.h"
#include "uart_hal/uart_hal.h"
@@ -44,6 +51,42 @@ static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
};
#endif
+#if MYNEWT_VAL(SPI_0_MASTER)
+/*
+ * NOTE: do not set the ss pin here! This would cause the nordic SDK
+ * to start using the SS pin when configured as a master and this is
+ * not what our HAL expects. Our HAL expects that the SS pin, if used,
+ * is treated as a gpio line and is handled outside the SPI routines.
+ */
+static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+ .sck_pin = 29,
+ .mosi_pin = 25,
+ .miso_pin = 28,
+ .ss_pin = NRF_DRV_SPI_PIN_NOT_USED,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1,
+ .orc = 0xFF,
+ .frequency = NRF_DRV_SPI_FREQ_4M,
+ .mode = NRF_DRV_SPI_MODE_0,
+ .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST
+};
+#endif
+
+#if MYNEWT_VAL(SPI_1_SLAVE)
+static const nrf_drv_spis_config_t os_bsp_spi1s_cfg = {
+ .sck_pin = 29,
+ .mosi_pin = 25,
+ .miso_pin = 28,
+ .csn_pin = 24,
+ .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE,
+ .csn_pullup = NRF_GPIO_PIN_PULLUP,
+ .orc = NRF_DRV_SPIS_DEFAULT_ORC,
+ .def = NRF_DRV_SPIS_DEFAULT_DEF,
+ .mode = NRF_DRV_SPIS_MODE_0,
+ .bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1
+};
+#endif
+
void
hal_bsp_init(void)
{
@@ -71,6 +114,16 @@ hal_bsp_init(void)
/* Set cputime to count at 1 usec increments */
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
+
+#if MYNEWT_VAL(SPI_0_MASTER)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
+ assert(rc == 0);
+#endif
+
+#if MYNEWT_VAL(SPI_1_SLAVE)
+ rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
+ assert(rc == 0);
+#endif
}
extern void timer_handler(void);
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51-arduino_101/syscfg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51-arduino_101/syscfg.yml b/hw/bsp/nrf51-arduino_101/syscfg.yml
index eba942a..329e43e 100644
--- a/hw/bsp/nrf51-arduino_101/syscfg.yml
+++ b/hw/bsp/nrf51-arduino_101/syscfg.yml
@@ -58,12 +58,21 @@ syscfg.defs:
description: 'TBD'
value: 0
- SPI_MASTER:
- description: 'TBD'
- value: 0
- SPI_SLAVE:
- description: 'TBD'
- value: 0
+ SPI_0_MASTER:
+ description: 'SPI 0 master'
+ value: 1
+ SPI_0_MASTER_SS_PIN:
+ description: 'SPI 0 (master) SS pin number.'
+ value: 24
+ SPI_1_MASTER:
+ description: 'SPI 1 master'
+ value: 0
+ SPI_1_MASTER_SS_PIN:
+ description: 'SPI 1 (master) SS pin number.'
+ value: -1
+ SPI_1_SLAVE:
+ description: 'SPI 1 slave'
+ value: 1
TIMER_0:
description: 'NRF51 Timer 0'
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51-blenano/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51-blenano/src/os_bsp.c b/hw/bsp/nrf51-blenano/src/os_bsp.c
index f18fb0b..566a153 100644
--- a/hw/bsp/nrf51-blenano/src/os_bsp.c
+++ b/hw/bsp/nrf51-blenano/src/os_bsp.c
@@ -25,10 +25,10 @@
#include "hal/hal_bsp.h"
#include "hal/hal_spi.h"
#include "mcu/nrf51_hal.h"
-#if MYNEWT_VAL(SPI_MASTER)
+#if MYNEWT_VAL(SPI_0_MASTER)
#include "nrf_drv_spi.h"
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
+#if MYNEWT_VAL(SPI_1_SLAVE)
#include "nrf_drv_spis.h"
#endif
#include "nrf_drv_config.h"
@@ -48,6 +48,42 @@ static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
};
#endif
+#if MYNEWT_VAL(SPI_0_MASTER)
+/*
+ * NOTE: do not set the ss pin here! This would cause the nordic SDK
+ * to start using the SS pin when configured as a master and this is
+ * not what our HAL expects. Our HAL expects that the SS pin, if used,
+ * is treated as a gpio line and is handled outside the SPI routines.
+ */
+static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+ .sck_pin = 29,
+ .mosi_pin = 25,
+ .miso_pin = 28,
+ .ss_pin = NRF_DRV_SPI_PIN_NOT_USED,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1,
+ .orc = 0xFF,
+ .frequency = NRF_DRV_SPI_FREQ_4M,
+ .mode = NRF_DRV_SPI_MODE_0,
+ .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST
+};
+#endif
+
+#if MYNEWT_VAL(SPI_1_SLAVE)
+static const nrf_drv_spis_config_t os_bsp_spi1s_cfg = {
+ .sck_pin = 29,
+ .mosi_pin = 25,
+ .miso_pin = 28,
+ .csn_pin = 24,
+ .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE,
+ .csn_pullup = NRF_GPIO_PIN_PULLUP,
+ .orc = NRF_DRV_SPIS_DEFAULT_ORC,
+ .def = NRF_DRV_SPIS_DEFAULT_DEF,
+ .mode = NRF_DRV_SPIS_MODE_0,
+ .bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1
+};
+#endif
+
void
hal_bsp_init(void)
{
@@ -61,13 +97,6 @@ hal_bsp_init(void)
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_MASTER)
- nrf_drv_spi_config_t spi_cfg = NRF_DRV_SPI_DEFAULT_CONFIG(0);
-#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- nrf_drv_spis_config_t spi_cfg = NRF_DRV_SPIS_DEFAULT_CONFIG(1);
-#endif
-
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
@@ -85,15 +114,13 @@ hal_bsp_init(void)
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
-#if MYNEWT_VAL(SPI_MASTER)
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_MASTER);
+#if MYNEWT_VAL(SPI_0_MASTER)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- spi_cfg.csn_pin = SPI_SS_PIN;
- spi_cfg.csn_pullup = NRF_GPIO_PIN_PULLUP;
- rc = hal_spi_init(1, &spi_cfg, HAL_SPI_TYPE_SLAVE);
+#if MYNEWT_VAL(SPI_1_SLAVE)
+ rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51-blenano/syscfg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51-blenano/syscfg.yml b/hw/bsp/nrf51-blenano/syscfg.yml
index 39e8098..dd439ac 100644
--- a/hw/bsp/nrf51-blenano/syscfg.yml
+++ b/hw/bsp/nrf51-blenano/syscfg.yml
@@ -55,12 +55,21 @@ syscfg.defs:
description: 'TBD'
value: 10
- SPI_MASTER:
- description: 'TBD'
- value: 0
- SPI_SLAVE:
- description: 'TBD'
- value: 0
+ SPI_0_MASTER:
+ description: 'SPI 0 master'
+ value: 0
+ SPI_0_MASTER_SS_PIN:
+ description: 'SPI 0 (master) SS pin number.'
+ value: 24
+ SPI_1_MASTER:
+ description: 'SPI 1 master'
+ value: 0
+ SPI_1_MASTER_SS_PIN:
+ description: 'SPI 1 (master) SS pin number.'
+ value: -1
+ SPI_1_SLAVE:
+ description: 'SPI 1 slave'
+ value: 0
TIMER_0:
description: 'NRF51 Timer 0'
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51dk-16kbram/include/bsp/bsp.h
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk-16kbram/include/bsp/bsp.h b/hw/bsp/nrf51dk-16kbram/include/bsp/bsp.h
index 68d52ca..13cc7f7 100644
--- a/hw/bsp/nrf51dk-16kbram/include/bsp/bsp.h
+++ b/hw/bsp/nrf51dk-16kbram/include/bsp/bsp.h
@@ -40,9 +40,6 @@ extern uint8_t _ram_start;
#define LED_BLINK_PIN (21)
#define LED_2 (22)
-/* SPI SS */
-#define SPI_SS_PIN (24)
-
/* UART info */
#define CONSOLE_UART "uart0"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51dk-16kbram/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk-16kbram/src/os_bsp.c b/hw/bsp/nrf51dk-16kbram/src/os_bsp.c
index 0694129..0a11713 100644
--- a/hw/bsp/nrf51dk-16kbram/src/os_bsp.c
+++ b/hw/bsp/nrf51dk-16kbram/src/os_bsp.c
@@ -27,10 +27,10 @@
#include "hal/hal_spi.h"
#include "hal/hal_i2c.h"
#include "mcu/nrf51_hal.h"
-#if MYNEWT_VAL(SPI_MASTER)
+#if MYNEWT_VAL(SPI_0_MASTER)
#include "nrf_drv_spi.h"
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
+#if MYNEWT_VAL(SPI_1_SLAVE)
#include "nrf_drv_spis.h"
#endif
#include "nrf_drv_config.h"
@@ -39,7 +39,6 @@
#include "uart/uart.h"
#include "uart_hal/uart_hal.h"
-
#if MYNEWT_VAL(UART_0)
static struct uart_dev os_bsp_uart0;
static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
@@ -50,6 +49,42 @@ static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
};
#endif
+#if MYNEWT_VAL(SPI_0_MASTER)
+/*
+ * NOTE: do not set the ss pin here! This would cause the nordic SDK
+ * to start using the SS pin when configured as a master and this is
+ * not what our HAL expects. Our HAL expects that the SS pin, if used,
+ * is treated as a gpio line and is handled outside the SPI routines.
+ */
+static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+ .sck_pin = 29,
+ .mosi_pin = 25,
+ .miso_pin = 28,
+ .ss_pin = NRF_DRV_SPI_PIN_NOT_USED,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1,
+ .orc = 0xFF,
+ .frequency = NRF_DRV_SPI_FREQ_4M,
+ .mode = NRF_DRV_SPI_MODE_0,
+ .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST
+};
+#endif
+
+#if MYNEWT_VAL(SPI_1_SLAVE)
+static const nrf_drv_spis_config_t os_bsp_spi1s_cfg = {
+ .sck_pin = 29,
+ .mosi_pin = 25,
+ .miso_pin = 28,
+ .csn_pin = 24,
+ .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE,
+ .csn_pullup = NRF_GPIO_PIN_PULLUP,
+ .orc = NRF_DRV_SPIS_DEFAULT_ORC,
+ .def = NRF_DRV_SPIS_DEFAULT_DEF,
+ .mode = NRF_DRV_SPIS_MODE_0,
+ .bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1
+};
+#endif
+
void
hal_bsp_init(void)
{
@@ -66,13 +101,6 @@ hal_bsp_init(void)
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_MASTER)
- nrf_drv_spi_config_t spi_cfg = NRF_DRV_SPI_DEFAULT_CONFIG(0);
-#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- nrf_drv_spis_config_t spi_cfg = NRF_DRV_SPIS_DEFAULT_CONFIG(1);
-#endif
-
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
@@ -90,15 +118,13 @@ hal_bsp_init(void)
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
-#if MYNEWT_VAL(SPI_MASTER)
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_MASTER);
+#if MYNEWT_VAL(SPI_0_MASTER)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- spi_cfg.csn_pin = SPI_SS_PIN;
- spi_cfg.csn_pullup = NRF_GPIO_PIN_PULLUP;
- rc = hal_spi_init(1, &spi_cfg, HAL_SPI_TYPE_SLAVE);
+#if MYNEWT_VAL(SPI_1_SLAVE)
+ rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51dk-16kbram/syscfg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk-16kbram/syscfg.yml b/hw/bsp/nrf51dk-16kbram/syscfg.yml
index 627db0f..4b0d699 100644
--- a/hw/bsp/nrf51dk-16kbram/syscfg.yml
+++ b/hw/bsp/nrf51dk-16kbram/syscfg.yml
@@ -55,12 +55,21 @@ syscfg.defs:
description: 'TBD'
value: 10
- SPI_MASTER:
- description: 'TBD'
- value: 0
- SPI_SLAVE:
- description: 'TBD'
- value: 0
+ SPI_0_MASTER:
+ description: 'SPI 0 master'
+ value: 0
+ SPI_0_MASTER_SS_PIN:
+ description: 'SPI 0 (master) SS pin number.'
+ value: 24
+ SPI_1_MASTER:
+ description: 'SPI 1 master'
+ value: 0
+ SPI_1_MASTER_SS_PIN:
+ description: 'SPI 1 (master) SS pin number.'
+ value: -1
+ SPI_1_SLAVE:
+ description: 'SPI 1 slave'
+ value: 0
TIMER_0:
description: 'NRF51 Timer 0'
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51dk/include/bsp/bsp.h
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk/include/bsp/bsp.h b/hw/bsp/nrf51dk/include/bsp/bsp.h
index 3c1832d..13ea1b3 100644
--- a/hw/bsp/nrf51dk/include/bsp/bsp.h
+++ b/hw/bsp/nrf51dk/include/bsp/bsp.h
@@ -40,9 +40,6 @@ extern uint8_t _ram_start;
#define LED_BLINK_PIN (21)
#define LED_2 (22)
-/* SPI SS */
-#define SPI_SS_PIN (24)
-
/* UART info */
#define CONSOLE_UART "uart0"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51dk/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk/src/os_bsp.c b/hw/bsp/nrf51dk/src/os_bsp.c
index 68b9b1a..d2b9f22 100644
--- a/hw/bsp/nrf51dk/src/os_bsp.c
+++ b/hw/bsp/nrf51dk/src/os_bsp.c
@@ -27,10 +27,10 @@
#include "hal/hal_spi.h"
#include "hal/hal_i2c.h"
#include "mcu/nrf51_hal.h"
-#if MYNEWT_VAL(SPI_MASTER)
+#if MYNEWT_VAL(SPI_0_MASTER)
#include "nrf_drv_spi.h"
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
+#if MYNEWT_VAL(SPI_1_SLAVE)
#include "nrf_drv_spis.h"
#endif
#include "nrf_drv_config.h"
@@ -50,6 +50,42 @@ static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
};
#endif
+#if MYNEWT_VAL(SPI_0_MASTER)
+/*
+ * NOTE: do not set the ss pin here! This would cause the nordic SDK
+ * to start using the SS pin when configured as a master and this is
+ * not what our HAL expects. Our HAL expects that the SS pin, if used,
+ * is treated as a gpio line and is handled outside the SPI routines.
+ */
+static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+ .sck_pin = 29,
+ .mosi_pin = 25,
+ .miso_pin = 28,
+ .ss_pin = NRF_DRV_SPI_PIN_NOT_USED,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1,
+ .orc = 0xFF,
+ .frequency = NRF_DRV_SPI_FREQ_4M,
+ .mode = NRF_DRV_SPI_MODE_0,
+ .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST
+};
+#endif
+
+#if MYNEWT_VAL(SPI_1_SLAVE)
+static const nrf_drv_spis_config_t os_bsp_spi1s_cfg = {
+ .sck_pin = 29,
+ .mosi_pin = 25,
+ .miso_pin = 28,
+ .csn_pin = 24,
+ .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE,
+ .csn_pullup = NRF_GPIO_PIN_PULLUP,
+ .orc = NRF_DRV_SPIS_DEFAULT_ORC,
+ .def = NRF_DRV_SPIS_DEFAULT_DEF,
+ .mode = NRF_DRV_SPIS_MODE_0,
+ .bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1
+};
+#endif
+
void
hal_bsp_init(void)
{
@@ -67,13 +103,6 @@ hal_bsp_init(void)
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_MASTER)
- nrf_drv_spi_config_t spi_cfg = NRF_DRV_SPI_DEFAULT_CONFIG(0);
-#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- nrf_drv_spis_config_t spi_cfg = NRF_DRV_SPIS_DEFAULT_CONFIG(1);
-#endif
-
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
@@ -91,15 +120,13 @@ hal_bsp_init(void)
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
-#if MYNEWT_VAL(SPI_MASTER)
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_MASTER);
+#if MYNEWT_VAL(SPI_0_MASTER)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- spi_cfg.csn_pin = SPI_SS_PIN;
- spi_cfg.csn_pullup = NRF_GPIO_PIN_PULLUP;
- rc = hal_spi_init(1, &spi_cfg, HAL_SPI_TYPE_SLAVE);
+#if MYNEWT_VAL(SPI_1_SLAVE)
+ rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf51dk/syscfg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk/syscfg.yml b/hw/bsp/nrf51dk/syscfg.yml
index 14ab883..e2baf7a 100644
--- a/hw/bsp/nrf51dk/syscfg.yml
+++ b/hw/bsp/nrf51dk/syscfg.yml
@@ -55,12 +55,21 @@ syscfg.defs:
description: 'TBD'
value: 10
- SPI_MASTER:
- description: 'TBD'
- value: 0
- SPI_SLAVE:
- description: 'TBD'
- value: 0
+ SPI_0_MASTER:
+ description: 'SPI 0 master'
+ value: 0
+ SPI_0_MASTER_SS_PIN:
+ description: 'SPI 0 (master) SS pin number.'
+ value: 24
+ SPI_1_MASTER:
+ description: 'SPI 1 master'
+ value: 0
+ SPI_1_MASTER_SS_PIN:
+ description: 'SPI 1 (master) SS pin number.'
+ value: -1
+ SPI_1_SLAVE:
+ description: 'SPI 1 slave'
+ value: 0
TIMER_0:
description: 'NRF51 Timer 0'
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf52dk/include/bsp/bsp.h
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf52dk/include/bsp/bsp.h b/hw/bsp/nrf52dk/include/bsp/bsp.h
index c659adf..7c6df66 100644
--- a/hw/bsp/nrf52dk/include/bsp/bsp.h
+++ b/hw/bsp/nrf52dk/include/bsp/bsp.h
@@ -41,9 +41,6 @@ extern uint8_t _ram_start;
#define LED_BLINK_PIN (17)
#define LED_2 (18)
-/* SPI SS */
-#define SPI_SS_PIN (22)
-
/* UART info */
#define CONSOLE_UART "uart0"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf52dk/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf52dk/src/os_bsp.c b/hw/bsp/nrf52dk/src/os_bsp.c
index ecbee85..6b62233 100644
--- a/hw/bsp/nrf52dk/src/os_bsp.c
+++ b/hw/bsp/nrf52dk/src/os_bsp.c
@@ -34,10 +34,10 @@
#include "os/os_dev.h"
#include "bsp.h"
-#if MYNEWT_VAL(SPI_MASTER)
+#if MYNEWT_VAL(SPI_0_MASTER)
#include "nrf_drv_spi.h"
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
+#if MYNEWT_VAL(SPI_0_SLAVE)
#include "nrf_drv_spis.h"
#endif
#include "nrf_drv_config.h"
@@ -76,6 +76,42 @@ static struct nrf52_adc_dev_cfg os_bsp_adc0_config = {
};
#endif
+#if MYNEWT_VAL(SPI_0_MASTER)
+/*
+ * NOTE: do not set the ss pin here! This would cause the nordic SDK
+ * to start using the SS pin when configured as a master and this is
+ * not what our HAL expects. Our HAL expects that the SS pin, if used,
+ * is treated as a gpio line and is handled outside the SPI routines.
+ */
+static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+ .sck_pin = 23,
+ .mosi_pin = 24,
+ .miso_pin = 25,
+ .ss_pin = NRF_DRV_SPI_PIN_NOT_USED,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1,
+ .orc = 0xFF,
+ .frequency = NRF_DRV_SPI_FREQ_4M,
+ .mode = NRF_DRV_SPI_MODE_0,
+ .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST
+};
+#endif
+
+#if MYNEWT_VAL(SPI_0_SLAVE)
+static const nrf_drv_spis_config_t os_bsp_spi0s_cfg = {
+ .sck_pin = 23,
+ .mosi_pin = 24,
+ .miso_pin = 25,
+ .csn_pin = 22,
+ .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE,
+ .csn_pullup = NRF_GPIO_PIN_PULLUP,
+ .orc = NRF_DRV_SPIS_DEFAULT_ORC,
+ .def = NRF_DRV_SPIS_DEFAULT_DEF,
+ .mode = NRF_DRV_SPIS_MODE_0,
+ .bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1
+};
+#endif
+
void
hal_bsp_init(void)
{
@@ -85,13 +121,6 @@ hal_bsp_init(void)
struct nrf52_hal_i2c_cfg hal_i2c_cfg;
#endif
-#if MYNEWT_VAL(SPI_MASTER)
- nrf_drv_spi_config_t spi_cfg = NRF_DRV_SPI_DEFAULT_CONFIG(0);
-#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- nrf_drv_spis_config_t spi_cfg = NRF_DRV_SPIS_DEFAULT_CONFIG(0);
-#endif
-
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
@@ -125,15 +154,13 @@ hal_bsp_init(void)
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_MASTER)
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_MASTER);
+#if MYNEWT_VAL(SPI_0_MASTER)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
- spi_cfg.csn_pin = SPI_SS_PIN;
- spi_cfg.csn_pullup = NRF_GPIO_PIN_PULLUP;
- rc = hal_spi_init(0, &spi_cfg, HAL_SPI_TYPE_SLAVE);
+#if MYNEWT_VAL(SPI_0_SLAVE)
+ rc = hal_spi_init(0, (void *)&os_bsp_spi0s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/nrf52dk/syscfg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf52dk/syscfg.yml b/hw/bsp/nrf52dk/syscfg.yml
index 8f1bb0e..ae178d3 100644
--- a/hw/bsp/nrf52dk/syscfg.yml
+++ b/hw/bsp/nrf52dk/syscfg.yml
@@ -44,11 +44,23 @@ syscfg.defs:
description: 'Bitbanger UART'
value: 0
- SPI_MASTER:
- description: 'TBD'
+ SPI_0_MASTER:
+ description: 'SPI 0 master'
value: 0
- SPI_SLAVE:
- description: 'TBD'
+ SPI_0_MASTER_SS_PIN:
+ description: 'SPI 0 (master) SS pin number.'
+ value: 22
+ SPI_1_MASTER:
+ description: 'SPI 1 master'
+ value: 0
+ SPI_1_MASTER_SS_PIN:
+ description: 'SPI 1 (master) SS pin number.'
+ value: -1
+ SPI_0_SLAVE:
+ description: 'SPI 0 slave'
+ value: 0
+ SPI_1_SLAVE:
+ description: 'SPI 1 slave'
value: 0
TIMER_0:
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/rb-nano2/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/rb-nano2/src/os_bsp.c b/hw/bsp/rb-nano2/src/os_bsp.c
index cbf622f..6ff1eb8 100644
--- a/hw/bsp/rb-nano2/src/os_bsp.c
+++ b/hw/bsp/rb-nano2/src/os_bsp.c
@@ -33,10 +33,10 @@
#include "os/os_dev.h"
#include "bsp.h"
-#if MYNEWT_VAL(SPI_MASTER)
+#if MYNEWT_VAL(SPI_0_MASTER)
#include "nrf_drv_spi.h"
#endif
-#if MYNEWT_VAL(SPI_SLAVE)
+#if MYNEWT_VAL(SPI_0_SLAVE)
#include "nrf_drv_spis.h"
#endif
#include "nrf_drv_config.h"
@@ -55,6 +55,42 @@ static const struct nrf52_uart_cfg os_bsp_uart0_cfg = {
};
#endif
+#if MYNEWT_VAL(SPI_0_MASTER)
+/*
+ * NOTE: do not set the ss pin here! This would cause the nordic SDK
+ * to start using the SS pin when configured as a master and this is
+ * not what our HAL expects. Our HAL expects that the SS pin, if used,
+ * is treated as a gpio line and is handled outside the SPI routines.
+ */
+static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+ .sck_pin = 23,
+ .mosi_pin = 24,
+ .miso_pin = 25,
+ .ss_pin = NRF_DRV_SPI_PIN_NOT_USED,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1,
+ .orc = 0xFF,
+ .frequency = NRF_DRV_SPI_FREQ_4M,
+ .mode = NRF_DRV_SPI_MODE_0,
+ .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST
+};
+#endif
+
+#if MYNEWT_VAL(SPI_0_SLAVE)
+static const nrf_drv_spis_config_t os_bsp_spi0s_cfg = {
+ .sck_pin = 23,
+ .mosi_pin = 24,
+ .miso_pin = 25,
+ .csn_pin = 22,
+ .miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE,
+ .csn_pullup = NRF_GPIO_PIN_PULLUP,
+ .orc = NRF_DRV_SPIS_DEFAULT_ORC,
+ .def = NRF_DRV_SPIS_DEFAULT_DEF,
+ .mode = NRF_DRV_SPIS_MODE_0,
+ .bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST,
+ .irq_priority = (1 << __NVIC_PRIO_BITS) - 1
+};
+#endif
+
void
hal_bsp_init(void)
{
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/bsp/rb-nano2/syscfg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/rb-nano2/syscfg.yml b/hw/bsp/rb-nano2/syscfg.yml
index f1c2581..8631290 100644
--- a/hw/bsp/rb-nano2/syscfg.yml
+++ b/hw/bsp/rb-nano2/syscfg.yml
@@ -60,11 +60,23 @@ syscfg.defs:
description: 'TBD'
value: 28
- SPI_MASTER:
- description: 'TBD'
+ SPI_0_MASTER:
+ description: 'SPI 0 master'
value: 0
- SPI_SLAVE:
- description: 'TBD'
+ SPI_0_MASTER_SS_PIN:
+ description: 'SPI 0 (master) SS pin number.'
+ value: 22
+ SPI_1_MASTER:
+ description: 'SPI 1 master'
+ value: 0
+ SPI_1_MASTER_SS_PIN:
+ description: 'SPI 1 (master) SS pin number.'
+ value: -1
+ SPI_0_SLAVE:
+ description: 'SPI 0 slave'
+ value: 0
+ SPI_1_SLAVE:
+ description: 'SPI 1 slave'
value: 0
TIMER_0:
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/mcu/nordic/nrf51xxx/src/hal_i2c.c
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/nrf51xxx/src/hal_i2c.c b/hw/mcu/nordic/nrf51xxx/src/hal_i2c.c
index 9efc60b..ed651b2 100644
--- a/hw/mcu/nordic/nrf51xxx/src/hal_i2c.c
+++ b/hw/mcu/nordic/nrf51xxx/src/hal_i2c.c
@@ -18,15 +18,12 @@
*/
#include <hal/hal_i2c.h>
-
#include <string.h>
#include <errno.h>
-
+#include "syscfg/syscfg.h"
#include <nrf.h>
#include <nrf_drv_twi.h>
-
#include <mcu/nrf51_hal.h>
-
#include <assert.h>
struct nrf51_hal_i2c {
@@ -35,20 +32,20 @@ struct nrf51_hal_i2c {
#define NRF51_HAL_I2C_MAX (2)
-#if TWI0_ENABLED
+#if MYNEWT_VAL(I2C_0)
struct nrf51_hal_i2c hal_twi_i2c0 = {NRF_DRV_TWI_INSTANCE(0)};
#endif
-#if TWI1_ENABLED
+#if MYNEWT_VAL(I2C_1)
struct nrf51_hal_i2c hal_twi_i2c1 = {NRF_DRV_TWI_INSTANCE(1)};
#endif
static const struct nrf51_hal_i2c *nrf51_hal_i2cs[NRF51_HAL_I2C_MAX] = {
-#if TWI0_ENABLED
+#if MYNEWT_VAL(I2C_0)
&hal_twi_i2c0,
#else
NULL,
#endif
-#if TWI1_ENABLED
+#if MYNEWT_VAL(I2C_1)
&hal_twi_i2c1
#else
NULL
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/mcu/nordic/nrf51xxx/src/hal_spi.c
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/nrf51xxx/src/hal_spi.c b/hw/mcu/nordic/nrf51xxx/src/hal_spi.c
index f9ea95c..b40306b 100644
--- a/hw/mcu/nordic/nrf51xxx/src/hal_spi.c
+++ b/hw/mcu/nordic/nrf51xxx/src/hal_spi.c
@@ -18,7 +18,7 @@
*/
#include <hal/hal_spi.h>
-
+#include <syscfg/syscfg.h>
#include <string.h>
#include <errno.h>
#include <assert.h>
@@ -79,33 +79,33 @@ struct nrf51_hal_spi {
void *txrx_cb_arg;
};
-#if SPI0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER)
struct nrf51_hal_spi nrf51_hal_spi0;
#endif
-#if SPI1_ENABLED || SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE)
struct nrf51_hal_spi nrf51_hal_spi1;
#endif
static const struct nrf51_hal_spi *nrf51_hal_spis[NRF51_HAL_SPI_MAX] = {
-#if SPI0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER)
&nrf51_hal_spi0,
#else
NULL,
#endif
-#if SPI1_ENABLED || SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE)
&nrf51_hal_spi1
#else
NULL
#endif
};
-#if SPI0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER)
nrf_drv_spi_t inst_spi0_m = NRF_DRV_SPI_INSTANCE(0);
#endif
-#if SPI1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER)
nrf_drv_spi_t inst_spi1_m = NRF_DRV_SPI_INSTANCE(1);
#endif
-#if SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_SLAVE)
nrf_drv_spis_t inst_spi1_s = NRF_DRV_SPIS_INSTANCE(1);
#endif
@@ -120,7 +120,7 @@ nrf_drv_spis_t inst_spi1_s = NRF_DRV_SPIS_INSTANCE(1);
goto err; \
}
-#if (SPI0_ENABLED || SPI1_ENABLED)
+#if (MYNEWT_VAL(SPI_0_MASTER) || MYNEWT_VAL(SPI_1_MASTER) )
static void
nrf51_irqm_handler(struct nrf51_hal_spi *spi)
{
@@ -153,7 +153,7 @@ nrf51_irqm_handler(struct nrf51_hal_spi *spi)
}
#endif
-#if (SPIS1_ENABLED)
+#if (MYNEWT_VAL(SPI_1_SLAVE) )
static void
nrf51_irqs_handler(struct nrf51_hal_spi *spi)
{
@@ -204,7 +204,7 @@ nrf51_irqs_handler(struct nrf51_hal_spi *spi)
#endif
/* Interrupt handlers for SPI ports */
-#if SPI0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER)
void
nrf51_spi0_irq_handler(void)
{
@@ -216,18 +216,18 @@ nrf51_spi0_irq_handler(void)
}
#endif
-#if SPI1_ENABLED || SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE)
void
nrf51_spi1_irq_handler(void)
{
if (nrf51_hal_spi1.spi_type == HAL_SPI_TYPE_MASTER) {
-#if SPI1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER)
nrf51_irqm_handler(&nrf51_hal_spi1);
#else
assert(0);
#endif
} else {
-#if SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_SLAVE)
nrf51_irqs_handler(&nrf51_hal_spi1);
#else
assert(0);
@@ -561,7 +561,7 @@ hal_spi_init(int spi_num, void *cfg, uint8_t spi_type)
irq_handler = NULL;
spi->spi_type = spi_type;
if (spi_num == 0) {
-#if SPI0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER)
irq_handler = nrf51_spi0_irq_handler;
if (spi_type == HAL_SPI_TYPE_MASTER) {
memcpy(&spi->nhs_spi.spim, &inst_spi0_m, sizeof(inst_spi0_m));
@@ -572,16 +572,16 @@ hal_spi_init(int spi_num, void *cfg, uint8_t spi_type)
goto err;
#endif
} else if (spi_num == 1) {
-#if SPI1_ENABLED || SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE)
irq_handler = nrf51_spi1_irq_handler;
if (spi_type == HAL_SPI_TYPE_MASTER) {
-#if SPI1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER)
memcpy(&spi->nhs_spi.spim, &inst_spi1_m, sizeof(inst_spi0_m));
#else
assert(0);
#endif
} else {
-#if SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_SLAVE)
memcpy(&spi->nhs_spi.spis, &inst_spi1_s, sizeof(inst_spi1_s));
#else
assert(0);
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c b/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c
index 425ce59..2bd00e9 100644
--- a/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c
+++ b/hw/mcu/nordic/nrf52xxx/src/hal_i2c.c
@@ -18,15 +18,12 @@
*/
#include <hal/hal_i2c.h>
-
#include <string.h>
#include <errno.h>
-
+#include "syscfg/syscfg.h"
#include <nrf.h>
#include <nrf_drv_twi.h>
-
#include <mcu/nrf52_hal.h>
-
#include <assert.h>
struct nrf52_hal_i2c {
@@ -35,20 +32,20 @@ struct nrf52_hal_i2c {
#define NRF52_HAL_I2C_MAX (2)
-#if TWI0_ENABLED
+#if MYNEWT_VAL(I2C_0)
struct nrf52_hal_i2c hal_twi_i2c0 = {NRF_DRV_TWI_INSTANCE(0)};
#endif
-#if TWI1_ENABLED
+#if MYNEWT_VAL(I2C_1)
struct nrf52_hal_i2c hal_twi_i2c1 = {NRF_DRV_TWI_INSTANCE(1)};
#endif
static const struct nrf52_hal_i2c *nrf52_hal_i2cs[NRF52_HAL_I2C_MAX] = {
-#if TWI0_ENABLED
+#if MYNEWT_VAL(I2C_0)
&hal_twi_i2c0,
#else
NULL,
#endif
-#if TWI1_ENABLED
+#if MYNEWT_VAL(I2C_1)
&hal_twi_i2c1
#else
NULL
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/2820439e/hw/mcu/nordic/nrf52xxx/src/hal_spi.c
----------------------------------------------------------------------
diff --git a/hw/mcu/nordic/nrf52xxx/src/hal_spi.c b/hw/mcu/nordic/nrf52xxx/src/hal_spi.c
index 7c36658..6c45ce7 100644
--- a/hw/mcu/nordic/nrf52xxx/src/hal_spi.c
+++ b/hw/mcu/nordic/nrf52xxx/src/hal_spi.c
@@ -16,14 +16,12 @@
* specific language governing permissions and limitations
* under the License.
*/
-
-#include <hal/hal_spi.h>
-
#include <string.h>
#include <errno.h>
-
-#include <hal/hal_spi.h>
+#include <assert.h>
+#include <syscfg/syscfg.h>
#include <bsp/cmsis_nvic.h>
+#include <hal/hal_spi.h>
#include <nrf.h>
#include <nrf_spim.h>
#include <nrf_spis.h>
@@ -83,36 +81,36 @@ struct nrf52_hal_spi {
void *txrx_cb_arg;
};
-#if SPI0_ENABLED || SPIS0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER) || MYNEWT_VAL(SPI_0_SLAVE)
struct nrf52_hal_spi nrf52_hal_spi0;
#endif
-#if SPI1_ENABLED || SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE)
struct nrf52_hal_spi nrf52_hal_spi1;
#endif
static const struct nrf52_hal_spi *nrf52_hal_spis[NRF52_HAL_SPI_MAX] = {
-#if SPI0_ENABLED || SPIS0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER) || MYNEWT_VAL(SPI_0_SLAVE)
&nrf52_hal_spi0,
#else
NULL,
#endif
-#if SPI1_ENABLED || SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE)
&nrf52_hal_spi1
#else
NULL
#endif
};
-#if SPI0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER)
nrf_drv_spi_t inst_spi0_m = NRF_DRV_SPI_INSTANCE(0);
#endif
-#if SPI1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER)
nrf_drv_spi_t inst_spi1_m = NRF_DRV_SPI_INSTANCE(1);
#endif
-#if SPIS0_ENABLED
+#if MYNEWT_VAL(SPI_0_SLAVE)
nrf_drv_spis_t inst_spi0_s = NRF_DRV_SPIS_INSTANCE(0);
#endif
-#if SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_SLAVE)
nrf_drv_spis_t inst_spi1_s = NRF_DRV_SPIS_INSTANCE(1);
#endif
@@ -127,7 +125,7 @@ nrf_drv_spis_t inst_spi1_s = NRF_DRV_SPIS_INSTANCE(1);
goto err; \
}
-#if (SPI0_ENABLED || SPI1_ENABLED)
+#if (MYNEWT_VAL(SPI_0_MASTER) || MYNEWT_VAL(SPI_1_MASTER) )
static void
nrf52_irqm_handler(struct nrf52_hal_spi *spi)
{
@@ -171,7 +169,7 @@ nrf52_irqm_handler(struct nrf52_hal_spi *spi)
}
#endif
-#if (SPIS0_ENABLED || SPIS1_ENABLED)
+#if (MYNEWT_VAL(SPI_0_SLAVE) || MYNEWT_VAL(SPI_1_SLAVE) )
static void
nrf52_irqs_handler(struct nrf52_hal_spi *spi)
{
@@ -222,26 +220,34 @@ nrf52_irqs_handler(struct nrf52_hal_spi *spi)
#endif
/* Interrupt handlers for SPI ports */
-#if SPI0_ENABLED || SPIS0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER) || MYNEWT_VAL(SPI_0_SLAVE)
void
nrf52_spi0_irq_handler(void)
{
if (nrf52_hal_spi0.spi_type == HAL_SPI_TYPE_MASTER) {
+#if MYNEWT_VAL(SPI_0_MASTER)
nrf52_irqm_handler(&nrf52_hal_spi0);
+#endif
} else {
+#if MYNEWT_VAL(SPI_0_SLAVE)
nrf52_irqs_handler(&nrf52_hal_spi0);
+#endif
}
}
#endif
-#if SPI1_ENABLED || SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE)
void
nrf52_spi1_irq_handler(void)
{
if (nrf52_hal_spi1.spi_type == HAL_SPI_TYPE_MASTER) {
+#if MYNEWT_VAL(SPI_1_MASTER)
nrf52_irqm_handler(&nrf52_hal_spi1);
+#endif
} else {
+#if MYNEWT_VAL(SPI_1_SLAVE)
nrf52_irqs_handler(&nrf52_hal_spi1);
+#endif
}
}
#endif
@@ -570,16 +576,16 @@ hal_spi_init(int spi_num, void *cfg, uint8_t spi_type)
irq_handler = NULL;
spi->spi_type = spi_type;
if (spi_num == 0) {
-#if SPI0_ENABLED || SPIS0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER) || MYNEWT_VAL(SPI_0_SLAVE)
irq_handler = nrf52_spi0_irq_handler;
if (spi_type == HAL_SPI_TYPE_MASTER) {
-#if SPI0_ENABLED
+#if MYNEWT_VAL(SPI_0_MASTER)
memcpy(&spi->nhs_spi.spim, &inst_spi0_m, sizeof(inst_spi0_m));
#else
assert(0);
#endif
} else {
-#if SPIS0_ENABLED
+#if MYNEWT_VAL(SPI_0_SLAVE)
memcpy(&spi->nhs_spi.spis, &inst_spi0_s, sizeof(inst_spi0_s));
#else
assert(0);
@@ -589,16 +595,16 @@ hal_spi_init(int spi_num, void *cfg, uint8_t spi_type)
goto err;
#endif
} else if (spi_num == 1) {
-#if SPI1_ENABLED || SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER) || MYNEWT_VAL(SPI_1_SLAVE)
irq_handler = nrf52_spi1_irq_handler;
if (spi_type == HAL_SPI_TYPE_MASTER) {
-#if SPI1_ENABLED
+#if MYNEWT_VAL(SPI_1_MASTER)
memcpy(&spi->nhs_spi.spim, &inst_spi1_m, sizeof(inst_spi1_m));
#else
assert(0);
#endif
} else {
-#if SPIS1_ENABLED
+#if MYNEWT_VAL(SPI_1_SLAVE)
memcpy(&spi->nhs_spi.spis, &inst_spi1_s, sizeof(inst_spi1_s));
#else
assert(0);