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Posted to commits@nuttx.apache.org by ma...@apache.org on 2022/09/20 07:20:30 UTC
[incubator-nuttx] 04/05: arch/armv7[a|r]: Support non SGI in up_trigger_irq
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 17ac85eb0a6dd43f9c185d7ffebae1661707969f
Author: Xiang Xiao <xi...@xiaomi.com>
AuthorDate: Sun Sep 18 18:13:11 2022 +0800
arch/armv7[a|r]: Support non SGI in up_trigger_irq
Signed-off-by: Xiang Xiao <xi...@xiaomi.com>
---
arch/arm/src/armv7-a/arm_gicv2.c | 16 +++++++++++++++-
arch/arm/src/armv7-r/arm_gicv2.c | 16 +++++++++++++++-
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index 2f2e44359d..3f7fc667ed 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -523,7 +523,21 @@ int up_prioritize_irq(int irq, int priority)
void up_trigger_irq(int irq, cpu_set_t cpuset)
{
- arm_cpu_sgi(irq, cpuset);
+ if (irq >= 0 && irq <= GIC_IRQ_SGI15)
+ {
+ arm_cpu_sgi(irq, cpuset);
+ }
+ else if (irq >= 0 && irq < NR_IRQS)
+ {
+ uintptr_t regaddr;
+
+ /* Write '1' to the corresponding bit in the distributor Interrupt
+ * Set-Pending (ICDISPR)
+ */
+
+ regaddr = GIC_ICDISPR(irq);
+ putreg32(GIC_ICDISPR_INT(irq), regaddr);
+ }
}
/****************************************************************************
diff --git a/arch/arm/src/armv7-r/arm_gicv2.c b/arch/arm/src/armv7-r/arm_gicv2.c
index 9de974bea5..bd5f0cf79f 100644
--- a/arch/arm/src/armv7-r/arm_gicv2.c
+++ b/arch/arm/src/armv7-r/arm_gicv2.c
@@ -522,7 +522,21 @@ int up_prioritize_irq(int irq, int priority)
void up_trigger_irq(int irq, cpu_set_t cpuset)
{
- arm_cpu_sgi(irq, cpuset);
+ if (irq >= 0 && irq <= GIC_IRQ_SGI15)
+ {
+ arm_cpu_sgi(irq, cpuset);
+ }
+ else if (irq >= 0 && irq < NR_IRQS)
+ {
+ uintptr_t regaddr;
+
+ /* Write '1' to the corresponding bit in the distributor Interrupt
+ * Set-Pending (ICDISPR)
+ */
+
+ regaddr = GIC_ICDISPR(irq);
+ putreg32(GIC_ICDISPR_INT(irq), regaddr);
+ }
}
#endif /* CONFIG_ARMV7R_HAVE_GICv2 */