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Posted to dev@nuttx.apache.org by di...@gmail.com on 2020/01/12 10:12:55 UTC
Nuttx and SPI when using a gate 74AHC1G125
Why is the CS not pulled low at the end? So it can receive the last 0xFF?
When I bypass the gate it is working.. Using the gate it is not?
Thanks
Ben
Re: Nuttx and SPI when using a gate 74AHC1G125
Posted by Nathan Hartman <ha...@gmail.com>.
On Sun, Jan 12, 2020 at 1:27 PM Disruptive Solutions
<di...@gmail.com> wrote:
>
> Yes I did. It seems that every SPI board already has this functionality... its working when I bypass the gate.
>
> Verstuurd vanaf mijn iPhone
>
> > Op 12 jan. 2020 om 15:25 heeft Alan Carvalho de Assis <ac...@gmail.com> het volgende geschreven:
> >
> > Hi Ben,
> >
> > I saw the circuit you sent privately to me. Actually you are using the
> > 74AHC1G125 as buffer to MISO signal, not MOSI as I was thinking.
> >
> > I see no reason it is not working, did you try to change the SPI frequency?
> >
> > BR,
> >
> > Alan
> >
> >> On 1/12/20, Alan Carvalho de Assis <ac...@gmail.com> wrote:
> >> Hi Ben,
> >>
> >> You need to describer better your issue and what you are trying to do.
> >> We cannot guess what is happening at your side.
> >>
> >> Normally the /CS should goes low before the SPI data transfer and
> >> should go high at end of the transfer. So if you are connecting it to
> >> 74AHC1G125 to /OE you should see the MOSI signal at the pin Y.
> >>
> >> Are you connecting the /CS at your other device that probably is
> >> connected to 74AHC1G125 ?
> >>
> >> BR,
> >>
> >> Alan
> >>
> >>> On 1/12/20, disruptivesolutionsnl@gmail.com
> >>> <di...@gmail.com> wrote:
> >>> Why is the CS not pulled low at the end? So it can receive the last 0xFF?
> >>>
> >>> When I bypass the gate it is working.. Using the gate it is not?
If you are switching the OE (Output Enable), it takes some non-zero
amount of time for the device to switch from HighZ to driving the
output and back. You might want to check if that is messing up the
beginning or end (or both) of your communication. I've run into
problems like this before and had to add some wait states to the
firmware to work around it. If you have an oscilloscope available, you
might want to try comparing the signals on the input and output pins
of that HC125.
Nathan
Re: Nuttx and SPI when using a gate 74AHC1G125
Posted by Disruptive Solutions <di...@gmail.com>.
Yes I did. It seems that every SPI board already has this functionality... its working when I bypass the gate.
Verstuurd vanaf mijn iPhone
> Op 12 jan. 2020 om 15:25 heeft Alan Carvalho de Assis <ac...@gmail.com> het volgende geschreven:
>
> Hi Ben,
>
> I saw the circuit you sent privately to me. Actually you are using the
> 74AHC1G125 as buffer to MISO signal, not MOSI as I was thinking.
>
> I see no reason it is not working, did you try to change the SPI frequency?
>
> BR,
>
> Alan
>
>> On 1/12/20, Alan Carvalho de Assis <ac...@gmail.com> wrote:
>> Hi Ben,
>>
>> You need to describer better your issue and what you are trying to do.
>> We cannot guess what is happening at your side.
>>
>> Normally the /CS should goes low before the SPI data transfer and
>> should go high at end of the transfer. So if you are connecting it to
>> 74AHC1G125 to /OE you should see the MOSI signal at the pin Y.
>>
>> Are you connecting the /CS at your other device that probably is
>> connected to 74AHC1G125 ?
>>
>> BR,
>>
>> Alan
>>
>>> On 1/12/20, disruptivesolutionsnl@gmail.com
>>> <di...@gmail.com> wrote:
>>> Why is the CS not pulled low at the end? So it can receive the last 0xFF?
>>>
>>> When I bypass the gate it is working.. Using the gate it is not?
>>>
>>>
>>>
>>> Thanks
>>>
>>>
>>>
>>> Ben
>>>
>>>
>>>
>>>
>>
Re: Nuttx and SPI when using a gate 74AHC1G125
Posted by Alan Carvalho de Assis <ac...@gmail.com>.
Hi Ben,
I saw the circuit you sent privately to me. Actually you are using the
74AHC1G125 as buffer to MISO signal, not MOSI as I was thinking.
I see no reason it is not working, did you try to change the SPI frequency?
BR,
Alan
On 1/12/20, Alan Carvalho de Assis <ac...@gmail.com> wrote:
> Hi Ben,
>
> You need to describer better your issue and what you are trying to do.
> We cannot guess what is happening at your side.
>
> Normally the /CS should goes low before the SPI data transfer and
> should go high at end of the transfer. So if you are connecting it to
> 74AHC1G125 to /OE you should see the MOSI signal at the pin Y.
>
> Are you connecting the /CS at your other device that probably is
> connected to 74AHC1G125 ?
>
> BR,
>
> Alan
>
> On 1/12/20, disruptivesolutionsnl@gmail.com
> <di...@gmail.com> wrote:
>> Why is the CS not pulled low at the end? So it can receive the last 0xFF?
>>
>> When I bypass the gate it is working.. Using the gate it is not?
>>
>>
>>
>> Thanks
>>
>>
>>
>> Ben
>>
>>
>>
>>
>
Re: Nuttx and SPI when using a gate 74AHC1G125
Posted by Alan Carvalho de Assis <ac...@gmail.com>.
Hi Ben,
You need to describer better your issue and what you are trying to do.
We cannot guess what is happening at your side.
Normally the /CS should goes low before the SPI data transfer and
should go high at end of the transfer. So if you are connecting it to
74AHC1G125 to /OE you should see the MOSI signal at the pin Y.
Are you connecting the /CS at your other device that probably is
connected to 74AHC1G125 ?
BR,
Alan
On 1/12/20, disruptivesolutionsnl@gmail.com
<di...@gmail.com> wrote:
> Why is the CS not pulled low at the end? So it can receive the last 0xFF?
>
> When I bypass the gate it is working.. Using the gate it is not?
>
>
>
> Thanks
>
>
>
> Ben
>
>
>
>