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Posted to commits@stdcxx.apache.org by se...@apache.org on 2006/03/06 21:44:38 UTC
svn commit: r383659 - in /incubator/stdcxx/trunk: include/rw/_config.h
include/rw/_mutex.h include/rw/_strref.h src/atomic.s src/i86_64/
src/i86_64/atomic.s
Author: sebor
Date: Mon Mar 6 12:44:37 2006
New Revision: 383659
URL: http://svn.apache.org/viewcvs?rev=383659&view=rev
Log:
2006-03-06 Martin Sebor <se...@roguewave.com>
STDCXX-162
* _config.h (_RWSTD_NO_STRING_MUTEX): Removed conditional definition.
* _mutex.h (_RWSTD_ATOMIC_OPS): Corrected spelling and simplified the
handling of the macro. Handled x86_64 in the same block as IA64.
* _strref.h (_RWSTD_NO_STRING_MUTEX): Defined in response to
_RWSTD_ATOMIC_OPS being undefined.
* atomic.s: Handled __x86_64 (and __x86_64__).
* i86_64/atomic.s: AMD64/EM64T implementation.
Added:
incubator/stdcxx/trunk/src/i86_64/
incubator/stdcxx/trunk/src/i86_64/atomic.s (with props)
Modified:
incubator/stdcxx/trunk/include/rw/_config.h
incubator/stdcxx/trunk/include/rw/_mutex.h
incubator/stdcxx/trunk/include/rw/_strref.h
incubator/stdcxx/trunk/src/atomic.s
Modified: incubator/stdcxx/trunk/include/rw/_config.h
URL: http://svn.apache.org/viewcvs/incubator/stdcxx/trunk/include/rw/_config.h?rev=383659&r1=383658&r2=383659&view=diff
==============================================================================
--- incubator/stdcxx/trunk/include/rw/_config.h (original)
+++ incubator/stdcxx/trunk/include/rw/_config.h Mon Mar 6 12:44:37 2006
@@ -308,18 +308,6 @@
/********************** Environment ***************************************/
-// define wherever atomic instructions are provided
-// affects the size of string reference (i.e., is binary incompatible)
-#if defined (__DECCXX) \
- || (defined (__i386__) && defined (__GNUG__)) \
- || (defined (_WIN32) && !defined (_WIN64)) \
- || (defined (_AIX43) && defined (__IBMCPP__)) \
- || (defined (_RWSTD_OS_IRIX64) && defined (__host_mips)) \
- || (defined (_PA_RISC2_0) && defined (__HP_aCC)) \
- || (defined (__sparc) && (defined (__SUNPRO_CC) || defined (__GNUG__)))
-# define _RWSTD_NO_STRING_MUTEX
-#endif
-
// pa-risc2 atomic ops related
#if defined(_PA_RISC2_0) && defined(__HP_aCC)
# define _RWSTD_STRING_REF_OFFSET _RWSTD_INT_MAX
Modified: incubator/stdcxx/trunk/include/rw/_mutex.h
URL: http://svn.apache.org/viewcvs/incubator/stdcxx/trunk/include/rw/_mutex.h?rev=383659&r1=383658&r2=383659&view=diff
==============================================================================
--- incubator/stdcxx/trunk/include/rw/_mutex.h (original)
+++ incubator/stdcxx/trunk/include/rw/_mutex.h Mon Mar 6 12:44:37 2006
@@ -635,9 +635,15 @@
__rw_get_static_mutex ((_TypeT*)0));
}
+/********************** no atomic ops ********************************/
+
+#if defined (_RWSTD_NO_ATOMIC_OPS)
+
+// do nothing
+
/********************** DEC CXX **************************************/
-#if defined (__DECCXX) && !defined (_RWSTD_NO_ATOMIC_OPERATIONS)
+#elif defined (__DECCXX)
} // namespace __rw
@@ -742,9 +748,7 @@
/********************** SPARC **************************************/
-#elif defined(__sparc) \
- && (defined (__SUNPRO_CC) || defined (__GNUG__)) \
- && !defined (_RWSTD_NO_ATOMIC_OPERATIONS)
+#elif defined (__sparc) && (defined (__SUNPRO_CC) || defined (__GNUG__))
extern "C" {
@@ -868,8 +872,7 @@
/********************** AIX **************************************/
-#elif defined(_AIX43) && defined(__IBMCPP__) \
- && !defined (_RWSTD_NO_ATOMIC_OPERATIONS)
+#elif defined (_AIX43) && defined (__IBMCPP__)
} // namespace __rw
@@ -985,8 +988,7 @@
/********************** SGI **************************************/
-#elif defined (__sgi) && defined (__host_mips) \
- && !defined (_RWSTD_NO_ATOMIC_OPERATIONS)
+#elif defined (__sgi) && defined (__host_mips)
} // namespace __rw
@@ -1092,7 +1094,7 @@
/********************** PA-RISC 2.0 ************************************/
-#elif defined (_PA_RISC2_0) && !defined (_RWSTD_NO_ATOMIC_OPERATIONS)
+#elif defined (_PA_RISC2_0)
extern "C" {
@@ -1155,9 +1157,7 @@
/********************** i386/gcc **************************************/
-#elif defined (__i386__) \
- && (defined (__GNUG__) || defined (__INTEL_COMPILER)) \
- && !defined (_RWSTD_NO_ATOMIC_OPERATIONS)
+#elif defined (__i386__) && (defined (__GNUG__) || defined (__INTEL_COMPILER))
extern "C" {
@@ -1346,7 +1346,7 @@
/********************** WIN 32/64 ************************************/
-#elif defined (_WIN32) && !defined (_RWSTD_NO_ATOMIC_OPERATIONS)
+#elif defined (_WIN32)
// Interlocked[In|De]crement functions atomically modify their argument
// and return the new value
@@ -1402,23 +1402,28 @@
_RWSTD_STATIC_CAST (int, __y), false);
}
-/********************** IA64 ******************************************/
+/********************** IA64/x86_64 ***********************************/
-#elif defined (__ia64) && !defined (_RWSTD_NO_ATOMIC_OPERATIONS)
+#elif defined (__ia64) || defined (__x86_64)
extern "C" {
_RWSTD_INT8_T __rw_atomic_xchg8 (_RWSTD_INT8_T*, _RWSTD_INT8_T);
_RWSTD_INT16_T __rw_atomic_xchg16 (_RWSTD_INT16_T*, _RWSTD_INT16_T);
_RWSTD_INT32_T __rw_atomic_xchg32 (_RWSTD_INT32_T*, _RWSTD_INT32_T);
-_RWSTD_INT64_T __rw_atomic_xchg64 (_RWSTD_INT64_T*, _RWSTD_INT64_T);
_RWSTD_INT8_T __rw_atomic_add8 (_RWSTD_INT8_T*, _RWSTD_INT8_T);
_RWSTD_INT16_T __rw_atomic_add16 (_RWSTD_INT16_T*, _RWSTD_INT16_T);
_RWSTD_INT32_T __rw_atomic_add32 (_RWSTD_INT32_T*, _RWSTD_INT32_T);
+
+#ifdef _RWSTD_INT64_T
+
+_RWSTD_INT64_T __rw_atomic_xchg64 (_RWSTD_INT64_T*, _RWSTD_INT64_T);
_RWSTD_INT64_T __rw_atomic_add64 (_RWSTD_INT64_T*, _RWSTD_INT64_T);
+#endif // _RWSTD_INT64_T
+
} // extern "C"
@@ -1703,7 +1708,9 @@
# endif // _RWSTD_LONG_SIZE == _RWSTD_INT_SIZE
-#endif // IA64
+#elif !defined (_RWSTD_NO_ATOMIC_OPS)
+# define _RWSTD_NO_ATOMIC_OPS
+#endif // _RWSTD_NO_ATOMIC_OPS
/********************** generic long functions ************************/
Modified: incubator/stdcxx/trunk/include/rw/_strref.h
URL: http://svn.apache.org/viewcvs/incubator/stdcxx/trunk/include/rw/_strref.h?rev=383659&r1=383658&r2=383659&view=diff
==============================================================================
--- incubator/stdcxx/trunk/include/rw/_strref.h (original)
+++ incubator/stdcxx/trunk/include/rw/_strref.h Mon Mar 6 12:44:37 2006
@@ -50,6 +50,13 @@
# define _RWSTD_STRING_REF_INT long
#endif
+#ifndef _RWSTD_NO_ATOMIC_OPS
+ // disable string mutex when atomic operations are available
+# ifndef _RWSTD_NO_STRING_MUTEX
+# define _RWSTD_NO_STRING_MUTEX
+# endif // _RWSTD_NO_STRING_MUTEX
+#endif // _RWSTD_NO_ATOMIC_OPS
+
_RWSTD_NAMESPACE (std) {
@@ -76,7 +83,7 @@
_RWSTD_NAMESPACE (__rw) {
-#if defined (_RWSTD_REENTRANT) \
+#if defined (_RWSTD_REENTRANT) \
&& defined (_RWSTD_ONE_STRING_MUTEX) \
&& !defined (_RWSTD_NO_STRING_MUTEX)
@@ -93,9 +100,9 @@
typedef _TYPENAME allocator_type::size_type size_type;
typedef _STD::basic_string<_CharT, _Traits, _Allocator> string_type;
-#if defined (_RWSTD_REENTRANT) \
- && !defined (_RWSTD_ONE_STRING_MUTEX) \
- && !defined (_RWSTD_NO_STRING_MUTEX) \
+#if defined (_RWSTD_REENTRANT) \
+ && !defined (_RWSTD_ONE_STRING_MUTEX) \
+ && !defined (_RWSTD_NO_STRING_MUTEX) \
&& !defined (_RWSTD_NO_STATIC_MUTEX_INIT)
void _C_init (size_type __cap, size_type __size) {
@@ -210,8 +217,8 @@
#ifndef _RWSTD_NO_STRING_REF_COUNT
-# if defined (_RWSTD_REENTRANT) \
- && !defined (_RWSTD_ONE_STRING_MUTEX) \
+# if defined (_RWSTD_REENTRANT) \
+ && !defined (_RWSTD_ONE_STRING_MUTEX) \
&& !defined (_RWSTD_NO_STRING_MUTEX)
__rw_mutex_base _C_mutex;
Modified: incubator/stdcxx/trunk/src/atomic.s
URL: http://svn.apache.org/viewcvs/incubator/stdcxx/trunk/src/atomic.s?rev=383659&r1=383658&r2=383659&view=diff
==============================================================================
--- incubator/stdcxx/trunk/src/atomic.s (original)
+++ incubator/stdcxx/trunk/src/atomic.s Mon Mar 6 12:44:37 2006
@@ -6,42 +6,44 @@
*
***************************************************************************
*
- * Copyright (c) 1994-2005 Quovadx, Inc., acting through its Rogue Wave
- * Software division. Licensed under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- * http://www.apache.org/licenses/LICENSE-2.0. Unless required by
- * applicable law or agreed to in writing, software distributed under
- * the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
- * CONDITIONS OF ANY KIND, either express or implied. See the License
- * for the specific language governing permissions and limitations under
- * the License.
+ * Copyright 2005-2006 The Apache Software Foundation or its licensors,
+ * as applicable.
+ *
+ * Copyright 2003-2006 Rogue Wave Software.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
*
**************************************************************************/
#if defined (__i386__)
# include "i86/atomic.s"
-#endif
-
-#if defined (__ia64) || defined (__ia64__)
+#elif defined (__x86_64) || defined (__x86_64__)
+# include "i86_64/atomic.s"
+#elif defined (__ia64) || defined (__ia64__)
# if defined (_LP64) || defined (__LP64__)
# include "ia64/atomic-64.s"
# else
# include "ia64/atomic.s"
# endif
-#endif
-
-#if defined (__parisc)
+#elif defined (__parisc) || defined (__parisc__)
# if defined (__LP64__)
# include "parisc/atomic-64.s"
# else
# include "parisc/atomic.s"
# endif
-#endif
-
-#if defined (__sparc)
-# if defined (__sparcv9)
+#elif defined (__sparc) || defined (__sparc__)
+# if defined (__sparcv9) || defined (__sparcv9__)
# include "sparc/atomic-64.s"
# else
# include "sparc/atomic.s"
Added: incubator/stdcxx/trunk/src/i86_64/atomic.s
URL: http://svn.apache.org/viewcvs/incubator/stdcxx/trunk/src/i86_64/atomic.s?rev=383659&view=auto
==============================================================================
--- incubator/stdcxx/trunk/src/i86_64/atomic.s (added)
+++ incubator/stdcxx/trunk/src/i86_64/atomic.s Mon Mar 6 12:44:37 2006
@@ -0,0 +1,183 @@
+/***************************************************************************
+ *
+ * i86_64/atomic.s
+ *
+ * $Id$
+ *
+ ***************************************************************************
+ *
+ * Copyright 2005-2006 The Apache Software Foundation or its licensors,
+ * as applicable.
+ *
+ * Copyright 2005-2006 Rogue Wave Software.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ **************************************************************************/
+
+ .text
+ .align 16
+
+/***************************************************************************
+ * extern "C" int8_t __rw_atomic_xchg8 (int8_t *x, int8_t y);
+ *
+ * Atomically assigns the 8-bit value y to *x and returns
+ * the original (before assignment) 8-bit value of *x.
+ **************************************************************************/
+
+ .globl __rw_atomic_xchg8
+ .type __rw_atomic_xchg8, @function
+__rw_atomic_xchg8: /* ; int8_t (int8_t *x, int8_t y) */
+ movq %rdi, %rcx /* ; %rcx = x */
+ movb %sil, %al /* ; %al = y */
+ xchgb %al, (%rcx) /* ; %al <-> (%rcx) */
+ ret
+
+
+/***************************************************************************
+ * extern "C" int16_t __rw_atomic_xchg16 (int16_t *x, int16_t y);
+ *
+ * Atomically assigns the 16-bit value y to *x and returns
+ * the original (before assignment) 16-bit value of *x.
+ **************************************************************************/
+
+ .globl __rw_atomic_xchg16
+ .type __rw_atomic_xchg16, @function
+__rw_atomic_xchg16: /* ; int16_t (int16_t *x, int16_t y) */
+ movq %rdi, %rcx /* ; %rcx = x */
+ movw %si, %ax /* ; %eax = y */
+ xchgw %ax, (%rcx) /* ; %ax <-> (%rcx) */
+ ret
+
+
+/***************************************************************************
+ * extern "C" int32_t __rw_atomic_xchg32 (int32_t *x, int32_t y);
+ *
+ * Atomically assigns the 32-bit value y to *x and returns
+ * the original (before assignment) 32-bit value of *x.
+ **************************************************************************/
+
+ .globl __rw_atomic_xchg32
+ .type __rw_atomic_xchg32, @function
+__rw_atomic_xchg32: /* ; int32_t (int32_t *x, int32_t y) */
+ movq %rdi, %rcx /* ; %rcx = x */
+ movl %esi, %eax /* ; %eax = y */
+ xchgl %eax, (%rcx) /* ; %eax <-> (%rcx) */
+ ret
+
+
+/***************************************************************************
+ * extern "C" int32_t __rw_atomic_xchg64 (int64_t *x, int64_t y);
+ *
+ * Atomically assigns the 64-bit value y to *x and returns
+ * the original (before assignment) 64-bit value of *x.
+ **************************************************************************/
+
+ .globl __rw_atomic_xchg64
+ .type __rw_atomic_xchg64, @function
+__rw_atomic_xchg64: /* ; int64_t (int64_t *x, int64_t y) */
+ movq %rdi, %rcx /* ; %rcx = x */
+ movq %rsi, %rax /* ; %rax = y */
+ xchgq %rax, (%rcx) /* ; %rax <-> (%rcx) */
+ ret
+
+
+/***************************************************************************
+ * extern "C" int8_t __rw_atomic_add8 (int8_t *x, int8_t y);
+ *
+ * Atomically increments the 8-bit value *x by y and returns
+ * the new (after increment) 8-bit value of *x.
+ **************************************************************************/
+
+ .globl __rw_atomic_add8
+ .type __rw_atomic_add8, @function
+__rw_atomic_add8: /* ; int8_t (int8_t *dst, int8_t inc) */
+ movq %rdi, %rcx /* ; %rcx = dst */
+ movl %esi, %eax /* ; %eax = inc */
+ movl %eax, %edx /* ; */
+
+ lock /* ; lock the bus */
+ xaddb %al, (%rcx) /* ; tmp = *dst */
+ /* ; dst += inc */
+ /* ; %al = tmp */
+ addl %edx, %eax /* ; return %al + inc */
+ ret
+
+
+/***************************************************************************
+ * extern "C" int16_t __rw_atomic_add16 (int16_t *x, int16_t y);
+ *
+ * Atomically increments the 16-bit value *x by y and returns
+ * the new (after increment) 16-bit value of *x.
+ **************************************************************************/
+
+ .globl __rw_atomic_add16
+ .type __rw_atomic_add16, @function
+__rw_atomic_add16: /* ; int16_t (int16_t *dst, int16_t inc) */
+ movq %rdi, %rcx /* ; %rcx = dst */
+ movw %si, %ax /* ; %ax = inc */
+ movw %ax, %dx /* ; */
+
+ lock /* ; lock the bus */
+ xaddw %ax, (%rcx) /* ; tmp = *dst */
+ /* ; dst += inc */
+ /* ; eax = tmp */
+
+ addw %dx, %ax /* ; return %ax + inc */
+ ret
+
+
+/***************************************************************************
+ * extern "C" int32_t __rw_atomic_add32 (int32_t *x, int32_t y);
+ *
+ * Atomically increments the 32-bit value *x by y and returns
+ * the new (after increment) 32-bit value of *x.
+ **************************************************************************/
+
+ .globl __rw_atomic_add32
+ .type __rw_atomic_add32, @function
+__rw_atomic_add32: /* ; int32_t (int32_t *dst, int32_t inc) */
+ movq %rdi, %rcx /* ; %rcx = dst */
+ movl %esi, %edx /* ; %edx = inc */
+ movl %edx, %eax /* ; */
+
+ lock /* ; lock the bus */
+ xaddl %eax, (%rcx) /* ; tmp = *dst */
+ /* ; dst += inc */
+ /* ; %eax = tmp */
+
+ addl %edx, %eax /* ; return %eax + inc */
+ ret
+
+
+/***************************************************************************
+ * extern "C" int64_t __rw_atomic_add32 (int64_t *x, int64_t y);
+ *
+ * Atomically increments the 32-bit value *x by y and returns
+ * the new (after increment) 32-bit value of *x.
+ **************************************************************************/
+
+ .globl __rw_atomic_add64
+ .type __rw_atomic_add64, @function
+__rw_atomic_add64: /* ; int64_t (int64_t *dst, int64_t inc) */
+ movq %rdi, %rcx /* ; %rcx = dst */
+ movq %rsi, %rdx /* ; %edx = inc */
+ movq %rdx, %rax /* ; */
+
+ lock /* ; lock the bus */
+ xaddq %rax, (%rcx) /* ; tmp = *dst */
+ /* ; dst += inc */
+ /* ; %eax = tmp */
+
+ addq %rdx, %rax /* ; return %eax + inc */
+ ret
Propchange: incubator/stdcxx/trunk/src/i86_64/atomic.s
------------------------------------------------------------------------------
svn:keywords = Id