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Posted to commits@nuttx.apache.org by ag...@apache.org on 2020/02/26 20:14:45 UTC
[incubator-nuttx] branch master updated (930e278 -> 1521037)
This is an automated email from the ASF dual-hosted git repository.
aguettouche pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 930e278 xtensa: Use ar and nm from the toolchain
add a9610e1 boards/z80/ez80/z20x: Update CFLAGS and linker scripts.
new b63024d arch/z80: Make MCU selection menus more like other archs
new fcee2f5 arch/z80/src/ez80/ez80_timerisr.c: Use Kconfig MCU configurations.
new fa5179a arch/z80/src/ez80/ez80f92_handlers.asm: Trivial typo fix.
new 1521037 arch/z80/src/Makefile.zdsii*: Correct libraries for eZ80F92
The 4 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/z80/Kconfig | 405 +--------------------
arch/z80/src/Makefile.zdsiil | 5 +-
arch/z80/src/Makefile.zdsiiw | 5 +-
arch/z80/src/ez80/Kconfig | 96 +++--
arch/z80/src/ez80/Toolchain.defs | 13 +-
arch/z80/src/ez80/ez80_timerisr.c | 18 +-
arch/z80/src/ez80/ez80f92_handlers.asm | 2 +-
arch/z80/src/z180/Kconfig | 297 +++++++++++++++
arch/z80/src/z8/Kconfig | 24 ++
boards/z80/ez80/ez80f910200kitg/scripts/Make.defs | 6 +-
boards/z80/ez80/ez80f910200zco/scripts/Make.defs | 6 +-
boards/z80/ez80/makerlisp/scripts/Make.defs | 6 +-
boards/z80/ez80/z20x/configs/nsh_flash/nsh.zdsproj | 10 +-
.../z80/ez80/z20x/configs/nsh_flash/nsh_flash.ztgt | 2 +-
.../z80/ez80/z20x/configs/nsh_flash/nsh_ram.ztgt | 12 +-
boards/z80/ez80/z20x/configs/nsh_ram/README.txt | 2 +-
boards/z80/ez80/z20x/configs/nsh_ram/nsh.zdsproj | 14 +-
.../z80/ez80/z20x/configs/nsh_ram/nsh_flash.ztgt | 2 +-
boards/z80/ez80/z20x/configs/nsh_ram/nsh_ram.ztgt | 12 +-
boards/z80/ez80/z20x/configs/sdboot/.gitignore | 8 +-
boards/z80/ez80/z20x/configs/sdboot/sdboot.zdsproj | 14 +-
.../z80/ez80/z20x/configs/sdboot/sdboot_flash.ztgt | 2 +-
.../z80/ez80/z20x/configs/sdboot/sdboot_ram.ztgt | 12 +-
boards/z80/ez80/z20x/scripts/Make.defs | 6 +-
.../z80/ez80/z20x/scripts/z20x_copytoram.linkcmd | 3 +-
boards/z80/ez80/z20x/scripts/z20x_flash.linkcmd | 3 +-
boards/z80/ez80/z20x/scripts/z20x_ram.linkcmd | 1 +
27 files changed, 490 insertions(+), 496 deletions(-)
[incubator-nuttx] 02/04: arch/z80/src/ez80/ez80_timerisr.c: Use
Kconfig MCU configurations.
Posted by ag...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
aguettouche pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit fcee2f5a53297d0744440579038a8a3a99b1a77d
Author: Gregory Nutt <gn...@nuttx.org>
AuthorDate: Wed Feb 26 10:44:02 2020 -0600
arch/z80/src/ez80/ez80_timerisr.c: Use Kconfig MCU configurations.
Don't use MCU selection from compiler. It appears that we must compile ez80f92 code as ez80f91 so the comiler MCU selection is incorrect. Instead, use the selected CPU part from the configuration.
---
arch/z80/src/ez80/ez80_timerisr.c | 18 ++++++++++--------
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/arch/z80/src/ez80/ez80_timerisr.c b/arch/z80/src/ez80/ez80_timerisr.c
index 7cc464e..920dd1e 100644
--- a/arch/z80/src/ez80/ez80_timerisr.c
+++ b/arch/z80/src/ez80/ez80_timerisr.c
@@ -1,7 +1,7 @@
/****************************************************************************
* arch/z80/src/ez80/ez80_timerisr.c
*
- * Copyright (C) 2008-2009, 2017 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2008-2009, 2017, 2020 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -66,7 +66,7 @@ static int ez80_timerisr(int irq, chipreg_t *regs, void *arg)
{
/* Read the appropriate timer0 register to clear the interrupt */
-#ifdef _EZ80F91
+#ifdef CONFIGS_ARCH_CHIP_EZ80F91
inp(EZ80_TMR0_IIR);
#else
/* _EZ80190, _EZ80L92, _EZ80F92, _EZ80F93 */
@@ -78,9 +78,9 @@ static int ez80_timerisr(int irq, chipreg_t *regs, void *arg)
nxsched_process_timer();
+#ifdef CONFIG_ARCH_TIMERHOOK
/* Architecture specific hook into the timer interrupt handler */
-#ifdef CONFIG_ARCH_TIMERHOOK
up_timerhook();
#endif
@@ -137,9 +137,10 @@ void up_timer_initialize(void)
/* Clear any pending timer interrupts */
-#if defined(_EZ80F91)
+#if defined(CONFIGS_ARCH_CHIP_EZ80F91)
inp(EZ80_TMR0_IIR);
-#elif defined(_EZ80L92) || defined(_EZ80F92) ||defined(_EZ80F93)
+#elif defined(CONFIGS_ARCH_CHIP_EZ80L92) || defined(CONFIGS_ARCH_CHIP_EZ80F92) || \
+ defined(CONFIGS_ARCH_CHIP_EZ80F93)
inp(EZ80_TMR0_CTL);
#endif
@@ -147,15 +148,16 @@ void up_timer_initialize(void)
#if defined(_EZ80190)
outp(EZ80_TMR0_CTL, 0x5f);
-#elif defined(_EZ80F91)
+#elif defined(CONFIGS_ARCH_CHIP_EZ80F91)
outp(EZ80_TMR0_CTL, (EZ80_TMRCLKDIV_16|EZ80_TMRCTL_TIMCONT|EZ80_TMRCTL_RLD|EZ80_TMRCTL_TIMEN));
-#elif defined(_EZ80L92) || defined(_EZ80F92) ||defined(_EZ80F93)
+#elif defined(CONFIGS_ARCH_CHIP_EZ80L92) || defined(CONFIGS_ARCH_CHIP_EZ80F92) || \
+ defined(CONFIGS_ARCH_CHIP_EZ80F93)
outp(EZ80_TMR0_CTL, 0x57);
#endif
/* Enable timer end-of-count interrupts */
-#if defined(_EZ80F91)
+#if defined(CONFIGS_ARCH_CHIP_EZ80F91)
outp(EZ80_TMR0_IER, EZ80_TMRIER_EOCEN);
#endif
}
[incubator-nuttx] 03/04: arch/z80/src/ez80/ez80f92_handlers.asm:
Trivial typo fix.
Posted by ag...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
aguettouche pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit fa5179a51a7d7fb77176e3d57c0a54078fa0bab9
Author: Gregory Nutt <gn...@nuttx.org>
AuthorDate: Wed Feb 26 13:04:45 2020 -0600
arch/z80/src/ez80/ez80f92_handlers.asm: Trivial typo fix.
---
arch/z80/src/ez80/ez80f92_handlers.asm | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/z80/src/ez80/ez80f92_handlers.asm b/arch/z80/src/ez80/ez80f92_handlers.asm
index 177db0f..0efd0bd 100644
--- a/arch/z80/src/ez80/ez80f92_handlers.asm
+++ b/arch/z80/src/ez80/ez80f92_handlers.asm
@@ -1,5 +1,5 @@
;**************************************************************************
-; arch/z80/src/ez80/ez80f91_handlers.asm
+; arch/z80/src/ez80/ez80f92_handlers.asm
;
; Licensed to the Apache Software Foundation (ASF) under one or more
; contributor license agreements. See the NOTICE file distributed with
[incubator-nuttx] 01/04: arch/z80: Make MCU selection menus more
like other archs
Posted by ag...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
aguettouche pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit b63024dc7b65810b194c11e0edf27d1138d046c3
Author: Gregory Nutt <gn...@nuttx.org>
AuthorDate: Wed Feb 26 10:11:06 2020 -0600
arch/z80: Make MCU selection menus more like other archs
---
arch/z80/Kconfig | 405 ++--------------------------------------------
arch/z80/src/ez80/Kconfig | 96 +++++++----
arch/z80/src/z180/Kconfig | 297 ++++++++++++++++++++++++++++++++++
arch/z80/src/z8/Kconfig | 24 +++
4 files changed, 404 insertions(+), 418 deletions(-)
diff --git a/arch/z80/Kconfig b/arch/z80/Kconfig
index c922f28..5c808ff 100644
--- a/arch/z80/Kconfig
+++ b/arch/z80/Kconfig
@@ -15,407 +15,30 @@ config ARCH_CHIP_Z80
---help---
Classic ZiLOG z80 chip
-config ARCH_CHIP_Z8018006VSG
- bool "Z8018006VSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 68-pin PLCC Z80180
-
-config ARCH_CHIP_Z8018010VSG
- bool "Z8018010VSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 68-pin PLCC Z80180
-
-config ARCH_CHIP_Z8018008VSG
- bool "Z8018008VSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 68-pin PLCC Z80180
-
-config ARCH_CHIP_Z8018010FSG
- bool "Z8018010FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 80-pin QFP (11 pins N/C) Z80180
-
-config ARCH_CHIP_Z8018008VEG
- bool "Z8018008VEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 68-pin PLCC Z80180
-
-config ARCH_CHIP_Z8018006VEG
- bool "Z8018006VEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 68-pin PLCC Z80180
-
-config ARCH_CHIP_Z8018006PSG
- bool "Z8018006PSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 64-pin DIP 6 MHz 5V Z80180
-
-config ARCH_CHIP_Z8018008FSG
- bool "Z8018008FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 80-pin QFP (11 pins N/C) 8MHz 5V Z80180
-
-config ARCH_CHIP_Z8018010PSG
- bool "Z8018010PSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 64-pin DIP 10MHz 5V Z80180
-
-config ARCH_CHIP_Z8018006PEG
- bool "Z8018006PEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 64-pin DIP 6MHz 5V Z80180
-
-config ARCH_CHIP_Z8018010VEG
- bool "Z8018010VEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- 68-pin PLCC 10MHz 5V Z80180
-
-config ARCH_CHIP_Z8018010PEG
- bool "Z8018010PEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 64-pin DIP 10MHz 5V Z80180
-
-config ARCH_CHIP_Z8018008PSG
- bool "Z8018008PSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 64-pin DIP 8MHz 5V Z80180
-
-config ARCH_CHIP_Z8018006FSG
- bool "Z8018006FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
- ---help---
- Z180: 80-pin QFP (11 pins N/C) 6MHz 5V Z80180
-
-config ARCH_CHIP_Z8018000XSO
- bool "Z8018000XSO"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
-
-config ARCH_CHIP_Z8018010FEG
- bool "Z8018010FEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
-
-config ARCH_CHIP_Z8018000WSO
- bool "Z8018000WSO"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
-
-config ARCH_CHIP_Z8018008PEG
- bool "Z8018008PEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80180
-
-config ARCH_CHIP_Z8018110FEG
- bool "Z8018110FEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80181
- ---help---
- Z180: 100-pin QFP Z80181
-
-config ARCH_CHIP_Z8018233FSG
- bool "Z8018233FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80182
- ---help---
- 100-pin QFP Z80182
-
-config ARCH_CHIP_Z8018220AEG
- bool "Z8018220AEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80182
- ---help---
- Z180: 100-pin LQFP 20MHz 5V Z80182
-
-config ARCH_CHIP_Z8018216FSG
- bool "Z8018216FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80182
- ---help---
- Z180: 100-pin QFP 16MHz 5V Z80182
-
-config ARCH_CHIP_Z8018216ASG
- bool "Z8018216ASG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80182
- ---help---
- Z180: 100-pin LQFP Z80182
-
-config ARCH_CHIP_Z8018233ASG
- bool "Z8018233ASG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80182
- ---help---
- Z180: 100-pin LQFP 33MHz 5V Z80182
-
-config ARCH_CHIP_Z8019520FSG
- bool "Z8019520FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80195
- ---help---
- Z180: 100-pin QFP 20MHz 5V Z80195
-
-config ARCH_CHIP_Z8019533FSG
- bool "Z8019533FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z80195
- ---help---
- Z180: 100-pin QFP 33MHz 5V Z80195
-
-config ARCH_CHIP_Z8L18020VSG
- bool "Z8L18020VSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8L180
- ---help---
- Z180: 68-pinn PLCC Z8L180
-
-config ARCH_CHIP_Z8L18020FSG
- bool "Z8L18020FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8L180
- ---help---
- Z180: 80-pin GFP 20MHz 3.3V Z8L180
-
-config ARCH_CHIP_Z8L18020PSG
- bool "Z8L18020PSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8L180
-
-config ARCH_CHIP_Z8L18220ASG
- bool "Z8L18220ASG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8L182
- ---help---
- Z180: 100-pin LQFP Z8L182
-
-config ARCH_CHIP_Z8L18220FSG
- bool "Z8L18220FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8L182
- ---help---
- 100-pin QFP 20MHz 3.3V Z8L182
-
-config ARCH_CHIP_Z8L18220AEG
- bool "Z8L18220AEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8L182
-
-config ARCH_CHIP_Z8S18020VSG
- bool "Z8S18020VSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 68-pin PLCC Z8S180
-
-config ARCH_CHIP_Z8S18020VSG1960
- bool "Z8S18020VSG1960"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 68-pin PLCC Z8S180
-
-config ARCH_CHIP_Z8S18033VSG
- bool "Z8S18033VSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 68-pin PLCC Z8S180
-
-config ARCH_CHIP_Z8S18010FSG
- bool "Z8S18010FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- 80-pin QFP Z8S180
-
-config ARCH_CHIP_Z8S18010VEG
- bool "Z8S18010VEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 68-pin PLCC Z8S180
-
-config ARCH_CHIP_Z8S18020VEG
- bool "Z8S18020VEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 68-pin PLCC Z8S180
-
-config ARCH_CHIP_Z8S18010VSG
- bool "Z8S18010VSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 68-pin PLCC Z8S180
-
-config ARCH_CHIP_Z8S18020PSG
- bool "Z8S18020PSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- 64-pin DIP 10Mhz 5V Z8S180
-
-config ARCH_CHIP_Z8S18033FSG
- bool "Z8S18033FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 80-pin QFP 33MHz 5V Z8S180
-
-config ARCH_CHIP_Z8S18033FEG
- bool "Z8S18033FEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 80-pin QFP 33MHz 5V Z8S180
-
-config ARCH_CHIP_Z8S18020FSG
- bool "Z8S18020FSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 80-pin QFP 20MHz 5V Z8S180
-
-config ARCH_CHIP_Z8S18033VEG
- bool "Z8S18033VEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 68-pin PLCC 33MHz 5V Z8S180
-
-config ARCH_CHIP_Z8S18010PSG
- bool "Z8S18010PSG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
- ---help---
- Z180: 64-pin DIP 10MHz 5V Z8S180
-
-config ARCH_CHIP_Z8S18020FEG
- bool "Z8S18020FEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
-
-config ARCH_CHIP_Z8S18010PEG
- bool "Z8S18010PEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
-
-config ARCH_CHIP_Z8S18010FEG
- bool "Z8S18010FEG"
- select ARCH_CHIP_Z180
- select ARCH_CHIP_Z8S180
-
-config ARCH_CHIP_Z8F6403
- bool "Z8F6403"
- select ARCH_CHIP_Z8
- select ARCH_CHIP_Z8F640X
- select ENDIAN_BIG
- ---help---
- ZiLOG Z8F6403 (z8 Encore)
-
-config ARCH_CHIP_Z8F6423
- bool "Z8F6423"
- select ARCH_CHIP_Z8
- select ARCH_CHIP_Z8F642X
- select ENDIAN_BIG
- ---help---
- ZiLOG Z8F6423 (z8 Encore)
-
-config ARCH_CHIP_EZ80F91
- bool "EZ80F91"
- select ARCH_CHIP_EZ80
- select ARCH_CHIP_EZ80_HAVE_PLL
- ---help---
- ZiLOG EZ80F91 (ez80 Acclaim)
-
-config ARCH_CHIP_EZ80F92
- bool "EZ80F92"
- select ARCH_CHIP_EZ80
- ---help---
- ZiLOG EZ80F92 (ez80 Acclaim)
-
-config ARCH_CHIP_EZ80F93
- bool "EZ80F93"
- select ARCH_CHIP_EZ80
- ---help---
- ZiLOG EZ80F93 (ez80 Acclaim)
-
-endchoice
-
-config ARCH_CHIP_Z8F642X
- bool
-
-config ARCH_CHIP_Z8F640X
- bool
-
config ARCH_CHIP_Z180
- bool
+ bool "z180 Family"
select MM_SMALL
select ARCH_NOINTC
select ARCH_HAVE_ADDRENV
select ARCH_ADDRENV
-
-config ARCH_CHIP_Z80180
- bool
-
-config ARCH_CHIP_Z80181
- bool
-
-config ARCH_CHIP_Z80182
- bool
-
-config ARCH_CHIP_Z80195
- bool
-
-config ARCH_CHIP_Z8L180
- bool
-
-config ARCH_CHIP_Z8L182
- bool
-
-config ARCH_CHIP_Z8S180
- bool
-
-config ARCH_CHIP_Z8
- bool
- select MM_SMALL
+ ---help---
+ ZiLOG z80 architecture with MMU
config ARCH_CHIP_EZ80
- bool
+ bool "eZ80 Family (ez80 Acclaim)"
select MM_SMALL if EZ80_Z80MODE
select ARCH_HAVE_PHY
+ ---help---
+ ZiLOG z80 architecture with 24-bit addressability
-config ARCH_CHIP_EZ80_HAVE_PLL
- bool
- default n
+config ARCH_CHIP_Z8
+ bool "z8 Family"
+ select MM_SMALL
+ select ENDIAN_BIG
+ ---help---
+ ZiLOG z8 architecture
+
+endchoice
config ARCH_CHIP
string
diff --git a/arch/z80/src/ez80/Kconfig b/arch/z80/src/ez80/Kconfig
index f6b1184..423891e 100644
--- a/arch/z80/src/ez80/Kconfig
+++ b/arch/z80/src/ez80/Kconfig
@@ -5,6 +5,73 @@
if ARCH_CHIP_EZ80
+config ARCH_EZ80_HAVE_PLL
+ bool
+ default n
+
+config ARCH_EZ80_HAVE_ETHERNET
+ bool
+ default n
+
+config ARCH_EZ80_HAVE_UART2
+ bool
+ default n
+
+config ARCH_EZ80_HAVE_TIMER_INTREGS
+ bool
+ default n
+
+choice
+ prompt "eZ80 Chip Selection"
+ default ARCH_CHIP_EZ80F91
+
+config ARCH_CHIP_EZ80F91
+ bool "EZ80F91"
+ select ARCH_EZ80_HAVE_PLL
+ select ARCH_EZ80_HAVE_ETHERNET
+ select ARCH_EZ80_HAVE_UART2
+ select ARCH_EZ80_HAVE_TIMER_INTREGS
+ ---help---
+ ZiLOG EZ80F91 (ez80 Acclaim)
+
+config ARCH_CHIP_EZ80F92
+ bool "EZ80F92"
+ ---help---
+ ZiLOG EZ80F92 (ez80 Acclaim)
+
+config ARCH_CHIP_EZ80F93
+ bool "EZ80F93"
+ ---help---
+ ZiLOG EZ80F93 (ez80 Acclaim)
+
+endchoice
+
+# The ZiLOG ZDS-II Windows toolchain is the only toolchain available for
+# the ez80.
+#
+
+config EZ80_TOOLCHAIN_ZDSII
+ bool
+ default y
+
+choice
+ prompt "ZDS-II Toolchain version"
+ default EZ80_ZDSII_V533
+
+config EZ80_ZDSII_V511
+ bool "ZDS-II 5.1.1"
+
+config EZ80_ZDSII_V521
+ bool "ZDS-II 5.2.1"
+
+config EZ80_ZDSII_V530
+ bool "ZDS-II 5.3.0"
+
+config EZ80_ZDSII_V533
+ bool "ZDS-II 5.3.3"
+
+endchoice # ZDS-II Toolchain version
+
menu "ez80 Peripheral Support"
config EZ80_UART0
@@ -21,6 +88,7 @@ config EZ80_UART2
bool "UART2"
select UART2_SERIALDRIVER
default n
+ depends on ARCH_EZ80_HAVE_UART2
config EZ80_I2C
bool "I2C"
@@ -41,6 +109,7 @@ config EZ80_EMAC
default n
select ARCH_HAVE_PHY
select ARCH_HAVE_NETDEV_STATISTICS
+ depends on ARCH_EZ80_HAVE_ETHERNET
---help---
Enables support for ez80 EMAC driver.
@@ -62,33 +131,6 @@ config EZ80_RTC_LINEFREQ50
If there is no 32Hz crystal, the RTC will fall back to use the line
frequency, either 50 or 60Hz.
-# The ZiLOG ZDS-II Windows toolchain is the only toolchain available for
-# the ez80.
-#
-
-config EZ80_TOOLCHAIN_ZDSII
- bool
- default y if ARCH_CHIP_EZ80
- default n if !ARCH_CHIP_EZ80
-
-choice
- prompt "ZDS-II Toolchain version"
- default EZ80_ZDSII_V533
-
-config EZ80_ZDSII_V511
- bool "ZDS-II 5.1.1"
-
-config EZ80_ZDSII_V521
- bool "ZDS-II 5.2.1"
-
-config EZ80_ZDSII_V530
- bool "ZDS-II 5.3.0"
-
-config EZ80_ZDSII_V533
- bool "ZDS-II 5.3.3"
-
-endchoice # ZDS-II Toolchain version
-
if EZ80_EMAC
config EZ80_FIAD
diff --git a/arch/z80/src/z180/Kconfig b/arch/z80/src/z180/Kconfig
index 255a8fc..eeb8c7f 100644
--- a/arch/z80/src/z180/Kconfig
+++ b/arch/z80/src/z180/Kconfig
@@ -5,6 +5,303 @@
if ARCH_CHIP_Z180
+config ARCH_CHIP_Z80180
+ bool
+
+config ARCH_CHIP_Z80181
+ bool
+
+config ARCH_CHIP_Z80182
+ bool
+
+config ARCH_CHIP_Z80195
+ bool
+
+config ARCH_CHIP_Z8L180
+ bool
+
+config ARCH_CHIP_Z8L182
+ bool
+
+config ARCH_CHIP_Z8S180
+ bool
+
+choice
+ prompt "Z180 Chip Selection"
+ default ARCH_CHIP_Z8018006VSG
+
+config ARCH_CHIP_Z8018006VSG
+ bool "Z8018006VSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 68-pin PLCC Z80180
+
+config ARCH_CHIP_Z8018010VSG
+ bool "Z8018010VSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 68-pin PLCC Z80180
+
+config ARCH_CHIP_Z8018008VSG
+ bool "Z8018008VSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 68-pin PLCC Z80180
+
+config ARCH_CHIP_Z8018010FSG
+ bool "Z8018010FSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 80-pin QFP (11 pins N/C) Z80180
+
+config ARCH_CHIP_Z8018008VEG
+ bool "Z8018008VEG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 68-pin PLCC Z80180
+
+config ARCH_CHIP_Z8018006VEG
+ bool "Z8018006VEG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 68-pin PLCC Z80180
+
+config ARCH_CHIP_Z8018006PSG
+ bool "Z8018006PSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 64-pin DIP 6 MHz 5V Z80180
+
+config ARCH_CHIP_Z8018008FSG
+ bool "Z8018008FSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 80-pin QFP (11 pins N/C) 8MHz 5V Z80180
+
+config ARCH_CHIP_Z8018010PSG
+ bool "Z8018010PSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 64-pin DIP 10MHz 5V Z80180
+
+config ARCH_CHIP_Z8018006PEG
+ bool "Z8018006PEG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 64-pin DIP 6MHz 5V Z80180
+
+config ARCH_CHIP_Z8018010VEG
+ bool "Z8018010VEG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ 68-pin PLCC 10MHz 5V Z80180
+
+config ARCH_CHIP_Z8018010PEG
+ bool "Z8018010PEG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 64-pin DIP 10MHz 5V Z80180
+
+config ARCH_CHIP_Z8018008PSG
+ bool "Z8018008PSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 64-pin DIP 8MHz 5V Z80180
+
+config ARCH_CHIP_Z8018006FSG
+ bool "Z8018006FSG"
+ select ARCH_CHIP_Z80180
+ ---help---
+ Z180: 80-pin QFP (11 pins N/C) 6MHz 5V Z80180
+
+config ARCH_CHIP_Z8018000XSO
+ bool "Z8018000XSO"
+ select ARCH_CHIP_Z80180
+
+config ARCH_CHIP_Z8018010FEG
+ bool "Z8018010FEG"
+ select ARCH_CHIP_Z80180
+
+config ARCH_CHIP_Z8018000WSO
+ bool "Z8018000WSO"
+ select ARCH_CHIP_Z80180
+
+config ARCH_CHIP_Z8018008PEG
+ bool "Z8018008PEG"
+ select ARCH_CHIP_Z80180
+
+config ARCH_CHIP_Z8018110FEG
+ bool "Z8018110FEG"
+ select ARCH_CHIP_Z80181
+ ---help---
+ Z180: 100-pin QFP Z80181
+
+config ARCH_CHIP_Z8018233FSG
+ bool "Z8018233FSG"
+ select ARCH_CHIP_Z80182
+ ---help---
+ 100-pin QFP Z80182
+
+config ARCH_CHIP_Z8018220AEG
+ bool "Z8018220AEG"
+ select ARCH_CHIP_Z80182
+ ---help---
+ Z180: 100-pin LQFP 20MHz 5V Z80182
+
+config ARCH_CHIP_Z8018216FSG
+ bool "Z8018216FSG"
+ select ARCH_CHIP_Z80182
+ ---help---
+ Z180: 100-pin QFP 16MHz 5V Z80182
+
+config ARCH_CHIP_Z8018216ASG
+ bool "Z8018216ASG"
+ select ARCH_CHIP_Z80182
+ ---help---
+ Z180: 100-pin LQFP Z80182
+
+config ARCH_CHIP_Z8018233ASG
+ bool "Z8018233ASG"
+ select ARCH_CHIP_Z80182
+ ---help---
+ Z180: 100-pin LQFP 33MHz 5V Z80182
+
+config ARCH_CHIP_Z8019520FSG
+ bool "Z8019520FSG"
+ select ARCH_CHIP_Z80195
+ ---help---
+ Z180: 100-pin QFP 20MHz 5V Z80195
+
+config ARCH_CHIP_Z8019533FSG
+ bool "Z8019533FSG"
+ select ARCH_CHIP_Z80195
+ ---help---
+ Z180: 100-pin QFP 33MHz 5V Z80195
+
+config ARCH_CHIP_Z8L18020VSG
+ bool "Z8L18020VSG"
+ select ARCH_CHIP_Z8L180
+ ---help---
+ Z180: 68-pinn PLCC Z8L180
+
+config ARCH_CHIP_Z8L18020FSG
+ bool "Z8L18020FSG"
+ select ARCH_CHIP_Z8L180
+ ---help---
+ Z180: 80-pin GFP 20MHz 3.3V Z8L180
+
+config ARCH_CHIP_Z8L18020PSG
+ bool "Z8L18020PSG"
+ select ARCH_CHIP_Z8L180
+
+config ARCH_CHIP_Z8L18220ASG
+ bool "Z8L18220ASG"
+ select ARCH_CHIP_Z8L182
+ ---help---
+ Z180: 100-pin LQFP Z8L182
+
+config ARCH_CHIP_Z8L18220FSG
+ bool "Z8L18220FSG"
+ select ARCH_CHIP_Z8L182
+ ---help---
+ 100-pin QFP 20MHz 3.3V Z8L182
+
+config ARCH_CHIP_Z8L18220AEG
+ bool "Z8L18220AEG"
+ select ARCH_CHIP_Z8L182
+
+config ARCH_CHIP_Z8S18020VSG
+ bool "Z8S18020VSG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 68-pin PLCC Z8S180
+
+config ARCH_CHIP_Z8S18020VSG1960
+ bool "Z8S18020VSG1960"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 68-pin PLCC Z8S180
+
+config ARCH_CHIP_Z8S18033VSG
+ bool "Z8S18033VSG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 68-pin PLCC Z8S180
+
+config ARCH_CHIP_Z8S18010FSG
+ bool "Z8S18010FSG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ 80-pin QFP Z8S180
+
+config ARCH_CHIP_Z8S18010VEG
+ bool "Z8S18010VEG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 68-pin PLCC Z8S180
+
+config ARCH_CHIP_Z8S18020VEG
+ bool "Z8S18020VEG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 68-pin PLCC Z8S180
+
+config ARCH_CHIP_Z8S18010VSG
+ bool "Z8S18010VSG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 68-pin PLCC Z8S180
+
+config ARCH_CHIP_Z8S18020PSG
+ bool "Z8S18020PSG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ 64-pin DIP 10Mhz 5V Z8S180
+
+config ARCH_CHIP_Z8S18033FSG
+ bool "Z8S18033FSG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 80-pin QFP 33MHz 5V Z8S180
+
+config ARCH_CHIP_Z8S18033FEG
+ bool "Z8S18033FEG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 80-pin QFP 33MHz 5V Z8S180
+
+config ARCH_CHIP_Z8S18020FSG
+ bool "Z8S18020FSG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 80-pin QFP 20MHz 5V Z8S180
+
+config ARCH_CHIP_Z8S18033VEG
+ bool "Z8S18033VEG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 68-pin PLCC 33MHz 5V Z8S180
+
+config ARCH_CHIP_Z8S18010PSG
+ bool "Z8S18010PSG"
+ select ARCH_CHIP_Z8S180
+ ---help---
+ Z180: 64-pin DIP 10MHz 5V Z8S180
+
+config ARCH_CHIP_Z8S18020FEG
+ bool "Z8S18020FEG"
+ select ARCH_CHIP_Z8S180
+
+config ARCH_CHIP_Z8S18010PEG
+ bool "Z8S18010PEG"
+ select ARCH_CHIP_Z8S180
+
+config ARCH_CHIP_Z8S18010FEG
+ bool "Z8S18010FEG"
+ select ARCH_CHIP_Z8S180
+
+endchoice
+
choice
prompt "Toolchain Selection"
default Z180_TOOLCHAIN_SDCCW if TOOLCHAIN_WINDOWS
diff --git a/arch/z80/src/z8/Kconfig b/arch/z80/src/z8/Kconfig
index d0004f9..153e23e 100644
--- a/arch/z80/src/z8/Kconfig
+++ b/arch/z80/src/z8/Kconfig
@@ -5,6 +5,30 @@
if ARCH_CHIP_Z8
+config ARCH_CHIP_Z8F640X
+ bool
+
+config ARCH_CHIP_Z8F642X
+ bool
+
+choice
+ prompt "z8 Chip Selection"
+ default ARCH_CHIP_Z8F6403
+
+config ARCH_CHIP_Z8F6403
+ bool "Z8F6403"
+ select ARCH_CHIP_Z8F640X
+ ---help---
+ ZiLOG Z8F6403 (z8 Encore)
+
+config ARCH_CHIP_Z8F6423
+ bool "Z8F6423"
+ select ARCH_CHIP_Z8F642X
+ ---help---
+ ZiLOG Z8F6423 (z8 Encore)
+
+endchoice
+
# UART0/1 always enabled
config Z8_UART0
[incubator-nuttx] 04/04: arch/z80/src/Makefile.zdsii*: Correct
libraries for eZ80F92
Posted by ag...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
aguettouche pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 152103708334ac603195547aec75d80d9aa67e5d
Author: Gregory Nutt <gn...@nuttx.org>
AuthorDate: Wed Feb 26 13:48:37 2020 -0600
arch/z80/src/Makefile.zdsii*: Correct libraries for eZ80F92
These makefiles set the the ZiLOG runtime libraries for the eZ80 parts. The setup was, however, conditioned on CONFIG_ARCH_EZ80_EZ80F91 and, so, was not working for the eZ80F92 part (CONFIG_ARCH_EZ80_EZ80F92).
With this change, the z20x board FINALLY builds and links correctly with no errors.
---
arch/z80/src/Makefile.zdsiil | 5 +++--
arch/z80/src/Makefile.zdsiiw | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/z80/src/Makefile.zdsiil b/arch/z80/src/Makefile.zdsiil
index 810253e..3c4a2b5 100644
--- a/arch/z80/src/Makefile.zdsiil
+++ b/arch/z80/src/Makefile.zdsiil
@@ -1,7 +1,8 @@
############################################################################
# arch/z80/src/Makefile.zdsiil
#
-# Copyright (C) 2008, 2011-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2008, 2011-2012, 2014, 2020 Gregory Nutt. All rights
+# reserved.
# Author: Gregory Nutt <gn...@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -126,7 +127,7 @@ ifeq ($(CONFIG_ARCH_CHIP_Z8F642X),y)
@echo " \"${shell cygpath -w "$(ZDSZILOGLIBDIR)/csioLDD$(LIBEXT)"}\", \\" >>nuttx.linkcmd
@echo " \"${shell cygpath -w "$(ZDSZILOGLIBDIR)/zsldevinitdummy$(LIBEXT)"}\"" >>nuttx.linkcmd
endif
-ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
+ifeq ($(CONFIG_ARCH_CHIP_EZ80),y) # EZ80F91 and EZ80F92
@echo " \"${shell cygpath -w "$(ZDSSTDLIBDIR)/chelp$(LIBEXT)"}\", \\" >>nuttx.linkcmd
@echo " \"${shell cygpath -w "$(ZDSSTDLIBDIR)/crt$(LIBEXT)"}\", \\" >>nuttx.linkcmd
@echo " \"${shell cygpath -w "$(ZDSSTDLIBDIR)/fplib$(LIBEXT)"}\", \\" >>nuttx.linkcmd
diff --git a/arch/z80/src/Makefile.zdsiiw b/arch/z80/src/Makefile.zdsiiw
index b150348..f9dda14 100644
--- a/arch/z80/src/Makefile.zdsiiw
+++ b/arch/z80/src/Makefile.zdsiiw
@@ -1,7 +1,8 @@
############################################################################
# arch/z80/src/Makefile.zdsiiw
#
-# Copyright (C) 2008, 2011-2012, 2014 Gregory Nutt. All rights reserved.
+# Copyright (C) 2008, 2011-2012, 2014, 2020 Gregory Nutt. All rights
+# reserved.
# Author: Gregory Nutt <gn...@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
@@ -115,7 +116,7 @@ ifeq ($(CONFIG_ARCH_CHIP_Z8F642X),y)
@echo "$(ZDSZILOGLIBDIR)\csioLDD$(LIBEXT)", \>>nuttx.linkcmd
@echo "$(ZDSZILOGLIBDIR)\zsldevinitdummy$(LIBEXT)">>nuttx.linkcmd
endif
-ifeq ($(CONFIG_ARCH_CHIP_EZ80F91),y)
+ifeq ($(CONFIG_ARCH_CHIP_EZ80),y) # EZ80F91 and EZ80F92
@echo "$(ZDSSTDLIBDIR)\chelp$(LIBEXT)", \>>nuttx.linkcmd
@echo "$(ZDSSTDLIBDIR)\crt$(LIBEXT)", \>>nuttx.linkcmd
@echo "$(ZDSSTDLIBDIR)\fplib$(LIBEXT)", \>>nuttx.linkcmd