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Posted to commits@mynewt.apache.org by GitBox <gi...@apache.org> on 2018/06/26 08:00:17 UTC
[GitHub] sjanc closed pull request #1124: Update nrfX to version 1.0
sjanc closed pull request #1124: Update nrfX to version 1.0
URL: https://github.com/apache/mynewt-core/pull/1124
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diff --git a/hw/mcu/nordic/include/nrfx_glue.h b/hw/mcu/nordic/include/nrfx_glue.h
index 2f51256364..a3872870d0 100644
--- a/hw/mcu/nordic/include/nrfx_glue.h
+++ b/hw/mcu/nordic/include/nrfx_glue.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -48,33 +48,42 @@ extern "C" {
* the needs of the host environment into which @em nrfx is integrated.
*/
+// Uncomment this line to use the standard MDK way of binding IRQ handlers
+// at linking time.
+//#include <soc/nrfx_irqs.h>
+
+//------------------------------------------------------------------------------
+
/**
* @brief Macro for placing a runtime assertion.
*
* @param expression Expression to evaluate.
*/
-#define NRFX_ASSERT(expression) assert(expression);
+#define NRFX_ASSERT(expression) assert(expression)
/**
* @brief Macro for placing a compile time assertion.
*
* @param expression Expression to evaluate.
*/
-#define NRFX_STATIC_ASSERT(expression) STATIC_ASSERT(expression);
+#define NRFX_STATIC_ASSERT(expression) STATIC_ASSERT(expression)
+
+//------------------------------------------------------------------------------
/**
* @brief Macro for setting the priority of a specific IRQ.
+ *
* @param irq_number IRQ number.
* @param priority Priority to set.
*/
-#define NRFX_IRQ_PRIORITY_SET(irq_number, priority) NVIC_SetPriority(irq_number, priority);
+#define NRFX_IRQ_PRIORITY_SET(irq_number, priority) NVIC_SetPriority(irq_number, priority)
/**
* @brief Macro for enabling a specific IRQ.
*
* @param irq_number IRQ number.
*/
-#define NRFX_IRQ_ENABLE(irq_number) NVIC_EnableIRQ(irq_number);
+#define NRFX_IRQ_ENABLE(irq_number) NVIC_EnableIRQ(irq_number)
/**
* @brief Macro for checking if a specific IRQ is enabled.
@@ -91,20 +100,60 @@ extern "C" {
*
* @param irq_number IRQ number.
*/
-#define NRFX_IRQ_DISABLE(irq_number) NVIC_DisableIRQ(irq_number);
+#define NRFX_IRQ_DISABLE(irq_number) NVIC_DisableIRQ(irq_number)
+
+/**
+ * @brief Macro for setting a specific IRQ as pending.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_PENDING_SET(irq_number) NVIC_SetPendingIRQ(irq_number)
+
+/**
+ * @brief Macro for clearing the pending status of a specific IRQ.
+ *
+ * @param irq_number IRQ number.
+ */
+#define NRFX_IRQ_PENDING_CLEAR(irq_number) NVIC_ClearPendingIRQ(irq_number)
+/**
+ * @brief Macro for checking the pending status of a specific IRQ.
+ *
+ * @retval true If the IRQ is pending.
+ * @retval false Otherwise.
+ */
+#define NRFX_IRQ_IS_PENDING(irq_number) (NVIC_GetPendingIRQ(irq_number) == 1)
/**
* @brief Macro for entering into a critical section.
*/
static os_sr_t sr_from_macro __attribute__((unused));
-#define NRFX_CRITICAL_SECTION_ENTER() OS_ENTER_CRITICAL(sr_from_macro);
+#define NRFX_CRITICAL_SECTION_ENTER() OS_ENTER_CRITICAL(sr_from_macro)
/**
* @brief Macro for exiting from a critical section.
*/
-#define NRFX_CRITICAL_SECTION_EXIT() OS_EXIT_CRITICAL(sr_from_macro);
+#define NRFX_CRITICAL_SECTION_EXIT() OS_EXIT_CRITICAL(sr_from_macro)
+
+//------------------------------------------------------------------------------
+
+/**
+ * @brief When set to a non-zero value, this macro specifies that
+ * @ref nrfx_coredep_delay_us uses a precise DWT-based solution.
+ * A compilation error is generated if the DWT unit is not present
+ * in the SoC used.
+ */
+#define NRFX_DELAY_DWT_BASED 0
+
+/**
+ * @brief Macro for delaying the code execution for at least the specified time.
+ *
+ * @param us_time Number of microseconds to wait.
+ */
+#define NRFX_DELAY_US(us_time) os_cputime_delay_usecs(us_time)
+
+//------------------------------------------------------------------------------
/**
* @brief When set to a non-zero value, this macro specifies that the
@@ -114,6 +163,8 @@ static os_sr_t sr_from_macro __attribute__((unused));
*/
#define NRFX_CUSTOM_ERROR_CODES 0
+//------------------------------------------------------------------------------
+
/**
* @brief Bitmask defining PPI channels reserved to be used outside of nrfx.
*/
diff --git a/hw/mcu/nordic/src/ext/nrfx/CHANGELOG.md b/hw/mcu/nordic/src/ext/nrfx/CHANGELOG.md
index 15e1ca5c2c..fe4f2b97a9 100644
--- a/hw/mcu/nordic/src/ext/nrfx/CHANGELOG.md
+++ b/hw/mcu/nordic/src/ext/nrfx/CHANGELOG.md
@@ -1,6 +1,30 @@
# Changelog
All notable changes to this project are documented in this file.
+## [1.0.0] - 2018-03-21
+### Added
+- Added the NRFX_WAIT_FOR macro to improve the time-out functionality in QSPI and SAADC drivers.
+- Added glue layer macros for checking and modifying the pending status of interrupts.
+- Added new enumeration values for interrupts and events in the UARTE HAL.
+- Implemented workarounds for nRF52 anomalies 192 and 201 in the CLOCK driver.
+- Implemented workaround for nRF52840 anomaly 122 in the QSPI driver.
+- Implemented workaround for nRF52840 anomaly 198 in the SPIM driver.
+
+### Changed
+- Updated MDK to 8.16.0.
+- Extended input pin configuration in the GPIOTE driver.
+- Unified the way of checking if a required event handler was provided. Now, all drivers do it with assertions.
+- Changed the RNG bias correction configuration option to be enabled by default.
+- Refactored the ADC driver and HAL.
+- Corrected assertions in the TIMER driver to make it usable in debug version with PPI.
+- Improved buffer handling in the I2S driver. The API of the driver has been sligthly modified.
+- Enhanced SPIS driver API: added the "p_context" parameter, allowed NULL pointers for zero-length buffers.
+
+### Fixed
+- Fixed result value casting in the TEMP HAL.
+- Fixed types of conversion result and buffer size in the ADC HAL and driver.
+- Fixed time-out in the SAADC driver in abort function.
+
## [0.8.0] - 2017-12-20
### Added
- Added XIP support in the QSPI driver.
diff --git a/hw/mcu/nordic/src/ext/nrfx/LICENSE b/hw/mcu/nordic/src/ext/nrfx/LICENSE
index 97306fdea0..67c8788b22 100644
--- a/hw/mcu/nordic/src/ext/nrfx/LICENSE
+++ b/hw/mcu/nordic/src/ext/nrfx/LICENSE
@@ -1,29 +1,29 @@
-BSD 3-Clause License
-
-Copyright (c) 2017, Nordic Semiconductor ASA
+Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
-* Redistributions of source code must retain the above copyright notice, this
- list of conditions and the following disclaimer.
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
-* Redistributions in binary form must reproduce the above copyright notice,
- this list of conditions and the following disclaimer in the documentation
- and/or other materials provided with the distribution.
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
-* Neither the name of the copyright holder nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
+3. Neither the name of the copyright holder nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrf_bitmask.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrf_bitmask.h
index 2f8771847e..f1f593048f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrf_bitmask.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrf_bitmask.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_adc.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_adc.h
index 49e2dca397..dbb7293042 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_adc.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_adc.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -55,15 +55,13 @@ typedef enum
NRFX_ADC_EVT_SAMPLE, ///< Event generated when the requested channel is sampled.
} nrfx_adc_evt_type_t;
-
-
/**
* @brief Analog-to-digital converter driver DONE event.
*/
typedef struct
{
- nrf_adc_value_t * p_buffer; ///< Pointer to buffer with converted samples.
- uint16_t size; ///< Number of samples in the buffer.
+ nrf_adc_value_t * p_buffer; ///< Pointer to the buffer with converted samples.
+ uint16_t size; ///< Number of samples in the buffer.
} nrfx_adc_done_evt_t;
/**
@@ -88,28 +86,17 @@ typedef struct
} nrfx_adc_evt_t;
/**@brief Macro for initializing the ADC channel with the default configuration. */
-#define NRFX_ADC_DEFAULT_CHANNEL(analog_input) \
- {{{ \
- .resolution = NRF_ADC_CONFIG_RES_10BIT, \
- .input = NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE, \
- .reference = NRF_ADC_CONFIG_REF_VBG, \
- .ain = (analog_input) \
- }}, NULL}
-
-/**
- * @brief ADC channel configuration.
- *
- * @note The bit fields reflect bit fields in the ADC CONFIG register.
- */
-typedef struct
-{
- uint32_t resolution :2; ///< 8 - 10 bit resolution.
- uint32_t input :3; ///< Input selection and scaling.
- uint32_t reference :2; ///< Reference source.
- uint32_t reserved :1; ///< Unused bit fields.
- uint32_t ain :8; ///< Analog input.
- uint32_t external_reference:2; ///< Eternal reference source.
-}nrfx_adc_channel_config_t;
+#define NRFX_ADC_DEFAULT_CHANNEL(analog_input) \
+ { \
+ NULL, \
+ { \
+ .resolution = NRF_ADC_CONFIG_RES_10BIT, \
+ .scaling = NRF_ADC_CONFIG_SCALING_INPUT_FULL_SCALE, \
+ .reference = NRF_ADC_CONFIG_REF_VBG, \
+ .input = (analog_input), \
+ .extref = NRF_ADC_CONFIG_EXTREFSEL_NONE \
+ } \
+ }
// Forward declaration of the nrfx_adc_channel_t type.
typedef struct nrfx_adc_channel_s nrfx_adc_channel_t;
@@ -122,12 +109,8 @@ typedef struct nrfx_adc_channel_s nrfx_adc_channel_t;
*/
struct nrfx_adc_channel_s
{
- union
- {
- nrfx_adc_channel_config_t config; ///< Channel configuration.
- uint32_t data; ///< Raw value.
- } config;
- nrfx_adc_channel_t * p_next; ///< Pointer to the next enabled channel (for internal use).
+ nrfx_adc_channel_t * p_next; ///< Pointer to the next enabled channel (for internal use).
+ nrf_adc_config_t config; ///< ADC configuration for the current channel.
};
/**
@@ -135,7 +118,7 @@ struct nrfx_adc_channel_s
*/
typedef struct
{
- uint8_t interrupt_priority; ///< Priority of ADC interrupt.
+ uint8_t interrupt_priority; ///< Priority of ADC interrupt.
} nrfx_adc_config_t;
/** @brief ADC default configuration. */
@@ -205,7 +188,7 @@ void nrfx_adc_sample(void);
* This function selects the desired input and starts a single conversion. If a valid pointer
* is provided for the result, the function blocks until the conversion is completed. Otherwise, the
* function returns when the conversion is started, and the result is provided in an event (driver
- * must be initialized in non-blocking mode otherwise an assertion will fail). The function will
+ * must be initialized in non-blocking mode, otherwise an assertion will fail). The function will
* fail if ADC is busy. The channel does not need to be enabled to perform a single conversion.
*
* @param[in] p_channel Channel.
@@ -235,6 +218,7 @@ nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
* a single START task will trigger conversion on all enabled channels. For example:
* If 3 channels are enabled and the user requests 6 samples, the completion event
* handler will be called after 2 START tasks.
+ *
* @note The application must adjust the sampling frequency. The maximum frequency
* depends on the sampling timer and the maximum latency of the ADC interrupt. If
* an interrupt is not handled before the next sampling is triggered, the sample
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_clock.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_clock.h
index e1c259be3b..27cd4236a8 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_clock.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_clock.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -70,6 +70,9 @@ typedef void (*nrfx_clock_event_handler_t)(nrfx_clock_evt_type_t event);
*
* After initialization, the module is in power off state (clocks are not started).
*
+ * @param[in] event_handler Event handler provided by the user.
+ * Must not be NULL.
+ *
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_ALREADY_INITIALIZED If the driver was already initialized.
*/
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_comp.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_comp.h
index ff9e62df77..e337429df5 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_comp.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_comp.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -136,11 +136,14 @@ typedef struct
* To start the driver, call the function @ref nrfx_comp_start() after initialization.
*
* @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] event_handler Handler function.
+ * @param[in] event_handler Event handler provided by the user.
+ * Must not be NULL.
*
- * @retval NRFX_ERROR_INVALID_PARAM If the configuration is invalid.
+ * @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver has already been initialized.
- * @retval NRFX_ERROR_BUSY If the LPCOMP driver is initialized.
+ * @retval NRFX_ERROR_BUSY If the LPCOMP peripheral is already in use.
+ * This is possible only if @ref nrfx_prs module
+ * is enabled.
*/
nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config,
nrfx_comp_event_handler_t event_handler);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_gpiote.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_gpiote.h
index b8e7840e1b..24e9eed905 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_gpiote.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_gpiote.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -50,10 +50,11 @@ extern "C" {
/**@brief Input pin configuration. */
typedef struct
{
- nrf_gpiote_polarity_t sense; /**< Transition that triggers interrupt. */
- nrf_gpio_pin_pull_t pull; /**< Pulling mode. */
- bool is_watcher; /**< True when the input pin is tracking an output pin. */
- bool hi_accuracy;/**< True when high accuracy (IN_EVENT) is used. */
+ nrf_gpiote_polarity_t sense; /**< Transition that triggers interrupt. */
+ nrf_gpio_pin_pull_t pull; /**< Pulling mode. */
+ bool is_watcher : 1; /**< True when the input pin is tracking an output pin. */
+ bool hi_accuracy : 1; /**< True when high accuracy (IN_EVENT) is used. */
+ bool skip_gpio_setup : 1; /**< Do not change GPIO configuration */
} nrfx_gpiote_in_config_t;
/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
@@ -86,6 +87,43 @@ typedef struct
.sense = NRF_GPIOTE_POLARITY_TOGGLE, \
}
+/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
+ * @details Set hi_accu to true to use IN_EVENT.
+ * @note This macro prepares configuration that skips GPIO setup. */
+#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI(hi_accu) \
+ { \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .sense = NRF_GPIOTE_POLARITY_LOTOHI, \
+ .skip_gpio_setup = true, \
+ }
+
+/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
+ * @details Set hi_accu to true to use IN_EVENT.
+ * @note This macro prepares configuration that skips GPIO setup. */
+#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO(hi_accu) \
+ { \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .sense = NRF_GPIOTE_POLARITY_HITOLO, \
+ .skip_gpio_setup = true, \
+ }
+
+/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
+ * @details Set hi_accu to true to use IN_EVENT.
+ * @note This macro prepares configuration that skips GPIO setup. */
+#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE(hi_accu) \
+ { \
+ .is_watcher = false, \
+ .hi_accuracy = hi_accu, \
+ .pull = NRF_GPIO_PIN_NOPULL, \
+ .sense = NRF_GPIOTE_POLARITY_TOGGLE, \
+ .skip_gpio_setup = true, \
+ }
+
+
/**@brief Output pin configuration. */
typedef struct
{
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_i2s.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_i2s.h
index bdc451279b..f7766a6150 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_i2s.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_i2s.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -54,21 +54,7 @@ extern "C" {
*/
#define NRFX_I2S_PIN_NOT_USED 0xFF
-/**
- * @brief Flag indicating that calls to the data handler for RX and TX should
- * be synchronized, thus always combined into one call.
- *
- * Use this flag when calling @ref nrfx_i2s_start to force a common call
- * to the @ref nrfx_i2s_data_handler_t "data handler" for RX and TX data.
- * This is useful, for example, when received data should be processed and
- * then be sent back. Obviously, this flag is only applicable when both
- * directions (RX and TX) are enabled.
- */
-#define NRFX_I2S_FLAG_SYNCHRONIZED_MODE 0x01
-
-/**
- * @brief I2S driver configuration structure.
- */
+/** @brief I2S driver configuration structure. */
typedef struct
{
uint8_t sck_pin; ///< SCK pin number.
@@ -93,78 +79,98 @@ typedef struct
nrf_i2s_ratio_t ratio; ///< MCK/LRCK ratio.
} nrfx_i2s_config_t;
+/** @brief I2S driver buffers structure. */
+typedef struct
+{
+ uint32_t * p_rx_buffer;
+ uint32_t const * p_tx_buffer;
+} nrfx_i2s_buffers_t;
+
/**
* @brief I2S driver default configuration.
*/
-#define NRFX_I2S_DEFAULT_CONFIG \
-{ \
- .sck_pin = NRFX_I2S_CONFIG_SCK_PIN, \
- .lrck_pin = NRFX_I2S_CONFIG_LRCK_PIN, \
- .mck_pin = NRFX_I2S_CONFIG_MCK_PIN, \
- .sdout_pin = NRFX_I2S_CONFIG_SDOUT_PIN, \
- .sdin_pin = NRFX_I2S_CONFIG_SDIN_PIN, \
- .irq_priority = NRFX_I2S_CONFIG_IRQ_PRIORITY, \
- .mode = (nrf_i2s_mode_t)NRFX_I2S_CONFIG_MASTER, \
- .format = (nrf_i2s_format_t)NRFX_I2S_CONFIG_FORMAT, \
- .alignment = (nrf_i2s_align_t)NRFX_I2S_CONFIG_ALIGN, \
- .sample_width = (nrf_i2s_swidth_t)NRFX_I2S_CONFIG_SWIDTH, \
- .channels = (nrf_i2s_channels_t)NRFX_I2S_CONFIG_CHANNELS, \
- .mck_setup = (nrf_i2s_mck_t)NRFX_I2S_CONFIG_MCK_SETUP, \
- .ratio = (nrf_i2s_ratio_t)NRFX_I2S_CONFIG_RATIO, \
+#define NRFX_I2S_DEFAULT_CONFIG \
+{ \
+ .sck_pin = NRFX_I2S_CONFIG_SCK_PIN, \
+ .lrck_pin = NRFX_I2S_CONFIG_LRCK_PIN, \
+ .mck_pin = NRFX_I2S_CONFIG_MCK_PIN, \
+ .sdout_pin = NRFX_I2S_CONFIG_SDOUT_PIN, \
+ .sdin_pin = NRFX_I2S_CONFIG_SDIN_PIN, \
+ .irq_priority = NRFX_I2S_CONFIG_IRQ_PRIORITY, \
+ .mode = (nrf_i2s_mode_t)NRFX_I2S_CONFIG_MASTER, \
+ .format = (nrf_i2s_format_t)NRFX_I2S_CONFIG_FORMAT, \
+ .alignment = (nrf_i2s_align_t)NRFX_I2S_CONFIG_ALIGN, \
+ .sample_width = (nrf_i2s_swidth_t)NRFX_I2S_CONFIG_SWIDTH, \
+ .channels = (nrf_i2s_channels_t)NRFX_I2S_CONFIG_CHANNELS, \
+ .mck_setup = (nrf_i2s_mck_t)NRFX_I2S_CONFIG_MCK_SETUP, \
+ .ratio = (nrf_i2s_ratio_t)NRFX_I2S_CONFIG_RATIO, \
}
+
+#define NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED (1UL << 0)
+ /**< The application should provide buffers that are to be used in the next
+ * part of the transfer. A call to @ref nrfx_i2s_next_buffers_set should
+ * be done before the currently used buffers are completely processed
+ * (i.e. the time remaining for supplying the next buffers depends on
+ * the used size of the buffers). */
+
/**
* @brief I2S driver data handler type.
*
* A data handling function of this type must be specified during initialization
- * of the driver. The driver will call this function when a new portion of data
- * is received or a new portion of data should be prepared for transmission.
- * The first case is indicated by a non-NULL value in the @p p_data_received
- * parameter (which points to the memory containing the received data).
- * Similarly, the second case is indicated by a non-NULL value in the
- * @p p_data_to_send parameter (which points to where the data to be transmitted
- * should be placed).
+ * of the driver. The driver will call this function when it finishes using
+ * buffers passed to it by the application, and when it needs to be provided
+ * with buffers for the next part of the transfer.
*
- * @note The two cases mentioned above may be indicated separately or combined
- * into one call (depending on the environment in which the driver is
- * used). Therefore, both parameters should be checked and handled
- * properly in every call. @ref NRFX_I2S_FLAG_SYNCHRONIZED_MODE
- * "Synchronized mode" can be used to always combine these indications.
+ * @note The @c p_released pointer passed to this function is temporary and
+ * will be invalid after the function returns, hence it cannot be stored
+ * and used later. If needed, the pointed content (i.e. buffers pointers)
+ * should be copied instead.
*
- * @param[in] p_data_received Pointer to the buffer with received data,
- * or NULL if the handler is called to prepare
- * transmission only.
- * @param[out] p_data_to_send Pointer to the buffer where data to be sent
- * should be written, or NULL if the handler is
- * called for received data only.
- * @param[in] number_of_words Length of data received and/or to be written
- * (in 32-bit words). This value is always equal to
- * half the size of the buffers set by the call
- * to the @ref nrfx_i2s_start function.
+ * @param[in] p_released Pointer to a structure with pointers to buffers
+ * passed previously to the driver that will no longer
+ * be access by it (they can be now safely released or
+ * used for another purpose, in particular for a next
+ * part of the transfer).
+ * This pointer will be NULL if the application did not
+ * supply the buffers for the next part of the transfer
+ * (via a call to @ref nrfx_i2s_next_buffers_set) since
+ * the previous time the data handler signaled such need.
+ * This means that data corruption occurred (the previous
+ * buffers are used for the second time) and no buffers
+ * can be released at the moment.
+ * Both pointers in this structure are NULL when the
+ * handler is called for the first time after a transfer
+ * is started, because no data has been transferred yet
+ * at this point. In all successive calls the pointers
+ * specify what has been sent (TX) and what has been
+ * received (RX) in the part of transfer that has just
+ * been completed (provided that a given direction is
+ * enabled, see @ref nrfx_i2s_start).
+ * @param[in] status Bit field describing the current status of the transfer.
+ * It can be 0 or a combination of the following flags:
+ * - @ref NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED
*/
-typedef void (* nrfx_i2s_data_handler_t)(uint32_t const * p_data_received,
- uint32_t * p_data_to_send,
- uint16_t number_of_words);
+typedef void (* nrfx_i2s_data_handler_t)(nrfx_i2s_buffers_t const * p_released,
+ uint32_t status);
/**
* @brief Function for initializing the I2S driver.
*
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] handler Data handler provided by the user. Must not be NULL.
+ * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] handler Data handler provided by the user. Must not be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If the requested combination of configuration
- * options is not allowed by the I2S peripheral.
+ * @retval NRFX_SUCCESS If initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
+ * @retval NRFX_ERROR_INVALID_PARAM If the requested combination of configuration
+ * options is not allowed by the I2S peripheral.
*/
nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config,
nrfx_i2s_data_handler_t handler);
-/**
- * @brief Function for uninitializing the I2S driver.
- */
-void nrfx_i2s_uninit(void);
+/** @brief Function for uninitializing the I2S driver. */
+void nrfx_i2s_uninit(void);
/**
* @brief Function for starting the continuous I2S transfer.
@@ -182,62 +188,58 @@ void nrfx_i2s_uninit(void);
* For a detailed memory mapping for different supported configurations,
* see the @linkProductSpecification52.
*
- * The provided buffers are logically divided into two parts of equal size.
- * One of them is in use by the peripheral (for storing received data or for
- * getting data to be transmitted, respectively). The other part is provided
- * to the application via a call to the defined @ref nrfx_i2s_data_handler_t
- * "data handling function", so that the application can process the received
- * data or prepare the next portion of data to be sent. The two parts are
- * swapped every time @p buffer_size/2 data words are received or transmitted.
- *
- * Additional options are provided using the @p flags parameter:
- * - @ref NRFX_I2S_FLAG_SYNCHRONIZED_MODE - the calls to data handler should
- * be done in a synchronized manner (one common call for TX and RX).
- * Applicable only when both RX and TX are enabled.
- *
- * @attention All data exchange is done in the data handler only. In particular,
- * no data should be written to the transmit buffer before calling
- * this function (a proper call to the data handler to get the first
- * portion of data to be sent will be done before the actual transfer
- * starts).
- *
* @note Peripherals using EasyDMA (including I2S) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
*
- * @param[in] p_rx_buffer Pointer to the receive buffer.
- * Pass NULL if reception is not required.
- * @param[in] p_tx_buffer Pointer to the transmit buffer.
- * Pass NULL if transmission is not required.
- * @param[in] buffer_size Size of the buffers (in 32-bit words).
- * The size must be an even number greater than 0.
- * @param[in] flags Transfer options (0 for default settings).
+ * @param[in] p_initial_buffers Pointer to a structure specifying the buffers
+ * to be used in the initial part of the transfer
+ * (buffers for all consecutive parts are provided
+ * through the data handler).
+ * @param[in] buffer_size Size of the buffers (in 32-bit words).
+ * Must not be 0.
+ * @param[in] flags Transfer options (0 for default settings).
+ * Currently, no additional flags are available.
*
- * @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_INVALID_STATE If a transfer was already started or
- * the driver has not been initialized.
- * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed
- * in the Data RAM region.
+ * @retval NRFX_SUCCESS If the operation was successful.
+ * @retval NRFX_ERROR_INVALID_STATE If a transfer was already started or
+ * the driver has not been initialized.
+ * @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed
+ * in the Data RAM region.
*/
-nrfx_err_t nrfx_i2s_start(uint32_t * p_rx_buffer,
- uint32_t * p_tx_buffer,
- uint16_t buffer_size,
- uint8_t flags);
+nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers,
+ uint16_t buffer_size,
+ uint8_t flags);
/**
- * @brief Function for stopping the I2S transfer.
+ * @brief Function for supplying the buffers to be used in the next part of
+ * the transfer.
+ *
+ * The application should call this function when the data handler receives
+ * @ref NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED in the @c status parameter.
+ * The call can be done immediately from the data handler function or later,
+ * but it has to be done before the I2S peripheral finishes processing the
+ * buffers supplied previously. Otherwise, data corruption will occur.
+ *
+ * @sa nrfx_i2s_data_handler_t
+ *
+ * @retval NRFX_SUCCESS If the operation was successful.
+ * @retval NRFX_ERROR_INVALID_STATE If the buffers were already supplied or
+ * the peripheral is currently being stopped.
*/
-void nrfx_i2s_stop(void);
+nrfx_err_t nrfx_i2s_next_buffers_set(nrfx_i2s_buffers_t const * p_buffers);
+/** @brief Function for stopping the I2S transfer. */
+void nrfx_i2s_stop(void);
-void nrfx_i2s_irq_handler(void);
+/** @} */
-/** @} */
+void nrfx_i2s_irq_handler(void);
+
#ifdef __cplusplus
}
#endif
#endif // NRFX_I2S_H__
-
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_lpcomp.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_lpcomp.h
index edfd9be930..6acecc0c82 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_lpcomp.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_lpcomp.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -86,13 +86,15 @@ typedef struct
* This function initializes the LPCOMP driver, but does not enable the peripheral or any interrupts.
* To start the driver, call the function nrfx_lpcomp_enable() after initialization.
*
- * If no configuration structure is provided, the driver is initialized with the default settings.
- *
* @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] event_handler Handler function.
+ * @param[in] event_handler Event handler provided by the user.
+ * Must not be NULL.
*
- * @retval NRFX_ERROR_INVALID_PARAM If the configuration is invalid.
+ * @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver has already been initialized.
+ * @retval NRFX_ERROR_BUSY If the COMP peripheral is already in use.
+ * This is possible only if @ref nrfx_prs module
+ * is enabled.
*/
nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config,
nrfx_lpcomp_event_handler_t event_handler);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_pdm.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_pdm.h
index 05ded2c06b..a0cdda1a9a 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_pdm.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_pdm.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -122,7 +122,7 @@ typedef void (*nrfx_pdm_event_handler_t)(nrfx_pdm_evt_t const * const p_evt);
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If specified event handler is NULL.
+ * @retval NRFX_ERROR_INVALID_PARAM If invalid configuration was specified.
*/
nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config,
nrfx_pdm_event_handler_t event_handler);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_power.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_power.h
index a6dc9019f9..34f15f332c 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_power.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_power.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_power_clock.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_power_clock.h
index 5a22f6d418..cc3a594328 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_power_clock.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_power_clock.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_ppi.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_ppi.h
index ac60d3acf7..69b4d7707a 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_ppi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_ppi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_pwm.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_pwm.h
index 5fe33f4ae2..d65dbb4f65 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_pwm.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_pwm.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_qdec.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_qdec.h
index 6277b7ec2e..7d6bdfb9a6 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_qdec.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_qdec.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -108,10 +108,10 @@ typedef void (*nrfx_qdec_event_handler_t)(nrfx_qdec_event_t event);
/**@brief Function for initializing QDEC.
*
* @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] event_handler Event handler function.
+ * @param[in] event_handler Event handler provided by the user.
+ * Must not be NULL.
*
* @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_PARAM If invalid parameters were supplied.
* @retval NRFX_ERROR_INVALID_STATE If QDEC was already initialized.
*/
nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config,
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_qspi.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_qspi.h
index ba84772b4c..9259441b8e 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_qspi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_qspi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -117,13 +117,25 @@ typedef void (*nrfx_qspi_handler_t)(nrfx_qspi_evt_t event, void * p_context);
/**
* @brief Function for initializing the QSPI driver instance.
*
+ * This function configures the peripheral and its interrupts and activates it. During the
+ * activation process, the internal clocks are started and the QSPI peripheral tries to read
+ * the status byte to read the busy bit. Reading the status byte is done in a simple poll and wait
+ * mechanism.
+ * If the busy bit is 1, this indicates issues with the external memory device. As a result,
+ * @ref nrfx_qspi_init returns NRFX_ERROR_TIMEOUT.
+ *
+ * In case of issues:
+ * - Check the connection.
+ * - Make sure that the memory device does not perform other operations like erasing or writing.
+ * - Check if there is a short circuit.
+ *
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] handler Event handler provided by the user. If NULL, transfers
* will be performed in blocking mode.
* @param[in] p_context Pointer to context. Use in interrupt handler.
*
- *
* @retval NRFX_SUCCESS If initialization was successful.
+ * @retval NRFX_ERROR_TIMEOUT If the peripheral cannot connect with external memory.
* @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
* @retval NRFX_ERROR_INVALID_PARAM If the pin configuration was incorrect.
*/
@@ -241,6 +253,7 @@ nrfx_err_t nrfx_qspi_mem_busy_check(void);
* @param[out] p_rx_buffer Pointer to the array for data to receive. Can be NULL if there is nothing to receive.
*
* @retval NRFX_SUCCESS If the operation was successful.
+ * @retval NRFX_ERROR_TIMEOUT If the external memory is busy or there are connection issues.
* @retval NRFX_ERROR_BUSY If the driver currently handles other operation.
*/
nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_rng.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_rng.h
index dbca3fa16c..56ec5f75b8 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_rng.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_rng.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -78,12 +78,10 @@ typedef void (* nrfx_rng_evt_handler_t)(uint8_t rng_data);
* @brief Function for initializing the nrfx_rng module.
*
* @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] handler Event handler provided by the user. Handler is required
- * to work with the module. NULL value is not supported.
+ * @param[in] handler Event handler provided by the user. Must not be NULL.
*
* @retval NRFX_SUCCESS Driver was successfully initialized.
* @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM Handler value is NULL.
*/
nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handler_t handler);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_rtc.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_rtc.h
index 80ee453ec3..8e84051c3e 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_rtc.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_rtc.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -87,9 +87,6 @@ enum {
#endif
#if NRFX_CHECK(NRFX_RTC2_ENABLED)
NRFX_RTC2_INST_IDX,
-#endif
-#if NRFX_CHECK(NRFX_RTC3_ENABLED)
- NRFX_RTC3_INST_IDX,
#endif
NRFX_RTC_ENABLED_COUNT
};
@@ -120,13 +117,13 @@ typedef void (*nrfx_rtc_handler_t)(nrfx_rtc_int_type_t int_type);
*
* After initialization, the instance is in power off state.
*
- * @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] handler User's event handler.
+ * @param[in] p_instance Pointer to the driver instance structure.
+ * @param[in] p_config Pointer to the structure with initial configuration.
+ * @param[in] handler Event handler provided by the user.
+ * Must not be NULL.
*
- * @retval NRFX_SUCCESS If successfully initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If no handler was provided.
- * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
+ * @retval NRFX_SUCCESS If successfully initialized.
+ * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
*/
nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const p_instance,
nrfx_rtc_config_t const * p_config,
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_saadc.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_saadc.h
index 7f4816fe61..df5f3eaac5 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_saadc.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_saadc.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -170,10 +170,10 @@ typedef void (* nrfx_saadc_event_handler_t)(nrfx_saadc_evt_t const * p_event);
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] event_handler Event handler provided by the user.
+ * Must not be NULL.
*
- * @retval NRFX_SUCCESS If initialization was successful.
- * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If event_handler is NULL.
+ * @retval NRFX_SUCCESS If initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
*/
nrfx_err_t nrfx_saadc_init(nrfx_saadc_config_t const * p_config,
nrfx_saadc_event_handler_t event_handler);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spi.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spi.h
index 23327ffd4a..cacf1ad692 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -84,40 +84,6 @@ enum {
*/
#define NRFX_SPI_PIN_NOT_USED 0xFF
-/**
- * @brief SPI data rates.
- */
-typedef enum
-{
- NRFX_SPI_FREQ_125K = NRF_SPI_FREQ_125K, ///< 125 kbps.
- NRFX_SPI_FREQ_250K = NRF_SPI_FREQ_250K, ///< 250 kbps.
- NRFX_SPI_FREQ_500K = NRF_SPI_FREQ_500K, ///< 500 kbps.
- NRFX_SPI_FREQ_1M = NRF_SPI_FREQ_1M, ///< 1 Mbps.
- NRFX_SPI_FREQ_2M = NRF_SPI_FREQ_2M, ///< 2 Mbps.
- NRFX_SPI_FREQ_4M = NRF_SPI_FREQ_4M, ///< 4 Mbps.
- NRFX_SPI_FREQ_8M = NRF_SPI_FREQ_8M ///< 8 Mbps.
-} nrfx_spi_frequency_t;
-
-/**
- * @brief SPI modes.
- */
-typedef enum
-{
- NRFX_SPI_MODE_0 = NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock.
- NRFX_SPI_MODE_1 = NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock.
- NRFX_SPI_MODE_2 = NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock.
- NRFX_SPI_MODE_3 = NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock.
-} nrfx_spi_mode_t;
-
-/**
- * @brief SPI bit orders.
- */
-typedef enum
-{
- NRFX_SPI_BIT_ORDER_MSB_FIRST = NRF_SPI_BIT_ORDER_MSB_FIRST, ///< Most significant bit shifted out first.
- NRFX_SPI_BIT_ORDER_LSB_FIRST = NRF_SPI_BIT_ORDER_LSB_FIRST ///< Least significant bit shifted out first.
-} nrfx_spi_bit_order_t;
-
/**
* @brief SPI master driver instance configuration structure.
*/
@@ -140,9 +106,9 @@ typedef struct
uint8_t orc; ///< Over-run character.
/**< This character is used when all bytes from the TX buffer are sent,
but the transfer continues due to RX. */
- nrfx_spi_frequency_t frequency; ///< SPI frequency.
- nrfx_spi_mode_t mode; ///< SPI mode.
- nrfx_spi_bit_order_t bit_order; ///< SPI bit order.
+ nrf_spi_frequency_t frequency; ///< SPI frequency.
+ nrf_spi_mode_t mode; ///< SPI mode.
+ nrf_spi_bit_order_t bit_order; ///< SPI bit order.
} nrfx_spi_config_t;
/**
@@ -156,9 +122,9 @@ typedef struct
.ss_pin = NRFX_SPI_PIN_NOT_USED, \
.irq_priority = NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \
.orc = 0xFF, \
- .frequency = NRFX_SPI_FREQ_4M, \
- .mode = NRFX_SPI_MODE_0, \
- .bit_order = NRFX_SPI_BIT_ORDER_MSB_FIRST, \
+ .frequency = NRF_SPI_FREQ_4M, \
+ .mode = NRF_SPI_MODE_0, \
+ .bit_order = NRF_SPI_BIT_ORDER_MSB_FIRST, \
}
/**
@@ -170,7 +136,7 @@ typedef struct
size_t tx_length; ///< TX buffer length.
uint8_t * p_rx_buffer; ///< Pointer to RX buffer.
size_t rx_length; ///< RX buffer length.
-}nrfx_spi_xfer_desc_t;
+} nrfx_spi_xfer_desc_t;
/**
* @brief Macro for setting up single transfer descriptor.
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spim.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spim.h
index d59a3bed95..f9763dfa93 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spim.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spim.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spis.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spis.h
index d5769c0a79..5ea0699302 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spis.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_spis.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -47,48 +47,6 @@ extern "C" {
* @brief SPI Slave peripheral driver.
*/
-#define NRFX_SPIS_DEFAULT_CSN_PULLUP NRF_GPIO_PIN_NOPULL /**< Default pull-up configuration of the SPI CS. */
-#define NRFX_SPIS_DEFAULT_MISO_DRIVE NRF_GPIO_PIN_S0S1 /**< Default drive configuration of the SPI MISO. */
-
-/**
-* @brief This value can be provided instead of a pin number for the signals MOSI
-* and MISO to specify that the given signal is not used and therefore
-* does not need to be connected to a pin.
-*/
-#define NRFX_SPIS_PIN_NOT_USED 0xFF
-
-/** @brief SPIS transaction bit order definitions. */
-typedef enum
-{
- NRFX_SPIS_BIT_ORDER_LSB_FIRST = NRF_SPIS_BIT_ORDER_LSB_FIRST, /**< Least significant bit shifted out first. */
- NRFX_SPIS_BIT_ORDER_MSB_FIRST = NRF_SPIS_BIT_ORDER_MSB_FIRST /**< Most significant bit shifted out first. */
-} nrfx_spis_endian_t;
-
-/** @brief SPIS mode definitions for clock polarity and phase. */
-typedef enum
-{
- NRFX_SPIS_MODE_0 = NRF_SPIS_MODE_0, /**< (CPOL = 0, CPHA = 0). */
- NRFX_SPIS_MODE_1 = NRF_SPIS_MODE_1, /**< (CPOL = 0, CPHA = 1). */
- NRFX_SPIS_MODE_2 = NRF_SPIS_MODE_2, /**< (CPOL = 1, CPHA = 0). */
- NRFX_SPIS_MODE_3 = NRF_SPIS_MODE_3 /**< (CPOL = 1, CPHA = 1). */
-} nrfx_spis_mode_t;
-
-/** @brief Event callback function event definitions. */
-typedef enum
-{
- NRFX_SPIS_BUFFERS_SET_DONE, /**< Memory buffer set event. Memory buffers have been set successfully to the SPI slave device, and SPI transactions can be done. */
- NRFX_SPIS_XFER_DONE, /**< SPI transaction event. SPI transaction has been completed. */
- NRFX_SPIS_EVT_TYPE_MAX /**< Enumeration upper bound. */
-} nrfx_spis_event_type_t;
-
-/** @brief Structure containing the event context from the SPI slave driver. */
-typedef struct
-{
- nrfx_spis_event_type_t evt_type; //!< Type of event.
- size_t rx_amount; //!< Number of bytes received in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
- size_t tx_amount; //!< Number of bytes transmitted in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
-} nrfx_spis_event_t;
-
/** @brief SPI slave driver instance data structure. */
typedef struct
{
@@ -96,13 +54,6 @@ typedef struct
uint8_t drv_inst_idx; //!< Driver instance index.
} nrfx_spis_t;
-/** @brief Macro for creating an SPI slave driver instance. */
-#define NRFX_SPIS_INSTANCE(id) \
-{ \
- .p_reg = NRFX_CONCAT_2(NRF_SPIS, id), \
- .drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIS, id, _INST_IDX), \
-}
-
enum {
#if NRFX_CHECK(NRFX_SPIS0_ENABLED)
NRFX_SPIS0_INST_IDX,
@@ -116,50 +67,91 @@ enum {
NRFX_SPIS_ENABLED_COUNT
};
+/** @brief Macro for creating an SPI slave driver instance. */
+#define NRFX_SPIS_INSTANCE(id) \
+{ \
+ .p_reg = NRFX_CONCAT_2(NRF_SPIS, id), \
+ .drv_inst_idx = NRFX_CONCAT_3(NRFX_SPIS, id, _INST_IDX), \
+}
+
+/**
+ * @brief This value can be provided instead of a pin number for the signals MOSI
+ * and MISO to specify that the given signal is not used and therefore
+ * does not need to be connected to a pin.
+ */
+#define NRFX_SPIS_PIN_NOT_USED 0xFF
+
+/** @brief Default pull-up configuration of the SPI CS. */
+#define NRFX_SPIS_DEFAULT_CSN_PULLUP NRF_GPIO_PIN_NOPULL
+/** @brief Default drive configuration of the SPI MISO. */
+#define NRFX_SPIS_DEFAULT_MISO_DRIVE NRF_GPIO_PIN_S0S1
+
+/** @brief SPI slave driver event types. */
+typedef enum
+{
+ NRFX_SPIS_BUFFERS_SET_DONE, //!< Memory buffer set event. Memory buffers have been set successfully to the SPI slave device, and SPI transaction can be done.
+ NRFX_SPIS_XFER_DONE, //!< SPI transaction event. SPI transaction has been completed.
+ NRFX_SPIS_EVT_TYPE_MAX //!< Enumeration upper bound.
+} nrfx_spis_evt_type_t;
+
+/** @brief SPI slave driver event structure. */
+typedef struct
+{
+ nrfx_spis_evt_type_t evt_type; //!< Type of the event.
+ size_t rx_amount; //!< Number of bytes received in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
+ size_t tx_amount; //!< Number of bytes transmitted in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
+} nrfx_spis_evt_t;
+
/** @brief SPI slave instance default configuration. */
-#define NRFX_SPIS_DEFAULT_CONFIG \
-{ \
- .sck_pin = NRFX_SPIS_PIN_NOT_USED, \
- .mosi_pin = NRFX_SPIS_PIN_NOT_USED, \
- .miso_pin = NRFX_SPIS_PIN_NOT_USED, \
- .csn_pin = NRFX_SPIS_PIN_NOT_USED, \
- .miso_drive = NRFX_SPIS_DEFAULT_MISO_DRIVE, \
- .csn_pullup = NRFX_SPIS_DEFAULT_CSN_PULLUP, \
- .orc = NRFX_SPIS_DEFAULT_ORC, \
- .def = NRFX_SPIS_DEFAULT_DEF, \
- .mode = (nrfx_spis_mode_t)NRFX_SPIS_DEFAULT_MODE, \
- .bit_order = (nrfx_spis_endian_t)NRFX_SPIS_DEFAULT_BIT_ORDER, \
- .irq_priority = NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY, \
+#define NRFX_SPIS_DEFAULT_CONFIG \
+{ \
+ .sck_pin = NRFX_SPIS_PIN_NOT_USED, \
+ .mosi_pin = NRFX_SPIS_PIN_NOT_USED, \
+ .miso_pin = NRFX_SPIS_PIN_NOT_USED, \
+ .csn_pin = NRFX_SPIS_PIN_NOT_USED, \
+ .mode = NRF_SPIS_MODE_0, \
+ .bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \
+ .csn_pullup = NRFX_SPIS_DEFAULT_CSN_PULLUP, \
+ .miso_drive = NRFX_SPIS_DEFAULT_MISO_DRIVE, \
+ .def = NRFX_SPIS_DEFAULT_DEF, \
+ .orc = NRFX_SPIS_DEFAULT_ORC, \
+ .irq_priority = NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY, \
}
/** @brief SPI peripheral device configuration data. */
typedef struct
{
- uint32_t miso_pin; //!< SPI MISO pin (optional).
- /**< Set @ref NRFX_SPIS_PIN_NOT_USED
- * if this signal is not needed. */
- uint32_t mosi_pin; //!< SPI MOSI pin (optional).
- /**< Set @ref NRFX_SPIS_PIN_NOT_USED
- * if this signal is not needed. */
- uint32_t sck_pin; //!< SPI SCK pin.
- uint32_t csn_pin; //!< SPI CSN pin.
- nrfx_spis_mode_t mode; //!< SPI mode.
- nrfx_spis_endian_t bit_order; //!< SPI transaction bit order.
- nrf_gpio_pin_pull_t csn_pullup; //!< CSN pin pull-up configuration.
- nrf_gpio_pin_drive_t miso_drive; //!< MISO pin drive configuration.
- uint8_t def; //!< Character clocked out in case of an ignored transaction.
- uint8_t orc; //!< Character clocked out after an over-read of the transmit buffer.
- uint8_t irq_priority; //!< Interrupt priority.
+ uint32_t miso_pin; //!< SPI MISO pin (optional).
+ /**< Set @ref NRFX_SPIS_PIN_NOT_USED
+ * if this signal is not needed. */
+ uint32_t mosi_pin; //!< SPI MOSI pin (optional).
+ /**< Set @ref NRFX_SPIS_PIN_NOT_USED
+ * if this signal is not needed. */
+ uint32_t sck_pin; //!< SPI SCK pin.
+ uint32_t csn_pin; //!< SPI CSN pin.
+ nrf_spis_mode_t mode; //!< SPI mode.
+ nrf_spis_bit_order_t bit_order; //!< SPI transaction bit order.
+ nrf_gpio_pin_pull_t csn_pullup; //!< CSN pin pull-up configuration.
+ nrf_gpio_pin_drive_t miso_drive; //!< MISO pin drive configuration.
+ uint8_t def; //!< Character clocked out in case of an ignored transaction.
+ uint8_t orc; //!< Character clocked out after an over-read of the transmit buffer.
+ uint8_t irq_priority; //!< Interrupt priority.
} nrfx_spis_config_t;
-/** @brief SPI slave event callback function type.
+/**
+ * @brief SPI slave driver event handler type.
*
- * @param[in] event SPI slave driver event.
+ * @param[in] p_event Pointer to the event structure. The structure is
+ * allocated on the stack so it is valid only until
+ * the event handler returns.
+ * @param[in] p_context Context set on initialization.
*/
-typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_event_t event);
+typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_evt_t const * p_event,
+ void * p_context);
-/** @brief Function for initializing the SPI slave driver instance.
+/**
+ * @brief Function for initializing the SPI slave driver instance.
*
* @note When the nRF52 Anomaly 109 workaround for SPIS is enabled, this function
* initializes the GPIOTE driver as well, and uses one of GPIOTE channels
@@ -168,8 +160,11 @@ typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_event_t event);
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] event_handler Function to be called by the SPI slave driver upon event.
+ * Must not be NULL.
+ * @param[in] p_context Context passed to the event handler.
*
* @retval NRFX_SUCCESS If the initialization was successful.
+ * @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
* @retval NRFX_ERROR_INVALID_PARAM If an invalid parameter is supplied.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* instance ID is already in use. This is
@@ -181,7 +176,8 @@ typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_event_t event);
*/
nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
nrfx_spis_config_t const * p_config,
- nrfx_spis_event_handler_t event_handler);
+ nrfx_spis_event_handler_t event_handler,
+ void * p_context);
/**
* @brief Function for uninitializing the SPI slave driver instance.
@@ -190,14 +186,15 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
*/
void nrfx_spis_uninit(nrfx_spis_t const * const p_instance);
-/** @brief Function for preparing the SPI slave instance for a single SPI transaction.
+/**
+ * @brief Function for preparing the SPI slave instance for a single SPI transaction.
*
* This function prepares the SPI slave device to be ready for a single SPI transaction. It configures
* the SPI slave device to use the memory supplied with the function call in SPI transactions.
*
* When either the memory buffer configuration or the SPI transaction has been
* completed, the event callback function will be called with the appropriate event
- * @ref nrfx_spis_event_type_t. Note that the callback function can be called before returning from
+ * @ref nrfx_spis_evt_type_t. Note that the callback function can be called before returning from
* this function, because it is called from the SPI slave interrupt context.
*
* @note This function can be called from the callback function context.
@@ -210,13 +207,12 @@ void nrfx_spis_uninit(nrfx_spis_t const * const p_instance);
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
- * @param[in] p_tx_buffer Pointer to the TX buffer.
- * @param[in] p_rx_buffer Pointer to the RX buffer.
+ * @param[in] p_tx_buffer Pointer to the TX buffer. Can be NULL when the buffer length is zero.
+ * @param[in] p_rx_buffer Pointer to the RX buffer. Can be NULL when the buffer length is zero.
* @param[in] tx_buffer_length Length of the TX buffer in bytes.
* @param[in] rx_buffer_length Length of the RX buffer in bytes.
*
* @retval NRFX_SUCCESS If the operation was successful.
- * @retval NRFX_ERROR_NULL If the operation failed because a NULL pointer was supplied.
* @retval NRFX_ERROR_INVALID_STATE If the operation failed because the SPI slave device is in an incorrect state.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
* RAM region.
@@ -224,9 +220,9 @@ void nrfx_spis_uninit(nrfx_spis_t const * const p_instance);
* @retval NRFX_ERROR_INTERNAL If the operation failed because of an internal error.
*/
nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance,
- uint8_t const * p_tx_buffer,
+ uint8_t const * p_tx_buffer,
size_t tx_buffer_length,
- uint8_t * p_rx_buffer,
+ uint8_t * p_rx_buffer,
size_t rx_buffer_length);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_swi.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_swi.h
index 5d297d8045..7c297fe420 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_swi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_swi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_systick.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_systick.h
index c5a785d675..b6c42f6c8d 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_systick.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_systick.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_timer.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_timer.h
index 8550431b70..2fbfc569d7 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_timer.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_timer.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -131,7 +131,6 @@ typedef void (* nrfx_timer_event_handler_t)(nrf_timer_event_t event_type,
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
- * @retval NRFX_ERROR_INVALID_PARAM If no handler was provided.
*/
nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance,
nrfx_timer_config_t const * p_config,
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twi.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twi.h
index ccec9445af..ab68c6d6ae 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twim.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twim.h
index e0eee8ecc7..211a669434 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twim.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twim.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twis.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twis.h
index 56a2dde41e..a424a1e98f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twis.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_twis.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_uart.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_uart.h
index 66694e0dfd..3af649b5fe 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_uart.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_uart.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_uarte.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_uarte.h
index 5ad8da39e2..4ce3ae7d72 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_uarte.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_uarte.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_wdt.h b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_wdt.h
index ac6a0aa6e2..8f82ebcdc2 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_wdt.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/include/nrfx_wdt.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -70,9 +70,8 @@ typedef nrf_wdt_rr_register_t nrfx_wdt_channel_id;
* @brief This function initializes watchdog.
*
* @param[in] p_config Pointer to the structure with initial configuration.
- * @param[in] wdt_event_handler specifies event handler provided by user.
- *
- * @note Function asserts if wdt_event_handler is NULL.
+ * @param[in] wdt_event_handler Event handler provided by the user.
+ * Must not be NULL.
*
* @return NRFX_SUCCESS on success, otherwise an error code.
*/
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/nrfx_common.h b/hw/mcu/nordic/src/ext/nrfx/drivers/nrfx_common.h
index 93f9b71c1d..2b17f7d0e8 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/nrfx_common.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/nrfx_common.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -130,6 +130,27 @@ extern "C" {
(((length1) < (1U << NRFX_CONCAT_2(peripheral, _EASYDMA_MAXCNT_SIZE))) && \
((length2) < (1U << NRFX_CONCAT_2(peripheral, _EASYDMA_MAXCNT_SIZE))))
+/**@brief Macro for waiting until condition is met.
+ *
+ * @param[in] condition Condition to meet.
+ * @param[in] attempts Maximum number of condition checks. Must not be 0.
+ * @param[in] delay_us Delay between consecutive checks, in microseconds.
+ * @param[out] result Boolean variable to store the result of the wait process.
+ * Set to true if the condition is met or false otherwise.
+ */
+#define NRFX_WAIT_FOR(condition, attempts, delay_us, result) \
+do { \
+ result = false; \
+ uint32_t remaining_attempts = (attempts); \
+ do { \
+ if (condition) \
+ { \
+ result = true; \
+ break; \
+ } \
+ NRFX_DELAY_US(delay_us); \
+ } while (--remaining_attempts); \
+} while(0)
/**
* @brief IRQ handler type.
@@ -202,6 +223,7 @@ __STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit);
*/
__STATIC_INLINE uint32_t nrfx_event_to_bitpos(uint32_t event);
+
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE bool nrfx_is_in_ram(void const * p_object)
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/nrfx_errors.h b/hw/mcu/nordic/src/ext/nrfx/drivers/nrfx_errors.h
index 0c33b224f1..f2fed763b8 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/nrfx_errors.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/nrfx_errors.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -42,7 +42,7 @@
* @brief Global error codes definitions.
*/
-#define NRFX_ERROR_BASE_NUM 0xBAD00000
+#define NRFX_ERROR_BASE_NUM 0x0BAD0000
#define NRFX_ERROR_DRIVERS_BASE_NUM (NRFX_ERROR_BASE_NUM + 0x10000)
/** @brief Enumerated type for error codes. */
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_adc.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_adc.c
index bc4b78c5dd..96dc9824cb 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_adc.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_adc.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -46,8 +46,8 @@ typedef struct
nrfx_adc_channel_t * p_head;
nrfx_adc_channel_t * p_current_conv;
nrf_adc_value_t * p_buffer;
- uint8_t size;
- uint8_t idx;
+ uint16_t size;
+ uint16_t idx;
nrfx_drv_state_t state;
} adc_cb_t;
@@ -143,8 +143,8 @@ void nrfx_adc_channel_disable(nrfx_adc_channel_t * const p_channel)
void nrfx_adc_sample(void)
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
- NRFX_ASSERT(!nrf_adc_is_busy());
- nrf_adc_start();
+ NRFX_ASSERT(!nrf_adc_busy_check());
+ nrf_adc_task_trigger(NRF_ADC_TASK_START);
}
nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
@@ -165,10 +165,10 @@ nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
{
m_cb.state = NRFX_DRV_STATE_POWERED_ON;
- nrf_adc_config_set(p_channel->config.data);
+ nrf_adc_init(&p_channel->config);
nrf_adc_enable();
nrf_adc_int_disable(NRF_ADC_INT_END_MASK);
- nrf_adc_start();
+ nrf_adc_task_trigger(NRF_ADC_TASK_START);
if (p_value)
{
while (!nrf_adc_event_check(NRF_ADC_EVENT_END)) {}
@@ -210,11 +210,10 @@ static bool adc_sample_process()
m_cb.p_current_conv = m_cb.p_current_conv->p_next;
task_trigger = true;
}
- nrf_adc_config_set(m_cb.p_current_conv->config.data);
+ nrf_adc_init(&m_cb.p_current_conv->config);
nrf_adc_enable();
if (task_trigger)
{
- //nrf_adc_start();
nrf_adc_task_trigger(NRF_ADC_TASK_START);
}
return false;
@@ -248,7 +247,7 @@ nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size)
m_cb.size = size;
m_cb.idx = 0;
m_cb.p_buffer = buffer;
- nrf_adc_config_set(m_cb.p_current_conv->config.data);
+ nrf_adc_init(&m_cb.p_current_conv->config);
nrf_adc_event_clear(NRF_ADC_EVENT_END);
nrf_adc_enable();
if (m_cb.event_handler)
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_clock.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_clock.c
index 6bf29ee0c0..8bda4a912d 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_clock.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_clock.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -62,6 +62,17 @@ extern bool nrfx_power_irq_enabled;
#define CALIBRATION_SUPPORT 0
#endif
+#if defined(NRF52810_XXAA) || \
+ defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
+ defined(NRF52840_XXAA)
+// Enable workaround for nRF52 anomaly 192 (LFRC oscillator frequency is wrong
+// after calibration, exceeding 500 ppm).
+#define USE_WORKAROUND_FOR_ANOMALY_192
+
+// Enable workaround for nRF52 anomaly 201 (EVENTS_HFCLKSTARTED might be generated twice).
+#define USE_WORKAROUND_FOR_ANOMALY_201
+#endif
+
typedef enum
{
CAL_STATE_IDLE,
@@ -73,6 +84,10 @@ typedef struct
{
nrfx_clock_event_handler_t event_handler;
bool module_initialized; /*< Indicate the state of module */
+#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
+ bool hfclk_started; /*< Anomaly 201 workaround. */
+#endif
+
#if CALIBRATION_SUPPORT
volatile nrfx_clock_cal_state_t cal_state;
#endif // CALIBRATION_SUPPORT
@@ -88,7 +103,7 @@ static nrfx_clock_cb_t m_clock_cb;
bool nrfx_clock_irq_enabled;
#endif
-#ifdef NRF52832_XXAA
+#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
// ANOMALY 132 - LFCLK needs to avoid frame from 66us to 138us after LFCLK stop. This solution
// applies delay of 138us before starting LFCLK.
@@ -131,10 +146,12 @@ static void nrfx_clock_anomaly_132(void)
CoreDebug->DEMCR = core_debug;
}
-#endif // NRF52832_XXAA
+#endif // defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
{
+ NRFX_ASSERT(event_handler);
+
nrfx_err_t err_code = NRFX_SUCCESS;
if (m_clock_cb.module_initialized)
{
@@ -147,6 +164,9 @@ nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
#endif
m_clock_cb.event_handler = event_handler;
m_clock_cb.module_initialized = true;
+#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
+ m_clock_cb.hfclk_started = false;
+#endif
}
NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
@@ -201,7 +221,7 @@ void nrfx_clock_lfclk_start(void)
nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED);
nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK);
-#ifdef NRF52832_XXAA
+#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
nrfx_clock_anomaly_132();
#endif
@@ -230,6 +250,9 @@ void nrfx_clock_hfclk_stop(void)
nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTOP);
while (nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY))
{}
+#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
+ m_clock_cb.hfclk_started = false;
+#endif
}
nrfx_err_t nrfx_clock_calibration_start(void)
@@ -251,6 +274,9 @@ nrfx_err_t nrfx_clock_calibration_start(void)
nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);
nrf_clock_int_enable(NRF_CLOCK_INT_DONE_MASK);
m_clock_cb.cal_state = CAL_STATE_CAL;
+#if defined(USE_WORKAROUND_FOR_ANOMALY_192)
+ *(volatile uint32_t *)0x40000C34 = 0x00000002;
+#endif
nrf_clock_task_trigger(NRF_CLOCK_TASK_CAL);
}
else
@@ -297,7 +323,15 @@ void nrfx_clock_irq_handler(void)
NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_HFCLKSTARTED));
nrf_clock_int_disable(NRF_CLOCK_INT_HF_STARTED_MASK);
+#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
+ if (!m_clock_cb.hfclk_started)
+ {
+ m_clock_cb.hfclk_started = true;
+ m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
+ }
+#else
m_clock_cb.event_handler(NRFX_CLOCK_EVT_HFCLK_STARTED);
+#endif
}
if (nrf_clock_event_check(NRF_CLOCK_EVENT_LFCLKSTARTED))
{
@@ -319,6 +353,9 @@ void nrfx_clock_irq_handler(void)
if (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE))
{
+#if defined(USE_WORKAROUND_FOR_ANOMALY_192)
+ *(volatile uint32_t *)0x40000C34 = 0x00000000;
+#endif
nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);
NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_DONE));
nrf_clock_int_disable(NRF_CLOCK_INT_DONE_MASK);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_comp.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_comp.c
index e99fe8a6c3..618ec77470 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_comp.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_comp.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -74,6 +74,7 @@ nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config,
nrfx_comp_event_handler_t event_handler)
{
NRFX_ASSERT(p_config);
+ NRFX_ASSERT(event_handler);
nrfx_err_t err_code;
if (m_state != NRFX_DRV_STATE_UNINITIALIZED)
@@ -85,18 +86,7 @@ nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config,
return err_code;
}
- if (event_handler)
- {
- m_comp_event_handler = event_handler;
- }
- else
- {
- err_code = NRFX_ERROR_INVALID_PARAM;
- NRFX_LOG_WARNING("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
- }
+ m_comp_event_handler = event_handler;
#if NRFX_CHECK(NRFX_PRS_ENABLED)
if (nrfx_prs_acquire(NRF_COMP, nrfx_comp_irq_handler) != NRFX_SUCCESS)
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_gpiote.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_gpiote.c
index f1ecee0dc9..b5e18fe5db 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_gpiote.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_gpiote.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -91,6 +91,7 @@ typedef struct
nrfx_gpiote_evt_handler_t handlers[GPIOTE_CH_NUM + NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS];
int8_t pin_assignments[NUMBER_OF_PINS];
int8_t port_handlers_pins[NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS];
+ uint8_t configured_pins[((NUMBER_OF_PINS)+7) / 8];
nrfx_drv_state_t state;
} gpiote_control_block_t;
@@ -153,6 +154,21 @@ __STATIC_INLINE void pin_in_use_clear(uint32_t pin)
}
+__STATIC_INLINE void pin_configured_set(uint32_t pin)
+{
+ nrf_bitmask_bit_set(pin, m_cb.configured_pins);
+}
+
+__STATIC_INLINE void pin_configured_clear(uint32_t pin)
+{
+ nrf_bitmask_bit_clear(pin, m_cb.configured_pins);
+}
+
+__STATIC_INLINE bool pin_configured_check(uint32_t pin)
+{
+ return 0 != nrf_bitmask_bit_is_set(pin, m_cb.configured_pins);
+}
+
__STATIC_INLINE int8_t channel_port_get(uint32_t pin)
{
return m_cb.pin_assignments[pin];
@@ -225,6 +241,8 @@ nrfx_err_t nrfx_gpiote_init(void)
channel_free(i);
}
+ memset(m_cb.configured_pins, 0, sizeof(m_cb.configured_pins));
+
NRFX_IRQ_PRIORITY_SET(GPIOTE_IRQn, NRFX_GPIOTE_CONFIG_IRQ_PRIORITY);
NRFX_IRQ_ENABLE(GPIOTE_IRQn);
nrf_gpiote_event_clear(NRF_GPIOTE_EVENTS_PORT);
@@ -316,6 +334,7 @@ nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t pin,
}
nrf_gpio_cfg_output(pin);
+ pin_configured_set(pin);
}
}
@@ -336,7 +355,11 @@ void nrfx_gpiote_out_uninit(nrfx_gpiote_pin_t pin)
}
pin_in_use_clear(pin);
- nrf_gpio_cfg_default(pin);
+ if (pin_configured_check(pin))
+ {
+ nrf_gpio_cfg_default(pin);
+ pin_configured_clear(pin);
+ }
}
@@ -344,7 +367,7 @@ void nrfx_gpiote_out_set(nrfx_gpiote_pin_t pin)
{
NRFX_ASSERT(pin < NUMBER_OF_PINS);
NRFX_ASSERT(pin_in_use(pin));
- NRFX_ASSERT(!pin_in_use_by_te(pin))
+ NRFX_ASSERT(!pin_in_use_by_te(pin));
nrf_gpio_pin_set(pin);
}
@@ -354,7 +377,7 @@ void nrfx_gpiote_out_clear(nrfx_gpiote_pin_t pin)
{
NRFX_ASSERT(pin < NUMBER_OF_PINS);
NRFX_ASSERT(pin_in_use(pin));
- NRFX_ASSERT(!pin_in_use_by_te(pin))
+ NRFX_ASSERT(!pin_in_use_by_te(pin));
nrf_gpio_pin_clear(pin);
}
@@ -364,7 +387,7 @@ void nrfx_gpiote_out_toggle(nrfx_gpiote_pin_t pin)
{
NRFX_ASSERT(pin < NUMBER_OF_PINS);
NRFX_ASSERT(pin_in_use(pin));
- NRFX_ASSERT(!pin_in_use_by_te(pin))
+ NRFX_ASSERT(!pin_in_use_by_te(pin));
nrf_gpio_pin_toggle(pin);
}
@@ -374,7 +397,7 @@ void nrfx_gpiote_out_task_enable(nrfx_gpiote_pin_t pin)
{
NRFX_ASSERT(pin < NUMBER_OF_PINS);
NRFX_ASSERT(pin_in_use(pin));
- NRFX_ASSERT(pin_in_use_by_te(pin))
+ NRFX_ASSERT(pin_in_use_by_te(pin));
nrf_gpiote_task_enable((uint32_t)m_cb.pin_assignments[pin]);
}
@@ -384,7 +407,7 @@ void nrfx_gpiote_out_task_disable(nrfx_gpiote_pin_t pin)
{
NRFX_ASSERT(pin < NUMBER_OF_PINS);
NRFX_ASSERT(pin_in_use(pin));
- NRFX_ASSERT(pin_in_use_by_te(pin))
+ NRFX_ASSERT(pin_in_use_by_te(pin));
nrf_gpiote_task_disable((uint32_t)m_cb.pin_assignments[pin]);
}
@@ -494,13 +517,17 @@ nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t pin,
int8_t channel = channel_port_alloc(pin, evt_handler, p_config->hi_accuracy);
if (channel != NO_CHANNELS)
{
- if (p_config->is_watcher)
- {
- nrf_gpio_cfg_watcher(pin);
- }
- else
+ if (!p_config->skip_gpio_setup)
{
- nrf_gpio_cfg_input(pin, p_config->pull);
+ if (p_config->is_watcher)
+ {
+ nrf_gpio_cfg_watcher(pin);
+ }
+ else
+ {
+ nrf_gpio_cfg_input(pin, p_config->pull);
+ }
+ pin_configured_set(pin);
}
if (p_config->hi_accuracy)
@@ -523,7 +550,6 @@ nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t pin,
return err_code;
}
-
void nrfx_gpiote_in_event_enable(nrfx_gpiote_pin_t pin, bool int_enable)
{
NRFX_ASSERT(pin < NUMBER_OF_PINS);
@@ -595,7 +621,11 @@ void nrfx_gpiote_in_uninit(nrfx_gpiote_pin_t pin)
{
nrf_gpiote_te_default((uint32_t)channel_port_get(pin));
}
- nrf_gpio_cfg_default(pin);
+ if (pin_configured_check(pin))
+ {
+ nrf_gpio_cfg_default(pin);
+ pin_configured_clear(pin);
+ }
channel_free((uint8_t)channel_port_get(pin));
pin_in_use_clear(pin);
}
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_i2s.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_i2s.c
index d744a20b69..28b412556b 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_i2s.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_i2s.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -35,7 +35,6 @@
#include <nrfx_i2s.h>
#include <hal/nrf_gpio.h>
-#include <string.h>
#define NRFX_LOG_MODULE I2S
#include <nrfx_log.h>
@@ -52,16 +51,20 @@ typedef struct
nrfx_i2s_data_handler_t handler;
nrfx_drv_state_t state;
- bool synchronized_mode : 1;
- bool rx_ready : 1;
- bool tx_ready : 1;
- bool just_started : 1;
- uint16_t buffer_half_size;
- uint32_t * p_rx_buffer;
- uint32_t * p_tx_buffer;
+ bool use_rx : 1;
+ bool use_tx : 1;
+ bool rx_ready : 1;
+ bool tx_ready : 1;
+ bool buffers_needed : 1;
+ bool buffers_reused : 1;
+
+ uint16_t buffer_size;
+ nrfx_i2s_buffers_t next_buffers;
+ nrfx_i2s_buffers_t current_buffers;
} i2s_control_block_t;
static i2s_control_block_t m_cb;
+
static void configure_pins(nrfx_i2s_config_t const * p_config)
{
uint32_t mck_pin, sdout_pin, sdin_pin;
@@ -115,8 +118,12 @@ static void configure_pins(nrfx_i2s_config_t const * p_config)
sdin_pin = NRF_I2S_PIN_NOT_CONNECTED;
}
- nrf_i2s_pins_set(NRF_I2S, p_config->sck_pin, p_config->lrck_pin,
- mck_pin, sdout_pin, sdin_pin);
+ nrf_i2s_pins_set(NRF_I2S,
+ p_config->sck_pin,
+ p_config->lrck_pin,
+ mck_pin,
+ sdout_pin,
+ sdin_pin);
}
@@ -137,13 +144,14 @@ nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config,
return err_code;
}
- if (!nrf_i2s_configure(NRF_I2S, p_config->mode,
- p_config->format,
- p_config->alignment,
- p_config->sample_width,
- p_config->channels,
- p_config->mck_setup,
- p_config->ratio))
+ if (!nrf_i2s_configure(NRF_I2S,
+ p_config->mode,
+ p_config->format,
+ p_config->alignment,
+ p_config->sample_width,
+ p_config->channels,
+ p_config->mck_setup,
+ p_config->ratio))
{
err_code = NRFX_ERROR_INVALID_PARAM;
NRFX_LOG_WARNING("Function: %s, error code: %s.",
@@ -160,9 +168,8 @@ nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config,
m_cb.state = NRFX_DRV_STATE_INITIALIZED;
- err_code = NRFX_SUCCESS;
- NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
+ NRFX_LOG_INFO("Initialized.");
+ return NRFX_SUCCESS;
}
@@ -174,38 +181,44 @@ void nrfx_i2s_uninit(void)
NRFX_IRQ_DISABLE(I2S_IRQn);
+ nrf_i2s_pins_set(NRF_I2S,
+ NRF_I2S_PIN_NOT_CONNECTED,
+ NRF_I2S_PIN_NOT_CONNECTED,
+ NRF_I2S_PIN_NOT_CONNECTED,
+ NRF_I2S_PIN_NOT_CONNECTED,
+ NRF_I2S_PIN_NOT_CONNECTED);
+
m_cb.state = NRFX_DRV_STATE_UNINITIALIZED;
- NRFX_LOG_INFO("Initialized.");
+ NRFX_LOG_INFO("Uninitialized.");
}
-nrfx_err_t nrfx_i2s_start(uint32_t * p_rx_buffer,
- uint32_t * p_tx_buffer,
- uint16_t buffer_size,
- uint8_t flags)
+nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers,
+ uint16_t buffer_size,
+ uint8_t flags)
{
- NRFX_ASSERT((p_rx_buffer != NULL) || (p_tx_buffer != NULL));
-
- uint16_t buffer_half_size = buffer_size / 2;
- NRFX_ASSERT(buffer_half_size != 0);
-
- if (m_cb.state != NRFX_DRV_STATE_INITIALIZED)
- {
- return NRFX_ERROR_INVALID_STATE;
- }
+ NRFX_ASSERT(p_initial_buffers != NULL);
+ NRFX_ASSERT(p_initial_buffers->p_rx_buffer != NULL ||
+ p_initial_buffers->p_tx_buffer != NULL);
+ NRFX_ASSERT(buffer_size != 0);
+ (void)(flags);
nrfx_err_t err_code;
- if ((p_rx_buffer != NULL) && !nrfx_is_in_ram(p_rx_buffer))
+ if (m_cb.state != NRFX_DRV_STATE_INITIALIZED)
{
- err_code = NRFX_ERROR_INVALID_ADDR;
+ err_code = NRFX_ERROR_INVALID_STATE;
NRFX_LOG_WARNING("Function: %s, error code: %s.",
__func__,
NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
- if ((p_tx_buffer != NULL) && !nrfx_is_in_ram(p_tx_buffer))
+ if (((p_initial_buffers->p_rx_buffer != NULL)
+ && !nrfx_is_in_ram(p_initial_buffers->p_rx_buffer))
+ ||
+ ((p_initial_buffers->p_tx_buffer != NULL)
+ && !nrfx_is_in_ram(p_initial_buffers->p_tx_buffer)))
{
err_code = NRFX_ERROR_INVALID_ADDR;
NRFX_LOG_WARNING("Function: %s, error code: %s.",
@@ -214,59 +227,86 @@ nrfx_err_t nrfx_i2s_start(uint32_t * p_rx_buffer,
return err_code;
}
- // Initially we set up the peripheral to use the first half of each buffer,
- // then in 'nrfx_i2s_irq_handler' we will switch to the second half.
- nrf_i2s_transfer_set(NRF_I2S, buffer_half_size, p_rx_buffer, p_tx_buffer);
+ m_cb.use_rx = (p_initial_buffers->p_rx_buffer != NULL);
+ m_cb.use_tx = (p_initial_buffers->p_tx_buffer != NULL);
+ m_cb.rx_ready = false;
+ m_cb.tx_ready = false;
+ m_cb.buffers_needed = false;
+ m_cb.buffer_size = buffer_size;
+
+ // Set the provided initial buffers as next, they will become the current
+ // ones after the IRQ handler is called for the first time, what will occur
+ // right after the START task is triggered.
+ m_cb.next_buffers = *p_initial_buffers;
+ m_cb.current_buffers.p_rx_buffer = NULL;
+ m_cb.current_buffers.p_tx_buffer = NULL;
+
+ nrf_i2s_transfer_set(NRF_I2S,
+ m_cb.buffer_size,
+ m_cb.next_buffers.p_rx_buffer,
+ m_cb.next_buffers.p_tx_buffer);
+
+ nrf_i2s_enable(NRF_I2S);
+
+ m_cb.state = NRFX_DRV_STATE_POWERED_ON;
+
+ nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD);
+ nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD);
+ nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_STOPPED);
+ nrf_i2s_int_enable(NRF_I2S, (m_cb.use_rx ? NRF_I2S_INT_RXPTRUPD_MASK : 0) |
+ (m_cb.use_tx ? NRF_I2S_INT_TXPTRUPD_MASK : 0) |
+ NRF_I2S_INT_STOPPED_MASK);
+ nrf_i2s_task_trigger(NRF_I2S, NRF_I2S_TASK_START);
+
+ NRFX_LOG_INFO("Started.");
+ return NRFX_SUCCESS;
+}
- m_cb.p_rx_buffer = p_rx_buffer;
- m_cb.p_tx_buffer = p_tx_buffer;
- m_cb.buffer_half_size = buffer_half_size;
- m_cb.just_started = true;
- if ((flags & NRFX_I2S_FLAG_SYNCHRONIZED_MODE) &&
- // [synchronized mode makes sense only when both RX and TX are enabled]
- (m_cb.p_rx_buffer != NULL) && (m_cb.p_tx_buffer != NULL))
+nrfx_err_t nrfx_i2s_next_buffers_set(nrfx_i2s_buffers_t const * p_buffers)
+{
+ NRFX_ASSERT(m_cb.state == NRFX_DRV_STATE_POWERED_ON);
+ NRFX_ASSERT(p_buffers);
+
+ nrfx_err_t err_code;
+
+ if (!m_cb.buffers_needed)
{
- m_cb.synchronized_mode = true;
- m_cb.rx_ready = false;
- m_cb.tx_ready = false;
+ err_code = NRFX_ERROR_INVALID_STATE;
+ NRFX_LOG_WARNING("Function: %s, error code: %s.",
+ __func__,
+ NRFX_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
}
- else
+
+ if (((p_buffers->p_rx_buffer != NULL)
+ && !nrfx_is_in_ram(p_buffers->p_rx_buffer))
+ ||
+ ((p_buffers->p_tx_buffer != NULL)
+ && !nrfx_is_in_ram(p_buffers->p_tx_buffer)))
{
- m_cb.synchronized_mode = false;
+ err_code = NRFX_ERROR_INVALID_ADDR;
+ NRFX_LOG_WARNING("Function: %s, error code: %s.",
+ __func__,
+ NRFX_LOG_ERROR_STRING_GET(err_code));
+ return err_code;
}
- nrf_i2s_enable(NRF_I2S);
-
- m_cb.state = NRFX_DRV_STATE_POWERED_ON;
-
- if (m_cb.p_tx_buffer != NULL)
+ if (m_cb.use_tx)
{
- // Get from the application the first portion of data to be sent - we
- // need to have it in the transmit buffer before we start the transfer.
- // Unless the synchronized mode is active. In this mode we must wait
- // with this until the first portion of data is received, so here we
- // just make sure that there will be silence on the SDOUT line prior
- // to that moment.
- if (m_cb.synchronized_mode)
- {
- memset(m_cb.p_tx_buffer, 0, m_cb.buffer_half_size * sizeof(uint32_t));
- }
- else
- {
- m_cb.handler(NULL, m_cb.p_tx_buffer, m_cb.buffer_half_size);
- }
+ NRFX_ASSERT(p_buffers->p_tx_buffer != NULL);
+ nrf_i2s_tx_buffer_set(NRF_I2S, p_buffers->p_tx_buffer);
+ }
+ if (m_cb.use_rx)
+ {
+ NRFX_ASSERT(p_buffers->p_rx_buffer != NULL);
+ nrf_i2s_rx_buffer_set(NRF_I2S, p_buffers->p_rx_buffer);
}
- nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD);
- nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD);
- nrf_i2s_int_enable(NRF_I2S,
- NRF_I2S_INT_RXPTRUPD_MASK | NRF_I2S_INT_TXPTRUPD_MASK);
- nrf_i2s_task_trigger(NRF_I2S, NRF_I2S_TASK_START);
+ m_cb.next_buffers = *p_buffers;
+ m_cb.buffers_needed = false;
- err_code = NRFX_SUCCESS;
- NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
+ return NRFX_SUCCESS;
}
@@ -274,150 +314,98 @@ void nrfx_i2s_stop(void)
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
- // First disable interrupts, then trigger the STOP task, so no spurious
- // RXPTRUPD and TXPTRUPD events (see FTPAN-55) will be processed.
- nrf_i2s_int_disable(NRF_I2S, NRF_I2S_INT_RXPTRUPD_MASK | NRF_I2S_INT_TXPTRUPD_MASK);
+ m_cb.buffers_needed = false;
+ // First disable interrupts, then trigger the STOP task, so no spurious
+ // RXPTRUPD and TXPTRUPD events (see nRF52 anomaly 55) are processed.
+ nrf_i2s_int_disable(NRF_I2S, NRF_I2S_INT_RXPTRUPD_MASK |
+ NRF_I2S_INT_TXPTRUPD_MASK);
nrf_i2s_task_trigger(NRF_I2S, NRF_I2S_TASK_STOP);
-
- nrf_i2s_disable(NRF_I2S);
-
- m_cb.state = NRFX_DRV_STATE_INITIALIZED;
-
- NRFX_LOG_INFO("Disabled.");
}
void nrfx_i2s_irq_handler(void)
{
- uint32_t const * p_data_received = NULL;
- uint32_t * p_data_to_send = NULL;
-
if (nrf_i2s_event_check(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD))
{
nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_TXPTRUPD);
- NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_I2S_EVENT_TXPTRUPD));
-
- // If transmission is not enabled, but for some reason the TXPTRUPD
- // event has been generated, just ignore it.
- if (m_cb.p_tx_buffer != NULL)
+ m_cb.tx_ready = true;
+ if (m_cb.use_tx && m_cb.buffers_needed)
{
- uint32_t * p_tx_buffer_next;
- if (nrf_i2s_tx_buffer_get(NRF_I2S) == m_cb.p_tx_buffer)
- {
- p_tx_buffer_next = m_cb.p_tx_buffer + m_cb.buffer_half_size;
- }
- else
- {
- p_tx_buffer_next = m_cb.p_tx_buffer;
- }
- nrf_i2s_tx_buffer_set(NRF_I2S, p_tx_buffer_next);
-
- m_cb.tx_ready = true;
-
- // Now the part of the buffer that we've configured as "next" should
- // be filled by the application with proper data to be sent;
- // the peripheral is sending data from the other part of the buffer
- // (but it will finish soon...).
- p_data_to_send = p_tx_buffer_next;
-
+ m_cb.buffers_reused = true;
}
}
-
if (nrf_i2s_event_check(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD))
{
nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_RXPTRUPD);
- NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_I2S_EVENT_RXPTRUPD));
-
- // If reception is not enabled, but for some reason the RXPTRUPD event
- // has been generated, just ignore it.
- if (m_cb.p_rx_buffer != NULL)
+ m_cb.rx_ready = true;
+ if (m_cb.use_rx && m_cb.buffers_needed)
{
- uint32_t * p_rx_buffer_next;
- if (nrf_i2s_rx_buffer_get(NRF_I2S) == m_cb.p_rx_buffer)
- {
- p_rx_buffer_next = m_cb.p_rx_buffer + m_cb.buffer_half_size;
- }
- else
- {
- p_rx_buffer_next = m_cb.p_rx_buffer;
- }
- nrf_i2s_rx_buffer_set(NRF_I2S, p_rx_buffer_next);
-
- m_cb.rx_ready = true;
-
- // The RXPTRUPD event is generated for the first time right after
- // the transfer is started. Since there is no data received yet at
- // this point we only update the buffer pointer (it is done above),
- // there is no callback to the application.
- // [for synchronized mode this has to be handled differently -
- // see below]
- if (m_cb.just_started && !m_cb.synchronized_mode)
- {
- m_cb.just_started = false;
- }
- else
- {
- // The RXPTRUPD event indicates that from now on the peripheral
- // will be filling the part of the buffer that was pointed at
- // the time the event has been generated, hence now we can let
- // the application process the data stored in the other part of
- // the buffer - the one that we've just set to be filled next.
- p_data_received = p_rx_buffer_next;
- }
+ m_cb.buffers_reused = true;
}
}
- // Call the data handler passing received data to the application and/or
- // requesting data to be sent.
- if (!m_cb.synchronized_mode)
+ if (nrf_i2s_event_check(NRF_I2S, NRF_I2S_EVENT_STOPPED))
{
- if ((p_data_received != NULL) || (p_data_to_send != NULL))
- {
- if (p_data_received != NULL)
- {
- NRFX_LOG_DEBUG("Rx data:");
- NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)p_data_received,
- m_cb.buffer_half_size * sizeof(p_data_received[0]));
- }
- m_cb.handler(p_data_received, p_data_to_send,
- m_cb.buffer_half_size);
- if (p_data_to_send != NULL)
- {
- NRFX_LOG_DEBUG("Tx data:");
- NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)p_data_to_send,
- m_cb.buffer_half_size * sizeof(p_data_to_send[0]));
- }
- }
+ nrf_i2s_event_clear(NRF_I2S, NRF_I2S_EVENT_STOPPED);
+ nrf_i2s_int_disable(NRF_I2S, NRF_I2S_INT_STOPPED_MASK);
+ nrf_i2s_disable(NRF_I2S);
+
+ // When stopped, release all buffers, including these scheduled for
+ // the next transfer.
+ m_cb.handler(&m_cb.current_buffers, 0);
+ m_cb.handler(&m_cb.next_buffers, 0);
+
+ m_cb.state = NRFX_DRV_STATE_INITIALIZED;
+ NRFX_LOG_INFO("Stopped.");
}
- // In the synchronized mode wait until the events for both RX and TX occur.
- // And ignore the initial occurrences of these events, since they only
- // indicate that the transfer has started - no data is received yet at
- // that moment, so we have got nothing to pass to the application.
else
{
- if (m_cb.rx_ready && m_cb.tx_ready)
+ // Check if the requested transfer has been completed:
+ // - full-duplex mode
+ if ((m_cb.use_tx && m_cb.use_rx && m_cb.tx_ready && m_cb.rx_ready) ||
+ // - TX only mode
+ (!m_cb.use_rx && m_cb.tx_ready) ||
+ // - RX only mode
+ (!m_cb.use_tx && m_cb.rx_ready))
{
- m_cb.rx_ready = false;
m_cb.tx_ready = false;
+ m_cb.rx_ready = false;
- if (m_cb.just_started)
+ // If the application did not supply the buffers for the next
+ // part of the transfer until this moment, the current buffers
+ // cannot be released, since the I2S peripheral already started
+ // using them. Signal this situation to the application by
+ // passing NULL instead of the structure with released buffers.
+ if (m_cb.buffers_reused)
{
- m_cb.just_started = false;
+ m_cb.buffers_reused = false;
+ // This will most likely be set at this point. However, there is
+ // a small time window between TXPTRUPD and RXPTRUPD events,
+ // and it is theoretically possible that next buffers will be
+ // set in this window, so to be sure this flag is set to true,
+ // set it explicitly.
+ m_cb.buffers_needed = true;
+ m_cb.handler(NULL,
+ NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED);
}
else
{
- NRFX_LOG_DEBUG("Rx data:");
- NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)nrf_i2s_rx_buffer_get(NRF_I2S),
- m_cb.buffer_half_size * sizeof(p_data_received[0]));
- m_cb.handler(nrf_i2s_rx_buffer_get(NRF_I2S),
- nrf_i2s_tx_buffer_get(NRF_I2S),
- m_cb.buffer_half_size);
- NRFX_LOG_DEBUG("Tx data:");
- NRFX_LOG_HEXDUMP_DEBUG((uint8_t *)nrf_i2s_tx_buffer_get(NRF_I2S),
- m_cb.buffer_half_size * sizeof(p_data_to_send[0]));
+ // Buffers that have been used by the I2S peripheral (current)
+ // are now released and will be returned to the application,
+ // and the ones scheduled to be used as next become the current
+ // ones.
+ nrfx_i2s_buffers_t released_buffers = m_cb.current_buffers;
+ m_cb.current_buffers = m_cb.next_buffers;
+ m_cb.next_buffers.p_rx_buffer = NULL;
+ m_cb.next_buffers.p_tx_buffer = NULL;
+ m_cb.buffers_needed = true;
+ m_cb.handler(&released_buffers,
+ NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED);
}
+
}
}
}
+
#endif // NRFX_CHECK(NRFX_I2S_ENABLED)
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_lpcomp.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_lpcomp.c
index efdea282b5..d508789027 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_lpcomp.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_lpcomp.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -73,6 +73,7 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config,
nrfx_lpcomp_event_handler_t event_handler)
{
NRFX_ASSERT(p_config);
+ NRFX_ASSERT(event_handler);
nrfx_err_t err_code;
if (m_state != NRFX_DRV_STATE_UNINITIALIZED)
@@ -84,18 +85,7 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config,
return err_code;
}
- if (event_handler)
- {
- m_lpcomp_event_handler = event_handler;
- }
- else
- {
- err_code = NRFX_ERROR_INVALID_PARAM;
- NRFX_LOG_WARNING("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
- }
+ m_lpcomp_event_handler = event_handler;
#if NRFX_CHECK(NRFX_PRS_ENABLED)
if (nrfx_prs_acquire(NRF_LPCOMP, nrfx_lpcomp_irq_handler) != NRFX_SUCCESS)
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_pdm.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_pdm.c
index dfd469d636..c3eaf16393 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_pdm.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_pdm.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -171,6 +171,7 @@ nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config,
nrfx_pdm_event_handler_t event_handler)
{
NRFX_ASSERT(p_config);
+ NRFX_ASSERT(event_handler);
nrfx_err_t err_code;
if (m_cb.drv_state != NRFX_DRV_STATE_UNINITIALIZED)
@@ -181,14 +182,6 @@ nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config,
NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
- if (event_handler == NULL)
- {
- err_code = NRFX_ERROR_INVALID_PARAM;
- NRFX_LOG_WARNING("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
- }
if (p_config->gain_l > NRF_PDM_GAIN_MAXIMUM ||
p_config->gain_r > NRF_PDM_GAIN_MAXIMUM)
@@ -250,7 +243,7 @@ static void pdm_start()
static void pdm_buf_request()
{
m_cb.irq_buff_request = 1;
- NVIC_SetPendingIRQ(PDM_IRQn);
+ NRFX_IRQ_PENDING_SET(PDM_IRQn);
}
nrfx_err_t nrfx_pdm_start(void)
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_power.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_power.c
index 615ee3acad..ccecdc4f14 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_power.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_power.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_power_clock.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_power_clock.c
index 6fa37312e4..1be9ade0d5 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_power_clock.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_power_clock.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_ppi.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_ppi.c
index 433b7d1667..546aae7cf5 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_ppi.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_ppi.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_pwm.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_pwm.c
index 3e3c6b3141..d00ee50850 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_pwm.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_pwm.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_qdec.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_qdec.c
index d00da604a4..e49c94d9fe 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_qdec.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_qdec.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -92,6 +92,7 @@ nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config,
nrfx_qdec_event_handler_t event_handler)
{
NRFX_ASSERT(p_config);
+ NRFX_ASSERT(event_handler);
nrfx_err_t err_code;
if (m_state != NRFX_DRV_STATE_UNINITIALIZED)
@@ -103,18 +104,7 @@ nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config,
return err_code;
}
- if (event_handler)
- {
- m_qdec_event_handler = event_handler;
- }
- else
- {
- err_code = NRFX_ERROR_INVALID_PARAM;
- NRFX_LOG_WARNING("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
- }
+ m_qdec_event_handler = event_handler;
nrf_qdec_sampleper_set(p_config->sampleper);
nrf_gpio_cfg_input(p_config->pselled, NRF_GPIO_PIN_NOPULL);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_qspi.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_qspi.c
index 55154cb1c9..146cdd034c 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_qspi.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_qspi.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -48,9 +48,15 @@
*/
#define QSPI_MEM_STATUSREG_WIP_Pos 0x01
-#define QSPI_WAIT_READY() do { \
- while (!nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY)); \
- } while(0)
+/**
+ * @brief Default time used in timeout function.
+ */
+#define QSPI_DEF_WAIT_TIME_US 10
+
+/**
+ * @brief Default number of tries in timeout function.
+ */
+#define QSPI_DEF_WAIT_ATTEMPTS 100
/**
* @brief Control block - driver instance local data.
@@ -85,7 +91,8 @@ static nrfx_err_t qspi_task_perform(nrf_qspi_task_t task)
if (m_cb.handler == NULL)
{
- QSPI_WAIT_READY();
+ while (!nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY))
+ {};
}
return NRFX_SUCCESS;
}
@@ -147,7 +154,16 @@ nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config,
nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE);
// Waiting for the peripheral to activate
- QSPI_WAIT_READY();
+ bool result;
+ NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
+ QSPI_DEF_WAIT_ATTEMPTS,
+ QSPI_DEF_WAIT_TIME_US,
+ result);
+
+ if (!result)
+ {
+ return NRFX_ERROR_TIMEOUT;
+ }
return NRFX_SUCCESS;
}
@@ -175,7 +191,21 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
nrf_qspi_cinstr_transfer_start(NRF_QSPI, p_config);
- QSPI_WAIT_READY();
+ bool result;
+ NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
+ QSPI_DEF_WAIT_ATTEMPTS,
+ QSPI_DEF_WAIT_TIME_US,
+ result);
+
+ if (!result)
+ {
+ // This timeout should never occur when WIPWAIT is not active, since in this
+ // case the QSPI peripheral should send the command immediately, without any
+ // waiting for previous write to complete.
+ NRFX_ASSERT(p_config->wipwait);
+
+ return NRFX_ERROR_TIMEOUT;
+ }
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
@@ -226,6 +256,11 @@ void nrfx_qspi_uninit(void)
nrf_qspi_disable(NRF_QSPI);
+ nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_DEACTIVATE);
+
+ // Workaround for nRF52840 anomaly 122: Current consumption is too high.
+ *(volatile uint32_t *)0x40029054ul = 1ul;
+
NRFX_IRQ_DISABLE(QSPI_IRQn);
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_rng.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_rng.c
index b01e2fffa5..3b33edaf04 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_rng.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_rng.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -51,16 +51,12 @@ static nrfx_rng_evt_handler_t m_rng_hndl;
nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handler_t handler)
{
NRFX_ASSERT(p_config);
+ NRFX_ASSERT(handler);
if (m_rng_state != NRFX_DRV_STATE_UNINITIALIZED)
{
return NRFX_ERROR_ALREADY_INITIALIZED;
}
- if (handler == NULL)
- {
- return NRFX_ERROR_INVALID_PARAM;
- }
-
m_rng_hndl = handler;
if (p_config->error_correction)
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_rtc.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_rtc.c
index 8ade52034d..5546c10eb6 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_rtc.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_rtc.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -70,21 +70,10 @@ nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const p_instance,
nrfx_rtc_handler_t handler)
{
NRFX_ASSERT(p_config);
-
+ NRFX_ASSERT(handler);
nrfx_err_t err_code;
- if (handler)
- {
- m_handlers[p_instance->instance_id] = handler;
- }
- else
- {
- err_code = NRFX_ERROR_INVALID_PARAM;
- NRFX_LOG_WARNING("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
- }
+ m_handlers[p_instance->instance_id] = handler;
if (m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED)
{
@@ -168,7 +157,7 @@ nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t cha
return err_code;
}
}
- NRFX_LOG_INFO("RTC id: %d, channel disabled: %d.", p_instance->instance_id, channel);
+ NRFX_LOG_INFO("RTC id: %d, channel disabled: %lu.", p_instance->instance_id, channel);
err_code = NRFX_SUCCESS;
NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
@@ -220,7 +209,7 @@ nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance,
}
nrf_rtc_event_enable(p_instance->p_reg,int_mask);
- NRFX_LOG_INFO("RTC id: %d, channel enabled: %d, compare value: %d.",
+ NRFX_LOG_INFO("RTC id: %d, channel enabled: %lu, compare value: %lu.",
p_instance->instance_id,
channel,
val);
@@ -301,7 +290,7 @@ static void irq_handler(NRF_RTC_Type * p_reg,
nrf_rtc_event_disable(p_reg,int_mask);
nrf_rtc_int_disable(p_reg,int_mask);
nrf_rtc_event_clear(p_reg,event);
- NRFX_LOG_DEBUG("Event: %s, instance id: %d.", EVT_TO_STR(event), instance_id);
+ NRFX_LOG_DEBUG("Event: %s, instance id: %lu.", EVT_TO_STR(event), instance_id);
m_handlers[instance_id]((nrfx_rtc_int_type_t)i);
}
int_mask <<= 1;
@@ -312,7 +301,7 @@ static void irq_handler(NRF_RTC_Type * p_reg,
nrf_rtc_event_pending(p_reg, event))
{
nrf_rtc_event_clear(p_reg, event);
- NRFX_LOG_DEBUG("Event: %s, instance id: %d.", EVT_TO_STR(event), instance_id);
+ NRFX_LOG_DEBUG("Event: %s, instance id: %lu.", EVT_TO_STR(event), instance_id);
m_handlers[instance_id](NRFX_RTC_INT_TICK);
}
@@ -321,7 +310,7 @@ static void irq_handler(NRF_RTC_Type * p_reg,
nrf_rtc_event_pending(p_reg, event))
{
nrf_rtc_event_clear(p_reg,event);
- NRFX_LOG_DEBUG("Event: %s, instance id: %d.", EVT_TO_STR(event), instance_id);
+ NRFX_LOG_DEBUG("Event: %s, instance id: %lu.", EVT_TO_STR(event), instance_id);
m_handlers[instance_id](NRFX_RTC_INT_OVERFLOW);
}
}
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_saadc.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_saadc.c
index 103f6962c9..1f6989980c 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_saadc.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_saadc.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -203,6 +203,7 @@ nrfx_err_t nrfx_saadc_init(nrfx_saadc_config_t const * p_config,
nrfx_saadc_event_handler_t event_handler)
{
NRFX_ASSERT(p_config);
+ NRFX_ASSERT(event_handler);
nrfx_err_t err_code;
if (m_cb.state != NRFX_DRV_STATE_UNINITIALIZED)
@@ -213,14 +214,6 @@ nrfx_err_t nrfx_saadc_init(nrfx_saadc_config_t const * p_config,
NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
- if (event_handler == NULL)
- {
- err_code = NRFX_ERROR_INVALID_PARAM;
- NRFX_LOG_WARNING("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
- }
m_cb.event_handler = event_handler;
nrf_saadc_resolution_set(p_config->resolution);
@@ -262,13 +255,9 @@ void nrfx_saadc_uninit(void)
nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP);
// Wait for ADC being stopped.
- uint32_t timeout = HW_TIMEOUT;
-
- while (nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED) == 0 && timeout > 0)
- {
- --timeout;
- }
- NRFX_ASSERT(timeout > 0);
+ bool result;
+ NRFX_WAIT_FOR(nrf_saadc_event_check(NRF_SAADC_EVENT_STOPPED), HW_TIMEOUT, 0, result);
+ NRFX_ASSERT(result);
nrf_saadc_disable();
m_cb.adc_state = NRF_SAADC_STATE_IDLE;
@@ -277,7 +266,8 @@ void nrfx_saadc_uninit(void)
{
if (m_cb.psel[channel].pselp != NRF_SAADC_INPUT_DISABLED)
{
- (void)nrfx_saadc_channel_uninit(channel);
+ nrfx_err_t err_code = nrfx_saadc_channel_uninit(channel);
+ NRFX_ASSERT(err_code == NRFX_SUCCESS);
}
}
@@ -317,7 +307,7 @@ nrfx_err_t nrfx_saadc_channel_init(uint8_t chan
}
#endif //NRF52_PAN_74
- if (!m_cb.psel[channel].pselp)
+ if (m_cb.psel[channel].pselp == NRF_SAADC_INPUT_DISABLED)
{
++m_cb.active_channels;
}
@@ -343,7 +333,7 @@ nrfx_err_t nrfx_saadc_channel_init(uint8_t chan
nrfx_err_t nrfx_saadc_channel_uninit(uint8_t channel)
{
- NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT)
+ NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT);
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
nrfx_err_t err_code;
@@ -358,7 +348,7 @@ nrfx_err_t nrfx_saadc_channel_uninit(uint8_t channel)
return err_code;
}
- if (m_cb.psel[channel].pselp)
+ if (m_cb.psel[channel].pselp != NRF_SAADC_INPUT_DISABLED)
{
--m_cb.active_channels;
}
@@ -407,12 +397,10 @@ nrfx_err_t nrfx_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_valu
nrf_saadc_task_trigger(NRF_SAADC_TASK_START);
nrf_saadc_task_trigger(NRF_SAADC_TASK_SAMPLE);
- uint32_t timeout = HW_TIMEOUT;
+ bool result;
+ NRFX_WAIT_FOR(nrf_saadc_event_check(NRF_SAADC_EVENT_END), HW_TIMEOUT, 0, result);
+ NRFX_ASSERT(result);
- while (0 == nrf_saadc_event_check(NRF_SAADC_EVENT_END) && timeout > 0)
- {
- timeout--;
- }
nrf_saadc_event_clear(NRF_SAADC_EVENT_STARTED);
nrf_saadc_event_clear(NRF_SAADC_EVENT_END);
@@ -582,6 +570,7 @@ void nrfx_saadc_abort(void)
if (nrfx_saadc_is_busy())
{
nrf_saadc_event_clear(NRF_SAADC_EVENT_STOPPED);
+ nrf_saadc_int_enable(NRF_SAADC_INT_STOPPED);
nrf_saadc_task_trigger(NRF_SAADC_TASK_STOP);
if (m_cb.adc_state == NRF_SAADC_STATE_CALIBRATION)
@@ -591,15 +580,13 @@ void nrfx_saadc_abort(void)
else
{
// Wait for ADC being stopped.
- uint32_t timeout = HW_TIMEOUT;
-
- while ((m_cb.adc_state != NRF_SAADC_STATE_IDLE) && (timeout > 0))
- {
- --timeout;
- }
- NRFX_ASSERT(timeout > 0);
+ bool result;
+ NRFX_WAIT_FOR((m_cb.adc_state != NRF_SAADC_STATE_IDLE), HW_TIMEOUT, 0, result);
+ NRFX_ASSERT(result);
}
+ nrf_saadc_int_disable(NRF_SAADC_INT_STOPPED);
+
m_cb.p_buffer = 0;
m_cb.p_secondary_buffer = 0;
NRFX_LOG_INFO("Conversion aborted.");
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spi.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spi.c
index c70eaacaee..99d29f6bbd 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spi.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spi.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -57,6 +57,7 @@ typedef struct
// [no need for 'volatile' attribute for the following members, as they
// are not concurrently used in IRQ handlers and main line code]
uint8_t ss_pin;
+ uint8_t miso_pin;
uint8_t orc;
size_t bytes_transferred;
@@ -116,7 +117,7 @@ nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const p_instance,
// 0 - for modes 0 and 1 (CPOL = 0), 1 - for modes 2 and 3 (CPOL = 1);
// according to the reference manual guidelines this pin and its input
// buffer must always be connected for the SPI to work.
- if (p_config->mode <= NRFX_SPI_MODE_1)
+ if (p_config->mode <= NRF_SPI_MODE_1)
{
nrf_gpio_pin_clear(p_config->sck_pin);
}
@@ -151,6 +152,7 @@ nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const p_instance,
{
miso_pin = NRF_SPI_PIN_NOT_CONNECTED;
}
+ m_cb[p_instance->drv_inst_idx].miso_pin = p_config->miso_pin;
// - Slave Select (optional) - output with initial value 1 (inactive).
if (p_config->ss_pin != NRFX_SPI_PIN_NOT_USED)
{
@@ -161,11 +163,8 @@ nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const p_instance,
NRF_SPI_Type * p_spi = p_instance->p_reg;
nrf_spi_pins_set(p_spi, p_config->sck_pin, mosi_pin, miso_pin);
- nrf_spi_frequency_set(p_spi,
- (nrf_spi_frequency_t)p_config->frequency);
- nrf_spi_configure(p_spi,
- (nrf_spi_mode_t)p_config->mode,
- (nrf_spi_bit_order_t)p_config->bit_order);
+ nrf_spi_frequency_set(p_spi, p_config->frequency);
+ nrf_spi_configure(p_spi, p_config->mode, p_config->bit_order);
m_cb[p_instance->drv_inst_idx].orc = p_config->orc;
@@ -206,6 +205,11 @@ void nrfx_spi_uninit(nrfx_spi_t const * const p_instance)
{
nrf_spi_int_disable(p_spi, NRF_SPI_ALL_INTS_MASK);
}
+
+ if (p_cb->miso_pin != NRFX_SPI_PIN_NOT_USED)
+ {
+ nrf_gpio_cfg_default(p_cb->miso_pin);
+ }
nrf_spi_disable(p_spi);
#if NRFX_CHECK(NRFX_PRS_ENABLED)
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spim.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spim.c
index 38876aded7..e7fe76151a 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spim.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spim.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -101,6 +101,7 @@ typedef struct
// are not concurrently used in IRQ handlers and main line code]
bool ss_active_high;
uint8_t ss_pin;
+ uint8_t miso_pin;
uint8_t orc;
#if NRFX_CHECK(NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED)
@@ -110,6 +111,47 @@ typedef struct
} spim_control_block_t;
static spim_control_block_t m_cb[NRFX_SPIM_ENABLED_COUNT];
+#if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED)
+
+// Workaround for nRF52840 anomaly 198: SPIM3 transmit data might be corrupted.
+
+static uint32_t m_anomaly_198_preserved_value;
+
+static void anomaly_198_enable(uint8_t const * p_buffer, size_t buf_len)
+{
+ m_anomaly_198_preserved_value = *((volatile uint32_t *)0x40000E00);
+
+ if (buf_len == 0)
+ {
+ return;
+ }
+ uint32_t buffer_end_addr = ((uint32_t)p_buffer) + buf_len;
+ uint32_t block_addr = ((uint32_t)p_buffer) & ~0x1FFF;
+ uint32_t block_flag = (1UL << ((block_addr >> 13) & 0xFFFF));
+ uint32_t occupied_blocks = 0;
+
+ if (block_addr >= 0x20010000)
+ {
+ occupied_blocks = (1UL << 8);
+ }
+ else
+ {
+ do {
+ occupied_blocks |= block_flag;
+ block_flag <<= 1;
+ block_addr += 0x2000;
+ } while ((block_addr < buffer_end_addr) && (block_addr < 0x20012000));
+ }
+
+ *((volatile uint32_t *)0x40000E00) = occupied_blocks;
+}
+
+static void anomaly_198_disable(void)
+{
+ *((volatile uint32_t *)0x40000E00) = m_anomaly_198_preserved_value;
+}
+#endif // NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED)
+
nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance,
nrfx_spim_config_t const * p_config,
nrfx_spim_evt_handler_t handler,
@@ -219,6 +261,7 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance,
{
miso_pin = NRF_SPIM_PIN_NOT_CONNECTED;
}
+ m_cb[p_instance->drv_inst_idx].miso_pin = p_config->miso_pin;
// - Slave Select (optional) - output with initial value 1 (inactive).
if (p_config->ss_pin != NRFX_SPIM_PIN_NOT_USED)
{
@@ -261,11 +304,8 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance,
nrf_spim_pins_set(p_spim, p_config->sck_pin, mosi_pin, miso_pin);
- nrf_spim_frequency_set(p_spim,
- (nrf_spim_frequency_t)p_config->frequency);
- nrf_spim_configure(p_spim,
- (nrf_spim_mode_t)p_config->mode,
- (nrf_spim_bit_order_t)p_config->bit_order);
+ nrf_spim_frequency_set(p_spim, p_config->frequency);
+ nrf_spim_configure(p_spim, p_config->mode, p_config->bit_order);
nrf_spim_orc_set(p_spim, p_config->orc);
@@ -314,6 +354,11 @@ void nrfx_spim_uninit(nrfx_spim_t const * const p_instance)
p_cb->transfer_in_progress = false;
}
}
+
+ if (p_cb->miso_pin != NRFX_SPIM_PIN_NOT_USED)
+ {
+ nrf_gpio_cfg_default(p_cb->miso_pin);
+ }
nrf_spim_disable(p_spim);
#if NRFX_CHECK(NRFX_PRS_ENABLED)
@@ -329,7 +374,7 @@ nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const p_instance,
uint32_t flags,
uint8_t cmd_length)
{
- ASSERT(cmd_length <= NRF_SPIM_DCX_CNT_ALL_CMD)
+ NRFX_ASSERT(cmd_length <= NRF_SPIM_DCX_CNT_ALL_CMD);
nrf_spim_dcx_cnt_set((NRF_SPIM_Type *)p_instance->p_reg, cmd_length);
return nrfx_spim_xfer(p_instance, p_xfer_desc, 0);
}
@@ -423,6 +468,13 @@ static nrfx_err_t spim_xfer(NRF_SPIM_Type * p_spim,
nrf_spim_tx_buffer_set(p_spim, p_xfer_desc->p_tx_buffer, p_xfer_desc->tx_length);
nrf_spim_rx_buffer_set(p_spim, p_xfer_desc->p_rx_buffer, p_xfer_desc->rx_length);
+#if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED)
+ if (p_spim == NRF_SPIM3)
+ {
+ anomaly_198_enable(p_xfer_desc->p_tx_buffer, p_xfer_desc->tx_length);
+ }
+#endif
+
nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END);
spim_list_enable_handle(p_spim, flags);
@@ -446,6 +498,13 @@ static nrfx_err_t spim_xfer(NRF_SPIM_Type * p_spim,
if (!p_cb->handler)
{
while (!nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_END)){}
+
+#if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED)
+ if (p_spim == NRF_SPIM3)
+ {
+ anomaly_198_disable();
+ }
+#endif
if (p_cb->ss_pin != NRFX_SPIM_PIN_NOT_USED)
{
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED)
@@ -576,6 +635,12 @@ static void irq_handler(NRF_SPIM_Type * p_spim, spim_control_block_t * p_cb)
if (nrf_spim_event_check(p_spim, NRF_SPIM_EVENT_END))
{
+#if NRFX_CHECK(NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED)
+ if (p_spim == NRF_SPIM3)
+ {
+ anomaly_198_disable();
+ }
+#endif
nrf_spim_event_clear(p_spim, NRF_SPIM_EVENT_END);
NRFX_ASSERT(p_cb->handler);
NRFX_LOG_DEBUG("Event: NRF_SPIM_EVENT_END.");
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spis.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spis.c
index 01b12ba8eb..416135b60f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spis.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_spis.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2013 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2013 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -44,13 +44,6 @@
#define NRFX_LOG_MODULE SPIS
#include <nrfx_log.h>
-#if defined(NRF51) && !defined(SPIS1_EASYDMA_MAXCNT_SIZE)
-/* MDK comes with SPIS0 definition of maximum transmission length but nRF51 Series is equipped
- * with SPIS1 only. It is a simple workaround and will be removed in the next release of the MDK.
- */
-#define SPIS1_EASYDMA_MAXCNT_SIZE SPIS0_EASYDMA_MAXCNT_SIZE
-#endif
-
#define EVT_TO_STR(event) \
(event == NRF_SPIS_EVENT_ACQUIRED ? "NRF_SPIS_EVENT_ACQUIRED" : \
(event == NRF_SPIS_EVENT_END ? "NRF_SPIS_EVENT_END" : \
@@ -116,15 +109,18 @@ typedef struct
volatile uint8_t * rx_buffer; //!< SPI slave RX buffer.
nrfx_drv_state_t state; //!< driver initialization state.
volatile nrfx_spis_state_t spi_state; //!< SPI slave state.
+ void * p_context; //!< Context set on initialization.
} spis_cb_t;
static spis_cb_t m_cb[NRFX_SPIS_ENABLED_COUNT];
nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
nrfx_spis_config_t const * p_config,
- nrfx_spis_event_handler_t event_handler)
+ nrfx_spis_event_handler_t event_handler,
+ void * p_context)
{
NRFX_ASSERT(p_config);
+ NRFX_ASSERT(event_handler);
spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx];
nrfx_err_t err_code;
@@ -139,7 +135,7 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
return err_code;
}
- if ((uint32_t)p_config->mode > (uint32_t)NRFX_SPIS_MODE_3)
+ if ((uint32_t)p_config->mode > (uint32_t)NRF_SPIS_MODE_3)
{
err_code = NRFX_ERROR_INVALID_PARAM;
NRFX_LOG_WARNING("Function: %s, error code: %s.",
@@ -147,14 +143,6 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
}
- if (!event_handler)
- {
- err_code = NRFX_ERROR_NULL;
- NRFX_LOG_WARNING("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
- }
#if NRFX_CHECK(NRFX_PRS_ENABLED)
static nrfx_irq_handler_t const irq_handlers[NRFX_SPIS_ENABLED_COUNT] = {
#if NRFX_CHECK(NRFX_SPIS0_ENABLED)
@@ -232,8 +220,7 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
nrf_spis_tx_buffer_set(p_spis, NULL, 0);
// Configure SPI mode.
- nrf_spis_configure(p_spis, (nrf_spis_mode_t) p_config->mode,
- (nrf_spis_bit_order_t) p_config->bit_order);
+ nrf_spis_configure(p_spis, p_config->mode, p_config->bit_order);
// Configure DEF and ORC characters.
nrf_spis_def_set(p_spis, p_config->def);
@@ -246,8 +233,9 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
// Enable END_ACQUIRE shortcut.
nrf_spis_shorts_enable(p_spis, NRF_SPIS_SHORT_END_ACQUIRE);
- m_cb[p_instance->drv_inst_idx].spi_state = SPIS_STATE_INIT;
- m_cb[p_instance->drv_inst_idx].handler = event_handler;
+ p_cb->spi_state = SPIS_STATE_INIT;
+ p_cb->handler = event_handler;
+ p_cb->p_context = p_context;
#if defined(USE_DMA_ISSUE_WORKAROUND)
// Configure a GPIOTE channel to generate interrupts on each falling edge
@@ -285,11 +273,8 @@ nrfx_err_t nrfx_spis_init(nrfx_spis_t const * const p_instance,
// Enable SPI slave device.
nrf_spis_enable(p_spis);
- err_code = NRFX_SUCCESS;
- NRFX_LOG_INFO("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
+ NRFX_LOG_INFO("Initialized.");
+ return NRFX_SUCCESS;
}
@@ -311,7 +296,7 @@ void nrfx_spis_uninit(nrfx_spis_t const * const p_instance)
#endif
p_cb->state = NRFX_DRV_STATE_UNINITIALIZED;
- NRFX_LOG_INFO("Initialized.");
+ NRFX_LOG_INFO("Uninitialized.");
}
@@ -319,7 +304,7 @@ void nrfx_spis_uninit(nrfx_spis_t const * const p_instance)
static void spis_state_entry_action_execute(NRF_SPIS_Type * p_spis,
spis_cb_t * p_cb)
{
- nrfx_spis_event_t event;
+ nrfx_spis_evt_t event;
switch (p_cb->spi_state)
{
@@ -333,7 +318,7 @@ static void spis_state_entry_action_execute(NRF_SPIS_Type * p_spis,
event.tx_amount = 0;
NRFX_ASSERT(p_cb->handler != NULL);
- p_cb->handler(event);
+ p_cb->handler(&event, p_cb->p_context);
break;
case SPIS_XFER_COMPLETED:
@@ -345,7 +330,7 @@ static void spis_state_entry_action_execute(NRF_SPIS_Type * p_spis,
NRFX_LOG_HEXDUMP_DEBUG((uint8_t const *)p_cb->rx_buffer,
event.rx_amount * sizeof(p_cb->rx_buffer[0]));
NRFX_ASSERT(p_cb->handler != NULL);
- p_cb->handler(event);
+ p_cb->handler(&event, p_cb->p_context);
break;
default:
@@ -374,14 +359,12 @@ nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance,
uint8_t * p_rx_buffer,
size_t rx_buffer_length)
{
+ NRFX_ASSERT(p_tx_buffer != NULL || tx_buffer_length == 0);
+ NRFX_ASSERT(p_rx_buffer != NULL || rx_buffer_length == 0);
+
spis_cb_t * p_cb = &m_cb[p_instance->drv_inst_idx];
nrfx_err_t err_code;
- if (p_rx_buffer == NULL || p_tx_buffer == NULL)
- {
- return NRFX_ERROR_NULL;
- }
-
if (!SPIS_LENGTH_VALIDATE(p_instance->drv_inst_idx,
rx_buffer_length,
tx_buffer_length))
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_swi.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_swi.c
index 24a0083f5f..5d8b4d24e6 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_swi.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_swi.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -271,7 +271,7 @@ void nrfx_swi_trigger(nrfx_swi_t swi, uint8_t flag_number)
if (p_egu == NULL)
{
m_swi_flags[swi - NRFX_SWI_EGU_COUNT] |= (1 << flag_number);
- NVIC_SetPendingIRQ(swi_irq_number_get(swi));
+ NRFX_IRQ_PENDING_SET(swi_irq_number_get(swi));
}
else
#endif // (NRFX_SWI_EGU_COUNT < SWI_COUNT)
@@ -283,7 +283,7 @@ void nrfx_swi_trigger(nrfx_swi_t swi, uint8_t flag_number)
#else // -> #if !NRFX_SWI_EGU_COUNT
m_swi_flags[swi - NRFX_SWI_EGU_COUNT] |= (1 << flag_number);
- NVIC_SetPendingIRQ(swi_irq_number_get(swi));
+ NRFX_IRQ_PENDING_SET(swi_irq_number_get(swi));
#endif
}
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_systick.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_systick.c
index 21b8094964..6998182a42 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_systick.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_systick.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -74,7 +74,7 @@
* @param us Time in microseconds to check
*/
#define NRFX_SYSTICK_ASSERT_TIMEOUT(us) \
- NRFX_ASSERT(us <= (NRFX_SYSTICK_TICKS_MAX / ((SystemCoreClock) / NRFX_SYSTICK_US)))
+ NRFX_ASSERT(us <= (NRFX_SYSTICK_TICKS_MAX / ((SystemCoreClock) / NRFX_SYSTICK_US)));
/**
* @brief Function that converts microseconds to ticks
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_timer.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_timer.c
index 89c340e107..d9d2d569b5 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_timer.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_timer.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -63,6 +63,7 @@ nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance,
NRFX_ASSERT(p_instance->p_reg != NRF_TIMER0);
#endif
NRFX_ASSERT(p_config);
+ NRFX_ASSERT(timer_event_handler);
nrfx_err_t err_code;
@@ -75,15 +76,6 @@ nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance,
return err_code;
}
- if (timer_event_handler == NULL)
- {
- err_code = NRFX_ERROR_INVALID_PARAM;
- NRFX_LOG_WARNING("Function: %s, error code: %s.",
- __func__,
- NRFX_LOG_ERROR_STRING_GET(err_code));
- return err_code;
- }
-
/* Warning 685: Relational operator '<=' always evaluates to 'true'"
* Warning in NRF_TIMER_IS_BIT_WIDTH_VALID macro. Macro validate timers resolution.
* Not necessary in nRF52 based systems. Obligatory in nRF51 based systems.
@@ -102,7 +94,7 @@ nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance,
for (i = 0; i < p_instance->cc_channel_count; ++i)
{
nrf_timer_event_clear(p_instance->p_reg,
- nrf_timer_compare_event_get(i));
+ nrf_timer_compare_event_get(i));
}
NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number(p_instance->p_reg),
@@ -131,10 +123,7 @@ void nrfx_timer_uninit(nrfx_timer_t const * const p_instance)
nrf_timer_int_disable(p_instance->p_reg, DISABLE_ALL);
#undef DISABLE_ALL
- if (m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON)
- {
- nrfx_timer_disable(p_instance);
- }
+ nrfx_timer_disable(p_instance);
m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_UNINITIALIZED;
NRFX_LOG_INFO("Uninitialized instance: %d.", p_instance->instance_id);
@@ -150,7 +139,7 @@ void nrfx_timer_enable(nrfx_timer_t const * const p_instance)
void nrfx_timer_disable(nrfx_timer_t const * const p_instance)
{
- NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
+ NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_SHUTDOWN);
m_cb[p_instance->instance_id].state = NRFX_DRV_STATE_INITIALIZED;
NRFX_LOG_INFO("Disabled instance: %d.", p_instance->instance_id);
@@ -164,14 +153,14 @@ bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance)
void nrfx_timer_resume(nrfx_timer_t const * const p_instance)
{
- NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
+ NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_START);
NRFX_LOG_INFO("Resumed instance: %d.", p_instance->instance_id);
}
void nrfx_timer_pause(nrfx_timer_t const * const p_instance)
{
- NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
+ NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_STOP);
NRFX_LOG_INFO("Paused instance: %d.", p_instance->instance_id);
}
@@ -184,7 +173,7 @@ void nrfx_timer_clear(nrfx_timer_t const * const p_instance)
void nrfx_timer_increment(nrfx_timer_t const * const p_instance)
{
- NRFX_ASSERT(m_cb[p_instance->instance_id].state == NRFX_DRV_STATE_POWERED_ON);
+ NRFX_ASSERT(m_cb[p_instance->instance_id].state != NRFX_DRV_STATE_UNINITIALIZED);
NRFX_ASSERT(nrf_timer_mode_get(p_instance->p_reg) != NRF_TIMER_MODE_TIMER);
nrf_timer_task_trigger(p_instance->p_reg, NRF_TIMER_TASK_COUNT);
@@ -219,7 +208,7 @@ void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
}
nrf_timer_cc_write(p_instance->p_reg, cc_channel, cc_value);
- NRFX_LOG_INFO("Timer id: %d, capture value set: %d, channel: %d.",
+ NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
p_instance->instance_id,
cc_value,
cc_channel);
@@ -241,7 +230,7 @@ void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
cc_channel,
cc_value,
enable_int);
- NRFX_LOG_INFO("Timer id: %d, capture value set: %d, channel: %d.",
+ NRFX_LOG_INFO("Timer id: %d, capture value set: %lu, channel: %d.",
p_instance->instance_id,
cc_value,
cc_channel);
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twi.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twi.c
index e9e4b0284a..d5f0a1c9a5 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twi.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twi.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twim.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twim.c
index 6dbc76961e..fdfaca6e6a 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twim.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twim.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twis.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twis.c
index 496587a599..47baa1c895 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twis.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_twis.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_uart.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_uart.c
index d2040c8142..43a25151c3 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_uart.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_uart.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_uarte.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_uarte.c
index 6a5ed42a1e..bc4fcbe97b 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_uarte.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_uarte.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_wdt.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_wdt.c
index d1bf0ad849..0598041154 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_wdt.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/nrfx_wdt.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/prs/nrfx_prs.c b/hw/mcu/nordic/src/ext/nrfx/drivers/src/prs/nrfx_prs.c
index 4118ef23e6..24cafeb5c8 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/prs/nrfx_prs.c
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/prs/nrfx_prs.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/drivers/src/prs/nrfx_prs.h b/hw/mcu/nordic/src/ext/nrfx/drivers/src/prs/nrfx_prs.h
index 00ec9d4682..2ce29cc70b 100644
--- a/hw/mcu/nordic/src/ext/nrfx/drivers/src/prs/nrfx_prs.h
+++ b/hw/mcu/nordic/src/ext/nrfx/drivers/src/prs/nrfx_prs.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_adc.c b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_adc.c
deleted file mode 100644
index 9b7a41ff2d..0000000000
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_adc.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *
- * 1. Redistributions of source code must retain the above copyright notice, this
- * list of conditions and the following disclaimer.
- *
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <nrfx.h>
-
-#ifdef ADC_PRESENT
-#include <hal/nrf_adc.h>
-
-/**
- * @brief Function for configuring ADC.
- *
- * This function powers on ADC and configures it. ADC is in DISABLE state after configuration,
- * so it should be enabled before using it.
- *
- * @param[in] config Requested configuration.
- */
-void nrf_adc_configure(nrf_adc_config_t * config)
-{
- uint32_t config_reg = 0;
-
- config_reg |= ((uint32_t)config->resolution << ADC_CONFIG_RES_Pos) & ADC_CONFIG_RES_Msk;
- config_reg |= ((uint32_t)config->scaling << ADC_CONFIG_INPSEL_Pos) & ADC_CONFIG_INPSEL_Msk;
- config_reg |= ((uint32_t)config->reference << ADC_CONFIG_REFSEL_Pos) & ADC_CONFIG_REFSEL_Msk;
-
- if (config->reference & ADC_CONFIG_EXTREFSEL_Msk)
- {
- config_reg |= config->reference & ADC_CONFIG_EXTREFSEL_Msk;
- }
-
- /* select input */
- nrf_adc_input_select(NRF_ADC_CONFIG_INPUT_DISABLED);
-
- /* set new configuration keeping selected input */
- NRF_ADC->CONFIG = config_reg | (NRF_ADC->CONFIG & ADC_CONFIG_PSEL_Msk);
-}
-
-
-/**
- * @brief Blocking function for executing single ADC conversion.
- *
- * This function selects the desired input, starts a single conversion,
- * waits for it to finish, and returns the result.
- * ADC is left in STOP state, the given input is selected.
- * This function does not check if ADC is initialized and powered.
- *
- * @param[in] input Requested input to be selected.
- *
- * @return Conversion result
- */
-int32_t nrf_adc_convert_single(nrf_adc_config_input_t input)
-{
- int32_t val;
-
- nrf_adc_input_select(input);
- nrf_adc_start();
-
- while (!nrf_adc_conversion_finished())
- {
- }
- nrf_adc_conversion_event_clean();
- val = nrf_adc_result_get();
- nrf_adc_stop();
- return val;
-}
-#endif
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_adc.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_adc.h
index 1bd82b7d7e..bcc5913bd2 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_adc.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_adc.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -55,9 +55,9 @@ typedef enum
/** @brief Resolution of the analog-to-digital converter. */
typedef enum
{
- NRF_ADC_CONFIG_RES_8BIT = ADC_CONFIG_RES_8bit, /**< 8 bit resolution. */
- NRF_ADC_CONFIG_RES_9BIT = ADC_CONFIG_RES_9bit, /**< 9 bit resolution. */
- NRF_ADC_CONFIG_RES_10BIT = ADC_CONFIG_RES_10bit, /**< 10 bit resolution. */
+ NRF_ADC_CONFIG_RES_8BIT = ADC_CONFIG_RES_8bit, /**< 8-bit resolution. */
+ NRF_ADC_CONFIG_RES_9BIT = ADC_CONFIG_RES_9bit, /**< 9-bit resolution. */
+ NRF_ADC_CONFIG_RES_10BIT = ADC_CONFIG_RES_10bit, /**< 10-bit resolution. */
} nrf_adc_config_resolution_t;
@@ -71,6 +71,17 @@ typedef enum
NRF_ADC_CONFIG_SCALING_SUPPLY_ONE_THIRD = ADC_CONFIG_INPSEL_SupplyOneThirdPrescaling /**< 1/3 of supply. */
} nrf_adc_config_scaling_t;
+
+/**
+ * @brief External reference selection of the analog-to-digital converter.
+ */
+typedef enum
+{
+ NRF_ADC_CONFIG_EXTREFSEL_NONE = ADC_CONFIG_EXTREFSEL_None, /**< Analog reference inputs disabled. */
+ NRF_ADC_CONFIG_EXTREFSEL_AREF0 = ADC_CONFIG_EXTREFSEL_AnalogReference0, /**< AREF0 as analog reference. */
+ NRF_ADC_CONFIG_EXTREFSEL_AREF1 = ADC_CONFIG_EXTREFSEL_AnalogReference1 /**< AREF1 as analog reference. */
+} nrf_adc_config_extref_t;
+
/**
* @brief Reference selection of the analog-to-digital converter.
*/
@@ -79,11 +90,7 @@ typedef enum
NRF_ADC_CONFIG_REF_VBG = ADC_CONFIG_REFSEL_VBG, /**< 1.2 V reference. */
NRF_ADC_CONFIG_REF_SUPPLY_ONE_HALF = ADC_CONFIG_REFSEL_SupplyOneHalfPrescaling, /**< 1/2 of power supply. */
NRF_ADC_CONFIG_REF_SUPPLY_ONE_THIRD = ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling, /**< 1/3 of power supply. */
- NRF_ADC_CONFIG_REF_EXT_REF0 = ADC_CONFIG_REFSEL_External |
- ADC_CONFIG_EXTREFSEL_AnalogReference0 <<
- ADC_CONFIG_EXTREFSEL_Pos, /**< External reference 0. */
- NRF_ADC_CONFIG_REF_EXT_REF1 = ADC_CONFIG_REFSEL_External |
- ADC_CONFIG_EXTREFSEL_AnalogReference1 << ADC_CONFIG_EXTREFSEL_Pos, /**< External reference 0. */
+ NRF_ADC_CONFIG_REF_EXT = ADC_CONFIG_REFSEL_External /**< External reference. See @ref nrf_adc_config_extref_t for further configuration.*/
} nrf_adc_config_reference_t;
/** @brief Input selection of the analog-to-digital converter. */
@@ -113,7 +120,7 @@ typedef enum
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
{
/*lint -save -e30*/
- NRF_ADC_EVENT_END = offsetof(NRF_ADC_Type, EVENTS_END) /**< End of conversion event. */
+ NRF_ADC_EVENT_END = offsetof(NRF_ADC_Type, EVENTS_END) /**< End of a conversion event. */
/*lint -restore*/
} nrf_adc_event_t;
@@ -123,161 +130,45 @@ typedef struct
nrf_adc_config_resolution_t resolution; /**< ADC resolution. */
nrf_adc_config_scaling_t scaling; /**< ADC scaling factor. */
nrf_adc_config_reference_t reference; /**< ADC reference. */
+ nrf_adc_config_input_t input; /**< ADC input selection. */
+ nrf_adc_config_extref_t extref; /**< ADC external reference selection. */
} nrf_adc_config_t;
/**@brief Analog-to-digital value type. */
-typedef int16_t nrf_adc_value_t;
-
-/** Default ADC configuration. */
-#define NRF_ADC_CONFIG_DEFAULT { NRF_ADC_CONFIG_RES_10BIT, \
- NRF_ADC_CONFIG_SCALING_INPUT_ONE_THIRD, \
- NRF_ADC_CONFIG_REF_VBG }
-
-/**
- * @brief Function for configuring ADC.
- *
- * This function powers on the analog-to-digital converter and configures it.
- * After the configuration, the ADC is in DISABLE state and must be
- * enabled before using it.
- *
- * @param[in] config Configuration parameters.
- */
-void nrf_adc_configure(nrf_adc_config_t * config);
-
-/**
- * @brief Blocking function for executing a single ADC conversion.
- *
- * This function selects the desired input, starts a single conversion,
- * waits for it to finish, and returns the result.
- * After the input is selected, the analog-to-digital converter
- * is left in STOP state.
- * The function does not check if the ADC is initialized and powered.
- *
- * @param[in] input Input to be selected.
- *
- * @return Conversion result.
- */
-int32_t nrf_adc_convert_single(nrf_adc_config_input_t input);
+typedef uint16_t nrf_adc_value_t;
/**
- * @brief Function for selecting ADC input.
- *
- * This function selects the active input of ADC. Ensure that
- * the ADC is powered on and in IDLE state before calling this function.
- *
- * @param[in] input Input to be selected.
- */
-__STATIC_INLINE void nrf_adc_input_select(nrf_adc_config_input_t input)
-{
- NRF_ADC->CONFIG =
- ((uint32_t)input << ADC_CONFIG_PSEL_Pos) | (NRF_ADC->CONFIG & ~ADC_CONFIG_PSEL_Msk);
-
- if (input != NRF_ADC_CONFIG_INPUT_DISABLED)
- {
- NRF_ADC->ENABLE = ADC_ENABLE_ENABLE_Enabled << ADC_ENABLE_ENABLE_Pos;
- }
- else
- {
- NRF_ADC->ENABLE = ADC_ENABLE_ENABLE_Disabled << ADC_ENABLE_ENABLE_Pos;
- }
-}
-
-
-/**
- * @brief Function for retrieving the ADC conversion result.
- *
- * This function retrieves and returns the last analog-to-digital conversion result.
- *
- * @return Last conversion result.
- */
-__STATIC_INLINE int32_t nrf_adc_result_get(void)
-{
- return (int32_t)NRF_ADC->RESULT;
-}
-
-
-/**
- * @brief Function for checking whether the ADC is busy.
- *
- * This function checks whether the analog-to-digital converter is busy with a conversion.
- *
- * @retval true If the ADC is busy.
- * @retval false If the ADC is not busy.
- */
-__STATIC_INLINE bool nrf_adc_is_busy(void)
-{
- return ( (NRF_ADC->BUSY & ADC_BUSY_BUSY_Msk) == ADC_BUSY_BUSY_Msk);
-}
-
-/**
- * @brief Function for getting the ADC's enabled interrupts.
- *
- * @param[in] mask Mask of interrupts to check.
- *
- * @return State of the interrupts selected by the mask.
+ * @brief Function for activating a specific ADC task.
*
- * @sa nrf_adc_int_enable()
- * @sa nrf_adc_int_disable()
+ * @param[in] task Task to activate.
*/
-__STATIC_INLINE uint32_t nrf_adc_int_get(uint32_t mask)
-{
- return (NRF_ADC->INTENSET & mask); // when read this register will return the value of INTEN.
-}
-
+__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task);
/**
- * @brief Function for starting conversion.
+ * @brief Function for getting the address of an ADC task register.
*
- * @sa nrf_adc_stop()
+ * @param[in] task ADC task.
*
+ * @return Address of the specified ADC task.
*/
-__STATIC_INLINE void nrf_adc_start(void)
-{
- NRF_ADC->TASKS_START = 1;
-}
-
+__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t task);
/**
- * @brief Function for stopping conversion.
- *
- * If the analog-to-digital converter is in inactive state, power consumption is reduced.
+ * @brief Function for checking the state of an ADC event.
*
- * @sa nrf_adc_start()
- *
- */
-__STATIC_INLINE void nrf_adc_stop(void)
-{
- NRF_ADC->TASKS_STOP = 1;
-}
-
-
-/**
- * @brief Function for checking if the requested ADC conversion has ended.
+ * @param[in] event Event to check.
*
- * @retval true If the task has finished.
- * @retval false If the task is still running.
- */
-__STATIC_INLINE bool nrf_adc_conversion_finished(void)
-{
- return ((bool)NRF_ADC->EVENTS_END);
-}
-
-/**
- * @brief Function for clearing the conversion END event.
+ * @retval true If the event is set.
+ * @retval false If the event is not set.
*/
-__STATIC_INLINE void nrf_adc_conversion_event_clean(void)
-{
- NRF_ADC->EVENTS_END = 0;
-}
+__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event);
/**
- * @brief Function for getting the address of an ADC task register.
- *
- * @param[in] adc_task ADC task.
+ * @brief Function for clearing an ADC event.
*
- * @return Address of the specified ADC task.
+ * @param[in] event Event to clear.
*/
-__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t adc_task);
+__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event);
/**
* @brief Function for getting the address of a specific ADC event register.
@@ -289,101 +180,103 @@ __STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t adc_task);
__STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event);
/**
- * @brief Function for setting the CONFIG register in ADC.
+ * @brief Function for enabling the specified interrupts.
*
- * @param[in] configuration Value to be written to the CONFIG register.
+ * @param[in] int_mask Interrupts to enable.
*/
-__STATIC_INLINE void nrf_adc_config_set(uint32_t configuration);
+__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask);
/**
- * @brief Function for clearing an ADC event.
+ * @brief Function for disabling the specified interrupts.
*
- * @param[in] event Event to clear.
+ * @param[in] int_mask Interrupts to disable.
*/
-__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event);
+__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask);
/**
- * @brief Function for checking state of an ADC event.
+ * @brief Function for retrieving the state of the specified ADC interrupts.
*
- * @param[in] event Event to check.
+ * @param[in] int_mask Interrupts to check.
*
- * @retval true If the event is set.
- * @retval false If the event is not set.
+ * @retval true If all specified interrupts are enabled.
+ * @retval false If at least one of the given interrupts is not enabled.
*/
-__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event);
+__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t int_mask);
/**
- * @brief Function for enabling specified interrupts.
+ * @brief Function for checking whether the ADC is busy.
*
- * @param[in] int_mask Interrupts to enable.
+ * This function checks whether the ADC converter is busy with a conversion.
+ *
+ * @retval true If the ADC is busy.
+ * @retval false If the ADC is not busy.
*/
-__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask);
+__STATIC_INLINE bool nrf_adc_busy_check(void);
/**
- * @brief Function for disabling specified interrupts.
+ * @brief Function for enabling the ADC.
*
- * @param[in] int_mask Interrupts to disable.
*/
-__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask);
+__STATIC_INLINE void nrf_adc_enable(void);
/**
- * @brief Function for retrieving the state of a given interrupt.
- *
- * @param[in] int_mask Interrupt to check.
+ * @brief Function for disabling the ADC.
*
- * @retval true If the interrupt is enabled.
- * @retval false If the interrupt is not enabled.
*/
-__STATIC_INLINE bool nrf_adc_int_enable_check(nrf_adc_int_mask_t int_mask);
+__STATIC_INLINE void nrf_adc_disable(void);
/**
- * @brief Function for activating a specific ADC task.
+ * @brief Function for checking if the ADC is enabled.
*
- * @param[in] task Task to activate.
+ * @retval true If the ADC is enabled.
+ * @retval false If the ADC is not enabled.
*/
-__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task);
+__STATIC_INLINE bool nrf_adc_enable_check(void);
/**
- * @brief Function for enabling ADC.
+ * @brief Function for retrieving the ADC conversion result.
+ *
+ * This function retrieves and returns the last analog-to-digital conversion result.
*
+ * @return Last conversion result.
*/
-__STATIC_INLINE void nrf_adc_enable(void);
+__STATIC_INLINE nrf_adc_value_t nrf_adc_result_get(void);
/**
- * @brief Function for disabling ADC.
+ * @brief Function for initializing the ADC.
*
+ * This function writes data to ADC's CONFIG register. After the configuration,
+ * the ADC is in DISABLE state and must be enabled before using it.
+ *
+ * @param[in] p_config Configuration parameters.
*/
-__STATIC_INLINE void nrf_adc_disable(void);
+__STATIC_INLINE void nrf_adc_init(nrf_adc_config_t const * p_config);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
-__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t adc_task)
+__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task)
{
- return (uint32_t)((uint8_t *)NRF_ADC + adc_task);
+ *((volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)task)) = 0x1UL;
}
-__STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event)
+__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t adc_task)
{
- return (uint32_t)((uint8_t *)NRF_ADC + adc_event);
+ return (uint32_t)((uint8_t *)NRF_ADC + (uint32_t)adc_task);
}
-__STATIC_INLINE void nrf_adc_config_set(uint32_t configuration)
+__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event)
{
- NRF_ADC->CONFIG = configuration;
+ return (bool)*(volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)event);
}
__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event)
{
*((volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)event)) = 0x0UL;
-#if __CORTEX_M == 0x04
- volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)event));
- (void)dummy;
-#endif
}
-__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event)
+__STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event)
{
- return (bool)*(volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)event);
+ return (uint32_t)((uint8_t *)NRF_ADC + (uint32_t)adc_event);
}
__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask)
@@ -396,28 +289,48 @@ __STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask)
NRF_ADC->INTENCLR = int_mask;
}
-__STATIC_INLINE bool nrf_adc_int_enable_check(nrf_adc_int_mask_t int_mask)
+__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t int_mask)
{
return (bool)(NRF_ADC->INTENSET & int_mask);
}
-__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task)
+__STATIC_INLINE bool nrf_adc_busy_check(void)
{
- *((volatile uint32_t *)((uint8_t *)NRF_ADC + (uint32_t)task)) = 0x1UL;
+ return ((NRF_ADC->BUSY & ADC_BUSY_BUSY_Msk) == (ADC_BUSY_BUSY_Busy << ADC_BUSY_BUSY_Pos));
}
__STATIC_INLINE void nrf_adc_enable(void)
{
- NRF_ADC->ENABLE = 1;
+ NRF_ADC->ENABLE = (ADC_ENABLE_ENABLE_Enabled << ADC_ENABLE_ENABLE_Pos);
}
__STATIC_INLINE void nrf_adc_disable(void)
{
- NRF_ADC->ENABLE = 0;
+ NRF_ADC->ENABLE = (ADC_ENABLE_ENABLE_Disabled << ADC_ENABLE_ENABLE_Pos);
+}
+
+__STATIC_INLINE bool nrf_adc_enable_check(void)
+{
+ return (NRF_ADC->ENABLE == (ADC_ENABLE_ENABLE_Enabled << ADC_ENABLE_ENABLE_Pos));
}
-#endif
-/** @} */
+__STATIC_INLINE nrf_adc_value_t nrf_adc_result_get(void)
+{
+ return (nrf_adc_value_t)NRF_ADC->RESULT;
+}
+
+__STATIC_INLINE void nrf_adc_init(nrf_adc_config_t const * p_config)
+{
+ NRF_ADC->CONFIG =
+ ((p_config->resolution << ADC_CONFIG_RES_Pos) & ADC_CONFIG_RES_Msk)
+ |((p_config->scaling << ADC_CONFIG_INPSEL_Pos) & ADC_CONFIG_INPSEL_Msk)
+ |((p_config->reference << ADC_CONFIG_REFSEL_Pos) & ADC_CONFIG_REFSEL_Msk)
+ |((p_config->input << ADC_CONFIG_PSEL_Pos) & ADC_CONFIG_PSEL_Msk)
+ |((p_config->extref << ADC_CONFIG_EXTREFSEL_Pos) & ADC_CONFIG_EXTREFSEL_Msk);
+}
+
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+/** @} */
#ifdef __cplusplus
}
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_clock.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_clock.h
index 17ccb09159..3140f445c2 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_clock.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_clock.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_comp.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_comp.h
index a48261a82b..3c75be6e5d 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_comp.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_comp.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ecb.c b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ecb.c
index 7745af61ca..9458f21e69 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ecb.c
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ecb.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -32,7 +32,7 @@
//lint -e438
#include <nrfx.h>
-#include <nrf_ecb.h>
+#include "nrf_ecb.h"
#include <string.h>
static uint8_t ecb_data[48]; ///< ECB data structure for RNG peripheral to access.
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ecb.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ecb.h
index 13601fd73f..c0d1b4df30 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ecb.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ecb.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_egu.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_egu.h
index 6d76a19e17..dc6709f46b 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_egu.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_egu.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -130,6 +130,126 @@ typedef enum
*
* @returns number of available channels.
*/
+__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx);
+
+/**
+ * @brief Function for triggering a specific EGU task.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param egu_task EGU task.
+ */
+__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task);
+
+/**
+ * @brief Function for returning the address of a specific EGU task register.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param egu_task EGU task.
+ */
+__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
+ nrf_egu_task_t egu_task);
+
+/**
+ * @brief Function for returning the address of a specific EGU TRIGGER task register.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param channel Channel number.
+ */
+__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
+ uint8_t channel);
+
+/**
+ * @brief Function for returning the specific EGU TRIGGER task.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param channel Channel number.
+ */
+__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
+
+/**
+ * @brief Function for returning the state of a specific EGU event.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param egu_event EGU event to check.
+ */
+__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
+ nrf_egu_event_t egu_event);
+
+/**
+ * @brief Function for clearing a specific EGU event.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param egu_event EGU event to clear.
+ */
+__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
+ nrf_egu_event_t egu_event);
+
+/**
+ * @brief Function for returning the address of a specific EGU event register.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param egu_event EGU event.
+ */
+__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
+ nrf_egu_event_t egu_event);
+
+/**
+ * @brief Function for returning the address of a specific EGU TRIGGERED event register.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param channel Channel number.
+ */
+__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
+ uint8_t channel);
+
+/**
+ * @brief Function for returning the specific EGU TRIGGERED event.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param channel Channel number.
+ */
+__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
+ uint8_t channel);
+
+/**
+ * @brief Function for enabling one or more specific EGU interrupts.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param egu_int_mask Interrupts to enable.
+ */
+__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
+
+/**
+ * @brief Function for retrieving the state of one or more EGU interrupts.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param egu_int_mask Interrupts to check.
+ *
+ * @retval true If all of the specified interrupts are enabled.
+ * @retval false If at least one of the specified interrupts is disabled.
+ */
+__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
+
+/**
+ * @brief Function for disabling one or more specific EGU interrupts.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param egu_int_mask Interrupts to disable.
+ */
+__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
+
+/**
+ * @brief Function for retrieving one or more specific EGU interrupts.
+ *
+ * @param NRF_EGUx EGU instance.
+ * @param channel Channel number.
+ *
+ * @returns EGU interrupt mask.
+ */
+__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx)
{
if (NRF_EGUx == NRF_EGU0){
@@ -155,25 +275,12 @@ __STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx)
return 0;
}
-/**
- * @brief Function for triggering a specific EGU task.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_task EGU task.
- */
__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task)
{
NRFX_ASSERT(NRF_EGUx);
*((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL;
}
-
-/**
- * @brief Function for returning the address of a specific EGU task register.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_task EGU task.
- */
__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
nrf_egu_task_t egu_task)
{
@@ -181,28 +288,14 @@ __STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task);
}
-
-/**
- * @brief Function for returning the address of a specific EGU TRIGGER task register.
- *
- * @param NRF_EGUx EGU instance.
- * @param channel Channel number.
- */
__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
- uint8_t channel)
+ uint8_t channel)
{
NRFX_ASSERT(NRF_EGUx);
NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
return (uint32_t*)&NRF_EGUx->TASKS_TRIGGER[channel];
}
-
-/**
- * @brief Function for returning the specific EGU TRIGGER task.
- *
- * @param NRF_EGUx EGU instance.
- * @param channel Channel number.
- */
__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
{
NRFX_ASSERT(NRF_EGUx);
@@ -210,13 +303,6 @@ __STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx,
return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t)));
}
-
-/**
- * @brief Function for returning the state of a specific EGU event.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_event EGU event to check.
- */
__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event)
{
@@ -224,13 +310,6 @@ __STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
return (bool)*(volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
}
-
-/**
- * @brief Function for clearing a specific EGU event.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_event EGU event to clear.
- */
__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event)
{
@@ -242,13 +321,6 @@ __STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
#endif
}
-
-/**
- * @brief Function for returning the address of a specific EGU event register.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_event EGU event.
- */
__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event)
{
@@ -256,28 +328,14 @@ __STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
}
-
-/**
- * @brief Function for returning the address of a specific EGU TRIGGERED event register.
- *
- * @param NRF_EGUx EGU instance.
- * @param channel Channel number.
- */
__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
- uint8_t channel)
+ uint8_t channel)
{
NRFX_ASSERT(NRF_EGUx);
NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
return (uint32_t*)&NRF_EGUx->EVENTS_TRIGGERED[channel];
}
-
-/**
- * @brief Function for returning the specific EGU TRIGGERED event.
- *
- * @param NRF_EGUx EGU instance.
- * @param channel Channel number.
- */
__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
uint8_t channel)
{
@@ -286,56 +344,24 @@ __STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_E
return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t)));
}
-
-/**
- * @brief Function for enabling one or more specific EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to enable.
- */
__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
{
NRFX_ASSERT(NRF_EGUx);
NRF_EGUx->INTENSET = egu_int_mask;
}
-
-/**
- * @brief Function for retrieving the state of one or more EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to check.
- *
- * @retval true If all of the specified interrupts are enabled.
- * @retval false If at least one of the specified interrupts is disabled.
- */
__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
{
NRFX_ASSERT(NRF_EGUx);
return (bool)(NRF_EGUx->INTENSET & egu_int_mask);
}
-
-/**
- * @brief Function for disabling one or more specific EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param egu_int_mask Interrupts to disable.
- */
__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
{
NRFX_ASSERT(NRF_EGUx);
NRF_EGUx->INTENCLR = egu_int_mask;
}
-/**
- * @brief Function for retrieving one or more specific EGU interrupts.
- *
- * @param NRF_EGUx EGU instance.
- * @param channel Channel number.
- *
- * @returns EGU interrupt mask.
- */
__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
{
NRFX_ASSERT(NRF_EGUx);
@@ -343,6 +369,8 @@ __STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint
return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel));
}
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
/** @} */
#ifdef __cplusplus
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_gpio.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_gpio.h
index e96a704fa2..94544edce7 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_gpio.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_gpio.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -59,7 +59,7 @@ extern "C" {
/**
* @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions.
*/
-#define NRF_GPIO_PIN_MAP(port, pin) ((port << 5) | (pin & 0x1F))
+#define NRF_GPIO_PIN_MAP(port, pin) (((port) << 5) | ((pin) & 0x1F))
/**
* @brief Pin direction definitions.
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_gpiote.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_gpiote.h
index a25d3091e1..0e44941e48 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_gpiote.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_gpiote.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_i2s.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_i2s.h
index 23103520e4..7d77a4d9ef 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_i2s.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_i2s.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_lpcomp.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_lpcomp.h
index 556c2c4e42..c1ab7f77fa 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_lpcomp.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_lpcomp.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_nvmc.c b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_nvmc.c
index f273ef1fb6..6bb66db6cb 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_nvmc.c
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_nvmc.c
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -34,7 +34,7 @@
*/
#include <nrfx.h>
-#include <nrf_nvmc.h>
+#include "nrf_nvmc.h"
static inline void wait_for_flash_ready(void)
{
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_nvmc.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_nvmc.h
index 26a03c4a18..afc928acc8 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_nvmc.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_nvmc.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_pdm.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_pdm.h
index 32d0786c09..39344f9e08 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_pdm.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_pdm.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_power.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_power.h
index 1fb94c1c50..14fd9c1e89 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_power.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_power.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ppi.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ppi.h
index 484b29246b..96d9f06126 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ppi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_ppi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -158,11 +158,7 @@ typedef enum
* @param[in] channel Channel to enable.
*
* */
-__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel)
-{
- NRF_PPI->CHENSET = PPI_CHENSET_CH0_Set << ((uint32_t) channel);
-}
-
+__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel);
/**
* @brief Function for disabling a given PPI channel.
@@ -171,11 +167,7 @@ __STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel)
*
* @param[in] channel Channel to disable.
*/
-__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel)
-{
- NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Clear << ((uint32_t) channel);
-}
-
+__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel);
/**
* @brief Function for checking if a given PPI channel is enabled.
@@ -188,36 +180,19 @@ __STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel)
* @retval NRF_PPI_CHANNEL_DISABLED If the channel is not enabled.
*
*/
-__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel)
-{
- if (NRF_PPI->CHEN & (PPI_CHEN_CH0_Msk << ((uint32_t) channel)))
- {
- return NRF_PPI_CHANNEL_ENABLED;
- }
- else
- {
- return NRF_PPI_CHANNEL_DISABLED;
- }
-}
-
+__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel);
/**
* @brief Function for disabling all PPI channels.
*/
-__STATIC_INLINE void nrf_ppi_channel_disable_all(void)
-{
- NRF_PPI->CHENCLR = ((uint32_t)0xFFFFFFFFuL);
-}
+__STATIC_INLINE void nrf_ppi_channel_disable_all(void);
/**
* @brief Function for disabling multiple PPI channels.
*
* @param[in] mask Channel mask.
*/
-__STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask)
-{
- NRF_PPI->CHENCLR = mask;
-}
+__STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask);
/**
* @brief Function for setting up event and task endpoints for a given PPI channel.
@@ -230,11 +205,7 @@ __STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask)
*/
__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
uint32_t eep,
- uint32_t tep)
-{
- NRF_PPI->CH[(uint32_t) channel].EEP = eep;
- NRF_PPI->CH[(uint32_t) channel].TEP = tep;
-}
+ uint32_t tep);
#if defined(PPI_FEATURE_FORKS_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@@ -245,10 +216,7 @@ __STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
* @param[in] channel Channel to which the given fork endpoint is assigned.
*/
__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
- uint32_t fork_tep)
-{
- NRF_PPI->FORK[(uint32_t) channel].TEP = fork_tep;
-}
+ uint32_t fork_tep);
/**
* @brief Function for setting up event and task endpoints for a given PPI channel and fork.
@@ -264,11 +232,7 @@ __STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel,
uint32_t eep,
uint32_t tep,
- uint32_t fork_tep)
-{
- nrf_ppi_channel_endpoint_setup(channel, eep, tep);
- nrf_ppi_fork_endpoint_setup(channel, fork_tep);
-}
+ uint32_t fork_tep);
#endif
/**
@@ -282,11 +246,7 @@ __STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t c
*
*/
__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
- nrf_ppi_channel_group_t channel_group)
-{
- NRF_PPI->CHG[(uint32_t) channel_group] =
- NRF_PPI->CHG[(uint32_t) channel_group] | (PPI_CHG_CH0_Included << ((uint32_t) channel));
-}
+ nrf_ppi_channel_group_t channel_group);
/**
* @brief Function for including multiple PPI channels in a channel group.
@@ -299,12 +259,7 @@ __STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t ch
*
*/
__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask,
- nrf_ppi_channel_group_t channel_group)
-{
- NRF_PPI->CHG[(uint32_t) channel_group] =
- NRF_PPI->CHG[(uint32_t) channel_group] | (channel_mask);
-}
-
+ nrf_ppi_channel_group_t channel_group);
/**
* @brief Function for removing a PPI channel from a channel group.
@@ -316,11 +271,7 @@ __STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t c
* @param[in] channel_group Channel group.
*/
__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
- nrf_ppi_channel_group_t channel_group)
-{
- NRF_PPI->CHG[(uint32_t) channel_group] =
- NRF_PPI->CHG[(uint32_t) channel_group] & ~(PPI_CHG_CH0_Included << ((uint32_t) channel));
-}
+ nrf_ppi_channel_group_t channel_group);
/**
* @brief Function for removing multiple PPI channels from a channel group.
@@ -332,12 +283,7 @@ __STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t c
* @param[in] channel_group Channel group.
*/
__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask,
- nrf_ppi_channel_group_t channel_group)
-{
- NRF_PPI->CHG[(uint32_t) channel_group] =
- NRF_PPI->CHG[(uint32_t) channel_group] & ~(channel_mask);
-}
-
+ nrf_ppi_channel_group_t channel_group);
/**
* @brief Function for removing all PPI channels from a channel group.
@@ -345,11 +291,7 @@ __STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t
* @param[in] group Channel group.
*
*/
-__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group)
-{
- NRF_PPI->CHG[(uint32_t) group] = 0;
-}
-
+__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group);
/**
* @brief Function for enabling a channel group.
@@ -357,11 +299,7 @@ __STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group)
* @param[in] group Channel group.
*
*/
-__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group)
-{
- NRF_PPI->TASKS_CHG[(uint32_t) group].EN = NRF_PPI_TASK_SET;
-}
-
+__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group);
/**
* @brief Function for disabling a channel group.
@@ -369,53 +307,162 @@ __STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group)
* @param[in] group Channel group.
*
*/
-__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group)
-{
- NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = NRF_PPI_TASK_SET;
-}
-
+__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group);
/**
* @brief Function for setting a PPI task.
*
* @param[in] ppi_task PPI task to set.
*/
-__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task)
-{
- *((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = NRF_PPI_TASK_SET;
-}
-
+__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task);
/**
* @brief Function for returning the address of a specific PPI task register.
*
* @param[in] ppi_task PPI task.
*/
-__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task)
-{
- return (uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task);
-}
+__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task);
/**
* @brief Function for returning the PPI enable task address of a specific group.
*
* @param[in] group PPI group.
*/
-__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group)
-{
- return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].EN;
-}
+__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group);
/**
* @brief Function for returning the PPI disable task address of a specific group.
*
* @param[in] group PPI group.
*/
+__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group);
+
+
+#ifndef SUPPRESS_INLINE_IMPLEMENTATION
+
+__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel)
+{
+ NRF_PPI->CHENSET = PPI_CHENSET_CH0_Set << ((uint32_t) channel);
+}
+
+__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel)
+{
+ NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Clear << ((uint32_t) channel);
+}
+
+__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel)
+{
+ if (NRF_PPI->CHEN & (PPI_CHEN_CH0_Msk << ((uint32_t) channel)))
+ {
+ return NRF_PPI_CHANNEL_ENABLED;
+ }
+ else
+ {
+ return NRF_PPI_CHANNEL_DISABLED;
+ }
+}
+
+__STATIC_INLINE void nrf_ppi_channel_disable_all(void)
+{
+ NRF_PPI->CHENCLR = ((uint32_t)0xFFFFFFFFuL);
+}
+
+__STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask)
+{
+ NRF_PPI->CHENCLR = mask;
+}
+
+__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
+ uint32_t eep,
+ uint32_t tep)
+{
+ NRF_PPI->CH[(uint32_t) channel].EEP = eep;
+ NRF_PPI->CH[(uint32_t) channel].TEP = tep;
+}
+
+#if defined(PPI_FEATURE_FORKS_PRESENT)
+
+__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
+ uint32_t fork_tep)
+{
+ NRF_PPI->FORK[(uint32_t) channel].TEP = fork_tep;
+}
+
+__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel,
+ uint32_t eep,
+ uint32_t tep,
+ uint32_t fork_tep)
+{
+ nrf_ppi_channel_endpoint_setup(channel, eep, tep);
+ nrf_ppi_fork_endpoint_setup(channel, fork_tep);
+}
+#endif
+
+__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
+ nrf_ppi_channel_group_t channel_group)
+{
+ NRF_PPI->CHG[(uint32_t) channel_group] =
+ NRF_PPI->CHG[(uint32_t) channel_group] | (PPI_CHG_CH0_Included << ((uint32_t) channel));
+}
+
+__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask,
+ nrf_ppi_channel_group_t channel_group)
+{
+ NRF_PPI->CHG[(uint32_t) channel_group] =
+ NRF_PPI->CHG[(uint32_t) channel_group] | (channel_mask);
+}
+
+__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
+ nrf_ppi_channel_group_t channel_group)
+{
+ NRF_PPI->CHG[(uint32_t) channel_group] =
+ NRF_PPI->CHG[(uint32_t) channel_group] & ~(PPI_CHG_CH0_Included << ((uint32_t) channel));
+}
+
+__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask,
+ nrf_ppi_channel_group_t channel_group)
+{
+ NRF_PPI->CHG[(uint32_t) channel_group] =
+ NRF_PPI->CHG[(uint32_t) channel_group] & ~(channel_mask);
+}
+
+__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group)
+{
+ NRF_PPI->CHG[(uint32_t) group] = 0;
+}
+
+__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group)
+{
+ NRF_PPI->TASKS_CHG[(uint32_t) group].EN = NRF_PPI_TASK_SET;
+}
+
+__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group)
+{
+ NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = NRF_PPI_TASK_SET;
+}
+
+__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task)
+{
+ *((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = NRF_PPI_TASK_SET;
+}
+
+__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task)
+{
+ return (uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task);
+}
+
+__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group)
+{
+ return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].EN;
+}
+
__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group)
{
return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].DIS;
}
+#endif // SUPPRESS_INLINE_IMPLEMENTATION
+
/** @} */
#ifdef __cplusplus
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_pwm.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_pwm.h
index 773496b03e..88d87ea6e0 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_pwm.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_pwm.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_qdec.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_qdec.h
index 1ebc47c8ae..de81380628 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_qdec.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_qdec.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_qspi.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_qspi.h
index 08292ff4b8..d0767d7252 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_qspi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_qspi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -68,6 +68,7 @@ typedef enum
NRF_QSPI_TASK_READSTART = offsetof(NRF_QSPI_Type, TASKS_READSTART), /**< Start transfer from external flash memory to internal RAM. */
NRF_QSPI_TASK_WRITESTART = offsetof(NRF_QSPI_Type, TASKS_WRITESTART), /**< Start transfer from internal RAM to external flash memory. */
NRF_QSPI_TASK_ERASESTART = offsetof(NRF_QSPI_Type, TASKS_ERASESTART), /**< Start external flash memory erase operation. */
+ NRF_QSPI_TASK_DEACTIVATE = offsetof(NRF_QSPI_Type, TASKS_DEACTIVATE), /**< Deactivate the QSPI interface. */
/*lint -restore*/
} nrf_qspi_task_t;
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_rng.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_rng.h
index 90ccff798c..2d932ba498 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_rng.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_rng.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_rtc.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_rtc.h
index 9ebbe69d4a..cb1218c852 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_rtc.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_rtc.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_saadc.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_saadc.h
index 2e31573f19..b72f320812 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_saadc.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_saadc.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spi.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spi.h
index 6bcea30c55..e672d5420c 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spim.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spim.h
index d5cb7a019e..1c93e03021 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spim.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spim.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spis.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spis.h
index 5b10261b75..d44d89affa 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spis.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_spis.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_systick.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_systick.h
index 49a86d3fc1..110c49368d 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_systick.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_systick.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2016 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2016 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_temp.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_temp.h
index b8fa0063dc..3d567953ca 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_temp.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_temp.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2012 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2012 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -67,7 +67,7 @@ static __INLINE void nrf_temp_init(void)
static __INLINE int32_t nrf_temp_read(void)
{
/**@note Workaround for PAN_028 rev2.0A anomaly 28 - TEMP: Negative measured values are not represented correctly */
- return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP);
+ return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (int32_t)(NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP);
}
/** @} */
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_timer.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_timer.h
index 4b0b242d6c..2cf38279a8 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_timer.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_timer.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2014 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2014 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twi.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twi.h
index 86be1e9aa2..90a6217860 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twi.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twi.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twim.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twim.h
index 3727d4f238..a67f0bb20e 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twim.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twim.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twis.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twis.h
index 977f2e3a9c..8ca0a28943 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twis.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_twis.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_uart.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_uart.h
index ecd99105f5..863edf7081 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_uart.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_uart.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_uarte.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_uarte.h
index e10280888a..0fbef02c1b 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_uarte.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_uarte.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -54,11 +54,11 @@ extern "C" {
typedef enum
{
/*lint -save -e30*/
- NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX),///< Start UART receiver.
- NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver.
- NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX),///< Start UART transmitter.
- NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter.
- NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer.
+ NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX), ///< Start UART receiver.
+ NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver.
+ NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX), ///< Start UART transmitter.
+ NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter.
+ NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer.
/*lint -restore*/
} nrf_uarte_task_t;
@@ -69,15 +69,17 @@ typedef enum
typedef enum
{
/*lint -save -e30*/
- NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated.
- NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated.
- NRF_UARTE_EVENT_ENDRX = offsetof(NRF_UARTE_Type, EVENTS_ENDRX), ///< Receive buffer is filled up.
- NRF_UARTE_EVENT_ENDTX = offsetof(NRF_UARTE_Type, EVENTS_ENDTX), ///< Last TX byte transmitted.
- NRF_UARTE_EVENT_ERROR = offsetof(NRF_UARTE_Type, EVENTS_ERROR), ///< Error detected.
- NRF_UARTE_EVENT_RXTO = offsetof(NRF_UARTE_Type, EVENTS_RXTO), ///< Receiver timeout.
- NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED),///< Receiver has started.
- NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED),///< Transmitter has started.
- NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped.
+ NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated.
+ NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated.
+ NRF_UARTE_EVENT_RXDRDY = offsetof(NRF_UARTE_Type, EVENTS_RXDRDY), ///< Data received in RXD (but potentially not yet transferred to Data RAM).
+ NRF_UARTE_EVENT_ENDRX = offsetof(NRF_UARTE_Type, EVENTS_ENDRX), ///< Receive buffer is filled up.
+ NRF_UARTE_EVENT_TXDDY = offsetof(NRF_UARTE_Type, EVENTS_TXDRDY), ///< Data sent from TXD.
+ NRF_UARTE_EVENT_ENDTX = offsetof(NRF_UARTE_Type, EVENTS_ENDTX), ///< Last TX byte transmitted.
+ NRF_UARTE_EVENT_ERROR = offsetof(NRF_UARTE_Type, EVENTS_ERROR), ///< Error detected.
+ NRF_UARTE_EVENT_RXTO = offsetof(NRF_UARTE_Type, EVENTS_RXTO), ///< Receiver timeout.
+ NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED), ///< Receiver has started.
+ NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED), ///< Transmitter has started.
+ NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped.
/*lint -restore*/
} nrf_uarte_event_t;
@@ -86,8 +88,8 @@ typedef enum
*/
typedef enum
{
- NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk,///< Shortcut between ENDRX event and STARTRX task.
- NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk, ///< Shortcut between ENDRX event and STOPRX task.
+ NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk, ///< Shortcut between ENDRX event and STARTRX task.
+ NRF_UARTE_SHORT_ENDRX_STOPRX = UARTE_SHORTS_ENDRX_STOPRX_Msk ///< Shortcut between ENDRX event and STOPRX task.
} nrf_uarte_short_t;
@@ -97,15 +99,17 @@ typedef enum
*/
typedef enum
{
- NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event.
- NRF_UARTE_INT_NCTSRX_MASK = UARTE_INTENSET_NCTS_Msk, ///< Interrupt on NCTS event.
- NRF_UARTE_INT_ENDRX_MASK = UARTE_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event.
- NRF_UARTE_INT_ENDTX_MASK = UARTE_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event.
- NRF_UARTE_INT_ERROR_MASK = UARTE_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
- NRF_UARTE_INT_RXTO_MASK = UARTE_INTENSET_RXTO_Msk, ///< Interrupt on RXTO event.
- NRF_UARTE_INT_RXSTARTED_MASK = UARTE_INTENSET_RXSTARTED_Msk,///< Interrupt on RXSTARTED event.
- NRF_UARTE_INT_TXSTARTED_MASK = UARTE_INTENSET_TXSTARTED_Msk,///< Interrupt on TXSTARTED event.
- NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event.
+ NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event.
+ NRF_UARTE_INT_NCTS_MASK = UARTE_INTENSET_NCTS_Msk, ///< Interrupt on NCTS event.
+ NRF_UARTE_INT_RXDRDY_MASK = UARTE_INTENSET_RXDRDY_Msk, ///< Interrupt on RXDRDY event.
+ NRF_UARTE_INT_ENDRX_MASK = UARTE_INTENSET_ENDRX_Msk, ///< Interrupt on ENDRX event.
+ NRF_UARTE_INT_TXDRDY_MASK = UARTE_INTENSET_TXDRDY_Msk, ///< Interrupt on TXDRDY event.
+ NRF_UARTE_INT_ENDTX_MASK = UARTE_INTENSET_ENDTX_Msk, ///< Interrupt on ENDTX event.
+ NRF_UARTE_INT_ERROR_MASK = UARTE_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
+ NRF_UARTE_INT_RXTO_MASK = UARTE_INTENSET_RXTO_Msk, ///< Interrupt on RXTO event.
+ NRF_UARTE_INT_RXSTARTED_MASK = UARTE_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event.
+ NRF_UARTE_INT_TXSTARTED_MASK = UARTE_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event.
+ NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event.
} nrf_uarte_int_mask_t;
/**
@@ -131,7 +135,7 @@ typedef enum
NRF_UARTE_BAUDRATE_250000 = UARTE_BAUDRATE_BAUDRATE_Baud250000, ///< 250000 baud.
NRF_UARTE_BAUDRATE_460800 = UARTE_BAUDRATE_BAUDRATE_Baud460800, ///< 460800 baud.
NRF_UARTE_BAUDRATE_921600 = UARTE_BAUDRATE_BAUDRATE_Baud921600, ///< 921600 baud.
- NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M, ///< 1000000 baud.
+ NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M ///< 1000000 baud.
} nrf_uarte_baudrate_t;
/**
@@ -140,10 +144,10 @@ typedef enum
*/
typedef enum
{
- NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error.
- NRF_UARTE_ERROR_PARITY_MASK = UARTE_ERRORSRC_PARITY_Msk, ///< Parity error.
- NRF_UARTE_ERROR_FRAMING_MASK = UARTE_ERRORSRC_FRAMING_Msk, ///< Framing error.
- NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk, ///< Break error.
+ NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error.
+ NRF_UARTE_ERROR_PARITY_MASK = UARTE_ERRORSRC_PARITY_Msk, ///< Parity error.
+ NRF_UARTE_ERROR_FRAMING_MASK = UARTE_ERRORSRC_FRAMING_Msk, ///< Framing error.
+ NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk ///< Break error.
} nrf_uarte_error_mask_t;
/**
@@ -153,7 +157,7 @@ typedef enum
typedef enum
{
NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded.
- NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos, ///< Parity included.
+ NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos ///< Parity included.
} nrf_uarte_parity_t;
/**
@@ -163,7 +167,7 @@ typedef enum
typedef enum
{
NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled.
- NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control enabled.
+ NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos ///< HW flow control enabled.
} nrf_uarte_hwfc_t;
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_usbd.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_usbd.h
index fcdc658562..43fc297105 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_usbd.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_usbd.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
@@ -109,7 +109,6 @@ typedef enum
NRF_USBD_EVENT_USBEVENT = offsetof(NRF_USBD_Type, EVENTS_USBEVENT ), /**< An event or an error not covered by specific events has occurred, check EVENTCAUSE register to find the cause */
NRF_USBD_EVENT_EP0SETUP = offsetof(NRF_USBD_Type, EVENTS_EP0SETUP ), /**< A valid SETUP token has been received (and acknowledged) on the control endpoint */
NRF_USBD_EVENT_DATAEP = offsetof(NRF_USBD_Type, EVENTS_EPDATA ), /**< A data transfer has occurred on a data endpoint, indicated by the EPDATASTATUS register */
- NRF_USBD_EVENT_ACCESSFAULT = offsetof(NRF_USBD_Type, EVENTS_ACCESSFAULT), /**< >Access to an unavailable USB register has been attempted (software or EasyDMA) */
/*lint -restore*/
}nrf_usbd_event_t;
@@ -155,7 +154,6 @@ typedef enum
NRF_USBD_INT_USBEVENT_MASK = USBD_INTEN_USBEVENT_Msk , /**< Enable or disable interrupt for USBEVENT event */
NRF_USBD_INT_EP0SETUP_MASK = USBD_INTEN_EP0SETUP_Msk , /**< Enable or disable interrupt for EP0SETUP event */
NRF_USBD_INT_DATAEP_MASK = USBD_INTEN_EPDATA_Msk , /**< Enable or disable interrupt for EPDATA event */
- NRF_USBD_INT_ACCESSFAULT_MASK = USBD_INTEN_ACCESSFAULT_Msk, /**< Enable or disable interrupt for ACCESSFAULT event */
}nrf_usbd_int_mask_t;
@@ -540,31 +538,6 @@ typedef enum
NRF_USBD_EVENTCAUSE_WUREQ_MASK = (1U << 10) /**< The USBD peripheral has exited Low Power mode */
}nrf_usbd_eventcause_mask_t;
-/**
- * @brief BUSSTATE register bit masks
- */
-typedef enum
-{
- NRF_USBD_BUSSTATE_DM_MASK = USBD_BUSSTATE_DM_Msk, /**< Negative line mask */
- NRF_USBD_BUSSTATE_DP_MASK = USBD_BUSSTATE_DP_Msk, /**< Positive line mask */
- /** Both lines are low */
- NRF_USBD_BUSSTATE_DPDM_LL = (USBD_BUSSTATE_DM_Low << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_Low << USBD_BUSSTATE_DP_Pos),
- /** Positive line is high, negative line is low */
- NRF_USBD_BUSSTATE_DPDM_HL = (USBD_BUSSTATE_DM_Low << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_High << USBD_BUSSTATE_DP_Pos),
- /** Positive line is low, negative line is high */
- NRF_USBD_BUSSTATE_DPDM_LH = (USBD_BUSSTATE_DM_High << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_Low << USBD_BUSSTATE_DP_Pos),
- /** Both lines are high */
- NRF_USBD_BUSSTATE_DPDM_HH = (USBD_BUSSTATE_DM_High << USBD_BUSSTATE_DM_Pos) | (USBD_BUSSTATE_DP_High << USBD_BUSSTATE_DP_Pos),
- /** J state */
- NRF_USBD_BUSSTATE_J = NRF_USBD_BUSSTATE_DPDM_HL,
- /** K state */
- NRF_USBD_BUSSTATE_K = NRF_USBD_BUSSTATE_DPDM_LH,
- /** Single ended 0 */
- NRF_USBD_BUSSTATE_SE0 = NRF_USBD_BUSSTATE_DPDM_LL,
- /** Single ended 1 */
- NRF_USBD_BUSSTATE_SE1 = NRF_USBD_BUSSTATE_DPDM_HH
-}nrf_usbd_busstate_t;
-
/**
* @brief DPDMVALUE register
*/
@@ -678,13 +651,6 @@ __STATIC_INLINE void nrf_usbd_eventcause_clear(uint32_t flags);
*/
__STATIC_INLINE uint32_t nrf_usbd_eventcause_get_and_clear(void);
-/**
- * @brief Function for getting BUSSTATE register value
- *
- * @return The value of BUSSTATE register
- */
-__STATIC_INLINE nrf_usbd_busstate_t nrf_usbd_busstate_get(void);
-
/**
* @brief Function for getting HALTEDEPIN register value
*
@@ -1052,11 +1018,6 @@ uint32_t nrf_usbd_eventcause_get_and_clear(void)
return ret;
}
-nrf_usbd_busstate_t nrf_usbd_busstate_get(void)
-{
- return (nrf_usbd_busstate_t)(NRF_USBD->BUSSTATE);
-}
-
uint32_t nrf_usbd_haltedep(uint8_t ep)
{
uint8_t epnr = NRF_USBD_EP_NR_GET(ep);
@@ -1219,8 +1180,8 @@ void nrf_usbd_dpdmvalue_set(nrf_usbd_dpdmvalue_t val)
void nrf_usbd_dtoggle_set(uint8_t ep, nrf_usbd_dtoggle_t op)
{
- ASSERT(NRF_USBD_EP_VALIDATE(ep));
- ASSERT(!NRF_USBD_EPISO_CHECK(ep));
+ NRFX_ASSERT(NRF_USBD_EP_VALIDATE(ep));
+ NRFX_ASSERT(!NRF_USBD_EPISO_CHECK(ep));
NRF_USBD->DTOGGLE = ep | (NRF_USBD_DTOGGLE_NOP << USBD_DTOGGLE_VALUE_Pos);
__DSB();
NRF_USBD->DTOGGLE = ep | (op << USBD_DTOGGLE_VALUE_Pos);
diff --git a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_wdt.h b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_wdt.h
index f85285643a..ab851f2b64 100644
--- a/hw/mcu/nordic/src/ext/nrfx/hal/nrf_wdt.h
+++ b/hw/mcu/nordic/src/ext/nrfx/hal/nrf_wdt.h
@@ -1,5 +1,5 @@
/**
- * Copyright (c) 2015 - 2017, Nordic Semiconductor ASA
+ * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -12,14 +12,14 @@
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ * 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf51.s b/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf51.s
index 668f3cd8c1..8b24d631ae 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf51.s
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf51.s
@@ -1,4 +1,4 @@
-; Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
;
; SPDX-License-Identifier: Apache-2.0
;
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52.s b/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52.s
index ac0493b69c..9e06ea998f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52.s
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52.s
@@ -1,4 +1,4 @@
-; Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
;
; SPDX-License-Identifier: Apache-2.0
;
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52810.s b/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52810.s
index 6f9d902e6a..24adada3b2 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52810.s
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52810.s
@@ -1,4 +1,4 @@
-; Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
;
; SPDX-License-Identifier: Apache-2.0
;
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52840.s b/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52840.s
index ff9d60ded8..1c5f17b61b 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52840.s
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/arm_startup_nrf52840.s
@@ -1,4 +1,4 @@
-; Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
;
; SPDX-License-Identifier: Apache-2.0
;
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/compiler_abstraction.h b/hw/mcu/nordic/src/ext/nrfx/mdk/compiler_abstraction.h
index 1b07ffa63f..f636469597 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/compiler_abstraction.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/compiler_abstraction.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf51.S b/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf51.S
index b0dfe6c65a..3322af724b 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf51.S
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf51.S
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
SPDX-License-Identifier: Apache-2.0
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52.S b/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52.S
index cb33d980d9..f523b483d8 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52.S
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52.S
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
SPDX-License-Identifier: Apache-2.0
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52810.S b/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52810.S
index 6a56579806..58250ab68a 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52810.S
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52810.S
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
SPDX-License-Identifier: Apache-2.0
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52840.S b/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52840.S
index ad45d5eede..a8b6e8d6a3 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52840.S
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/gcc_startup_nrf52840.S
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+Copyright (c) 2009-2018 ARM Limited. All rights reserved.
SPDX-License-Identifier: Apache-2.0
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf51.s b/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf51.s
index 95801311b4..bbd662efde 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf51.s
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf51.s
@@ -1,4 +1,4 @@
-; Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
;
; SPDX-License-Identifier: Apache-2.0
;
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52.s b/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52.s
index 75d2ac5790..904c719523 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52.s
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52.s
@@ -1,4 +1,4 @@
-; Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
;
; SPDX-License-Identifier: Apache-2.0
;
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52810.s b/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52810.s
index f43ed94a43..eff0a97855 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52810.s
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52810.s
@@ -1,4 +1,4 @@
-; Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
;
; SPDX-License-Identifier: Apache-2.0
;
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52840.s b/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52840.s
index c5fd37dc0d..c21cbcf29f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52840.s
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/iar_startup_nrf52840.s
@@ -1,4 +1,4 @@
-; Copyright (c) 2009-2017 ARM Limited. All rights reserved.
+; Copyright (c) 2009-2018 ARM Limited. All rights reserved.
;
; SPDX-License-Identifier: Apache-2.0
;
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nRFxxx.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nRFxxx.h
index 2fdcbe39ad..ba7205237f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nRFxxx.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nRFxxx.h
@@ -12,7 +12,7 @@
#ifndef __nRFxxx_h
#define __nRFxxx_h
-#if defined(NRF51) || defined(NRF52) || defined(NRF52832_XXAB) || defined(NRF52840_XXAA) || defined(NRF52810_XXAA)
+#if defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF51) || defined(NRF52) || defined(NRF52832_XXAB) || defined(NRF52840_XXAA)
#include "nrf.h"
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf.h
index 927003f7bf..b2447339ad 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -35,7 +35,7 @@ POSSIBILITY OF SUCH DAMAGE.
/* MDK version */
#define MDK_MAJOR_VERSION 8
-#define MDK_MINOR_VERSION 15
+#define MDK_MINOR_VERSION 16
#define MDK_MICRO_VERSION 0
/* Redefine "old" too-generic name NRF52 to NRF52832_XXAA to keep backwards compatibility. */
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51.h
index b72d9526e7..5652089e10 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51.h
@@ -6,12 +6,12 @@
* nrf51 from Nordic Semiconductor.
*
* @version V522
- * @date 3. October 2017
+ * @date 8. March 2018
*
* @note Generated with SVDConv V2.81d
* from CMSIS SVD File 'nrf51.svd' Version 522,
*
- * @par Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+ * @par Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51.svd b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51.svd
index 5588d6fa6f..ab1e93cd67 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51.svd
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51.svd
@@ -8,7 +8,7 @@
<version>522</version> <!-- Version of this description. It is the run of the automatic generation of SUS. -->
<description>nRF51 reference description for radio MCU with ARM 32-bit Cortex-M0 Microcontroller at 16MHz CPU clock</description>
<licenseText>
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.\n
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
\n
Redistribution and use in source and binary forms, with or without\n
modification, are permitted provided that the following conditions are met:\n
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51422_peripherals.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51422_peripherals.h
index 3804045041..6c9b69246c 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51422_peripherals.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51422_peripherals.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -30,6 +30,7 @@ POSSIBILITY OF SUCH DAMAGE.
*/
+/* This file is deprecated */
#ifndef _NRF51422_PERIPHERALS_H
#define _NRF51422_PERIPHERALS_H
@@ -121,7 +122,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define SPIS_PRESENT
#define SPIS_COUNT 1
-#define SPIS0_EASYDMA_MAXCNT_SIZE 8
+#define SPIS1_EASYDMA_MAXCNT_SIZE 8
/* Two Wire Interface Master */
#define TWI_PRESENT
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51801_peripherals.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51801_peripherals.h
index 854fe97e00..7be6e53dd7 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51801_peripherals.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51801_peripherals.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -30,6 +30,7 @@ POSSIBILITY OF SUCH DAMAGE.
*/
+/* This file is deprecated */
#ifndef _NRF51801_PERIPHERALS_H
#define _NRF51801_PERIPHERALS_H
@@ -121,7 +122,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define SPIS_PRESENT
#define SPIS_COUNT 1
-#define SPIS0_EASYDMA_MAXCNT_SIZE 8
+#define SPIS1_EASYDMA_MAXCNT_SIZE 8
/* Two Wire Interface Master */
#define TWI_PRESENT
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51801_xxab.ld b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51801_xxab.ld
index 38141c3fb8..5406e58939 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51801_xxab.ld
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51801_xxab.ld
@@ -10,4 +10,4 @@ MEMORY
}
-INCLUDE "nrf51_common.ld"
+INCLUDE "nrf_common.ld"
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51802_peripherals.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51802_peripherals.h
index 685c6645ea..182d31fc9d 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51802_peripherals.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51802_peripherals.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -30,6 +30,7 @@ POSSIBILITY OF SUCH DAMAGE.
*/
+/* This file is deprecated */
#ifndef _NRF51802_PERIPHERALS_H
#define _NRF51802_PERIPHERALS_H
@@ -121,7 +122,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define SPIS_PRESENT
#define SPIS_COUNT 1
-#define SPIS0_EASYDMA_MAXCNT_SIZE 8
+#define SPIS1_EASYDMA_MAXCNT_SIZE 8
/* Two Wire Interface Master */
#define TWI_PRESENT
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51822_peripherals.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51822_peripherals.h
index bb267e6e47..2762e17c7a 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51822_peripherals.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51822_peripherals.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -30,6 +30,8 @@ POSSIBILITY OF SUCH DAMAGE.
*/
+
+/* This file is deprecated */
#ifndef _NRF51822_PERIPHERALS_H
#define _NRF51822_PERIPHERALS_H
@@ -121,7 +123,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define SPIS_PRESENT
#define SPIS_COUNT 1
-#define SPIS0_EASYDMA_MAXCNT_SIZE 8
+#define SPIS1_EASYDMA_MAXCNT_SIZE 8
/* Two Wire Interface Master */
#define TWI_PRESENT
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51824_peripherals.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51824_peripherals.h
index 5a7a817f17..5a29c8d1b2 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51824_peripherals.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51824_peripherals.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -30,6 +30,8 @@ POSSIBILITY OF SUCH DAMAGE.
*/
+
+/* This file is deprecated */
#ifndef _NRF51824_PERIPHERALS_H
#define _NRF51824_PERIPHERALS_H
@@ -121,7 +123,7 @@ POSSIBILITY OF SUCH DAMAGE.
#define SPIS_PRESENT
#define SPIS_COUNT 1
-#define SPIS0_EASYDMA_MAXCNT_SIZE 8
+#define SPIS1_EASYDMA_MAXCNT_SIZE 8
/* Two Wire Interface Master */
#define TWI_PRESENT
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_bitfields.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_bitfields.h
index 8f09c9d13e..7a98d12c31 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_bitfields.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_bitfields.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_common.ld b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_common.ld
index c6999cba1c..6f5e4c554c 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_common.ld
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_common.ld
@@ -1,4 +1,6 @@
-/* Linker script for Nordic Semiconductor nRF51 devices
+/* Deprecated linker script for Nordic Semiconductor nRF51 devices
+ * please use nrfx_common.ld. This version exists for backwards
+ * compatibility.
*
* Version: Sourcery G++ 4.5-1
* Support: https://support.codesourcery.com/GNUToolchain/
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_deprecated.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_deprecated.h
index 917cac05ef..19370d4c55 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_deprecated.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_deprecated.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -432,7 +432,11 @@ POSSIBILITY OF SUCH DAMAGE.
#define PPI_CHG3_CH0_Pos PPI_CHG_CH0_Pos
#define PPI_CHG3_CH0_Msk PPI_CHG_CH0_Msk
#define PPI_CHG3_CH0_Excluded PPI_CHG_CH0_Excluded
-#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
+#define PPI_CHG3_CH0_Included PPI_CHG_CH0_Included
+
+/* SPIS */
+/* nRF51 devices do not have an SPIS0, only SPIS1. SPIS0_EASYDMA_MAXCNT_SIZE was therefore renamed. */
+#define SPIS0_EASYDMA_MAXCNT_SIZE SPIS1_EASYDMA_MAXCNT_SIZE
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_peripherals.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_peripherals.h
new file mode 100644
index 0000000000..fd89248332
--- /dev/null
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_peripherals.h
@@ -0,0 +1,155 @@
+/*
+
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+1. Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+2. Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ contributors may be used to endorse or promote products derived from this
+ software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
+
+*/
+
+#ifndef _NRF51_PERIPHERALS_H
+#define _NRF51_PERIPHERALS_H
+
+
+/* Power Peripheral */
+#define POWER_PRESENT
+#define POWER_COUNT 1
+
+#define POWER_FEATURE_RAMON_REGISTERS_PRESENT
+
+/* Software Interrupts */
+#define SWI_PRESENT
+#define SWI_COUNT 6
+
+/* GPIO */
+#define GPIO_PRESENT
+#define GPIO_COUNT 1
+
+#define P0_PIN_NUM 32
+
+/* MPU and BPROT */
+#define BPROT_PRESENT
+
+#define BPROT_REGIONS_SIZE 4096
+#define BPROT_REGIONS_NUM 64
+
+/* Radio */
+#define RADIO_PRESENT
+#define RADIO_COUNT 1
+
+/* Accelerated Address Resolver */
+#define AAR_PRESENT
+#define AAR_COUNT 1
+
+#define AAR_MAX_IRK_NUM 8
+
+/* AES Electronic CodeBook mode encryption */
+#define ECB_PRESENT
+#define ECB_COUNT 1
+
+/* AES CCM mode encryption */
+#define CCM_PRESENT
+#define CCM_COUNT 1
+
+/* Peripheral to Peripheral Interconnect */
+#define PPI_PRESENT
+#define PPI_COUNT 1
+
+#define PPI_CH_NUM 16
+#define PPI_FIXED_CH_NUM 12
+#define PPI_GROUP_NUM 4
+
+/* Timer/Counter */
+#define TIMER_PRESENT
+#define TIMER_COUNT 3
+
+#define TIMER0_MAX_SIZE 32
+#define TIMER1_MAX_SIZE 16
+#define TIMER2_MAX_SIZE 16
+
+#define TIMER0_CC_NUM 4
+#define TIMER1_CC_NUM 4
+#define TIMER2_CC_NUM 4
+
+/* Real Time Counter */
+#define RTC_PRESENT
+#define RTC_COUNT 2
+
+#define RTC0_CC_NUM 3
+#define RTC1_CC_NUM 4
+
+/* RNG */
+#define RNG_PRESENT
+#define RNG_COUNT 1
+
+/* Watchdog Timer */
+#define WDT_PRESENT
+#define WDT_COUNT 1
+
+/* Temperature Sensor */
+#define TEMP_PRESENT
+#define TEMP_COUNT 1
+
+/* Serial Peripheral Interface Master */
+#define SPI_PRESENT
+#define SPI_COUNT 2
+
+/* Serial Peripheral Interface Slave with DMA */
+#define SPIS_PRESENT
+#define SPIS_COUNT 1
+
+#define SPIS1_EASYDMA_MAXCNT_SIZE 8
+
+/* Two Wire Interface Master */
+#define TWI_PRESENT
+#define TWI_COUNT 2
+
+/* Universal Asynchronous Receiver-Transmitter */
+#define UART_PRESENT
+#define UART_COUNT 1
+
+/* Quadrature Decoder */
+#define QDEC_PRESENT
+#define QDEC_COUNT 1
+
+/* Analog to Digital Converter */
+#define ADC_PRESENT
+#define ADC_COUNT 1
+
+/* GPIO Tasks and Events */
+#define GPIOTE_PRESENT
+#define GPIOTE_COUNT 1
+
+#define GPIOTE_CH_NUM 4
+
+/* Low Power Comparator */
+#define LPCOMP_PRESENT
+#define LPCOMP_COUNT 1
+
+#define LPCOMP_REFSEL_RESOLUTION 8
+
+
+#endif // _NRF51_PERIPHERALS_H
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52.h
index 3c9f8a2d9d..9cdae0c7cb 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52810.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52810.h
index 7c51a257b9..ff521ab65f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52810.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52810.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52840.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52840.h
index 729e943cfe..d0a4421622 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52840.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_to_nrf52840.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxaa.ld b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxaa.ld
index ab9a5d241c..9e3668ac38 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxaa.ld
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxaa.ld
@@ -10,4 +10,4 @@ MEMORY
}
-INCLUDE "nrf51_common.ld"
+INCLUDE "nrf_common.ld"
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxab.ld b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxab.ld
index 95804ae8a3..36e5fb0ebe 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxab.ld
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxab.ld
@@ -10,4 +10,4 @@ MEMORY
}
-INCLUDE "nrf51_common.ld"
+INCLUDE "nrf_common.ld"
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxac.ld b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxac.ld
index d74fa441e8..ff9780e44f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxac.ld
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf51_xxac.ld
@@ -10,4 +10,4 @@ MEMORY
}
-INCLUDE "nrf51_common.ld"
+INCLUDE "nrf_common.ld"
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52.h
index e81bdda2e1..b48e187281 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52.h
@@ -6,12 +6,12 @@
* nrf52 from Nordic Semiconductor.
*
* @version V1
- * @date 3. October 2017
+ * @date 8. March 2018
*
* @note Generated with SVDConv V2.81d
* from CMSIS SVD File 'nrf52.svd' Version 1,
*
- * @par Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+ * @par Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -1576,7 +1576,7 @@ typedef struct { /*!< COMP Structure
__I uint32_t RESERVED4[63];
__IO uint32_t ENABLE; /*!< COMP enable */
__IO uint32_t PSEL; /*!< Pin select */
- __IO uint32_t REFSEL; /*!< Reference source select */
+ __IO uint32_t REFSEL; /*!< Reference source select for single-ended mode */
__IO uint32_t EXTREFSEL; /*!< External reference select */
__I uint32_t RESERVED5[8];
__IO uint32_t TH; /*!< Threshold configuration for hysteresis unit */
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52.svd b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52.svd
index f5b11dac4c..3d1c2227bc 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52.svd
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52.svd
@@ -1,4 +1,4 @@
-<?xml version="1.0" encoding="utf-8"?>
+<?xml version="1.0" encoding="utf-8"?>
<!-- File naming: <vendor>_<part/series name>_svd.xml -->
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" noNamespaceSchemaLocation="CMSIS-SVD.xsd">
<vendor>Nordic Semiconductor</vendor>
@@ -6,9 +6,9 @@
<name>nrf52</name>
<series>nrf52</series>
<version>1</version>
- <description>nRF52 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller </description>
+ <description>nRF52832 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller </description>
<licenseText>
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.\n
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
\n
Redistribution and use in source and binary forms, with or without\n
modification, are permitted provided that the following conditions are met:\n
@@ -23996,7 +23996,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<register>
<name>REFSEL</name>
- <description>Reference source select</description>
+ <description>Reference source select for single-ended mode</description>
<addressOffset>0x508</addressOffset>
<access>read-write</access>
<resetValue>0x00000004</resetValue>
@@ -24046,7 +24046,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<name>EXTREFSEL</name>
<description>External analog reference select</description>
<lsb>0</lsb>
- <msb>0</msb>
+ <msb>2</msb>
<enumeratedValues>
<enumeratedValue>
<name>AnalogReference0</name>
@@ -24058,6 +24058,36 @@ POSSIBILITY OF SUCH DAMAGE.\n
<description>Use AIN1 as external analog reference</description>
<value>1</value>
</enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference2</name>
+ <description>Use AIN2 as external analog reference</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference3</name>
+ <description>Use AIN3 as external analog reference</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference4</name>
+ <description>Use AIN4 as external analog reference</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference5</name>
+ <description>Use AIN5 as external analog reference</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference6</name>
+ <description>Use AIN6 as external analog reference</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AnalogReference7</name>
+ <description>Use AIN7 as external analog reference</description>
+ <value>7</value>
+ </enumeratedValue>
</enumeratedValues>
</field>
</fields>
@@ -24091,13 +24121,13 @@ POSSIBILITY OF SUCH DAMAGE.\n
<fields>
<field>
<name>SP</name>
- <description>Speed and power mode</description>
+ <description>Speed and power modes</description>
<lsb>0</lsb>
<msb>1</msb>
<enumeratedValues>
<enumeratedValue>
<name>Low</name>
- <description>Low power mode</description>
+ <description>Low-power mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
@@ -24107,20 +24137,20 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValue>
<enumeratedValue>
<name>High</name>
- <description>High speed mode</description>
+ <description>High-speed mode</description>
<value>2</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MAIN</name>
- <description>Main operation mode</description>
+ <description>Main operation modes</description>
<lsb>8</lsb>
<msb>8</msb>
<enumeratedValues>
<enumeratedValue>
<name>SE</name>
- <description>Single ended mode</description>
+ <description>Single-ended mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810.h
index 966cc15431..c42d770464 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810.h
@@ -6,12 +6,12 @@
* nrf52810 from Nordic Semiconductor.
*
* @version V1
- * @date 3. October 2017
+ * @date 8. March 2018
*
* @note Generated with SVDConv V2.81d
* from CMSIS SVD File 'nrf52810.svd' Version 1,
*
- * @par Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+ * @par Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -311,11 +311,10 @@ typedef struct {
} QDEC_PSEL_Type;
typedef struct {
- __IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in Data RAM of this
+ __IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in RAM of this sequence */
+ __IO uint32_t CNT; /*!< Description cluster[0]: Number of values (duty cycles) in this
sequence */
- __IO uint32_t CNT; /*!< Description cluster[0]: Amount of values (duty cycles) in this
- sequence */
- __IO uint32_t REFRESH; /*!< Description cluster[0]: Amount of additional PWM periods between
+ __IO uint32_t REFRESH; /*!< Description cluster[0]: Number of additional PWM periods between
samples loaded into compare register */
__IO uint32_t ENDDELAY; /*!< Description cluster[0]: Time added after the sequence */
__I uint32_t RESERVED1[4];
@@ -1303,7 +1302,7 @@ typedef struct { /*!< EGU Structure
/**
- * @brief Pulse Width Modulation Unit (PWM)
+ * @brief Pulse width modulation unit (PWM)
*/
typedef struct { /*!< PWM Structure */
@@ -1313,10 +1312,10 @@ typedef struct { /*!< PWM Structure
__O uint32_t TASKS_SEQSTART[2]; /*!< Description collection[0]: Loads the first PWM value on all
enabled channels from sequence 0, and starts playing that sequence
at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes
- PWM generation to start it was not running. */
+ PWM generation to start if not running. */
__O uint32_t TASKS_NEXTSTEP; /*!< Steps by one value in the current sequence on all enabled channels
if DECODER.MODE=NextStep. Does not cause PWM generation to start
- it was not running. */
+ if not running. */
__I uint32_t RESERVED1[60];
__IO uint32_t EVENTS_STOPPED; /*!< Response to STOP task, emitted when PWM pulses are no longer
generated */
@@ -1339,7 +1338,7 @@ typedef struct { /*!< PWM Structure
__IO uint32_t COUNTERTOP; /*!< Value up to which the pulse generator counter counts */
__IO uint32_t PRESCALER; /*!< Configuration for PWM_CLK */
__IO uint32_t DECODER; /*!< Configuration of the decoder */
- __IO uint32_t LOOP; /*!< Amount of playback of a loop */
+ __IO uint32_t LOOP; /*!< Number of playbacks of a loop */
__I uint32_t RESERVED5[2];
PWM_SEQ_Type SEQ[2]; /*!< Unspecified */
PWM_PSEL_Type PSEL; /*!< Unspecified */
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810.svd b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810.svd
index 130afcc05e..8f6107b988 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810.svd
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810.svd
@@ -6,9 +6,9 @@
<name>nrf52810</name>
<series>nrf52</series>
<version>1</version>
- <description>nRF52 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller </description>
+ <description>nRF52810 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller </description>
<licenseText>
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.\n
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
\n
Redistribution and use in source and binary forms, with or without\n
modification, are permitted provided that the following conditions are met:\n
@@ -75,7 +75,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<description>Code memory page size</description>
<addressOffset>0x010</addressOffset>
<access>read-only</access>
- <resetValue>0xFFFFFFFF</resetValue>
+ <resetValue>0x00001000</resetValue>
<fields>
<field>
<name>CODEPAGESIZE</name>
@@ -90,7 +90,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<description>Code memory size</description>
<addressOffset>0x014</addressOffset>
<access>read-only</access>
- <resetValue>0xFFFFFFFF</resetValue>
+ <resetValue>0x00000030</resetValue>
<fields>
<field>
<name>CODESIZE</name>
@@ -246,9 +246,9 @@ POSSIBILITY OF SUCH DAMAGE.\n
<value>0x41414141</value>
</enumeratedValue>
<enumeratedValue>
- <name>AAAB</name>
- <description>AAAB</description>
- <value>0x41414142</value>
+ <name>AAA0</name>
+ <description>AAA0</description>
+ <value>0x41414130</value>
</enumeratedValue>
<enumeratedValue>
<name>AABA</name>
@@ -260,6 +260,26 @@ POSSIBILITY OF SUCH DAMAGE.\n
<description>AABB</description>
<value>0x41414242</value>
</enumeratedValue>
+ <enumeratedValue>
+ <name>AAB0</name>
+ <description>AAB0</description>
+ <value>0x41414230</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AACA</name>
+ <description>AACA</description>
+ <value>0x41414341</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AACB</name>
+ <description>AACB</description>
+ <value>0x41414342</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>AAC0</name>
+ <description>AAC0</description>
+ <value>0x41414330</value>
+ </enumeratedValue>
<enumeratedValue>
<name>Unspecified</name>
<description>Unspecified</description>
@@ -7121,6 +7141,24 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValue>
</enumeratedValues>
</field>
+ <field>
+ <name>LASTRX_SUSPEND</name>
+ <description>Shortcut between LASTRX event and SUSPEND task</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
<field>
<name>LASTRX_STOP</name>
<description>Shortcut between LASTRX event and STOP task</description>
@@ -9693,7 +9731,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<name>MAXCNT</name>
<description>Maximum number of bytes in receive buffer</description>
<lsb>0</lsb>
- <msb>7</msb>
+ <msb>9</msb>
</field>
</fields>
</register>
@@ -9707,7 +9745,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<name>AMOUNT</name>
<description>Number of bytes transferred in the last transaction</description>
<lsb>0</lsb>
- <msb>7</msb>
+ <msb>9</msb>
</field>
</fields>
</register>
@@ -9767,7 +9805,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<name>MAXCNT</name>
<description>Maximum number of bytes in transmit buffer</description>
<lsb>0</lsb>
- <msb>7</msb>
+ <msb>9</msb>
</field>
</fields>
</register>
@@ -9781,7 +9819,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<name>AMOUNT</name>
<description>Number of bytes transferred in the last transaction</description>
<lsb>0</lsb>
- <msb>7</msb>
+ <msb>9</msb>
</field>
</fields>
</register>
@@ -20800,7 +20838,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</peripheral>
<peripheral>
<name>PWM0</name>
- <description>Pulse Width Modulation Unit</description>
+ <description>Pulse width modulation unit</description>
<groupName>PWM</groupName>
<baseAddress>0x4001C000</baseAddress>
<size>32</size>
@@ -20832,7 +20870,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<dim>2</dim>
<dimIncrement>4</dimIncrement>
<name>TASKS_SEQSTART[%s]</name>
- <description>Description collection[0]: Loads the first PWM value on all enabled channels from sequence 0, and starts playing that sequence at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes PWM generation to start it was not running.</description>
+ <description>Description collection[0]: Loads the first PWM value on all enabled channels from sequence 0, and starts playing that sequence at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running.</description>
<addressOffset>0x008</addressOffset>
<access>write-only</access>
<fields>
@@ -20845,7 +20883,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<register>
<name>TASKS_NEXTSTEP</name>
- <description>Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start it was not running.</description>
+ <description>Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running.</description>
<addressOffset>0x010</addressOffset>
<access>write-only</access>
<fields>
@@ -21587,18 +21625,18 @@ POSSIBILITY OF SUCH DAMAGE.\n
<fields>
<field>
<name>UPDOWN</name>
- <description>Selects up or up and down as wave counter mode</description>
+ <description>Selects up mode or up-and-down mode for the counter</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
<enumeratedValue>
<name>Up</name>
- <description>Up counter - edge aligned PWM duty-cycle</description>
+ <description>Up counter, edge-aligned PWM duty cycle</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>UpAndDown</name>
- <description>Up and down counter - center aligned PWM duty cycle</description>
+ <description>Up and down counter, center-aligned PWM duty cycle</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -21614,7 +21652,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<fields>
<field>
<name>COUNTERTOP</name>
- <description>Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM will be used.</description>
+ <description>Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used.</description>
<lsb>0</lsb>
<msb>14</msb>
</field>
@@ -21629,7 +21667,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<fields>
<field>
<name>PRESCALER</name>
- <description>Pre-scaler of PWM_CLK</description>
+ <description>Prescaler of PWM_CLK</description>
<lsb>0</lsb>
<msb>2</msb>
<enumeratedValues>
@@ -21734,14 +21772,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<register>
<name>LOOP</name>
- <description>Amount of playback of a loop</description>
+ <description>Number of playbacks of a loop</description>
<addressOffset>0x514</addressOffset>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
- <description>Amount of playback of pattern cycles</description>
+ <description>Number of playbacks of pattern cycles</description>
<lsb>0</lsb>
<msb>15</msb>
<enumeratedValues>
@@ -21763,14 +21801,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
<addressOffset>0x520</addressOffset>
<register>
<name>PTR</name>
- <description>Description cluster[0]: Beginning address in Data RAM of this sequence</description>
+ <description>Description cluster[0]: Beginning address in RAM of this sequence</description>
<addressOffset>0x000</addressOffset>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>PTR</name>
- <description>Beginning address in Data RAM of this sequence</description>
+ <description>Beginning address in RAM of this sequence</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -21778,14 +21816,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<register>
<name>CNT</name>
- <description>Description cluster[0]: Amount of values (duty cycles) in this sequence</description>
+ <description>Description cluster[0]: Number of values (duty cycles) in this sequence</description>
<addressOffset>0x004</addressOffset>
<access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>CNT</name>
- <description>Amount of values (duty cycles) in this sequence</description>
+ <description>Number of values (duty cycles) in this sequence</description>
<lsb>0</lsb>
<msb>14</msb>
<enumeratedValues>
@@ -21800,14 +21838,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<register>
<name>REFRESH</name>
- <description>Description cluster[0]: Amount of additional PWM periods between samples loaded into compare register</description>
+ <description>Description cluster[0]: Number of additional PWM periods between samples loaded into compare register</description>
<addressOffset>0x008</addressOffset>
<access>read-write</access>
<resetValue>0x00000001</resetValue>
<fields>
<field>
<name>CNT</name>
- <description>Amount of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)</description>
+ <description>Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods)</description>
<lsb>0</lsb>
<msb>23</msb>
<enumeratedValues>
@@ -22493,6 +22531,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<description>Ready flag</description>
<addressOffset>0x400</addressOffset>
<access>read-only</access>
+ <resetValue>0x00000001</resetValue>
<fields>
<field>
<name>READY</name>
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_bitfields.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_bitfields.h
index 7f1656c248..aac192ecb0 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_bitfields.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_bitfields.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -1661,10 +1661,14 @@ POSSIBILITY OF SUCH DAMAGE.
/* Bits 31..0 : Part variant, hardware version and production configuration, encoded as ASCII */
#define FICR_INFO_VARIANT_VARIANT_Pos (0UL) /*!< Position of VARIANT field. */
#define FICR_INFO_VARIANT_VARIANT_Msk (0xFFFFFFFFUL << FICR_INFO_VARIANT_VARIANT_Pos) /*!< Bit mask of VARIANT field. */
+#define FICR_INFO_VARIANT_VARIANT_AAA0 (0x41414130UL) /*!< AAA0 */
#define FICR_INFO_VARIANT_VARIANT_AAAA (0x41414141UL) /*!< AAAA */
-#define FICR_INFO_VARIANT_VARIANT_AAAB (0x41414142UL) /*!< AAAB */
+#define FICR_INFO_VARIANT_VARIANT_AAB0 (0x41414230UL) /*!< AAB0 */
#define FICR_INFO_VARIANT_VARIANT_AABA (0x41414241UL) /*!< AABA */
#define FICR_INFO_VARIANT_VARIANT_AABB (0x41414242UL) /*!< AABB */
+#define FICR_INFO_VARIANT_VARIANT_AAC0 (0x41414330UL) /*!< AAC0 */
+#define FICR_INFO_VARIANT_VARIANT_AACA (0x41414341UL) /*!< AACA */
+#define FICR_INFO_VARIANT_VARIANT_AACB (0x41414342UL) /*!< AACB */
#define FICR_INFO_VARIANT_VARIANT_Unspecified (0xFFFFFFFFUL) /*!< Unspecified */
/* Register: FICR_INFO_PACKAGE */
@@ -5159,7 +5163,7 @@ POSSIBILITY OF SUCH DAMAGE.
/* Peripheral: PWM */
-/* Description: Pulse Width Modulation Unit */
+/* Description: Pulse width modulation unit */
/* Register: PWM_TASKS_STOP */
/* Description: Stops PWM pulse generation on all channels at the end of current PWM period, and stops sequence playback */
@@ -5169,14 +5173,14 @@ POSSIBILITY OF SUCH DAMAGE.
#define PWM_TASKS_STOP_TASKS_STOP_Msk (0x1UL << PWM_TASKS_STOP_TASKS_STOP_Pos) /*!< Bit mask of TASKS_STOP field. */
/* Register: PWM_TASKS_SEQSTART */
-/* Description: Description collection[0]: Loads the first PWM value on all enabled channels from sequence 0, and starts playing that sequence at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes PWM generation to start it was not running. */
+/* Description: Description collection[0]: Loads the first PWM value on all enabled channels from sequence 0, and starts playing that sequence at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes PWM generation to start if not running. */
/* Bit 0 : */
#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos (0UL) /*!< Position of TASKS_SEQSTART field. */
#define PWM_TASKS_SEQSTART_TASKS_SEQSTART_Msk (0x1UL << PWM_TASKS_SEQSTART_TASKS_SEQSTART_Pos) /*!< Bit mask of TASKS_SEQSTART field. */
/* Register: PWM_TASKS_NEXTSTEP */
-/* Description: Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start it was not running. */
+/* Description: Steps by one value in the current sequence on all enabled channels if DECODER.MODE=NextStep. Does not cause PWM generation to start if not running. */
/* Bit 0 : */
#define PWM_TASKS_NEXTSTEP_TASKS_NEXTSTEP_Pos (0UL) /*!< Position of TASKS_NEXTSTEP field. */
@@ -5411,23 +5415,23 @@ POSSIBILITY OF SUCH DAMAGE.
/* Register: PWM_MODE */
/* Description: Selects operating mode of the wave counter */
-/* Bit 0 : Selects up or up and down as wave counter mode */
+/* Bit 0 : Selects up mode or up-and-down mode for the counter */
#define PWM_MODE_UPDOWN_Pos (0UL) /*!< Position of UPDOWN field. */
#define PWM_MODE_UPDOWN_Msk (0x1UL << PWM_MODE_UPDOWN_Pos) /*!< Bit mask of UPDOWN field. */
-#define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter - edge aligned PWM duty-cycle */
-#define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter - center aligned PWM duty cycle */
+#define PWM_MODE_UPDOWN_Up (0UL) /*!< Up counter, edge-aligned PWM duty cycle */
+#define PWM_MODE_UPDOWN_UpAndDown (1UL) /*!< Up and down counter, center-aligned PWM duty cycle */
/* Register: PWM_COUNTERTOP */
/* Description: Value up to which the pulse generator counter counts */
-/* Bits 14..0 : Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM will be used. */
+/* Bits 14..0 : Value up to which the pulse generator counter counts. This register is ignored when DECODER.MODE=WaveForm and only values from RAM are used. */
#define PWM_COUNTERTOP_COUNTERTOP_Pos (0UL) /*!< Position of COUNTERTOP field. */
#define PWM_COUNTERTOP_COUNTERTOP_Msk (0x7FFFUL << PWM_COUNTERTOP_COUNTERTOP_Pos) /*!< Bit mask of COUNTERTOP field. */
/* Register: PWM_PRESCALER */
/* Description: Configuration for PWM_CLK */
-/* Bits 2..0 : Pre-scaler of PWM_CLK */
+/* Bits 2..0 : Prescaler of PWM_CLK */
#define PWM_PRESCALER_PRESCALER_Pos (0UL) /*!< Position of PRESCALER field. */
#define PWM_PRESCALER_PRESCALER_Msk (0x7UL << PWM_PRESCALER_PRESCALER_Pos) /*!< Bit mask of PRESCALER field. */
#define PWM_PRESCALER_PRESCALER_DIV_1 (0UL) /*!< Divide by 1 (16MHz) */
@@ -5457,32 +5461,32 @@ POSSIBILITY OF SUCH DAMAGE.
#define PWM_DECODER_LOAD_WaveForm (3UL) /*!< 1st half word (16-bit) in ch.0; 2nd in ch.1; ...; 4th in COUNTERTOP */
/* Register: PWM_LOOP */
-/* Description: Amount of playback of a loop */
+/* Description: Number of playbacks of a loop */
-/* Bits 15..0 : Amount of playback of pattern cycles */
+/* Bits 15..0 : Number of playbacks of pattern cycles */
#define PWM_LOOP_CNT_Pos (0UL) /*!< Position of CNT field. */
#define PWM_LOOP_CNT_Msk (0xFFFFUL << PWM_LOOP_CNT_Pos) /*!< Bit mask of CNT field. */
#define PWM_LOOP_CNT_Disabled (0UL) /*!< Looping disabled (stop at the end of the sequence) */
/* Register: PWM_SEQ_PTR */
-/* Description: Description cluster[0]: Beginning address in Data RAM of this sequence */
+/* Description: Description cluster[0]: Beginning address in RAM of this sequence */
-/* Bits 31..0 : Beginning address in Data RAM of this sequence */
+/* Bits 31..0 : Beginning address in RAM of this sequence */
#define PWM_SEQ_PTR_PTR_Pos (0UL) /*!< Position of PTR field. */
#define PWM_SEQ_PTR_PTR_Msk (0xFFFFFFFFUL << PWM_SEQ_PTR_PTR_Pos) /*!< Bit mask of PTR field. */
/* Register: PWM_SEQ_CNT */
-/* Description: Description cluster[0]: Amount of values (duty cycles) in this sequence */
+/* Description: Description cluster[0]: Number of values (duty cycles) in this sequence */
-/* Bits 14..0 : Amount of values (duty cycles) in this sequence */
+/* Bits 14..0 : Number of values (duty cycles) in this sequence */
#define PWM_SEQ_CNT_CNT_Pos (0UL) /*!< Position of CNT field. */
#define PWM_SEQ_CNT_CNT_Msk (0x7FFFUL << PWM_SEQ_CNT_CNT_Pos) /*!< Bit mask of CNT field. */
#define PWM_SEQ_CNT_CNT_Disabled (0UL) /*!< Sequence is disabled, and shall not be started as it is empty */
/* Register: PWM_SEQ_REFRESH */
-/* Description: Description cluster[0]: Amount of additional PWM periods between samples loaded into compare register */
+/* Description: Description cluster[0]: Number of additional PWM periods between samples loaded into compare register */
-/* Bits 23..0 : Amount of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods) */
+/* Bits 23..0 : Number of additional PWM periods between samples loaded into compare register (load every REFRESH.CNT+1 PWM periods) */
#define PWM_SEQ_REFRESH_CNT_Pos (0UL) /*!< Position of CNT field. */
#define PWM_SEQ_REFRESH_CNT_Msk (0xFFFFFFUL << PWM_SEQ_REFRESH_CNT_Pos) /*!< Bit mask of CNT field. */
#define PWM_SEQ_REFRESH_CNT_Continuous (0UL) /*!< Update every PWM period */
@@ -7945,16 +7949,16 @@ POSSIBILITY OF SUCH DAMAGE.
/* Register: SPIM_RXD_MAXCNT */
/* Description: Maximum number of bytes in receive buffer */
-/* Bits 7..0 : Maximum number of bytes in receive buffer */
+/* Bits 9..0 : Maximum number of bytes in receive buffer */
#define SPIM_RXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
-#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+#define SPIM_RXD_MAXCNT_MAXCNT_Msk (0x3FFUL << SPIM_RXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
/* Register: SPIM_RXD_AMOUNT */
/* Description: Number of bytes transferred in the last transaction */
-/* Bits 7..0 : Number of bytes transferred in the last transaction */
+/* Bits 9..0 : Number of bytes transferred in the last transaction */
#define SPIM_RXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
-#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+#define SPIM_RXD_AMOUNT_AMOUNT_Msk (0x3FFUL << SPIM_RXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
/* Register: SPIM_RXD_LIST */
/* Description: EasyDMA list type */
@@ -7975,16 +7979,16 @@ POSSIBILITY OF SUCH DAMAGE.
/* Register: SPIM_TXD_MAXCNT */
/* Description: Maximum number of bytes in transmit buffer */
-/* Bits 7..0 : Maximum number of bytes in transmit buffer */
+/* Bits 9..0 : Maximum number of bytes in transmit buffer */
#define SPIM_TXD_MAXCNT_MAXCNT_Pos (0UL) /*!< Position of MAXCNT field. */
-#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0xFFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
+#define SPIM_TXD_MAXCNT_MAXCNT_Msk (0x3FFUL << SPIM_TXD_MAXCNT_MAXCNT_Pos) /*!< Bit mask of MAXCNT field. */
/* Register: SPIM_TXD_AMOUNT */
/* Description: Number of bytes transferred in the last transaction */
-/* Bits 7..0 : Number of bytes transferred in the last transaction */
+/* Bits 9..0 : Number of bytes transferred in the last transaction */
#define SPIM_TXD_AMOUNT_AMOUNT_Pos (0UL) /*!< Position of AMOUNT field. */
-#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0xFFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
+#define SPIM_TXD_AMOUNT_AMOUNT_Msk (0x3FFUL << SPIM_TXD_AMOUNT_AMOUNT_Pos) /*!< Bit mask of AMOUNT field. */
/* Register: SPIM_TXD_LIST */
/* Description: EasyDMA list type */
@@ -8806,6 +8810,12 @@ POSSIBILITY OF SUCH DAMAGE.
#define TWIM_SHORTS_LASTRX_STOP_Disabled (0UL) /*!< Disable shortcut */
#define TWIM_SHORTS_LASTRX_STOP_Enabled (1UL) /*!< Enable shortcut */
+/* Bit 11 : Shortcut between LASTRX event and SUSPEND task */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Pos (11UL) /*!< Position of LASTRX_SUSPEND field. */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Msk (0x1UL << TWIM_SHORTS_LASTRX_SUSPEND_Pos) /*!< Bit mask of LASTRX_SUSPEND field. */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Disabled (0UL) /*!< Disable shortcut */
+#define TWIM_SHORTS_LASTRX_SUSPEND_Enabled (1UL) /*!< Enable shortcut */
+
/* Bit 10 : Shortcut between LASTRX event and STARTTX task */
#define TWIM_SHORTS_LASTRX_STARTTX_Pos (10UL) /*!< Position of LASTRX_STARTTX field. */
#define TWIM_SHORTS_LASTRX_STARTTX_Msk (0x1UL << TWIM_SHORTS_LASTRX_STARTTX_Pos) /*!< Bit mask of LASTRX_STARTTX field. */
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_peripherals.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_peripherals.h
index 5eb898dc26..2c31ccf770 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_peripherals.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_peripherals.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -136,6 +136,10 @@ POSSIBILITY OF SUCH DAMAGE.
#define SPIM0_FEATURE_HARDWARE_CSN_PRESENT 0
+#define SPIM0_FEATURE_DCX_PRESENT 0
+
+#define SPIM0_FEATURE_RXDELAY_PRESENT 0
+
#define SPIM0_EASYDMA_MAXCNT_SIZE 10
/* Serial Peripheral Interface Slave with DMA*/
@@ -172,6 +176,8 @@ POSSIBILITY OF SUCH DAMAGE.
#define SAADC_EASYDMA_MAXCNT_SIZE 15
+#define SAADC_CH_NUM 8
+
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_xxaa.ld b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_xxaa.ld
index 9b0dc127c2..b8ef436eef 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_xxaa.ld
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52810_xxaa.ld
@@ -10,4 +10,4 @@ MEMORY
}
-INCLUDE "nrf52_common.ld"
+INCLUDE "nrf_common.ld"
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52832_peripherals.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52832_peripherals.h
index 1ccd704d6d..af81b05114 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52832_peripherals.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52832_peripherals.h
@@ -1,6 +1,6 @@
/*
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
@@ -167,6 +167,14 @@ POSSIBILITY OF SUCH DAMAGE.
#define SPIM1_FEATURE_HARDWARE_CSN_PRESENT 0
#define SPIM2_FEATURE_HARDWARE_CSN_PRESENT 0
+#define SPIM0_FEATURE_DCX_PRESENT 0
+#define SPIM1_FEATURE_DCX_PRESENT 0
+#define SPIM2_FEATURE_DCX_PRESENT 0
+
+#define SPIM0_FEATURE_RXDELAY_PRESENT 0
+#define SPIM1_FEATURE_RXDELAY_PRESENT 0
+#define SPIM2_FEATURE_RXDELAY_PRESENT 0
+
#define SPIM0_EASYDMA_MAXCNT_SIZE 8
#define SPIM1_EASYDMA_MAXCNT_SIZE 8
#define SPIM2_EASYDMA_MAXCNT_SIZE 8
@@ -217,6 +225,8 @@ POSSIBILITY OF SUCH DAMAGE.
#define SAADC_EASYDMA_MAXCNT_SIZE 15
+#define SAADC_CH_NUM 8
+
/* GPIO Tasks and Events */
#define GPIOTE_PRESENT
#define GPIOTE_COUNT 1
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52832_xxab.ld b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52832_xxab.ld
index 9e133b2e74..ff9780e44f 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52832_xxab.ld
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52832_xxab.ld
@@ -10,4 +10,4 @@ MEMORY
}
-INCLUDE "nrf52_common.ld"
+INCLUDE "nrf_common.ld"
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52840.h b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52840.h
index ff595a0f56..b547c2a72d 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52840.h
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52840.h
@@ -6,12 +6,12 @@
* nrf52840 from Nordic Semiconductor.
*
* @version V1
- * @date 3. October 2017
+ * @date 8. March 2018
*
* @note Generated with SVDConv V2.81d
* from CMSIS SVD File 'nrf52840.svd' Version 1,
*
- * @par Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.
+ * @par Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -173,11 +173,11 @@ typedef enum {
typedef struct {
__I uint32_t PART; /*!< Part code */
- __I uint32_t VARIANT; /*!< Part variant (hardware version and production configuration) */
+ __I uint32_t VARIANT; /*!< Build code (hardware version and production configuration) */
__I uint32_t PACKAGE; /*!< Package option */
__I uint32_t RAM; /*!< RAM variant */
__I uint32_t FLASH; /*!< Flash variant */
- __IO uint32_t UNUSED0[3]; /*!< Description collection[0]: Unspecified */
+ __IO uint32_t UNUSED8[3]; /*!< Unspecified */
} FICR_INFO_Type;
typedef struct {
@@ -212,12 +212,30 @@ typedef struct {
} FICR_NFC_Type;
typedef struct {
- __IO uint32_t POWER; /*!< Description cluster[0]: RAM0 power control register */
- __O uint32_t POWERSET; /*!< Description cluster[0]: RAM0 power control set register */
- __O uint32_t POWERCLR; /*!< Description cluster[0]: RAM0 power control clear register */
+ __I uint32_t BYTES; /*!< Amount of bytes for the required entropy bits */
+ __I uint32_t RCCUTOFF; /*!< Repetition counter cutoff */
+ __I uint32_t APCUTOFF; /*!< Adaptive proportion cutoff */
+ __I uint32_t STARTUP; /*!< Amount of bytes for the startup tests */
+ __I uint32_t ROSC1; /*!< Sample count for ring oscillator 1 */
+ __I uint32_t ROSC2; /*!< Sample count for ring oscillator 2 */
+ __I uint32_t ROSC3; /*!< Sample count for ring oscillator 3 */
+ __I uint32_t ROSC4; /*!< Sample count for ring oscillator 4 */
+} FICR_TRNG90B_Type;
+
+typedef struct {
+ __IO uint32_t POWER; /*!< Description cluster[n]: RAMn power control register */
+ __O uint32_t POWERSET; /*!< Description cluster[n]: RAMn power control set register */
+ __O uint32_t POWERCLR; /*!< Description cluster[n]: RAMn power control clear register */
__I uint32_t RESERVED0;
} POWER_RAM_Type;
+typedef struct {
+ __IO uint32_t RTS; /*!< Pin select for RTS */
+ __IO uint32_t TXD; /*!< Pin select for TXD */
+ __IO uint32_t CTS; /*!< Pin select for CTS */
+ __IO uint32_t RXD; /*!< Pin select for RXD */
+} UART_PSEL_Type;
+
typedef struct {
__IO uint32_t RTS; /*!< Pin select for RTS signal */
__IO uint32_t TXD; /*!< Pin select for TXD signal */
@@ -238,11 +256,10 @@ typedef struct {
} UARTE_TXD_Type;
typedef struct {
- __IO uint32_t RTS; /*!< Pin select for RTS */
- __IO uint32_t TXD; /*!< Pin select for TXD */
- __IO uint32_t CTS; /*!< Pin select for CTS */
- __IO uint32_t RXD; /*!< Pin select for RXD */
-} UART_PSEL_Type;
+ __IO uint32_t SCK; /*!< Pin select for SCK */
+ __IO uint32_t MOSI; /*!< Pin select for MOSI signal */
+ __IO uint32_t MISO; /*!< Pin select for MISO signal */
+} SPI_PSEL_Type;
typedef struct {
__IO uint32_t SCK; /*!< Pin select for SCK */
@@ -290,6 +307,11 @@ typedef struct {
__I uint32_t AMOUNT; /*!< Number of bytes transmitted in last granted transaction */
} SPIS_TXD_Type;
+typedef struct {
+ __IO uint32_t SCL; /*!< Pin select for SCL */
+ __IO uint32_t SDA; /*!< Pin select for SDA */
+} TWI_PSEL_Type;
+
typedef struct {
__IO uint32_t SCL; /*!< Pin select for SCL signal */
__IO uint32_t SDA; /*!< Pin select for SDA signal */
@@ -326,17 +348,6 @@ typedef struct {
__I uint32_t AMOUNT; /*!< Number of bytes transferred in the last TXD transaction */
} TWIS_TXD_Type;
-typedef struct {
- __IO uint32_t SCK; /*!< Pin select for SCK */
- __IO uint32_t MOSI; /*!< Pin select for MOSI signal */
- __IO uint32_t MISO; /*!< Pin select for MISO signal */
-} SPI_PSEL_Type;
-
-typedef struct {
- __IO uint32_t SCL; /*!< Pin select for SCL */
- __IO uint32_t SDA; /*!< Pin select for SDA */
-} TWI_PSEL_Type;
-
typedef struct {
__IO uint32_t RX; /*!< Result of last incoming frame */
} NFCT_FRAMESTATUS_Type;
@@ -352,22 +363,24 @@ typedef struct {
} NFCT_RXD_Type;
typedef struct {
- __IO uint32_t LIMITH; /*!< Description cluster[0]: Last results is equal or above CH[0].LIMIT.HIGH */
- __IO uint32_t LIMITL; /*!< Description cluster[0]: Last results is equal or below CH[0].LIMIT.LOW */
+ __IO uint32_t LIMITH; /*!< Description cluster[n]: Last result is equal or above CH[n].LIMIT.HIGH */
+ __IO uint32_t LIMITL; /*!< Description cluster[n]: Last result is equal or below CH[n].LIMIT.LOW */
} SAADC_EVENTS_CH_Type;
typedef struct {
- __IO uint32_t PSELP; /*!< Description cluster[0]: Input positive pin selection for CH[0] */
- __IO uint32_t PSELN; /*!< Description cluster[0]: Input negative pin selection for CH[0] */
- __IO uint32_t CONFIG; /*!< Description cluster[0]: Input configuration for CH[0] */
- __IO uint32_t LIMIT; /*!< Description cluster[0]: High/low limits for event monitoring
- a channel */
+ __IO uint32_t PSELP; /*!< Description cluster[n]: Input positive pin selection for CH[n] */
+ __IO uint32_t PSELN; /*!< Description cluster[n]: Input negative pin selection for CH[n] */
+ __IO uint32_t CONFIG; /*!< Description cluster[n]: Input configuration for CH[n] */
+ __IO uint32_t LIMIT; /*!< Description cluster[n]: High/low limits for event monitoring
+ of a channel */
} SAADC_CH_Type;
typedef struct {
__IO uint32_t PTR; /*!< Data pointer */
- __IO uint32_t MAXCNT; /*!< Maximum number of buffer words to transfer */
- __I uint32_t AMOUNT; /*!< Number of buffer words transferred since last START */
+ __IO uint32_t MAXCNT; /*!< Maximum number of 16-bit samples to be written to output RAM
+ buffer */
+ __I uint32_t AMOUNT; /*!< Number of 16-bit samples written to output RAM buffer since
+ the previous START task */
} SAADC_RESULT_Type;
typedef struct {
@@ -377,19 +390,18 @@ typedef struct {
} QDEC_PSEL_Type;
typedef struct {
- __IO uint32_t PTR; /*!< Description cluster[0]: Beginning address in Data RAM of this
- sequence */
- __IO uint32_t CNT; /*!< Description cluster[0]: Amount of values (duty cycles) in this
+ __IO uint32_t PTR; /*!< Description cluster[n]: Beginning address in RAM of this sequence */
+ __IO uint32_t CNT; /*!< Description cluster[n]: Number of values (duty cycles) in this
sequence */
- __IO uint32_t REFRESH; /*!< Description cluster[0]: Amount of additional PWM periods between
+ __IO uint32_t REFRESH; /*!< Description cluster[n]: Number of additional PWM periods between
samples loaded into compare register */
- __IO uint32_t ENDDELAY; /*!< Description cluster[0]: Time added after the sequence */
+ __IO uint32_t ENDDELAY; /*!< Description cluster[n]: Time added after the sequence */
__I uint32_t RESERVED1[4];
} PWM_SEQ_Type;
typedef struct {
- __IO uint32_t OUT[4]; /*!< Description collection[0]: Output pin select for PWM channel
- 0 */
+ __IO uint32_t OUT[4]; /*!< Description collection[n]: Output pin select for PWM channel
+ n */
} PWM_PSEL_Type;
typedef struct {
@@ -403,59 +415,59 @@ typedef struct {
} PDM_SAMPLE_Type;
typedef struct {
- __IO uint32_t ADDR; /*!< Description cluster[0]: Configure the word-aligned start address
- of region 0 to protect */
- __IO uint32_t SIZE; /*!< Description cluster[0]: Size of region to protect counting from
- address ACL[0].ADDR. Write '0' as no effect. */
- __IO uint32_t PERM; /*!< Description cluster[0]: Access permissions for region 0 as defined
- by start address ACL[0].ADDR and size ACL[0].SIZE */
+ __IO uint32_t ADDR; /*!< Description cluster[n]: Configure the word-aligned start address
+ of region n to protect */
+ __IO uint32_t SIZE; /*!< Description cluster[n]: Size of region to protect counting from
+ address ACL[n].ADDR. Write '0' as no effect. */
+ __IO uint32_t PERM; /*!< Description cluster[n]: Access permissions for region n as defined
+ by start address ACL[n].ADDR and size ACL[n].SIZE */
__IO uint32_t UNUSED0; /*!< Unspecified */
} ACL_ACL_Type;
typedef struct {
- __O uint32_t EN; /*!< Description cluster[0]: Enable channel group 0 */
- __O uint32_t DIS; /*!< Description cluster[0]: Disable channel group 0 */
+ __O uint32_t EN; /*!< Description cluster[n]: Enable channel group n */
+ __O uint32_t DIS; /*!< Description cluster[n]: Disable channel group n */
} PPI_TASKS_CHG_Type;
typedef struct {
- __IO uint32_t EEP; /*!< Description cluster[0]: Channel 0 event end-point */
- __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */
+ __IO uint32_t EEP; /*!< Description cluster[n]: Channel n event end-point */
+ __IO uint32_t TEP; /*!< Description cluster[n]: Channel n task end-point */
} PPI_CH_Type;
typedef struct {
- __IO uint32_t TEP; /*!< Description cluster[0]: Channel 0 task end-point */
+ __IO uint32_t TEP; /*!< Description cluster[n]: Channel n task end-point */
} PPI_FORK_Type;
typedef struct {
- __IO uint32_t WA; /*!< Description cluster[0]: Write access to region 0 detected */
- __IO uint32_t RA; /*!< Description cluster[0]: Read access to region 0 detected */
+ __IO uint32_t WA; /*!< Description cluster[n]: Write access to region n detected */
+ __IO uint32_t RA; /*!< Description cluster[n]: Read access to region n detected */
} MWU_EVENTS_REGION_Type;
typedef struct {
- __IO uint32_t WA; /*!< Description cluster[0]: Write access to peripheral region 0
+ __IO uint32_t WA; /*!< Description cluster[n]: Write access to peripheral region n
detected */
- __IO uint32_t RA; /*!< Description cluster[0]: Read access to peripheral region 0 detected */
+ __IO uint32_t RA; /*!< Description cluster[n]: Read access to peripheral region n detected */
} MWU_EVENTS_PREGION_Type;
typedef struct {
- __IO uint32_t SUBSTATWA; /*!< Description cluster[0]: Source of event/interrupt in region
- 0, write access detected while corresponding subregion was enabled
+ __IO uint32_t SUBSTATWA; /*!< Description cluster[n]: Source of event/interrupt in region
+ n, write access detected while corresponding subregion was enabled
for watching */
- __IO uint32_t SUBSTATRA; /*!< Description cluster[0]: Source of event/interrupt in region
- 0, read access detected while corresponding subregion was enabled
+ __IO uint32_t SUBSTATRA; /*!< Description cluster[n]: Source of event/interrupt in region
+ n, read access detected while corresponding subregion was enabled
for watching */
} MWU_PERREGION_Type;
typedef struct {
- __IO uint32_t START; /*!< Description cluster[0]: Start address for region 0 */
- __IO uint32_t END; /*!< Description cluster[0]: End address of region 0 */
+ __IO uint32_t START; /*!< Description cluster[n]: Start address for region n */
+ __IO uint32_t END; /*!< Description cluster[n]: End address of region n */
__I uint32_t RESERVED2[2];
} MWU_REGION_Type;
typedef struct {
- __I uint32_t START; /*!< Description cluster[0]: Reserved for future use */
- __I uint32_t END; /*!< Description cluster[0]: Reserved for future use */
- __IO uint32_t SUBS; /*!< Description cluster[0]: Subregions of region 0 */
+ __I uint32_t START; /*!< Description cluster[n]: Reserved for future use */
+ __I uint32_t END; /*!< Description cluster[n]: Reserved for future use */
+ __IO uint32_t SUBS; /*!< Description cluster[n]: Subregions of region n */
__I uint32_t RESERVED3;
} MWU_PREGION_Type;
@@ -493,23 +505,23 @@ typedef struct {
} I2S_PSEL_Type;
typedef struct {
- __I uint32_t EPIN[8]; /*!< Description collection[0]: IN endpoint halted status. Can be
+ __I uint32_t EPIN[8]; /*!< Description collection[n]: IN endpoint halted status. Can be
used as is as response to a GetStatus() request to endpoint. */
__I uint32_t RESERVED4;
- __I uint32_t EPOUT[8]; /*!< Description collection[0]: OUT endpoint halted status. Can be
+ __I uint32_t EPOUT[8]; /*!< Description collection[n]: OUT endpoint halted status. Can be
used as is as response to a GetStatus() request to endpoint. */
} USBD_HALTED_Type;
typedef struct {
- __IO uint32_t EPOUT[8]; /*!< Description collection[0]: Amount of bytes received last in
+ __IO uint32_t EPOUT[8]; /*!< Description collection[n]: Number of bytes received last in
the data stage of this OUT endpoint */
- __I uint32_t ISOOUT; /*!< Amount of bytes received last on this iso OUT data endpoint */
+ __I uint32_t ISOOUT; /*!< Number of bytes received last on this ISO OUT data endpoint */
} USBD_SIZE_Type;
typedef struct {
- __IO uint32_t PTR; /*!< Description cluster[0]: Data pointer */
- __IO uint32_t MAXCNT; /*!< Description cluster[0]: Maximum number of bytes to transfer */
- __I uint32_t AMOUNT; /*!< Description cluster[0]: Number of bytes transferred in the last
+ __IO uint32_t PTR; /*!< Description cluster[n]: Data pointer */
+ __IO uint32_t MAXCNT; /*!< Description cluster[n]: Maximum number of bytes to transfer */
+ __I uint32_t AMOUNT; /*!< Description cluster[n]: Number of bytes transferred in the last
transaction */
__I uint32_t RESERVED5[2];
} USBD_EPIN_Type;
@@ -521,9 +533,9 @@ typedef struct {
} USBD_ISOIN_Type;
typedef struct {
- __IO uint32_t PTR; /*!< Description cluster[0]: Data pointer */
- __IO uint32_t MAXCNT; /*!< Description cluster[0]: Maximum number of bytes to transfer */
- __I uint32_t AMOUNT; /*!< Description cluster[0]: Number of bytes transferred in the last
+ __IO uint32_t PTR; /*!< Description cluster[n]: Data pointer */
+ __IO uint32_t MAXCNT; /*!< Description cluster[n]: Maximum number of bytes to transfer */
+ __I uint32_t AMOUNT; /*!< Description cluster[n]: Number of bytes transferred in the last
transaction */
__I uint32_t RESERVED6[2];
} USBD_EPOUT_Type;
@@ -576,18 +588,22 @@ typedef struct { /*!< FICR Structure
__I uint32_t CODEPAGESIZE; /*!< Code memory page size */
__I uint32_t CODESIZE; /*!< Code memory size */
__I uint32_t RESERVED1[18];
- __I uint32_t DEVICEID[2]; /*!< Description collection[0]: Device identifier */
+ __I uint32_t DEVICEID[2]; /*!< Description collection[n]: Device identifier */
__I uint32_t RESERVED2[6];
- __I uint32_t ER[4]; /*!< Description collection[0]: Encryption root, word 0 */
- __I uint32_t IR[4]; /*!< Description collection[0]: Identity Root, word 0 */
+ __I uint32_t ER[4]; /*!< Description collection[n]: Encryption root, word n */
+ __I uint32_t IR[4]; /*!< Description collection[n]: Identity Root, word n */
__I uint32_t DEVICEADDRTYPE; /*!< Device address type */
- __I uint32_t DEVICEADDR[2]; /*!< Description collection[0]: Device address 0 */
+ __I uint32_t DEVICEADDR[2]; /*!< Description collection[n]: Device address n */
__I uint32_t RESERVED3[21];
FICR_INFO_Type INFO; /*!< Device info */
- __I uint32_t RESERVED4[185];
+ __I uint32_t RESERVED4[140];
+ __I uint32_t PRODTEST[3]; /*!< Description collection[n]: Production test signature n */
+ __I uint32_t RESERVED5[42];
FICR_TEMP_Type TEMP; /*!< Registers storing factory TEMP module linearization coefficients */
- __I uint32_t RESERVED5[2];
+ __I uint32_t RESERVED6[2];
FICR_NFC_Type NFC; /*!< Unspecified */
+ __I uint32_t RESERVED7[488];
+ FICR_TRNG90B_Type TRNG90B; /*!< NIST800-90B RNG calibration data */
} NRF_FICR_Type;
@@ -606,23 +622,73 @@ typedef struct { /*!< UICR Structure
__IO uint32_t UNUSED2; /*!< Unspecified */
__I uint32_t RESERVED0;
__IO uint32_t UNUSED3; /*!< Unspecified */
- __IO uint32_t NRFFW[15]; /*!< Description collection[0]: Reserved for Nordic firmware design */
- __IO uint32_t NRFHW[12]; /*!< Description collection[0]: Reserved for Nordic hardware design */
- __IO uint32_t CUSTOMER[32]; /*!< Description collection[0]: Reserved for customer */
+ __IO uint32_t NRFFW[15]; /*!< Description collection[n]: Reserved for Nordic firmware design */
+ __IO uint32_t NRFHW[12]; /*!< Description collection[n]: Reserved for Nordic hardware design */
+ __IO uint32_t CUSTOMER[32]; /*!< Description collection[n]: Reserved for customer */
__I uint32_t RESERVED1[64];
- __IO uint32_t PSELRESET[2]; /*!< Description collection[0]: Mapping of the nRESET function */
+ __IO uint32_t PSELRESET[2]; /*!< Description collection[n]: Mapping of the nRESET function */
__IO uint32_t APPROTECT; /*!< Access port protection */
__IO uint32_t NFCPINS; /*!< Setting of pins dedicated to NFC functionality: NFC antenna
or GPIO */
__IO uint32_t DEBUGCTRL; /*!< Processor debug control */
- __I uint32_t RESERVED2[59];
- __IO uint32_t DCDCDRIVE0; /*!< Set drive level for REG0 DCDC mode. Using high drive will slightly
- reduce DCDC efficiency. */
+ __I uint32_t RESERVED2[60];
__IO uint32_t REGOUT0; /*!< GPIO reference voltage / external output supply voltage in high
voltage mode */
} NRF_UICR_Type;
+/* ================================================================================ */
+/* ================ CLOCK ================ */
+/* ================================================================================ */
+
+
+/**
+ * @brief Clock control (CLOCK)
+ */
+
+typedef struct { /*!< CLOCK Structure */
+ __O uint32_t TASKS_HFCLKSTART; /*!< Start HFXO crystal oscillator */
+ __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFXO crystal oscillator */
+ __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK */
+ __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK */
+ __O uint32_t TASKS_CAL; /*!< Start calibration of LFRC */
+ __O uint32_t TASKS_CTSTART; /*!< Start calibration timer */
+ __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer */
+ __I uint32_t RESERVED0[57];
+ __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFXO crystal oscillator started */
+ __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK started */
+ __I uint32_t RESERVED1;
+ __IO uint32_t EVENTS_DONE; /*!< Calibration of LFRC completed */
+ __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout */
+ __I uint32_t RESERVED2[5];
+ __IO uint32_t EVENTS_CTSTARTED; /*!< Calibration timer has been started and is ready to process new
+ tasks */
+ __IO uint32_t EVENTS_CTSTOPPED; /*!< Calibration timer has been stopped and is ready to process new
+ tasks */
+ __I uint32_t RESERVED3[117];
+ __IO uint32_t INTENSET; /*!< Enable interrupt */
+ __IO uint32_t INTENCLR; /*!< Disable interrupt */
+ __I uint32_t RESERVED4[63];
+ __I uint32_t HFCLKRUN; /*!< Status indicating that HFCLKSTART task has been triggered */
+ __I uint32_t HFCLKSTAT; /*!< HFCLK status */
+ __I uint32_t RESERVED5;
+ __I uint32_t LFCLKRUN; /*!< Status indicating that LFCLKSTART task has been triggered */
+ __I uint32_t LFCLKSTAT; /*!< LFCLK status */
+ __I uint32_t LFCLKSRCCOPY; /*!< Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */
+ __I uint32_t RESERVED6[62];
+ __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */
+ __I uint32_t RESERVED7[3];
+ __IO uint32_t HFXODEBOUNCE; /*!< HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART
+ task. */
+ __I uint32_t RESERVED8[3];
+ __IO uint32_t CTIV; /*!< Calibration timer interval */
+ __I uint32_t RESERVED9[8];
+ __IO uint32_t TRACECONFIG; /*!< Clocking options for the trace port debug interface */
+ __I uint32_t RESERVED10[21];
+ __IO uint32_t LFRCMODE; /*!< LFRC mode configuration */
+} NRF_CLOCK_Type;
+
+
/* ================================================================================ */
/* ================ POWER ================ */
/* ================================================================================ */
@@ -656,7 +722,7 @@ typedef struct { /*!< POWER Structure
__I uint32_t RESERVED7[49];
__O uint32_t SYSTEMOFF; /*!< System OFF register */
__I uint32_t RESERVED8[3];
- __IO uint32_t POFCON; /*!< Power failure comparator configuration */
+ __IO uint32_t POFCON; /*!< Power-fail comparator configuration */
__I uint32_t RESERVED9[2];
__IO uint32_t GPREGRET; /*!< General purpose retention register */
__IO uint32_t GPREGRET2; /*!< General purpose retention register */
@@ -671,65 +737,13 @@ typedef struct { /*!< POWER Structure
} NRF_POWER_Type;
-/* ================================================================================ */
-/* ================ CLOCK ================ */
-/* ================================================================================ */
-
-
-/**
- * @brief Clock control (CLOCK)
- */
-
-typedef struct { /*!< CLOCK Structure */
- __O uint32_t TASKS_HFCLKSTART; /*!< Start HFCLK crystal oscillator */
- __O uint32_t TASKS_HFCLKSTOP; /*!< Stop HFCLK crystal oscillator */
- __O uint32_t TASKS_LFCLKSTART; /*!< Start LFCLK source */
- __O uint32_t TASKS_LFCLKSTOP; /*!< Stop LFCLK source */
- __O uint32_t TASKS_CAL; /*!< Start calibration of LFRC or LFULP oscillator */
- __O uint32_t TASKS_CTSTART; /*!< Start calibration timer */
- __O uint32_t TASKS_CTSTOP; /*!< Stop calibration timer */
- __I uint32_t RESERVED0[57];
- __IO uint32_t EVENTS_HFCLKSTARTED; /*!< HFCLK oscillator started */
- __IO uint32_t EVENTS_LFCLKSTARTED; /*!< LFCLK started */
- __I uint32_t RESERVED1;
- __IO uint32_t EVENTS_DONE; /*!< Calibration of LFCLK RC oscillator complete event */
- __IO uint32_t EVENTS_CTTO; /*!< Calibration timer timeout */
- __I uint32_t RESERVED2[5];
- __IO uint32_t EVENTS_CTSTARTED; /*!< Calibration timer has been started and is ready to process new
- tasks */
- __IO uint32_t EVENTS_CTSTOPPED; /*!< Calibration timer has been stopped and is ready to process new
- tasks */
- __I uint32_t RESERVED3[117];
- __IO uint32_t INTENSET; /*!< Enable interrupt */
- __IO uint32_t INTENCLR; /*!< Disable interrupt */
- __I uint32_t RESERVED4[63];
- __I uint32_t HFCLKRUN; /*!< Status indicating that HFCLKSTART task has been triggered */
- __I uint32_t HFCLKSTAT; /*!< HFCLK status */
- __I uint32_t RESERVED5;
- __I uint32_t LFCLKRUN; /*!< Status indicating that LFCLKSTART task has been triggered */
- __I uint32_t LFCLKSTAT; /*!< LFCLK status */
- __I uint32_t LFCLKSRCCOPY; /*!< Copy of LFCLKSRC register, set when LFCLKSTART task was triggered */
- __I uint32_t RESERVED6[62];
- __IO uint32_t LFCLKSRC; /*!< Clock source for the LFCLK */
- __I uint32_t RESERVED7[3];
- __IO uint32_t HFXODEBOUNCE; /*!< HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART
- task. */
- __I uint32_t RESERVED8[3];
- __IO uint32_t CTIV; /*!< Calibration timer interval */
- __I uint32_t RESERVED9[8];
- __IO uint32_t TRACECONFIG; /*!< Clocking options for the Trace Port debug interface */
- __I uint32_t RESERVED10[21];
- __IO uint32_t LFRCMODE; /*!< LFRC mode configuration */
-} NRF_CLOCK_Type;
-
-
/* ================================================================================ */
/* ================ RADIO ================ */
/* ================================================================================ */
/**
- * @brief 2.4 GHz Radio (RADIO)
+ * @brief 2.4 GHz radio (RADIO)
*/
typedef struct { /*!< RADIO Structure */
@@ -739,14 +753,14 @@ typedef struct { /*!< RADIO Structure
__O uint32_t TASKS_STOP; /*!< Stop RADIO */
__O uint32_t TASKS_DISABLE; /*!< Disable RADIO */
__O uint32_t TASKS_RSSISTART; /*!< Start the RSSI and take one single sample of the receive signal
- strength. */
+ strength */
__O uint32_t TASKS_RSSISTOP; /*!< Stop the RSSI measurement */
__O uint32_t TASKS_BCSTART; /*!< Start the bit counter */
__O uint32_t TASKS_BCSTOP; /*!< Stop the bit counter */
- __O uint32_t TASKS_EDSTART; /*!< Start the Energy Detect measurement used in IEEE 802.15.4 mode */
- __O uint32_t TASKS_EDSTOP; /*!< Stop the Energy Detect measurement */
- __O uint32_t TASKS_CCASTART; /*!< Start the Clear Channel Assessment used in IEEE 802.15.4 mode */
- __O uint32_t TASKS_CCASTOP; /*!< Stop the Clear Channel Assessment */
+ __O uint32_t TASKS_EDSTART; /*!< Start the energy detect measurement used in IEEE 802.15.4 mode */
+ __O uint32_t TASKS_EDSTOP; /*!< Stop the energy detect measurement */
+ __O uint32_t TASKS_CCASTART; /*!< Start the clear channel assessment used in IEEE 802.15.4 mode */
+ __O uint32_t TASKS_CCASTOP; /*!< Stop the clear channel assessment */
__I uint32_t RESERVED0[51];
__IO uint32_t EVENTS_READY; /*!< RADIO has ramped up and is ready to be started */
__IO uint32_t EVENTS_ADDRESS; /*!< Address sent or received */
@@ -755,16 +769,16 @@ typedef struct { /*!< RADIO Structure
__IO uint32_t EVENTS_DISABLED; /*!< RADIO has been disabled */
__IO uint32_t EVENTS_DEVMATCH; /*!< A device address match occurred on the last received packet */
__IO uint32_t EVENTS_DEVMISS; /*!< No device address match occurred on the last received packet */
- __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of receive signal strength complete. */
+ __IO uint32_t EVENTS_RSSIEND; /*!< Sampling of receive signal strength complete */
__I uint32_t RESERVED1[2];
- __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value. */
+ __IO uint32_t EVENTS_BCMATCH; /*!< Bit counter reached bit count value */
__I uint32_t RESERVED2;
__IO uint32_t EVENTS_CRCOK; /*!< Packet received with CRC ok */
__IO uint32_t EVENTS_CRCERROR; /*!< Packet received with CRC error */
__IO uint32_t EVENTS_FRAMESTART; /*!< IEEE 802.15.4 length field received */
- __IO uint32_t EVENTS_EDEND; /*!< Sampling of Energy Detection complete. A new ED sample is ready
- for readout from the RADIO.EDSAMPLE register */
- __IO uint32_t EVENTS_EDSTOPPED; /*!< The sampling of Energy Detection has stopped */
+ __IO uint32_t EVENTS_EDEND; /*!< Sampling of energy detection complete. A new ED sample is ready
+ for readout from the RADIO.EDSAMPLE register. */
+ __IO uint32_t EVENTS_EDSTOPPED; /*!< The sampling of energy detection has stopped */
__IO uint32_t EVENTS_CCAIDLE; /*!< Wireless medium in idle - clear to send */
__IO uint32_t EVENTS_CCABUSY; /*!< Wireless medium busy - do not send */
__IO uint32_t EVENTS_CCASTOPPED; /*!< The CCA has stopped */
@@ -772,7 +786,7 @@ typedef struct { /*!< RADIO Structure
to Ble_LR500Kbit. */
__IO uint32_t EVENTS_TXREADY; /*!< RADIO has ramped up and is ready to be started TX path */
__IO uint32_t EVENTS_RXREADY; /*!< RADIO has ramped up and is ready to be started RX path */
- __IO uint32_t EVENTS_MHRMATCH; /*!< MAC Header match found. */
+ __IO uint32_t EVENTS_MHRMATCH; /*!< MAC header match found */
__I uint32_t RESERVED3[3];
__IO uint32_t EVENTS_PHYEND; /*!< Generated in Ble_LR125Kbit, Ble_LR500Kbit and BleIeee802154_250Kbit
modes when last bit is sent on air. */
@@ -805,7 +819,7 @@ typedef struct { /*!< RADIO Structure
__IO uint32_t CRCPOLY; /*!< CRC polynomial */
__IO uint32_t CRCINIT; /*!< CRC initial value */
__I uint32_t RESERVED9;
- __IO uint32_t TIFS; /*!< Inter Frame Spacing in us */
+ __IO uint32_t TIFS; /*!< Interframe spacing in us */
__I uint32_t RSSISAMPLE; /*!< RSSI sample */
__I uint32_t RESERVED10;
__I uint32_t STATE; /*!< Current radio state */
@@ -813,23 +827,69 @@ typedef struct { /*!< RADIO Structure
__I uint32_t RESERVED11[2];
__IO uint32_t BCC; /*!< Bit counter compare */
__I uint32_t RESERVED12[39];
- __IO uint32_t DAB[8]; /*!< Description collection[0]: Device address base segment 0 */
- __IO uint32_t DAP[8]; /*!< Description collection[0]: Device address prefix 0 */
+ __IO uint32_t DAB[8]; /*!< Description collection[n]: Device address base segment n */
+ __IO uint32_t DAP[8]; /*!< Description collection[n]: Device address prefix n */
__IO uint32_t DACNF; /*!< Device address match configuration */
- __IO uint32_t MHRMATCHCONF; /*!< Search Pattern Configuration */
+ __IO uint32_t MHRMATCHCONF; /*!< Search pattern configuration */
__IO uint32_t MHRMATCHMAS; /*!< Pattern mask */
__I uint32_t RESERVED13;
__IO uint32_t MODECNF0; /*!< Radio mode configuration register 0 */
__I uint32_t RESERVED14[3];
- __IO uint32_t SFD; /*!< IEEE 802.15.4 Start of Frame Delimiter */
- __IO uint32_t EDCNT; /*!< IEEE 802.15.4 Energy Detect Loop Count */
- __IO uint32_t EDSAMPLE; /*!< IEEE 802.15.4 Energy Detect Level */
- __IO uint32_t CCACTRL; /*!< IEEE 802.15.4 Clear Channel Assessment Control */
+ __IO uint32_t SFD; /*!< IEEE 802.15.4 start of frame delimiter */
+ __IO uint32_t EDCNT; /*!< IEEE 802.15.4 energy detect loop count */
+ __IO uint32_t EDSAMPLE; /*!< IEEE 802.15.4 energy detect level */
+ __IO uint32_t CCACTRL; /*!< IEEE 802.15.4 clear channel assessment control */
__I uint32_t RESERVED15[611];
__IO uint32_t POWER; /*!< Peripheral power control */
} NRF_RADIO_Type;
+/* ================================================================================ */
+/* ================ UART ================ */
+/* ================================================================================ */
+
+
+/**
+ * @brief Universal Asynchronous Receiver/Transmitter (UART)
+ */
+
+typedef struct { /*!< UART Structure */
+ __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */
+ __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */
+ __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */
+ __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */
+ __I uint32_t RESERVED0[3];
+ __O uint32_t TASKS_SUSPEND; /*!< Suspend UART */
+ __I uint32_t RESERVED1[56];
+ __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */
+ __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */
+ __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD */
+ __I uint32_t RESERVED2[4];
+ __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */
+ __I uint32_t RESERVED3;
+ __IO uint32_t EVENTS_ERROR; /*!< Error detected */
+ __I uint32_t RESERVED4[7];
+ __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */
+ __I uint32_t RESERVED5[46];
+ __IO uint32_t SHORTS; /*!< Shortcut register */
+ __I uint32_t RESERVED6[64];
+ __IO uint32_t INTENSET; /*!< Enable interrupt */
+ __IO uint32_t INTENCLR; /*!< Disable interrupt */
+ __I uint32_t RESERVED7[93];
+ __IO uint32_t ERRORSRC; /*!< Error source */
+ __I uint32_t RESERVED8[31];
+ __IO uint32_t ENABLE; /*!< Enable UART */
+ __I uint32_t RESERVED9;
+ UART_PSEL_Type PSEL; /*!< Unspecified */
+ __I uint32_t RXD; /*!< RXD register */
+ __O uint32_t TXD; /*!< TXD register */
+ __I uint32_t RESERVED10;
+ __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */
+ __I uint32_t RESERVED11[17];
+ __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */
+} NRF_UART_Type;
+
+
/* ================================================================================ */
/* ================ UARTE ================ */
/* ================================================================================ */
@@ -888,49 +948,32 @@ typedef struct { /*!< UARTE Structure
/* ================================================================================ */
-/* ================ UART ================ */
+/* ================ SPI ================ */
/* ================================================================================ */
/**
- * @brief Universal Asynchronous Receiver/Transmitter (UART)
+ * @brief Serial Peripheral Interface 0 (SPI)
*/
-typedef struct { /*!< UART Structure */
- __O uint32_t TASKS_STARTRX; /*!< Start UART receiver */
- __O uint32_t TASKS_STOPRX; /*!< Stop UART receiver */
- __O uint32_t TASKS_STARTTX; /*!< Start UART transmitter */
- __O uint32_t TASKS_STOPTX; /*!< Stop UART transmitter */
- __I uint32_t RESERVED0[3];
- __O uint32_t TASKS_SUSPEND; /*!< Suspend UART */
- __I uint32_t RESERVED1[56];
- __IO uint32_t EVENTS_CTS; /*!< CTS is activated (set low). Clear To Send. */
- __IO uint32_t EVENTS_NCTS; /*!< CTS is deactivated (set high). Not Clear To Send. */
- __IO uint32_t EVENTS_RXDRDY; /*!< Data received in RXD */
- __I uint32_t RESERVED2[4];
- __IO uint32_t EVENTS_TXDRDY; /*!< Data sent from TXD */
- __I uint32_t RESERVED3;
- __IO uint32_t EVENTS_ERROR; /*!< Error detected */
- __I uint32_t RESERVED4[7];
- __IO uint32_t EVENTS_RXTO; /*!< Receiver timeout */
- __I uint32_t RESERVED5[46];
- __IO uint32_t SHORTS; /*!< Shortcut register */
- __I uint32_t RESERVED6[64];
+typedef struct { /*!< SPI Structure */
+ __I uint32_t RESERVED0[66];
+ __IO uint32_t EVENTS_READY; /*!< TXD byte sent and RXD byte received */
+ __I uint32_t RESERVED1[126];
__IO uint32_t INTENSET; /*!< Enable interrupt */
__IO uint32_t INTENCLR; /*!< Disable interrupt */
- __I uint32_t RESERVED7[93];
- __IO uint32_t ERRORSRC; /*!< Error source */
- __I uint32_t RESERVED8[31];
- __IO uint32_t ENABLE; /*!< Enable UART */
- __I uint32_t RESERVED9;
- UART_PSEL_Type PSEL; /*!< Unspecified */
+ __I uint32_t RESERVED2[125];
+ __IO uint32_t ENABLE; /*!< Enable SPI */
+ __I uint32_t RESERVED3;
+ SPI_PSEL_Type PSEL; /*!< Unspecified */
+ __I uint32_t RESERVED4;
__I uint32_t RXD; /*!< RXD register */
- __O uint32_t TXD; /*!< TXD register */
- __I uint32_t RESERVED10;
- __IO uint32_t BAUDRATE; /*!< Baud rate. Accuracy depends on the HFCLK source selected. */
- __I uint32_t RESERVED11[17];
- __IO uint32_t CONFIG; /*!< Configuration of parity and hardware flow control */
-} NRF_UART_Type;
+ __IO uint32_t TXD; /*!< TXD register */
+ __I uint32_t RESERVED5;
+ __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */
+ __I uint32_t RESERVED6[11];
+ __IO uint32_t CONFIG; /*!< Configuration register */
+} NRF_SPI_Type;
/* ================================================================================ */
@@ -1035,6 +1078,57 @@ typedef struct { /*!< SPIS Structure
} NRF_SPIS_Type;
+/* ================================================================================ */
+/* ================ TWI ================ */
+/* ================================================================================ */
+
+
+/**
+ * @brief I2C compatible Two-Wire Interface 0 (TWI)
+ */
+
+typedef struct { /*!< TWI Structure */
+ __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */
+ __I uint32_t RESERVED0;
+ __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */
+ __I uint32_t RESERVED1[2];
+ __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */
+ __I uint32_t RESERVED2;
+ __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */
+ __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */
+ __I uint32_t RESERVED3[56];
+ __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */
+ __IO uint32_t EVENTS_RXDREADY; /*!< TWI RXD byte received */
+ __I uint32_t RESERVED4[4];
+ __IO uint32_t EVENTS_TXDSENT; /*!< TWI TXD byte sent */
+ __I uint32_t RESERVED5;
+ __IO uint32_t EVENTS_ERROR; /*!< TWI error */
+ __I uint32_t RESERVED6[4];
+ __IO uint32_t EVENTS_BB; /*!< TWI byte boundary, generated before each byte that is sent or
+ received */
+ __I uint32_t RESERVED7[3];
+ __IO uint32_t EVENTS_SUSPENDED; /*!< TWI entered the suspended state */
+ __I uint32_t RESERVED8[45];
+ __IO uint32_t SHORTS; /*!< Shortcut register */
+ __I uint32_t RESERVED9[64];
+ __IO uint32_t INTENSET; /*!< Enable interrupt */
+ __IO uint32_t INTENCLR; /*!< Disable interrupt */
+ __I uint32_t RESERVED10[110];
+ __IO uint32_t ERRORSRC; /*!< Error source */
+ __I uint32_t RESERVED11[14];
+ __IO uint32_t ENABLE; /*!< Enable TWI */
+ __I uint32_t RESERVED12;
+ TWI_PSEL_Type PSEL; /*!< Unspecified */
+ __I uint32_t RESERVED13[2];
+ __I uint32_t RXD; /*!< RXD register */
+ __IO uint32_t TXD; /*!< TXD register */
+ __I uint32_t RESERVED14;
+ __IO uint32_t FREQUENCY; /*!< TWI frequency. Accuracy depends on the HFCLK source selected. */
+ __I uint32_t RESERVED15[24];
+ __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */
+} NRF_TWI_Type;
+
+
/* ================================================================================ */
/* ================ TWIM ================ */
/* ================================================================================ */
@@ -1097,130 +1191,50 @@ typedef struct { /*!< TWIM Structure
* @brief I2C compatible Two-Wire Slave Interface with EasyDMA 0 (TWIS)
*/
-typedef struct { /*!< TWIS Structure */
- __I uint32_t RESERVED0[5];
- __O uint32_t TASKS_STOP; /*!< Stop TWI transaction */
- __I uint32_t RESERVED1;
- __O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */
- __O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */
- __I uint32_t RESERVED2[3];
- __O uint32_t TASKS_PREPARERX; /*!< Prepare the TWI slave to respond to a write command */
- __O uint32_t TASKS_PREPARETX; /*!< Prepare the TWI slave to respond to a read command */
- __I uint32_t RESERVED3[51];
- __IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */
- __I uint32_t RESERVED4[7];
- __IO uint32_t EVENTS_ERROR; /*!< TWI error */
- __I uint32_t RESERVED5[9];
- __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */
- __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */
- __I uint32_t RESERVED6[4];
- __IO uint32_t EVENTS_WRITE; /*!< Write command received */
- __IO uint32_t EVENTS_READ; /*!< Read command received */
- __I uint32_t RESERVED7[37];
- __IO uint32_t SHORTS; /*!< Shortcut register */
- __I uint32_t RESERVED8[63];
- __IO uint32_t INTEN; /*!< Enable or disable interrupt */
- __IO uint32_t INTENSET; /*!< Enable interrupt */
- __IO uint32_t INTENCLR; /*!< Disable interrupt */
- __I uint32_t RESERVED9[113];
- __IO uint32_t ERRORSRC; /*!< Error source */
- __I uint32_t MATCH; /*!< Status register indicating which address had a match */
- __I uint32_t RESERVED10[10];
- __IO uint32_t ENABLE; /*!< Enable TWIS */
- __I uint32_t RESERVED11;
- TWIS_PSEL_Type PSEL; /*!< Unspecified */
- __I uint32_t RESERVED12[9];
- TWIS_RXD_Type RXD; /*!< RXD EasyDMA channel */
- __I uint32_t RESERVED13;
- TWIS_TXD_Type TXD; /*!< TXD EasyDMA channel */
- __I uint32_t RESERVED14[14];
- __IO uint32_t ADDRESS[2]; /*!< Description collection[0]: TWI slave address 0 */
- __I uint32_t RESERVED15;
- __IO uint32_t CONFIG; /*!< Configuration register for the address match mechanism */
- __I uint32_t RESERVED16[10];
- __IO uint32_t ORC; /*!< Over-read character. Character sent out in case of an over-read
- of the transmit buffer. */
-} NRF_TWIS_Type;
-
-
-/* ================================================================================ */
-/* ================ SPI ================ */
-/* ================================================================================ */
-
-
-/**
- * @brief Serial Peripheral Interface 0 (SPI)
- */
-
-typedef struct { /*!< SPI Structure */
- __I uint32_t RESERVED0[66];
- __IO uint32_t EVENTS_READY; /*!< TXD byte sent and RXD byte received */
- __I uint32_t RESERVED1[126];
- __IO uint32_t INTENSET; /*!< Enable interrupt */
- __IO uint32_t INTENCLR; /*!< Disable interrupt */
- __I uint32_t RESERVED2[125];
- __IO uint32_t ENABLE; /*!< Enable SPI */
- __I uint32_t RESERVED3;
- SPI_PSEL_Type PSEL; /*!< Unspecified */
- __I uint32_t RESERVED4;
- __I uint32_t RXD; /*!< RXD register */
- __IO uint32_t TXD; /*!< TXD register */
- __I uint32_t RESERVED5;
- __IO uint32_t FREQUENCY; /*!< SPI frequency. Accuracy depends on the HFCLK source selected. */
- __I uint32_t RESERVED6[11];
- __IO uint32_t CONFIG; /*!< Configuration register */
-} NRF_SPI_Type;
-
-
-/* ================================================================================ */
-/* ================ TWI ================ */
-/* ================================================================================ */
-
-
-/**
- * @brief I2C compatible Two-Wire Interface 0 (TWI)
- */
-
-typedef struct { /*!< TWI Structure */
- __O uint32_t TASKS_STARTRX; /*!< Start TWI receive sequence */
- __I uint32_t RESERVED0;
- __O uint32_t TASKS_STARTTX; /*!< Start TWI transmit sequence */
- __I uint32_t RESERVED1[2];
+typedef struct { /*!< TWIS Structure */
+ __I uint32_t RESERVED0[5];
__O uint32_t TASKS_STOP; /*!< Stop TWI transaction */
- __I uint32_t RESERVED2;
+ __I uint32_t RESERVED1;
__O uint32_t TASKS_SUSPEND; /*!< Suspend TWI transaction */
__O uint32_t TASKS_RESUME; /*!< Resume TWI transaction */
- __I uint32_t RESERVED3[56];
+ __I uint32_t RESERVED2[3];
+ __O uint32_t TASKS_PREPARERX; /*!< Prepare the TWI slave to respond to a write command */
+ __O uint32_t TASKS_PREPARETX; /*!< Prepare the TWI slave to respond to a read command */
+ __I uint32_t RESERVED3[51];
__IO uint32_t EVENTS_STOPPED; /*!< TWI stopped */
- __IO uint32_t EVENTS_RXDREADY; /*!< TWI RXD byte received */
- __I uint32_t RESERVED4[4];
- __IO uint32_t EVENTS_TXDSENT; /*!< TWI TXD byte sent */
- __I uint32_t RESERVED5;
+ __I uint32_t RESERVED4[7];
__IO uint32_t EVENTS_ERROR; /*!< TWI error */
+ __I uint32_t RESERVED5[9];
+ __IO uint32_t EVENTS_RXSTARTED; /*!< Receive sequence started */
+ __IO uint32_t EVENTS_TXSTARTED; /*!< Transmit sequence started */
__I uint32_t RESERVED6[4];
- __IO uint32_t EVENTS_BB; /*!< TWI byte boundary, generated before each byte that is sent or
- received */
- __I uint32_t RESERVED7[3];
- __IO uint32_t EVENTS_SUSPENDED; /*!< TWI entered the suspended state */
- __I uint32_t RESERVED8[45];
+ __IO uint32_t EVENTS_WRITE; /*!< Write command received */
+ __IO uint32_t EVENTS_READ; /*!< Read command received */
+ __I uint32_t RESERVED7[37];
__IO uint32_t SHORTS; /*!< Shortcut register */
- __I uint32_t RESERVED9[64];
+ __I uint32_t RESERVED8[63];
+ __IO uint32_t INTEN; /*!< Enable or disable interrupt */
__IO uint32_t INTENSET; /*!< Enable interrupt */
__IO uint32_t INTENCLR; /*!< Disable interrupt */
- __I uint32_t RESERVED10[110];
+ __I uint32_t RESERVED9[113];
__IO uint32_t ERRORSRC; /*!< Error source */
- __I uint32_t RESERVED11[14];
- __IO uint32_t ENABLE; /*!< Enable TWI */
- __I uint32_t RESERVED12;
- TWI_PSEL_Type PSEL; /*!< Unspecified */
- __I uint32_t RESERVED13[2];
- __I uint32_t RXD; /*!< RXD register */
- __IO uint32_t TXD; /*!< TXD register */
- __I uint32_t RESERVED14;
- __IO uint32_t FREQUENCY; /*!< TWI frequency. Accuracy depends on the HFCLK source selected. */
- __I uint32_t RESERVED15[24];
- __IO uint32_t ADDRESS; /*!< Address used in the TWI transfer */
-} NRF_TWI_Type;
+ __I uint32_t MATCH; /*!< Status register indicating which address had a match */
+ __I uint32_t RESERVED10[10];
+ __IO uint32_t ENABLE; /*!< Enable TWIS */
+ __I uint32_t RESERVED11;
+ TWIS_PSEL_Type PSEL; /*!< Unspecified */
+ __I uint32_t RESERVED12[9];
+ TWIS_RXD_Type RXD; /*!< RXD EasyDMA channel */
+ __I uint32_t RESERVED13;
+ TWIS_TXD_Type TXD; /*!< TXD EasyDMA channel */
+ __I uint32_t RESERVED14[14];
+ __IO uint32_t ADDRESS[2]; /*!< Description collection[n]: TWI slave address n */
+ __I uint32_t RESERVED15;
+ __IO uint32_t CONFIG; /*!< Configuration register for the address match mechanism */
+ __I uint32_t RESERVED16[10];
+ __IO uint32_t ORC; /*!< Over-read character. Character sent out in case of an over-read
+ of the transmit buffer. */
+} NRF_TWIS_Type;
/* ================================================================================ */
@@ -1277,9 +1291,11 @@ typedef struct { /*!< NFCT Structure
__I uint32_t RESERVED9;
NFCT_FRAMESTATUS_Type FRAMESTATUS; /*!< Unspecified */
__I uint32_t NFCTAGSTATE; /*!< NfcTag state register */
- __I uint32_t RESERVED10[10];
+ __I uint32_t RESERVED10[3];
+ __I uint32_t SLEEPSTATE; /*!< Sleep state during automatic collision resolution */
+ __I uint32_t RESERVED11[6];
__I uint32_t FIELDPRESENT; /*!< Indicates the presence or not of a valid field */
- __I uint32_t RESERVED11[49];
+ __I uint32_t RESERVED12[49];
__IO uint32_t FRAMEDELAYMIN; /*!< Minimum frame delay */
__IO uint32_t FRAMEDELAYMAX; /*!< Maximum frame delay */
__IO uint32_t FRAMEDELAYMODE; /*!< Configuration register for the Frame Delay Timer */
@@ -1288,7 +1304,7 @@ typedef struct { /*!< NFCT Structure
each */
NFCT_TXD_Type TXD; /*!< Unspecified */
NFCT_RXD_Type RXD; /*!< Unspecified */
- __I uint32_t RESERVED12[26];
+ __I uint32_t RESERVED13[26];
__IO uint32_t NFCID1_LAST; /*!< Last NFCID1 part (4, 7 or 10 bytes ID) */
__IO uint32_t NFCID1_2ND_LAST; /*!< Second last NFCID1 part (7 or 10 bytes ID) */
__IO uint32_t NFCID1_3RD_LAST; /*!< Third last NFCID1 part (10 bytes ID) */
@@ -1309,17 +1325,17 @@ typedef struct { /*!< NFCT Structure
*/
typedef struct { /*!< GPIOTE Structure */
- __O uint32_t TASKS_OUT[8]; /*!< Description collection[0]: Task for writing to pin specified
- in CONFIG[0].PSEL. Action on pin is configured in CONFIG[0].POLARITY. */
+ __O uint32_t TASKS_OUT[8]; /*!< Description collection[n]: Task for writing to pin specified
+ in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. */
__I uint32_t RESERVED0[4];
- __O uint32_t TASKS_SET[8]; /*!< Description collection[0]: Task for writing to pin specified
- in CONFIG[0].PSEL. Action on pin is to set it high. */
+ __O uint32_t TASKS_SET[8]; /*!< Description collection[n]: Task for writing to pin specified
+ in CONFIG[n].PSEL. Action on pin is to set it high. */
__I uint32_t RESERVED1[4];
- __O uint32_t TASKS_CLR[8]; /*!< Description collection[0]: Task for writing to pin specified
- in CONFIG[0].PSEL. Action on pin is to set it low. */
+ __O uint32_t TASKS_CLR[8]; /*!< Description collection[n]: Task for writing to pin specified
+ in CONFIG[n].PSEL. Action on pin is to set it low. */
__I uint32_t RESERVED2[32];
- __IO uint32_t EVENTS_IN[8]; /*!< Description collection[0]: Event generated from pin specified
- in CONFIG[0].PSEL */
+ __IO uint32_t EVENTS_IN[8]; /*!< Description collection[n]: Event generated from pin specified
+ in CONFIG[n].PSEL */
__I uint32_t RESERVED3[23];
__IO uint32_t EVENTS_PORT; /*!< Event generated from multiple input GPIO pins with SENSE mechanism
enabled */
@@ -1327,7 +1343,7 @@ typedef struct { /*!< GPIOTE Structure
__IO uint32_t INTENSET; /*!< Enable interrupt */
__IO uint32_t INTENCLR; /*!< Disable interrupt */
__I uint32_t RESERVED5[129];
- __IO uint32_t CONFIG[8]; /*!< Description collection[0]: Configuration for OUT[n], SET[n]
+ __IO uint32_t CONFIG[8]; /*!< Description collection[n]: Configuration for OUT[n], SET[n]
and CLR[n] tasks and IN[n] event */
} NRF_GPIOTE_Type;
@@ -1338,23 +1354,23 @@ typedef struct { /*!< GPIOTE Structure
/**
- * @brief Analog to Digital Converter (SAADC)
+ * @brief Successive approximation register (SAR) analog-to-digital converter (SAADC)
*/
typedef struct { /*!< SAADC Structure */
- __O uint32_t TASKS_START; /*!< Start the ADC and prepare the result buffer in RAM */
- __O uint32_t TASKS_SAMPLE; /*!< Take one ADC sample, if scan is enabled all channels are sampled */
- __O uint32_t TASKS_STOP; /*!< Stop the ADC and terminate any on-going conversion */
+ __O uint32_t TASKS_START; /*!< Starts the SAADC and prepares the result buffer in RAM */
+ __O uint32_t TASKS_SAMPLE; /*!< Takes one SAADC sample */
+ __O uint32_t TASKS_STOP; /*!< Stops the SAADC and terminates all on-going conversions */
__O uint32_t TASKS_CALIBRATEOFFSET; /*!< Starts offset auto-calibration */
__I uint32_t RESERVED0[60];
- __IO uint32_t EVENTS_STARTED; /*!< The ADC has started */
- __IO uint32_t EVENTS_END; /*!< The ADC has filled up the Result buffer */
- __IO uint32_t EVENTS_DONE; /*!< A conversion task has been completed. Depending on the mode,
+ __IO uint32_t EVENTS_STARTED; /*!< The SAADC has started */
+ __IO uint32_t EVENTS_END; /*!< The SAADC has filled up the result buffer */
+ __IO uint32_t EVENTS_DONE; /*!< A conversion task has been completed. Depending on the configuration,
multiple conversions might be needed for a result to be transferred
to RAM. */
- __IO uint32_t EVENTS_RESULTDONE; /*!< A result is ready to get transferred to RAM. */
+ __IO uint32_t EVENTS_RESULTDONE; /*!< Result ready for transfer to RAM */
__IO uint32_t EVENTS_CALIBRATEDONE; /*!< Calibration is complete */
- __IO uint32_t EVENTS_STOPPED; /*!< The ADC has stopped */
+ __IO uint32_t EVENTS_STOPPED; /*!< The SAADC has stopped */
SAADC_EVENTS_CH_Type EVENTS_CH[8]; /*!< Unspecified */
__I uint32_t RESERVED1[106];
__IO uint32_t INTEN; /*!< Enable or disable interrupt */
@@ -1363,14 +1379,14 @@ typedef struct { /*!< SAADC Structure
__I uint32_t RESERVED2[61];
__I uint32_t STATUS; /*!< Status */
__I uint32_t RESERVED3[63];
- __IO uint32_t ENABLE; /*!< Enable or disable ADC */
+ __IO uint32_t ENABLE; /*!< Enable or disable SAADC */
__I uint32_t RESERVED4[3];
SAADC_CH_Type CH[8]; /*!< Unspecified */
__I uint32_t RESERVED5[24];
__IO uint32_t RESOLUTION; /*!< Resolution configuration */
- __IO uint32_t OVERSAMPLE; /*!< Oversampling configuration. OVERSAMPLE should not be combined
- with SCAN. The RESOLUTION is applied before averaging, thus
- for high OVERSAMPLE a higher RESOLUTION should be used. */
+ __IO uint32_t OVERSAMPLE; /*!< Oversampling configuration. The RESOLUTION is applied before
+ averaging, thus for high OVERSAMPLE a higher RESOLUTION should
+ be used. */
__IO uint32_t SAMPLERATE; /*!< Controls normal or continuous sample rate */
__I uint32_t RESERVED6[12];
SAADC_RESULT_Type RESULT; /*!< RESULT EasyDMA channel */
@@ -1393,9 +1409,9 @@ typedef struct { /*!< TIMER Structure
__O uint32_t TASKS_CLEAR; /*!< Clear time */
__O uint32_t TASKS_SHUTDOWN; /*!< Deprecated register - Shut down timer */
__I uint32_t RESERVED0[11];
- __O uint32_t TASKS_CAPTURE[6]; /*!< Description collection[0]: Capture Timer value to CC[0] register */
+ __O uint32_t TASKS_CAPTURE[6]; /*!< Description collection[n]: Capture Timer value to CC[n] register */
__I uint32_t RESERVED1[58];
- __IO uint32_t EVENTS_COMPARE[6]; /*!< Description collection[0]: Compare event on CC[0] match */
+ __IO uint32_t EVENTS_COMPARE[6]; /*!< Description collection[n]: Compare event on CC[n] match */
__I uint32_t RESERVED2[42];
__IO uint32_t SHORTS; /*!< Shortcut register */
__I uint32_t RESERVED3[64];
@@ -1407,7 +1423,7 @@ typedef struct { /*!< TIMER Structure
__I uint32_t RESERVED5;
__IO uint32_t PRESCALER; /*!< Timer prescaler register */
__I uint32_t RESERVED6[11];
- __IO uint32_t CC[6]; /*!< Description collection[0]: Capture/Compare register 0 */
+ __IO uint32_t CC[6]; /*!< Description collection[n]: Capture/Compare register n */
} NRF_TIMER_Type;
@@ -1429,7 +1445,7 @@ typedef struct { /*!< RTC Structure
__IO uint32_t EVENTS_TICK; /*!< Event on COUNTER increment */
__IO uint32_t EVENTS_OVRFLW; /*!< Event on COUNTER overflow */
__I uint32_t RESERVED1[14];
- __IO uint32_t EVENTS_COMPARE[4]; /*!< Description collection[0]: Compare event on CC[0] match */
+ __IO uint32_t EVENTS_COMPARE[4]; /*!< Description collection[n]: Compare event on CC[n] match */
__I uint32_t RESERVED2[109];
__IO uint32_t INTENSET; /*!< Enable interrupt */
__IO uint32_t INTENCLR; /*!< Disable interrupt */
@@ -1442,7 +1458,7 @@ typedef struct { /*!< RTC Structure
__IO uint32_t PRESCALER; /*!< 12 bit prescaler for COUNTER frequency (32768/(PRESCALER+1)).Must
be written when RTC is stopped */
__I uint32_t RESERVED5[13];
- __IO uint32_t CC[4]; /*!< Description collection[0]: Compare register 0 */
+ __IO uint32_t CC[4]; /*!< Description collection[n]: Compare register n */
} NRF_RTC_Type;
@@ -1538,6 +1554,39 @@ typedef struct { /*!< ECB Structure
} NRF_ECB_Type;
+/* ================================================================================ */
+/* ================ AAR ================ */
+/* ================================================================================ */
+
+
+/**
+ * @brief Accelerated Address Resolver (AAR)
+ */
+
+typedef struct { /*!< AAR Structure */
+ __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK
+ data structure */
+ __I uint32_t RESERVED0;
+ __O uint32_t TASKS_STOP; /*!< Stop resolving addresses */
+ __I uint32_t RESERVED1[61];
+ __IO uint32_t EVENTS_END; /*!< Address resolution procedure complete */
+ __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved */
+ __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved */
+ __I uint32_t RESERVED2[126];
+ __IO uint32_t INTENSET; /*!< Enable interrupt */
+ __IO uint32_t INTENCLR; /*!< Disable interrupt */
+ __I uint32_t RESERVED3[61];
+ __I uint32_t STATUS; /*!< Resolution status */
+ __I uint32_t RESERVED4[63];
+ __IO uint32_t ENABLE; /*!< Enable AAR */
+ __IO uint32_t NIRK; /*!< Number of IRKs */
+ __IO uint32_t IRKPTR; /*!< Pointer to IRK data structure */
+ __I uint32_t RESERVED5;
+ __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address */
+ __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */
+} NRF_AAR_Type;
+
+
/* ================================================================================ */
/* ================ CCM ================ */
/* ================================================================================ */
@@ -1578,39 +1627,6 @@ typedef struct { /*!< CCM Structure
} NRF_CCM_Type;
-/* ================================================================================ */
-/* ================ AAR ================ */
-/* ================================================================================ */
-
-
-/**
- * @brief Accelerated Address Resolver (AAR)
- */
-
-typedef struct { /*!< AAR Structure */
- __O uint32_t TASKS_START; /*!< Start resolving addresses based on IRKs specified in the IRK
- data structure */
- __I uint32_t RESERVED0;
- __O uint32_t TASKS_STOP; /*!< Stop resolving addresses */
- __I uint32_t RESERVED1[61];
- __IO uint32_t EVENTS_END; /*!< Address resolution procedure complete */
- __IO uint32_t EVENTS_RESOLVED; /*!< Address resolved */
- __IO uint32_t EVENTS_NOTRESOLVED; /*!< Address not resolved */
- __I uint32_t RESERVED2[126];
- __IO uint32_t INTENSET; /*!< Enable interrupt */
- __IO uint32_t INTENCLR; /*!< Disable interrupt */
- __I uint32_t RESERVED3[61];
- __I uint32_t STATUS; /*!< Resolution status */
- __I uint32_t RESERVED4[63];
- __IO uint32_t ENABLE; /*!< Enable AAR */
- __IO uint32_t NIRK; /*!< Number of IRKs */
- __IO uint32_t IRKPTR; /*!< Pointer to IRK data structure */
- __I uint32_t RESERVED5;
- __IO uint32_t ADDRPTR; /*!< Pointer to the resolvable address */
- __IO uint32_t SCRATCHPTR; /*!< Pointer to data area used for temporary storage */
-} NRF_AAR_Type;
-
-
/* ================================================================================ */
/* ================ WDT ================ */
/* ================================================================================ */
@@ -1635,7 +1651,7 @@ typedef struct { /*!< WDT Structure
__IO uint32_t RREN; /*!< Enable register for reload request registers */
__IO uint32_t CONFIG; /*!< Configuration register */
__I uint32_t RESERVED4[60];
- __O uint32_t RR[8]; /*!< Description collection[0]: Reload request 0 */
+ __O uint32_t RR[8]; /*!< Description collection[n]: Reload request n */
} NRF_WDT_Type;
@@ -1761,20 +1777,6 @@ typedef struct { /*!< LPCOMP Structure
} NRF_LPCOMP_Type;
-/* ================================================================================ */
-/* ================ SWI ================ */
-/* ================================================================================ */
-
-
-/**
- * @brief Software interrupt 0 (SWI)
- */
-
-typedef struct { /*!< SWI Structure */
- __I uint32_t UNUSED; /*!< Unused. */
-} NRF_SWI_Type;
-
-
/* ================================================================================ */
/* ================ EGU ================ */
/* ================================================================================ */
@@ -1785,11 +1787,11 @@ typedef struct { /*!< SWI Structure
*/
typedef struct { /*!< EGU Structure */
- __O uint32_t TASKS_TRIGGER[16]; /*!< Description collection[0]: Trigger 0 for triggering the corresponding
- TRIGGERED[0] event */
+ __O uint32_t TASKS_TRIGGER[16]; /*!< Description collection[n]: Trigger n for triggering the corresponding
+ TRIGGERED[n] event */
__I uint32_t RESERVED0[48];
- __IO uint32_t EVENTS_TRIGGERED[16]; /*!< Description collection[0]: Event number 0 generated by triggering
- the corresponding TRIGGER[0] task */
+ __IO uint32_t EVENTS_TRIGGERED[16]; /*!< Description collection[n]: Event number n generated by triggering
+ the corresponding TRIGGER[n] task */
__I uint32_t RESERVED1[112];
__IO uint32_t INTEN; /*!< Enable or disable interrupt */
__IO uint32_t INTENSET; /*!< Enable interrupt */
@@ -1797,33 +1799,47 @@ typedef struct { /*!< EGU Structure
} NRF_EGU_Type;
+/* ================================================================================ */
+/* ================ SWI ================ */
+/* ================================================================================ */
+
+
+/**
+ * @brief Software interrupt 0 (SWI)
+ */
+
+typedef struct { /*!< SWI Structure */
+ __I uint32_t UNUSED; /*!< Unused. */
+} NRF_SWI_Type;
+
+
/* ================================================================================ */
/* ================ PWM ================ */
/* ================================================================================ */
/**
- * @brief Pulse Width Modulation Unit 0 (PWM)
+ * @brief Pulse width modulation unit 0 (PWM)
*/
typedef struct { /*!< PWM Structure */
__I uint32_t RESERVED0;
__O uint32_t TASKS_STOP; /*!< Stops PWM pulse generation on all channels at the end of current
PWM period, and stops sequence playback */
- __O uint32_t TASKS_SEQSTART[2]; /*!< Description collection[0]: Loads the first PWM value on all
- enabled channels from sequence 0, and starts playing that sequence
- at the rate defined in SEQ[0]REFRESH and/or DECODER.MODE. Causes
- PWM generation to start it was not running. */
+ __O uint32_t TASKS_SEQSTART[2]; /*!< Description collection[n]: Loads the first PWM value on all
+ enabled channels from sequence n, and starts playing that sequence
+ at the rate defined in SEQ[n]REFRESH and/or DECODER.MODE. Causes
+ PWM generation to start if not running. */
__O uint32_t TASKS_NEXTSTEP; /*!< Steps by one value in the current sequence on all enabled channels
if DECODER.MODE=NextStep. Does not cause PWM generation to start
- it was not running. */
+ if not running. */
__I uint32_t RESERVED1[60];
__IO uint32_t EVENTS_STOPPED; /*!< Response to STOP task, emitted when PWM pulses are no longer
generated */
- __IO uint32_t EVENTS_SEQSTARTED[2]; /*!< Description collection[0]: First PWM period started on sequence
- 0 */
- __IO uint32_t EVENTS_SEQEND[2]; /*!< Description collection[0]: Emitted at end of every sequence
- 0, when last value from RAM has been applied to wave counter */
+ __IO uint32_t EVENTS_SEQSTARTED[2]; /*!< Description collection[n]: First PWM period started on sequence
+ n */
+ __IO uint32_t EVENTS_SEQEND[2]; /*!< Description collection[n]: Emitted at end of every sequence
+ n, when last value from RAM has been applied to wave counter */
__IO uint32_t EVENTS_PWMPERIODEND; /*!< Emitted at the end of each PWM period */
__IO uint32_t EVENTS_LOOPSDONE; /*!< Concatenated sequences have been played the amount of times
defined in LOOP.CNT */
@@ -1839,7 +1855,7 @@ typedef struct { /*!< PWM Structure
__IO uint32_t COUNTERTOP; /*!< Value up to which the pulse generator counter counts */
__IO uint32_t PRESCALER; /*!< Configuration for PWM_CLK */
__IO uint32_t DECODER; /*!< Configuration of the decoder */
- __IO uint32_t LOOP; /*!< Amount of playback of a loop */
+ __IO uint32_t LOOP; /*!< Number of playbacks of a loop */
__I uint32_t RESERVED5[2];
PWM_SEQ_Type SEQ[2]; /*!< Unspecified */
PWM_PSEL_Type PSEL; /*!< Unspecified */
@@ -1884,6 +1900,21 @@ typedef struct { /*!< PDM Structure
} NRF_PDM_Type;
+/* ================================================================================ */
+/* ================ ACL ================ */
+/* ================================================================================ */
+
+
+/**
+ * @brief Access control lists (ACL)
+ */
+
+typedef struct { /*!< ACL Structure */
+ __I uint32_t RESERVED0[512];
+ ACL_ACL_Type ACL[8]; /*!< Unspecified */
+} NRF_ACL_Type;
+
+
/* ================================================================================ */
/* ================ NVMC ================ */
/* ================================================================================ */
@@ -1902,15 +1933,17 @@ typedef struct { /*!< NVMC Structure
__IO uint32_t CONFIG; /*!< Configuration register */
union {
- __IO uint32_t ERASEPAGE; /*!< Register for erasing a page in code area */
__IO uint32_t ERASEPCR1; /*!< Deprecated register - Register for erasing a page in code area.
Equivalent to ERASEPAGE. */
+ __IO uint32_t ERASEPAGE; /*!< Register for erasing a page in code area */
};
__IO uint32_t ERASEALL; /*!< Register for erasing all non-volatile user memory */
__IO uint32_t ERASEPCR0; /*!< Deprecated register - Register for erasing a page in code area.
Equivalent to ERASEPAGE. */
__IO uint32_t ERASEUICR; /*!< Register for erasing user information configuration registers */
- __I uint32_t RESERVED3[10];
+ __IO uint32_t ERASEPAGEPARTIAL; /*!< Register for partial erase of a page in code area */
+ __IO uint32_t ERASEPAGEPARTIALCFG; /*!< Register for partial erase configuration */
+ __I uint32_t RESERVED3[8];
__IO uint32_t ICACHECNF; /*!< I-code cache configuration register. */
__I uint32_t RESERVED4;
__IO uint32_t IHIT; /*!< I-code cache hit counter. */
@@ -1918,21 +1951,6 @@ typedef struct { /*!< NVMC Structure
} NRF_NVMC_Type;
-/* ================================================================================ */
-/* ================ ACL ================ */
-/* ================================================================================ */
-
-
-/**
- * @brief Access control lists (ACL)
- */
-
-typedef struct { /*!< ACL Structure */
- __I uint32_t RESERVED0[512];
- ACL_ACL_Type ACL[8]; /*!< Unspecified */
-} NRF_ACL_Type;
-
-
/* ================================================================================ */
/* ================ PPI ================ */
/* ================================================================================ */
@@ -1951,7 +1969,7 @@ typedef struct { /*!< PPI Structure
__I uint32_t RESERVED1;
PPI_CH_Type CH[20]; /*!< PPI Channel */
__I uint32_t RESERVED2[148];
- __IO uint32_t CHG[6]; /*!< Description collection[0]: Channel group 0 */
+ __IO uint32_t CHG[6]; /*!< Description collection[n]: Channel group n */
__I uint32_t RESERVED3[62];
PPI_FORK_Type FORK[32]; /*!< Fork */
} NRF_PPI_Type;
@@ -2055,66 +2073,61 @@ typedef struct { /*!< FPU Structure
/**
- * @brief Universal Serial Bus device (USBD)
+ * @brief Universal serial bus device (USBD)
*/
typedef struct { /*!< USBD Structure */
__I uint32_t RESERVED0;
- __O uint32_t TASKS_STARTEPIN[8]; /*!< Description collection[0]: Captures the EPIN[0].PTR, EPIN[0].MAXCNT
- and EPIN[0].CONFIG registers values, and enables endpoint IN
- 0 to respond to traffic from host */
- __O uint32_t TASKS_STARTISOIN; /*!< Captures the ISOIN.PTR, ISOIN.MAXCNT and ISOIN.CONFIG registers
- values, and enables sending data on iso endpoint */
- __O uint32_t TASKS_STARTEPOUT[8]; /*!< Description collection[0]: Captures the EPOUT[0].PTR, EPOUT[0].MAXCNT
- and EPOUT[0].CONFIG registers values, and enables endpoint 0
- to respond to traffic from host */
- __O uint32_t TASKS_STARTISOOUT; /*!< Captures the ISOOUT.PTR, ISOOUT.MAXCNT and ISOOUT.CONFIG registers
- values, and enables receiving of data on iso endpoint */
+ __O uint32_t TASKS_STARTEPIN[8]; /*!< Description collection[n]: Captures the EPIN[n].PTR and EPIN[n].MAXCNT
+ registers values, and enables endpoint IN n to respond to traffic
+ from host */
+ __O uint32_t TASKS_STARTISOIN; /*!< Captures the ISOIN.PTR and ISOIN.MAXCNT registers values, and
+ enables sending data on ISO endpoint */
+ __O uint32_t TASKS_STARTEPOUT[8]; /*!< Description collection[n]: Captures the EPOUT[n].PTR and EPOUT[n].MAXCNT
+ registers values, and enables endpoint n to respond to traffic
+ from host */
+ __O uint32_t TASKS_STARTISOOUT; /*!< Captures the ISOOUT.PTR and ISOOUT.MAXCNT registers values,
+ and enables receiving of data on ISO endpoint */
__O uint32_t TASKS_EP0RCVOUT; /*!< Allows OUT data stage on control endpoint 0 */
__O uint32_t TASKS_EP0STATUS; /*!< Allows status stage on control endpoint 0 */
- __O uint32_t TASKS_EP0STALL; /*!< STALLs data and status stage on control endpoint 0 */
- __O uint32_t TASKS_DPDMDRIVE; /*!< Forces D+ and D-lines to the state defined in the DPDMVALUE
+ __O uint32_t TASKS_EP0STALL; /*!< Stalls data and status stage on control endpoint 0 */
+ __O uint32_t TASKS_DPDMDRIVE; /*!< Forces D+ and D- lines into the state defined in the DPDMVALUE
register */
- __O uint32_t TASKS_DPDMNODRIVE; /*!< Stops forcing D+ and D- lines to any state (USB engine takes
+ __O uint32_t TASKS_DPDMNODRIVE; /*!< Stops forcing D+ and D- lines into any state (USB engine takes
control) */
__I uint32_t RESERVED1[40];
- __IO uint32_t EVENTS_USBRESET; /*!< Signals that a USB reset condition has been detected on the
- USB lines */
- __IO uint32_t EVENTS_STARTED; /*!< Confirms that the EPIN[n].PTR, EPIN[n].MAXCNT, EPIN[n].CONFIG,
- or EPOUT[n].PTR, EPOUT[n].MAXCNT and EPOUT[n].CONFIG registers
- have been captured on all endpoints reported in the EPSTATUS
- register */
- __IO uint32_t EVENTS_ENDEPIN[8]; /*!< Description collection[0]: The whole EPIN[0] buffer has been
+ __IO uint32_t EVENTS_USBRESET; /*!< Signals that a USB reset condition has been detected on USB
+ lines */
+ __IO uint32_t EVENTS_STARTED; /*!< Confirms that the EPIN[n].PTR and EPIN[n].MAXCNT, or EPOUT[n].PTR
+ and EPOUT[n].MAXCNT registers have been captured on all endpoints
+ reported in the EPSTATUS register */
+ __IO uint32_t EVENTS_ENDEPIN[8]; /*!< Description collection[n]: The whole EPIN[n] buffer has been
consumed. The RAM buffer can be accessed safely by software. */
__IO uint32_t EVENTS_EP0DATADONE; /*!< An acknowledged data transfer has taken place on the control
endpoint */
__IO uint32_t EVENTS_ENDISOIN; /*!< The whole ISOIN buffer has been consumed. The RAM buffer can
be accessed safely by software. */
- __IO uint32_t EVENTS_ENDEPOUT[8]; /*!< Description collection[0]: The whole EPOUT[0] buffer has been
+ __IO uint32_t EVENTS_ENDEPOUT[8]; /*!< Description collection[n]: The whole EPOUT[n] buffer has been
consumed. The RAM buffer can be accessed safely by software. */
__IO uint32_t EVENTS_ENDISOOUT; /*!< The whole ISOOUT buffer has been consumed. The RAM buffer can
be accessed safely by software. */
__IO uint32_t EVENTS_SOF; /*!< Signals that a SOF (start of frame) condition has been detected
- on the USB lines */
- __IO uint32_t EVENTS_USBEVENT; /*!< An event or an error not covered by specific events has occurred,
- check EVENTCAUSE register to find the cause */
+ on USB lines */
+ __IO uint32_t EVENTS_USBEVENT; /*!< An event or an error not covered by specific events has occurred.
+ Check EVENTCAUSE register to find the cause. */
__IO uint32_t EVENTS_EP0SETUP; /*!< A valid SETUP token has been received (and acknowledged) on
the control endpoint */
__IO uint32_t EVENTS_EPDATA; /*!< A data transfer has occurred on a data endpoint, indicated by
the EPDATASTATUS register */
- __IO uint32_t EVENTS_ACCESSFAULT; /*!< Access to an unavailable USB register has been attempted (software
- or EasyDMA). This event can get fired even when USBD is not
- ENABLEd. */
- __I uint32_t RESERVED2[38];
+ __I uint32_t RESERVED2[39];
__IO uint32_t SHORTS; /*!< Shortcut register */
__I uint32_t RESERVED3[63];
__IO uint32_t INTEN; /*!< Enable or disable interrupt */
__IO uint32_t INTENSET; /*!< Enable interrupt */
__IO uint32_t INTENCLR; /*!< Disable interrupt */
__I uint32_t RESERVED4[61];
- __IO uint32_t EVENTCAUSE; /*!< Details on event that caused the USBEVENT event */
- __I uint32_t BUSSTATE; /*!< Provides the logic state of the D+ and D- lines */
- __I uint32_t RESERVED5[6];
+ __IO uint32_t EVENTCAUSE; /*!< Details on what caused the USBEVENT event */
+ __I uint32_t RESERVED5[7];
USBD_HALTED_Type HALTED; /*!< Unspecified */
__I uint32_t RESERVED6;
__IO uint32_t EPSTATUS; /*!< Provides information on which endpoint's EasyDMA registers have
@@ -2135,17 +2148,17 @@ typedef struct { /*!< USBD Structure
__I uint32_t RESERVED8[15];
__IO uint32_t ENABLE; /*!< Enable USB */
__IO uint32_t USBPULLUP; /*!< Control of the USB pull-up */
- __IO uint32_t DPDMVALUE; /*!< State at which the DPDMDRIVE task will force D+ and D-. The
- DPDMNODRIVE task reverts the control of the lines to MAC IP
- (no forcing). */
- __IO uint32_t DTOGGLE; /*!< Data toggle control and status. */
+ __IO uint32_t DPDMVALUE; /*!< State D+ and D- lines will be forced into by the DPDMDRIVE task.
+ The DPDMNODRIVE task reverts the control of the lines to MAC
+ IP (no forcing). */
+ __IO uint32_t DTOGGLE; /*!< Data toggle control and status */
__IO uint32_t EPINEN; /*!< Endpoint IN enable */
__IO uint32_t EPOUTEN; /*!< Endpoint OUT enable */
__O uint32_t EPSTALL; /*!< STALL endpoints */
__IO uint32_t ISOSPLIT; /*!< Controls the split of ISO buffers */
__I uint32_t FRAMECNTR; /*!< Returns the current value of the start of frame counter */
__I uint32_t RESERVED9[2];
- __IO uint32_t LOWPOWER; /*!< Controls USBD peripheral low-power mode during USB suspend */
+ __IO uint32_t LOWPOWER; /*!< Controls USBD peripheral low power mode during USB suspend */
__IO uint32_t ISOINCONFIG; /*!< Controls the response of the ISO IN endpoint to an IN token
when no data is ready to be sent */
__I uint32_t RESERVED10[51];
@@ -2227,10 +2240,41 @@ typedef struct { /*!< GPIO Structure
set in the PIN_CNF[n].SENSE registers */
__IO uint32_t DETECTMODE; /*!< Select between default DETECT signal behaviour and LDETECT mode */
__I uint32_t RESERVED1[118];
- __IO uint32_t PIN_CNF[32]; /*!< Description collection[0]: Configuration of GPIO pins */
+ __IO uint32_t PIN_CNF[32]; /*!< Description collection[n]: Configuration of GPIO pins */
} NRF_GPIO_Type;
+/* ================================================================================ */
+/* ================ CC_HOST_RGF ================ */
+/* ================================================================================ */
+
+
+/**
+ * @brief CRYPTOCELL HOST_RGF interface (CC_HOST_RGF)
+ */
+
+typedef struct { /*!< CC_HOST_RGF Structure */
+ __I uint32_t RESERVED0[1678];
+ __IO uint32_t HOST_CRYPTOKEY_SEL; /*!< AES hardware key select */
+ __I uint32_t RESERVED1[4];
+ __IO uint32_t HOST_IOT_KPRTL_LOCK; /*!< This write-once register is the K_PRTL lock register. When this
+ register is set, K_PRTL can not be used and a zeroed key will
+ be used instead. The value of this register is saved in the
+ CRYPTOCELL AO power domain. */
+ __IO uint32_t HOST_IOT_KDR0; /*!< This register holds bits 31:0 of K_DR. The value of this register
+ is saved in the CRYPTOCELL AO power domain. Reading from this
+ address returns the K_DR valid status indicating if K_DR is
+ successfully retained. */
+ __O uint32_t HOST_IOT_KDR1; /*!< This register holds bits 63:32 of K_DR. The value of this register
+ is saved in the CRYPTOCELL AO power domain. */
+ __O uint32_t HOST_IOT_KDR2; /*!< This register holds bits 95:64 of K_DR. The value of this register
+ is saved in the CRYPTOCELL AO power domain. */
+ __O uint32_t HOST_IOT_KDR3; /*!< This register holds bits 127:96 of K_DR. The value of this register
+ is saved in the CRYPTOCELL AO power domain. */
+ __IO uint32_t HOST_IOT_LCS; /*!< Controls lifecycle state (LCS) for CRYPTOCELL subsystem */
+} NRF_CC_HOST_RGF_Type;
+
+
/* ================================================================================ */
/* ================ CRYPTOCELL ================ */
/* ================================================================================ */
@@ -2242,7 +2286,7 @@ typedef struct { /*!< GPIO Structure
typedef struct { /*!< CRYPTOCELL Structure */
__I uint32_t RESERVED0[320];
- __IO uint32_t ENABLE; /*!< Control power and clock for CRYPTOCELL subsystem */
+ __IO uint32_t ENABLE; /*!< Enable CRYPTOCELL subsystem */
} NRF_CRYPTOCELL_Type;
@@ -2270,23 +2314,23 @@ typedef struct { /*!< CRYPTOCELL Structure
#define NRF_FICR_BASE 0x10000000UL
#define NRF_UICR_BASE 0x10001000UL
-#define NRF_POWER_BASE 0x40000000UL
#define NRF_CLOCK_BASE 0x40000000UL
+#define NRF_POWER_BASE 0x40000000UL
#define NRF_RADIO_BASE 0x40001000UL
-#define NRF_UARTE0_BASE 0x40002000UL
#define NRF_UART0_BASE 0x40002000UL
+#define NRF_UARTE0_BASE 0x40002000UL
+#define NRF_SPI0_BASE 0x40003000UL
#define NRF_SPIM0_BASE 0x40003000UL
#define NRF_SPIS0_BASE 0x40003000UL
+#define NRF_TWI0_BASE 0x40003000UL
#define NRF_TWIM0_BASE 0x40003000UL
#define NRF_TWIS0_BASE 0x40003000UL
-#define NRF_SPI0_BASE 0x40003000UL
-#define NRF_TWI0_BASE 0x40003000UL
+#define NRF_SPI1_BASE 0x40004000UL
#define NRF_SPIM1_BASE 0x40004000UL
#define NRF_SPIS1_BASE 0x40004000UL
+#define NRF_TWI1_BASE 0x40004000UL
#define NRF_TWIM1_BASE 0x40004000UL
#define NRF_TWIS1_BASE 0x40004000UL
-#define NRF_SPI1_BASE 0x40004000UL
-#define NRF_TWI1_BASE 0x40004000UL
#define NRF_NFCT_BASE 0x40005000UL
#define NRF_GPIOTE_BASE 0x40006000UL
#define NRF_SAADC_BASE 0x40007000UL
@@ -2297,38 +2341,38 @@ typedef struct { /*!< CRYPTOCELL Structure
#define NRF_TEMP_BASE 0x4000C000UL
#define NRF_RNG_BASE 0x4000D000UL
#define NRF_ECB_BASE 0x4000E000UL
-#define NRF_CCM_BASE 0x4000F000UL
#define NRF_AAR_BASE 0x4000F000UL
+#define NRF_CCM_BASE 0x4000F000UL
#define NRF_WDT_BASE 0x40010000UL
#define NRF_RTC1_BASE 0x40011000UL
#define NRF_QDEC_BASE 0x40012000UL
#define NRF_COMP_BASE 0x40013000UL
#define NRF_LPCOMP_BASE 0x40013000UL
-#define NRF_SWI0_BASE 0x40014000UL
#define NRF_EGU0_BASE 0x40014000UL
-#define NRF_SWI1_BASE 0x40015000UL
+#define NRF_SWI0_BASE 0x40014000UL
#define NRF_EGU1_BASE 0x40015000UL
-#define NRF_SWI2_BASE 0x40016000UL
+#define NRF_SWI1_BASE 0x40015000UL
#define NRF_EGU2_BASE 0x40016000UL
-#define NRF_SWI3_BASE 0x40017000UL
+#define NRF_SWI2_BASE 0x40016000UL
#define NRF_EGU3_BASE 0x40017000UL
-#define NRF_SWI4_BASE 0x40018000UL
+#define NRF_SWI3_BASE 0x40017000UL
#define NRF_EGU4_BASE 0x40018000UL
-#define NRF_SWI5_BASE 0x40019000UL
+#define NRF_SWI4_BASE 0x40018000UL
#define NRF_EGU5_BASE 0x40019000UL
+#define NRF_SWI5_BASE 0x40019000UL
#define NRF_TIMER3_BASE 0x4001A000UL
#define NRF_TIMER4_BASE 0x4001B000UL
#define NRF_PWM0_BASE 0x4001C000UL
#define NRF_PDM_BASE 0x4001D000UL
-#define NRF_NVMC_BASE 0x4001E000UL
#define NRF_ACL_BASE 0x4001E000UL
+#define NRF_NVMC_BASE 0x4001E000UL
#define NRF_PPI_BASE 0x4001F000UL
#define NRF_MWU_BASE 0x40020000UL
#define NRF_PWM1_BASE 0x40021000UL
#define NRF_PWM2_BASE 0x40022000UL
+#define NRF_SPI2_BASE 0x40023000UL
#define NRF_SPIM2_BASE 0x40023000UL
#define NRF_SPIS2_BASE 0x40023000UL
-#define NRF_SPI2_BASE 0x40023000UL
#define NRF_RTC2_BASE 0x40024000UL
#define NRF_I2S_BASE 0x40025000UL
#define NRF_FPU_BASE 0x40026000UL
@@ -2339,6 +2383,7 @@ typedef struct { /*!< CRYPTOCELL Structure
#define NRF_SPIM3_BASE 0x4002F000UL
#define NRF_P0_BASE 0x50000000UL
#define NRF_P1_BASE 0x50000300UL
+#define NRF_CC_HOST_RGF_BASE 0x5002A000UL
#define NRF_CRYPTOCELL_BASE 0x5002A000UL
@@ -2348,23 +2393,23 @@ typedef struct { /*!< CRYPTOCELL Structure
#define NRF_FICR ((NRF_FICR_Type *) NRF_FICR_BASE)
#define NRF_UICR ((NRF_UICR_Type *) NRF_UICR_BASE)
-#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE)
#define NRF_CLOCK ((NRF_CLOCK_Type *) NRF_CLOCK_BASE)
+#define NRF_POWER ((NRF_POWER_Type *) NRF_POWER_BASE)
#define NRF_RADIO ((NRF_RADIO_Type *) NRF_RADIO_BASE)
-#define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE)
#define NRF_UART0 ((NRF_UART_Type *) NRF_UART0_BASE)
+#define NRF_UARTE0 ((NRF_UARTE_Type *) NRF_UARTE0_BASE)
+#define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE)
#define NRF_SPIM0 ((NRF_SPIM_Type *) NRF_SPIM0_BASE)
#define NRF_SPIS0 ((NRF_SPIS_Type *) NRF_SPIS0_BASE)
+#define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE)
#define NRF_TWIM0 ((NRF_TWIM_Type *) NRF_TWIM0_BASE)
#define NRF_TWIS0 ((NRF_TWIS_Type *) NRF_TWIS0_BASE)
-#define NRF_SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE)
-#define NRF_TWI0 ((NRF_TWI_Type *) NRF_TWI0_BASE)
+#define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE)
#define NRF_SPIM1 ((NRF_SPIM_Type *) NRF_SPIM1_BASE)
#define NRF_SPIS1 ((NRF_SPIS_Type *) NRF_SPIS1_BASE)
+#define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE)
#define NRF_TWIM1 ((NRF_TWIM_Type *) NRF_TWIM1_BASE)
#define NRF_TWIS1 ((NRF_TWIS_Type *) NRF_TWIS1_BASE)
-#define NRF_SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE)
-#define NRF_TWI1 ((NRF_TWI_Type *) NRF_TWI1_BASE)
#define NRF_NFCT ((NRF_NFCT_Type *) NRF_NFCT_BASE)
#define NRF_GPIOTE ((NRF_GPIOTE_Type *) NRF_GPIOTE_BASE)
#define NRF_SAADC ((NRF_SAADC_Type *) NRF_SAADC_BASE)
@@ -2375,38 +2420,38 @@ typedef struct { /*!< CRYPTOCELL Structure
#define NRF_TEMP ((NRF_TEMP_Type *) NRF_TEMP_BASE)
#define NRF_RNG ((NRF_RNG_Type *) NRF_RNG_BASE)
#define NRF_ECB ((NRF_ECB_Type *) NRF_ECB_BASE)
-#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE)
#define NRF_AAR ((NRF_AAR_Type *) NRF_AAR_BASE)
+#define NRF_CCM ((NRF_CCM_Type *) NRF_CCM_BASE)
#define NRF_WDT ((NRF_WDT_Type *) NRF_WDT_BASE)
#define NRF_RTC1 ((NRF_RTC_Type *) NRF_RTC1_BASE)
#define NRF_QDEC ((NRF_QDEC_Type *) NRF_QDEC_BASE)
#define NRF_COMP ((NRF_COMP_Type *) NRF_COMP_BASE)
#define NRF_LPCOMP ((NRF_LPCOMP_Type *) NRF_LPCOMP_BASE)
-#define NRF_SWI0 ((NRF_SWI_Type *) NRF_SWI0_BASE)
#define NRF_EGU0 ((NRF_EGU_Type *) NRF_EGU0_BASE)
-#define NRF_SWI1 ((NRF_SWI_Type *) NRF_SWI1_BASE)
+#define NRF_SWI0 ((NRF_SWI_Type *) NRF_SWI0_BASE)
#define NRF_EGU1 ((NRF_EGU_Type *) NRF_EGU1_BASE)
-#define NRF_SWI2 ((NRF_SWI_Type *) NRF_SWI2_BASE)
+#define NRF_SWI1 ((NRF_SWI_Type *) NRF_SWI1_BASE)
#define NRF_EGU2 ((NRF_EGU_Type *) NRF_EGU2_BASE)
-#define NRF_SWI3 ((NRF_SWI_Type *) NRF_SWI3_BASE)
+#define NRF_SWI2 ((NRF_SWI_Type *) NRF_SWI2_BASE)
#define NRF_EGU3 ((NRF_EGU_Type *) NRF_EGU3_BASE)
-#define NRF_SWI4 ((NRF_SWI_Type *) NRF_SWI4_BASE)
+#define NRF_SWI3 ((NRF_SWI_Type *) NRF_SWI3_BASE)
#define NRF_EGU4 ((NRF_EGU_Type *) NRF_EGU4_BASE)
-#define NRF_SWI5 ((NRF_SWI_Type *) NRF_SWI5_BASE)
+#define NRF_SWI4 ((NRF_SWI_Type *) NRF_SWI4_BASE)
#define NRF_EGU5 ((NRF_EGU_Type *) NRF_EGU5_BASE)
+#define NRF_SWI5 ((NRF_SWI_Type *) NRF_SWI5_BASE)
#define NRF_TIMER3 ((NRF_TIMER_Type *) NRF_TIMER3_BASE)
#define NRF_TIMER4 ((NRF_TIMER_Type *) NRF_TIMER4_BASE)
#define NRF_PWM0 ((NRF_PWM_Type *) NRF_PWM0_BASE)
#define NRF_PDM ((NRF_PDM_Type *) NRF_PDM_BASE)
-#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE)
#define NRF_ACL ((NRF_ACL_Type *) NRF_ACL_BASE)
+#define NRF_NVMC ((NRF_NVMC_Type *) NRF_NVMC_BASE)
#define NRF_PPI ((NRF_PPI_Type *) NRF_PPI_BASE)
#define NRF_MWU ((NRF_MWU_Type *) NRF_MWU_BASE)
#define NRF_PWM1 ((NRF_PWM_Type *) NRF_PWM1_BASE)
#define NRF_PWM2 ((NRF_PWM_Type *) NRF_PWM2_BASE)
+#define NRF_SPI2 ((NRF_SPI_Type *) NRF_SPI2_BASE)
#define NRF_SPIM2 ((NRF_SPIM_Type *) NRF_SPIM2_BASE)
#define NRF_SPIS2 ((NRF_SPIS_Type *) NRF_SPIS2_BASE)
-#define NRF_SPI2 ((NRF_SPI_Type *) NRF_SPI2_BASE)
#define NRF_RTC2 ((NRF_RTC_Type *) NRF_RTC2_BASE)
#define NRF_I2S ((NRF_I2S_Type *) NRF_I2S_BASE)
#define NRF_FPU ((NRF_FPU_Type *) NRF_FPU_BASE)
@@ -2417,6 +2462,7 @@ typedef struct { /*!< CRYPTOCELL Structure
#define NRF_SPIM3 ((NRF_SPIM_Type *) NRF_SPIM3_BASE)
#define NRF_P0 ((NRF_GPIO_Type *) NRF_P0_BASE)
#define NRF_P1 ((NRF_GPIO_Type *) NRF_P1_BASE)
+#define NRF_CC_HOST_RGF ((NRF_CC_HOST_RGF_Type *) NRF_CC_HOST_RGF_BASE)
#define NRF_CRYPTOCELL ((NRF_CRYPTOCELL_Type *) NRF_CRYPTOCELL_BASE)
diff --git a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52840.svd b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52840.svd
index d3e311c8d5..1ff982163c 100644
--- a/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52840.svd
+++ b/hw/mcu/nordic/src/ext/nrfx/mdk/nrf52840.svd
@@ -8,7 +8,7 @@
<version>1</version>
<description>nRF52840 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller </description>
<licenseText>
-Copyright (c) 2010 - 2017, Nordic Semiconductor ASA All rights reserved.\n
+Copyright (c) 2010 - 2018, Nordic Semiconductor ASA All rights reserved.\n
\n
Redistribution and use in source and binary forms, with or without\n
modification, are permitted provided that the following conditions are met:\n
@@ -61,14 +61,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
<peripheral>
<name>FICR</name>
<description>Factory information configuration registers</description>
- <groupName>FICR</groupName>
<baseAddress>0x10000000</baseAddress>
- <size>32</size>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
+ <groupName>FICR</groupName>
+ <size>0x20</size>
<registers>
<register>
<name>CODEPAGESIZE</name>
@@ -101,10 +101,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <dim>2</dim>
- <dimIncrement>4</dimIncrement>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>DEVICEID[%s]</name>
- <description>Description collection[0]: Device identifier</description>
+ <description>Description collection[n]: Device identifier</description>
<addressOffset>0x060</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -118,34 +118,34 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <dim>4</dim>
- <dimIncrement>4</dimIncrement>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>ER[%s]</name>
- <description>Description collection[0]: Encryption root, word 0</description>
+ <description>Description collection[n]: Encryption root, word n</description>
<addressOffset>0x080</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>ER</name>
- <description>Encryption root, word 0</description>
+ <description>Encryption root, word n</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
- <dim>4</dim>
- <dimIncrement>4</dimIncrement>
+ <dim>0x4</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>IR[%s]</name>
- <description>Description collection[0]: Identity Root, word 0</description>
+ <description>Description collection[n]: Identity Root, word n</description>
<addressOffset>0x090</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>IR</name>
- <description>Identity Root, word 0</description>
+ <description>Identity Root, word n</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
@@ -179,10 +179,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <dim>2</dim>
- <dimIncrement>4</dimIncrement>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>DEVICEADDR[%s]</name>
- <description>Description collection[0]: Device address 0</description>
+ <description>Description collection[n]: Device address n</description>
<addressOffset>0x0A4</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -198,6 +198,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<cluster>
<name>INFO</name>
<description>Device info</description>
+ <headerStructName>FICR_INFO</headerStructName>
<addressOffset>0x100</addressOffset>
<register>
<name>PART</name>
@@ -228,14 +229,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<register>
<name>VARIANT</name>
- <description>Part variant (hardware version and production configuration)</description>
+ <description>Build code (hardware version and production configuration)</description>
<addressOffset>0x004</addressOffset>
<access>read-only</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>VARIANT</name>
- <description>Part variant (hardware version and production configuration). Encoded as ASCII.</description>
+ <description>Build code (hardware version and production configuration). Encoded as ASCII.</description>
<lsb>0</lsb>
<msb>31</msb>
<enumeratedValues>
@@ -245,9 +246,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
<value>0x41414141</value>
</enumeratedValue>
<enumeratedValue>
- <name>AAAB</name>
- <description>AAAB</description>
- <value>0x41414142</value>
+ <name>BAAA</name>
+ <description>BAAA</description>
+ <value>0x42414141</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>CAAA</name>
+ <description>CAAA</description>
+ <value>0x43414141</value>
</enumeratedValue>
<enumeratedValue>
<name>AABA</name>
@@ -260,14 +266,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
<value>0x41414242</value>
</enumeratedValue>
<enumeratedValue>
- <name>AAB0</name>
- <description>AAB0</description>
- <value>0x41414230</value>
+ <name>AACA</name>
+ <description>AACA</description>
+ <value>0x41414341</value>
</enumeratedValue>
<enumeratedValue>
- <name>ABBA</name>
- <description>ABBA</description>
- <value>0x41424241</value>
+ <name>AAAB</name>
+ <description>AAAB</description>
+ <value>0x41414142</value>
</enumeratedValue>
<enumeratedValue>
<name>Unspecified</name>
@@ -400,17 +406,47 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <dim>3</dim>
- <dimIncrement>4</dimIncrement>
- <name>UNUSED0[%s]</name>
- <description>Description collection[0]: Unspecified</description>
+ <dim>0x3</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>UNUSED8[%s]</name>
+ <description>Unspecified</description>
<addressOffset>0x014</addressOffset>
<access>read-write</access>
</register>
</cluster>
+ <register>
+ <dim>0x3</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>PRODTEST[%s]</name>
+ <description>Description collection[n]: Production test signature n</description>
+ <addressOffset>0x350</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PRODTEST</name>
+ <description>Production test signature n</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Done</name>
+ <description>Production tests done</description>
+ <value>0xBB42319F</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>NotDone</name>
+ <description>Production tests not done</description>
+ <value>0xFFFFFFFF</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
<cluster>
<name>TEMP</name>
<description>Registers storing factory TEMP module linearization coefficients</description>
+ <headerStructName>FICR_TEMP</headerStructName>
<addressOffset>0x404</addressOffset>
<register>
<name>A0</name>
@@ -671,6 +707,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<cluster>
<name>NFC</name>
<description>Unspecified</description>
+ <headerStructName>FICR_NFC</headerStructName>
<addressOffset>0x450</addressOffset>
<register>
<name>TAGHEADER0</name>
@@ -805,19 +842,145 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
</cluster>
+ <cluster>
+ <name>TRNG90B</name>
+ <description>NIST800-90B RNG calibration data</description>
+ <headerStructName>FICR_TRNG90B</headerStructName>
+ <addressOffset>0xC00</addressOffset>
+ <register>
+ <name>BYTES</name>
+ <description>Amount of bytes for the required entropy bits</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>BYTES</name>
+ <description>Amount of bytes for the required entropy bits</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RCCUTOFF</name>
+ <description>Repetition counter cutoff</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>RCCUTOFF</name>
+ <description>Repetition counter cutoff</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>APCUTOFF</name>
+ <description>Adaptive proportion cutoff</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>APCUTOFF</name>
+ <description>Adaptive proportion cutoff</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>STARTUP</name>
+ <description>Amount of bytes for the startup tests</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000210</resetValue>
+ <fields>
+ <field>
+ <name>STARTUP</name>
+ <description>Amount of bytes for the startup tests</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ROSC1</name>
+ <description>Sample count for ring oscillator 1</description>
+ <addressOffset>0x010</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>ROSC1</name>
+ <description>Sample count for ring oscillator 1</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ROSC2</name>
+ <description>Sample count for ring oscillator 2</description>
+ <addressOffset>0x014</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>ROSC2</name>
+ <description>Sample count for ring oscillator 2</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ROSC3</name>
+ <description>Sample count for ring oscillator 3</description>
+ <addressOffset>0x018</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>ROSC3</name>
+ <description>Sample count for ring oscillator 3</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>ROSC4</name>
+ <description>Sample count for ring oscillator 4</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>read-only</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>ROSC4</name>
+ <description>Sample count for ring oscillator 4</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ </cluster>
</registers>
</peripheral>
<peripheral>
<name>UICR</name>
<description>User information configuration registers</description>
- <groupName>UICR</groupName>
<baseAddress>0x10001000</baseAddress>
- <size>32</size>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
+ <groupName>UICR</groupName>
+ <size>0x20</size>
<registers>
<register>
<name>UNUSED0</name>
@@ -844,10 +1007,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
<access>read-write</access>
</register>
<register>
- <dim>15</dim>
- <dimIncrement>4</dimIncrement>
+ <dim>0xF</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>NRFFW[%s]</name>
- <description>Description collection[0]: Reserved for Nordic firmware design</description>
+ <description>Description collection[n]: Reserved for Nordic firmware design</description>
<addressOffset>0x014</addressOffset>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -861,10 +1024,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <dim>12</dim>
- <dimIncrement>4</dimIncrement>
+ <dim>0xC</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>NRFHW[%s]</name>
- <description>Description collection[0]: Reserved for Nordic hardware design</description>
+ <description>Description collection[n]: Reserved for Nordic hardware design</description>
<addressOffset>0x050</addressOffset>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -878,10 +1041,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <dim>32</dim>
- <dimIncrement>4</dimIncrement>
+ <dim>0x20</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>CUSTOMER[%s]</name>
- <description>Description collection[0]: Reserved for customer</description>
+ <description>Description collection[n]: Reserved for customer</description>
<addressOffset>0x080</addressOffset>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -895,10 +1058,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <dim>2</dim>
- <dimIncrement>4</dimIncrement>
+ <dim>0x2</dim>
+ <dimIncrement>0x4</dimIncrement>
<name>PSELRESET[%s]</name>
- <description>Description collection[0]: Mapping of the nRESET function</description>
+ <description>Description collection[n]: Mapping of the nRESET function</description>
<addressOffset>0x200</addressOffset>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
@@ -1034,33 +1197,6 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
</fields>
</register>
- <register>
- <name>DCDCDRIVE0</name>
- <description>Set drive level for REG0 DCDC mode. Using high drive will slightly reduce DCDC efficiency.</description>
- <addressOffset>0x300</addressOffset>
- <access>read-write</access>
- <resetValue>0xFFFFFFFF</resetValue>
- <fields>
- <field>
- <name>DCDCDRIVE0</name>
- <description>Set drive level for REG0 DCDC mode.</description>
- <lsb>0</lsb>
- <msb>0</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Low</name>
- <description>Low drive</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>High</name>
- <description>High drive</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- </fields>
- </register>
<register>
<name>REGOUT0</name>
<description>GPIO reference voltage / external output supply voltage in high voltage mode</description>
@@ -1116,11 +1252,9 @@ POSSIBILITY OF SUCH DAMAGE.\n
</registers>
</peripheral>
<peripheral>
- <name>POWER</name>
- <description>Power control</description>
- <groupName>POWER</groupName>
+ <name>CLOCK</name>
+ <description>Clock control</description>
<baseAddress>0x40000000</baseAddress>
- <size>32</size>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
@@ -1130,54 +1264,177 @@ POSSIBILITY OF SUCH DAMAGE.\n
<name>POWER_CLOCK</name>
<value>0</value>
</interrupt>
+ <groupName>CLOCK</groupName>
+ <size>0x20</size>
<registers>
<register>
- <name>TASKS_CONSTLAT</name>
- <description>Enable constant latency mode</description>
- <addressOffset>0x078</addressOffset>
+ <name>TASKS_HFCLKSTART</name>
+ <description>Start HFXO crystal oscillator</description>
+ <addressOffset>0x000</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_HFCLKSTART</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>TASKS_LOWPWR</name>
- <description>Enable low power mode (variable latency)</description>
- <addressOffset>0x07C</addressOffset>
+ <name>TASKS_HFCLKSTOP</name>
+ <description>Stop HFXO crystal oscillator</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_HFCLKSTOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_LFCLKSTART</name>
+ <description>Start LFCLK</description>
+ <addressOffset>0x008</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_LFCLKSTART</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_POFWARN</name>
- <description>Power failure warning</description>
- <addressOffset>0x108</addressOffset>
+ <name>TASKS_LFCLKSTOP</name>
+ <description>Stop LFCLK</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_LFCLKSTOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CAL</name>
+ <description>Start calibration of LFRC</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CAL</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CTSTART</name>
+ <description>Start calibration timer</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CTSTART</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CTSTOP</name>
+ <description>Stop calibration timer</description>
+ <addressOffset>0x018</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CTSTOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_HFCLKSTARTED</name>
+ <description>HFXO crystal oscillator started</description>
+ <addressOffset>0x100</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_HFCLKSTARTED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_SLEEPENTER</name>
- <description>CPU entered WFI/WFE sleep</description>
- <addressOffset>0x114</addressOffset>
+ <name>EVENTS_LFCLKSTARTED</name>
+ <description>LFCLK started</description>
+ <addressOffset>0x104</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_LFCLKSTARTED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_SLEEPEXIT</name>
- <description>CPU exited WFI/WFE sleep</description>
- <addressOffset>0x118</addressOffset>
+ <name>EVENTS_DONE</name>
+ <description>Calibration of LFRC completed</description>
+ <addressOffset>0x10C</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DONE</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_USBDETECTED</name>
- <description>Voltage supply detected on VBUS</description>
- <addressOffset>0x11C</addressOffset>
+ <name>EVENTS_CTTO</name>
+ <description>Calibration timer timeout</description>
+ <addressOffset>0x110</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTTO</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_USBREMOVED</name>
- <description>Voltage supply removed from VBUS</description>
- <addressOffset>0x120</addressOffset>
+ <name>EVENTS_CTSTARTED</name>
+ <description>Calibration timer has been started and is ready to process new tasks</description>
+ <addressOffset>0x128</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTSTARTED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_USBPWRRDY</name>
- <description>USB 3.3 V supply ready</description>
- <addressOffset>0x124</addressOffset>
+ <name>EVENTS_CTSTOPPED</name>
+ <description>Calibration timer has been stopped and is ready to process new tasks</description>
+ <addressOffset>0x12C</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTSTOPPED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>INTENSET</name>
@@ -1186,10 +1443,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
<access>read-write</access>
<fields>
<field>
- <name>POFWARN</name>
- <description>Write '1' to Enable interrupt for POFWARN event</description>
- <lsb>2</lsb>
- <msb>2</msb>
+ <name>HFCLKSTARTED</name>
+ <description>Write '1' to enable interrupt for HFCLKSTARTED event</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1213,10 +1470,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>SLEEPENTER</name>
- <description>Write '1' to Enable interrupt for SLEEPENTER event</description>
- <lsb>5</lsb>
- <msb>5</msb>
+ <name>LFCLKSTARTED</name>
+ <description>Write '1' to enable interrupt for LFCLKSTARTED event</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1240,10 +1497,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>SLEEPEXIT</name>
- <description>Write '1' to Enable interrupt for SLEEPEXIT event</description>
- <lsb>6</lsb>
- <msb>6</msb>
+ <name>DONE</name>
+ <description>Write '1' to enable interrupt for DONE event</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1267,10 +1524,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>USBDETECTED</name>
- <description>Write '1' to Enable interrupt for USBDETECTED event</description>
- <lsb>7</lsb>
- <msb>7</msb>
+ <name>CTTO</name>
+ <description>Write '1' to enable interrupt for CTTO event</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1294,10 +1551,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>USBREMOVED</name>
- <description>Write '1' to Enable interrupt for USBREMOVED event</description>
- <lsb>8</lsb>
- <msb>8</msb>
+ <name>CTSTARTED</name>
+ <description>Write '1' to enable interrupt for CTSTARTED event</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1321,10 +1578,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>USBPWRRDY</name>
- <description>Write '1' to Enable interrupt for USBPWRRDY event</description>
- <lsb>9</lsb>
- <msb>9</msb>
+ <name>CTSTOPPED</name>
+ <description>Write '1' to enable interrupt for CTSTOPPED event</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1356,10 +1613,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
<access>read-write</access>
<fields>
<field>
- <name>POFWARN</name>
- <description>Write '1' to Disable interrupt for POFWARN event</description>
- <lsb>2</lsb>
- <msb>2</msb>
+ <name>HFCLKSTARTED</name>
+ <description>Write '1' to disable interrupt for HFCLKSTARTED event</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1383,10 +1640,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>SLEEPENTER</name>
- <description>Write '1' to Disable interrupt for SLEEPENTER event</description>
- <lsb>5</lsb>
- <msb>5</msb>
+ <name>LFCLKSTARTED</name>
+ <description>Write '1' to disable interrupt for LFCLKSTARTED event</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1410,10 +1667,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>SLEEPEXIT</name>
- <description>Write '1' to Disable interrupt for SLEEPEXIT event</description>
- <lsb>6</lsb>
- <msb>6</msb>
+ <name>DONE</name>
+ <description>Write '1' to disable interrupt for DONE event</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1437,10 +1694,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>USBDETECTED</name>
- <description>Write '1' to Disable interrupt for USBDETECTED event</description>
- <lsb>7</lsb>
- <msb>7</msb>
+ <name>CTTO</name>
+ <description>Write '1' to disable interrupt for CTTO event</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1464,10 +1721,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>USBREMOVED</name>
- <description>Write '1' to Disable interrupt for USBREMOVED event</description>
- <lsb>8</lsb>
- <msb>8</msb>
+ <name>CTSTARTED</name>
+ <description>Write '1' to disable interrupt for CTSTARTED event</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1491,10 +1748,10 @@ POSSIBILITY OF SUCH DAMAGE.\n
</enumeratedValues>
</field>
<field>
- <name>USBPWRRDY</name>
- <description>Write '1' to Disable interrupt for USBPWRRDY event</description>
- <lsb>9</lsb>
- <msb>9</msb>
+ <name>CTSTOPPED</name>
+ <description>Write '1' to disable interrupt for CTSTOPPED event</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
<enumeratedValues>
<usage>read</usage>
<enumeratedValue>
@@ -1520,169 +1777,242 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <name>RESETREAS</name>
- <description>Reset reason</description>
- <addressOffset>0x400</addressOffset>
- <access>read-write</access>
+ <name>HFCLKRUN</name>
+ <description>Status indicating that HFCLKSTART task has been triggered</description>
+ <addressOffset>0x408</addressOffset>
+ <access>read-only</access>
<fields>
<field>
- <name>RESETPIN</name>
- <description>Reset from pin-reset detected</description>
+ <name>STATUS</name>
+ <description>HFCLKSTART task triggered or not</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>NotTriggered</name>
+ <description>Task not triggered</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Triggered</name>
+ <description>Task triggered</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>HFCLKSTAT</name>
+ <description>HFCLK status</description>
+ <addressOffset>0x40C</addressOffset>
+ <access>read-only</access>
+ <fields>
<field>
- <name>DOG</name>
- <description>Reset from watchdog detected</description>
- <lsb>1</lsb>
- <msb>1</msb>
+ <name>SRC</name>
+ <description>Source of HFCLK</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>RC</name>
+ <description>64 MHz internal oscillator (HFINT)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Xtal</name>
+ <description>64 MHz crystal oscillator (HFXO)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>SREQ</name>
- <description>Reset from soft reset detected</description>
- <lsb>2</lsb>
- <msb>2</msb>
+ <name>STATE</name>
+ <description>HFCLK state</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>NotRunning</name>
+ <description>HFCLK not running</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Running</name>
+ <description>HFCLK running</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKRUN</name>
+ <description>Status indicating that LFCLKSTART task has been triggered</description>
+ <addressOffset>0x414</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>STATUS</name>
+ <description>LFCLKSTART task triggered or not</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotTriggered</name>
+ <description>Task not triggered</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Triggered</name>
+ <description>Task triggered</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSTAT</name>
+ <description>LFCLK status</description>
+ <addressOffset>0x418</addressOffset>
+ <access>read-only</access>
+ <fields>
<field>
- <name>LOCKUP</name>
- <description>Reset from CPU lock-up detected</description>
- <lsb>3</lsb>
- <msb>3</msb>
+ <name>SRC</name>
+ <description>Source of LFCLK</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator (LFRC)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator (LFXO)</description>
<value>1</value>
</enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK (LFSYNT)</description>
+ <value>2</value>
+ </enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>OFF</name>
- <description>Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO</description>
+ <name>STATE</name>
+ <description>LFCLK state</description>
<lsb>16</lsb>
<msb>16</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>NotRunning</name>
+ <description>LFCLK not running</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Running</name>
+ <description>LFCLK running</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSRCCOPY</name>
+ <description>Copy of LFCLKSRC register, set when LFCLKSTART task was triggered</description>
+ <addressOffset>0x41C</addressOffset>
+ <access>read-only</access>
+ <fields>
<field>
- <name>LPCOMP</name>
- <description>Reset due to wake up from System OFF mode when wakeup is triggered from ANADETECT signal from LPCOMP</description>
- <lsb>17</lsb>
- <msb>17</msb>
+ <name>SRC</name>
+ <description>Clock source</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator (LFRC)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator (LFXO)</description>
<value>1</value>
</enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK (LFSYNT)</description>
+ <value>2</value>
+ </enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>LFCLKSRC</name>
+ <description>Clock source for the LFCLK</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>DIF</name>
- <description>Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode</description>
- <lsb>18</lsb>
- <msb>18</msb>
+ <name>SRC</name>
+ <description>Clock source</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>RC</name>
+ <description>32.768 kHz RC oscillator (LFRC)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Xtal</name>
+ <description>32.768 kHz crystal oscillator (LFXO)</description>
<value>1</value>
</enumeratedValue>
+ <enumeratedValue>
+ <name>Synth</name>
+ <description>32.768 kHz synthesized from HFCLK (LFSYNT)</description>
+ <value>2</value>
+ </enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>NFC</name>
- <description>Reset due to wake up from System OFF mode by NFC field detect</description>
- <lsb>19</lsb>
- <msb>19</msb>
+ <name>BYPASS</name>
+ <description>Enable or disable bypass of LFCLK crystal oscillator with external clock source</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>Disabled</name>
+ <description>Disable (use with Xtal or low-swing external source)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Enabled</name>
+ <description>Enable (use with rail-to-rail external source)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>VBUS</name>
- <description>Reset due to wake up from System OFF mode by Vbus rising into valid range</description>
- <lsb>20</lsb>
- <msb>20</msb>
+ <name>EXTERNAL</name>
+ <description>Enable or disable external source for LFCLK</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotDetected</name>
- <description>Not detected</description>
+ <name>Disabled</name>
+ <description>Disable external source (use with Xtal)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Detected</name>
- <description>Detected</description>
+ <name>Enabled</name>
+ <description>Enable use of external source instead of Xtal (SRC needs to be set to Xtal)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -1690,220 +2020,999 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <name>RAMSTATUS</name>
- <description>Deprecated register - RAM status register</description>
- <addressOffset>0x428</addressOffset>
- <access>read-only</access>
- <resetValue>0x00000000</resetValue>
+ <name>HFXODEBOUNCE</name>
+ <description>HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART task.</description>
+ <addressOffset>0x528</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000010</resetValue>
<fields>
<field>
- <name>RAMBLOCK0</name>
- <description>RAM block 0 is on or off/powering up</description>
+ <name>HFXODEBOUNCE</name>
+ <description>HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us.</description>
<lsb>0</lsb>
- <msb>0</msb>
+ <msb>7</msb>
<enumeratedValues>
<enumeratedValue>
- <name>Off</name>
- <description>Off</description>
- <value>0</value>
+ <name>Db256us</name>
+ <description>256 us debounce time. Recommended for TSX-3225, FA-20H and FA-128 crystals.</description>
+ <value>0x10</value>
</enumeratedValue>
<enumeratedValue>
- <name>On</name>
- <description>On</description>
- <value>1</value>
+ <name>Db1024us</name>
+ <description>1024 us debounce time. Recommended for NX1612AA and NX1210AB crystals.</description>
+ <value>0x40</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>CTIV</name>
+ <description>Calibration timer interval</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>RAMBLOCK1</name>
- <description>RAM block 1 is on or off/powering up</description>
- <lsb>1</lsb>
+ <name>CTIV</name>
+ <description>Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds.</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TRACECONFIG</name>
+ <description>Clocking options for the trace port debug interface</description>
+ <addressOffset>0x55C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>TRACEPORTSPEED</name>
+ <description>Speed of trace port clock. Note that the TRACECLK pin will output this clock divided by two.</description>
+ <lsb>0</lsb>
<msb>1</msb>
<enumeratedValues>
<enumeratedValue>
- <name>Off</name>
- <description>Off</description>
+ <name>32MHz</name>
+ <description>32 MHz trace port clock (TRACECLK = 16 MHz)</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>On</name>
- <description>On</description>
+ <name>16MHz</name>
+ <description>16 MHz trace port clock (TRACECLK = 8 MHz)</description>
<value>1</value>
</enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>RAMBLOCK2</name>
- <description>RAM block 2 is on or off/powering up</description>
- <lsb>2</lsb>
- <msb>2</msb>
- <enumeratedValues>
<enumeratedValue>
- <name>Off</name>
- <description>Off</description>
- <value>0</value>
+ <name>8MHz</name>
+ <description>8 MHz trace port clock (TRACECLK = 4 MHz)</description>
+ <value>2</value>
</enumeratedValue>
<enumeratedValue>
- <name>On</name>
- <description>On</description>
- <value>1</value>
+ <name>4MHz</name>
+ <description>4 MHz trace port clock (TRACECLK = 2 MHz)</description>
+ <value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>RAMBLOCK3</name>
- <description>RAM block 3 is on or off/powering up</description>
- <lsb>3</lsb>
- <msb>3</msb>
+ <name>TRACEMUX</name>
+ <description>Pin multiplexing of trace signals. See pin assignment chapter for more details.</description>
+ <lsb>16</lsb>
+ <msb>17</msb>
<enumeratedValues>
<enumeratedValue>
- <name>Off</name>
- <description>Off</description>
+ <name>GPIO</name>
+ <description>No trace signals routed to pins. All pins can be used as regular GPIOs.</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>On</name>
- <description>On</description>
+ <name>Serial</name>
+ <description>SWO trace signal routed to pin. Remaining pins can be used as regular GPIOs.</description>
<value>1</value>
</enumeratedValue>
+ <enumeratedValue>
+ <name>Parallel</name>
+ <description>All trace signals (TRACECLK and TRACEDATA[n]) routed to pins.</description>
+ <value>2</value>
+ </enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
- <name>USBREGSTATUS</name>
- <description>USB supply status</description>
- <addressOffset>0x438</addressOffset>
- <access>read-only</access>
+ <name>LFRCMODE</name>
+ <description>LFRC mode configuration</description>
+ <addressOffset>0x5B4</addressOffset>
+ <access>read-write</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
- <name>VBUSDETECT</name>
- <description>VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information)</description>
+ <name>MODE</name>
+ <description>Set LFRC mode</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NoVbus</name>
- <description>VBUS voltage below valid threshold</description>
+ <name>Normal</name>
+ <description>Normal mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>VbusPresent</name>
- <description>VBUS voltage above valid threshold</description>
+ <name>ULP</name>
+ <description>Ultra-low power mode (ULP)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>OUTPUTRDY</name>
- <description>USB supply output settling time elapsed</description>
- <lsb>1</lsb>
- <msb>1</msb>
+ <name>STATUS</name>
+ <description>Active LFRC mode. This field is read only.</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotReady</name>
- <description>USBREG output settling time not elapsed</description>
+ <name>Normal</name>
+ <description>Normal mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Ready</name>
- <description>USBREG output settling time elapsed (same information as USBPWRRDY event)</description>
+ <name>ULP</name>
+ <description>Ultra-low power mode (ULP)</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>POWER</name>
+ <description>Power control</description>
+ <baseAddress>0x40000000</baseAddress>
+ <alternatePeripheral>CLOCK</alternatePeripheral>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>POWER_CLOCK</name>
+ <value>0</value>
+ </interrupt>
+ <groupName>POWER</groupName>
+ <size>0x20</size>
+ <registers>
+ <register>
+ <name>TASKS_CONSTLAT</name>
+ <description>Enable constant latency mode</description>
+ <addressOffset>0x78</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CONSTLAT</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
<register>
- <name>SYSTEMOFF</name>
- <description>System OFF register</description>
- <addressOffset>0x500</addressOffset>
+ <name>TASKS_LOWPWR</name>
+ <description>Enable low power mode (variable latency)</description>
+ <addressOffset>0x7C</addressOffset>
<access>write-only</access>
<fields>
<field>
- <name>SYSTEMOFF</name>
- <description>Enable System OFF mode</description>
+ <name>TASKS_LOWPWR</name>
<lsb>0</lsb>
<msb>0</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Enter</name>
- <description>Enable System OFF mode</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
</field>
</fields>
</register>
<register>
- <name>POFCON</name>
- <description>Power failure comparator configuration</description>
- <addressOffset>0x510</addressOffset>
+ <name>EVENTS_POFWARN</name>
+ <description>Power failure warning</description>
+ <addressOffset>0x108</addressOffset>
<access>read-write</access>
<fields>
<field>
- <name>POF</name>
- <description>Enable or disable power failure comparator</description>
+ <name>EVENTS_POFWARN</name>
<lsb>0</lsb>
<msb>0</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Disabled</name>
- <description>Disable</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enable</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SLEEPENTER</name>
+ <description>CPU entered WFI/WFE sleep</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>THRESHOLD</name>
- <description>Power failure comparator threshold setting. This setting applies both for normal voltage mode (supply connected to both VDD and VDDH) and high voltage mode (supply connected to VDDH only).</description>
- <lsb>1</lsb>
- <msb>4</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>V17</name>
- <description>Set threshold to 1.7 V</description>
- <value>4</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V18</name>
- <description>Set threshold to 1.8 V</description>
- <value>5</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V19</name>
- <description>Set threshold to 1.9 V</description>
- <value>6</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V20</name>
- <description>Set threshold to 2.0 V</description>
- <value>7</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V21</name>
- <description>Set threshold to 2.1 V</description>
- <value>8</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V22</name>
- <description>Set threshold to 2.2 V</description>
- <value>9</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V23</name>
- <description>Set threshold to 2.3 V</description>
- <value>10</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>V24</name>
- <description>Set threshold to 2.4 V</description>
+ <name>EVENTS_SLEEPENTER</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_SLEEPEXIT</name>
+ <description>CPU exited WFI/WFE sleep</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_SLEEPEXIT</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_USBDETECTED</name>
+ <description>Voltage supply detected on VBUS</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_USBDETECTED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_USBREMOVED</name>
+ <description>Voltage supply removed from VBUS</description>
+ <addressOffset>0x120</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_USBREMOVED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_USBPWRRDY</name>
+ <description>USB 3.3 V supply ready</description>
+ <addressOffset>0x124</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_USBPWRRDY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POFWARN</name>
+ <description>Write '1' to enable interrupt for POFWARN event</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPENTER</name>
+ <description>Write '1' to enable interrupt for SLEEPENTER event</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPEXIT</name>
+ <description>Write '1' to enable interrupt for SLEEPEXIT event</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBDETECTED</name>
+ <description>Write '1' to enable interrupt for USBDETECTED event</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBREMOVED</name>
+ <description>Write '1' to enable interrupt for USBREMOVED event</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBPWRRDY</name>
+ <description>Write '1' to enable interrupt for USBPWRRDY event</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POFWARN</name>
+ <description>Write '1' to disable interrupt for POFWARN event</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPENTER</name>
+ <description>Write '1' to disable interrupt for SLEEPENTER event</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SLEEPEXIT</name>
+ <description>Write '1' to disable interrupt for SLEEPEXIT event</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBDETECTED</name>
+ <description>Write '1' to disable interrupt for USBDETECTED event</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBREMOVED</name>
+ <description>Write '1' to disable interrupt for USBREMOVED event</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>USBPWRRDY</name>
+ <description>Write '1' to disable interrupt for USBPWRRDY event</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RESETREAS</name>
+ <description>Reset reason</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>RESETPIN</name>
+ <description>Reset from pin-reset detected</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DOG</name>
+ <description>Reset from watchdog detected</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>SREQ</name>
+ <description>Reset from soft reset detected</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LOCKUP</name>
+ <description>Reset from CPU lock-up detected</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OFF</name>
+ <description>Reset due to wake up from System OFF mode when wakeup is triggered from DETECT signal from GPIO</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>LPCOMP</name>
+ <description>Reset due to wake up from System OFF mode when wakeup is triggered from ANADETECT signal from LPCOMP</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DIF</name>
+ <description>Reset due to wake up from System OFF mode when wakeup is triggered from entering into debug interface mode</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>NFC</name>
+ <description>Reset due to wake up from System OFF mode by NFC field detect</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>VBUS</name>
+ <description>Reset due to wake up from System OFF mode by VBUS rising into valid range</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotDetected</name>
+ <description>Not detected</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Detected</name>
+ <description>Detected</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RAMSTATUS</name>
+ <description>Deprecated register - RAM status register</description>
+ <addressOffset>0x428</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>RAMBLOCK0</name>
+ <description>RAM block 0 is on or off/powering up</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RAMBLOCK1</name>
+ <description>RAM block 1 is on or off/powering up</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RAMBLOCK2</name>
+ <description>RAM block 2 is on or off/powering up</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>RAMBLOCK3</name>
+ <description>RAM block 3 is on or off/powering up</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Off</name>
+ <description>Off</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>On</name>
+ <description>On</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>USBREGSTATUS</name>
+ <description>USB supply status</description>
+ <addressOffset>0x438</addressOffset>
+ <access>read-only</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
+ <field>
+ <name>VBUSDETECT</name>
+ <description>VBUS input detection status (USBDETECTED and USBREMOVED events are derived from this information)</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NoVbus</name>
+ <description>VBUS voltage below valid threshold</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>VbusPresent</name>
+ <description>VBUS voltage above valid threshold</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>OUTPUTRDY</name>
+ <description>USB supply output settling time elapsed</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>NotReady</name>
+ <description>USBREG output settling time not elapsed</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ready</name>
+ <description>USBREG output settling time elapsed (same information as USBPWRRDY event)</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SYSTEMOFF</name>
+ <description>System OFF register</description>
+ <addressOffset>0x500</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>SYSTEMOFF</name>
+ <description>Enable System OFF mode</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Enter</name>
+ <description>Enable System OFF mode</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>POFCON</name>
+ <description>Power-fail comparator configuration</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>POF</name>
+ <description>Enable or disable power failure warning</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>THRESHOLD</name>
+ <description>Power-fail comparator threshold setting. This setting applies both for normal voltage mode (supply connected to both VDD and VDDH) and high voltage mode (supply connected to VDDH only). Values 0-3 set threshold below 1.7 V and should not be used as brown out detection will be activated before power failure warning on such low voltages.</description>
+ <lsb>1</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>V17</name>
+ <description>Set threshold to 1.7 V</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V18</name>
+ <description>Set threshold to 1.8 V</description>
+ <value>5</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V19</name>
+ <description>Set threshold to 1.9 V</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V20</name>
+ <description>Set threshold to 2.0 V</description>
+ <value>7</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V21</name>
+ <description>Set threshold to 2.1 V</description>
+ <value>8</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V22</name>
+ <description>Set threshold to 2.2 V</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V23</name>
+ <description>Set threshold to 2.3 V</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>V24</name>
+ <description>Set threshold to 2.4 V</description>
<value>11</value>
</enumeratedValue>
<enumeratedValue>
@@ -1930,7 +3039,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>THRESHOLDVDDH</name>
- <description>Power failure comparator threshold setting for high voltage mode (supply connected to VDDH only). This setting does not apply for normal voltage mode (supply connected to both VDD and VDDH).</description>
+ <description>Power-fail comparator threshold setting for high voltage mode (supply connected to VDDH only). This setting does not apply for normal voltage mode (supply connected to both VDD and VDDH).</description>
<lsb>8</lsb>
<msb>11</msb>
<enumeratedValues>
@@ -2127,20 +3236,21 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<cluster>
<dim>9</dim>
- <dimIncrement>16</dimIncrement>
+ <dimIncrement>0x010</dimIncrement>
<name>RAM[%s]</name>
<description>Unspecified</description>
+ <headerStructName>POWER_RAM</headerStructName>
<addressOffset>0x900</addressOffset>
<register>
<name>POWER</name>
- <description>Description cluster[0]: RAM0 power control register</description>
+ <description>Description cluster[n]: RAMn power control register</description>
<addressOffset>0x000</addressOffset>
<access>read-write</access>
<resetValue>0x0000FFFF</resetValue>
<fields>
<field>
<name>S0POWER</name>
- <description>Keep RAM section S0 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S0 on or off in System ON mode.</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -2158,7 +3268,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S1POWER</name>
- <description>Keep RAM section S1 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S1 on or off in System ON mode.</description>
<lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
@@ -2176,7 +3286,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S2POWER</name>
- <description>Keep RAM section S2 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S2 on or off in System ON mode.</description>
<lsb>2</lsb>
<msb>2</msb>
<enumeratedValues>
@@ -2194,7 +3304,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S3POWER</name>
- <description>Keep RAM section S3 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S3 on or off in System ON mode.</description>
<lsb>3</lsb>
<msb>3</msb>
<enumeratedValues>
@@ -2212,7 +3322,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S4POWER</name>
- <description>Keep RAM section S4 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S4 on or off in System ON mode.</description>
<lsb>4</lsb>
<msb>4</msb>
<enumeratedValues>
@@ -2230,7 +3340,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S5POWER</name>
- <description>Keep RAM section S5 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S5 on or off in System ON mode.</description>
<lsb>5</lsb>
<msb>5</msb>
<enumeratedValues>
@@ -2248,7 +3358,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S6POWER</name>
- <description>Keep RAM section S6 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S6 on or off in System ON mode.</description>
<lsb>6</lsb>
<msb>6</msb>
<enumeratedValues>
@@ -2266,7 +3376,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S7POWER</name>
- <description>Keep RAM section S7 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S7 on or off in System ON mode.</description>
<lsb>7</lsb>
<msb>7</msb>
<enumeratedValues>
@@ -2284,7 +3394,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S8POWER</name>
- <description>Keep RAM section S8 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S8 on or off in System ON mode.</description>
<lsb>8</lsb>
<msb>8</msb>
<enumeratedValues>
@@ -2302,7 +3412,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S9POWER</name>
- <description>Keep RAM section S9 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S9 on or off in System ON mode.</description>
<lsb>9</lsb>
<msb>9</msb>
<enumeratedValues>
@@ -2320,7 +3430,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S10POWER</name>
- <description>Keep RAM section S10 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S10 on or off in System ON mode.</description>
<lsb>10</lsb>
<msb>10</msb>
<enumeratedValues>
@@ -2338,7 +3448,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S11POWER</name>
- <description>Keep RAM section S11 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S11 on or off in System ON mode.</description>
<lsb>11</lsb>
<msb>11</msb>
<enumeratedValues>
@@ -2356,7 +3466,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S12POWER</name>
- <description>Keep RAM section S12 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S12 on or off in System ON mode.</description>
<lsb>12</lsb>
<msb>12</msb>
<enumeratedValues>
@@ -2374,7 +3484,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S13POWER</name>
- <description>Keep RAM section S13 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S13 on or off in System ON mode.</description>
<lsb>13</lsb>
<msb>13</msb>
<enumeratedValues>
@@ -2392,7 +3502,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S14POWER</name>
- <description>Keep RAM section S14 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S14 on or off in System ON mode.</description>
<lsb>14</lsb>
<msb>14</msb>
<enumeratedValues>
@@ -2410,7 +3520,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S15POWER</name>
- <description>Keep RAM section S15 ON or OFF in System ON mode.</description>
+ <description>Keep RAM section S15 on or off in System ON mode.</description>
<lsb>15</lsb>
<msb>15</msb>
<enumeratedValues>
@@ -2428,7 +3538,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S0RETENTION</name>
- <description>Keep retention on RAM section S0 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S0 when RAM section is off</description>
<lsb>16</lsb>
<msb>16</msb>
<enumeratedValues>
@@ -2446,7 +3556,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S1RETENTION</name>
- <description>Keep retention on RAM section S1 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S1 when RAM section is off</description>
<lsb>17</lsb>
<msb>17</msb>
<enumeratedValues>
@@ -2464,7 +3574,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S2RETENTION</name>
- <description>Keep retention on RAM section S2 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S2 when RAM section is off</description>
<lsb>18</lsb>
<msb>18</msb>
<enumeratedValues>
@@ -2482,7 +3592,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S3RETENTION</name>
- <description>Keep retention on RAM section S3 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S3 when RAM section is off</description>
<lsb>19</lsb>
<msb>19</msb>
<enumeratedValues>
@@ -2500,7 +3610,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S4RETENTION</name>
- <description>Keep retention on RAM section S4 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S4 when RAM section is off</description>
<lsb>20</lsb>
<msb>20</msb>
<enumeratedValues>
@@ -2518,7 +3628,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S5RETENTION</name>
- <description>Keep retention on RAM section S5 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S5 when RAM section is off</description>
<lsb>21</lsb>
<msb>21</msb>
<enumeratedValues>
@@ -2536,7 +3646,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S6RETENTION</name>
- <description>Keep retention on RAM section S6 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S6 when RAM section is off</description>
<lsb>22</lsb>
<msb>22</msb>
<enumeratedValues>
@@ -2554,7 +3664,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S7RETENTION</name>
- <description>Keep retention on RAM section S7 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S7 when RAM section is off</description>
<lsb>23</lsb>
<msb>23</msb>
<enumeratedValues>
@@ -2572,7 +3682,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S8RETENTION</name>
- <description>Keep retention on RAM section S8 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S8 when RAM section is off</description>
<lsb>24</lsb>
<msb>24</msb>
<enumeratedValues>
@@ -2590,7 +3700,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S9RETENTION</name>
- <description>Keep retention on RAM section S9 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S9 when RAM section is off</description>
<lsb>25</lsb>
<msb>25</msb>
<enumeratedValues>
@@ -2608,7 +3718,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S10RETENTION</name>
- <description>Keep retention on RAM section S10 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S10 when RAM section is off</description>
<lsb>26</lsb>
<msb>26</msb>
<enumeratedValues>
@@ -2626,7 +3736,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S11RETENTION</name>
- <description>Keep retention on RAM section S11 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S11 when RAM section is off</description>
<lsb>27</lsb>
<msb>27</msb>
<enumeratedValues>
@@ -2644,7 +3754,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S12RETENTION</name>
- <description>Keep retention on RAM section S12 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S12 when RAM section is off</description>
<lsb>28</lsb>
<msb>28</msb>
<enumeratedValues>
@@ -2662,7 +3772,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S13RETENTION</name>
- <description>Keep retention on RAM section S13 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S13 when RAM section is off</description>
<lsb>29</lsb>
<msb>29</msb>
<enumeratedValues>
@@ -2680,7 +3790,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S14RETENTION</name>
- <description>Keep retention on RAM section S14 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S14 when RAM section is off</description>
<lsb>30</lsb>
<msb>30</msb>
<enumeratedValues>
@@ -2698,7 +3808,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S15RETENTION</name>
- <description>Keep retention on RAM section S15 when RAM section is in OFF</description>
+ <description>Keep retention on RAM section S15 when RAM section is off</description>
<lsb>31</lsb>
<msb>31</msb>
<enumeratedValues>
@@ -2718,14 +3828,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<register>
<name>POWERSET</name>
- <description>Description cluster[0]: RAM0 power control set register</description>
+ <description>Description cluster[n]: RAMn power control set register</description>
<addressOffset>0x004</addressOffset>
<access>write-only</access>
<resetValue>0x0000FFFF</resetValue>
<fields>
<field>
<name>S0POWER</name>
- <description>Keep RAM section S0 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S0 of RAMn on or off in System ON mode</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -2738,7 +3848,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S1POWER</name>
- <description>Keep RAM section S1 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S1 of RAMn on or off in System ON mode</description>
<lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
@@ -2751,7 +3861,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S2POWER</name>
- <description>Keep RAM section S2 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S2 of RAMn on or off in System ON mode</description>
<lsb>2</lsb>
<msb>2</msb>
<enumeratedValues>
@@ -2764,7 +3874,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S3POWER</name>
- <description>Keep RAM section S3 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S3 of RAMn on or off in System ON mode</description>
<lsb>3</lsb>
<msb>3</msb>
<enumeratedValues>
@@ -2777,7 +3887,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S4POWER</name>
- <description>Keep RAM section S4 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S4 of RAMn on or off in System ON mode</description>
<lsb>4</lsb>
<msb>4</msb>
<enumeratedValues>
@@ -2790,7 +3900,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S5POWER</name>
- <description>Keep RAM section S5 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S5 of RAMn on or off in System ON mode</description>
<lsb>5</lsb>
<msb>5</msb>
<enumeratedValues>
@@ -2803,7 +3913,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S6POWER</name>
- <description>Keep RAM section S6 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S6 of RAMn on or off in System ON mode</description>
<lsb>6</lsb>
<msb>6</msb>
<enumeratedValues>
@@ -2816,7 +3926,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S7POWER</name>
- <description>Keep RAM section S7 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S7 of RAMn on or off in System ON mode</description>
<lsb>7</lsb>
<msb>7</msb>
<enumeratedValues>
@@ -2829,7 +3939,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S8POWER</name>
- <description>Keep RAM section S8 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S8 of RAMn on or off in System ON mode</description>
<lsb>8</lsb>
<msb>8</msb>
<enumeratedValues>
@@ -2842,7 +3952,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S9POWER</name>
- <description>Keep RAM section S9 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S9 of RAMn on or off in System ON mode</description>
<lsb>9</lsb>
<msb>9</msb>
<enumeratedValues>
@@ -2855,7 +3965,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S10POWER</name>
- <description>Keep RAM section S10 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S10 of RAMn on or off in System ON mode</description>
<lsb>10</lsb>
<msb>10</msb>
<enumeratedValues>
@@ -2868,7 +3978,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S11POWER</name>
- <description>Keep RAM section S11 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S11 of RAMn on or off in System ON mode</description>
<lsb>11</lsb>
<msb>11</msb>
<enumeratedValues>
@@ -2881,7 +3991,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S12POWER</name>
- <description>Keep RAM section S12 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S12 of RAMn on or off in System ON mode</description>
<lsb>12</lsb>
<msb>12</msb>
<enumeratedValues>
@@ -2894,7 +4004,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S13POWER</name>
- <description>Keep RAM section S13 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S13 of RAMn on or off in System ON mode</description>
<lsb>13</lsb>
<msb>13</msb>
<enumeratedValues>
@@ -2907,7 +4017,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S14POWER</name>
- <description>Keep RAM section S14 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S14 of RAMn on or off in System ON mode</description>
<lsb>14</lsb>
<msb>14</msb>
<enumeratedValues>
@@ -2920,7 +4030,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S15POWER</name>
- <description>Keep RAM section S15 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S15 of RAMn on or off in System ON mode</description>
<lsb>15</lsb>
<msb>15</msb>
<enumeratedValues>
@@ -3143,14 +4253,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
</register>
<register>
<name>POWERCLR</name>
- <description>Description cluster[0]: RAM0 power control clear register</description>
+ <description>Description cluster[n]: RAMn power control clear register</description>
<addressOffset>0x008</addressOffset>
<access>write-only</access>
<resetValue>0x0000FFFF</resetValue>
<fields>
<field>
<name>S0POWER</name>
- <description>Keep RAM section S0 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S0 of RAMn on or off in System ON mode</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -3163,7 +4273,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S1POWER</name>
- <description>Keep RAM section S1 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S1 of RAMn on or off in System ON mode</description>
<lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
@@ -3176,7 +4286,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S2POWER</name>
- <description>Keep RAM section S2 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S2 of RAMn on or off in System ON mode</description>
<lsb>2</lsb>
<msb>2</msb>
<enumeratedValues>
@@ -3189,7 +4299,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S3POWER</name>
- <description>Keep RAM section S3 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S3 of RAMn on or off in System ON mode</description>
<lsb>3</lsb>
<msb>3</msb>
<enumeratedValues>
@@ -3202,7 +4312,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S4POWER</name>
- <description>Keep RAM section S4 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S4 of RAMn on or off in System ON mode</description>
<lsb>4</lsb>
<msb>4</msb>
<enumeratedValues>
@@ -3215,7 +4325,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S5POWER</name>
- <description>Keep RAM section S5 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S5 of RAMn on or off in System ON mode</description>
<lsb>5</lsb>
<msb>5</msb>
<enumeratedValues>
@@ -3228,7 +4338,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S6POWER</name>
- <description>Keep RAM section S6 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S6 of RAMn on or off in System ON mode</description>
<lsb>6</lsb>
<msb>6</msb>
<enumeratedValues>
@@ -3241,7 +4351,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S7POWER</name>
- <description>Keep RAM section S7 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S7 of RAMn on or off in System ON mode</description>
<lsb>7</lsb>
<msb>7</msb>
<enumeratedValues>
@@ -3254,7 +4364,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S8POWER</name>
- <description>Keep RAM section S8 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S8 of RAMn on or off in System ON mode</description>
<lsb>8</lsb>
<msb>8</msb>
<enumeratedValues>
@@ -3267,7 +4377,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S9POWER</name>
- <description>Keep RAM section S9 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S9 of RAMn on or off in System ON mode</description>
<lsb>9</lsb>
<msb>9</msb>
<enumeratedValues>
@@ -3280,7 +4390,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S10POWER</name>
- <description>Keep RAM section S10 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S10 of RAMn on or off in System ON mode</description>
<lsb>10</lsb>
<msb>10</msb>
<enumeratedValues>
@@ -3293,7 +4403,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S11POWER</name>
- <description>Keep RAM section S11 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S11 of RAMn on or off in System ON mode</description>
<lsb>11</lsb>
<msb>11</msb>
<enumeratedValues>
@@ -3306,7 +4416,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S12POWER</name>
- <description>Keep RAM section S12 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S12 of RAMn on or off in System ON mode</description>
<lsb>12</lsb>
<msb>12</msb>
<enumeratedValues>
@@ -3319,7 +4429,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S13POWER</name>
- <description>Keep RAM section S13 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S13 of RAMn on or off in System ON mode</description>
<lsb>13</lsb>
<msb>13</msb>
<enumeratedValues>
@@ -3332,7 +4442,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S14POWER</name>
- <description>Keep RAM section S14 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S14 of RAMn on or off in System ON mode</description>
<lsb>14</lsb>
<msb>14</msb>
<enumeratedValues>
@@ -3345,7 +4455,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>S15POWER</name>
- <description>Keep RAM section S15 of RAM0 on or off in System ON mode</description>
+ <description>Keep RAM section S15 of RAMn on or off in System ON mode</description>
<lsb>15</lsb>
<msb>15</msb>
<enumeratedValues>
@@ -3570,579 +4680,820 @@ POSSIBILITY OF SUCH DAMAGE.\n
</registers>
</peripheral>
<peripheral>
- <name>CLOCK</name>
- <description>Clock control</description>
- <groupName>CLOCK</groupName>
- <baseAddress>0x40000000</baseAddress>
- <size>32</size>
- <alternatePeripheral>POWER</alternatePeripheral>
+ <name>RADIO</name>
+ <description>2.4 GHz radio</description>
+ <baseAddress>0x40001000</baseAddress>
<addressBlock>
<offset>0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<interrupt>
- <name>POWER_CLOCK</name>
- <value>0</value>
+ <name>RADIO</name>
+ <value>1</value>
</interrupt>
+ <groupName>RADIO</groupName>
+ <size>0x20</size>
<registers>
<register>
- <name>TASKS_HFCLKSTART</name>
- <description>Start HFCLK crystal oscillator</description>
+ <name>TASKS_TXEN</name>
+ <description>Enable RADIO in TX mode</description>
<addressOffset>0x000</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_TXEN</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>TASKS_HFCLKSTOP</name>
- <description>Stop HFCLK crystal oscillator</description>
+ <name>TASKS_RXEN</name>
+ <description>Enable RADIO in RX mode</description>
<addressOffset>0x004</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RXEN</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>TASKS_LFCLKSTART</name>
- <description>Start LFCLK source</description>
+ <name>TASKS_START</name>
+ <description>Start RADIO</description>
<addressOffset>0x008</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_START</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOP</name>
+ <description>Stop RADIO</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_DISABLE</name>
+ <description>Disable RADIO</description>
+ <addressOffset>0x010</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_DISABLE</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RSSISTART</name>
+ <description>Start the RSSI and take one single sample of the receive signal strength</description>
+ <addressOffset>0x014</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RSSISTART</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_RSSISTOP</name>
+ <description>Stop the RSSI measurement</description>
+ <addressOffset>0x018</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_RSSISTOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_BCSTART</name>
+ <description>Start the bit counter</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_BCSTART</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_BCSTOP</name>
+ <description>Stop the bit counter</description>
+ <addressOffset>0x020</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_BCSTOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_EDSTART</name>
+ <description>Start the energy detect measurement used in IEEE 802.15.4 mode</description>
+ <addressOffset>0x024</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_EDSTART</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_EDSTOP</name>
+ <description>Stop the energy detect measurement</description>
+ <addressOffset>0x028</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_EDSTOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CCASTART</name>
+ <description>Start the clear channel assessment used in IEEE 802.15.4 mode</description>
+ <addressOffset>0x02C</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CCASTART</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_CCASTOP</name>
+ <description>Stop the clear channel assessment</description>
+ <addressOffset>0x030</addressOffset>
+ <access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_CCASTOP</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_READY</name>
+ <description>RADIO has ramped up and is ready to be started</description>
+ <addressOffset>0x100</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_READY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_ADDRESS</name>
+ <description>Address sent or received</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ADDRESS</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_PAYLOAD</name>
+ <description>Packet payload sent or received</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PAYLOAD</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_END</name>
+ <description>Packet sent or received</description>
+ <addressOffset>0x10C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_END</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DISABLED</name>
+ <description>RADIO has been disabled</description>
+ <addressOffset>0x110</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DISABLED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DEVMATCH</name>
+ <description>A device address match occurred on the last received packet</description>
+ <addressOffset>0x114</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DEVMATCH</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_DEVMISS</name>
+ <description>No device address match occurred on the last received packet</description>
+ <addressOffset>0x118</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_DEVMISS</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RSSIEND</name>
+ <description>Sampling of receive signal strength complete</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RSSIEND</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_BCMATCH</name>
+ <description>Bit counter reached bit count value</description>
+ <addressOffset>0x128</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_BCMATCH</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CRCOK</name>
+ <description>Packet received with CRC ok</description>
+ <addressOffset>0x130</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CRCOK</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_CRCERROR</name>
+ <description>Packet received with CRC error</description>
+ <addressOffset>0x134</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CRCERROR</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_FRAMESTART</name>
+ <description>IEEE 802.15.4 length field received</description>
+ <addressOffset>0x138</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_FRAMESTART</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>TASKS_LFCLKSTOP</name>
- <description>Stop LFCLK source</description>
- <addressOffset>0x00C</addressOffset>
- <access>write-only</access>
+ <name>EVENTS_EDEND</name>
+ <description>Sampling of energy detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register.</description>
+ <addressOffset>0x13C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_EDEND</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>TASKS_CAL</name>
- <description>Start calibration of LFRC or LFULP oscillator</description>
- <addressOffset>0x010</addressOffset>
- <access>write-only</access>
+ <name>EVENTS_EDSTOPPED</name>
+ <description>The sampling of energy detection has stopped</description>
+ <addressOffset>0x140</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_EDSTOPPED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>TASKS_CTSTART</name>
- <description>Start calibration timer</description>
- <addressOffset>0x014</addressOffset>
- <access>write-only</access>
+ <name>EVENTS_CCAIDLE</name>
+ <description>Wireless medium in idle - clear to send</description>
+ <addressOffset>0x144</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CCAIDLE</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>TASKS_CTSTOP</name>
- <description>Stop calibration timer</description>
- <addressOffset>0x018</addressOffset>
- <access>write-only</access>
+ <name>EVENTS_CCABUSY</name>
+ <description>Wireless medium busy - do not send</description>
+ <addressOffset>0x148</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CCABUSY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_HFCLKSTARTED</name>
- <description>HFCLK oscillator started</description>
- <addressOffset>0x100</addressOffset>
+ <name>EVENTS_CCASTOPPED</name>
+ <description>The CCA has stopped</description>
+ <addressOffset>0x14C</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CCASTOPPED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_LFCLKSTARTED</name>
- <description>LFCLK started</description>
- <addressOffset>0x104</addressOffset>
+ <name>EVENTS_RATEBOOST</name>
+ <description>Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit.</description>
+ <addressOffset>0x150</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RATEBOOST</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_DONE</name>
- <description>Calibration of LFCLK RC oscillator complete event</description>
- <addressOffset>0x10C</addressOffset>
+ <name>EVENTS_TXREADY</name>
+ <description>RADIO has ramped up and is ready to be started TX path</description>
+ <addressOffset>0x154</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXREADY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_CTTO</name>
- <description>Calibration timer timeout</description>
- <addressOffset>0x110</addressOffset>
+ <name>EVENTS_RXREADY</name>
+ <description>RADIO has ramped up and is ready to be started RX path</description>
+ <addressOffset>0x158</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXREADY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_CTSTARTED</name>
- <description>Calibration timer has been started and is ready to process new tasks</description>
- <addressOffset>0x128</addressOffset>
+ <name>EVENTS_MHRMATCH</name>
+ <description>MAC header match found</description>
+ <addressOffset>0x15C</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_MHRMATCH</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>EVENTS_CTSTOPPED</name>
- <description>Calibration timer has been stopped and is ready to process new tasks</description>
- <addressOffset>0x12C</addressOffset>
+ <name>EVENTS_PHYEND</name>
+ <description>Generated in Ble_LR125Kbit, Ble_LR500Kbit and BleIeee802154_250Kbit modes when last bit is sent on air.</description>
+ <addressOffset>0x16C</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_PHYEND</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
- <name>INTENSET</name>
- <description>Enable interrupt</description>
- <addressOffset>0x304</addressOffset>
+ <name>SHORTS</name>
+ <description>Shortcut register</description>
+ <addressOffset>0x200</addressOffset>
<access>read-write</access>
<fields>
<field>
- <name>HFCLKSTARTED</name>
- <description>Write '1' to Enable interrupt for HFCLKSTARTED event</description>
+ <name>READY_START</name>
+ <description>Shortcut between READY event and START task</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>LFCLKSTARTED</name>
- <description>Write '1' to Enable interrupt for LFCLKSTARTED event</description>
+ <name>END_DISABLE</name>
+ <description>Shortcut between END event and DISABLE task</description>
<lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
+ </field>
+ <field>
+ <name>DISABLED_TXEN</name>
+ <description>Shortcut between DISABLED event and TXEN task</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
<enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>DONE</name>
- <description>Write '1' to Enable interrupt for DONE event</description>
+ <name>DISABLED_RXEN</name>
+ <description>Shortcut between DISABLED event and RXEN task</description>
<lsb>3</lsb>
<msb>3</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CTTO</name>
- <description>Write '1' to Enable interrupt for CTTO event</description>
+ <name>ADDRESS_RSSISTART</name>
+ <description>Shortcut between ADDRESS event and RSSISTART task</description>
<lsb>4</lsb>
<msb>4</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CTSTARTED</name>
- <description>Write '1' to Enable interrupt for CTSTARTED event</description>
- <lsb>10</lsb>
- <msb>10</msb>
+ <name>END_START</name>
+ <description>Shortcut between END event and START task</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CTSTOPPED</name>
- <description>Write '1' to Enable interrupt for CTSTOPPED event</description>
- <lsb>11</lsb>
- <msb>11</msb>
+ <name>ADDRESS_BCSTART</name>
+ <description>Shortcut between ADDRESS event and BCSTART task</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>INTENCLR</name>
- <description>Disable interrupt</description>
- <addressOffset>0x308</addressOffset>
- <access>read-write</access>
- <fields>
<field>
- <name>HFCLKSTARTED</name>
- <description>Write '1' to Disable interrupt for HFCLKSTARTED event</description>
- <lsb>0</lsb>
- <msb>0</msb>
+ <name>DISABLED_RSSISTOP</name>
+ <description>Shortcut between DISABLED event and RSSISTOP task</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>LFCLKSTARTED</name>
- <description>Write '1' to Disable interrupt for LFCLKSTARTED event</description>
- <lsb>1</lsb>
- <msb>1</msb>
+ <name>RXREADY_CCASTART</name>
+ <description>Shortcut between RXREADY event and CCASTART task</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>DONE</name>
- <description>Write '1' to Disable interrupt for DONE event</description>
- <lsb>3</lsb>
- <msb>3</msb>
+ <name>CCAIDLE_TXEN</name>
+ <description>Shortcut between CCAIDLE event and TXEN task</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CTTO</name>
- <description>Write '1' to Disable interrupt for CTTO event</description>
- <lsb>4</lsb>
- <msb>4</msb>
+ <name>CCABUSY_DISABLE</name>
+ <description>Shortcut between CCABUSY event and DISABLE task</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CTSTARTED</name>
- <description>Write '1' to Disable interrupt for CTSTARTED event</description>
- <lsb>10</lsb>
- <msb>10</msb>
+ <name>FRAMESTART_BCSTART</name>
+ <description>Shortcut between FRAMESTART event and BCSTART task</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CTSTOPPED</name>
- <description>Write '1' to Disable interrupt for CTSTOPPED event</description>
- <lsb>11</lsb>
- <msb>11</msb>
+ <name>READY_EDSTART</name>
+ <description>Shortcut between READY event and EDSTART task</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>HFCLKRUN</name>
- <description>Status indicating that HFCLKSTART task has been triggered</description>
- <addressOffset>0x408</addressOffset>
- <access>read-only</access>
- <fields>
<field>
- <name>STATUS</name>
- <description>HFCLKSTART task triggered or not</description>
- <lsb>0</lsb>
- <msb>0</msb>
+ <name>EDEND_DISABLE</name>
+ <description>Shortcut between EDEND event and DISABLE task</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotTriggered</name>
- <description>Task not triggered</description>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Triggered</name>
- <description>Task triggered</description>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>HFCLKSTAT</name>
- <description>HFCLK status</description>
- <addressOffset>0x40C</addressOffset>
- <access>read-only</access>
- <fields>
<field>
- <name>SRC</name>
- <description>Source of HFCLK</description>
- <lsb>0</lsb>
- <msb>0</msb>
+ <name>CCAIDLE_STOP</name>
+ <description>Shortcut between CCAIDLE event and STOP task</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
<enumeratedValues>
<enumeratedValue>
- <name>RC</name>
- <description>64 MHz internal oscillator (HFINT)</description>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Xtal</name>
- <description>64 MHz crystal oscillator (HFXO)</description>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>STATE</name>
- <description>HFCLK state</description>
- <lsb>16</lsb>
- <msb>16</msb>
+ <name>TXREADY_START</name>
+ <description>Shortcut between TXREADY event and START task</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotRunning</name>
- <description>HFCLK not running</description>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Running</name>
- <description>HFCLK running</description>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>LFCLKRUN</name>
- <description>Status indicating that LFCLKSTART task has been triggered</description>
- <addressOffset>0x414</addressOffset>
- <access>read-only</access>
- <fields>
<field>
- <name>STATUS</name>
- <description>LFCLKSTART task triggered or not</description>
- <lsb>0</lsb>
- <msb>0</msb>
+ <name>RXREADY_START</name>
+ <description>Shortcut between RXREADY event and START task</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotTriggered</name>
- <description>Task not triggered</description>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Triggered</name>
- <description>Task triggered</description>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>LFCLKSTAT</name>
- <description>LFCLK status</description>
- <addressOffset>0x418</addressOffset>
- <access>read-only</access>
- <fields>
<field>
- <name>SRC</name>
- <description>Source of LFCLK</description>
- <lsb>0</lsb>
- <msb>1</msb>
+ <name>PHYEND_DISABLE</name>
+ <description>Shortcut between PHYEND event and DISABLE task</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
<enumeratedValues>
<enumeratedValue>
- <name>RC</name>
- <description>32.768 kHz RC oscillator</description>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Xtal</name>
- <description>32.768 kHz crystal oscillator</description>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
- <enumeratedValue>
- <name>Synth</name>
- <description>32.768 kHz synthesized from HFCLK</description>
- <value>2</value>
- </enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>STATE</name>
- <description>LFCLK state</description>
- <lsb>16</lsb>
- <msb>16</msb>
+ <name>PHYEND_START</name>
+ <description>Shortcut between PHYEND event and START task</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
<enumeratedValues>
<enumeratedValue>
- <name>NotRunning</name>
- <description>LFCLK not running</description>
+ <name>Disabled</name>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Running</name>
- <description>LFCLK running</description>
+ <name>Enabled</name>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -4150,809 +5501,601 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <name>LFCLKSRCCOPY</name>
- <description>Copy of LFCLKSRC register, set when LFCLKSTART task was triggered</description>
- <addressOffset>0x41C</addressOffset>
- <access>read-only</access>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
<fields>
- <field>
- <name>SRC</name>
- <description>Clock source</description>
+ <field>
+ <name>READY</name>
+ <description>Write '1' to enable interrupt for READY event</description>
<lsb>0</lsb>
- <msb>1</msb>
+ <msb>0</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>RC</name>
- <description>32.768 kHz RC oscillator</description>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Xtal</name>
- <description>32.768 kHz crystal oscillator</description>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Synth</name>
- <description>32.768 kHz synthesized from HFCLK</description>
- <value>2</value>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>LFCLKSRC</name>
- <description>Clock source for the LFCLK</description>
- <addressOffset>0x518</addressOffset>
- <access>read-write</access>
- <fields>
<field>
- <name>SRC</name>
- <description>Clock source</description>
- <lsb>0</lsb>
+ <name>ADDRESS</name>
+ <description>Write '1' to enable interrupt for ADDRESS event</description>
+ <lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>RC</name>
- <description>32.768 kHz RC oscillator</description>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Xtal</name>
- <description>32.768 kHz crystal oscillator</description>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Synth</name>
- <description>32.768 kHz synthesized from HFCLK</description>
- <value>2</value>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>BYPASS</name>
- <description>Enable or disable bypass of LFCLK crystal oscillator with external clock source</description>
- <lsb>16</lsb>
- <msb>16</msb>
+ <name>PAYLOAD</name>
+ <description>Write '1' to enable interrupt for PAYLOAD event</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable (use with Xtal or low-swing external source)</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable (use with rail-to-rail external source)</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>EXTERNAL</name>
- <description>Enable or disable external source for LFCLK</description>
- <lsb>17</lsb>
- <msb>17</msb>
+ <name>END</name>
+ <description>Write '1' to enable interrupt for END event</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable external source (use with Xtal)</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable use of external source instead of Xtal (SRC needs to be set to Xtal)</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>HFXODEBOUNCE</name>
- <description>HFXO debounce time. The HFXO is started by triggering the TASKS_HFCLKSTART task.</description>
- <addressOffset>0x528</addressOffset>
- <access>read-write</access>
- <resetValue>0x00000010</resetValue>
- <fields>
- <field>
- <name>HFXODEBOUNCE</name>
- <description>HFXO debounce time. Debounce time = HFXODEBOUNCE * 16 us.</description>
- <lsb>0</lsb>
- <msb>7</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>CTIV</name>
- <description>Calibration timer interval</description>
- <addressOffset>0x538</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>CTIV</name>
- <description>Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds.</description>
- <lsb>0</lsb>
- <msb>6</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>TRACECONFIG</name>
- <description>Clocking options for the Trace Port debug interface</description>
- <addressOffset>0x55C</addressOffset>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
<field>
- <name>TRACEPORTSPEED</name>
- <description>Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two.</description>
- <lsb>0</lsb>
- <msb>1</msb>
+ <name>DISABLED</name>
+ <description>Write '1' to enable interrupt for DISABLED event</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>32MHz</name>
- <description>32 MHz Trace Port clock (TRACECLK = 16 MHz)</description>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>16MHz</name>
- <description>16 MHz Trace Port clock (TRACECLK = 8 MHz)</description>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>8MHz</name>
- <description>8 MHz Trace Port clock (TRACECLK = 4 MHz)</description>
- <value>2</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>4MHz</name>
- <description>4 MHz Trace Port clock (TRACECLK = 2 MHz)</description>
- <value>3</value>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>TRACEMUX</name>
- <description>Pin multiplexing of trace signals. See pin assignment chapter for more details.</description>
- <lsb>16</lsb>
- <msb>17</msb>
+ <name>DEVMATCH</name>
+ <description>Write '1' to enable interrupt for DEVMATCH event</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>GPIO</name>
- <description>No trace signals routed to pins. All pins can be used as regular GPIOs.</description>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Serial</name>
- <description>SWO trace signal routed to pin. Remaining pins can be used as regular GPIOs.</description>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Parallel</name>
- <description>All trace signals (TRACECLK and TRACEDATA[n]) routed to pins.</description>
- <value>2</value>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>LFRCMODE</name>
- <description>LFRC mode configuration</description>
- <addressOffset>0x5B4</addressOffset>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
<field>
- <name>MODE</name>
- <description>Set LFRC mode</description>
- <lsb>0</lsb>
- <msb>0</msb>
+ <name>DEVMISS</name>
+ <description>Write '1' to enable interrupt for DEVMISS event</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>Normal</name>
- <description>Normal mode</description>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>ULP</name>
- <description>Ultra-low power mode (ULP)</description>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>STATUS</name>
- <description>Active LFRC mode. This field is read only.</description>
- <lsb>16</lsb>
- <msb>16</msb>
+ <name>RSSIEND</name>
+ <description>Write '1' to enable interrupt for RSSIEND event</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>Normal</name>
- <description>Normal mode</description>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>ULP</name>
- <description>Ultra-low power mode (ULP)</description>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>RADIO</name>
- <description>2.4 GHz Radio</description>
- <groupName>RADIO</groupName>
- <baseAddress>0x40001000</baseAddress>
- <size>32</size>
- <addressBlock>
- <offset>0</offset>
- <size>0x1000</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>RADIO</name>
- <value>1</value>
- </interrupt>
- <registers>
- <register>
- <name>TASKS_TXEN</name>
- <description>Enable RADIO in TX mode</description>
- <addressOffset>0x000</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_RXEN</name>
- <description>Enable RADIO in RX mode</description>
- <addressOffset>0x004</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_START</name>
- <description>Start RADIO</description>
- <addressOffset>0x008</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_STOP</name>
- <description>Stop RADIO</description>
- <addressOffset>0x00C</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_DISABLE</name>
- <description>Disable RADIO</description>
- <addressOffset>0x010</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_RSSISTART</name>
- <description>Start the RSSI and take one single sample of the receive signal strength.</description>
- <addressOffset>0x014</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_RSSISTOP</name>
- <description>Stop the RSSI measurement</description>
- <addressOffset>0x018</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_BCSTART</name>
- <description>Start the bit counter</description>
- <addressOffset>0x01C</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_BCSTOP</name>
- <description>Stop the bit counter</description>
- <addressOffset>0x020</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_EDSTART</name>
- <description>Start the Energy Detect measurement used in IEEE 802.15.4 mode</description>
- <addressOffset>0x024</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_EDSTOP</name>
- <description>Stop the Energy Detect measurement</description>
- <addressOffset>0x028</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_CCASTART</name>
- <description>Start the Clear Channel Assessment used in IEEE 802.15.4 mode</description>
- <addressOffset>0x02C</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>TASKS_CCASTOP</name>
- <description>Stop the Clear Channel Assessment</description>
- <addressOffset>0x030</addressOffset>
- <access>write-only</access>
- </register>
- <register>
- <name>EVENTS_READY</name>
- <description>RADIO has ramped up and is ready to be started</description>
- <addressOffset>0x100</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_ADDRESS</name>
- <description>Address sent or received</description>
- <addressOffset>0x104</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_PAYLOAD</name>
- <description>Packet payload sent or received</description>
- <addressOffset>0x108</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_END</name>
- <description>Packet sent or received</description>
- <addressOffset>0x10C</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_DISABLED</name>
- <description>RADIO has been disabled</description>
- <addressOffset>0x110</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_DEVMATCH</name>
- <description>A device address match occurred on the last received packet</description>
- <addressOffset>0x114</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_DEVMISS</name>
- <description>No device address match occurred on the last received packet</description>
- <addressOffset>0x118</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_RSSIEND</name>
- <description>Sampling of receive signal strength complete.</description>
- <addressOffset>0x11C</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_BCMATCH</name>
- <description>Bit counter reached bit count value.</description>
- <addressOffset>0x128</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_CRCOK</name>
- <description>Packet received with CRC ok</description>
- <addressOffset>0x130</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_CRCERROR</name>
- <description>Packet received with CRC error</description>
- <addressOffset>0x134</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_FRAMESTART</name>
- <description>IEEE 802.15.4 length field received</description>
- <addressOffset>0x138</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_EDEND</name>
- <description>Sampling of Energy Detection complete. A new ED sample is ready for readout from the RADIO.EDSAMPLE register</description>
- <addressOffset>0x13C</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_EDSTOPPED</name>
- <description>The sampling of Energy Detection has stopped</description>
- <addressOffset>0x140</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_CCAIDLE</name>
- <description>Wireless medium in idle - clear to send</description>
- <addressOffset>0x144</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_CCABUSY</name>
- <description>Wireless medium busy - do not send</description>
- <addressOffset>0x148</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_CCASTOPPED</name>
- <description>The CCA has stopped</description>
- <addressOffset>0x14C</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_RATEBOOST</name>
- <description>Ble_LR CI field received, receive mode is changed from Ble_LR125Kbit to Ble_LR500Kbit.</description>
- <addressOffset>0x150</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_TXREADY</name>
- <description>RADIO has ramped up and is ready to be started TX path</description>
- <addressOffset>0x154</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_RXREADY</name>
- <description>RADIO has ramped up and is ready to be started RX path</description>
- <addressOffset>0x158</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_MHRMATCH</name>
- <description>MAC Header match found.</description>
- <addressOffset>0x15C</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>EVENTS_PHYEND</name>
- <description>Generated in Ble_LR125Kbit, Ble_LR500Kbit and BleIeee802154_250Kbit modes when last bit is sent on air.</description>
- <addressOffset>0x16C</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>SHORTS</name>
- <description>Shortcut register</description>
- <addressOffset>0x200</addressOffset>
- <access>read-write</access>
- <fields>
<field>
- <name>READY_START</name>
- <description>Shortcut between READY event and START task</description>
- <lsb>0</lsb>
- <msb>0</msb>
+ <name>BCMATCH</name>
+ <description>Write '1' to enable interrupt for BCMATCH event</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>END_DISABLE</name>
- <description>Shortcut between END event and DISABLE task</description>
- <lsb>1</lsb>
- <msb>1</msb>
+ <name>CRCOK</name>
+ <description>Write '1' to enable interrupt for CRCOK event</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>DISABLED_TXEN</name>
- <description>Shortcut between DISABLED event and TXEN task</description>
- <lsb>2</lsb>
- <msb>2</msb>
+ <name>CRCERROR</name>
+ <description>Write '1' to enable interrupt for CRCERROR event</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>DISABLED_RXEN</name>
- <description>Shortcut between DISABLED event and RXEN task</description>
- <lsb>3</lsb>
- <msb>3</msb>
+ <name>FRAMESTART</name>
+ <description>Write '1' to enable interrupt for FRAMESTART event</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>ADDRESS_RSSISTART</name>
- <description>Shortcut between ADDRESS event and RSSISTART task</description>
- <lsb>4</lsb>
- <msb>4</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disable shortcut</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enable shortcut</description>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>END_START</name>
- <description>Shortcut between END event and START task</description>
- <lsb>5</lsb>
- <msb>5</msb>
+ <name>EDEND</name>
+ <description>Write '1' to enable interrupt for EDEND event</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>ADDRESS_BCSTART</name>
- <description>Shortcut between ADDRESS event and BCSTART task</description>
- <lsb>6</lsb>
- <msb>6</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disable shortcut</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enable shortcut</description>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>DISABLED_RSSISTOP</name>
- <description>Shortcut between DISABLED event and RSSISTOP task</description>
- <lsb>8</lsb>
- <msb>8</msb>
+ <name>EDSTOPPED</name>
+ <description>Write '1' to enable interrupt for EDSTOPPED event</description>
+ <lsb>16</lsb>
+ <msb>16</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>RXREADY_CCASTART</name>
- <description>Shortcut between RXREADY event and CCASTART task</description>
- <lsb>11</lsb>
- <msb>11</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disable shortcut</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enable shortcut</description>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CCAIDLE_TXEN</name>
- <description>Shortcut between CCAIDLE event and TXEN task</description>
- <lsb>12</lsb>
- <msb>12</msb>
+ <name>CCAIDLE</name>
+ <description>Write '1' to enable interrupt for CCAIDLE event</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>CCABUSY_DISABLE</name>
- <description>Shortcut between CCABUSY event and DISABLE task</description>
- <lsb>13</lsb>
- <msb>13</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disable shortcut</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enable shortcut</description>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>FRAMESTART_BCSTART</name>
- <description>Shortcut between FRAMESTART event and BCSTART task</description>
- <lsb>14</lsb>
- <msb>14</msb>
+ <name>CCABUSY</name>
+ <description>Write '1' to enable interrupt for CCABUSY event</description>
+ <lsb>18</lsb>
+ <msb>18</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>READY_EDSTART</name>
- <description>Shortcut between READY event and EDSTART task</description>
- <lsb>15</lsb>
- <msb>15</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disable shortcut</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enable shortcut</description>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>EDEND_DISABLE</name>
- <description>Shortcut between EDEND event and DISABLE task</description>
- <lsb>16</lsb>
- <msb>16</msb>
+ <name>CCASTOPPED</name>
+ <description>Write '1' to enable interrupt for CCASTOPPED event</description>
+ <lsb>19</lsb>
+ <msb>19</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CCAIDLE_STOP</name>
- <description>Shortcut between CCAIDLE event and STOP task</description>
- <lsb>17</lsb>
- <msb>17</msb>
+ <name>RATEBOOST</name>
+ <description>Write '1' to enable interrupt for RATEBOOST event</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>TXREADY_START</name>
- <description>Shortcut between TXREADY event and START task</description>
- <lsb>18</lsb>
- <msb>18</msb>
+ <name>TXREADY</name>
+ <description>Write '1' to enable interrupt for TXREADY event</description>
+ <lsb>21</lsb>
+ <msb>21</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>RXREADY_START</name>
- <description>Shortcut between RXREADY event and START task</description>
- <lsb>19</lsb>
- <msb>19</msb>
+ <name>RXREADY</name>
+ <description>Write '1' to enable interrupt for RXREADY event</description>
+ <lsb>22</lsb>
+ <msb>22</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>PHYEND_DISABLE</name>
- <description>Shortcut between PHYEND event and DISABLE task</description>
- <lsb>20</lsb>
- <msb>20</msb>
+ <name>MHRMATCH</name>
+ <description>Write '1' to enable interrupt for MHRMATCH event</description>
+ <lsb>23</lsb>
+ <msb>23</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>PHYEND_START</name>
- <description>Shortcut between PHYEND event and START task</description>
- <lsb>21</lsb>
- <msb>21</msb>
+ <name>PHYEND</name>
+ <description>Write '1' to enable interrupt for PHYEND event</description>
+ <lsb>27</lsb>
+ <msb>27</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable shortcut</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable shortcut</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -4960,14 +6103,14 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <name>INTENSET</name>
- <description>Enable interrupt</description>
- <addressOffset>0x304</addressOffset>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
<access>read-write</access>
<fields>
<field>
<name>READY</name>
- <description>Write '1' to Enable interrupt for READY event</description>
+ <description>Write '1' to disable interrupt for READY event</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -4986,15 +6129,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>ADDRESS</name>
- <description>Write '1' to Enable interrupt for ADDRESS event</description>
+ <description>Write '1' to disable interrupt for ADDRESS event</description>
<lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
@@ -5013,15 +6156,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PAYLOAD</name>
- <description>Write '1' to Enable interrupt for PAYLOAD event</description>
+ <description>Write '1' to disable interrupt for PAYLOAD event</description>
<lsb>2</lsb>
<msb>2</msb>
<enumeratedValues>
@@ -5040,15 +6183,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>END</name>
- <description>Write '1' to Enable interrupt for END event</description>
+ <description>Write '1' to disable interrupt for END event</description>
<lsb>3</lsb>
<msb>3</msb>
<enumeratedValues>
@@ -5067,15 +6210,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DISABLED</name>
- <description>Write '1' to Enable interrupt for DISABLED event</description>
+ <description>Write '1' to disable interrupt for DISABLED event</description>
<lsb>4</lsb>
<msb>4</msb>
<enumeratedValues>
@@ -5094,15 +6237,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DEVMATCH</name>
- <description>Write '1' to Enable interrupt for DEVMATCH event</description>
+ <description>Write '1' to disable interrupt for DEVMATCH event</description>
<lsb>5</lsb>
<msb>5</msb>
<enumeratedValues>
@@ -5121,15 +6264,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>DEVMISS</name>
- <description>Write '1' to Enable interrupt for DEVMISS event</description>
+ <description>Write '1' to disable interrupt for DEVMISS event</description>
<lsb>6</lsb>
<msb>6</msb>
<enumeratedValues>
@@ -5148,15 +6291,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RSSIEND</name>
- <description>Write '1' to Enable interrupt for RSSIEND event</description>
+ <description>Write '1' to disable interrupt for RSSIEND event</description>
<lsb>7</lsb>
<msb>7</msb>
<enumeratedValues>
@@ -5175,15 +6318,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>BCMATCH</name>
- <description>Write '1' to Enable interrupt for BCMATCH event</description>
+ <description>Write '1' to disable interrupt for BCMATCH event</description>
<lsb>10</lsb>
<msb>10</msb>
<enumeratedValues>
@@ -5202,15 +6345,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CRCOK</name>
- <description>Write '1' to Enable interrupt for CRCOK event</description>
+ <description>Write '1' to disable interrupt for CRCOK event</description>
<lsb>12</lsb>
<msb>12</msb>
<enumeratedValues>
@@ -5229,15 +6372,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CRCERROR</name>
- <description>Write '1' to Enable interrupt for CRCERROR event</description>
+ <description>Write '1' to disable interrupt for CRCERROR event</description>
<lsb>13</lsb>
<msb>13</msb>
<enumeratedValues>
@@ -5256,15 +6399,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>FRAMESTART</name>
- <description>Write '1' to Enable interrupt for FRAMESTART event</description>
+ <description>Write '1' to disable interrupt for FRAMESTART event</description>
<lsb>14</lsb>
<msb>14</msb>
<enumeratedValues>
@@ -5283,15 +6426,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EDEND</name>
- <description>Write '1' to Enable interrupt for EDEND event</description>
+ <description>Write '1' to disable interrupt for EDEND event</description>
<lsb>15</lsb>
<msb>15</msb>
<enumeratedValues>
@@ -5310,15 +6453,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>EDSTOPPED</name>
- <description>Write '1' to Enable interrupt for EDSTOPPED event</description>
+ <description>Write '1' to disable interrupt for EDSTOPPED event</description>
<lsb>16</lsb>
<msb>16</msb>
<enumeratedValues>
@@ -5337,15 +6480,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CCAIDLE</name>
- <description>Write '1' to Enable interrupt for CCAIDLE event</description>
+ <description>Write '1' to disable interrupt for CCAIDLE event</description>
<lsb>17</lsb>
<msb>17</msb>
<enumeratedValues>
@@ -5364,15 +6507,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CCABUSY</name>
- <description>Write '1' to Enable interrupt for CCABUSY event</description>
+ <description>Write '1' to disable interrupt for CCABUSY event</description>
<lsb>18</lsb>
<msb>18</msb>
<enumeratedValues>
@@ -5391,15 +6534,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>CCASTOPPED</name>
- <description>Write '1' to Enable interrupt for CCASTOPPED event</description>
+ <description>Write '1' to disable interrupt for CCASTOPPED event</description>
<lsb>19</lsb>
<msb>19</msb>
<enumeratedValues>
@@ -5418,15 +6561,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RATEBOOST</name>
- <description>Write '1' to Enable interrupt for RATEBOOST event</description>
+ <description>Write '1' to disable interrupt for RATEBOOST event</description>
<lsb>20</lsb>
<msb>20</msb>
<enumeratedValues>
@@ -5445,15 +6588,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>TXREADY</name>
- <description>Write '1' to Enable interrupt for TXREADY event</description>
+ <description>Write '1' to disable interrupt for TXREADY event</description>
<lsb>21</lsb>
<msb>21</msb>
<enumeratedValues>
@@ -5472,15 +6615,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>RXREADY</name>
- <description>Write '1' to Enable interrupt for RXREADY event</description>
+ <description>Write '1' to disable interrupt for RXREADY event</description>
<lsb>22</lsb>
<msb>22</msb>
<enumeratedValues>
@@ -5499,15 +6642,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>MHRMATCH</name>
- <description>Write '1' to Enable interrupt for MHRMATCH event</description>
+ <description>Write '1' to disable interrupt for MHRMATCH event</description>
<lsb>23</lsb>
<msb>23</msb>
<enumeratedValues>
@@ -5526,15 +6669,15 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
<name>PHYEND</name>
- <description>Write '1' to Enable interrupt for PHYEND event</description>
+ <description>Write '1' to disable interrupt for PHYEND event</description>
<lsb>27</lsb>
<msb>27</msb>
<enumeratedValues>
@@ -5553,8 +6696,8 @@ POSSIBILITY OF SUCH DAMAGE.\n
<enumeratedValues>
<usage>write</usage>
<enumeratedValue>
- <name>Set</name>
- <description>Enable</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
@@ -5562,1960 +6705,2357 @@ POSSIBILITY OF SUCH DAMAGE.\n
</fields>
</register>
<register>
- <name>INTENCLR</name>
- <description>Disable interrupt</description>
- <addressOffset>0x308</addressOffset>
- <access>read-write</access>
+ <name>CRCSTATUS</name>
+ <description>CRC status</description>
+ <addressOffset>0x400</addressOffset>
+ <access>read-only</access>
<fields>
<field>
- <name>READY</name>
- <description>Write '1' to Disable interrupt for READY event</description>
+ <name>CRCSTATUS</name>
+ <description>CRC status of packet received</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
+ <name>CRCError</name>
+ <description>Packet received with CRC error</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
+ <name>CRCOk</name>
+ <description>Packet received with CRC ok</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXMATCH</name>
+ <description>Received address</description>
+ <addressOffset>0x408</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RXMATCH</name>
+ <description>Received address</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXCRC</name>
+ <description>CRC field of previously received packet</description>
+ <addressOffset>0x40C</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>RXCRC</name>
+ <description>CRC field of previously received packet</description>
+ <lsb>0</lsb>
+ <msb>23</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DAI</name>
+ <description>Device address match index</description>
+ <addressOffset>0x410</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>DAI</name>
+ <description>Device address match index</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PDUSTAT</name>
+ <description>Payload status</description>
+ <addressOffset>0x414</addressOffset>
+ <access>read-only</access>
+ <fields>
+ <field>
+ <name>PDUSTAT</name>
+ <description>Status on payload length vs. PCNF1.MAXLEN</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
<enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <name>LessThan</name>
+ <description>Payload less than PCNF1.MAXLEN</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>GreaterThan</name>
+ <description>Payload greater than PCNF1.MAXLEN</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ADDRESS</name>
- <description>Write '1' to Disable interrupt for ADDRESS event</description>
+ <name>CISTAT</name>
+ <description>Status on what rate packet is received with in Long Range</description>
<lsb>1</lsb>
- <msb>1</msb>
+ <msb>2</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
+ <name>LR125kbit</name>
+ <description>Frame is received at 125kbps</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <name>LR500kbit</name>
+ <description>Frame is received at 500kbps</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>PACKETPTR</name>
+ <description>Packet pointer</description>
+ <addressOffset>0x504</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>PAYLOAD</name>
- <description>Write '1' to Disable interrupt for PAYLOAD event</description>
- <lsb>2</lsb>
- <msb>2</msb>
+ <name>PACKETPTR</name>
+ <description>Packet pointer</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>FREQUENCY</name>
+ <description>Frequency</description>
+ <addressOffset>0x508</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000002</resetValue>
+ <fields>
+ <field>
+ <name>FREQUENCY</name>
+ <description>Radio channel frequency</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ <field>
+ <name>MAP</name>
+ <description>Channel map selection.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
<enumeratedValues>
- <usage>read</usage>
- <enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
- <value>0</value>
- </enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
+ <name>Default</name>
+ <description>Channel map between 2400 MHZ .. 2500 MHz</description>
+ <value>0</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <name>Low</name>
+ <description>Channel map between 2360 MHZ .. 2460 MHz</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>TXPOWER</name>
+ <description>Output power</description>
+ <addressOffset>0x50C</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>END</name>
- <description>Write '1' to Disable interrupt for END event</description>
- <lsb>3</lsb>
- <msb>3</msb>
+ <name>TXPOWER</name>
+ <description>RADIO output power</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
- <value>0</value>
+ <name>Pos8dBm</name>
+ <description>+8 dBm</description>
+ <value>0x8</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
+ <name>Pos7dBm</name>
+ <description>+7 dBm</description>
+ <value>0x7</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Pos6dBm</name>
+ <description>+6 dBm</description>
+ <value>0x6</value>
</enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>DISABLED</name>
- <description>Write '1' to Disable interrupt for DISABLED event</description>
- <lsb>4</lsb>
- <msb>4</msb>
- <enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
- <value>0</value>
+ <name>Pos5dBm</name>
+ <description>+5 dBm</description>
+ <value>0x5</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
+ <name>Pos4dBm</name>
+ <description>+4 dBm</description>
+ <value>0x4</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Pos3dBm</name>
+ <description>+3 dBm</description>
+ <value>0x3</value>
</enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>DEVMATCH</name>
- <description>Write '1' to Disable interrupt for DEVMATCH event</description>
- <lsb>5</lsb>
- <msb>5</msb>
- <enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
- <value>0</value>
+ <name>Pos2dBm</name>
+ <description>+2 dBm</description>
+ <value>0x2</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
+ <name>0dBm</name>
+ <description>0 dBm</description>
+ <value>0x0</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Neg4dBm</name>
+ <description>-4 dBm</description>
+ <value>0xFC</value>
</enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>DEVMISS</name>
- <description>Write '1' to Disable interrupt for DEVMISS event</description>
- <lsb>6</lsb>
- <msb>6</msb>
- <enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
- <value>0</value>
+ <name>Neg8dBm</name>
+ <description>-8 dBm</description>
+ <value>0xF8</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
+ <name>Neg12dBm</name>
+ <description>-12 dBm</description>
+ <value>0xF4</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Neg16dBm</name>
+ <description>-16 dBm</description>
+ <value>0xF0</value>
</enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>RSSIEND</name>
- <description>Write '1' to Disable interrupt for RSSIEND event</description>
- <lsb>7</lsb>
- <msb>7</msb>
- <enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
- <value>0</value>
+ <name>Neg20dBm</name>
+ <description>-20 dBm</description>
+ <value>0xEC</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
+ <name>Neg30dBm</name>
+ <description>Deprecated enumerator - -40 dBm</description>
+ <value>0xFF</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Neg40dBm</name>
+ <description>-40 dBm</description>
+ <value>0xD8</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>MODE</name>
+ <description>Data rate and modulation</description>
+ <addressOffset>0x510</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>BCMATCH</name>
- <description>Write '1' to Disable interrupt for BCMATCH event</description>
- <lsb>10</lsb>
- <msb>10</msb>
+ <name>MODE</name>
+ <description>Radio data rate and modulation setting. The radio supports frequency-shift keying (FSK) modulation.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
+ <name>Nrf_1Mbit</name>
+ <description>1 Mbit/s Nordic proprietary radio mode</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
+ <name>Nrf_2Mbit</name>
+ <description>2 Mbit/s Nordic proprietary radio mode</description>
<value>1</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Ble_1Mbit</name>
+ <description>1 Mbit/s BLE</description>
+ <value>3</value>
</enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>CRCOK</name>
- <description>Write '1' to Disable interrupt for CRCOK event</description>
- <lsb>12</lsb>
- <msb>12</msb>
- <enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
- <value>0</value>
+ <name>Ble_2Mbit</name>
+ <description>2 Mbit/s BLE</description>
+ <value>4</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
+ <name>Ble_LR125Kbit</name>
+ <description>Long range 125 kbit/s TX, 125 kbit/s and 500 kbit/s RX</description>
+ <value>5</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Ble_LR500Kbit</name>
+ <description>Long range 500 kbit/s TX, 125 kbit/s and 500 kbit/s RX</description>
+ <value>6</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Ieee802154_250Kbit</name>
+ <description>IEEE 802.15.4-2006 250 kbit/s</description>
+ <value>15</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>PCNF0</name>
+ <description>Packet configuration register 0</description>
+ <addressOffset>0x514</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>LFLEN</name>
+ <description>Length on air of LENGTH field in number of bits.</description>
+ <lsb>0</lsb>
+ <msb>3</msb>
+ </field>
<field>
- <name>CRCERROR</name>
- <description>Write '1' to Disable interrupt for CRCERROR event</description>
- <lsb>13</lsb>
- <msb>13</msb>
+ <name>S0LEN</name>
+ <description>Length on air of S0 field in number of bytes.</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ </field>
+ <field>
+ <name>S1LEN</name>
+ <description>Length on air of S1 field in number of bits.</description>
+ <lsb>16</lsb>
+ <msb>19</msb>
+ </field>
+ <field>
+ <name>S1INCL</name>
+ <description>Include or exclude S1 field in RAM</description>
+ <lsb>20</lsb>
+ <msb>20</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
+ <name>Automatic</name>
+ <description>Include S1 field in RAM only if S1LEN &gt; 0</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <name>Include</name>
+ <description>Always include S1 field in RAM independent of S1LEN</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>FRAMESTART</name>
- <description>Write '1' to Disable interrupt for FRAMESTART event</description>
- <lsb>14</lsb>
- <msb>14</msb>
+ <name>CILEN</name>
+ <description>Length of code indicator - long range</description>
+ <lsb>22</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>PLEN</name>
+ <description>Length of preamble on air. Decision point: TASKS_START task</description>
+ <lsb>24</lsb>
+ <msb>25</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
+ <name>8bit</name>
+ <description>8-bit preamble</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
+ <name>16bit</name>
+ <description>16-bit preamble</description>
<value>1</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>32bitZero</name>
+ <description>32-bit zero preamble - used for IEEE 802.15.4</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>LongRange</name>
+ <description>Preamble - used for BLE long range</description>
+ <value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>EDEND</name>
- <description>Write '1' to Disable interrupt for EDEND event</description>
- <lsb>15</lsb>
- <msb>15</msb>
+ <name>CRCINC</name>
+ <description>Indicates if LENGTH field contains CRC or not</description>
+ <lsb>26</lsb>
+ <msb>26</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
+ <name>Exclude</name>
+ <description>LENGTH does not contain CRC</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <name>Include</name>
+ <description>LENGTH includes CRC</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>EDSTOPPED</name>
- <description>Write '1' to Disable interrupt for EDSTOPPED event</description>
+ <name>TERMLEN</name>
+ <description>Length of TERM field in Long Range operation</description>
+ <lsb>29</lsb>
+ <msb>30</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PCNF1</name>
+ <description>Packet configuration register 1</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>MAXLEN</name>
+ <description>Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>STATLEN</name>
+ <description>Static length in number of bytes</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>BALEN</name>
+ <description>Base address length in number of bytes</description>
<lsb>16</lsb>
- <msb>16</msb>
+ <msb>18</msb>
+ </field>
+ <field>
+ <name>ENDIAN</name>
+ <description>On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields.</description>
+ <lsb>24</lsb>
+ <msb>24</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
+ <name>Little</name>
+ <description>Least significant bit on air first</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
+ <name>Big</name>
+ <description>Most significant bit on air first</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
+ </field>
+ <field>
+ <name>WHITEEN</name>
+ <description>Enable or disable packet whitening</description>
+ <lsb>25</lsb>
+ <msb>25</msb>
<enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
+ <name>Disabled</name>
<description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>BASE0</name>
+ <description>Base address 0</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>CCAIDLE</name>
- <description>Write '1' to Disable interrupt for CCAIDLE event</description>
- <lsb>17</lsb>
- <msb>17</msb>
+ <name>BASE0</name>
+ <description>Base address 0</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BASE1</name>
+ <description>Base address 1</description>
+ <addressOffset>0x520</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BASE1</name>
+ <description>Base address 1</description>
+ <lsb>0</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PREFIX0</name>
+ <description>Prefixes bytes for logical addresses 0-3</description>
+ <addressOffset>0x524</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>AP0</name>
+ <description>Address prefix 0.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>AP1</name>
+ <description>Address prefix 1.</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>AP2</name>
+ <description>Address prefix 2.</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>AP3</name>
+ <description>Address prefix 3.</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>PREFIX1</name>
+ <description>Prefixes bytes for logical addresses 4-7</description>
+ <addressOffset>0x528</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>AP4</name>
+ <description>Address prefix 4.</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
+ </field>
+ <field>
+ <name>AP5</name>
+ <description>Address prefix 5.</description>
+ <lsb>8</lsb>
+ <msb>15</msb>
+ </field>
+ <field>
+ <name>AP6</name>
+ <description>Address prefix 6.</description>
+ <lsb>16</lsb>
+ <msb>23</msb>
+ </field>
+ <field>
+ <name>AP7</name>
+ <description>Address prefix 7.</description>
+ <lsb>24</lsb>
+ <msb>31</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXADDRESS</name>
+ <description>Transmit address select</description>
+ <addressOffset>0x52C</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>TXADDRESS</name>
+ <description>Transmit address select</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXADDRESSES</name>
+ <description>Receive address select</description>
+ <addressOffset>0x530</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>ADDR0</name>
+ <description>Enable or disable reception on logical address 0.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CCABUSY</name>
- <description>Write '1' to Disable interrupt for CCABUSY event</description>
- <lsb>18</lsb>
- <msb>18</msb>
+ <name>ADDR1</name>
+ <description>Enable or disable reception on logical address 1.</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>CCASTOPPED</name>
- <description>Write '1' to Disable interrupt for CCASTOPPED event</description>
- <lsb>19</lsb>
- <msb>19</msb>
+ <name>ADDR2</name>
+ <description>Enable or disable reception on logical address 2.</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>RATEBOOST</name>
- <description>Write '1' to Disable interrupt for RATEBOOST event</description>
- <lsb>20</lsb>
- <msb>20</msb>
+ <name>ADDR3</name>
+ <description>Enable or disable reception on logical address 3.</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
- <enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>TXREADY</name>
- <description>Write '1' to Disable interrupt for TXREADY event</description>
- <lsb>21</lsb>
- <msb>21</msb>
+ <name>ADDR4</name>
+ <description>Enable or disable reception on logical address 4.</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR5</name>
+ <description>Enable or disable reception on logical address 5.</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
<enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
+ <name>Disabled</name>
<description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>RXREADY</name>
- <description>Write '1' to Disable interrupt for RXREADY event</description>
- <lsb>22</lsb>
- <msb>22</msb>
+ <name>ADDR6</name>
+ <description>Enable or disable reception on logical address 6.</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>Disable</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Read: Enabled</description>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
+ </field>
+ <field>
+ <name>ADDR7</name>
+ <description>Enable or disable reception on logical address 7.</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
<enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
+ <name>Disabled</name>
<description>Disable</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>CRCCNF</name>
+ <description>CRC configuration</description>
+ <addressOffset>0x534</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>MHRMATCH</name>
- <description>Write '1' to Disable interrupt for MHRMATCH event</description>
- <lsb>23</lsb>
- <msb>23</msb>
+ <name>LEN</name>
+ <description>CRC length in number of bytes.</description>
+ <lsb>0</lsb>
+ <msb>1</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Read: Disabled</description>
+ <description>CRC length is zero and CRC calculation is disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
+ <name>One</name>
+ <description>CRC length is one byte and CRC calculation is enabled</description>
<value>1</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Two</name>
+ <description>CRC length is two bytes and CRC calculation is enabled</description>
+ <value>2</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Three</name>
+ <description>CRC length is three bytes and CRC calculation is enabled</description>
+ <value>3</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>PHYEND</name>
- <description>Write '1' to Disable interrupt for PHYEND event</description>
- <lsb>27</lsb>
- <msb>27</msb>
+ <name>SKIPADDR</name>
+ <description>Include or exclude packet address field out of CRC calculation.</description>
+ <lsb>8</lsb>
+ <msb>9</msb>
<enumeratedValues>
- <usage>read</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Read: Disabled</description>
+ <name>Include</name>
+ <description>CRC calculation includes address field</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Enabled</name>
- <description>Read: Enabled</description>
+ <name>Skip</name>
+ <description>CRC calculation does not include address field. The CRC calculation will start at the first byte after the address.</description>
<value>1</value>
</enumeratedValue>
- </enumeratedValues>
- <enumeratedValues>
- <usage>write</usage>
<enumeratedValue>
- <name>Clear</name>
- <description>Disable</description>
- <value>1</value>
+ <name>Ieee802154</name>
+ <description>CRC calculation as per 802.15.4 standard. Starting at first byte after length field.</description>
+ <value>2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
- <name>CRCSTATUS</name>
- <description>CRC status</description>
- <addressOffset>0x400</addressOffset>
- <access>read-only</access>
+ <name>CRCPOLY</name>
+ <description>CRC polynomial</description>
+ <addressOffset>0x538</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
<fields>
<field>
- <name>CRCSTATUS</name>
- <description>CRC status of packet received</description>
+ <name>CRCPOLY</name>
+ <description>CRC polynomial</description>
<lsb>0</lsb>
- <msb>0</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>CRCError</name>
- <description>Packet received with CRC error</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>CRCOk</name>
- <description>Packet received with CRC ok</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
+ <msb>23</msb>
</field>
</fields>
</register>
<register>
- <name>RXMATCH</name>
- <description>Received address</description>
- <addressOffset>0x408</addressOffset>
- <access>read-only</access>
+ <name>CRCINIT</name>
+ <description>CRC initial value</description>
+ <addressOffset>0x53C</addressOffset>
+ <access>read-write</access>
<fields>
<field>
- <name>RXMATCH</name>
- <description>Received address</description>
+ <name>CRCINIT</name>
+ <description>CRC initial value</description>
<lsb>0</lsb>
- <msb>2</msb>
+ <msb>23</msb>
</field>
</fields>
</register>
<register>
- <name>RXCRC</name>
- <description>CRC field of previously received packet</description>
- <addressOffset>0x40C</addressOffset>
- <access>read-only</access>
+ <name>TIFS</name>
+ <description>Interframe spacing in us</description>
+ <addressOffset>0x544</addressOffset>
+ <access>read-write</access>
<fields>
<field>
- <name>RXCRC</name>
- <description>CRC field of previously received packet</description>
+ <name>TIFS</name>
+ <description>Interframe spacing in us</description>
<lsb>0</lsb>
- <msb>23</msb>
+ <msb>9</msb>
</field>
</fields>
</register>
<register>
- <name>DAI</name>
- <description>Device address match index</description>
- <addressOffset>0x410</addressOffset>
+ <name>RSSISAMPLE</name>
+ <description>RSSI sample</description>
+ <addressOffset>0x548</addressOffset>
<access>read-only</access>
<fields>
<field>
- <name>DAI</name>
- <description>Device address match index</description>
+ <name>RSSISAMPLE</name>
+ <description>RSSI sample</description>
<lsb>0</lsb>
- <msb>2</msb>
+ <msb>6</msb>
</field>
</fields>
</register>
<register>
- <name>PDUSTAT</name>
- <description>Payload status</description>
- <addressOffset>0x414</addressOffset>
+ <name>STATE</name>
+ <description>Current radio state</description>
+ <addressOffset>0x550</addressOffset>
<access>read-only</access>
<fields>
<field>
- <name>PDUSTAT</name>
- <description>Status on payload length vs. PCNF1.MAXLEN</description>
+ <name>STATE</name>
+ <description>Current radio state</description>
<lsb>0</lsb>
- <msb>0</msb>
+ <msb>3</msb>
<enumeratedValues>
<enumeratedValue>
- <name>LessThan</name>
- <description>Payload less than PCNF1.MAXLEN</description>
+ <name>Disabled</name>
+ <description>RADIO is in the Disabled state</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>GreaterThan</name>
- <description>Payload greater than PCNF1.MAXLEN</description>
+ <name>RxRu</name>
+ <description>RADIO is in the RXRU state</description>
<value>1</value>
</enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>CISTAT</name>
- <description>Status on what rate packet is received with in Long Range</description>
- <lsb>1</lsb>
- <msb>2</msb>
- <enumeratedValues>
<enumeratedValue>
- <name>LR125kbit</name>
- <description>Frame is received at 125kbps</description>
- <value>0</value>
+ <name>RxIdle</name>
+ <description>RADIO is in the RXIDLE state</description>
+ <value>2</value>
</enumeratedValue>
<enumeratedValue>
- <name>LR500kbit</name>
- <description>Frame is received at 500kbps</description>
- <value>1</value>
+ <name>Rx</name>
+ <description>RADIO is in the RX state</description>
+ <value>3</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>RxDisable</name>
+ <description>RADIO is in the RXDISABLED state</description>
+ <value>4</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxRu</name>
+ <description>RADIO is in the TXRU state</description>
+ <value>9</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxIdle</name>
+ <description>RADIO is in the TXIDLE state</description>
+ <value>10</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Tx</name>
+ <description>RADIO is in the TX state</description>
+ <value>11</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>TxDisable</name>
+ <description>RADIO is in the TXDISABLED state</description>
+ <value>12</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
- <name>PACKETPTR</name>
- <description>Packet pointer</description>
- <addressOffset>0x504</addressOffset>
+ <name>DATAWHITEIV</name>
+ <description>Data whitening initial value</description>
+ <addressOffset>0x554</addressOffset>
<access>read-write</access>
+ <resetValue>0x00000040</resetValue>
<fields>
<field>
- <name>PACKETPTR</name>
- <description>Packet pointer</description>
+ <name>DATAWHITEIV</name>
+ <description>Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'.</description>
+ <lsb>0</lsb>
+ <msb>6</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>BCC</name>
+ <description>Bit counter compare</description>
+ <addressOffset>0x560</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>BCC</name>
+ <description>Bit counter compare</description>
<lsb>0</lsb>
<msb>31</msb>
</field>
</fields>
</register>
<register>
- <name>FREQUENCY</name>
- <description>Frequency</description>
- <addressOffset>0x508</addressOffset>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DAB[%s]</name>
+ <description>Description collection[n]: Device address base segment n</description>
+ <addressOffset>0x600</addressOffset>
<access>read-write</access>
- <resetValue>0x00000002</resetValue>
<fields>
<field>
- <name>FREQUENCY</name>
- <description>Radio channel frequency</description>
+ <name>DAB</name>
+ <description>Device address base segment n</description>
<lsb>0</lsb>
- <msb>6</msb>
+ <msb>31</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <dim>0x8</dim>
+ <dimIncrement>0x4</dimIncrement>
+ <name>DAP[%s]</name>
+ <description>Description collection[n]: Device address prefix n</description>
+ <addressOffset>0x620</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>MAP</name>
- <description>Channel map selection.</description>
- <lsb>8</lsb>
- <msb>8</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Default</name>
- <description>Channel map between 2400 MHZ .. 2500 MHz</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Low</name>
- <description>Channel map between 2360 MHZ .. 2460 MHz</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
+ <name>DAP</name>
+ <description>Device address prefix n</description>
+ <lsb>0</lsb>
+ <msb>15</msb>
</field>
</fields>
</register>
<register>
- <name>TXPOWER</name>
- <description>Output power</description>
- <addressOffset>0x50C</addressOffset>
+ <name>DACNF</name>
+ <description>Device address match configuration</description>
+ <addressOffset>0x640</addressOffset>
<access>read-write</access>
<fields>
<field>
- <name>TXPOWER</name>
- <description>RADIO output power.</description>
+ <name>ENA0</name>
+ <description>Enable or disable device address matching using device address 0</description>
<lsb>0</lsb>
- <msb>7</msb>
+ <msb>0</msb>
<enumeratedValues>
<enumeratedValue>
- <name>Pos8dBm</name>
- <description>+8 dBm</description>
- <value>0x8</value>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Pos7dBm</name>
- <description>+7 dBm</description>
- <value>0x7</value>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA1</name>
+ <description>Enable or disable device address matching using device address 1</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
<enumeratedValue>
- <name>Pos6dBm</name>
- <description>+6 dBm</description>
- <value>0x6</value>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Pos5dBm</name>
- <description>+5 dBm</description>
- <value>0x5</value>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA2</name>
+ <description>Enable or disable device address matching using device address 2</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
+ <enumeratedValues>
<enumeratedValue>
- <name>Pos4dBm</name>
- <description>+4 dBm</description>
- <value>0x4</value>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Pos3dBm</name>
- <description>+3 dBm</description>
- <value>0x3</value>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA3</name>
+ <description>Enable or disable device address matching using device address 3</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
<enumeratedValue>
- <name>Pos2dBm</name>
- <description>+2 dBm</description>
- <value>0x2</value>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>0dBm</name>
- <description>0 dBm</description>
- <value>0x0</value>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA4</name>
+ <description>Enable or disable device address matching using device address 4</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
+ <enumeratedValues>
<enumeratedValue>
- <name>Neg4dBm</name>
- <description>-4 dBm</description>
- <value>0xFC</value>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Neg8dBm</name>
- <description>-8 dBm</description>
- <value>0xF8</value>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA5</name>
+ <description>Enable or disable device address matching using device address 5</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Neg12dBm</name>
- <description>-12 dBm</description>
- <value>0xF4</value>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA6</name>
+ <description>Enable or disable device address matching using device address 6</description>
+ <lsb>6</lsb>
+ <msb>6</msb>
+ <enumeratedValues>
<enumeratedValue>
- <name>Neg16dBm</name>
- <description>-16 dBm</description>
- <value>0xF0</value>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Neg20dBm</name>
- <description>-20 dBm</description>
- <value>0xEC</value>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>ENA7</name>
+ <description>Enable or disable device address matching using device address 7</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
+ <enumeratedValues>
<enumeratedValue>
- <name>Neg30dBm</name>
- <description>Deprecated enumerator - -40 dBm</description>
- <value>0xD8</value>
+ <name>Disabled</name>
+ <description>Disabled</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Neg40dBm</name>
- <description>-40 dBm</description>
- <value>0xD8</value>
+ <name>Enabled</name>
+ <description>Enabled</description>
+ <value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ <field>
+ <name>TXADD0</name>
+ <description>TxAdd for device address 0</description>
+ <lsb>8</lsb>
+ <msb>8</msb>
+ </field>
+ <field>
+ <name>TXADD1</name>
+ <description>TxAdd for device address 1</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
+ </field>
+ <field>
+ <name>TXADD2</name>
+ <description>TxAdd for device address 2</description>
+ <lsb>10</lsb>
+ <msb>10</msb>
+ </field>
+ <field>
+ <name>TXADD3</name>
+ <description>TxAdd for device address 3</description>
+ <lsb>11</lsb>
+ <msb>11</msb>
+ </field>
+ <field>
+ <name>TXADD4</name>
+ <description>TxAdd for device address 4</description>
+ <lsb>12</lsb>
+ <msb>12</msb>
+ </field>
+ <field>
+ <name>TXADD5</name>
+ <description>TxAdd for device address 5</description>
+ <lsb>13</lsb>
+ <msb>13</msb>
+ </field>
+ <field>
+ <name>TXADD6</name>
+ <description>TxAdd for device address 6</description>
+ <lsb>14</lsb>
+ <msb>14</msb>
+ </field>
+ <field>
+ <name>TXADD7</name>
+ <description>TxAdd for device address 7</description>
+ <lsb>15</lsb>
+ <msb>15</msb>
+ </field>
</fields>
</register>
<register>
- <name>MODE</name>
- <description>Data rate and modulation</description>
- <addressOffset>0x510</addressOffset>
+ <name>MHRMATCHCONF</name>
+ <description>Search pattern configuration</description>
+ <addressOffset>0x644</addressOffset>
+ <access>read-write</access>
+ </register>
+ <register>
+ <name>MHRMATCHMAS</name>
+ <description>Pattern mask</description>
+ <addressOffset>0x648</addressOffset>
+ <access>read-write</access>
+ </register>
+ <register>
+ <name>MODECNF0</name>
+ <description>Radio mode configuration register 0</description>
+ <addressOffset>0x650</addressOffset>
<access>read-write</access>
+ <resetValue>0x00000200</resetValue>
<fields>
<field>
- <name>MODE</name>
- <description>Radio data rate and modulation setting. The radio supports Frequency-shift Keying (FSK) modulation.</description>
+ <name>RU</name>
+ <description>Radio ramp-up time</description>
<lsb>0</lsb>
- <msb>3</msb>
+ <msb>0</msb>
<enumeratedValues>
<enumeratedValue>
- <name>Nrf_1Mbit</name>
- <description>1 Mbit/s Nordic proprietary radio mode</description>
+ <name>Default</name>
+ <description>Default ramp-up time (tRXEN), compatible with firmware written for nRF51</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Nrf_2Mbit</name>
- <description>2 Mbit/s Nordic proprietary radio mode</description>
+ <name>Fast</name>
+ <description>Fast ramp-up (tRXEN,FAST), see electrical specification for more information</description>
<value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>DTX</name>
+ <description>Default TX value</description>
+ <lsb>8</lsb>
+ <msb>9</msb>
+ <enumeratedValues>
<enumeratedValue>
- <name>Ble_1Mbit</name>
- <description>1 Mbit/s Bluetooth Low Energy</description>
- <value>3</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Ble_2Mbit</name>
- <description>2 Mbit/s Bluetooth Low Energy</description>
- <value>4</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Ble_LR125Kbit</name>
- <description>Long range 125 kbit/s (TX Only - RX supports both)</description>
- <value>5</value>
+ <name>B1</name>
+ <description>Transmit '1'</description>
+ <value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Ble_LR500Kbit</name>
- <description>Long range 500 kbit/s (TX Only - RX supports both)</description>
- <value>6</value>
+ <name>B0</name>
+ <description>Transmit '0'</description>
+ <value>1</value>
</enumeratedValue>
<enumeratedValue>
- <name>Ieee802154_250Kbit</name>
- <description>IEEE 802.15.4-2006 250 kbit/s</description>
- <value>15</value>
+ <name>Center</name>
+ <description>Transmit center frequency</description>
+ <value>2</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
- <name>PCNF0</name>
- <description>Packet configuration register 0</description>
- <addressOffset>0x514</addressOffset>
+ <name>SFD</name>
+ <description>IEEE 802.15.4 start of frame delimiter</description>
+ <addressOffset>0x660</addressOffset>
<access>read-write</access>
+ <resetValue>0x000000A7</resetValue>
<fields>
<field>
- <name>LFLEN</name>
- <description>Length on air of LENGTH field in number of bits.</description>
+ <name>SFD</name>
+ <description>IEEE 802.15.4 start of frame delimiter</description>
<lsb>0</lsb>
- <msb>3</msb>
- </field>
- <field>
- <name>S0LEN</name>
- <description>Length on air of S0 field in number of bytes.</description>
- <lsb>8</lsb>
- <msb>8</msb>
- </field>
- <field>
- <name>S1LEN</name>
- <description>Length on air of S1 field in number of bits.</description>
- <lsb>16</lsb>
- <msb>19</msb>
+ <msb>7</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>EDCNT</name>
+ <description>IEEE 802.15.4 energy detect loop count</description>
+ <addressOffset>0x664</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
<field>
- <name>S1INCL</name>
- <description>Include or exclude S1 field in RAM</description>
- <lsb>20</lsb>
+ <name>EDCNT</name>
+ <description>IEEE 802.15.4 energy detect loop count</description>
+ <lsb>0</lsb>
<msb>20</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Automatic</name>
- <description>Include S1 field in RAM only if S1LEN &gt; 0</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Include</name>
- <description>Always include S1 field in RAM independent of S1LEN</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>EDSAMPLE</name>
+ <description>IEEE 802.15.4 energy detect level</description>
+ <addressOffset>0x668</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
<field>
- <name>CILEN</name>
- <description>Length of Code Indicator - Long Range</description>
- <lsb>22</lsb>
- <msb>23</msb>
+ <name>EDLVL</name>
+ <description>IEEE 802.15.4 energy detect level</description>
+ <lsb>0</lsb>
+ <msb>7</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>CCACTRL</name>
+ <description>IEEE 802.15.4 clear channel assessment control</description>
+ <addressOffset>0x66C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000000</resetValue>
+ <fields>
<field>
- <name>PLEN</name>
- <description>Length of preamble on air. Decision point: TASKS_START task</description>
- <lsb>24</lsb>
- <msb>25</msb>
+ <name>CCAMODE</name>
+ <description>CCA mode of operation</description>
+ <lsb>0</lsb>
+ <msb>2</msb>
<enumeratedValues>
<enumeratedValue>
- <name>8bit</name>
- <description>8-bit preamble</description>
+ <name>EdMode</name>
+ <description>Energy above threshold</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>16bit</name>
- <description>16-bit preamble</description>
+ <name>CarrierMode</name>
+ <description>Carrier seen</description>
<value>1</value>
</enumeratedValue>
<enumeratedValue>
- <name>32bitZero</name>
- <description>32-bit zero preamble - used for IEEE 802.15.4</description>
+ <name>CarrierAndEdMode</name>
+ <description>Energy above threshold AND carrier seen</description>
<value>2</value>
</enumeratedValue>
<enumeratedValue>
- <name>LongRange</name>
- <description>Preamble - used for BTLE Long Range</description>
+ <name>CarrierOrEdMode</name>
+ <description>Energy above threshold OR carrier seen</description>
<value>3</value>
</enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>CRCINC</name>
- <description>Indicates if LENGTH field contains CRC or not</description>
- <lsb>26</lsb>
- <msb>26</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Exclude</name>
- <description>LENGTH does not contain CRC</description>
- <value>0</value>
- </enumeratedValue>
<enumeratedValue>
- <name>Include</name>
- <description>LENGTH includes CRC</description>
- <value>1</value>
+ <name>EdModeTest1</name>
+ <description>Energy above threshold test mode that will abort when first ED measurement over threshold is seen. No averaging.</description>
+ <value>4</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>TERMLEN</name>
- <description>Length of TERM field in Long Range operation</description>
- <lsb>29</lsb>
- <msb>30</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>PCNF1</name>
- <description>Packet configuration register 1</description>
- <addressOffset>0x518</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>MAXLEN</name>
- <description>Maximum length of packet payload. If the packet payload is larger than MAXLEN, the radio will truncate the payload to MAXLEN.</description>
- <lsb>0</lsb>
- <msb>7</msb>
- </field>
- <field>
- <name>STATLEN</name>
- <description>Static length in number of bytes</description>
+ <name>CCAEDTHRES</name>
+ <description>CCA energy busy threshold. Used in all the CCA modes except CarrierMode.</description>
<lsb>8</lsb>
<msb>15</msb>
</field>
<field>
- <name>BALEN</name>
- <description>Base address length in number of bytes</description>
+ <name>CCACORRTHRES</name>
+ <description>CCA correlator busy threshold. Only relevant to CarrierMode, CarrierAndEdMode and CarrierOrEdMode.</description>
<lsb>16</lsb>
- <msb>18</msb>
+ <msb>23</msb>
</field>
<field>
- <name>ENDIAN</name>
- <description>On air endianness of packet, this applies to the S0, LENGTH, S1 and the PAYLOAD fields.</description>
+ <name>CCACORRCNT</name>
+ <description>Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based signal detect is enabled.</description>
<lsb>24</lsb>
- <msb>24</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Little</name>
- <description>Least Significant bit on air first</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Big</name>
- <description>Most significant bit on air first</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
+ <msb>31</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>POWER</name>
+ <description>Peripheral power control</description>
+ <addressOffset>0xFFC</addressOffset>
+ <access>read-write</access>
+ <resetValue>0x00000001</resetValue>
+ <fields>
<field>
- <name>WHITEEN</name>
- <description>Enable or disable packet whitening</description>
- <lsb>25</lsb>
- <msb>25</msb>
+ <name>POWER</name>
+ <description>Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again.</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable</description>
+ <description>Peripheral is powered off</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable</description>
+ <description>Peripheral is powered on</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
+ </registers>
+ </peripheral>
+ <peripheral>
+ <name>UART0</name>
+ <description>Universal Asynchronous Receiver/Transmitter</description>
+ <baseAddress>0x40002000</baseAddress>
+ <headerStructName>UART</headerStructName>
+ <addressBlock>
+ <offset>0</offset>
+ <size>0x1000</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <interrupt>
+ <name>UARTE0_UART0</name>
+ <value>2</value>
+ </interrupt>
+ <groupName>UART</groupName>
+ <size>0x20</size>
+ <registers>
<register>
- <name>BASE0</name>
- <description>Base address 0</description>
- <addressOffset>0x51C</addressOffset>
- <access>read-write</access>
+ <name>TASKS_STARTRX</name>
+ <description>Start UART receiver</description>
+ <addressOffset>0x000</addressOffset>
+ <access>write-only</access>
<fields>
<field>
- <name>BASE0</name>
- <description>Base address 0</description>
+ <name>TASKS_STARTRX</name>
<lsb>0</lsb>
- <msb>31</msb>
+ <msb>0</msb>
</field>
</fields>
</register>
<register>
- <name>BASE1</name>
- <description>Base address 1</description>
- <addressOffset>0x520</addressOffset>
- <access>read-write</access>
+ <name>TASKS_STOPRX</name>
+ <description>Stop UART receiver</description>
+ <addressOffset>0x004</addressOffset>
+ <access>write-only</access>
<fields>
<field>
- <name>BASE1</name>
- <description>Base address 1</description>
+ <name>TASKS_STOPRX</name>
<lsb>0</lsb>
- <msb>31</msb>
+ <msb>0</msb>
</field>
</fields>
</register>
<register>
- <name>PREFIX0</name>
- <description>Prefixes bytes for logical addresses 0-3</description>
- <addressOffset>0x524</addressOffset>
- <access>read-write</access>
+ <name>TASKS_STARTTX</name>
+ <description>Start UART transmitter</description>
+ <addressOffset>0x008</addressOffset>
+ <access>write-only</access>
<fields>
<field>
- <name>AP0</name>
- <description>Address prefix 0.</description>
+ <name>TASKS_STARTTX</name>
<lsb>0</lsb>
- <msb>7</msb>
- </field>
- <field>
- <name>AP1</name>
- <description>Address prefix 1.</description>
- <lsb>8</lsb>
- <msb>15</msb>
+ <msb>0</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_STOPTX</name>
+ <description>Stop UART transmitter</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>write-only</access>
+ <fields>
<field>
- <name>AP2</name>
- <description>Address prefix 2.</description>
- <lsb>16</lsb>
- <msb>23</msb>
+ <name>TASKS_STOPTX</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>TASKS_SUSPEND</name>
+ <description>Suspend UART</description>
+ <addressOffset>0x01C</addressOffset>
+ <access>write-only</access>
+ <fields>
<field>
- <name>AP3</name>
- <description>Address prefix 3.</description>
- <lsb>24</lsb>
- <msb>31</msb>
+ <name>TASKS_SUSPEND</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
</field>
</fields>
</register>
<register>
- <name>PREFIX1</name>
- <description>Prefixes bytes for logical addresses 4-7</description>
- <addressOffset>0x528</addressOffset>
+ <name>EVENTS_CTS</name>
+ <description>CTS is activated (set low). Clear To Send.</description>
+ <addressOffset>0x100</addressOffset>
<access>read-write</access>
<fields>
<field>
- <name>AP4</name>
- <description>Address prefix 4.</description>
+ <name>EVENTS_CTS</name>
<lsb>0</lsb>
- <msb>7</msb>
+ <msb>0</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_NCTS</name>
+ <description>CTS is deactivated (set high). Not Clear To Send.</description>
+ <addressOffset>0x104</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>AP5</name>
- <description>Address prefix 5.</description>
- <lsb>8</lsb>
- <msb>15</msb>
+ <name>EVENTS_NCTS</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_RXDRDY</name>
+ <description>Data received in RXD</description>
+ <addressOffset>0x108</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>AP6</name>
- <description>Address prefix 6.</description>
- <lsb>16</lsb>
- <msb>23</msb>
+ <name>EVENTS_RXDRDY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>EVENTS_TXDRDY</name>
+ <description>Data sent from TXD</description>
+ <addressOffset>0x11C</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>AP7</name>
- <description>Address prefix 7.</description>
- <lsb>24</lsb>
- <msb>31</msb>
+ <name>EVENTS_TXDRDY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
</field>
</fields>
</register>
<register>
- <name>TXADDRESS</name>
- <description>Transmit address select</description>
- <addressOffset>0x52C</addressOffset>
+ <name>EVENTS_ERROR</name>
+ <description>Error detected</description>
+ <addressOffset>0x124</addressOffset>
<access>read-write</access>
<fields>
<field>
- <name>TXADDRESS</name>
- <description>Transmit address select</description>
+ <name>EVENTS_ERROR</name>
<lsb>0</lsb>
- <msb>2</msb>
+ <msb>0</msb>
</field>
</fields>
</register>
<register>
- <name>RXADDRESSES</name>
- <description>Receive address select</description>
- <addressOffset>0x530</addressOffset>
+ <name>EVENTS_RXTO</name>
+ <description>Receiver timeout</description>
+ <addressOffset>0x144</addressOffset>
<access>read-write</access>
<fields>
<field>
- <name>ADDR0</name>
- <description>Enable or disable reception on logical address 0.</description>
+ <name>EVENTS_RXTO</name>
<lsb>0</lsb>
<msb>0</msb>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SHORTS</name>
+ <description>Shortcut register</description>
+ <addressOffset>0x200</addressOffset>
+ <access>read-write</access>
+ <fields>
+ <field>
+ <name>CTS_STARTRX</name>
+ <description>Shortcut between CTS event and STARTRX task</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ADDR1</name>
- <description>Enable or disable reception on logical address 1.</description>
- <lsb>1</lsb>
- <msb>1</msb>
+ <name>NCTS_STOPRX</name>
+ <description>Shortcut between NCTS event and STOPRX task</description>
+ <lsb>4</lsb>
+ <msb>4</msb>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable</description>
+ <description>Disable shortcut</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable</description>
+ <description>Enable shortcut</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ </fields>
+ </register>
+ <register>
+ <name>INTENSET</name>
+ <description>Enable interrupt</description>
+ <addressOffset>0x304</addressOffset>
+ <access>read-write</access>
+ <fields>
<field>
- <name>ADDR2</name>
- <description>Enable or disable reception on logical address 2.</description>
- <lsb>2</lsb>
- <msb>2</msb>
+ <name>CTS</name>
+ <description>Write '1' to enable interrupt for CTS event</description>
+ <lsb>0</lsb>
+ <msb>0</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>ADDR3</name>
- <description>Enable or disable reception on logical address 3.</description>
- <lsb>3</lsb>
- <msb>3</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disable</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
+ <name>Set</name>
<description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ADDR4</name>
- <description>Enable or disable reception on logical address 4.</description>
- <lsb>4</lsb>
- <msb>4</msb>
+ <name>NCTS</name>
+ <description>Write '1' to enable interrupt for NCTS event</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>ADDR5</name>
- <description>Enable or disable reception on logical address 5.</description>
- <lsb>5</lsb>
- <msb>5</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disable</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
+ <name>Set</name>
<description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ADDR6</name>
- <description>Enable or disable reception on logical address 6.</description>
- <lsb>6</lsb>
- <msb>6</msb>
+ <name>RXDRDY</name>
+ <description>Write '1' to enable interrupt for RXDRDY event</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Set</name>
<description>Enable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ADDR7</name>
- <description>Enable or disable reception on logical address 7.</description>
+ <name>TXDRDY</name>
+ <description>Write '1' to enable interrupt for TXDRDY event</description>
<lsb>7</lsb>
<msb>7</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disable</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enable</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- </fields>
- </register>
- <register>
- <name>CRCCNF</name>
- <description>CRC configuration</description>
- <addressOffset>0x534</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>LEN</name>
- <description>CRC length in number of bytes.</description>
- <lsb>0</lsb>
- <msb>1</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>CRC length is zero and CRC calculation is disabled</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>One</name>
- <description>CRC length is one byte and CRC calculation is enabled</description>
+ <name>Set</name>
+ <description>Enable</description>
<value>1</value>
</enumeratedValue>
- <enumeratedValue>
- <name>Two</name>
- <description>CRC length is two bytes and CRC calculation is enabled</description>
- <value>2</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Three</name>
- <description>CRC length is three bytes and CRC calculation is enabled</description>
- <value>3</value>
- </enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>SKIPADDR</name>
- <description>Include or exclude packet address field out of CRC calculation.</description>
- <lsb>8</lsb>
+ <name>ERROR</name>
+ <description>Write '1' to enable interrupt for ERROR event</description>
+ <lsb>9</lsb>
<msb>9</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>Include</name>
- <description>CRC calculation includes address field</description>
+ <name>Disabled</name>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Skip</name>
- <description>CRC calculation does not include address field. The CRC calculation will start at the first byte after the address.</description>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Ieee802154</name>
- <description>CRC calculation as per 802.15.4 standard. Starting at first byte after length field.</description>
- <value>2</value>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
- </fields>
- </register>
- <register>
- <name>CRCPOLY</name>
- <description>CRC polynomial</description>
- <addressOffset>0x538</addressOffset>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
- <fields>
- <field>
- <name>CRCPOLY</name>
- <description>CRC polynomial</description>
- <lsb>0</lsb>
- <msb>23</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>CRCINIT</name>
- <description>CRC initial value</description>
- <addressOffset>0x53C</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>CRCINIT</name>
- <description>CRC initial value</description>
- <lsb>0</lsb>
- <msb>23</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>TIFS</name>
- <description>Inter Frame Spacing in us</description>
- <addressOffset>0x544</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>TIFS</name>
- <description>Inter Frame Spacing in us</description>
- <lsb>0</lsb>
- <msb>9</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>RSSISAMPLE</name>
- <description>RSSI sample</description>
- <addressOffset>0x548</addressOffset>
- <access>read-only</access>
- <fields>
- <field>
- <name>RSSISAMPLE</name>
- <description>RSSI sample</description>
- <lsb>0</lsb>
- <msb>6</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>STATE</name>
- <description>Current radio state</description>
- <addressOffset>0x550</addressOffset>
- <access>read-only</access>
- <fields>
<field>
- <name>STATE</name>
- <description>Current radio state</description>
- <lsb>0</lsb>
- <msb>3</msb>
+ <name>RXTO</name>
+ <description>Write '1' to enable interrupt for RXTO event</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>RADIO is in the Disabled state</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>RxRu</name>
- <description>RADIO is in the RXRU state</description>
+ <name>Enabled</name>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>RxIdle</name>
- <description>RADIO is in the RXIDLE state</description>
- <value>2</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Rx</name>
- <description>RADIO is in the RX state</description>
- <value>3</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>RxDisable</name>
- <description>RADIO is in the RXDISABLED state</description>
- <value>4</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>TxRu</name>
- <description>RADIO is in the TXRU state</description>
- <value>9</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>TxIdle</name>
- <description>RADIO is in the TXIDLE state</description>
- <value>10</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Tx</name>
- <description>RADIO is in the TX state</description>
- <value>11</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>TxDisable</name>
- <description>RADIO is in the TXDISABLED state</description>
- <value>12</value>
+ <name>Set</name>
+ <description>Enable</description>
+ <value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
- <name>DATAWHITEIV</name>
- <description>Data whitening initial value</description>
- <addressOffset>0x554</addressOffset>
- <access>read-write</access>
- <resetValue>0x00000040</resetValue>
- <fields>
- <field>
- <name>DATAWHITEIV</name>
- <description>Data whitening initial value. Bit 6 is hard-wired to '1', writing '0' to it has no effect, and it will always be read back and used by the device as '1'.</description>
- <lsb>0</lsb>
- <msb>6</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>BCC</name>
- <description>Bit counter compare</description>
- <addressOffset>0x560</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>BCC</name>
- <description>Bit counter compare</description>
- <lsb>0</lsb>
- <msb>31</msb>
- </field>
- </fields>
- </register>
- <register>
- <dim>8</dim>
- <dimIncrement>4</dimIncrement>
- <name>DAB[%s]</name>
- <description>Description collection[0]: Device address base segment 0</description>
- <addressOffset>0x600</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>DAB</name>
- <description>Device address base segment 0</description>
- <lsb>0</lsb>
- <msb>31</msb>
- </field>
- </fields>
- </register>
- <register>
- <dim>8</dim>
- <dimIncrement>4</dimIncrement>
- <name>DAP[%s]</name>
- <description>Description collection[0]: Device address prefix 0</description>
- <addressOffset>0x620</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>DAP</name>
- <description>Device address prefix 0</description>
- <lsb>0</lsb>
- <msb>15</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>DACNF</name>
- <description>Device address match configuration</description>
- <addressOffset>0x640</addressOffset>
+ <name>INTENCLR</name>
+ <description>Disable interrupt</description>
+ <addressOffset>0x308</addressOffset>
<access>read-write</access>
<fields>
<field>
- <name>ENA0</name>
- <description>Enable or disable device address matching using device address 0</description>
+ <name>CTS</name>
+ <description>Write '1' to disable interrupt for CTS event</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disabled</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enabled</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ENA1</name>
- <description>Enable or disable device address matching using device address 1</description>
+ <name>NCTS</name>
+ <description>Write '1' to disable interrupt for NCTS event</description>
<lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disabled</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enabled</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ENA2</name>
- <description>Enable or disable device address matching using device address 2</description>
+ <name>RXDRDY</name>
+ <description>Write '1' to disable interrupt for RXDRDY event</description>
<lsb>2</lsb>
<msb>2</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disabled</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enabled</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>ENA3</name>
- <description>Enable or disable device address matching using device address 3</description>
- <lsb>3</lsb>
- <msb>3</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disabled</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enabled</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ENA4</name>
- <description>Enable or disable device address matching using device address 4</description>
- <lsb>4</lsb>
- <msb>4</msb>
+ <name>TXDRDY</name>
+ <description>Write '1' to disable interrupt for TXDRDY event</description>
+ <lsb>7</lsb>
+ <msb>7</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disabled</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enabled</description>
+ <description>Read: Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>ENA5</name>
- <description>Enable or disable device address matching using device address 5</description>
- <lsb>5</lsb>
- <msb>5</msb>
<enumeratedValues>
+ <usage>write</usage>
<enumeratedValue>
- <name>Disabled</name>
- <description>Disabled</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enabled</description>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ENA6</name>
- <description>Enable or disable device address matching using device address 6</description>
- <lsb>6</lsb>
- <msb>6</msb>
+ <name>ERROR</name>
+ <description>Write '1' to disable interrupt for ERROR event</description>
+ <lsb>9</lsb>
+ <msb>9</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disabled</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enabled</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>ENA7</name>
- <description>Enable or disable device address matching using device address 7</description>
- <lsb>7</lsb>
- <msb>7</msb>
+ <name>RXTO</name>
+ <description>Write '1' to disable interrupt for RXTO event</description>
+ <lsb>17</lsb>
+ <msb>17</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
<name>Disabled</name>
- <description>Disabled</description>
+ <description>Read: Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Enabled</description>
+ <description>Read: Enabled</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ <enumeratedValues>
+ <usage>write</usage>
+ <enumeratedValue>
+ <name>Clear</name>
+ <description>Disable</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
- </field>
- <field>
- <name>TXADD0</name>
- <description>TxAdd for device address 0</description>
- <lsb>8</lsb>
- <msb>8</msb>
- </field>
- <field>
- <name>TXADD1</name>
- <description>TxAdd for device address 1</description>
- <lsb>9</lsb>
- <msb>9</msb>
- </field>
- <field>
- <name>TXADD2</name>
- <description>TxAdd for device address 2</description>
- <lsb>10</lsb>
- <msb>10</msb>
- </field>
- <field>
- <name>TXADD3</name>
- <description>TxAdd for device address 3</description>
- <lsb>11</lsb>
- <msb>11</msb>
- </field>
- <field>
- <name>TXADD4</name>
- <description>TxAdd for device address 4</description>
- <lsb>12</lsb>
- <msb>12</msb>
- </field>
- <field>
- <name>TXADD5</name>
- <description>TxAdd for device address 5</description>
- <lsb>13</lsb>
- <msb>13</msb>
- </field>
- <field>
- <name>TXADD6</name>
- <description>TxAdd for device address 6</description>
- <lsb>14</lsb>
- <msb>14</msb>
- </field>
- <field>
- <name>TXADD7</name>
- <description>TxAdd for device address 7</description>
- <lsb>15</lsb>
- <msb>15</msb>
</field>
</fields>
</register>
<register>
- <name>MHRMATCHCONF</name>
- <description>Search Pattern Configuration</description>
- <addressOffset>0x644</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>MHRMATCHMAS</name>
- <description>Pattern mask</description>
- <addressOffset>0x648</addressOffset>
- <access>read-write</access>
- </register>
- <register>
- <name>MODECNF0</name>
- <description>Radio mode configuration register 0</description>
- <addressOffset>0x650</addressOffset>
+ <name>ERRORSRC</name>
+ <description>Error source</description>
+ <addressOffset>0x480</addressOffset>
<access>read-write</access>
- <resetValue>0x00000200</resetValue>
+ <modifiedWriteValues>oneToClear</modifiedWriteValues>
<fields>
<field>
- <name>RU</name>
- <description>Radio ramp-up time</description>
+ <name>OVERRUN</name>
+ <description>Overrun error</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
+ <usage>read</usage>
+ <enumeratedValue>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity error</description>
+ <lsb>1</lsb>
+ <msb>1</msb>
+ <enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>Default</name>
- <description>Default ramp-up time (tRXEN), compatible with firmware written for nRF51</description>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>Fast</name>
- <description>Fast ramp-up (tRXEN,FAST), see electrical specification for more information</description>
+ <name>Present</name>
+ <description>Read: error present</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
<field>
- <name>DTX</name>
- <description>Default TX value</description>
- <lsb>8</lsb>
- <msb>9</msb>
+ <name>FRAMING</name>
+ <description>Framing error occurred</description>
+ <lsb>2</lsb>
+ <msb>2</msb>
<enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>B1</name>
- <description>Transmit '1'</description>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
- <name>B0</name>
- <description>Transmit '0'</description>
+ <name>Present</name>
+ <description>Read: error present</description>
<value>1</value>
</enumeratedValue>
+ </enumeratedValues>
+ </field>
+ <field>
+ <name>BREAK</name>
+ <description>Break condition</description>
+ <lsb>3</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <usage>read</usage>
<enumeratedValue>
- <name>Center</name>
- <description>Transmit center frequency</description>
- <value>2</value>
+ <name>NotPresent</name>
+ <description>Read: error not present</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Present</name>
+ <description>Read: error present</description>
+ <value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
</fields>
</register>
<register>
- <name>SFD</name>
- <description>IEEE 802.15.4 Start of Frame Delimiter</description>
- <addressOffset>0x660</addressOffset>
+ <name>ENABLE</name>
+ <description>Enable UART</description>
+ <addressOffset>0x500</addressOffset>
<access>read-write</access>
- <resetValue>0x000000A7</resetValue>
<fields>
<field>
- <name>SFD</name>
- <description>IEEE 802.15.4 Start of Frame Delimiter. Note, the least significant 4-bits of the SFD cannot all be zeros.</description>
+ <name>ENABLE</name>
+ <description>Enable or disable UART</description>
<lsb>0</lsb>
- <msb>7</msb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disabled</name>
+ <description>Disable UART</description>
+ <value>0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Enabled</name>
+ <description>Enable UART</description>
+ <value>4</value>
+ </enumeratedValue>
+ </enumeratedValues>
</field>
</fields>
</register>
+ <cluster>
+ <name>PSEL</name>
+ <description>Unspecified</description>
+ <headerStructName>UART_PSEL</headerStructName>
+ <addressOffset>0x508</addressOffset>
+ <register>
+ <name>RTS</name>
+ <description>Pin select for RTS</description>
+ <addressOffset>0x000</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>TXD</name>
+ <description>Pin select for TXD</description>
+ <addressOffset>0x004</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CTS</name>
+ <description>Pin select for CTS</description>
+ <addressOffset>0x008</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>RXD</name>
+ <description>Pin select for RXD</description>
+ <addressOffset>0x00C</addressOffset>
+ <access>read-write</access>
+ <resetValue>0xFFFFFFFF</resetValue>
+ <fields>
+ <field>
+ <name>PIN</name>
+ <description>Pin number</description>
+ <lsb>0</lsb>
+ <msb>4</msb>
+ </field>
+ <field>
+ <name>PORT</name>
+ <description>Port number</description>
+ <lsb>5</lsb>
+ <msb>5</msb>
+ </field>
+ <field>
+ <name>CONNECT</name>
+ <description>Connection</description>
+ <lsb>31</lsb>
+ <msb>31</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Disconnected</name>
+ <description>Disconnect</description>
+ <value>1</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Connected</name>
+ <description>Connect</description>
+ <value>0</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
+ </fields>
+ </register>
+ </cluster>
<register>
- <name>EDCNT</name>
- <description>IEEE 802.15.4 Energy Detect Loop Count</description>
- <addressOffset>0x664</addressOffset>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
+ <name>RXD</name>
+ <description>RXD register</description>
+ <addressOffset>0x518</addressOffset>
+ <access>read-only</access>
+ <readAction>modifyExternal</readAction>
<fields>
<field>
- <name>EDCNT</name>
- <description>IEEE 802.15.4 Energy Detect Loop Count</description>
+ <name>RXD</name>
+ <description>RX data received in previous transfers, double buffered</description>
<lsb>0</lsb>
- <msb>20</msb>
+ <msb>7</msb>
</field>
</fields>
</register>
<register>
- <name>EDSAMPLE</name>
- <description>IEEE 802.15.4 Energy Detect Level</description>
- <addressOffset>0x668</addressOffset>
- <access>read-write</access>
- <resetValue>0x00000000</resetValue>
+ <name>TXD</name>
+ <description>TXD register</description>
+ <addressOffset>0x51C</addressOffset>
+ <access>write-only</access>
<fields>
<field>
- <name>EDLVL</name>
- <description>IEEE 802.15.4 Energy Detect Level</description>
+ <name>TXD</name>
+ <description>TX data to be transferred</description>
<lsb>0</lsb>
<msb>7</msb>
</field>
</fields>
</register>
<register>
- <name>CCACTRL</name>
- <description>IEEE 802.15.4 Clear Channel Assessment Control</description>
- <addressOffset>0x66C</addressOffset>
+ <name>BAUDRATE</name>
+ <description>Baud rate. Accuracy depends on the HFCLK source selected.</description>
+ <addressOffset>0x524</addressOffset>
<access>read-write</access>
- <resetValue>0x00000000</resetValue>
+ <resetValue>0x04000000</resetValue>
<fields>
<field>
- <name>CCAMODE</name>
- <description>CCA Mode Of Operation</description>
+ <name>BAUDRATE</name>
+ <description>Baud rate</description>
<lsb>0</lsb>
- <msb>2</msb>
+ <msb>31</msb>
<enumeratedValues>
<enumeratedValue>
- <name>EdMode</name>
- <description>Energy Above Threshold</description>
- <value>0</value>
+ <name>Baud1200</name>
+ <description>1200 baud (actual rate: 1205)</description>
+ <value>0x0004F000</value>
</enumeratedValue>
<enumeratedValue>
- <name>CarrierMode</name>
- <description>Carrier Seen</description>
- <value>1</value>
+ <name>Baud2400</name>
+ <description>2400 baud (actual rate: 2396)</description>
+ <value>0x0009D000</value>
</enumeratedValue>
<enumeratedValue>
- <name>CarrierAndEdMode</name>
- <description>Energy Above Threshold AND Carrier Seen</description>
- <value>2</value>
+ <name>Baud4800</name>
+ <description>4800 baud (actual rate: 4808)</description>
+ <value>0x0013B000</value>
</enumeratedValue>
<enumeratedValue>
- <name>CarrierOrEdMode</name>
- <description>Energy Above Threshold OR Carrier Seen</description>
- <value>3</value>
+ <name>Baud9600</name>
+ <description>9600 baud (actual rate: 9598)</description>
+ <value>0x00275000</value>
</enumeratedValue>
<enumeratedValue>
- <name>EdModeTest1</name>
- <description>Energy Above Threshold test mode that will abort when first ED measurement over threshold is seen. No averaging.</description>
- <value>4</value>
+ <name>Baud14400</name>
+ <description>14400 baud (actual rate: 14414)</description>
+ <value>0x003B0000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud19200</name>
+ <description>19200 baud (actual rate: 19208)</description>
+ <value>0x004EA000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud28800</name>
+ <description>28800 baud (actual rate: 28829)</description>
+ <value>0x0075F000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud31250</name>
+ <description>31250 baud</description>
+ <value>0x00800000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud38400</name>
+ <description>38400 baud (actual rate: 38462)</description>
+ <value>0x009D5000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud56000</name>
+ <description>56000 baud (actual rate: 55944)</description>
+ <value>0x00E50000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud57600</name>
+ <description>57600 baud (actual rate: 57762)</description>
+ <value>0x00EBF000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud76800</name>
+ <description>76800 baud (actual rate: 76923)</description>
+ <value>0x013A9000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud115200</name>
+ <description>115200 baud (actual rate: 115942)</description>
+ <value>0x01D7E000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud230400</name>
+ <description>230400 baud (actual rate: 231884)</description>
+ <value>0x03AFB000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud250000</name>
+ <description>250000 baud</description>
+ <value>0x04000000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud460800</name>
+ <description>460800 baud (actual rate: 470588)</description>
+ <value>0x075F7000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud921600</name>
+ <description>921600 baud (actual rate: 941176)</description>
+ <value>0x0EBED000</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Baud1M</name>
+ <description>1Mega baud</description>
+ <value>0x10000000</value>
</enumeratedValue>
</enumeratedValues>
</field>
- <field>
- <name>CCAEDTHRES</name>
- <description>CCA Energy Busy Threshold. Used in all the CCA modes except CarrierMode.</description>
- <lsb>8</lsb>
- <msb>15</msb>
- </field>
- <field>
- <name>CCACORRTHRES</name>
- <description>CCA Correlator Busy Threshold. Only relevant to CarrierMode, CarrierAndEdMode and CarrierOrEdMode.</description>
- <lsb>16</lsb>
- <msb>23</msb>
- </field>
- <field>
- <name>CCACORRCNT</name>
- <description>Limit for occurances above CCACORRTHRES. When not equal to zero the corrolator based signal detect is enabled.</description>
- <lsb>24</lsb>
- <msb>31</msb>
- </field>
</fields>
</register>
<register>
- <name>POWER</name>
- <description>Peripheral power control</description>
- <addressOffset>0xFFC</addressOffset>
+ <name>CONFIG</name>
+ <description>Configuration of parity and hardware flow control</description>
+ <addressOffset>0x56C</addressOffset>
<access>read-write</access>
- <resetValue>0x00000001</resetValue>
<fields>
<field>
- <name>POWER</name>
- <description>Peripheral power control. The peripheral and its registers will be reset to its initial state by switching the peripheral off and then back on again.</description>
+ <name>HWFC</name>
+ <description>Hardware flow control</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
<enumeratedValue>
<name>Disabled</name>
- <description>Peripheral is powered off</description>
+ <description>Disabled</description>
<value>0</value>
</enumeratedValue>
<enumeratedValue>
<name>Enabled</name>
- <description>Peripheral is powered on</description>
+ <description>Enabled</description>
<value>1</value>
</enumeratedValue>
</enumeratedValues>
</field>
+ <field>
+ <name>PARITY</name>
+ <description>Parity</description>
+ <lsb>1</lsb>
+ <msb>3</msb>
+ <enumeratedValues>
+ <enumeratedValue>
+ <name>Excluded</name>
+ <description>Exclude parity bit</description>
+ <value>0x0</value>
+ </enumeratedValue>
+ <enumeratedValue>
+ <name>Included</name>
+ <description>Include parity bit</description>
+ <value>0x7</value>
+ </enumeratedValue>
+ </enumeratedValues>
+ </field>
</fields>
</register>
</registers>
@@ -7523,9 +9063,8 @@ POSSIBILITY OF SUCH DAMAGE.\n
<peripheral>
<name>UARTE0</name>
<description>UART with EasyDMA 0</description>
- <groupName>UARTE</groupName>
<baseAddress>0x40002000</baseAddress>
- <size>32</size>
+ <alternatePeripheral>UART0</alternatePeripheral>
<headerStructName>UARTE</headerStructName>
<addressBlock>
<offset>0</offset>
@@ -7536,102 +9075,216 @@ POSSIBILITY OF SUCH DAMAGE.\n
<name>UARTE0_UART0</name>
<value>2</value>
</interrupt>
+ <groupName>UARTE</groupName>
+ <size>0x20</size>
<registers>
<register>
<name>TASKS_STARTRX</name>
<description>Start UART receiver</description>
<addressOffset>0x000</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTRX</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>TASKS_STOPRX</name>
<description>Stop UART receiver</description>
<addressOffset>0x004</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPRX</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>TASKS_STARTTX</name>
<description>Start UART transmitter</description>
<addressOffset>0x008</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STARTTX</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>TASKS_STOPTX</name>
<description>Stop UART transmitter</description>
<addressOffset>0x00C</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_STOPTX</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>TASKS_FLUSHRX</name>
<description>Flush RX FIFO into RX buffer</description>
<addressOffset>0x02C</addressOffset>
<access>write-only</access>
+ <fields>
+ <field>
+ <name>TASKS_FLUSHRX</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_CTS</name>
<description>CTS is activated (set low). Clear To Send.</description>
<addressOffset>0x100</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_CTS</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_NCTS</name>
<description>CTS is deactivated (set high). Not Clear To Send.</description>
<addressOffset>0x104</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_NCTS</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_RXDRDY</name>
<description>Data received in RXD (but potentially not yet transferred to Data RAM)</description>
<addressOffset>0x108</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXDRDY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_ENDRX</name>
<description>Receive buffer is filled up</description>
<addressOffset>0x110</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDRX</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_TXDRDY</name>
<description>Data sent from TXD</description>
<addressOffset>0x11C</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXDRDY</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_ENDTX</name>
<description>Last TX byte transmitted</description>
<addressOffset>0x120</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ENDTX</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_ERROR</name>
<description>Error detected</description>
<addressOffset>0x124</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_ERROR</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_RXTO</name>
<description>Receiver timeout</description>
<addressOffset>0x144</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXTO</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_RXSTARTED</name>
<description>UART receiver has started</description>
<addressOffset>0x14C</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_RXSTARTED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_TXSTARTED</name>
<description>UART transmitter has started</description>
<addressOffset>0x150</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTARTED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>EVENTS_TXSTOPPED</name>
<description>Transmitter stopped</description>
<addressOffset>0x158</addressOffset>
<access>read-write</access>
+ <fields>
+ <field>
+ <name>EVENTS_TXSTOPPED</name>
+ <lsb>0</lsb>
+ <msb>0</msb>
+ </field>
+ </fields>
</register>
<register>
<name>SHORTS</name>
@@ -7891,7 +9544,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<fields>
<field>
<name>CTS</name>
- <description>Write '1' to Enable interrupt for CTS event</description>
+ <description>Write '1' to enable interrupt for CTS event</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -7918,7 +9571,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>NCTS</name>
- <description>Write '1' to Enable interrupt for NCTS event</description>
+ <description>Write '1' to enable interrupt for NCTS event</description>
<lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
@@ -7945,7 +9598,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>RXDRDY</name>
- <description>Write '1' to Enable interrupt for RXDRDY event</description>
+ <description>Write '1' to enable interrupt for RXDRDY event</description>
<lsb>2</lsb>
<msb>2</msb>
<enumeratedValues>
@@ -7972,7 +9625,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>ENDRX</name>
- <description>Write '1' to Enable interrupt for ENDRX event</description>
+ <description>Write '1' to enable interrupt for ENDRX event</description>
<lsb>4</lsb>
<msb>4</msb>
<enumeratedValues>
@@ -7999,7 +9652,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>TXDRDY</name>
- <description>Write '1' to Enable interrupt for TXDRDY event</description>
+ <description>Write '1' to enable interrupt for TXDRDY event</description>
<lsb>7</lsb>
<msb>7</msb>
<enumeratedValues>
@@ -8026,7 +9679,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>ENDTX</name>
- <description>Write '1' to Enable interrupt for ENDTX event</description>
+ <description>Write '1' to enable interrupt for ENDTX event</description>
<lsb>8</lsb>
<msb>8</msb>
<enumeratedValues>
@@ -8053,7 +9706,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>ERROR</name>
- <description>Write '1' to Enable interrupt for ERROR event</description>
+ <description>Write '1' to enable interrupt for ERROR event</description>
<lsb>9</lsb>
<msb>9</msb>
<enumeratedValues>
@@ -8080,7 +9733,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>RXTO</name>
- <description>Write '1' to Enable interrupt for RXTO event</description>
+ <description>Write '1' to enable interrupt for RXTO event</description>
<lsb>17</lsb>
<msb>17</msb>
<enumeratedValues>
@@ -8107,7 +9760,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>RXSTARTED</name>
- <description>Write '1' to Enable interrupt for RXSTARTED event</description>
+ <description>Write '1' to enable interrupt for RXSTARTED event</description>
<lsb>19</lsb>
<msb>19</msb>
<enumeratedValues>
@@ -8134,7 +9787,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>TXSTARTED</name>
- <description>Write '1' to Enable interrupt for TXSTARTED event</description>
+ <description>Write '1' to enable interrupt for TXSTARTED event</description>
<lsb>20</lsb>
<msb>20</msb>
<enumeratedValues>
@@ -8161,7 +9814,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>TXSTOPPED</name>
- <description>Write '1' to Enable interrupt for TXSTOPPED event</description>
+ <description>Write '1' to enable interrupt for TXSTOPPED event</description>
<lsb>22</lsb>
<msb>22</msb>
<enumeratedValues>
@@ -8196,7 +9849,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
<fields>
<field>
<name>CTS</name>
- <description>Write '1' to Disable interrupt for CTS event</description>
+ <description>Write '1' to disable interrupt for CTS event</description>
<lsb>0</lsb>
<msb>0</msb>
<enumeratedValues>
@@ -8223,7 +9876,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>NCTS</name>
- <description>Write '1' to Disable interrupt for NCTS event</description>
+ <description>Write '1' to disable interrupt for NCTS event</description>
<lsb>1</lsb>
<msb>1</msb>
<enumeratedValues>
@@ -8250,7 +9903,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>RXDRDY</name>
- <description>Write '1' to Disable interrupt for RXDRDY event</description>
+ <description>Write '1' to disable interrupt for RXDRDY event</description>
<lsb>2</lsb>
<msb>2</msb>
<enumeratedValues>
@@ -8277,7 +9930,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>ENDRX</name>
- <description>Write '1' to Disable interrupt for ENDRX event</description>
+ <description>Write '1' to disable interrupt for ENDRX event</description>
<lsb>4</lsb>
<msb>4</msb>
<enumeratedValues>
@@ -8304,7 +9957,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>TXDRDY</name>
- <description>Write '1' to Disable interrupt for TXDRDY event</description>
+ <description>Write '1' to disable interrupt for TXDRDY event</description>
<lsb>7</lsb>
<msb>7</msb>
<enumeratedValues>
@@ -8331,7 +9984,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>ENDTX</name>
- <description>Write '1' to Disable interrupt for ENDTX event</description>
+ <description>Write '1' to disable interrupt for ENDTX event</description>
<lsb>8</lsb>
<msb>8</msb>
<enumeratedValues>
@@ -8358,7 +10011,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>ERROR</name>
- <description>Write '1' to Disable interrupt for ERROR event</description>
+ <description>Write '1' to disable interrupt for ERROR event</description>
<lsb>9</lsb>
<msb>9</msb>
<enumeratedValues>
@@ -8385,7 +10038,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>RXTO</name>
- <description>Write '1' to Disable interrupt for RXTO event</description>
+ <description>Write '1' to disable interrupt for RXTO event</description>
<lsb>17</lsb>
<msb>17</msb>
<enumeratedValues>
@@ -8412,7 +10065,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>RXSTARTED</name>
- <description>Write '1' to Disable interrupt for RXSTARTED event</description>
+ <description>Write '1' to disable interrupt for RXSTARTED event</description>
<lsb>19</lsb>
<msb>19</msb>
<enumeratedValues>
@@ -8439,7 +10092,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>TXSTARTED</name>
- <description>Write '1' to Disable interrupt for TXSTARTED event</description>
+ <description>Write '1' to disable interrupt for TXSTARTED event</description>
<lsb>20</lsb>
<msb>20</msb>
<enumeratedValues>
@@ -8466,7 +10119,7 @@ POSSIBILITY OF SUCH DAMAGE.\n
</field>
<field>
<name>TXSTOPPED</name>
- <description>Write '1' to Disable interrupt for TXSTOPPED event</description>
+ <description>Write '1' to disable interrupt for TXSTOPPED event</description>
<lsb>22</lsb>
<msb>22</msb>
<enumeratedValues>
@@ -8810,673 +10463,270 @@ POSSIBILITY OF SUCH DAMAGE.\n
<value>0x004EA000</value>
</enumeratedValue>
<enumeratedValue>
- <name>Baud28800</name>
- <description>28800 baud (actual rate: 28777)</description>
- <value>0x0075C000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud31250</name>
- <description>31250 baud</description>
- <value>0x00800000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud38400</name>
- <description>38400 baud (actual rate: 38369)</description>
- <value>0x009D0000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud56000</name>
- <description>56000 baud (actual rate: 55944)</description>
- <value>0x00E50000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud57600</name>
- <description>57600 baud (actual rate: 57554)</description>
- <value>0x00EB0000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud76800</name>
- <description>76800 baud (actual rate: 76923)</description>
- <value>0x013A9000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud115200</name>
- <description>115200 baud (actual rate: 115108)</description>
- <value>0x01D60000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud230400</name>
- <description>230400 baud (actual rate: 231884)</description>
- <value>0x03B00000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud250000</name>
- <description>250000 baud</description>
- <value>0x04000000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud460800</name>
- <description>460800 baud (actual rate: 457143)</description>
- <value>0x07400000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud921600</name>
- <description>921600 baud (actual rate: 941176)</description>
- <value>0x0F000000</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Baud1M</name>
- <description>1Mega baud</description>
- <value>0x10000000</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- </fields>
- </register>
- <cluster>
- <name>RXD</name>
- <description>RXD EasyDMA channel</description>
- <headerStructName>UARTE_RXD</headerStructName>
- <addressOffset>0x534</addressOffset>
- <register>
- <name>PTR</name>
- <description>Data pointer</description>
- <addressOffset>0x000</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>PTR</name>
- <description>Data pointer</description>
- <lsb>0</lsb>
- <msb>31</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>MAXCNT</name>
- <description>Maximum number of bytes in receive buffer</description>
- <addressOffset>0x004</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>MAXCNT</name>
- <description>Maximum number of bytes in receive buffer</description>
- <lsb>0</lsb>
- <msb>15</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>AMOUNT</name>
- <description>Number of bytes transferred in the last transaction</description>
- <addressOffset>0x008</addressOffset>
- <access>read-only</access>
- <fields>
- <field>
- <name>AMOUNT</name>
- <description>Number of bytes transferred in the last transaction</description>
- <lsb>0</lsb>
- <msb>15</msb>
- </field>
- </fields>
- </register>
- </cluster>
- <cluster>
- <name>TXD</name>
- <description>TXD EasyDMA channel</description>
- <headerStructName>UARTE_TXD</headerStructName>
- <addressOffset>0x544</addressOffset>
- <register>
- <name>PTR</name>
- <description>Data pointer</description>
- <addressOffset>0x000</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>PTR</name>
- <description>Data pointer</description>
- <lsb>0</lsb>
- <msb>31</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>MAXCNT</name>
- <description>Maximum number of bytes in transmit buffer</description>
- <addressOffset>0x004</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>MAXCNT</name>
- <description>Maximum number of bytes in transmit buffer</description>
- <lsb>0</lsb>
- <msb>15</msb>
- </field>
- </fields>
- </register>
- <register>
- <name>AMOUNT</name>
- <description>Number of bytes transferred in the last transaction</description>
- <addressOffset>0x008</addressOffset>
- <access>read-only</access>
- <fields>
- <field>
- <name>AMOUNT</name>
- <description>Number of bytes transferred in the last transaction</description>
- <lsb>0</lsb>
- <msb>15</msb>
- </field>
- </fields>
- </register>
- </cluster>
- <register>
- <name>CONFIG</name>
- <description>Configuration of parity and hardware flow control</description>
- <addressOffset>0x56C</addressOffset>
- <access>read-write</access>
- <fields>
- <field>
- <name>HWFC</name>
- <description>Hardware flow control</description>
- <lsb>0</lsb>
- <msb>0</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Disabled</name>
- <description>Disabled</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Enabled</name>
- <description>Enabled</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>PARITY</name>
- <description>Parity</description>
- <lsb>1</lsb>
- <msb>3</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>Excluded</name>
- <description>Exclude parity bit</description>
- <value>0x0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Included</name>
- <description>Include even parity bit</description>
- <value>0x7</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- <field>
- <name>STOP</name>
- <description>Stop bits</description>
- <lsb>4</lsb>
- <msb>4</msb>
- <enumeratedValues>
- <enumeratedValue>
- <name>One</name>
- <description>One stop bit</description>
- <value>0</value>
- </enumeratedValue>
- <enumeratedValue>
- <name>Two</name>
- <description>Two stop bits</description>
- <value>1</value>
- </enumeratedValue>
- </enumeratedValues>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- <peripheral>
- <name>UART0</name>
- <description>Universal Asynchronous Receiver/Transmitter</description>
- <groupName>UART</groupName>
- <baseAddress>0x40002000</baseAddress>
- <size>32</size>
- <alternatePeripheral>UARTE0</alternatePeripheral>
- <headerStructName>UART</headerStructName>
- <addressBlock>
- <offset>0</offset>
- <size>0x1000</size>
- <usage>registers</usage>
- </addressBlock>
- <interrupt>
- <name>UARTE0_UART0</name>
- <value>2</value>
(This diff was longer than 20,000 lines, and has been truncated...)
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