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Posted to commits@nuttx.apache.org by xi...@apache.org on 2023/05/26 19:29:53 UTC
[nuttx] 06/07: procfs：add armv8-m cpuinfo
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit db53c7abcf3f9b55076ed89b5b6702a3a56f4385
Author: liaoao <li...@xiaomi.com>
AuthorDate: Thu Apr 27 20:04:16 2023 +0800
procfs：add armv8-m cpuinfo
Signed-off-by: liaoao <li...@xiaomi.com>
---
arch/arm/Kconfig | 1 +
arch/arm/src/armv8-m/Make.defs | 2 +-
arch/arm/src/armv8-m/arm_cpuinfo.c | 144 +++++++++++++++++++++++++++++++++++++
arch/arm/src/common/hwcap.h | 1 +
4 files changed, 147 insertions(+), 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7090d9e5a6..613c15199f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -853,6 +853,7 @@ config ARCH_CORTEXR7
config ARCH_ARMV8M
bool
default n
+ select ARCH_HAVE_CPUINFO
config ARCH_CORTEXM23
bool
diff --git a/arch/arm/src/armv8-m/Make.defs b/arch/arm/src/armv8-m/Make.defs
index 72222e7adf..c3e05ffc11 100644
--- a/arch/arm/src/armv8-m/Make.defs
+++ b/arch/arm/src/armv8-m/Make.defs
@@ -24,7 +24,7 @@ include common/Make.defs
CMN_ASRCS += arm_exception.S arm_saveusercontext.S
-CMN_CSRCS += arm_busfault.c arm_cache.c arm_doirq.c
+CMN_CSRCS += arm_busfault.c arm_cache.c arm_cpuinfo.c arm_doirq.c
CMN_CSRCS += arm_hardfault.c arm_initialstate.c arm_itm.c
CMN_CSRCS += arm_memfault.c arm_perf.c arm_sau.c
CMN_CSRCS += arm_schedulesigaction.c arm_securefault.c arm_secure_irq.c
diff --git a/arch/arm/src/armv8-m/arm_cpuinfo.c b/arch/arm/src/armv8-m/arm_cpuinfo.c
new file mode 100644
index 0000000000..0022f5259d
--- /dev/null
+++ b/arch/arm/src/armv8-m/arm_cpuinfo.c
@@ -0,0 +1,144 @@
+/****************************************************************************
+ * arch/arm/src/armv8-m/arm_cpuinfo.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/fs/procfs.h>
+#include <nuttx/arch.h>
+
+#include "arm_internal.h"
+#include "hwcap.h"
+#include "nvic.h"
+
+#if defined(CONFIG_FS_PROCFS) && !defined(CONFIG_FS_PROCFS_EXCLUDE_CPUINFO)
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * name: hwcap_extract_field
+ ****************************************************************************/
+
+#if defined(CONFIG_ARCH_FPU)
+static int hwcap_extract_field(uint32_t features, int field)
+{
+ int feature;
+
+ feature = (features >> field) & 0xf;
+ if (feature > 7)
+ {
+ feature -= 16;
+ }
+
+ return feature;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * name: up_show_cpuinfo
+ ****************************************************************************/
+
+ssize_t up_show_cpuinfo(FAR char *buf, size_t buf_size, off_t file_off)
+{
+ int i;
+ uint32_t cpuid;
+
+ for (i = 0; i < CONFIG_SMP_NCPUS; i++)
+ {
+ procfs_sprintf(buf, buf_size, &file_off, "processor\t: %d\n", i);
+ procfs_sprintf(buf, buf_size, &file_off, "BogoMIPS\t: %u.%02u\n",
+ (CONFIG_BOARD_LOOPSPERMSEC / 1000),
+ (CONFIG_BOARD_LOOPSPERMSEC / 10) % 100);
+ procfs_sprintf(buf, buf_size, &file_off, "cpu MHz\t\t: %lu.%02lu\n",
+ up_perf_getfreq() / 1000000,
+ (up_perf_getfreq() / 10000) % 100);
+
+ /* Cpu features */
+
+ procfs_sprintf(buf, buf_size, &file_off, "Features\t:");
+ procfs_sprintf(buf, buf_size, &file_off, " %s %s %s",
+ HWCAP_HALF, HWCAP_FAST_MULT, HWCAP_LPAE);
+
+#ifdef CONFIG_ARM_THUMB
+ procfs_sprintf(buf, buf_size, &file_off, " %s %s",
+ HWCAP_IDIVT, HWCAP_THUMB);
+#else
+ procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_IDIVA);
+#endif
+
+#ifdef CONFIG_ARM_DSP
+ procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_EDSP);
+#endif
+
+#ifdef CONFIG_SCHED_THREAD_LOCAL
+ procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_TLS);
+#endif
+
+ /* VFP features */
+
+#if defined(CONFIG_ARCH_FPU)
+# if defined(CONFIG_ARCH_CORTEXM33) || defined(CONFIG_ARCH_CORTEXM35P)
+ procfs_sprintf(buf, buf_size, &file_off, " %s %s %s",
+ HWCAP_FPV5, HWCAP_FPSP, HWCAP_VFPV3D16);
+# elif defined(CONFIG_ARCH_CORTEXM55) || defined(CONFIG_ARCH_CORTEXM85)
+ procfs_sprintf(buf, buf_size, &file_off, " %s %s %s %s",
+ HWCAP_FPV5, HWCAP_FPSP, HWCAP_FPDP, HWCAP_VFPV3D16);
+# endif
+
+# if defined(CONFIG_ARM_HAVE_MVE)
+ procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_MVE);
+# endif
+
+ if (hwcap_extract_field(getreg32(NVIC_MVFR1), 20) == 1)
+ {
+ procfs_sprintf(buf, buf_size, &file_off, " %s", HWCAP_FPHP);
+ }
+#endif
+
+ /* Cpuid info */
+
+ cpuid = getreg32(NVIC_CPUID_BASE);
+ procfs_sprintf(buf, buf_size, &file_off,
+ "\nmodel name\t: %s rev %" PRIx32 " (%s)\n"
+ "CPU architecture: %s\n",
+ "ARMv8-M", cpuid & 15, "v8ml", "8M");
+
+ procfs_sprintf(buf, buf_size, &file_off,
+ "CPU implementer\t: 0x%02" PRIx32 "\n"
+ "CPU variant\t: 0x%" PRIx32 "\n"
+ "CPU part\t: 0x%03" PRIx32 "\n"
+ "CPU revision\t: %" PRIu32"\n\n",
+ cpuid >> 24,
+ (cpuid >> 20) & 0xf,
+ (cpuid >> 4) & 0xfff,
+ cpuid & 0xf);
+ }
+
+ return -file_off;
+}
+#endif /* CONFIG_FS_PROCFS && !CONFIG_FS_PROCFS_EXCLUDE_CPUINFO */
diff --git a/arch/arm/src/common/hwcap.h b/arch/arm/src/common/hwcap.h
index eba334ae1e..14a085df72 100644
--- a/arch/arm/src/common/hwcap.h
+++ b/arch/arm/src/common/hwcap.h
@@ -57,6 +57,7 @@
#define HWCAP_FPSP "fpsp" /* Single-precision instructions support */
#define HWCAP_FPDP "fpdp" /* Double-precision instructions support */
#define HWCAP_FPV5 "fpv5" /* Floating-point extension version */
+#define HWCAP_MVE "mve" /* M-profile vector extension */
/* Hardware capabilities added form armv8 */