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Posted to commits@nuttx.apache.org by gn...@apache.org on 2020/04/03 01:42:15 UTC
[incubator-nuttx] 01/02: Check return from
nxsem_wait_uninterruptible() This commits is for all 1wire drivers under
arch/
This is an automated email from the ASF dual-hosted git repository.
gnutt pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit a447ec616d768e570ef5f5df469e614f52323be4
Author: Ouss4 <ab...@gmail.com>
AuthorDate: Fri Apr 3 01:50:53 2020 +0100
Check return from nxsem_wait_uninterruptible()
This commits is for all 1wire drivers under arch/
---
arch/arm/src/stm32/stm32_1wire.c | 108 +++++++++++++++++++-------------
arch/arm/src/stm32l4/stm32l4_1wire.c | 116 +++++++++++++++++++++--------------
2 files changed, 137 insertions(+), 87 deletions(-)
diff --git a/arch/arm/src/stm32/stm32_1wire.c b/arch/arm/src/stm32/stm32_1wire.c
index ddd9e04..98c98c3 100644
--- a/arch/arm/src/stm32/stm32_1wire.c
+++ b/arch/arm/src/stm32/stm32_1wire.c
@@ -129,14 +129,14 @@ struct stm32_1wire_config_s
struct stm32_1wire_priv_s
{
const struct stm32_1wire_config_s *config; /* Port configuration */
- volatile int refs; /* Referernce count */
- sem_t sem_excl; /* Mutual exclusion semaphore */
- sem_t sem_isr; /* Interrupt wait semaphore */
- int baud; /* Baud rate */
- const struct stm32_1wire_msg_s *msgs; /* Messages data */
- uint8_t *byte; /* Current byte */
- uint8_t bit; /* Current bit */
- volatile int result; /* Exchange result */
+ volatile int refs; /* Referernce count */
+ sem_t sem_excl; /* Mutual exclusion semaphore */
+ sem_t sem_isr; /* Interrupt wait semaphore */
+ int baud; /* Baud rate */
+ const struct stm32_1wire_msg_s *msgs; /* Messages data */
+ uint8_t *byte; /* Current byte */
+ uint8_t bit; /* Current bit */
+ volatile int result; /* Exchange result */
};
/* 1-Wire device, Instance */
@@ -151,20 +151,25 @@ struct stm32_1wire_inst_s
* Private Function Prototypes
****************************************************************************/
-static inline uint32_t stm32_1wire_in(struct stm32_1wire_priv_s *priv, int offset);
-static inline void stm32_1wire_out(struct stm32_1wire_priv_s *priv, int offset, uint32_t value);
+static inline uint32_t stm32_1wire_in(struct stm32_1wire_priv_s *priv,
+ int offset);
+static inline void stm32_1wire_out(struct stm32_1wire_priv_s *priv,
+ int offset, uint32_t value);
static int stm32_1wire_recv(struct stm32_1wire_priv_s *priv);
static void stm32_1wire_send(struct stm32_1wire_priv_s *priv, int ch);
static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv);
-static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv, bool on);
+static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
+ bool on);
static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv);
static int stm32_1wire_deinit(FAR struct stm32_1wire_priv_s *priv);
static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv);
-static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv);
-static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
+static inline void stm32_1wire_sem_destroy(
+ FAR struct stm32_1wire_priv_s *priv);
+static inline int stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv);
static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
- FAR const struct stm32_1wire_msg_s *msgs, int count);
+ FAR const struct stm32_1wire_msg_s *msgs,
+ int count);
static int stm32_1wire_isr(int irq, void *context, void *arg);
static int stm32_1wire_reset(FAR struct onewire_dev_s *dev);
static int stm32_1wire_write(FAR struct onewire_dev_s *dev,
@@ -174,7 +179,8 @@ static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
const uint8_t *txbuffer, int txbuflen,
uint8_t *rxbuffer, int rxbuflen);
-static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev, const uint8_t *bit);
+static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev,
+ const uint8_t *bit);
static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit);
/****************************************************************************
@@ -422,7 +428,8 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
* usartdiv8 = 2 * fCK / baud
*/
- usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
+ usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) /
+ priv->baud;
/* Baud rate for standard USART (SPI mode included):
*
@@ -458,8 +465,8 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
cr1 |= USART_CR1_OVER8;
}
- stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, cr1);
- stm32_1wire_out(priv, STM32_USART_BRR_OFFSET, brr);
+ stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, cr1);
+ stm32_1wire_out(priv, STM32_USART_BRR_OFFSET, brr);
#else
@@ -479,8 +486,8 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
* baud = fCK / (16 * usartdiv)
* usartdiv = fCK / (16 * baud)
*
- * Where fCK is the input clock to the peripheral (PCLK1 for USART2, 3, 4, 5
- * or PCLK2 for USART1)
+ * Where fCK is the input clock to the peripheral (PCLK1 for USART2, 3, 4,
+ * 5 or PCLK2 for USART1)
*
* First calculate (NOTE: all stand baud values are even so dividing by two
* does not lose precision):
@@ -609,9 +616,10 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
stm32_1wire_set_apb_clock(priv, true);
- /* Configure CR2 */
- /* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
- /* Set LBDIE */
+ /* Configure CR2
+ * Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits
+ * Set LBDIE
+ */
regval = stm32_1wire_in(priv, STM32_USART_CR2_OFFSET);
regval &= ~(USART_CR2_STOP_MASK | USART_CR2_CLKEN | USART_CR2_CPOL |
@@ -619,9 +627,10 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
regval |= USART_CR2_LBDIE;
stm32_1wire_out(priv, STM32_USART_CR2_OFFSET, regval);
- /* Configure CR1 */
- /* Clear TE, REm, all interrupt enable bits, PCE, PS and M */
- /* Set RXNEIE */
+ /* Configure CR1
+ * Clear TE, REm, all interrupt enable bits, PCE, PS and M
+ * Set RXNEIE
+ */
regval = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET);
regval &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_ALLINTS |
@@ -629,12 +638,14 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
regval |= USART_CR1_RXNEIE;
stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, regval);
- /* Configure CR3 */
- /* Clear CTSE, RTSE, and all interrupt enable bits */
- /* Set ONEBIT, HDSEL and EIE */
+ /* Configure CR3
+ * Clear CTSE, RTSE, and all interrupt enable bits
+ * Set ONEBIT, HDSEL and EIE
+ */
regval = stm32_1wire_in(priv, STM32_USART_CR3_OFFSET);
- regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE);
+ regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE |
+ USART_CR3_EIE);
regval |= (USART_CR3_ONEBIT | USART_CR3_HDSEL | USART_CR3_EIE);
stm32_1wire_out(priv, STM32_USART_CR3_OFFSET, regval);
@@ -735,7 +746,8 @@ static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv)
*
****************************************************************************/
-static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
+static inline void stm32_1wire_sem_destroy(
+ FAR struct stm32_1wire_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_isr);
@@ -749,9 +761,9 @@ static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
*
****************************************************************************/
-static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
+static inline int stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
{
- nxsem_wait_uninterruptible(&priv->sem_excl);
+ return nxsem_wait_uninterruptible(&priv->sem_excl);
}
/****************************************************************************
@@ -773,6 +785,7 @@ static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv)
* Description:
* Execute 1-Wire task
****************************************************************************/
+
static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
FAR const struct stm32_1wire_msg_s *msgs,
int count)
@@ -784,7 +797,11 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
/* Lock out other clients */
- stm32_1wire_sem_wait(priv);
+ ret = stm32_1wire_sem_wait(priv);
+ if (ret < 0)
+ {
+ return ret;
+ }
priv->result = ERROR;
@@ -797,6 +814,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
break;
case ONEWIRETASK_RESET:
+
/* Set baud rate */
priv->baud = RESET_BAUD;
@@ -818,6 +836,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
case ONEWIRETASK_WRITE:
case ONEWIRETASK_WRITEBIT:
+
/* Set baud rate */
priv->baud = TIMESLOT_BAUD;
@@ -829,7 +848,8 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
priv->msgs = &msgs[indx];
priv->byte = priv->msgs->buffer;
priv->bit = 0;
- stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
+ stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ?
+ WRITE_TX1 : WRITE_TX0);
leave_critical_section(irqs);
/* Wait. Break on timeout if TX line closed to GND */
@@ -841,6 +861,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
case ONEWIRETASK_READ:
case ONEWIRETASK_READBIT:
+
/* Set baud rate */
priv->baud = TIMESLOT_BAUD;
@@ -936,7 +957,8 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
/* Send next bit */
- stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
+ stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ?
+ WRITE_TX1 : WRITE_TX0);
break;
case ONEWIRETASK_READ:
@@ -1056,8 +1078,8 @@ static int stm32_1wire_reset(FAR struct onewire_dev_s *dev)
*
****************************************************************************/
-static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffer,
- int buflen)
+static int stm32_1wire_write(FAR struct onewire_dev_s *dev,
+ const uint8_t *buffer, int buflen)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
const struct stm32_1wire_msg_s msgs[1] =
@@ -1078,7 +1100,8 @@ static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffe
*
****************************************************************************/
-static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int buflen)
+static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
+ int buflen)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
const struct stm32_1wire_msg_s msgs[1] =
@@ -1104,7 +1127,6 @@ static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int
static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
const uint8_t *txbuffer, int txbuflen,
uint8_t *rxbuffer, int rxbuflen)
-
{
int result = ERROR;
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
@@ -1141,6 +1163,7 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
result = stm32_1wire_process(priv, msgs, 2);
}
+
return result;
}
@@ -1152,7 +1175,8 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
*
****************************************************************************/
-static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev, const uint8_t *bit)
+static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev,
+ const uint8_t *bit)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
const struct stm32_1wire_msg_s msgs[1] =
@@ -1196,7 +1220,7 @@ static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit)
* Name: stm32_1wireinitialize
*
* Description:
- * Initialize the selected 1-Wire port. And return a unique instance of struct
+ * Initialize the selected 1-Wire port. And return a unique instance of
* struct onewire_dev_s. This function may be called to obtain multiple
* instances of the interface, each of which may be set up with a
* different frequency and slave address.
diff --git a/arch/arm/src/stm32l4/stm32l4_1wire.c b/arch/arm/src/stm32l4/stm32l4_1wire.c
index d9478f4..d615e57 100644
--- a/arch/arm/src/stm32l4/stm32l4_1wire.c
+++ b/arch/arm/src/stm32l4/stm32l4_1wire.c
@@ -122,16 +122,16 @@ struct stm32_1wire_config_s
struct stm32_1wire_priv_s
{
const struct stm32_1wire_config_s *config; /* Port configuration */
- volatile int refs; /* Referernce count */
- sem_t sem_excl; /* Mutual exclusion semaphore */
- sem_t sem_isr; /* Interrupt wait semaphore */
- int baud; /* Baud rate */
- const struct stm32_1wire_msg_s *msgs; /* Messages data */
- uint8_t *byte; /* Current byte */
- uint8_t bit; /* Current bit */
- volatile int result; /* Exchange result */
+ volatile int refs; /* Referernce count */
+ sem_t sem_excl; /* Mutual exclusion semaphore */
+ sem_t sem_isr; /* Interrupt wait semaphore */
+ int baud; /* Baud rate */
+ const struct stm32_1wire_msg_s *msgs; /* Messages data */
+ uint8_t *byte; /* Current byte */
+ uint8_t bit; /* Current bit */
+ volatile int result; /* Exchange result */
#ifdef CONFIG_PM
- struct pm_callback_s pm_cb; /* PM callbacks */
+ struct pm_callback_s pm_cb; /* PM callbacks */
#endif
};
@@ -159,8 +159,9 @@ static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv,
static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv);
static int stm32_1wire_deinit(FAR struct stm32_1wire_priv_s *priv);
static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv);
-static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv);
-static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
+static inline void stm32_1wire_sem_destroy(
+ FAR struct stm32_1wire_priv_s *priv);
+static inline int stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv);
static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv);
static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
FAR const struct stm32_1wire_msg_s *msgs,
@@ -174,7 +175,8 @@ static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
const uint8_t *txbuffer, int txbuflen,
uint8_t *rxbuffer, int rxbuflen);
-static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev, const uint8_t *bit);
+static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev,
+ const uint8_t *bit);
static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit);
#ifdef CONFIG_PM
static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
@@ -397,7 +399,8 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
* usartdiv8 = 2 * fCK / baud
*/
- usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) / priv->baud;
+ usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) /
+ priv->baud;
/* Baud rate for standard USART (SPI mode included):
*
@@ -432,13 +435,13 @@ static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv)
cr1 |= USART_CR1_OVER8;
}
- stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, cr1);
- stm32_1wire_out(priv, STM32L4_USART_BRR_OFFSET, brr);
+ stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, cr1);
+ stm32_1wire_out(priv, STM32L4_USART_BRR_OFFSET, brr);
- if (enabled)
- {
- stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, cr1 | USART_CR1_UE);
- }
+ if (enabled)
+ {
+ stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, cr1 | USART_CR1_UE);
+ }
}
/****************************************************************************
@@ -533,9 +536,10 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
stm32_1wire_set_apb_clock(priv, true);
- /* Configure CR2 */
- /* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */
- /* Set LBDIE */
+ /* Configure CR2
+ * Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits
+ * Set LBDIE
+ */
regval = stm32_1wire_in(priv, STM32L4_USART_CR2_OFFSET);
regval &= ~(USART_CR2_STOP_MASK | USART_CR2_CLKEN | USART_CR2_CPOL |
@@ -543,9 +547,10 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
regval |= USART_CR2_LBDIE;
stm32_1wire_out(priv, STM32L4_USART_CR2_OFFSET, regval);
- /* Configure CR1 */
- /* Clear TE, REm, all interrupt enable bits, PCE, PS and M */
- /* Set RXNEIE */
+ /* Configure CR1
+ * Clear TE, REm, all interrupt enable bits, PCE, PS and M
+ * Set RXNEIE
+ */
regval = stm32_1wire_in(priv, STM32L4_USART_CR1_OFFSET);
regval &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_ALLINTS |
@@ -553,12 +558,14 @@ static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv)
regval |= USART_CR1_RXNEIE;
stm32_1wire_out(priv, STM32L4_USART_CR1_OFFSET, regval);
- /* Configure CR3 */
- /* Clear CTSE, RTSE, and all interrupt enable bits */
- /* Set ONEBIT, HDSEL and EIE */
+ /* Configure CR3
+ * Clear CTSE, RTSE, and all interrupt enable bits
+ * Set ONEBIT, HDSEL and EIE
+ */
regval = stm32_1wire_in(priv, STM32L4_USART_CR3_OFFSET);
- regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE);
+ regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE |
+ USART_CR3_EIE);
regval |= (USART_CR3_ONEBIT | USART_CR3_HDSEL | USART_CR3_EIE);
stm32_1wire_out(priv, STM32L4_USART_CR3_OFFSET, regval);
@@ -659,7 +666,8 @@ static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv)
*
****************************************************************************/
-static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
+static inline void stm32_1wire_sem_destroy(
+ FAR struct stm32_1wire_priv_s *priv)
{
nxsem_destroy(&priv->sem_excl);
nxsem_destroy(&priv->sem_isr);
@@ -673,9 +681,9 @@ static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv)
*
****************************************************************************/
-static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
+static int void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv)
{
- nxsem_wait_uninterruptible(&priv->sem_excl);
+ return nxsem_wait_uninterruptible(&priv->sem_excl);
}
/****************************************************************************
@@ -709,7 +717,11 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
/* Lock out other clients */
- stm32_1wire_sem_wait(priv);
+ ret = stm32_1wire_sem_wait(priv);
+ if (ret < 0)
+ {
+ return ret;
+ }
priv->result = ERROR;
@@ -722,6 +734,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
break;
case ONEWIRETASK_RESET:
+
/* Set baud rate */
priv->baud = RESET_BAUD;
@@ -743,6 +756,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
case ONEWIRETASK_WRITE:
case ONEWIRETASK_WRITEBIT:
+
/* Set baud rate */
priv->baud = TIMESLOT_BAUD;
@@ -754,7 +768,8 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
priv->msgs = &msgs[indx];
priv->byte = priv->msgs->buffer;
priv->bit = 0;
- stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
+ stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ?
+ WRITE_TX1 : WRITE_TX0);
leave_critical_section(irqs);
/* Wait. Break on timeout if TX line closed to GND */
@@ -766,6 +781,7 @@ static int stm32_1wire_process(struct stm32_1wire_priv_s *priv,
case ONEWIRETASK_READ:
case ONEWIRETASK_READBIT:
+
/* Set baud rate */
priv->baud = TIMESLOT_BAUD;
@@ -850,7 +866,11 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
if (++priv->bit >= 8)
{
priv->bit = 0;
- if (++priv->byte >= (priv->msgs->buffer + priv->msgs->buflen)) /* Done? */
+
+ /* Done? */
+
+ if (++priv->byte >=
+ (priv->msgs->buffer + priv->msgs->buflen))
{
priv->msgs = NULL;
priv->result = OK;
@@ -861,7 +881,8 @@ static int stm32_1wire_isr(int irq, void *context, void *arg)
/* Send next bit */
- stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0);
+ stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ?
+ WRITE_TX1 : WRITE_TX0);
break;
case ONEWIRETASK_READ:
@@ -968,8 +989,9 @@ static int stm32_1wire_reset(FAR struct onewire_dev_s *dev)
*
****************************************************************************/
-static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffer,
- int buflen)
+static int stm32_1wire_write(FAR struct onewire_dev_s *dev,
+ const uint8_t *buffer,
+ int buflen)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
const struct stm32_1wire_msg_s msgs[1] =
@@ -990,7 +1012,8 @@ static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffe
*
****************************************************************************/
-static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int buflen)
+static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer,
+ int buflen)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
const struct stm32_1wire_msg_s msgs[1] =
@@ -1016,7 +1039,6 @@ static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int
static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
FAR const uint8_t *txbuffer, int txbuflen,
FAR uint8_t *rxbuffer, int rxbuflen)
-
{
int result = ERROR;
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
@@ -1053,6 +1075,7 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
result = stm32_1wire_process(priv, msgs, 2);
}
+
return result;
}
@@ -1064,7 +1087,8 @@ static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset,
*
****************************************************************************/
-static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev, const uint8_t *bit)
+static int stm32_1wire_writebit(FAR struct onewire_dev_s *dev,
+ const uint8_t *bit)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
const struct stm32_1wire_msg_s msgs[1] =
@@ -1100,7 +1124,7 @@ static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit)
return stm32_1wire_process(priv, msgs, 1);
}
-/************************************************************************************
+/****************************************************************************
* Name: stm32_1wire_pm_prepare
*
* Description:
@@ -1127,7 +1151,7 @@ static int stm32_1wire_readbit(FAR struct onewire_dev_s *dev, uint8_t *bit)
* power state change). Drivers are not permitted to return non-zero
* values when reverting back to higher power consumption modes!
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_PM
static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
@@ -1135,7 +1159,7 @@ static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
{
struct stm32_1wire_priv_s *priv =
(struct stm32_1wire_priv_s *)((char *)cb -
- offsetof(struct stm32_1wire_priv_s, pm_cb));
+ offsetof(struct stm32_1wire_priv_s, pm_cb));
int sval;
/* Logic to prepare for a reduced power state goes here. */
@@ -1148,6 +1172,7 @@ static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
case PM_STANDBY:
case PM_SLEEP:
+
/* Check if exclusive lock for 1-Wire bus is held. */
if (nxsem_getvalue(&priv->sem_excl, &sval) < 0)
@@ -1166,6 +1191,7 @@ static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
break;
default:
+
/* Should not get here */
break;
@@ -1183,7 +1209,7 @@ static int stm32_1wire_pm_prepare(FAR struct pm_callback_s *cb, int domain,
* Name: stm32l4_1wireinitialize
*
* Description:
- * Initialize the selected 1-Wire port. And return a unique instance of struct
+ * Initialize the selected 1-Wire port. And return a unique instance of
* struct onewire_dev_s. This function may be called to obtain multiple
* instances of the interface, each of which may be set up with a
* different frequency and slave address.