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Posted to commits@tvm.apache.org by GitBox <gi...@apache.org> on 2022/07/29 15:55:03 UTC
[GitHub] [tvm] tkonolige commented on a diff in pull request #12205: [ROOFLINE] Add CUDA support to roofline analysis
tkonolige commented on code in PR #12205:
URL: https://github.com/apache/tvm/pull/12205#discussion_r933410021
##########
python/tvm/utils/roofline/cuda.py:
##########
@@ -0,0 +1,232 @@
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+"""Estimation of peak flops and memory bandwidth for cuda devices"""
+from typing import Optional
+from ...script import tir as T
+from ... import nd, build, transform
+from ...runtime import Device
+from ...target import Target
+from ...rpc.base import RPC_SESS_MASK
+from ...rpc.client import RPCSession
+from . import registry
+from ...contrib import utils
+
+
+@registry.estimate_peak_flops.register("cuda")
+def estimate_peak_flops_tensorcore(
+ target: Target,
+ dev: Device,
+ remote: Optional[RPCSession],
+ mat_dtype: str = "float16",
+ acc_dtype: str = "float32",
+) -> float:
+ """Estimate the peak FLOP/s of a cuda device with tensorcores.
+
+ This estimate should only be used to compare with operators that can use
+ dense tensorcore mma instructions.
+
+ References
+ ----------
+ Wei Sun, Ang Li, Tong Geng, Sander Stuijk, Henk Corporaal: "Dissecting
+ Tensor Cores via Microbenchmarks: Latency, Throughput and Numerical
+ Behaviors", 2022; http://arxiv.org/abs/2206.02874
+ https://www.nvidia.com/content/PDF/nvidia-ampere-ga-102-gpu-architecture-whitepaper-v2.1.pdf
+
+ Parameters
+ ----------
+ target : Target
+ Target to run on. This should be as specific to the actual hardware as
+ possible to make sure that LLVM generates the best vector code.
+ dev : Device
+ Device to run on.
+ remote : Optional[RPCSession]
+ Remote session used to upload artifacts for runtime evaluation. Must be
+ the same session used to create `dev`.
+ mat_dtype : str
+ Dtype of matrices passed to mma instructions.
+ acc_dtype : str
+ Dtype of accumulator to use with mma instructions. Should be compatible
+ with `mat_dtype`.
+
+ Returns
+ -------
+ float
+ Approximate sustained FLOP/s of this target/device combo assuming
+ mma instructions. Addition and multiplications are each counted as
+ separate FLOPs.
+ """
+ assert str(target.kind) == "cuda", "Only CUDA devices have tensorcores"
+
+ @T.prim_func
+ def peak_flops_tensorcore_tir(
Review Comment:
Yes I'd like to but I figured this would be a good first step.
##########
python/tvm/utils/roofline/cuda.py:
##########
@@ -0,0 +1,232 @@
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+"""Estimation of peak flops and memory bandwidth for cuda devices"""
+from typing import Optional
+from ...script import tir as T
+from ... import nd, build, transform
+from ...runtime import Device
+from ...target import Target
+from ...rpc.base import RPC_SESS_MASK
+from ...rpc.client import RPCSession
+from . import registry
+from ...contrib import utils
+
+
+@registry.estimate_peak_flops.register("cuda")
+def estimate_peak_flops_tensorcore(
+ target: Target,
+ dev: Device,
+ remote: Optional[RPCSession],
+ mat_dtype: str = "float16",
+ acc_dtype: str = "float32",
+) -> float:
+ """Estimate the peak FLOP/s of a cuda device with tensorcores.
+
+ This estimate should only be used to compare with operators that can use
+ dense tensorcore mma instructions.
+
+ References
+ ----------
+ Wei Sun, Ang Li, Tong Geng, Sander Stuijk, Henk Corporaal: "Dissecting
+ Tensor Cores via Microbenchmarks: Latency, Throughput and Numerical
+ Behaviors", 2022; http://arxiv.org/abs/2206.02874
+ https://www.nvidia.com/content/PDF/nvidia-ampere-ga-102-gpu-architecture-whitepaper-v2.1.pdf
+
+ Parameters
+ ----------
+ target : Target
+ Target to run on. This should be as specific to the actual hardware as
+ possible to make sure that LLVM generates the best vector code.
Review Comment:
done
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