You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by je...@apache.org on 2023/07/27 09:34:16 UTC
[nuttx] branch master updated: arch: move [enter|leave]_critical_section
This is an automated email from the ASF dual-hosted git repository.
jerpelea pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 68187b68af arch: move [enter|leave]_critical_section
68187b68af is described below
commit 68187b68afbc209a794cb1d686dc8c14d895468c
Author: hujun5 <hu...@xiaomi.com>
AuthorDate: Thu May 25 09:00:30 2023 +0800
arch: move [enter|leave]_critical_section
move [enter|leave]_critical_section to the same place for easy to understand
and call matching
Signed-off-by: hujun5 <hu...@xiaomi.com>
---
arch/arm/src/armv6-m/arm_schedulesigaction.c | 14 --------------
arch/arm/src/armv6-m/arm_sigdeliver.c | 6 ++++++
arch/arm/src/armv7-a/arm_schedulesigaction.c | 14 --------------
arch/arm/src/armv7-a/arm_sigdeliver.c | 6 ++++++
arch/arm/src/armv7-m/arm_schedulesigaction.c | 14 --------------
arch/arm/src/armv7-m/arm_sigdeliver.c | 10 ++++++++++
arch/arm/src/armv7-r/arm_schedulesigaction.c | 14 --------------
arch/arm/src/armv7-r/arm_sigdeliver.c | 6 ++++++
arch/arm/src/armv8-m/arm_schedulesigaction.c | 14 --------------
arch/arm/src/armv8-m/arm_sigdeliver.c | 10 ++++++++++
arch/arm64/src/common/arm64_schedulesigaction.c | 14 --------------
arch/arm64/src/common/arm64_sigdeliver.c | 5 +++++
arch/risc-v/src/common/riscv_schedulesigaction.c | 14 --------------
arch/risc-v/src/common/riscv_sigdeliver.c | 6 ++++++
arch/sparc/src/sparc_v8/sparc_v8_schedulesigaction.c | 14 --------------
arch/sparc/src/sparc_v8/sparc_v8_sigdeliver.c | 6 ++++++
arch/xtensa/src/common/xtensa_schedsigaction.c | 14 --------------
arch/xtensa/src/common/xtensa_sigdeliver.c | 6 ++++++
18 files changed, 61 insertions(+), 126 deletions(-)
diff --git a/arch/arm/src/armv6-m/arm_schedulesigaction.c b/arch/arm/src/armv6-m/arm_schedulesigaction.c
index 3cc3339484..a9c25d883d 100644
--- a/arch/arm/src/armv6-m/arm_schedulesigaction.c
+++ b/arch/arm/src/armv6-m/arm_schedulesigaction.c
@@ -351,13 +351,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
@@ -403,13 +396,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
diff --git a/arch/arm/src/armv6-m/arm_sigdeliver.c b/arch/arm/src/armv6-m/arm_sigdeliver.c
index 5150c86f2b..ee01587014 100644
--- a/arch/arm/src/armv6-m/arm_sigdeliver.c
+++ b/arch/arm/src/armv6-m/arm_sigdeliver.c
@@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/
int16_t saved_irqcount;
+
+ enter_critical_section();
#endif
board_autoled_on(LED_SIGNAL);
@@ -154,6 +156,10 @@ retry:
board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+ leave_critical_section((uint16_t)regs[REG_PRIMASK]);
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
diff --git a/arch/arm/src/armv7-a/arm_schedulesigaction.c b/arch/arm/src/armv7-a/arm_schedulesigaction.c
index 95a13e1caa..2535d53625 100644
--- a/arch/arm/src/armv7-a/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-a/arm_schedulesigaction.c
@@ -349,13 +349,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
@@ -401,13 +394,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
diff --git a/arch/arm/src/armv7-a/arm_sigdeliver.c b/arch/arm/src/armv7-a/arm_sigdeliver.c
index 6dfd9044d1..95b19259a1 100644
--- a/arch/arm/src/armv7-a/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-a/arm_sigdeliver.c
@@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/
int16_t saved_irqcount;
+
+ enter_critical_section();
#endif
board_autoled_on(LED_SIGNAL);
@@ -152,6 +154,10 @@ retry:
board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+ leave_critical_section(regs[REG_CPSR]);
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
diff --git a/arch/arm/src/armv7-m/arm_schedulesigaction.c b/arch/arm/src/armv7-m/arm_schedulesigaction.c
index 3229d2c6fa..70f90e1be5 100644
--- a/arch/arm/src/armv7-m/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-m/arm_schedulesigaction.c
@@ -368,13 +368,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
@@ -420,13 +413,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
diff --git a/arch/arm/src/armv7-m/arm_sigdeliver.c b/arch/arm/src/armv7-m/arm_sigdeliver.c
index b7e80fda55..414d6272bb 100644
--- a/arch/arm/src/armv7-m/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-m/arm_sigdeliver.c
@@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/
int16_t saved_irqcount;
+
+ enter_critical_section();
#endif
board_autoled_on(LED_SIGNAL);
@@ -158,6 +160,14 @@ retry:
board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+#ifdef CONFIG_ARMV7M_USEBASEPRI
+ leave_critical_section((uint8_t)regs[REG_BASEPRI]);
+#else
+ leave_critical_section((uint16_t)regs[REG_PRIMASK]);
+#endif
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
diff --git a/arch/arm/src/armv7-r/arm_schedulesigaction.c b/arch/arm/src/armv7-r/arm_schedulesigaction.c
index 2a11c866a8..066fcf4512 100644
--- a/arch/arm/src/armv7-r/arm_schedulesigaction.c
+++ b/arch/arm/src/armv7-r/arm_schedulesigaction.c
@@ -352,13 +352,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
@@ -404,13 +397,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
diff --git a/arch/arm/src/armv7-r/arm_sigdeliver.c b/arch/arm/src/armv7-r/arm_sigdeliver.c
index a1e409faf1..b1504103a7 100644
--- a/arch/arm/src/armv7-r/arm_sigdeliver.c
+++ b/arch/arm/src/armv7-r/arm_sigdeliver.c
@@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/
int16_t saved_irqcount;
+
+ enter_critical_section();
#endif
board_autoled_on(LED_SIGNAL);
@@ -149,6 +151,10 @@ retry:
board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+ leave_critical_section(regs[REG_CPSR]);
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
diff --git a/arch/arm/src/armv8-m/arm_schedulesigaction.c b/arch/arm/src/armv8-m/arm_schedulesigaction.c
index 75a7272868..7459c7b578 100644
--- a/arch/arm/src/armv8-m/arm_schedulesigaction.c
+++ b/arch/arm/src/armv8-m/arm_schedulesigaction.c
@@ -368,13 +368,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* In an SMP configuration, the interrupt disable logic also
* involves spinlocks that are configured per the TCB irqcount
* field. This is logically equivalent to
@@ -424,13 +417,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
diff --git a/arch/arm/src/armv8-m/arm_sigdeliver.c b/arch/arm/src/armv8-m/arm_sigdeliver.c
index 1ef5c33d1b..e41baa02a8 100644
--- a/arch/arm/src/armv8-m/arm_sigdeliver.c
+++ b/arch/arm/src/armv8-m/arm_sigdeliver.c
@@ -63,6 +63,8 @@ void arm_sigdeliver(void)
*/
int16_t saved_irqcount;
+
+ enter_critical_section();
#endif
board_autoled_on(LED_SIGNAL);
@@ -158,6 +160,14 @@ retry:
board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+#ifdef CONFIG_ARMV8M_USEBASEPRI
+ leave_critical_section((uint8_t)regs[REG_BASEPRI]);
+#else
+ leave_critical_section((uint16_t)regs[REG_PRIMASK]);
+#endif
rtcb->irqcount--;
#endif
arm_fullcontextrestore(regs);
diff --git a/arch/arm64/src/common/arm64_schedulesigaction.c b/arch/arm64/src/common/arm64_schedulesigaction.c
index 051d3f1059..255a564e42 100644
--- a/arch/arm64/src/common/arm64_schedulesigaction.c
+++ b/arch/arm64/src/common/arm64_schedulesigaction.c
@@ -310,13 +310,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
CURRENT_REGS = tcb->xcp.regs;
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
@@ -353,13 +346,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* create signal process context */
arm64_init_signal_process(tcb, NULL);
-
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
}
}
}
diff --git a/arch/arm64/src/common/arm64_sigdeliver.c b/arch/arm64/src/common/arm64_sigdeliver.c
index 36de66243b..c3249aa6be 100644
--- a/arch/arm64/src/common/arm64_sigdeliver.c
+++ b/arch/arm64/src/common/arm64_sigdeliver.c
@@ -71,6 +71,7 @@ void arm64_sigdeliver(void)
struct regs_context *pctx =
(struct regs_context *)rtcb->xcp.saved_reg;
flags = (pctx->spsr & SPSR_DAIF_MASK);
+ enter_critical_section();
#endif
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
@@ -163,6 +164,10 @@ retry:
/* Then restore the correct state for this thread of execution. */
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+ leave_critical_section(flags);
rtcb->irqcount--;
#endif
arm64_fullcontextrestore(rtcb->xcp.regs);
diff --git a/arch/risc-v/src/common/riscv_schedulesigaction.c b/arch/risc-v/src/common/riscv_schedulesigaction.c
index 5d33230efa..6776cbc9f3 100644
--- a/arch/risc-v/src/common/riscv_schedulesigaction.c
+++ b/arch/risc-v/src/common/riscv_schedulesigaction.c
@@ -359,13 +359,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
CURRENT_REGS[REG_INT_CTX] = int_ctx;
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
@@ -411,13 +404,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_SP] = (uintptr_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
diff --git a/arch/risc-v/src/common/riscv_sigdeliver.c b/arch/risc-v/src/common/riscv_sigdeliver.c
index c5c61cd9ca..c9c84e65e5 100644
--- a/arch/risc-v/src/common/riscv_sigdeliver.c
+++ b/arch/risc-v/src/common/riscv_sigdeliver.c
@@ -64,6 +64,8 @@ void riscv_sigdeliver(void)
*/
int16_t saved_irqcount;
+
+ enter_critical_section();
#endif
board_autoled_on(LED_SIGNAL);
@@ -153,6 +155,10 @@ retry:
board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+ leave_critical_section(regs[REG_INT_CTX]);
rtcb->irqcount--;
#endif
riscv_fullcontextrestore(regs);
diff --git a/arch/sparc/src/sparc_v8/sparc_v8_schedulesigaction.c b/arch/sparc/src/sparc_v8/sparc_v8_schedulesigaction.c
index ad895fc121..3b91aac9ef 100644
--- a/arch/sparc/src/sparc_v8/sparc_v8_schedulesigaction.c
+++ b/arch/sparc/src/sparc_v8/sparc_v8_schedulesigaction.c
@@ -297,13 +297,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
sparc_savestate(tcb->xcp.regs);
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
@@ -336,13 +329,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.saved_npc = CURRENT_REGS[REG_NPC];
tcb->xcp.saved_status = CURRENT_REGS[REG_PSR];
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* Then set up to vector to the trampoline with interrupts
* disabled. We must already be in privileged thread mode to be
* here.
diff --git a/arch/sparc/src/sparc_v8/sparc_v8_sigdeliver.c b/arch/sparc/src/sparc_v8/sparc_v8_sigdeliver.c
index 411a7b05f5..4c6f4295b6 100644
--- a/arch/sparc/src/sparc_v8/sparc_v8_sigdeliver.c
+++ b/arch/sparc/src/sparc_v8/sparc_v8_sigdeliver.c
@@ -72,6 +72,8 @@ void sparc_sigdeliver(void)
*/
int16_t saved_irqcount;
+
+ enter_critical_section();
#endif
board_autoled_on(LED_SIGNAL);
@@ -203,6 +205,10 @@ retry:
board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+ leave_critical_section((regs[REG_PSR]));
rtcb->irqcount--;
#endif
sparc_fullcontextrestore(regs);
diff --git a/arch/xtensa/src/common/xtensa_schedsigaction.c b/arch/xtensa/src/common/xtensa_schedsigaction.c
index 545176c59c..1e37da883e 100644
--- a/arch/xtensa/src/common/xtensa_schedsigaction.c
+++ b/arch/xtensa/src/common/xtensa_schedsigaction.c
@@ -391,13 +391,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
#endif
}
- /* Increment the IRQ lock count so that when the task is
- * restarted, it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* NOTE: If the task runs on another CPU(cpu), adjusting
* global IRQ controls will be done in the pause handler
* on the CPU(cpu) by taking a critical section.
@@ -442,13 +435,6 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
tcb->xcp.regs[REG_A1] = (uint32_t)tcb->xcp.regs +
XCPTCONTEXT_SIZE;
- /* Increment the IRQ lock count so that when the task is restarted,
- * it will hold the IRQ spinlock.
- */
-
- DEBUGASSERT(tcb->irqcount < INT16_MAX);
- tcb->irqcount++;
-
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
diff --git a/arch/xtensa/src/common/xtensa_sigdeliver.c b/arch/xtensa/src/common/xtensa_sigdeliver.c
index 9443ad4afa..39b9dab832 100644
--- a/arch/xtensa/src/common/xtensa_sigdeliver.c
+++ b/arch/xtensa/src/common/xtensa_sigdeliver.c
@@ -63,6 +63,8 @@ void xtensa_sig_deliver(void)
*/
int16_t saved_irqcount;
+
+ enter_critical_section();
#endif
board_autoled_on(LED_SIGNAL);
@@ -151,6 +153,10 @@ retry:
board_autoled_off(LED_SIGNAL);
#ifdef CONFIG_SMP
+ /* We need to keep the IRQ lock until task switching */
+
+ rtcb->irqcount++;
+ leave_critical_section((regs[REG_PS]));
rtcb->irqcount--;
#endif
xtensa_context_restore(regs);