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Posted to commits@mynewt.apache.org by we...@apache.org on 2017/03/23 22:48:37 UTC

incubator-mynewt-core git commit: No jira ticket for this change. The structure used for spi configuration was not changed in all the bsps for the nrf51. This fixes that oversight.

Repository: incubator-mynewt-core
Updated Branches:
  refs/heads/develop 22e0edd10 -> b35132ffe


No jira ticket for this change. The structure used for spi configuration
was not changed in all the bsps for the nrf51. This fixes that oversight.


Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo
Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/b35132ff
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/b35132ff
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/b35132ff

Branch: refs/heads/develop
Commit: b35132ffe4c1d7807e70769fabbd3456312d6605
Parents: 22e0edd
Author: William San Filippo <wi...@runtime.io>
Authored: Thu Mar 23 15:47:40 2017 -0700
Committer: William San Filippo <wi...@runtime.io>
Committed: Thu Mar 23 15:48:32 2017 -0700

----------------------------------------------------------------------
 hw/bsp/bbc_microbit/src/hal_bsp.c    | 4 ++--
 hw/bsp/nrf51-blenano/src/hal_bsp.c   | 4 ++--
 hw/bsp/nrf51dk-16kbram/src/hal_bsp.c | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)
----------------------------------------------------------------------


http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/b35132ff/hw/bsp/bbc_microbit/src/hal_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/bbc_microbit/src/hal_bsp.c b/hw/bsp/bbc_microbit/src/hal_bsp.c
index 23f5c84..3f47f78 100644
--- a/hw/bsp/bbc_microbit/src/hal_bsp.c
+++ b/hw/bsp/bbc_microbit/src/hal_bsp.c
@@ -50,7 +50,7 @@ static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
  * NOTE: Our HAL expects that the SS pin, if used, is treated as a gpio line
  * and is handled outside the SPI routines.
  */
-static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+static const struct nrf51_hal_spi_cfg os_bsp_spi0m_cfg = {
     .sck_pin      = 29,
     .mosi_pin     = 25,
     .miso_pin     = 28
@@ -58,7 +58,7 @@ static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
 #endif
 
 #if MYNEWT_VAL(SPI_1_SLAVE)
-static const nrf_drv_spis_config_t os_bsp_spi1s_cfg = {
+static const struct nrf51_hal_spi_cfg os_bsp_spi1s_cfg = {
     .sck_pin      = 29,
     .mosi_pin     = 25,
     .miso_pin     = 28,

http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/b35132ff/hw/bsp/nrf51-blenano/src/hal_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51-blenano/src/hal_bsp.c b/hw/bsp/nrf51-blenano/src/hal_bsp.c
index 23f5c84..3f47f78 100644
--- a/hw/bsp/nrf51-blenano/src/hal_bsp.c
+++ b/hw/bsp/nrf51-blenano/src/hal_bsp.c
@@ -50,7 +50,7 @@ static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
  * NOTE: Our HAL expects that the SS pin, if used, is treated as a gpio line
  * and is handled outside the SPI routines.
  */
-static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+static const struct nrf51_hal_spi_cfg os_bsp_spi0m_cfg = {
     .sck_pin      = 29,
     .mosi_pin     = 25,
     .miso_pin     = 28
@@ -58,7 +58,7 @@ static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
 #endif
 
 #if MYNEWT_VAL(SPI_1_SLAVE)
-static const nrf_drv_spis_config_t os_bsp_spi1s_cfg = {
+static const struct nrf51_hal_spi_cfg os_bsp_spi1s_cfg = {
     .sck_pin      = 29,
     .mosi_pin     = 25,
     .miso_pin     = 28,

http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/b35132ff/hw/bsp/nrf51dk-16kbram/src/hal_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/nrf51dk-16kbram/src/hal_bsp.c b/hw/bsp/nrf51dk-16kbram/src/hal_bsp.c
index 5db6490..366b060 100644
--- a/hw/bsp/nrf51dk-16kbram/src/hal_bsp.c
+++ b/hw/bsp/nrf51dk-16kbram/src/hal_bsp.c
@@ -49,7 +49,7 @@ static const struct nrf51_uart_cfg os_bsp_uart0_cfg = {
  * NOTE: Our HAL expects that the SS pin, if used, is treated as a gpio line
  * and is handled outside the SPI routines.
  */
-static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
+static const struct  nrf51_hal_spi_cfg os_bsp_spi0m_cfg = {
     .sck_pin      = 29,
     .mosi_pin     = 25,
     .miso_pin     = 28
@@ -57,7 +57,7 @@ static const nrf_drv_spi_config_t os_bsp_spi0m_cfg = {
 #endif
 
 #if MYNEWT_VAL(SPI_1_SLAVE)
-static const nrf_drv_spis_config_t os_bsp_spi1s_cfg = {
+static const struct nrf51_hal_spi_cfg os_bsp_spi1s_cfg = {
     .sck_pin      = 29,
     .mosi_pin     = 25,
     .miso_pin     = 28,