[GitHub] [nuttx] pussuw commented on issue #8602: RISC-V32 MMU Implementation

["pussuw (via GitHub)" <gi...@apache.org>]

pussuw commented on issue #8602:
URL: https://github.com/apache/nuttx/issues/8602#issuecomment-1438726919

   The implementation I need is 64-bit only so at least I don't plan to do / will not do anything regarding riscv32.
   
   But it should be pretty easy to extend the implementation for other SvXX types also (including Sv32). I intentionally wrote the driver keeping scalability for other architectures in mind.
   
   In theory you only need to do the above definitions for Sv32 and the implementation "should work". Might be a good idea to check the macros outside of that #ifdef as well. Obviously this has never been tested with Sv32 but I use the Sv39 implementation daily and it works just fine.
   
   When I did the implementation riscv32 and riscv64 had separate implementations, which were merged into one later. So the driver and the public interface might not be 100% compatible with Sv32 as-is.
   
   The most important document obviously is the riscv privileged specification which tells you how the address translations work.
   
   Please do keep in mind that when running riscv in supervisor mode you need some sort of SBI implementation. That implementation is out-of-scope here and you need to choose and integrate it yourself.


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