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Posted to commits@nuttx.apache.org by xi...@apache.org on 2020/03/31 06:31:37 UTC
[incubator-nuttx] branch master updated (80c0597 -> b9bf9c9)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 80c0597 sim: enable CONFIG_TESTING_OSTEST_POWEROFF in ostest config
new 18d3fa9 xtensa: Save PS correctly in syscall handler
new d2a6e56 xtensa: Save PS correctly in double exception handler
new b9bf9c9 xtensa: Save PS correctly in coproc handler
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/xtensa/src/common/xtensa_user_handler.S | 6 +++---
arch/xtensa/src/common/xtensa_vectors.S | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
[incubator-nuttx] 02/03: xtensa: Save PS correctly in double
exception handler
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit d2a6e56308e92475d33d1052f8be61248165ea4c
Author: YAMAMOTO Takashi <ya...@midokura.com>
AuthorDate: Tue Mar 31 13:09:18 2020 +0900
xtensa: Save PS correctly in double exception handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
---
arch/xtensa/src/common/xtensa_vectors.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/xtensa/src/common/xtensa_vectors.S b/arch/xtensa/src/common/xtensa_vectors.S
index 9dfc486..b87a111 100644
--- a/arch/xtensa/src/common/xtensa_vectors.S
+++ b/arch/xtensa/src/common/xtensa_vectors.S
@@ -276,7 +276,7 @@ _double_exception_vector:
mov a0, sp /* sp == a1 */
addi sp, sp, -(4 * XCPTCONTEXT_SIZE) /* Allocate interrupt stack frame */
s32i a0, sp, (4 * REG_A1) /* Save pre-interrupt SP */
- rsr a0, EPS /* Save interruptee's PS -- REVISIT */
+ rsr a0, PS /* Save interruptee's PS -- REVISIT */
s32i a0, sp, (4 * REG_PS)
rsr a0, DEPC /* Save interruptee's PC */
s32i a0, sp, (4 * REG_PC)
@@ -318,7 +318,7 @@ _kernel_exception_vector:
mov a0, sp /* sp == a1 */
addi sp, sp, -(4 * XCPTCONTEXT_SIZE) /* Allocate interrupt stack frame */
s32i a0, sp, (4 * REG_A1) /* Save pre-interrupt SP */
- rsr a0, EPS /* Save interruptee's PS */
+ rsr a0, PS /* Save interruptee's PS */
s32i a0, sp, (4 * REG_PS)
rsr a0, EPC_1 /* Save interruptee's PC */
s32i a0, sp, (4 * REG_PC)
[incubator-nuttx] 03/03: xtensa: Save PS correctly in coproc handler
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit b9bf9c9a2bb552cc1f630a8b4e777a51bb02da43
Author: YAMAMOTO Takashi <ya...@midokura.com>
AuthorDate: Tue Mar 31 13:10:11 2020 +0900
xtensa: Save PS correctly in coproc handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
---
arch/xtensa/src/common/xtensa_user_handler.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/xtensa/src/common/xtensa_user_handler.S b/arch/xtensa/src/common/xtensa_user_handler.S
index d14c629..bc01f53 100644
--- a/arch/xtensa/src/common/xtensa_user_handler.S
+++ b/arch/xtensa/src/common/xtensa_user_handler.S
@@ -454,7 +454,7 @@ _xtensa_coproc_handler:
mov a0, sp /* sp == a1 */
addi sp, sp, -(4 * XCPTCONTEXT_SIZE) /* Allocate interrupt stack frame */
s32i a0, sp, (4 * REG_A1) /* Save pre-interrupt SP */
- rsr a0, EPS /* Save interruptee's PS */
+ rsr a0, PS /* Save interruptee's PS */
s32i a0, sp, (4 * REG_PS)
rsr a0, EPC_1 /* Save interruptee's PC */
s32i a0, sp, (4 * REG_PC)
[incubator-nuttx] 01/03: xtensa: Save PS correctly in syscall
handler
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 18d3fa9eea6f092504ec1aef26eef6a8d9c7ea6b
Author: YAMAMOTO Takashi <ya...@midokura.com>
AuthorDate: Tue Mar 31 13:06:52 2020 +0900
xtensa: Save PS correctly in syscall handler
"EPS" is not a real register. It's just a base value of EPS_{2..7}.
---
arch/xtensa/src/common/xtensa_user_handler.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/xtensa/src/common/xtensa_user_handler.S b/arch/xtensa/src/common/xtensa_user_handler.S
index 9e7b44c..d14c629 100644
--- a/arch/xtensa/src/common/xtensa_user_handler.S
+++ b/arch/xtensa/src/common/xtensa_user_handler.S
@@ -287,7 +287,7 @@ _xtensa_syscall_handler:
mov a0, sp /* sp == a1 */
addi sp, sp, -(4 * XCPTCONTEXT_SIZE) /* Allocate interrupt stack frame */
s32i a0, sp, (4 * REG_A1) /* Save pre-interrupt SP */
- rsr a0, EPS /* Save interruptee's PS */
+ rsr a0, PS /* Save interruptee's PS */
s32i a0, sp, (4 * REG_PS)
rsr a0, EXCSAVE_1 /* Save interruptee's a0 */
s32i a0, sp, (4 * REG_A0)
@@ -390,7 +390,7 @@ _xtensa_syscall_handler:
l32i a0, a2, (4 * REG_A0) /* Retrieve interruptee's A0 */
l32i sp, a2, (4 * REG_A1) /* Remove interrupt stack frame */
l32i a2, a2, (4 * REG_A2) /* Retrieve interruptee's A2 */
- rsync /* Ensure EPS and EPC written */
+ rsync /* Ensure PS and EPC written */
/* Return from exception. RFE returns from either the UserExceptionVector
* or the KernelExceptionVector. RFE sets PS.EXCM back to 0, and then