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Posted to commits@nuttx.apache.org by da...@apache.org on 2020/04/09 11:00:04 UTC
[incubator-nuttx] branch master updated:
boards/arm/stm32/nucleo-f429zi: Port Nuttx to Nucleo-F429zi (#752)
This is an automated email from the ASF dual-hosted git repository.
davids5 pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new afe08b6 boards/arm/stm32/nucleo-f429zi: Port Nuttx to Nucleo-F429zi (#752)
afe08b6 is described below
commit afe08b666c38e821f32fe3308fcc341ade2e25cb
Author: NicoMayer <ma...@outlook.de>
AuthorDate: Thu Apr 9 12:59:57 2020 +0200
boards/arm/stm32/nucleo-f429zi: Port Nuttx to Nucleo-F429zi (#752)
* boards/arm/stm32/nucleo-f429zi: Initial port to nucleo-f429zi board.
* boards/arm/stm32/nucleo-f429zi: Add two demo configs.
* Add the nucleo-f429zi to boards/Kconfig
boards/Kcondig: Fixed line alignment issue.
* boards/arm/stm32/nucleo-f429zi: Change the license header of all new files to an Apache 2.0 license.
* boards/arm/stm32/nucleo-f429zi: nxstyle fixed
---
boards/Kconfig | 13 +
boards/arm/stm32/nucleo-f429zi/Kconfig | 52 ++
.../stm32/nucleo-f429zi/configs/netnsh/defconfig | 90 ++++
.../arm/stm32/nucleo-f429zi/configs/nsh/defconfig | 60 +++
boards/arm/stm32/nucleo-f429zi/include/board.h | 368 ++++++++++++++
boards/arm/stm32/nucleo-f429zi/scripts/Make.defs | 98 ++++
boards/arm/stm32/nucleo-f429zi/scripts/gnu-elf.ld | 116 +++++
.../stm32/nucleo-f429zi/scripts/kernel-space.ld | 97 ++++
boards/arm/stm32/nucleo-f429zi/scripts/ld.script | 118 +++++
boards/arm/stm32/nucleo-f429zi/scripts/memory.ld | 86 ++++
.../arm/stm32/nucleo-f429zi/scripts/user-space.ld | 113 +++++
boards/arm/stm32/nucleo-f429zi/src/Makefile | 76 +++
boards/arm/stm32/nucleo-f429zi/src/nucleo-144.h | 284 +++++++++++
boards/arm/stm32/nucleo-f429zi/src/stm32_adc.c | 167 +++++++
.../stm32/nucleo-f429zi/src/stm32_appinitialize.c | 172 +++++++
.../arm/stm32/nucleo-f429zi/src/stm32_autoleds.c | 172 +++++++
boards/arm/stm32/nucleo-f429zi/src/stm32_bbsram.c | 534 +++++++++++++++++++++
boards/arm/stm32/nucleo-f429zi/src/stm32_boot.c | 95 ++++
boards/arm/stm32/nucleo-f429zi/src/stm32_buttons.c | 107 +++++
.../arm/stm32/nucleo-f429zi/src/stm32_dma_alloc.c | 105 ++++
boards/arm/stm32/nucleo-f429zi/src/stm32_gpio.c | 321 +++++++++++++
boards/arm/stm32/nucleo-f429zi/src/stm32_pwm.c | 147 ++++++
boards/arm/stm32/nucleo-f429zi/src/stm32_reset.c | 62 +++
boards/arm/stm32/nucleo-f429zi/src/stm32_romfs.h | 61 +++
.../nucleo-f429zi/src/stm32_romfs_initialize.c | 141 ++++++
boards/arm/stm32/nucleo-f429zi/src/stm32_sdio.c | 165 +++++++
boards/arm/stm32/nucleo-f429zi/src/stm32_spi.c | 444 +++++++++++++++++
boards/arm/stm32/nucleo-f429zi/src/stm32_usb.c | 324 +++++++++++++
.../arm/stm32/nucleo-f429zi/src/stm32_userleds.c | 128 +++++
29 files changed, 4716 insertions(+)
diff --git a/boards/Kconfig b/boards/Kconfig
index 56f5c93..bc40169 100644
--- a/boards/Kconfig
+++ b/boards/Kconfig
@@ -957,6 +957,15 @@ config ARCH_BOARD_NR5M100_NEXYS4
This is the port NuttX to the NEXT RISC-V processor runnining on a Digilent
Nexys-4 (non DDR version) FPGA board.
+config ARCH_BOARD_NUCLEO_F429ZI
+ bool "STMicro NUCLEO-F429ZI"
+ depends on ARCH_CHIP_STM32F429Z
+ select ARCH_HAVE_LEDS
+ select ARCH_HAVE_BUTTONS
+ select ARCH_HAVE_IRQBUTTONS
+ ---help---
+ STMicro Nucleo-F429zi board based on the STMicro STM32F429ZIT6 MCU.
+
config ARCH_BOARD_NUCLEO_144
bool "STMicro NUCLEO-144"
depends on ARCH_CHIP_STM32F722ZE || ARCH_CHIP_STM32F746ZG || ARCH_CHIP_STM32F767ZI
@@ -2153,6 +2162,7 @@ config ARCH_BOARD
default "nucleo-f303ze" if ARCH_BOARD_NUCLEO_F303ZE
default "nucleo-f334r8" if ARCH_BOARD_NUCLEO_F334R8
default "nucleo-f4x1re" if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
+ default "nucleo-f429zi" if ARCH_BOARD_NUCLEO_F429ZI
default "nucleo-f446re" if ARCH_BOARD_NUCLEO_F446RE
default "nucleo-f410rb" if ARCH_BOARD_NUCLEO_F410RB
default "nucleo-g070rb" if ARCH_BOARD_NUCLEO_G070RB
@@ -2657,6 +2667,9 @@ endif
if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
source "boards/arm/stm32/nucleo-f4x1re/Kconfig"
endif
+if ARCH_BOARD_NUCLEO_F429ZI
+source "boards/arm/stm32/nucleo-f429zi/Kconfig"
+endif
if ARCH_BOARD_NUCLEO_L152RE
source "boards/arm/stm32/nucleo-l152re/Kconfig"
endif
diff --git a/boards/arm/stm32/nucleo-f429zi/Kconfig b/boards/arm/stm32/nucleo-f429zi/Kconfig
new file mode 100644
index 0000000..68ca9af
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/Kconfig
@@ -0,0 +1,52 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_NUCLEO_F429ZI
+
+choice
+ prompt "Select Console wiring."
+ default NUCLEO_F429ZI_CONSOLE_ARDUINO
+ ---help---
+ Select where you will connect the console.
+
+ Virtual COM Port:
+
+ Advantage: Use the ST-Link as a console. No Extra wiring
+ needed.
+
+ Disadvantage: Not the best choice for initial bring up.
+
+ ARDUINO Connector:
+
+ Advantage: You have a shield so it is easy.
+
+ Disadvantage: You loose the use of the
+ other functions on PC6, PC7
+
+ STM32F4
+ ARDUIONO FUNCTION GPIO
+ -- ----- --------- ----
+ DO RX USART6_RX PG9
+ D1 TX USART6_TX PG14
+ -- ----- --------- ---
+
+config NUCLEO_F429ZI_CONSOLE_ARDUINO
+ bool "Arduino Connector"
+ select STM32_USART6
+ select USART6_SERIALDRIVER
+ select USART6_SERIAL_CONSOLE
+
+config NUCLEO_F429ZI_CONSOLE_VIRTUAL
+ bool "Virtual Comport"
+ select STM32_USART3
+ select USART3_SERIALDRIVER
+ select USART3_SERIAL_CONSOLE
+
+config NUCLEO_F429ZI_CONSOLE_NONE
+ bool "No Console"
+
+endchoice # "Select Console wiring"
+
+endif # ARCH_BOARD_NUCLEO_144
diff --git a/boards/arm/stm32/nucleo-f429zi/configs/netnsh/defconfig b/boards/arm/stm32/nucleo-f429zi/configs/netnsh/defconfig
new file mode 100644
index 0000000..fc68645
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/configs/netnsh/defconfig
@@ -0,0 +1,90 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_FPU is not set
+# CONFIG_STM32_FLASH_PREFETCH is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-f429zi"
+CONFIG_ARCH_BOARD_NUCLEO_F429ZI=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32F429Z=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=16717
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ETH0_PHY_LAN8742A=y
+CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_FS_TMPFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_HEAP2_BASE=0xD0000000
+CONFIG_HEAP2_SIZE=8388608
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_MM_REGIONS=2
+CONFIG_NET=y
+CONFIG_NETDB_DNSCLIENT=y
+CONFIG_NETUTILS_DISCOVER=y
+CONFIG_NETUTILS_WEBCLIENT=y
+CONFIG_NET_ARP_IPIN=y
+CONFIG_NET_ARP_SEND=y
+CONFIG_NET_BROADCAST=y
+CONFIG_NET_ETH_PKTSIZE=1500
+CONFIG_NET_ICMP=y
+CONFIG_NET_ICMP_SOCKET=y
+CONFIG_NET_IGMP=y
+CONFIG_NET_LOOPBACK=y
+CONFIG_NET_ROUTE=y
+CONFIG_NET_STATISTICS=y
+CONFIG_NET_TCP=y
+CONFIG_NET_UDP=y
+CONFIG_NET_UDP_CHECKSUMS=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_RAM_SIZE=114688
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SCHED_HPWORK=y
+CONFIG_SCHED_LPWORK=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_SPI=y
+CONFIG_START_DAY=6
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2011
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+CONFIG_NUCLEO_F429ZI_CONSOLE_VIRTUAL=y
+CONFIG_STM32_ETHMAC=y
+CONFIG_STM32_RMII_EXTCLK=y
+CONFIG_STM32_PHYADDR=0
+CONFIG_STM32_PHYSR=31
+CONFIG_STM32_PHYSR_100FD=0x0018
+CONFIG_STM32_PHYSR_100HD=0x0008
+CONFIG_STM32_PHYSR_10FD=0x0014
+CONFIG_STM32_PHYSR_10HD=0x0004
+CONFIG_STM32_PHYSR_ALTCONFIG=y
+CONFIG_STM32_PHYSR_ALTMODE=0x001c
+CONFIG_SYSTEM_DHCPC_RENEW=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_PING=y
+CONFIG_SYSTEM_NSH_CXXINITIALIZE=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART3_SERIAL_CONSOLE=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_WDOG_INTRESERVE=0
diff --git a/boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig b/boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig
new file mode 100644
index 0000000..8917028
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/configs/nsh/defconfig
@@ -0,0 +1,60 @@
+#
+# This file is autogenerated: PLEASE DO NOT EDIT IT.
+#
+# You can use "make menuconfig" to make any modifications to the installed .config file.
+# You can then do "make savedefconfig" to generate a new defconfig file that includes your
+# modifications.
+#
+# CONFIG_ARCH_FPU is not set
+# CONFIG_STM32_FLASH_PREFETCH is not set
+CONFIG_ARCH="arm"
+CONFIG_ARCH_BOARD="nucleo-f429zi"
+CONFIG_ARCH_BOARD_NUCLEO_F429ZI=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_CHIP="stm32"
+CONFIG_ARCH_CHIP_STM32=y
+CONFIG_ARCH_CHIP_STM32F429Z=y
+CONFIG_ARCH_STACKDUMP=y
+CONFIG_BOARD_LOOPSPERMSEC=16717
+CONFIG_BUILTIN=y
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_FS_PROCFS=y
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+CONFIG_HEAP2_BASE=0xD0000000
+CONFIG_HEAP2_SIZE=8388608
+CONFIG_INTELHEX_BINARY=y
+CONFIG_MAX_TASKS=16
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_MM_REGIONS=3
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_FILEIOSIZE=512
+CONFIG_NSH_LINELEN=64
+CONFIG_NSH_READLINE=y
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_PREALLOC_TIMERS=4
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_RAM_SIZE=114688
+CONFIG_RAM_START=0x20000000
+CONFIG_RAW_BINARY=y
+CONFIG_RR_INTERVAL=200
+CONFIG_SCHED_WAITPID=y
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_SPI=y
+CONFIG_START_DAY=6
+CONFIG_START_MONTH=12
+CONFIG_START_YEAR=2011
+CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
+CONFIG_STM32_EXTERNAL_RAM=y
+CONFIG_STM32_FMC=y
+CONFIG_STM32_JTAG_SW_ENABLE=y
+CONFIG_STM32_PWR=y
+CONFIG_NUCLEO_F429ZI_CONSOLE_VIRTUAL=y
+CONFIG_SYSTEM_NSH=y
+CONFIG_SYSTEM_NSH_CXXINITIALIZE=y
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_USART3_SERIAL_CONSOLE=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_WDOG_INTRESERVE=0
diff --git a/boards/arm/stm32/nucleo-f429zi/include/board.h b/boards/arm/stm32/nucleo-f429zi/include/board.h
new file mode 100644
index 0000000..66941f0
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/include/board.h
@@ -0,0 +1,368 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/include/board.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32F4_NUCLEO_F429ZI_INCLUDE_BOARD_H
+#define __BOARDS_ARM_STM32F4_NUCLEO_F429ZI_INCLUDE_BOARD_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+
+/* Do not include STM32 F4 header files here */
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Clocking *****************************************************************/
+
+/* The STM32F4 Discovery board features a single 8MHz crystal. Space is
+ * provided for a 32kHz RTC backup crystal, but it is not stuffed.
+ *
+ * This is the canonical configuration:
+ * System Clock source : PLL (HSE)
+ * SYSCLK(Hz) : 180000000 Determined by PLL config
+ * HCLK(Hz) : 180000000 (STM32_RCC_CFGR_HPRE)
+ * AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
+ * APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
+ * APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
+ * HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
+ * PLLM : 8 (STM32_PLLCFG_PLLM)
+ * PLLN : 336 (STM32_PLLCFG_PLLN)
+ * PLLP : 2 (STM32_PLLCFG_PLLP)
+ * PLLQ : 7 (STM32_PLLCFG_PLLQ)
+ * Main regulator output voltage : Scale1 mode Needed for highspeed SYSCLK
+ * Flash Latency(WS) : 5
+ * Prefetch Buffer : OFF
+ * Instruction cache : ON
+ * Data cache : ON
+ * Require 48MHz for USB OTG FS, : Enabled
+ * SDIO and RNG clock
+ */
+
+/* HSI - 16 MHz RC factory-trimmed
+ * LSI - 32 KHz RC
+ * HSE - On-board crystal frequency is 8MHz
+ * LSE - 32.768 kHz
+ */
+
+#define STM32_BOARD_XTAL 8000000ul
+
+#define STM32_HSI_FREQUENCY 16000000ul
+#define STM32_LSI_FREQUENCY 32000
+#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY 32768
+
+/* Main PLL Configuration.
+ *
+ * PLL source is HSE
+ * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
+ * = (8,000,000 / 8) * 336
+ * = 336,000,000
+ * SYSCLK = PLL_VCO / PLLP
+ * = 336,000,000 / 2 = 168,000,000
+ * USB OTG FS, SDIO and RNG Clock
+ * = PLL_VCO / PLLQ
+ * = 48,000,000
+ */
+
+#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
+#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
+#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
+
+#define STM32_SYSCLK_FREQUENCY 168000000ul
+
+/* AHB clock (HCLK) is SYSCLK (168MHz) */
+
+#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
+#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY
+
+#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
+#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
+
+/* Timers driven from APB1 will be twice PCLK1 */
+
+#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
+
+#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+
+#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
+
+/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
+ * otherwise frequency is 2xAPBx.
+ * Note: TIM1,8 are on APB2, others on APB1
+ */
+
+#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
+#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY/2)
+#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
+
+/* DMA Channel/Stream Selections ********************************************/
+
+/* Stream selections are arbitrary for now but might become important in the
+ * future if we set aside more DMA channels/streams.
+ *
+ * SDMMC DMA is on DMA2
+ *
+ * SDMMC1 DMA
+ * DMAMAP_SDMMC1_1 = Channel 4, Stream 3
+ * DMAMAP_SDMMC1_2 = Channel 4, Stream 6
+ *
+ * SDMMC2 DMA
+ * DMAMAP_SDMMC2_1 = Channel 11, Stream 0
+ * DMAMAP_SDMMC3_2 = Channel 11, Stream 5
+ */
+
+#define DMAMAP_SDMMC1 DMAMAP_SDMMC1_1
+#define DMAMAP_SDMMC2 DMAMAP_SDMMC2_1
+
+/* FLASH wait states
+ *
+ * --------- ---------- -----------
+ * VDD MAX SYSCLK WAIT STATES
+ * --------- ---------- -----------
+ * 1.7-2.1 V 180 MHz 8
+ * 2.1-2.4 V 216 MHz 9
+ * 2.4-2.7 V 216 MHz 8
+ * 2.7-3.6 V 216 MHz 7
+ * --------- ---------- -----------
+ */
+
+#define BOARD_FLASH_WAITSTATES 7
+
+/* LED definitions **********************************************************/
+
+/* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED,
+ * LD2 a Blue LED and LD3 a Red LED, that can be controlled by software.
+ * The following definitions assume the default Solder Bridges are installed.
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs
+ * in any way.
+ * The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED1 0
+#define BOARD_LED2 1
+#define BOARD_LED3 2
+#define BOARD_NLEDS 3
+
+#define BOARD_LED_GREEN BOARD_LED1
+#define BOARD_LED_BLUE BOARD_LED2
+#define BOARD_LED_RED BOARD_LED3
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED1_BIT (1 << BOARD_LED1)
+#define BOARD_LED2_BIT (1 << BOARD_LED2)
+#define BOARD_LED3_BIT (1 << BOARD_LED3)
+
+/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
+ * include/board.h and src/stm32_leds.c. The LEDs are used to encode
+ * OS-related events as follows:
+ *
+ *
+ * SYMBOL Meaning LED state
+ * Red Green Blue
+ * ---------------------- -------------------------- ------ ------ ---
+ */
+
+#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */
+#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */
+#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */
+#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */
+#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */
+#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */
+#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */
+#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */
+#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */
+
+/* Thus if the Green LED is statically on, NuttX has successfully booted and
+ * is, apparently, running normally. If the Red LED is flashing at
+ * approximately 2Hz, then a fatal error has been detected and the system
+ * has halted.
+ */
+
+/* Button definitions *******************************************************/
+
+/* The STM32F4 Discovery supports one button: Pushbutton B1, labeled "User",
+ * is connected to GPIO PI11.
+ * A high value will be sensed when the button is depressed.
+ */
+
+#define BUTTON_USER 0
+#define NUM_BUTTONS 1
+#define BUTTON_USER_BIT (1 << BUTTON_USER)
+
+/* Alternate function pin selections ****************************************/
+
+/* TIM */
+
+#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_1
+#define GPIO_TIM2_CH1OUT GPIO_TIM2_CH1OUT_1
+#define GPIO_TIM3_CH1OUT GPIO_TIM3_CH1OUT_1
+#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_1
+
+#if defined(CONFIG_NUCLEO_F429ZI_CONSOLE_ARDUINO)
+
+/* USART6:
+ *
+ * These configurations assume that you are using a standard Arduio RS-232
+ * shield with the serial interface with RX on pin D0 and TX on pin D1:
+ *
+ * -------- ---------------
+ * STM32F4
+ * ARDUIONO FUNCTION GPIO
+ * -- ----- --------- -----
+ * DO RX USART6_RX PG9
+ * D1 TX USART6_TX PG14
+ * -- ----- --------- -----
+ */
+
+ # define GPIO_USART6_RX GPIO_USART6_RX_2
+ # define GPIO_USART6_TX GPIO_USART6_TX_2
+#endif
+
+/* USART3:
+ * Use USART3 and the USB virtual COM port
+ */
+
+#if defined(CONFIG_NUCLEO_F429ZI_CONSOLE_VIRTUAL)
+ # define GPIO_USART3_RX GPIO_USART3_RX_3
+ # define GPIO_USART3_TX GPIO_USART3_TX_3
+#endif
+
+/* DMA channels *************************************************************/
+
+/* ADC */
+
+#define ADC1_DMA_CHAN DMAMAP_ADC1_1
+#define ADC2_DMA_CHAN DMAMAP_ADC2_1
+#define ADC3_DMA_CHAN DMAMAP_ADC3_1
+
+/* SPI
+ *
+ *
+ * PA6 SPI1_MISO CN12-13
+ * PA7 SPI1_MOSI CN12-15
+ * PA5 SPI1_SCK CN12-11
+ *
+ * PB14 SPI2_MISO CN12-28
+ * PB15 SPI2_MOSI CN12-26
+ * PB13 SPI2_SCK CN12-30
+ *
+ * PB4 SPI3_MISO CN12-27
+ * PB5 SPI3_MOSI CN12-29
+ * PB3 SPI3_SCK CN12-31
+ */
+
+#define GPIO_SPI1_MISO GPIO_SPI1_MISO_1
+#define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1
+#define GPIO_SPI1_SCK GPIO_SPI1_SCK_1
+
+#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1
+#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1
+#define GPIO_SPI2_SCK GPIO_SPI2_SCK_3
+
+#define GPIO_SPI3_MISO GPIO_SPI3_MISO_1
+#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2
+#define GPIO_SPI3_SCK GPIO_SPI3_SCK_1
+
+/* I2C
+ *
+ *
+ * PB8 I2C1_SCL CN12-3
+ * PB9 I2C1_SDA CN12-5
+
+ * PB10 I2C2_SCL CN11-51
+ * PB11 I2C2_SDA CN12-18
+ *
+ * PA8 I2C3_SCL CN12-23
+ * PC9 I2C3_SDA CN12-1
+ *
+ */
+
+#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2
+#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2
+
+#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
+#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1
+
+#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1
+#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1
+
+/* The STM32 F4 connects to a SMSC LAN8742A PHY using these pins:
+ *
+ * STM32 F4 BOARD LAN8742A
+ * GPIO SIGNAL PIN NAME
+ * -------- ------------ -------------
+ * PG11 RMII_TX_EN TXEN
+ * PG13 RMII_TXD0 TXD0
+ * PB13 RMII_TXD1 TXD1
+ * PC4 RMII_RXD0 RXD0/MODE0
+ * PC5 RMII_RXD1 RXD1/MODE1
+ * PG2 RMII_RXER RXER/PHYAD0 -- Not used
+ * PA7 RMII_CRS_DV CRS_DV/MODE2
+ * PC1 RMII_MDC MDC
+ * PA2 RMII_MDIO MDIO
+ * N/A NRST nRST
+ * PA1 RMII_REF_CLK nINT/REFCLK0
+ * N/A OSC_25M XTAL1/CLKIN
+ *
+ * The PHY address is either 0 or 1, depending on the state of PG2 on reset.
+ * PG2 is not controlled but appears to result in a PHY address of 0.
+ */
+
+#define GPIO_ETH_RMII_TX_EN GPIO_ETH_RMII_TX_EN_2
+#define GPIO_ETH_RMII_TXD0 GPIO_ETH_RMII_TXD0_2
+#define GPIO_ETH_RMII_TXD1 GPIO_ETH_RMII_TXD1_1
+
+#endif /* __BOARDS_ARM_STM32F4_NUCLEO_F429ZI_INCLUDE_BOARD_H */
diff --git a/boards/arm/stm32/nucleo-f429zi/scripts/Make.defs b/boards/arm/stm32/nucleo-f429zi/scripts/Make.defs
new file mode 100644
index 0000000..c51687b
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/scripts/Make.defs
@@ -0,0 +1,98 @@
+############################################################################
+# boards/arm/stm32f4/nucleo-f429zi/scripts/Make.defs
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = ld.script
+
+ifeq ($(WINTOOL),y)
+ # Windows-native toolchains
+ DIRLINK = $(TOPDIR)/tools/copydir.sh
+ DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+ MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+ ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+ ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+ ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/boards/$(CONFIG_ARCH)/$(CONFIG_ARCH_CHIP)/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+ # Linux/Cygwin-native toolchain
+ MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+ ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+ ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+ ARCHSCRIPT = -T$(TOPDIR)/boards/$(CONFIG_ARCH)/$(CONFIG_ARCH_CHIP)/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+STRIP = $(CROSSDEV)strip --strip-unneeded
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+ ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+ LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+ LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
diff --git a/boards/arm/stm32/nucleo-f429zi/scripts/gnu-elf.ld b/boards/arm/stm32/nucleo-f429zi/scripts/gnu-elf.ld
new file mode 100644
index 0000000..c1c19a1
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/scripts/gnu-elf.ld
@@ -0,0 +1,116 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/scripts/gnu-elf.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+SECTIONS
+{
+ .text 0x00000000 :
+ {
+ _stext = . ;
+ *(.text)
+ *(.text.*)
+ *(.gnu.warning)
+ *(.stub)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.jcr)
+
+ /* C++ support: The .init and .fini sections contain specific logic
+ * to manage static constructors and destructors.
+ */
+
+ *(.gnu.linkonce.t.*)
+ *(.init) /* Old ABI */
+ *(.fini) /* Old ABI */
+ _etext = . ;
+ }
+
+ .rodata :
+ {
+ _srodata = . ;
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.*)
+ *(.gnu.linkonce.r*)
+ _erodata = . ;
+ }
+
+ .data :
+ {
+ _sdata = . ;
+ *(.data)
+ *(.data1)
+ *(.data.*)
+ *(.gnu.linkonce.d*)
+ . = ALIGN(4);
+ _edata = . ;
+ }
+
+ /* C++ support. For each global and static local C++ object,
+ * GCC creates a small subroutine to construct the object. Pointers
+ * to these routines (not the routines themselves) are stored as
+ * simple, linear arrays in the .ctors section of the object file.
+ * Similarly, pointers to global/static destructor routines are
+ * stored in .dtors.
+ */
+
+ .ctors :
+ {
+ _sctors = . ;
+ *(.ctors) /* Old ABI: Unallocated */
+ *(.init_array) /* New ABI: Allocated */
+ _edtors = . ;
+ }
+
+ .dtors :
+ {
+ _sdtors = . ;
+ *(.dtors) /* Old ABI: Unallocated */
+ *(.fini_array) /* New ABI: Allocated */
+ _edtors = . ;
+ }
+
+ .bss :
+ {
+ _sbss = . ;
+ *(.bss)
+ *(.bss.*)
+ *(.sbss)
+ *(.sbss.*)
+ *(.gnu.linkonce.b*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = . ;
+ }
+
+ /* Stabs debugging sections. */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/stm32/nucleo-f429zi/scripts/kernel-space.ld b/boards/arm/stm32/nucleo-f429zi/scripts/kernel-space.ld
new file mode 100644
index 0000000..0942653
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/scripts/kernel-space.ld
@@ -0,0 +1,97 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/scripts/kernel-space.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* NOTE: This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+ .text : {
+ _stext = ABSOLUTE(.);
+ *(.vectors)
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ _etext = ABSOLUTE(.);
+ } > kflash
+
+ .init_section : {
+ _sinit = ABSOLUTE(.);
+ *(.init_array .init_array.*)
+ _einit = ABSOLUTE(.);
+ } > kflash
+
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } > kflash
+
+ __exidx_start = ABSOLUTE(.);
+ .ARM.exidx : {
+ *(.ARM.exidx*)
+ } > kflash
+
+ __exidx_end = ABSOLUTE(.);
+
+ _eronly = ABSOLUTE(.);
+
+ .data : {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ . = ALIGN(4);
+ _edata = ABSOLUTE(.);
+ } > ksram AT > kflash
+
+ .bss : {
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = ABSOLUTE(.);
+ } > ksram
+
+ /* Stabs debugging sections */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/stm32/nucleo-f429zi/scripts/ld.script b/boards/arm/stm32/nucleo-f429zi/scripts/ld.script
new file mode 100644
index 0000000..a0e1caa
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/scripts/ld.script
@@ -0,0 +1,118 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/scripts/ld.script
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The STM32F429ZIT6 has 2048Kb of FLASH beginning at address 0x0800:0000 and
+ * 256Kb of SRAM. SRAM is split up into four blocks:
+ *
+ * 1) 112Kb of SRAM beginning at address 0x2000:0000
+ * 2) 16Kb of SRAM beginning at address 0x2001:c000
+ * 3) 64Kb of SRAM beginning at address 0x2002:0000
+ * 4) 64Kb of CCM SRAM beginning at address 0x1000:0000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address
+ * range.
+ */
+
+MEMORY
+{
+ flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
+ sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+ .text : {
+ _stext = ABSOLUTE(.);
+ *(.vectors)
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ _etext = ABSOLUTE(.);
+ } > flash
+
+ .init_section : ALIGN(4) {
+ _sinit = ABSOLUTE(.);
+ *(.init_array .init_array.*)
+ _einit = ABSOLUTE(.);
+ } > flash
+
+ .ARM.extab : ALIGN(4) {
+ *(.ARM.extab*)
+ } > flash
+
+ .ARM.exidx : ALIGN(4) {
+ __exidx_start = ABSOLUTE(.);
+ *(.ARM.exidx*)
+ __exidx_end = ABSOLUTE(.);
+ } > flash
+
+ _eronly = ABSOLUTE(.);
+
+ /* The RAM vector table (if present) should lie at the beginning of SRAM */
+
+ .ram_vectors : {
+ *(.ram_vectors)
+ } > sram
+
+ .data : ALIGN(4) {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ . = ALIGN(4);
+ _edata = ABSOLUTE(.);
+ } > sram AT > flash
+
+ .bss : ALIGN(4) {
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = ABSOLUTE(.);
+ } > sram
+
+ /* Stabs debugging sections. */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/stm32/nucleo-f429zi/scripts/memory.ld b/boards/arm/stm32/nucleo-f429zi/scripts/memory.ld
new file mode 100644
index 0000000..0e94335
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/scripts/memory.ld
@@ -0,0 +1,86 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/scripts/memory.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The STM32F429ZIT has 2048Kb of FLASH beginning at address 0x0800:0000 and
+ * 256Kb of SRAM. SRAM is split up into four blocks:
+ *
+ * 1) 112KB of SRAM beginning at address 0x2000:0000
+ * 2) 16KB of SRAM beginning at address 0x2001:c000
+ * 3) 64KB of SRAM beginning at address 0x2002:0000
+ * 4) 64KB of CCM SRAM beginning at address 0x1000:0000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ *
+ * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
+ * FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
+ * should fit into 64KB and, of course, can be optimized as needed (See
+ * also boards/arm/stm32/stm32f429i-disco/scripts/kernel-space.ld). Allowing the
+ * additional does permit addition debug instrumentation to be added to the
+ * kernel space without overflowing the partition.
+ *
+ * Alignment of the user space FLASH partition is also a critical factor:
+ * The user space FLASH partition will be spanned with a single region of
+ * size 2**n bytes. The alignment of the user-space region must be the same.
+ * As a consequence, as the user-space increases in size, the alignment
+ * requirement also increases.
+ *
+ * This alignment requirement means that the largest user space FLASH region
+ * you can have will be 512KB at it would have to be positioned at
+ * 0x08800000. If you change this address, don't forget to change the
+ * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
+ * the check in kernel/userspace.c.
+ *
+ * For the same reasons, the maximum size of the SRAM mapping is limited to
+ * 4KB. Both of these alignment limitations could be reduced by using
+ * multiple regions to map the FLASH/SDRAM range or perhaps with some
+ * clever use of subregions.
+ *
+ * A detailed memory map for the 112KB SRAM region is as follows:
+ *
+ * 0x20000 0000: Kernel .data region. Typical size: 0.1KB
+ * ------- ---- Kernel .bss region. Typical size: 1.8KB
+ * 0x20000 0800: Kernel IDLE thread stack (approximate). Size is
+ * determined by CONFIG_IDLETHREAD_STACKSIZE and
+ * adjustments for alignment. Typical is 1KB.
+ * ------- ---- Padded to 4KB
+ * 0x20000 1000: User .data region. Size is variable.
+ * ------- ---- User .bss region Size is variable.
+ * 0x20000 2000: Beginning of kernel heap. Size determined by
+ * CONFIG_MM_KERNEL_HEAPSIZE.
+ * ------- ---- Beginning of user heap. Can vary with other settings.
+ * 0x20001 c000: End+1 of CPU RAM
+ */
+
+MEMORY
+{
+ /* 1024Kb FLASH */
+
+ kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+ uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
+ xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
+
+ /* 112Kb of contiguous SRAM */
+
+ ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
+ usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K
+ xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K
+}
diff --git a/boards/arm/stm32/nucleo-f429zi/scripts/user-space.ld b/boards/arm/stm32/nucleo-f429zi/scripts/user-space.ld
new file mode 100644
index 0000000..1c07afc
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/scripts/user-space.ld
@@ -0,0 +1,113 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/scripts/user-space.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* NOTE: This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+/* Make sure that the critical memory management functions are in user-space.
+ * the user heap memory manager will reside in user-space but be usable both
+ * by kernel- and user-space code
+ */
+
+EXTERN(umm_initialize)
+EXTERN(umm_addregion)
+EXTERN(umm_trysemaphore)
+EXTERN(umm_givesemaphore)
+
+EXTERN(malloc)
+EXTERN(realloc)
+EXTERN(zalloc)
+EXTERN(free)
+
+OUTPUT_ARCH(arm)
+SECTIONS
+{
+ .userspace : {
+ *(.userspace)
+ } > uflash
+
+ .text : {
+ _stext = ABSOLUTE(.);
+ *(.text .text.*)
+ *(.fixup)
+ *(.gnu.warning)
+ *(.rodata .rodata.*)
+ *(.gnu.linkonce.t.*)
+ *(.glue_7)
+ *(.glue_7t)
+ *(.got)
+ *(.gcc_except_table)
+ *(.gnu.linkonce.r.*)
+ _etext = ABSOLUTE(.);
+ } > uflash
+
+ .init_section : {
+ _sinit = ABSOLUTE(.);
+ *(.init_array .init_array.*)
+ _einit = ABSOLUTE(.);
+ } > uflash
+
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } > uflash
+
+ __exidx_start = ABSOLUTE(.);
+ .ARM.exidx : {
+ *(.ARM.exidx*)
+ } > uflash
+
+ __exidx_end = ABSOLUTE(.);
+
+ _eronly = ABSOLUTE(.);
+
+ .data : {
+ _sdata = ABSOLUTE(.);
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ CONSTRUCTORS
+ . = ALIGN(4);
+ _edata = ABSOLUTE(.);
+ } > usram AT > uflash
+
+ .bss : {
+ _sbss = ABSOLUTE(.);
+ *(.bss .bss.*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = ABSOLUTE(.);
+ } > usram
+
+ /* Stabs debugging sections */
+
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_info 0 : { *(.debug_info) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/boards/arm/stm32/nucleo-f429zi/src/Makefile b/boards/arm/stm32/nucleo-f429zi/src/Makefile
new file mode 100644
index 0000000..52e546f
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/Makefile
@@ -0,0 +1,76 @@
+############################################################################
+# boards/arm/stm32f4/nucleo-f429zi/src/Makefile
+#
+# Licensed to the Apache Software Foundation (ASF) under one or more
+# contributor license agreements. See the NOTICE file distributed with
+# this work for additional information regarding copyright ownership. The
+# ASF licenses this file to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance with the
+# License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations
+# under the License.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += stm32_autoleds.c
+else
+CSRCS += stm32_userleds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS += stm32_buttons.c
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += stm32_appinitialize.c
+endif
+
+ifeq ($(CONFIG_DEV_GPIO),y)
+CSRCS += stm32_gpio.c
+endif
+
+ifeq ($(CONFIG_SPI),y)
+CSRCS += stm32_spi.c
+endif
+
+ifeq ($(CONFIG_ADC),y)
+CSRCS += stm32_adc.c
+endif
+
+ifeq ($(CONFIG_PWM),y)
+CSRCS += stm32_pwm.c
+endif
+
+ifeq ($(CONFIG_MMCSD),y)
+CSRCS += stm32_sdio.c
+endif
+
+ifeq ($(CONFIG_STM32F4_OTGFS),y)
+CSRCS += stm32_usb.c
+endif
+
+ifeq ($(CONFIG_STM32F4_BBSRAM),y)
+CSRCS += stm32_bbsram.c
+endif
+
+ifeq ($(CONFIG_BOARDCTL_RESET),y)
+CSRCS += stm32_reset.c
+endif
+
+ifeq ($(CONFIG_STM32_ROMFS),y)
+CSRCS += stm32_romfs_initialize.c
+endif
+
+include $(TOPDIR)/boards/Board.mk
diff --git a/boards/arm/stm32/nucleo-f429zi/src/nucleo-144.h b/boards/arm/stm32/nucleo-f429zi/src/nucleo-144.h
new file mode 100644
index 0000000..11b4336
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/nucleo-144.h
@@ -0,0 +1,284 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/nucleo-144.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32F4_NUCLEO_F429ZI_SRC_NUCLEO_144_H
+#define __BOARDS_ARM_STM32F4_NUCLEO_F429ZI_SRC_NUCLEO_144_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* procfs File System */
+
+#ifdef CONFIG_FS_PROCFS
+# ifdef CONFIG_NSH_PROC_MOUNTPOINT
+# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
+# else
+# define STM32_PROCFS_MOUNTPOINT "/proc"
+# endif
+#endif
+
+/* Nucleo-144 GPIO Pin Definitions ******************************************/
+
+/* LED
+ *
+ * The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED,
+ * LD2 a Blue LED and LD3 a Red LED, that can be controlled by software.
+ * The following definitions assume the default Solder Bridges are installed.
+ */
+
+#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+ GPIO_PORTB | GPIO_PIN0)
+#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+ GPIO_PORTB | GPIO_PIN7)
+#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+ GPIO_PORTB | GPIO_PIN14)
+
+#define GPIO_LED_GREEN GPIO_LD1
+#define GPIO_LED_BLUE GPIO_LD2
+#define GPIO_LED_RED GPIO_LD3
+
+#define LED_DRIVER_PATH "/dev/userleds"
+
+/* BUTTONS
+ *
+ * The Blue pushbutton B1, labeled "User", is connected to GPIO PC13.
+ * A high value will be sensed when the button is depressed.
+ * Note:
+ * 1) That the EXTI is included in the definition to enable
+ * an interrupt on this IO.
+ * 2) The following definitions assume the default Solder
+ * Bridges are installed.
+ */
+
+#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13)
+
+/* SPI **********************************************************************/
+
+#define GPIO_SPI_CS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \
+ GPIO_OUTPUT_SET)
+
+#define GPIO_SPI1_CS0 (GPIO_SPI_CS | GPIO_PORTA | GPIO_PIN15)
+#define GPIO_SPI1_CS1 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN15)
+#define GPIO_SPI1_CS2 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN14)
+#define GPIO_SPI1_CS3 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN2)
+#define GPIO_SPI2_CS0 (GPIO_SPI_CS | GPIO_PORTD | GPIO_PIN7)
+#define GPIO_SPI2_CS1 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN1)
+#define GPIO_SPI2_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN2)
+#define GPIO_SPI2_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN3)
+#define GPIO_SPI3_CS0 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN4)
+#define GPIO_SPI3_CS1 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN5)
+#define GPIO_SPI3_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN6)
+#define GPIO_SPI3_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN7)
+
+/* Logical SPI Chip Selects used to index */
+
+#define NUCLEO_SPI_BUS1_CS0 0
+#define NUCLEO_SPI_BUS1_CS1 1
+#define NUCLEO_SPI_BUS1_CS2 2
+#define NUCLEO_SPI_BUS1_CS3 3
+#define NUCLEO_SPI_BUS2_CS0 4
+#define NUCLEO_SPI_BUS2_CS1 5
+#define NUCLEO_SPI_BUS2_CS2 6
+#define NUCLEO_SPI_BUS2_CS3 7
+#define NUCLEO_SPI_BUS3_CS0 8
+#define NUCLEO_SPI_BUS3_CS1 9
+#define NUCLEO_SPI_BUS3_CS2 10
+#define NUCLEO_SPI_BUS3_CS3 11
+
+#if defined(CONFIG_STM32F4_SDMMC1) || defined(CONFIG_STM32F4_SDMMC2)
+# define HAVE_SDIO
+#endif
+
+#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_MMCSD_SDIO)
+# undef HAVE_SDIO
+#endif
+
+#define SDIO_SLOTNO 0 /* Only one slot */
+
+#ifdef HAVE_SDIO
+# if defined(CONFIG_STM32F4_SDMMC1)
+# define GPIO_SDMMC1_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI | GPIO_PORTC | GPIO_PIN6)
+# endif
+
+# if defined(CONFIG_NSH_MMCSDSLOTNO) && (CONFIG_NSH_MMCSDSLOTNO != 0)
+# warning "Only one MMC/SD slot, slot 0"
+# define CONFIG_NSH_MMCSDSLOTNO SDIO_SLOTNO
+# endif
+
+# if defined(CONFIG_NSH_MMCSDMINOR)
+# define SDIO_MINOR CONFIG_NSH_MMCSDMINOR
+# else
+# define SDIO_MINOR 0
+# endif
+#endif
+
+/* USB OTG FS
+ *
+ * PA9 OTG_FS_VBUS VBUS sensing (also connected to the green LED)
+ * PC0 OTG_FS_PowerSwitchOn
+ * PD5 OTG_FS_Overcurrent
+ */
+
+#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+ GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN9)
+
+#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+ GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN6)
+
+#ifdef CONFIG_USBHOST
+# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT|\
+ GPIO_SPEED_100MHz|GPIO_PUSHPULL|\
+ GPIO_PORTG|GPIO_PIN7)
+
+#else
+# define GPIO_OTGFS_OVER (GPIO_INPUT|GPIO_FLOAT|GPIO_SPEED_100MHz|\
+ GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN7)
+#endif
+
+/* GPIO pins used by the GPIO Subsystem */
+
+#define BOARD_NGPIOIN 1 /* Amount of GPIO Input pins */
+#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */
+#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
+
+#define GPIO_IN1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN0)
+#define GPIO_OUT1 (GPIO_OUTPUT | GPIO_OUTPUT | GPIO_SPEED_50MHz | \
+ GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN1)
+#define GPIO_INT1 (GPIO_INPUT | GPIO_FLOAT | GPIO_PORTB | GPIO_PIN2)
+
+/****************************************************************************
+ * Public data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ * Called to configure SPI chip select GPIO pins for the Nucleo-144 board.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_SPI)
+void stm32_spidev_initialize(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_spidev_bus_test
+ *
+ * Description:
+ * Called to create the defined SPI buses and test them by initializing
+ * them and sending the NUCLEO_SPI_TEST (no chip select).
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_NUCLEO_SPI_TEST)
+int stm32_spidev_bus_test(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_dma_alloc_init
+ *
+ * Description:
+ * Called to create a FAT DMA allocator
+ *
+ * Returned Value:
+ * 0 on success or -ENOMEM
+ *
+ ****************************************************************************/
+
+void stm32_dma_alloc_init(void);
+
+#if defined (CONFIG_FAT_DMAMEMORY)
+int stm32_dma_alloc_init(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ * Called at application startup time to initialize the SCMMC
+ * functionality.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_MMCSD
+int stm32_sdio_initialize(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ * Called from stm32_usbinitialize very early in inialization to
+ * setup USB-related GPIO pins for the nucleo-144 board.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F4_OTGFS
+void stm32_usbinitialize(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ * Initialize PWM and register the PWM device.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_PWM
+int stm32_pwm_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ * Initialize ADC and register the ADC driver.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ADC
+int stm32_adc_setup(void);
+#endif
+
+/****************************************************************************
+ * Name: stm32_bbsram_int
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F4_BBSRAM
+int stm32_bbsram_int(void);
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* __BOARDS_ARM_STM32F4_NUCLEO_F429ZI_SRC_NUCLEO_144_H */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_adc.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_adc.c
new file mode 100644
index 0000000..fd2038c
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_adc.c
@@ -0,0 +1,167 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_adc.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <nuttx/analog/adc.h>
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_adc.h"
+#include "nucleo-144.h"
+
+#ifdef CONFIG_ADC
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* Up to 3 ADC interfaces are supported */
+
+#if STM32F4_NADC < 3
+# undef CONFIG_STM32F4_ADC3
+#endif
+
+#if STM32F4_NADC < 2
+# undef CONFIG_STM32F4_ADC2
+#endif
+
+#if STM32F4_NADC < 1
+# undef CONFIG_STM32F4_ADC1
+#endif
+
+#if defined(CONFIG_STM32F4_ADC1) || defined(CONFIG_STM32F4_ADC2) || defined(CONFIG_STM32F4_ADC3)
+#ifndef CONFIG_STM32F4_ADC1
+# warning "Channel information only available for ADC1"
+#endif
+
+/* The number of ADC channels in the conversion list */
+
+#define ADC1_NCHANNELS 1
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Identifying number of each ADC channel: Variable Resistor.
+ *
+ * {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15};
+ */
+
+#ifdef CONFIG_STM32F4_ADC1
+static const uint8_t g_chanlist[ADC1_NCHANNELS] =
+ {
+ 3
+ };
+
+/* Configurations of pins used byte each ADC channels
+ *
+ * {GPIO_ADC1_IN1, GPIO_ADC1_IN2, GPIO_ADC1_IN3, GPIO_ADC1_IN4,
+ * GPIO_ADC1_IN5, GPIO_ADC1_IN6, GPIO_ADC1_IN7, GPIO_ADC1_IN8,
+ * GPIO_ADC1_IN9, GPIO_ADC1_IN10, GPIO_ADC1_IN11, GPIO_ADC1_IN12,
+ * GPIO_ADC1_IN13, GPIO_ADC1_IN15};
+ */
+
+static const uint32_t g_pinlist[ADC1_NCHANNELS] =
+ {
+ GPIO_ADC1_IN3
+ };
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_adc_setup
+ *
+ * Description:
+ * Initialize ADC and register the ADC driver.
+ *
+ ****************************************************************************/
+
+int stm32_adc_setup(void)
+{
+#ifdef CONFIG_STM32F4_ADC1
+ static bool initialized = false;
+ struct adc_dev_s *adc;
+ int ret;
+ int i;
+
+ /* Check if we have already initialized */
+
+ if (!initialized)
+ {
+ /* Configure the pins as analog inputs for the selected channels */
+
+ for (i = 0; i < ADC1_NCHANNELS; i++)
+ {
+ if (g_pinlist[i] != 0)
+ {
+ stm32_configgpio(g_pinlist[i]);
+ }
+ }
+
+ /* Call stm32_adcinitialize() to get an instance of the ADC interface */
+
+ adc = stm32_adc_initialize(1, g_chanlist, ADC1_NCHANNELS);
+ if (adc == NULL)
+ {
+ aerr("ERROR: Failed to get ADC interface\n");
+ return -ENODEV;
+ }
+
+ /* Register the ADC driver at "/dev/adc0" */
+
+ ret = adc_register("/dev/adc0", adc);
+ if (ret < 0)
+ {
+ aerr("ERROR: adc_register failed: %d\n", ret);
+ return ret;
+ }
+
+ /* Now we are initialized */
+
+ initialized = true;
+ }
+
+ return OK;
+#else
+ return -ENOSYS;
+#endif
+}
+
+#endif /* CONFIG_STM32F4_ADC1 || CONFIG_STM32F4_ADC2 || CONFIG_STM32F4_ADC3 */
+#endif /* CONFIG_ADC */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_appinitialize.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_appinitialize.c
new file mode 100644
index 0000000..d9d598b
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_appinitialize.c
@@ -0,0 +1,172 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_appinitialize.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <sys/mount.h>
+#include <debug.h>
+#include <syslog.h>
+
+#include "nucleo-144.h"
+#include <nuttx/leds/userled.h>
+#ifdef CONFIG_STM32_ROMFS
+#include "stm32_romfs.h"
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ * Perform application specific initialization. This function is never
+ * called directly from application code, but only indirectly via the
+ * (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ * Input Parameters:
+ * arg - The boardctl() argument is passed to the board_app_initialize()
+ * implementation without modification. The argument has no
+ * meaning to NuttX; the meaning of the argument is a contract
+ * between the board-specific initialization logic and the
+ * matching application logic. The value cold be such things as a
+ * mode enumeration value, a set of DIP switch switch settings, a
+ * pointer to configuration data read from a file or serial FLASH,
+ * or whatever you would like to do with it. Every implementation
+ * should accept zero/NULL as a default configuration.
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success; a negated errno value is returned on
+ * any failure to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(uintptr_t arg)
+{
+ int ret;
+
+#ifdef CONFIG_FS_PROCFS
+ /* Mount the procfs file system */
+
+ ret = mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n",
+ STM32_PROCFS_MOUNTPOINT, ret);
+ }
+#endif
+
+#ifdef CONFIG_STM32_ROMFS
+ /* Mount the romfs partition */
+
+ ret = stm32_romfs_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to mount romfs at %s: %d\n",
+ CONFIG_STM32_ROMFS_MOUNTPOINT, ret);
+ }
+#endif
+
+#ifdef CONFIG_DEV_GPIO
+ /* Register the GPIO driver */
+
+ ret = stm32_gpio_initialize();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
+ return ret;
+ }
+#endif
+
+#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
+ /* Register the LED driver */
+
+ ret = userled_lower_initialize(LED_DRIVER_PATH);
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_ADC
+ /* Initialize ADC and register the ADC driver. */
+
+ ret = stm32_adc_setup();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_STM32F4_BBSRAM
+ /* Initialize battery-backed RAM */
+
+ stm32_bbsram_int();
+#endif
+
+#if defined(CONFIG_FAT_DMAMEMORY)
+ if (stm32_dma_alloc_init() < 0)
+ {
+ syslog(LOG_ERR, "DMA alloc FAILED");
+ }
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI_TEST)
+ /* Create SPI interfaces */
+
+ ret = stm32_spidev_bus_test();
+ if (ret != OK)
+ {
+ syslog(LOG_ERR, "ERROR: Failed to initialize SPI interfaces: %d\n",
+ ret);
+ return ret;
+ }
+#endif
+
+#if defined(CONFIG_MMCSD)
+ /* Initialize the SDIO block driver */
+
+ ret = stm32_sdio_initialize();
+ if (ret != OK)
+ {
+ ferr("ERROR: Failed to initialize MMC/SD driver: %d\n", ret);
+ return ret;
+ }
+#endif
+
+#if defined(CONFIG_PWM)
+ /* Initialize PWM and register the PWM device */
+
+ ret = stm32_pwm_setup();
+ if (ret < 0)
+ {
+ syslog(LOG_ERR, "ERROR: stm32_pwm_setup() failed: %d\n", ret);
+ }
+#endif
+
+ UNUSED(ret);
+ return OK;
+}
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_autoleds.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_autoleds.c
new file mode 100644
index 0000000..1f6b2dc
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_autoleds.c
@@ -0,0 +1,172 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_autoleds.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+#include "stm32_gpio.h"
+#include "nucleo-144.h"
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Indexed by BOARD_LED_<color> */
+
+static const uint32_t g_ledmap[BOARD_NLEDS] =
+{
+ GPIO_LED_GREEN,
+ GPIO_LED_BLUE,
+ GPIO_LED_RED,
+};
+
+static bool g_initialized;
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static void phy_set_led(int led, bool state)
+{
+ /* Active High */
+
+ stm32_gpiowrite(g_ledmap[led], state);
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+ int i;
+
+ /* Configure the LD1 GPIO for output. Initial state is OFF */
+
+ for (i = 0; i < ARRAYSIZE(g_ledmap); i++)
+ {
+ stm32_configgpio(g_ledmap[i]);
+ }
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+ switch (led)
+ {
+ default:
+ break;
+
+ case LED_HEAPALLOCATE:
+ phy_set_led(BOARD_LED_BLUE, true);
+ break;
+
+ case LED_IRQSENABLED:
+ phy_set_led(BOARD_LED_BLUE, false);
+ phy_set_led(BOARD_LED_GREEN, true);
+ break;
+
+ case LED_STACKCREATED:
+ phy_set_led(BOARD_LED_GREEN, true);
+ phy_set_led(BOARD_LED_BLUE, true);
+ g_initialized = true;
+ break;
+
+ case LED_INIRQ:
+ phy_set_led(BOARD_LED_BLUE, true);
+ break;
+
+ case LED_SIGNAL:
+ phy_set_led(BOARD_LED_GREEN, true);
+ break;
+
+ case LED_ASSERTION:
+ phy_set_led(BOARD_LED_RED, true);
+ phy_set_led(BOARD_LED_BLUE, true);
+ break;
+
+ case LED_PANIC:
+ phy_set_led(BOARD_LED_RED, true);
+ break;
+
+ case LED_IDLE : /* IDLE */
+ phy_set_led(BOARD_LED_RED, true);
+ break;
+ }
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+ switch (led)
+ {
+ default:
+ break;
+
+ case LED_SIGNAL:
+ phy_set_led(BOARD_LED_GREEN, false);
+ break;
+
+ case LED_INIRQ:
+ phy_set_led(BOARD_LED_BLUE, false);
+ break;
+
+ case LED_ASSERTION:
+ phy_set_led(BOARD_LED_RED, false);
+ phy_set_led(BOARD_LED_BLUE, false);
+ break;
+
+ case LED_PANIC:
+ phy_set_led(BOARD_LED_RED, false);
+ break;
+
+ case LED_IDLE : /* IDLE */
+ phy_set_led(BOARD_LED_RED, false);
+ break;
+ }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_bbsram.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_bbsram.c
new file mode 100644
index 0000000..91437ad
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_bbsram.c
@@ -0,0 +1,534 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_bbsram.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/ioctl.h>
+
+#include <stdint.h>
+#include <stddef.h>
+#include <stdlib.h>
+#include <fcntl.h>
+#include <string.h>
+#include <errno.h>
+#include <debug.h>
+#include <syslog.h>
+
+#include <nuttx/fs/fs.h>
+
+#include "up_internal.h"
+#include "stm32_bbsram.h"
+
+#include "nucleo-144.h"
+
+#ifdef CONFIG_STM32F4_BBSRAM
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+#define FREEZE_STR(s) #s
+#define STRINGIFY(s) FREEZE_STR(s)
+#define HARDFAULT_FILENO 3
+#define HARDFAULT_PATH BBSRAM_PATH""STRINGIFY(HARDFAULT_FILENO)
+#define HARDFAULT_REBOOT_ FILENO 0
+#define HARDFAULT_REBOOT_PATH BBSRAM_PATH""STRINGIFY(HARDFAULT_REBOOT_FILENO)
+
+#define BBSRAM_SIZE_FN0 (sizeof(int))
+#define BBSRAM_SIZE_FN1 384
+#define BBSRAM_SIZE_FN2 384
+#define BBSRAM_SIZE_FN3 - 1
+
+/* The following guides in the amount of the user and interrupt stack
+ * data we can save. The amount of storage left will dictate the actual
+ * number of entries of the user stack data saved. If it is too big
+ * It will be truncated by the call to stm32_bbsram_savepanic
+ */
+#define BBSRAM_HEADER_SIZE 20 /* This is an assumption */
+#define BBSRAM_USED ((4*BBSRAM_HEADER_SIZE)+ \
+ (BBSRAM_SIZE_FN0+BBSRAM_SIZE_FN1+ \
+ BBSRAM_SIZE_FN2))
+#define BBSRAM_REAMINING (STM32F4_BBSRAM_SIZE-BBSRAM_USED)
+#if CONFIG_ARCH_INTERRUPTSTACK <= 3
+# define BBSRAM_NUMBER_STACKS 1
+#else
+# define BBSRAM_NUMBER_STACKS 2
+#endif
+#define BBSRAM_FIXED_ELEMENTS_SIZE (sizeof(info_t))
+#define BBSRAM_LEFTOVER (BBSRAM_REAMINING-\
+ BBSRAM_FIXED_ELEMENTS_SIZE)
+
+#define CONFIG_ISTACK_SIZE (BBSRAM_LEFTOVER/BBSRAM_NUMBER_STACKS/ \
+ sizeof(stack_word_t))
+#define CONFIG_USTACK_SIZE (BBSRAM_LEFTOVER/BBSRAM_NUMBER_STACKS/ \
+ sizeof(stack_word_t))
+
+/* The path to the Battery Backed up SRAM */
+
+#define BBSRAM_PATH "/fs/bbr"
+
+/* The sizes of the files to create (-1) use rest of BBSRAM memory */
+
+#define BSRAM_FILE_SIZES \
+{ \
+ BBSRAM_SIZE_FN0, \
+ BBSRAM_SIZE_FN1, \
+ BBSRAM_SIZE_FN2, \
+ BBSRAM_SIZE_FN3, \
+ 0 \
+}
+
+#define ARRAYSIZE(a) (sizeof((a))/sizeof(a[0]))
+
+/* For Assert keep this much of the file name */
+
+#define MAX_FILE_PATH_LENGTH 40
+
+#define HEADER_TIME_FMT "%Y-%m-%d-%H:%M:%S"
+#define HEADER_TIME_FMT_NUM (2+ 0+ 0+ 0+ 0+ 0)
+#define HEADER_TIME_FMT_LEN (((ARRAYSIZE(HEADER_TIME_FMT)-1) + \
+ HEADER_TIME_FMT_NUM))
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Used for stack frame storage */
+
+typedef uint32_t stack_word_t;
+
+/* Stack related data */
+
+typedef struct
+{
+ uint32_t sp;
+ uint32_t top;
+ uint32_t size;
+} _stack_t;
+
+typedef struct
+{
+ _stack_t user;
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+ _stack_t interrupt;
+#endif
+} stack_t;
+
+/* Not Used for reference only */
+
+typedef struct
+{
+ uint32_t r0;
+ uint32_t r1;
+ uint32_t r2;
+ uint32_t r3;
+ uint32_t r4;
+ uint32_t r5;
+ uint32_t r6;
+ uint32_t r7;
+ uint32_t r8;
+ uint32_t r9;
+ uint32_t r10;
+ uint32_t r11;
+ uint32_t r12;
+ uint32_t sp;
+ uint32_t lr;
+ uint32_t pc;
+ uint32_t xpsr;
+ uint32_t d0;
+ uint32_t d1;
+ uint32_t d2;
+ uint32_t d3;
+ uint32_t d4;
+ uint32_t d5;
+ uint32_t d6;
+ uint32_t d7;
+ uint32_t d8;
+ uint32_t d9;
+ uint32_t d10;
+ uint32_t d11;
+ uint32_t d12;
+ uint32_t d13;
+ uint32_t d14;
+ uint32_t d15;
+ uint32_t fpscr;
+ uint32_t sp_main;
+ uint32_t sp_process;
+ uint32_t apsr;
+ uint32_t ipsr;
+ uint32_t epsr;
+ uint32_t primask;
+ uint32_t basepri;
+ uint32_t faultmask;
+ uint32_t control;
+ uint32_t s0;
+ uint32_t s1;
+ uint32_t s2;
+ uint32_t s3;
+ uint32_t s4;
+ uint32_t s5;
+ uint32_t s6;
+ uint32_t s7;
+ uint32_t s8;
+ uint32_t s9;
+ uint32_t s10;
+ uint32_t s11;
+ uint32_t s12;
+ uint32_t s13;
+ uint32_t s14;
+ uint32_t s15;
+ uint32_t s16;
+ uint32_t s17;
+ uint32_t s18;
+ uint32_t s19;
+ uint32_t s20;
+ uint32_t s21;
+ uint32_t s22;
+ uint32_t s23;
+ uint32_t s24;
+ uint32_t s25;
+ uint32_t s26;
+ uint32_t s27;
+ uint32_t s28;
+ uint32_t s29;
+ uint32_t s30;
+ uint32_t s31;
+} proc_regs_t;
+
+/* Flags to identify what is in the dump */
+
+typedef enum
+{
+ REGS_PRESENT = 0x01,
+ USERSTACK_PRESENT = 0x02,
+ INTSTACK_PRESENT = 0x04,
+ INVALID_USERSTACK_PTR = 0x20,
+ INVALID_INTSTACK_PTR = 0x40,
+} fault_flags_t;
+
+typedef struct
+{
+ fault_flags_t flags; /* What is in the dump */
+ uintptr_t current_regs; /* Used to validate the dump */
+ int lineno; /* __LINE__ to up_assert */
+ int pid; /* Process ID */
+ uint32_t regs[XCPTCONTEXT_REGS]; /* Interrupt register save area */
+ stack_t stacks; /* Stack info */
+#if CONFIG_TASK_NAME_SIZE > 0
+ char name[CONFIG_TASK_NAME_SIZE + 1]; /* Task name (with NULL
+ * terminator) */
+#endif
+ char filename[MAX_FILE_PATH_LENGTH]; /* the Last of chars in
+ * __FILE__ to up_assert */
+} info_t;
+
+typedef struct
+{
+ info_t info; /* The info */
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+ /* The amount of stack data is compile time
+ * sized backed on what is left after the
+ * other BBSRAM files are defined
+ * The order is such that only the
+ * ustack should be truncated
+ */
+ stack_word_t istack[CONFIG_USTACK_SIZE];
+#endif
+ stack_word_t ustack[CONFIG_ISTACK_SIZE];
+} fullcontext_t;
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static uint8_t g_sdata[STM32F4_BBSRAM_SIZE];
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: hardfault_get_desc
+ ****************************************************************************/
+
+static int hardfault_get_desc(struct bbsramd_s *desc)
+{
+ FAR struct file filestruct;
+ int ret;
+
+ ret = file_open(&filestruct, HARDFAULT_PATH, O_RDONLY);
+ if (ret < 0)
+ {
+ syslog(LOG_INFO, "stm32 bbsram: Failed to open Fault Log file [%s] "
+ "(%d)\n", HARDFAULT_PATH, ret);
+ }
+ else
+ {
+ ret = file_ioctl(&filestruct, STM32F4_BBSRAM_GETDESC_IOCTL,
+ (unsigned long)((uintptr_t)desc));
+ file_close(&filestruct);
+
+ if (ret < 0)
+ {
+ syslog(LOG_INFO, "stm32 bbsram:"
+ "Failed to get Fault Log descriptor" "(%d)\n", ret);
+ }
+ }
+
+ return ret;
+}
+
+/****************************************************************************
+ * Name: copy_reverse
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F4_SAVE_CRASHDUMP)
+static void copy_reverse(stack_word_t *dest, stack_word_t *src, int size)
+{
+ while (size--)
+ {
+ *dest++ = *src--;
+ }
+}
+#endif /* CONFIG_STM32F4_SAVE_CRASHDUMP */
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_bbsram_int
+ ****************************************************************************/
+
+int stm32_bbsram_int(void)
+{
+ int filesizes[CONFIG_STM32F4_BBSRAM_FILES + 1] = BSRAM_FILE_SIZES;
+ char buf[HEADER_TIME_FMT_LEN + 1];
+ struct bbsramd_s desc;
+ int rv;
+ int state;
+ struct tm tt;
+ time_t time_sec;
+
+ /* Using Battery Backed Up SRAM */
+
+ stm32_bbsraminitialize(BBSRAM_PATH, filesizes);
+
+#if defined(CONFIG_STM32F4_SAVE_CRASHDUMP)
+ /* Panic Logging in Battery Backed Up Files
+ * Do we have an hard fault in BBSRAM?
+ */
+
+ rv = hardfault_get_desc(&desc);
+ if (rv >= OK)
+ {
+ syslog(LOG_EMERG, "There is a hard fault logged.\n");
+ state = (desc.lastwrite.tv_sec || desc.lastwrite.tv_nsec) ? OK : 1;
+
+ syslog(LOG_INFO, "Fault Log info File No %d Length %d flags:0x%02x "
+ "state:%d\n", (unsigned int)desc.fileno, (unsigned int) desc.len,
+ (unsigned int)desc.flags, state);
+
+ if (state == OK)
+ {
+ time_sec = desc.lastwrite.tv_sec + (desc.lastwrite.tv_nsec / 1e9);
+ gmtime_r(&time_sec, &tt);
+ strftime(buf, HEADER_TIME_FMT_LEN , HEADER_TIME_FMT , &tt);
+
+ syslog(LOG_INFO, "Fault Logged on %s - Valid\n", buf);
+ }
+
+ rv = unlink(HARDFAULT_PATH);
+ if (rv < 0)
+ {
+ syslog(LOG_INFO, "stm32 bbsram: Failed to unlink Fault Log file"
+ "[%s] (%d)\n", HARDFAULT_PATH, rv);
+ }
+ }
+#endif /* CONFIG_STM32F4_SAVE_CRASHDUMP */
+
+ return rv;
+}
+
+/****************************************************************************
+ * Name: board_crashdump
+ ****************************************************************************/
+
+#if defined(CONFIG_STM32F4_SAVE_CRASHDUMP)
+void board_crashdump(uintptr_t currentsp, FAR void *tcb,
+ FAR const uint8_t *filename, int lineno)
+{
+ fullcontext_t *pdump = (fullcontext_t *)&g_sdata;
+ FAR struct tcb_s *rtcb;
+ int rv;
+
+ enter_critical_section();
+
+ rtcb = (FAR struct tcb_s *)tcb;
+
+ /* Zero out everything */
+
+ memset(pdump, 0, sizeof(fullcontext_t));
+
+ /* Save Info */
+
+ pdump->info.lineno = lineno;
+
+ if (filename)
+ {
+ int offset = 0;
+ unsigned int len = strlen((char *)filename) + 1;
+
+ if (len > sizeof(pdump->info.filename))
+ {
+ offset = len - sizeof(pdump->info.filename);
+ }
+
+ strncpy(pdump->info.filename, (char *)&filename[offset],
+ sizeof(pdump->info.filename));
+ }
+
+ /* Save the value of the pointer for current_regs as debugging info.
+ * It should be NULL in case of an ASSERT and will aid in cross
+ * checking the validity of system memory at the time of the
+ * fault.
+ */
+
+ pdump->info.current_regs = (uintptr_t) CURRENT_REGS;
+
+ /* Save Context */
+
+#if CONFIG_TASK_NAME_SIZE > 0
+ strncpy(pdump->info.name, rtcb->name, CONFIG_TASK_NAME_SIZE);
+#endif
+
+ pdump->info.pid = rtcb->pid;
+
+ /* If current_regs is not NULL then we are in an interrupt context
+ * and the user context is in current_regs else we are running in
+ * the users context
+ */
+
+ if (CURRENT_REGS)
+ {
+ pdump->info.stacks.interrupt.sp = currentsp;
+ pdump->info.flags |= (REGS_PRESENT | USERSTACK_PRESENT | \
+ INTSTACK_PRESENT);
+ memcpy(pdump->info.regs, (void *)CURRENT_REGS,
+ sizeof(pdump->info.regs));
+ pdump->info.stacks.user.sp = pdump->info.regs[REG_R13];
+ }
+ else
+ {
+ /* users context */
+
+ pdump->info.flags |= USERSTACK_PRESENT;
+ pdump->info.stacks.user.sp = currentsp;
+ }
+
+ if (pdump->info.pid == 0)
+ {
+ pdump->info.stacks.user.top = g_idle_topstack - 4;
+ pdump->info.stacks.user.size = CONFIG_IDLETHREAD_STACKSIZE;
+ }
+ else
+ {
+ pdump->info.stacks.user.top = (uint32_t) rtcb->adj_stack_ptr;
+ pdump->info.stacks.user.size = (uint32_t) rtcb->adj_stack_size;
+ }
+
+#if CONFIG_ARCH_INTERRUPTSTACK > 3
+ /* Get the limits on the interrupt stack memory */
+
+ pdump->info.stacks.interrupt.top = (uint32_t)&g_intstackbase;
+ pdump->info.stacks.interrupt.size = (CONFIG_ARCH_INTERRUPTSTACK & ~3);
+
+ /* If In interrupt Context save the interrupt stack data centered
+ * about the interrupt stack pointer
+ */
+
+ if ((pdump->info.flags & INTSTACK_PRESENT) != 0)
+ {
+ stack_word_t *ps = (stack_word_t *) pdump->info.stacks.interrupt.sp;
+ copy_reverse(pdump->istack, &ps[ARRAYSIZE(pdump->istack) / 2],
+ ARRAYSIZE(pdump->istack));
+ }
+
+ /* Is it Invalid? */
+
+ if (!(pdump->info.stacks.interrupt.sp
+ <= pdump->info.stacks.interrupt.top &&
+ pdump->info.stacks.interrupt.sp > pdump->info.stacks.interrupt.top -
+ pdump->info.stacks.interrupt.size))
+ {
+ pdump->info.flags |= INVALID_INTSTACK_PTR;
+ }
+
+#endif
+ /* If In interrupt context or User save the user stack data centered
+ * about the user stack pointer
+ */
+
+ if ((pdump->info.flags & USERSTACK_PRESENT) != 0)
+ {
+ stack_word_t *ps = (stack_word_t *) pdump->info.stacks.user.sp;
+ copy_reverse(pdump->ustack, &ps[ARRAYSIZE(pdump->ustack) / 2],
+ ARRAYSIZE(pdump->ustack));
+ }
+
+ /* Is it Invalid? */
+
+ if (!(pdump->info.stacks.user.sp <= pdump->info.stacks.user.top &&
+ pdump->info.stacks.user.sp > pdump->info.stacks.user.top -
+ pdump->info.stacks.user.size))
+ {
+ pdump->info.flags |= INVALID_USERSTACK_PTR;
+ }
+
+ rv = stm32_bbsram_savepanic(HARDFAULT_FILENO, (uint8_t *)pdump,
+ sizeof(fullcontext_t));
+
+ /* Test if memory got wiped because of using _sdata */
+
+ if (rv == -ENXIO)
+ {
+ char *dead = "Memory wiped - dump not saved!";
+
+ while (*dead)
+ {
+ up_lowputc(*dead++);
+ }
+ }
+ else if (rv == -ENOSPC)
+ {
+ /* hard fault again */
+
+ up_lowputc('!');
+ }
+}
+#endif /* CONFIG_STM32F4_SAVE_CRASHDUMP */
+
+#endif /* CONFIG_STM32_BBSRAM */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_boot.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_boot.c
new file mode 100644
index 0000000..eb4fe85
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_boot.c
@@ -0,0 +1,95 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_boot.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "nucleo-144.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ * All STM32 architectures must provide the following entry point.
+ * This entry point is called early in the initialization
+ * after all memory has been configured and mapped but
+ * before any devices have been initialized.
+ *
+ ****************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+#ifdef CONFIG_ARCH_LEDS
+ /* Configure on-board LEDs if LED support has been selected. */
+
+ board_autoled_initialize();
+#endif
+
+#if defined(CONFIG_STM32F4_OTGFS) || defined(CONFIG_STM32F4_HOST)
+ stm32_usbinitialize();
+#endif
+
+#if defined(CONFIG_SPI)
+ /* Configure SPI chip selects */
+
+ stm32_spidev_initialize();
+#endif
+}
+
+/****************************************************************************
+ * Name: board_late_initialize
+ *
+ * Description:
+ * If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
+ * initialization call will be performed in the boot-up sequence to a
+ * function called board_late_initialize(). board_late_initialize()
+ * will be called immediately after up_initialize() is called and
+ * just before the initial application is started. This additional
+ * initialization phase may be used, for example, to initialize
+ * board-specific device drivers.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_BOARD_LATE_INITIALIZE
+void board_late_initialize(void)
+{
+#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
+ /* Perform NSH initialization here instead of from the NSH. This
+ * alternative NSH initialization is necessary when NSH is ran in
+ * user-space but the initialization function must run in kernel space.
+ */
+
+ board_app_initialize(0);
+#endif
+}
+#endif
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_buttons.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_buttons.c
new file mode 100644
index 0000000..40e9e6e
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_buttons.c
@@ -0,0 +1,107 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_buttons.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stddef.h>
+#include <errno.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/board.h>
+
+#include <arch/board/board.h>
+
+#include "stm32_gpio.h"
+#include "nucleo-144.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ * board_button_initialize() must be called to initialize button resources.
+ * After that, board_buttons() may be called to collect the current state
+ * of all buttons or board_button_irq() may be called to register button
+ * interrupt handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+ stm32_configgpio(GPIO_BTN_USER);
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint32_t board_buttons(void)
+{
+ return stm32_gpioread(GPIO_BTN_USER) ? 1 : 0;
+}
+
+/****************************************************************************
+ * Button support.
+ *
+ * Description:
+ * board_button_initialize() must be called to initialize button resources.
+ * After that, board_buttons() may be called to collect the current
+ * state of all buttons or board_button_irq() may be called to register
+ * button interrupt handlers.
+ *
+ * After board_button_initialize() has been called, board_buttons()
+ * may be called to collect the state of all buttons. board_buttons()
+ * returns an 32-bit bit set with each bit associated with a button.
+ * See the BUTTON_*_BIT definitions in board.h for the meaning of each
+ * bit.
+ *
+ * board_button_irq() may be called to register an interrupt handler that
+ * will be called when a button is depressed or released. The ID value
+ * is a button enumeration value that uniquely identifies a button
+ * resource. See the BUTTON_* definitions in board.h for the meaning of
+ * enumeration value.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
+{
+ int ret = -EINVAL;
+
+ if (id == BUTTON_USER)
+ {
+ ret = stm32_gpiosetevent(GPIO_BTN_USER,
+ true, true, true,
+ irqhandler, arg);
+ }
+
+ return ret;
+}
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_dma_alloc.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_dma_alloc.c
new file mode 100644
index 0000000..cc38caa
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_dma_alloc.c
@@ -0,0 +1,105 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/stc/stm32_dma_alloc.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <syslog.h>
+#include <stdint.h>
+#include <errno.h>
+#include <nuttx/mm/gran.h>
+
+#include "nucleo-144.h"
+
+#if defined(CONFIG_FAT_DMAMEMORY)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if !defined(CONFIG_GRAN)
+# error microSD DMA support requires CONFIG_GRAN
+#endif
+
+#define BOARD_DMA_ALLOC_POOL_SIZE (8*512)
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static GRAN_HANDLE dma_allocator;
+
+/* The DMA heap size constrains the total number of things that can be
+ * ready to do DMA at a time.
+ *
+ * For example, FAT DMA depends on one sector-sized buffer per
+ * filesystem plus one sector-sized buffer per file.
+ *
+ * We use a fundamental alignment / granule size of 64B; this is
+ * sufficient to guarantee alignment for the largest STM32 DMA burst
+ * (16 beats x 32bits).
+ */
+
+static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE]
+ __attribute__((aligned(64)));
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_dma_alloc_init
+ *
+ * Description:
+ * All boards may optionally provide this API to instantiate a pool of
+ * memory for uses with FAST FS DMA operations.
+ *
+ ****************************************************************************/
+
+int stm32_dma_alloc_init(void)
+{
+ dma_allocator = gran_initialize(g_dma_heap,
+ sizeof(g_dma_heap),
+ 7, /* 128B granule - must be > alignment (XXX bug?) */
+ 6); /* 64B alignment */
+
+ if (dma_allocator == NULL)
+ {
+ return -ENOMEM;
+ }
+
+ return OK;
+}
+
+/* DMA-aware allocator stubs for the FAT filesystem. */
+
+void *fat_dma_alloc(size_t size)
+{
+ return gran_alloc(dma_allocator, size);
+}
+
+void fat_dma_free(FAR void *memory, size_t size)
+{
+ gran_free(dma_allocator, memory, size);
+}
+
+#endif /* CONFIG_FAT_DMAMEMORY */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_gpio.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_gpio.c
new file mode 100644
index 0000000..5469b63
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_gpio.c
@@ -0,0 +1,321 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_gpio.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/clock.h>
+#include <nuttx/wdog.h>
+#include <nuttx/ioexpander/gpio.h>
+
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "nucleo-144.h"
+
+#if defined(CONFIG_DEV_GPIO) && !defined(CONFIG_GPIO_LOWER_HALF)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct stm32gpio_dev_s
+{
+ struct gpio_dev_s gpio;
+ uint8_t id;
+};
+
+struct stm32gpint_dev_s
+{
+ struct stm32gpio_dev_s stm32gpio;
+ pin_interrupt_t callback;
+};
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value);
+static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value);
+static int gpout_write(FAR struct gpio_dev_s *dev, bool value);
+static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value);
+static int gpint_attach(FAR struct gpio_dev_s *dev,
+ pin_interrupt_t callback);
+static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static const struct gpio_operations_s gpin_ops =
+{
+ .go_read = gpin_read,
+ .go_write = NULL,
+ .go_attach = NULL,
+ .go_enable = NULL,
+};
+
+static const struct gpio_operations_s gpout_ops =
+{
+ .go_read = gpout_read,
+ .go_write = gpout_write,
+ .go_attach = NULL,
+ .go_enable = NULL,
+};
+
+static const struct gpio_operations_s gpint_ops =
+{
+ .go_read = gpint_read,
+ .go_write = NULL,
+ .go_attach = gpint_attach,
+ .go_enable = gpint_enable,
+};
+
+#if BOARD_NGPIOIN > 0
+/* This array maps the GPIO pins used as INPUT */
+
+static const uint32_t g_gpioinputs[BOARD_NGPIOIN] =
+{
+ GPIO_IN1,
+};
+
+static struct stm32gpio_dev_s g_gpin[BOARD_NGPIOIN];
+#endif
+
+#if BOARD_NGPIOOUT
+/* This array maps the GPIO pins used as OUTPUT */
+
+static const uint32_t g_gpiooutputs[BOARD_NGPIOOUT] =
+{
+ GPIO_OUT1,
+};
+
+static struct stm32gpio_dev_s g_gpout[BOARD_NGPIOOUT];
+#endif
+
+#if BOARD_NGPIOINT > 0
+/* This array maps the GPIO pins used as INTERRUPT INPUTS */
+
+static const uint32_t g_gpiointinputs[BOARD_NGPIOINT] =
+{
+ GPIO_INT1,
+};
+
+static struct stm32gpint_dev_s g_gpint[BOARD_NGPIOINT];
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+static int stm32gpio_interrupt(int irq, void *context, void *arg)
+{
+ FAR struct stm32gpint_dev_s *stm32gpint =
+ (FAR struct stm32gpint_dev_s *)arg;
+
+ DEBUGASSERT(stm32gpint != NULL && stm32gpint->callback != NULL);
+ gpioinfo("Interrupt! callback=%p\n", stm32gpint->callback);
+
+ stm32gpint->callback(&stm32gpint->stm32gpio.gpio,
+ stm32gpint->stm32gpio.id);
+ return OK;
+}
+
+static int gpin_read(FAR struct gpio_dev_s *dev, FAR bool *value)
+{
+ FAR struct stm32gpio_dev_s *stm32gpio =
+ (FAR struct stm32gpio_dev_s *)dev;
+
+ DEBUGASSERT(stm32gpio != NULL && value != NULL);
+ DEBUGASSERT(stm32gpio->id < BOARD_NGPIOIN);
+ gpioinfo("Reading...\n");
+
+ *value = stm32_gpioread(g_gpioinputs[stm32gpio->id]);
+ return OK;
+}
+
+static int gpout_read(FAR struct gpio_dev_s *dev, FAR bool *value)
+{
+ FAR struct stm32gpio_dev_s *stm32gpio =
+ (FAR struct stm32gpio_dev_s *)dev;
+
+ DEBUGASSERT(stm32gpio != NULL && value != NULL);
+ DEBUGASSERT(stm32gpio->id < BOARD_NGPIOOUT);
+ gpioinfo("Reading...\n");
+
+ *value = stm32_gpioread(g_gpiooutputs[stm32gpio->id]);
+ return OK;
+}
+
+static int gpout_write(FAR struct gpio_dev_s *dev, bool value)
+{
+ FAR struct stm32gpio_dev_s *stm32gpio =
+ (FAR struct stm32gpio_dev_s *)dev;
+
+ DEBUGASSERT(stm32gpio != NULL);
+ DEBUGASSERT(stm32gpio->id < BOARD_NGPIOOUT);
+ gpioinfo("Writing %d\n", (int)value);
+
+ stm32_gpiowrite(g_gpiooutputs[stm32gpio->id], value);
+ return OK;
+}
+
+static int gpint_read(FAR struct gpio_dev_s *dev, FAR bool *value)
+{
+ FAR struct stm32gpint_dev_s *stm32gpint =
+ (FAR struct stm32gpint_dev_s *)dev;
+
+ DEBUGASSERT(stm32gpint != NULL && value != NULL);
+ DEBUGASSERT(stm32gpint->stm32gpio.id < BOARD_NGPIOINT);
+ gpioinfo("Reading int pin...\n");
+
+ *value = stm32_gpioread(g_gpiointinputs[stm32gpint->stm32gpio.id]);
+ return OK;
+}
+
+static int gpint_attach(FAR struct gpio_dev_s *dev,
+ pin_interrupt_t callback)
+{
+ FAR struct stm32gpint_dev_s *stm32gpint =
+ (FAR struct stm32gpint_dev_s *)dev;
+
+ gpioinfo("Attaching the callback\n");
+
+ /* Make sure the interrupt is disabled */
+
+ stm32_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id], false,
+ false, false, NULL, NULL);
+
+ gpioinfo("Attach %p\n", callback);
+ stm32gpint->callback = callback;
+ return OK;
+}
+
+static int gpint_enable(FAR struct gpio_dev_s *dev, bool enable)
+{
+ FAR struct stm32gpint_dev_s *stm32gpint =
+ (FAR struct stm32gpint_dev_s *)dev;
+
+ if (enable)
+ {
+ if (stm32gpint->callback != NULL)
+ {
+ gpioinfo("Enabling the interrupt\n");
+
+ /* Configure the interrupt for rising edge */
+
+ stm32_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id],
+ true, false, false, stm32gpio_interrupt,
+ &g_gpint[stm32gpint->stm32gpio.id]);
+ }
+ }
+ else
+ {
+ gpioinfo("Disable the interrupt\n");
+ stm32_gpiosetevent(g_gpiointinputs[stm32gpint->stm32gpio.id],
+ false, false, false, NULL, NULL);
+ }
+
+ return OK;
+}
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_gpio_initialize
+ *
+ * Description:
+ * Initialize GPIO drivers for use with /apps/examples/gpio
+ *
+ ****************************************************************************/
+
+int stm32_gpio_initialize(void)
+{
+ int i;
+ int pincount = 0;
+
+#if BOARD_NGPIOIN > 0
+ for (i = 0; i < BOARD_NGPIOIN; i++)
+ {
+ /* Setup and register the GPIO pin */
+
+ g_gpin[i].gpio.gp_pintype = GPIO_INPUT_PIN;
+ g_gpin[i].gpio.gp_ops = &gpin_ops;
+ g_gpin[i].id = i;
+ gpio_pin_register(&g_gpin[i].gpio, pincount);
+
+ /* Configure the pin that will be used as input */
+
+ stm32_configgpio(g_gpioinputs[i]);
+
+ pincount++;
+ }
+#endif
+
+#if BOARD_NGPIOOUT > 0
+ for (i = 0; i < BOARD_NGPIOOUT; i++)
+ {
+ /* Setup and register the GPIO pin */
+
+ g_gpout[i].gpio.gp_pintype = GPIO_OUTPUT_PIN;
+ g_gpout[i].gpio.gp_ops = &gpout_ops;
+ g_gpout[i].id = i;
+ gpio_pin_register(&g_gpout[i].gpio, pincount);
+
+ /* Configure the pin that will be used as output */
+
+ stm32_gpiowrite(g_gpiooutputs[i], 0);
+ stm32_configgpio(g_gpiooutputs[i]);
+
+ pincount++;
+ }
+#endif
+
+#if BOARD_NGPIOINT > 0
+ for (i = 0; i < BOARD_NGPIOINT; i++)
+ {
+ /* Setup and register the GPIO pin */
+
+ g_gpint[i].stm32gpio.gpio.gp_pintype = GPIO_INTERRUPT_PIN;
+ g_gpint[i].stm32gpio.gpio.gp_ops = &gpint_ops;
+ g_gpint[i].stm32gpio.id = i;
+ gpio_pin_register(&g_gpint[i].stm32gpio.gpio, pincount);
+
+ /* Configure the pin that will be used as interrupt input */
+
+ stm32_configgpio(g_gpiointinputs[i]);
+
+ pincount++;
+ }
+#endif
+
+ return 0;
+}
+#endif /* CONFIG_DEV_GPIO && !CONFIG_GPIO_LOWER_HALF */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_pwm.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_pwm.c
new file mode 100644
index 0000000..0a21395
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_pwm.c
@@ -0,0 +1,147 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_pwm.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <errno.h>
+#include <debug.h>
+#include <sys/types.h>
+
+#include <nuttx/board.h>
+#include <nuttx/timers/pwm.h>
+#include <arch/board/board.h>
+
+#include "chip.h"
+#include "up_arch.h"
+#include "stm32_pwm.h"
+#include "nucleo-144.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define HAVE_PWM 1
+#ifndef CONFIG_PWM
+# undef HAVE_PWM
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_pwm_setup
+ *
+ * Description:
+ * Initialize PWM and register the PWM device.
+ *
+ ****************************************************************************/
+
+int stm32_pwm_setup(void)
+{
+#ifdef HAVE_PWM
+ static bool initialized = false;
+ struct pwm_lowerhalf_s *pwm;
+ int ret;
+
+ /* Have we already initialized? */
+
+ if (!initialized)
+ {
+ /* Call stm32_pwminitialize() to get an instance of the PWM interface */
+
+#if defined(CONFIG_STM32F4_TIM1_PWM)
+ pwm = stm32_pwminitialize(1);
+ if (!pwm)
+ {
+ aerr("ERROR: Failed to get the STM32F4 PWM lower half\n");
+ return -ENODEV;
+ }
+
+ ret = pwm_register("/dev/pwm0", pwm);
+ if (ret < 0)
+ {
+ aerr("ERROR: pwm_register failed: %d\n", ret);
+ return ret;
+ }
+#endif
+
+#if defined(CONFIG_STM32F4_TIM2_PWM)
+ pwm = stm32_pwminitialize(2);
+ if (!pwm)
+ {
+ aerr("ERROR: Failed to get the STM32F4 PWM lower half\n");
+ return -ENODEV;
+ }
+
+ ret = pwm_register("/dev/pwm1", pwm);
+ if (ret < 0)
+ {
+ aerr("ERROR: pwm_register failed: %d\n", ret);
+ return ret;
+ }
+#endif
+
+#if defined(CONFIG_STM32F4_TIM3_PWM)
+ pwm = stm32_pwminitialize(3);
+ if (!pwm)
+ {
+ aerr("ERROR: Failed to get the STM32F4 PWM lower half\n");
+ return -ENODEV;
+ }
+
+ ret = pwm_register("/dev/pwm2", pwm);
+ if (ret < 0)
+ {
+ aerr("ERROR: pwm_register failed: %d\n", ret);
+ return ret;
+ }
+#endif
+
+#if defined(CONFIG_STM32F4_TIM4_PWM)
+ pwm = stm32_pwminitialize(4);
+ if (!pwm)
+ {
+ aerr("ERROR: Failed to get the STM32F4 PWM lower half\n");
+ return -ENODEV;
+ }
+
+ ret = pwm_register("/dev/pwm3", pwm);
+ if (ret < 0)
+ {
+ aerr("ERROR: pwm_register failed: %d\n", ret);
+ return ret;
+ }
+
+#endif
+ /* Now we are initialized */
+
+ initialized = true;
+ }
+
+ return OK;
+#else
+ return -ENODEV;
+#endif
+}
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_reset.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_reset.c
new file mode 100644
index 0000000..457ffee
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_reset.c
@@ -0,0 +1,62 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_reset.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/board.h>
+
+#ifdef CONFIG_BOARDCTL_RESET
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_reset
+ *
+ * Description:
+ * Reset board. Support for this function is required by board-level
+ * logic if CONFIG_BOARDCTL_RESET is selected.
+ *
+ * Input Parameters:
+ * status - Status information provided with the reset event. This
+ * meaning of this status information is board-specific. If not
+ * used by a board, the value zero may be provided in calls to
+ * board_reset().
+ *
+ * Returned Value:
+ * If this function returns, then it was not possible to power-off the
+ * board due to some constraints. The return value int this case is a
+ * board-specific reason for the failure to shutdown.
+ *
+ ****************************************************************************/
+
+int board_reset(int status)
+{
+ up_systemreset();
+ return 0;
+}
+
+#endif /* CONFIG_BOARDCTL_RESET */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_romfs.h b/boards/arm/stm32/nucleo-f429zi/src/stm32_romfs.h
new file mode 100644
index 0000000..7039b46
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_romfs.h
@@ -0,0 +1,61 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_romfs.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __BOARDS_ARM_STM32F4_NUCLEOF429ZI_SRC_STM32_ROMFS_H
+#define __BOARDS_ARM_STM32F4_NUCLEOF429ZI_SRC_STM32_ROMFS_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifdef CONFIG_STM32_ROMFS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define ROMFS_SECTOR_SIZE 64
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_romfs_initialize
+ *
+ * Description:
+ * Registers built-in ROMFS image as block device and mounts it.
+ *
+ * Returned Value:
+ * Zero (OK) on success, a negated errno value on error.
+ *
+ * Assumptions/Limitations:
+ * Memory addresses [&romfs_data_begin .. &romfs_data_begin) should contain
+ * ROMFS volume data, as included in the assembly snippet above (l. 84).
+ *
+ ****************************************************************************/
+
+int stm32_romfs_initialize(void);
+
+#endif /* CONFIG_STM32_ROMFS */
+
+#endif /* __BOARDS_ARM_STM32F4_NUCLEOF429ZI_SRC_STM32_ROMFS_H */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_romfs_initialize.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_romfs_initialize.c
new file mode 100644
index 0000000..ef7c63c
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_romfs_initialize.c
@@ -0,0 +1,141 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_romfs_initialize.c
+ * This file provides contents of an optional ROMFS volume, mounted at boot.
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/mount.h>
+#include <sys/types.h>
+#include <stdint.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/drivers/ramdisk.h>
+#include "stm32_romfs.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#ifndef CONFIG_STM32_ROMFS
+# error "CONFIG_STM32_ROMFS must be defined"
+#else
+
+#ifndef CONFIG_STM32_ROMFS_IMAGEFILE
+# error "CONFIG_STM32_ROMFS_IMAGEFILE must be defined"
+#endif
+
+#ifndef CONFIG_STM32_ROMFS_DEV_MINOR
+# error "CONFIG_STM32_ROMFS_DEV_MINOR must be defined"
+#endif
+
+#ifndef CONFIG_STM32_ROMFS_MOUNTPOINT
+# error "CONFIG_STM32_ROMFS_MOUNTPOINT must be defined"
+#endif
+
+#define NSECTORS(size) (((size) + ROMFS_SECTOR_SIZE - 1)/ROMFS_SECTOR_SIZE)
+
+#define STR2(m) #m
+#define STR(m) STR2(m)
+
+#define MKMOUNT_DEVNAME(m) "/dev/ram" STR(m)
+#define MOUNT_DEVNAME MKMOUNT_DEVNAME(CONFIG_STM32_ROMFS_DEV_MINOR)
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+__asm__ (
+ " .section .rodata \n"
+ " .balign 16 \n"
+ " .globl romfs_data_begin \n"
+ "romfs_data_begin: \n"
+ " .incbin " STR(CONFIG_STM32_ROMFS_IMAGEFILE)"\n"
+ " .balign " STR(ROMFS_SECTOR_SIZE) "\n"
+ " .globl romfs_data_end \n"
+ "romfs_data_end: \n"
+ " .globl romfs_data_size \n"
+ "romfs_data_size: \n"
+ " .word romfs_data_end - romfs_data_begin \n"
+ );
+
+extern const char romfs_data_begin;
+extern const char romfs_data_end;
+extern const int romfs_data_size;
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_romfs_initialize
+ *
+ * Description:
+ * Registers the aboveincluded binary file as block device.
+ * Then mounts the block device as ROMFS filesystems.
+ *
+ * Returned Value:
+ * Zero (OK) on success, a negated errno value on error.
+ *
+ * Assumptions/Limitations:
+ * Memory addresses [&romfs_data_begin .. &romfs_data_begin) should contain
+ * ROMFS volume data, as included in the assembly snippet above (l. 84).
+ *
+ ****************************************************************************/
+
+int stm32_romfs_initialize(void)
+{
+ uintptr_t romfs_data_len;
+ int ret;
+
+ /* Create a ROM disk for the /etc filesystem */
+
+ romfs_data_len = (uintptr_t)&romfs_data_end - (uintptr_t)&romfs_data_begin;
+
+ ret = romdisk_register(CONFIG_STM32_ROMFS_DEV_MINOR, &romfs_data_begin,
+ NSECTORS(romfs_data_len), ROMFS_SECTOR_SIZE);
+ if (ret < 0)
+ {
+ ferr("ERROR: romdisk_register failed: %d\n", -ret);
+ return ret;
+ }
+
+ /* Mount the file system */
+
+ finfo("Mounting ROMFS filesystem at target=%s with source=%s\n",
+ CONFIG_STM32_ROMFS_MOUNTPOINT, MOUNT_DEVNAME);
+
+ ret = mount(MOUNT_DEVNAME, CONFIG_STM32_ROMFS_MOUNTPOINT,
+ "romfs", MS_RDONLY, NULL);
+ if (ret < 0)
+ {
+ ferr("ERROR: mount(%s,%s,romfs) failed: %d\n",
+ MOUNT_DEVNAME, CONFIG_STM32_ROMFS_MOUNTPOINT, errno);
+ return ret;
+ }
+
+ return OK;
+}
+
+#endif /* CONFIG_STM32_ROMFS */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_sdio.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_sdio.c
new file mode 100644
index 0000000..9e529cb
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_sdio.c
@@ -0,0 +1,165 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_sdio.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+
+#include <nuttx/sdio.h>
+#include <nuttx/mmcsd.h>
+
+#include "chip.h"
+#include "nucleo-144.h"
+#include "stm32_gpio.h"
+#include "stm32_sdmmc.h"
+
+#ifdef CONFIG_MMCSD
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
+
+/* Card detections requires card support and a card detection GPIO */
+
+#define HAVE_NCD 1
+#if !defined(GPIO_SDMMC1_NCD)
+# undef HAVE_NCD
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static FAR struct sdio_dev_s *g_sdio_dev;
+#ifdef HAVE_NCD
+static bool g_sd_inserted = 0xff; /* Impossible value */
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_ncd_interrupt
+ *
+ * Description:
+ * Card detect interrupt handler.
+ *
+ ****************************************************************************/
+
+#ifdef HAVE_NCD
+static int stm32_ncd_interrupt(int irq, FAR void *context)
+{
+ bool present;
+
+ present = !stm32_gpioread(GPIO_SDMMC1_NCD);
+ if (g_sdio_dev && present != g_sd_inserted)
+ {
+ sdio_mediachange(g_sdio_dev, present);
+ g_sd_inserted = present;
+ }
+
+ return OK;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_sdio_initialize
+ *
+ * Description:
+ * Initialize SDIO-based MMC/SD card support
+ *
+ ****************************************************************************/
+
+int stm32_sdio_initialize(void)
+{
+ int ret;
+
+#ifdef HAVE_NCD
+ /* Card detect */
+
+ bool cd_status;
+
+ /* Configure the card detect GPIO */
+
+ stm32_configgpio(GPIO_SDMMC1_NCD);
+
+ /* Register an interrupt handler for the card detect pin */
+
+ stm32_gpiosetevent(GPIO_SDMMC1_NCD, true, true, true,
+ stm32_ncd_interrupt, NULL);
+#endif
+
+ /* Mount the SDIO-based MMC/SD block driver
+ * First, get an instance of the SDIO interface
+ */
+
+ finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
+
+ g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
+ if (!g_sdio_dev)
+ {
+ ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
+ return -ENODEV;
+ }
+
+ /* Now bind the SDIO interface to the MMC/SD driver */
+
+ finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
+
+ ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
+ if (ret != OK)
+ {
+ ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
+ return ret;
+ }
+
+ finfo("Successfully bound SDIO to the MMC/SD driver\n");
+
+#ifdef HAVE_NCD
+ /* Use SD card detect pin to check if a card is g_sd_inserted */
+
+ cd_status = !stm32_gpioread(GPIO_SDMMC1_NCD);
+ finfo("Card detect : %d\n", cd_status);
+
+ sdio_mediachange(g_sdio_dev, cd_status);
+#else
+ /* Assume that the SD card is inserted. What choice do we have? */
+
+ sdio_mediachange(g_sdio_dev, true);
+#endif
+
+ return OK;
+}
+
+#endif /* HAVE_SDIO */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_spi.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_spi.c
new file mode 100644
index 0000000..504e800
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_spi.c
@@ -0,0 +1,444 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_spi.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/spi/spi.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_spi.h"
+
+#include "nucleo-144.h"
+
+#if defined(CONFIG_SPI)
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
+
+#if defined(CONFIG_NUCLEO_SPI1_TEST)
+# if defined(CONFIG_NUCLEO_SPI1_TEST_MODE0)
+# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE0
+# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE1)
+# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE1
+# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE2)
+# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE2
+# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE3)
+# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE3
+# else
+# error "No CONFIG_NUCLEO_SPI1_TEST_MODEx defined"
+# endif
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI2_TEST)
+# if defined(CONFIG_NUCLEO_SPI2_TEST_MODE0)
+# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE0
+# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE1)
+# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE1
+# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE2)
+# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE2
+# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE3)
+# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE3
+# else
+# error "No CONFIG_NUCLEO_SPI2_TEST_MODEx defined"
+# endif
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI3_TEST)
+# if defined(CONFIG_NUCLEO_SPI3_TEST_MODE0)
+# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE0
+# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE1)
+# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE1
+# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE2)
+# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE2
+# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE3)
+# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE3
+# else
+# error "No CONFIG_NUCLEO_SPI3_TEST_MODEx defined"
+# endif
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* Indexed by NUCLEO_SPI_BUSx_CSx */
+
+static const uint32_t g_spigpio[] =
+{
+#if defined(GPIO_SPI1_CS0)
+ GPIO_SPI1_CS0,
+#endif
+#if defined(GPIO_SPI1_CS1)
+ GPIO_SPI1_CS1,
+#endif
+#if defined(GPIO_SPI1_CS2)
+ GPIO_SPI1_CS2,
+#endif
+#if defined(GPIO_SPI1_CS3)
+ GPIO_SPI1_CS3,
+#endif
+#if defined(GPIO_SPI2_CS0)
+ GPIO_SPI2_CS0,
+#endif
+#if defined(GPIO_SPI2_CS1)
+ GPIO_SPI2_CS1,
+#endif
+#if defined(GPIO_SPI2_CS2)
+ GPIO_SPI2_CS2,
+#endif
+#if defined(GPIO_SPI2_CS3)
+ GPIO_SPI2_CS3,
+#endif
+#if defined(GPIO_SPI3_CS0)
+ GPIO_SPI3_CS0,
+#endif
+#if defined(GPIO_SPI3_CS1)
+ GPIO_SPI3_CS1,
+#endif
+#if defined(GPIO_SPI3_CS2)
+ GPIO_SPI3_CS2,
+#endif
+#if defined(GPIO_SPI3_CS3)
+ GPIO_SPI3_CS3,
+#endif
+};
+
+#if defined(CONFIG_NUCLEO_SPI_TEST)
+# if defined(CONFIG_STM32F4_SPI1)
+struct spi_dev_s *spi1;
+# endif
+# if defined(CONFIG_STM32F4_SPI2)
+struct spi_dev_s *spi2;
+# endif
+# if defined(CONFIG_STM32F4_SPI3)
+struct spi_dev_s *spi3;
+# endif
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ * Called to configure SPI chip select GPIO pins for the Nucleo-144 board.
+ *
+ ****************************************************************************/
+
+void weak_function stm32_spidev_initialize(void)
+{
+ int i;
+
+ /* Configure SPI CS GPIO for output */
+
+ for (i = 0; i < ARRAYSIZE(g_spigpio); i++)
+ {
+ stm32_configgpio(g_spigpio[i]);
+ }
+}
+
+/****************************************************************************
+ * Name: stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status
+ *
+ * Description:
+ * The external functions, stm32_spi1/2/3select and
+ * stm32_spi1/2/3status must be provided by board-specific logic.
+ * They are implementations of the select and status methods of
+ * the SPI interface defined by struct spi_ops_s
+ * (see include/nuttx/spi/spi.h). All other methods
+ * (including stm32_spibus_initialize()) are provided by common
+ * STM32 logic. To use this common SPI logic on your board:
+ *
+ * 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ * pins.
+ * 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status()
+ * functions in your board-specific logic. These functions will
+ * perform chip selection and status operations using GPIOs in
+ * the way your board is configured.
+ * 3. Add a calls to stm32_spibus_initialize() in your low level
+ * application initialization logic
+ * 4. The handle returned by stm32_spibus_initialize() may then be
+ * used to bind the SPI driver to higher level logic (e.g., calling
+ * mmcsd_spislotinitialize(), for example, will bind the SPI
+ * driver to the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F4_SPI1
+void stm32_spi1select(FAR struct spi_dev_s *dev,
+ uint32_t devid,
+ bool selected)
+{
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
+
+ stm32_gpiowrite(g_spigpio[devid], !selected);
+}
+
+uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI2
+void stm32_spi2select(FAR struct spi_dev_s *dev,
+ uint32_t devid,
+ bool selected)
+{
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
+
+ stm32_gpiowrite(g_spigpio[devid], !selected);
+}
+
+uint8_t stm32_spi2status(FAR struct spi_dev_s *dev,
+ uint32_t devid)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI3
+void stm32_spi3select(FAR struct spi_dev_s *dev,
+ uint32_t devid,
+ bool selected)
+{
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
+
+ stm32_gpiowrite(g_spigpio[devid], !selected);
+}
+
+uint8_t stm32_spi3status(FAR struct spi_dev_s *dev,
+ uint32_t devid)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI4
+# ifndef NUCLEO_SPI_BUS4_CS0
+# error "NUCLEO_SPI_BUS4_CSn Are not defined"
+# endif
+
+void stm32_spi4select(FAR struct spi_dev_s *dev,
+ uint32_t devid,
+ bool selected)
+{
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
+ stm32_gpiowrite(g_spigpio[devid], !selected);
+}
+
+uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI5
+# ifndef NUCLEO_SPI_BUS5_CS0
+# error "NUCLEO_SPI_BUS4_CSn Are not defined"
+# endif
+
+void stm32_spi5select(FAR struct spi_dev_s *dev,
+ uint32_t devid,
+ bool selected)
+{
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
+
+ stm32_gpiowrite(g_spigpio[devid], !selected);
+}
+
+uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI6
+# ifndef NUCLEO_SPI_BUS6_CS
+# error "NUCLEO_SPI_BUS4_CSn Are not defined"
+# endif
+void stm32_spi5select(FAR struct spi_dev_s *dev,
+ uint32_t devid,
+ bool selected)
+{
+ spiinfo("devid: %d CS: %s\n",
+ (int)devid, selected ? "assert" : "de-assert");
+
+ stm32_gpiowrite(g_spigpio[devid], !selected);
+}
+
+uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, uint32_t devid)
+{
+ return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_spi1cmddata
+ *
+ * Description:
+ * Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
+ * or command (false). This function must be provided by platform-specific
+ * logic. This is an implementation of the cmddata method of the SPI
+ * interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
+ *
+ * Input Parameters:
+ *
+ * spi - SPI device that controls the bus the device that requires the CMD/
+ * DATA selection.
+ * devid - If there are multiple devices on the bus, this selects which one
+ * to select cmd or data. NOTE: This design restricts, for example,
+ * one one SPI display per SPI bus.
+ * cmd - true: select command; false: select data
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+#ifdef CONFIG_STM32F4_SPI1
+int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+ return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI2
+int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+ return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI3
+int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+ return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI4
+int stm32_spi4cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+ return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI5
+int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+ return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F4_SPI6
+int stm32_spi5cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
+{
+ return -ENODEV;
+}
+#endif
+
+#endif /* CONFIG_SPI_CMDDATA */
+
+#if defined(CONFIG_NUCLEO_SPI_TEST)
+int stm32_spidev_bus_test(void)
+{
+ /* Configure and test SPI */
+
+ uint8_t *tx = (uint8_t *)CONFIG_NUCLEO_SPI_TEST_MESSAGE;
+
+#if defined(CONFIG_NUCLEO_SPI1_TEST)
+ spi1 = stm32_spibus_initialize(1);
+
+ if (!spi1)
+ {
+ syslog(LOG_ERR, "ERROR Failed to initialize SPI port 1\n");
+ return -ENODEV;
+ }
+
+ /* Default SPI1 to NUCLEO_SPI1_FREQ and mode */
+
+ SPI_SETFREQUENCY(spi1, CONFIG_NUCLEO_SPI1_TEST_FREQ);
+ SPI_SETBITS(spi1, CONFIG_NUCLEO_SPI1_TEST_BITS);
+ SPI_SETMODE(spi1, CONFIG_NUCLEO_SPI1_TEST_MODE);
+ SPI_EXCHANGE(spi1, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI2_TEST)
+ spi2 = stm32_spibus_initialize(2);
+
+ if (!spi2)
+ {
+ syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n");
+ return -ENODEV;
+ }
+
+ /* Default SPI2 to NUCLEO_SPI2_FREQ and mode */
+
+ SPI_SETFREQUENCY(spi2, CONFIG_NUCLEO_SPI2_TEST_FREQ);
+ SPI_SETBITS(spi2, CONFIG_NUCLEO_SPI2_TEST_BITS);
+ SPI_SETMODE(spi2, CONFIG_NUCLEO_SPI2_TEST_MODE);
+ SPI_EXCHANGE(spi2, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
+#endif
+
+#if defined(CONFIG_NUCLEO_SPI3_TEST)
+ spi3 = stm32_spibus_initialize(3);
+
+ if (!spi3)
+ {
+ syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n");
+ return -ENODEV;
+ }
+
+ /* Default SPI3 to NUCLEO_SPI3_FREQ and mode */
+
+ SPI_SETFREQUENCY(spi3, CONFIG_NUCLEO_SPI3_TEST_FREQ);
+ SPI_SETBITS(spi3, CONFIG_NUCLEO_SPI3_TEST_BITS);
+ SPI_SETMODE(spi3, CONFIG_NUCLEO_SPI3_TEST_MODE);
+ SPI_EXCHANGE(spi3, tx, NULL, ARRAYSIZE(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
+#endif
+
+ return OK;
+}
+#endif /* NUCLEO_SPI_TEST */
+#endif /* defined(CONFIG_SPI) */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_usb.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_usb.c
new file mode 100644
index 0000000..bdddea6
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_usb.c
@@ -0,0 +1,324 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_usb.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <sched.h>
+#include <errno.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/kthread.h>
+#include <nuttx/usb/usbdev.h>
+#include <nuttx/usb/usbhost.h>
+#include <nuttx/usb/usbdev_trace.h>
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32_gpio.h"
+#include "stm32_otg.h"
+#include "nucleo-144.h"
+
+#ifdef CONFIG_STM32F4_OTGFS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
+# define HAVE_USB 1
+#else
+# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
+# undef HAVE_USB
+#endif
+
+#ifndef CONFIG_NUCLEO144_USBHOST_PRIO
+# define CONFIG_NUCLEO144_USBHOST_PRIO 100
+#endif
+
+#ifndef CONFIG_NUCLEO_USBHOST_STACKSIZE
+# define CONFIG_NUCLEO_USBHOST_STACKSIZE 1024
+#endif
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static struct usbhost_connection_s *g_usbconn;
+#endif
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: usbhost_waiter
+ *
+ * Description:
+ * Wait for USB devices to be connected.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST
+static int usbhost_waiter(int argc, char *argv[])
+{
+ struct usbhost_hubport_s *hport;
+
+ uinfo("Running\n");
+ for (; ; )
+ {
+ /* Wait for the device to change state */
+
+ DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
+ uinfo("%s\n", hport->connected ? "connected" : "disconnected");
+
+ /* Did we just become connected? */
+
+ if (hport->connected)
+ {
+ /* Yes.. enumerate the newly connected device */
+
+ CONN_ENUMERATE(g_usbconn, hport);
+ }
+ }
+
+ /* Keep the compiler from complaining */
+
+ return 0;
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: stm32_usbinitialize
+ *
+ * Description:
+ * Called from stm32_usbinitialize very early in inialization
+ * to setup USB-related GPIO pins for the nucleo-144 board.
+ *
+ ****************************************************************************/
+
+void stm32_usbinitialize(void)
+{
+ /* The OTG FS has an internal soft pull-up.
+ * No GPIO configuration is required
+ */
+
+ /* Configure the OTG FS VBUS sensing GPIO,
+ * Power On, and Overcurrent GPIOs
+ */
+
+#ifdef CONFIG_STM32F4_OTGFS
+ stm32_configgpio(GPIO_OTGFS_VBUS);
+ stm32_configgpio(GPIO_OTGFS_PWRON);
+ stm32_configgpio(GPIO_OTGFS_OVER);
+#endif
+}
+
+/****************************************************************************
+ * Name: stm32_usbhost_initialize
+ *
+ * Description:
+ * Called at application startup time to initialize the
+ * USB host functionality. This function will start a thread
+ * that will monitor for device connection/disconnection events.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_usbhost_initialize(void)
+{
+ int pid;
+#if defined(CONFIG_USBHOST_HUB) || defined(CONFIG_USBHOST_MSC) || \
+ defined(CONFIG_USBHOST_HIDKBD) || defined(CONFIG_USBHOST_HIDMOUSE)
+ int ret;
+#endif
+
+ /* First, register all of the class drivers needed to support the drivers
+ * that we care about:
+ */
+
+ uinfo("Register class drivers\n");
+
+#ifdef CONFIG_USBHOST_HUB
+ /* Initialize USB hub class support */
+
+ ret = usbhost_hub_initialize();
+ if (ret < 0)
+ {
+ uerr("ERROR: usbhost_hub_initialize failed: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_USBHOST_MSC
+ /* Register the USB mass storage class class */
+
+ ret = usbhost_msc_initialize();
+ if (ret != OK)
+ {
+ uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_USBHOST_CDCACM
+ /* Register the CDC/ACM serial class */
+
+ ret = usbhost_cdcacm_initialize();
+ if (ret != OK)
+ {
+ uerr("ERROR: Failed to register the CDC/ACM serial class: %d\n", ret);
+ }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDKBD
+ /* Initialize the HID keyboard class */
+
+ ret = usbhost_kbdinit();
+ if (ret != OK)
+ {
+ uerr("ERROR: Failed to register the HID keyboard class\n");
+ }
+#endif
+
+#ifdef CONFIG_USBHOST_HIDMOUSE
+ /* Initialize the HID mouse class */
+
+ ret = usbhost_mouse_init();
+ if (ret != OK)
+ {
+ uerr("ERROR: Failed to register the HID mouse class\n");
+ }
+#endif
+
+ /* Then get an instance of the USB host interface */
+
+ uinfo("Initialize USB host\n");
+ g_usbconn = stm32_otgfshost_initialize(0);
+ if (g_usbconn)
+ {
+ /* Start a thread to handle device connection. */
+
+ uinfo("Start usbhost_waiter\n");
+
+ pid = kthread_create("usbhost", CONFIG_STM32F4DISCO_USBHOST_PRIO,
+ CONFIG_STM32F4DISCO_USBHOST_STACKSIZE,
+ (main_t)usbhost_waiter, (FAR char * const *)NULL);
+ return pid < 0 ? -ENOEXEC : OK;
+ }
+
+ return -ENODEV;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_usbhost_vbusdrive
+ *
+ * Description:
+ * Enable/disable driving of VBUS 5V output. This function
+ * must be provided be each platform that implements the
+ * STM32 OTG FS host interface
+ *
+ * "On-chip 5 V VBUS generation is not supported. For this reason,
+ * a charge pump or, if 5 V are available on the application board,
+ * a basic power switch, must be added externally to drive the 5 V
+ * VBUS line. The external charge pump can be driven by any GPIO
+ * output. When the application decides to power on VBUS using
+ * the chosen GPIO, it must also set the port power bit in the host port
+ * control and status register (PPWR bit in OTG_FS_HPRT).
+ *
+ * "The application uses this field to control power to this port,
+ * and the core clears this bit on an overcurrent condition."
+ *
+ * Input Parameters:
+ * iface - For future growth to handle multiple USB host interface.
+ * Should be zero.
+ * enable - true: enable VBUS power; false: disable VBUS power
+ *
+ * Returned Value:
+ * None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST
+void stm32_usbhost_vbusdrive(int iface, bool enable)
+{
+ DEBUGASSERT(iface == 0);
+
+ /* Set the Power Switch by driving the active low enable pin */
+
+ stm32_gpiowrite(GPIO_OTGFS_PWRON, !enable);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_setup_overcurrent
+ *
+ * Description:
+ * Setup to receive an interrupt-level callback if an
+ * overcurrent condition is detected.
+ *
+ * Input Parameters:
+ * handler - New overcurrent interrupt handler
+ * arg - The argument provided for the interrupt handler
+ *
+ * Returned Value:
+ * Zero (OK) is returned on success. Otherwise, a negated errno
+ * value is returned to indicate the nature of the failure.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBHOST
+int stm32_setup_overcurrent(xcpt_t handler, void *arg)
+{
+ return stm32_gpiosetevent(GPIO_OTGFS_OVER, true, true, true, handler, arg);
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_usbsuspend
+ *
+ * Description:
+ * Board logic must provide the stm32_usbsuspend logic if the
+ * USBDEV driver is used. This function is called whenever the
+ * USB enters or leaves suspend mode. This is an opportunity
+ * for the board logic to shutdown clocks, power, etc. while the
+ * USB is suspended.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_USBDEV
+void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
+{
+ uinfo("resume: %d\n", resume);
+}
+#endif
+
+#endif /* CONFIG_STM32_OTGFS */
diff --git a/boards/arm/stm32/nucleo-f429zi/src/stm32_userleds.c b/boards/arm/stm32/nucleo-f429zi/src/stm32_userleds.c
new file mode 100644
index 0000000..0d5acd2
--- /dev/null
+++ b/boards/arm/stm32/nucleo-f429zi/src/stm32_userleds.c
@@ -0,0 +1,128 @@
+/****************************************************************************
+ * boards/arm/stm32f4/nucleo-f429zi/src/stm32_userleds.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+#include "stm32_gpio.h"
+#include "nucleo-144.h"
+
+#ifndef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define ARRAYSIZE(x) (sizeof((x)) / sizeof((x)[0]))
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/* This array maps an LED number to GPIO pin configuration and is indexed by
+ * BOARD_LED_<color>
+ */
+
+static const uint32_t g_ledcfg[BOARD_NLEDS] =
+{
+ GPIO_LED_GREEN,
+ GPIO_LED_BLUE,
+ GPIO_LED_RED,
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_userled_initialize
+ *
+ * Description:
+ * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
+ * LEDs. If CONFIG_ARCH_LEDS is not defined, then the
+ * board_userled_initialize() is available to initialize the LED from user
+ * application logic.
+ *
+ ****************************************************************************/
+
+void board_userled_initialize(void)
+{
+ int i;
+
+ /* Configure LED1-3 GPIOs for output */
+
+ for (i = 0; i < ARRAYSIZE(g_ledcfg); i++)
+ {
+ stm32_configgpio(g_ledcfg[i]);
+ }
+}
+
+/****************************************************************************
+ * Name: board_userled
+ *
+ * Description:
+ * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
+ * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled() is
+ * available to control the LED from user application logic.
+ *
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+ if ((unsigned)led < ARRAYSIZE(g_ledcfg))
+ {
+ stm32_gpiowrite(g_ledcfg[led], ledon);
+ }
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ *
+ * Description:
+ * If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
+ * LEDs. If CONFIG_ARCH_LEDS is not defined, then the board_userled_all()
+ * is available to control the LED from user application logic.
+ * NOTE: since there is only a single LED on-board, this is function
+ * is not very useful.
+ *
+ ****************************************************************************/
+
+void board_userled_all(uint8_t ledset)
+{
+ int i;
+
+ /* Configure LED1-3 GPIOs for output */
+
+ for (i = 0; i < ARRAYSIZE(g_ledcfg); i++)
+ {
+ stm32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0);
+ }
+}
+
+#endif /* !CONFIG_ARCH_LEDS */