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Posted to commits@nuttx.apache.org by xi...@apache.org on 2023/05/29 12:45:14 UTC
[nuttx] 04/05: risc-v/mpfs: i2c: add more FPGA i2cs
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 816b971e70f331e290582e6e674c9b652bed168d
Author: Eero Nurkkala <ee...@offcode.fi>
AuthorDate: Fri May 12 12:16:08 2023 +0300
risc-v/mpfs: i2c: add more FPGA i2cs
This adds 2 more FPGA I2Cs. Also rework the indexing
so that it matches the earlier work without major changes.
Signed-off-by: Eero Nurkkala <ee...@offcode.fi>
---
arch/risc-v/src/mpfs/Kconfig | 22 ++++++++--
arch/risc-v/src/mpfs/mpfs_i2c.c | 94 +++++++++++++++++++++++++++++++++--------
2 files changed, 95 insertions(+), 21 deletions(-)
diff --git a/arch/risc-v/src/mpfs/Kconfig b/arch/risc-v/src/mpfs/Kconfig
index c9e5b1b57c..58632cb366 100644
--- a/arch/risc-v/src/mpfs/Kconfig
+++ b/arch/risc-v/src/mpfs/Kconfig
@@ -286,12 +286,28 @@ config MPFS_I2C1
default n
config MPFS_COREI2C0
- bool "Core I2C 0"
- select ARCH_HAVE_I2CRESET
- default n
+ bool "Core I2C 0"
+ depends on !MPFS_I2C0
+ select ARCH_HAVE_I2CRESET
+ default n
---help---
Selects the FPGA i2c0 driver.
+config MPFS_COREI2C1
+ bool "Core I2C 1"
+ depends on !MPFS_I2C1
+ select ARCH_HAVE_I2CRESET
+ default n
+ ---help---
+ Selects the FPGA i2c1 driver.
+
+config MPFS_COREI2C2
+ bool "Core I2C 2"
+ select ARCH_HAVE_I2CRESET
+ default n
+ ---help---
+ Selects the FPGA i2c2 driver.
+
config MPFS_EMMCSD
bool "EMMCSD"
select ARCH_HAVE_SDIO
diff --git a/arch/risc-v/src/mpfs/mpfs_i2c.c b/arch/risc-v/src/mpfs/mpfs_i2c.c
index 59093559a5..82f557577c 100644
--- a/arch/risc-v/src/mpfs/mpfs_i2c.c
+++ b/arch/risc-v/src/mpfs/mpfs_i2c.c
@@ -217,9 +217,9 @@ static struct mpfs_i2c_priv_s g_mpfs_i2c1_lo_priv =
static struct mpfs_i2c_priv_s g_mpfs_corei2c0_priv =
{
.ops = &mpfs_i2c_ops,
- .id = 2,
+ .id = 0,
.hw_base = 0x4b000000,
- .plic_irq = MPFS_IRQ_FABRIC_F2H_3,
+ .plic_irq = MPFS_IRQ_FABRIC_F2H_6,
.msgv = NULL,
.frequency = 0,
.ser_address = 0,
@@ -237,6 +237,54 @@ static struct mpfs_i2c_priv_s g_mpfs_corei2c0_priv =
};
#endif /* CONFIG_MPFS_COREI2C0 */
+#ifdef CONFIG_MPFS_COREI2C1
+static struct mpfs_i2c_priv_s g_mpfs_corei2c1_priv =
+{
+ .ops = &mpfs_i2c_ops,
+ .id = 1,
+ .hw_base = 0x4b001000,
+ .plic_irq = MPFS_IRQ_FABRIC_F2H_7,
+ .msgv = NULL,
+ .frequency = 0,
+ .ser_address = 0,
+ .target_addr = 0,
+ .lock = NXMUTEX_INITIALIZER,
+ .sem_isr = SEM_INITIALIZER(0),
+ .refs = 0,
+ .tx_size = 0,
+ .tx_idx = 0,
+ .rx_size = 0,
+ .rx_idx = 0,
+ .status = MPFS_I2C_SUCCESS,
+ .initialized = false,
+ .fpga = true
+};
+#endif /* CONFIG_MPFS_COREI2C1 */
+
+#ifdef CONFIG_MPFS_COREI2C2
+static struct mpfs_i2c_priv_s g_mpfs_corei2c2_priv =
+{
+ .ops = &mpfs_i2c_ops,
+ .id = 2,
+ .hw_base = 0x4b002000,
+ .plic_irq = MPFS_IRQ_FABRIC_F2H_8,
+ .msgv = NULL,
+ .frequency = 0,
+ .ser_address = 0,
+ .target_addr = 0,
+ .lock = NXMUTEX_INITIALIZER,
+ .sem_isr = SEM_INITIALIZER(0),
+ .refs = 0,
+ .tx_size = 0,
+ .tx_idx = 0,
+ .rx_size = 0,
+ .rx_idx = 0,
+ .status = MPFS_I2C_SUCCESS,
+ .initialized = false,
+ .fpga = true
+};
+#endif /* CONFIG_MPFS_COREI2C2 */
+
static int mpfs_i2c_setfrequency(struct mpfs_i2c_priv_s *priv,
uint32_t frequency);
@@ -263,7 +311,21 @@ static int mpfs_i2c_init(struct mpfs_i2c_priv_s *priv)
{
if (!priv->initialized)
{
- if (priv->id == 0)
+ if (priv->fpga)
+ {
+ /* FIC3 is used by many, don't reset it here, or many
+ * FPGA based modules will stop working right here. Just
+ * bring out of reset instead.
+ */
+
+ modifyreg32(MPFS_SYSREG_SOFT_RESET_CR,
+ SYSREG_SOFT_RESET_CR_FIC3 | SYSREG_SOFT_RESET_CR_FPGA,
+ 0);
+
+ modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0,
+ SYSREG_SUBBLK_CLOCK_CR_FIC3);
+ }
+ else if (priv->id == 0)
{
modifyreg32(MPFS_SYSREG_SOFT_RESET_CR,
0, SYSREG_SOFT_RESET_CR_I2C0);
@@ -285,20 +347,6 @@ static int mpfs_i2c_init(struct mpfs_i2c_priv_s *priv)
modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR,
0, SYSREG_SUBBLK_CLOCK_CR_I2C1);
}
- else if (priv->id == 2)
- {
- /* FIC3 is used by many, don't reset it here, or many
- * FPGA based modules will stop working right here. Just
- * bring out of reset instead.
- */
-
- modifyreg32(MPFS_SYSREG_SOFT_RESET_CR,
- SYSREG_SOFT_RESET_CR_FIC3 | SYSREG_SOFT_RESET_CR_FPGA,
- 0);
-
- modifyreg32(MPFS_SYSREG_SUBBLK_CLOCK_CR, 0,
- SYSREG_SUBBLK_CLOCK_CR_FIC3);
- }
else
{
/* Don't know which one, let's panic */
@@ -872,9 +920,19 @@ struct i2c_master_s *mpfs_i2cbus_initialize(int port)
break;
#endif /* CONFIG_MPFS_I2C1 */
#ifdef CONFIG_MPFS_COREI2C0
- case 2:
+ case 0:
priv = &g_mpfs_corei2c0_priv;
break;
+#endif
+#ifdef CONFIG_MPFS_COREI2C1
+ case 1:
+ priv = &g_mpfs_corei2c1_priv;
+ break;
+#endif
+#ifdef CONFIG_MPFS_COREI2C2
+ case 2:
+ priv = &g_mpfs_corei2c2_priv;
+ break;
#endif
default:
return NULL;