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Posted to commits@nuttx.apache.org by xi...@apache.org on 2023/02/10 02:57:04 UTC
[nuttx] branch master updated: sama5/twi: add support for flexcom twi
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 739688f6c6 sama5/twi: add support for flexcom twi
739688f6c6 is described below
commit 739688f6c6fd95363ff70459a7a0f26eaff75545
Author: Janne Rosberg <ja...@offcode.fi>
AuthorDate: Wed Feb 8 16:40:34 2023 +0200
sama5/twi: add support for flexcom twi
---
arch/arm/src/sama5/Kconfig | 55 ++++++-
arch/arm/src/sama5/Make.defs | 3 +
arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h | 4 +
arch/arm/src/sama5/sam_twi.c | 177 +++++++++++++++++++++-
4 files changed, 234 insertions(+), 5 deletions(-)
diff --git a/arch/arm/src/sama5/Kconfig b/arch/arm/src/sama5/Kconfig
index 07fb9d84a0..fd4d945a0e 100644
--- a/arch/arm/src/sama5/Kconfig
+++ b/arch/arm/src/sama5/Kconfig
@@ -203,6 +203,26 @@ config SAMA5_FLEXCOM_TWI
bool
default n
+config SAMA5_FLEXCOM_TWI0
+ bool
+ default n
+
+config SAMA5_FLEXCOM_TWI1
+ bool
+ default n
+
+config SAMA5_FLEXCOM_TWI2
+ bool
+ default n
+
+config SAMA5_FLEXCOM_TWI3
+ bool
+ default n
+
+config SAMA5_FLEXCOM_TWI4
+ bool
+ default n
+
# Chip Selection
config ARCH_CHIP_SAMA5D2
@@ -864,6 +884,7 @@ config SAMA5_FLEXCOM0_SPI
config SAMA5_FLEXCOM0_TWI
bool "TWI"
select SAMA5_FLEXCOM_TWI
+ select SAMA5_FLEXCOM_TWI0
endchoice # FLEXCOM0 Configuration
@@ -885,6 +906,7 @@ config SAMA5_FLEXCOM1_SPI
config SAMA5_FLEXCOM1_TWI
bool "TWI"
select SAMA5_FLEXCOM_TWI
+ select SAMA5_FLEXCOM_TWI1
endchoice # FLEXCOM1 Configuration
@@ -906,6 +928,7 @@ config SAMA5_FLEXCOM2_SPI
config SAMA5_FLEXCOM2_TWI
bool "TWI"
select SAMA5_FLEXCOM_TWI
+ select SAMA5_FLEXCOM_TWI2
endchoice # FLEXCOM2 Configuration
@@ -927,6 +950,7 @@ config SAMA5_FLEXCOM3_SPI
config SAMA5_FLEXCOM3_TWI
bool "TWI"
select SAMA5_FLEXCOM_TWI
+ select SAMA5_FLEXCOM_TWI3
endchoice # FLEXCOM3 Configuration
@@ -948,6 +972,7 @@ config SAMA5_FLEXCOM4_SPI
config SAMA5_FLEXCOM4_TWI
bool "TWI"
select SAMA5_FLEXCOM_TWI
+ select SAMA5_FLEXCOM_TWI4
endchoice # FLEXCOM4 Configuration
endmenu # Flexcom Configuration
@@ -3172,7 +3197,7 @@ config SAMA5_FLEXCOM_SPI_DMADEBUG
endmenu # Flexcom SPI device driver options
endif # SAMA5_FLEXCOM0_SPI || SAMA5_FLEXCOM1_SPI || SAMA5_FLEXCOM2_SPI || SAMA5_FLEXCOM3_SPI || SAMA5_FLEXCOM4_SPI
-if SAMA5_TWI0 || SAMA5_TWI1 || SAMA5_TWI2 || SAMA5_TWI3
+if SAMA5_TWI0 || SAMA5_TWI1 || SAMA5_TWI2 || SAMA5_TWI3 || SAMA5_FLEXCOM_TWI
menu "TWI device driver options"
@@ -3196,6 +3221,32 @@ config SAMA5_TWI3_FREQUENCY
default 100000
depends on SAMA5_TWI3
+config SAMA5_TWI_FC0_FREQUENCY
+ int "TWI4 (flexcom-0) Frequency"
+ default 100000
+ depends on SAMA5_FLEXCOM_TWI0
+
+config SAMA5_TWI_FC1_FREQUENCY
+ int "TWI5 (flexcom-1) Frequency"
+ default 100000
+ depends on SAMA5_FLEXCOM_TWI1
+
+config SAMA5_TWI_FC2_FREQUENCY
+ int "TWI6 (flexcom-2) Frequency"
+ default 100000
+ depends on SAMA5_FLEXCOM_TWI2
+
+config SAMA5_TWI_FC3_FREQUENCY
+ int "TWI7 (flexcom-3) Frequency"
+ default 100000
+ depends on SAMA5_FLEXCOM_TWI3
+
+config SAMA5_TWI_FC4_FREQUENCY
+ int "TWI8 (flexcom-4) Frequency"
+ default 100000
+ depends on SAMA5_FLEXCOM_TWI4
+
+
config SAMA5_TWI_REGDEBUG
bool "TWI register level debug"
depends on DEBUG_I2C_INFO
@@ -3205,7 +3256,7 @@ config SAMA5_TWI_REGDEBUG
Very invasive! Requires also CONFIG_DEBUG_I2C_INFO.
endmenu # TWI device driver options
-endif # SAMA5_TWI0 || SAMA5_TWI1 || SAMA5_TWI2 || SAMA5_TWI3
+endif # SAMA5_TWI0 || SAMA5_TWI1 || SAMA5_TWI2 || SAMA5_TWI3 | SAMA5_FLEXCOM_TWI
if SAMA5_SSC0 || SAMA5_SSC1
menu "SSC Configuration"
diff --git a/arch/arm/src/sama5/Make.defs b/arch/arm/src/sama5/Make.defs
index c26f442a6a..ccd4599bea 100644
--- a/arch/arm/src/sama5/Make.defs
+++ b/arch/arm/src/sama5/Make.defs
@@ -187,6 +187,9 @@ else
ifeq ($(CONFIG_SAMA5_TWI2),y)
CHIP_CSRCS += sam_twi.c
endif
+ifeq ($(CONFIG_SAMA5_FLEXCOM_TWI),y)
+CHIP_CSRCS += sam_twi.c
+endif
endif
endif
diff --git a/arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h b/arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h
index c8dddb7255..e5b870e5a6 100644
--- a/arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h
+++ b/arch/arm/src/sama5/hardware/_sama5d2x_memorymap.h
@@ -522,6 +522,10 @@
#define SAM_PIOC_VBASE SAM_PIO_IOGROUPC_VBASE
#define SAM_PIOD_VBASE SAM_PIO_IOGROUPD_VBASE
+#define SAM_FLEXCOM_USART_OFFSET (0x200)
+#define SAM_FLEXCOM_SPI_OFFSET (0x400)
+#define SAM_FLEXCOM_TWI_OFFSET (0x600)
+
/* NuttX virtual base address
*
* The boot logic will create a temporarily mapping based on where NuttX is
diff --git a/arch/arm/src/sama5/sam_twi.c b/arch/arm/src/sama5/sam_twi.c
index 41a316a8a8..21f09b943d 100644
--- a/arch/arm/src/sama5/sam_twi.c
+++ b/arch/arm/src/sama5/sam_twi.c
@@ -74,9 +74,15 @@
#include "sam_periphclks.h"
#include "sam_pio.h"
#include "sam_twi.h"
+#include "hardware/sam_flexcom.h"
#if defined(CONFIG_SAMA5_TWI0) || defined(CONFIG_SAMA5_TWI1) || \
- defined(CONFIG_SAMA5_TWI2) || defined(CONFIG_SAMA5_TWI3)
+ defined(CONFIG_SAMA5_TWI2) || defined(CONFIG_SAMA5_TWI3) || \
+ defined(CONFIG_SAMA5_FLEXCOM0_TWI) || \
+ defined(CONFIG_SAMA5_FLEXCOM1_TWI) || \
+ defined(CONFIG_SAMA5_FLEXCOM2_TWI) || \
+ defined(CONFIG_SAMA5_FLEXCOM3_TWI) || \
+ defined(CONFIG_SAMA5_FLEXCOM4_TWI)
/****************************************************************************
* Pre-processor Definitions
@@ -329,6 +335,117 @@ static struct twi_dev_s g_twi3 =
};
#endif
+#ifdef CONFIG_SAMA5_FLEXCOM0_TWI
+static const struct twi_attr_s g_twi4attr =
+ {
+ .twi = 4,
+ .pid = SAM_PID_FLEXCOM0,
+ .irq = SAM_IRQ_FLEXCOM0,
+ .sclcfg = PIO_TWI4_CK,
+ .sdacfg = PIO_TWI4_D,
+ .base = SAM_FLEXCOM0_VBASE + SAM_FLEXCOM_TWI_OFFSET
+ };
+
+static struct twi_dev_s g_twi4 =
+ {
+ .dev =
+ {
+ .ops = &g_twiops,
+ },
+ .attr = &g_twi4attr,
+ .lock = NXMUTEX_INITIALIZER,
+ .waitsem = SEM_INITIALIZER(0),
+ };
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM1_TWI
+static const struct twi_attr_s g_twi5attr =
+ {
+ .twi = 5,
+ .pid = SAM_PID_FLEXCOM1,
+ .irq = SAM_IRQ_FLEXCOM1,
+ .sclcfg = PIO_TWI5_CK,
+ .sdacfg = PIO_TWI5_D,
+ .base = SAM_FLEXCOM1_VBASE + SAM_FLEXCOM_TWI_OFFSET
+ };
+
+static struct twi_dev_s g_twi4 =
+ {
+ .dev =
+ {
+ .ops = &g_twiops,
+ },
+ .attr = &g_twi5attr,
+ .lock = NXMUTEX_INITIALIZER,
+ .waitsem = SEM_INITIALIZER(0),
+ };
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM2_TWI
+static const struct twi_attr_s g_twi6attr =
+ {
+ .twi = 6,
+ .pid = SAM_PID_FLEXCOM2,
+ .irq = SAM_IRQ_FLEXCOM2,
+ .sclcfg = PIO_TWI6_CK,
+ .sdacfg = PIO_TWI6_D,
+ .base = SAM_FLEXCOM2_VBASE + SAM_FLEXCOM_TWI_OFFSET
+ };
+
+static struct twi_dev_s g_twi6 =
+ {
+ .dev =
+ {
+ .ops = &g_twiops,
+ },
+ .attr = &g_twi6attr,
+ .lock = NXMUTEX_INITIALIZER,
+ .waitsem = SEM_INITIALIZER(0),
+ };
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM3_TWI
+static const struct twi_attr_s g_twi7attr =
+ {
+ .twi = 7,
+ .pid = SAM_PID_FLEXCOM3,
+ .irq = SAM_IRQ_FLEXCOM3,
+ .sclcfg = PIO_TWI7_CK,
+ .sdacfg = PIO_TWI7_D,
+ .base = SAM_FLEXCOM3_VBASE + SAM_FLEXCOM_TWI_OFFSET
+ };
+
+static struct twi_dev_s g_twi7 =
+ {
+ .dev =
+ {
+ .ops = &g_twiops,
+ },
+ .attr = &g_twi7attr,
+ .lock = NXMUTEX_INITIALIZER,
+ .waitsem = SEM_INITIALIZER(0),
+ };
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM4_TWI
+static const struct twi_attr_s g_twi8attr =
+ {
+ .twi = 8,
+ .pid = SAM_PID_FLEXCOM3,
+ .irq = SAM_IRQ_FLEXCOM3,
+ .sclcfg = PIO_TWI8_CK,
+ .sdacfg = PIO_TWI8_D,
+ .base = SAM_FLEXCOM4_VBASE + SAM_FLEXCOM_TWI_OFFSET
+ };
+
+static struct twi_dev_s g_twi8 =
+ {
+ .dev =
+ {
+ .ops = &g_twiops,
+ },
+ .attr = &g_twi8attr,
+ .lock = NXMUTEX_INITIALIZER,
+ .waitsem = SEM_INITIALIZER(0),
+ };
+#endif
+
/****************************************************************************
* Private Functions
****************************************************************************/
@@ -348,10 +465,9 @@ static struct twi_dev_s g_twi3 =
* false: This is the same as the preceding register access.
*
****************************************************************************/
-
#ifdef CONFIG_SAMA5_TWI_REGDEBUG
static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
- uint32_t address)
+ uintptr_t address)
{
if (wr == priv->wrlast && /* Same kind of access? */
value == priv->vallast && /* Same value? */
@@ -1249,6 +1365,61 @@ struct i2c_master_s *sam_i2cbus_initialize(int bus)
frequency = CONFIG_SAMA5_TWI3_FREQUENCY;
}
else
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM0_TWI
+ if (bus == 4)
+ {
+ /* Select up TWI4 (Flexcom-0) and the (initial) TWI frequency */
+
+ putreg32(FLEX_MR_OPMODE_TWI, SAM_FLEX0_MR);
+ priv = &g_twi4;
+ frequency = CONFIG_SAMA5_TWI_FC0_FREQUENCY;
+ }
+ else
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM1_TWI
+ if (bus == 5)
+ {
+ /* Select up TWI5 (Flexcom-1) and the (initial) TWI frequency */
+
+ putreg32(FLEX_MR_OPMODE_TWI, SAM_FLEX1_MR);
+ priv = &g_twi5;
+ frequency = CONFIG_SAMA5_TWI_FC1_FREQUENCY;
+ }
+ else
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM2_TWI
+ if (bus == 6)
+ {
+ /* Select up TWI6 (Flexcom-2) and the (initial) TWI frequency */
+
+ putreg32(FLEX_MR_OPMODE_TWI, SAM_FLEX2_MR);
+ priv = &g_twi6;
+ frequency = CONFIG_SAMA5_TWI_FC2_FREQUENCY;
+ }
+ else
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM3_TWI
+ if (bus == 7)
+ {
+ /* Select up TWI7 (Flexcom-3) and the (initial) TWI frequency */
+
+ putreg32(FLEX_MR_OPMODE_TWI, SAM_FLEX3_MR);
+ priv = &g_twi7;
+ frequency = CONFIG_SAMA5_TWI_FC3_FREQUENCY;
+ }
+ else
+#endif
+#ifdef CONFIG_SAMA5_FLEXCOM4_TWI
+ if (bus == 8)
+ {
+ /* Select up TWI8 (Flexcom-4) and the (initial) TWI frequency */
+
+ putreg32(FLEX_MR_OPMODE_TWI, SAM_FLEX4_MR);
+ priv = &g_twi8;
+ frequency = CONFIG_SAMA5_TWI_FC4_FREQUENCY;
+ }
+ else
#endif
{
i2cerr("ERROR: Unsupported bus: TWI%d\n", bus);