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Posted to commits@mynewt.apache.org by je...@apache.org on 2021/10/26 17:04:13 UTC
[mynewt-core] 02/10: mcu/nrf5340: Add non-secure peripheral mapping
in HAL
This is an automated email from the ASF dual-hosted git repository.
jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit 223b94c065dfb6199030fb8c58e83b212ee100df
Author: Jerzy Kasenberg <je...@codecoup.pl>
AuthorDate: Wed Oct 20 10:33:23 2021 +0200
mcu/nrf5340: Add non-secure peripheral mapping in HAL
HAL functions were always using secure peripheral (NRF_XXX_S).
Now in most cases NRF_XXX is used that is mapped to _S or _NS
depending on build configuration.
---
hw/mcu/nordic/nrf5340/include/mcu/nrf5340_hal.h | 4 ++-
hw/mcu/nordic/nrf5340/src/hal_nvreg.c | 5 ++--
hw/mcu/nordic/nrf5340/src/hal_os_tick.c | 3 +-
hw/mcu/nordic/nrf5340/src/hal_reset_cause.c | 5 ++--
hw/mcu/nordic/nrf5340/src/hal_spi.c | 5 ++--
hw/mcu/nordic/nrf5340/src/hal_system.c | 37 +++++++++++++------------
hw/mcu/nordic/nrf5340/src/hal_timer.c | 18 ++++++------
hw/mcu/nordic/nrf5340/src/hal_uart.c | 8 +++---
hw/mcu/nordic/nrf5340/src/hal_watchdog.c | 19 +++++++------
hw/mcu/nordic/nrf5340/src/system_nrf5340.c | 11 +++-----
10 files changed, 60 insertions(+), 55 deletions(-)
diff --git a/hw/mcu/nordic/nrf5340/include/mcu/nrf5340_hal.h b/hw/mcu/nordic/nrf5340/include/mcu/nrf5340_hal.h
index ba72c5d..fe66fad 100644
--- a/hw/mcu/nordic/nrf5340/include/mcu/nrf5340_hal.h
+++ b/hw/mcu/nordic/nrf5340/include/mcu/nrf5340_hal.h
@@ -24,6 +24,8 @@
extern "C" {
#endif
+#include <nrfx_config.h>
+
/* Helper functions to enable/disable interrupts. */
#define __HAL_DISABLE_INTERRUPTS(x) \
do { \
@@ -75,7 +77,7 @@ struct nrf5340_hal_spi_cfg {
*/
#define HAL_GPIO_INDEX(pin) ((pin) & 0x1F)
-#define HAL_GPIO_PORT(pin) ((pin) > 31 ? NRF_P1_S : NRF_P0_S)
+#define HAL_GPIO_PORT(pin) ((pin) > 31 ? NRF_P1 : NRF_P0)
#define HAL_GPIO_MASK(pin) (1 << HAL_GPIO_INDEX(pin))
#define HAL_GPIOTE_PIN_MASK (0x3FUL << GPIOTE_CONFIG_PSEL_Pos)
diff --git a/hw/mcu/nordic/nrf5340/src/hal_nvreg.c b/hw/mcu/nordic/nrf5340/src/hal_nvreg.c
index 7c0bb21..2d983e9 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_nvreg.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_nvreg.c
@@ -20,6 +20,7 @@
#include <mcu/cortex_m33.h>
#include <hal/hal_nvreg.h>
#include <nrf.h>
+#include <nrfx_config.h>
/* There are two GPREGRET registers on the NRF5340 */
#define HAL_NVREG_MAX (2)
@@ -31,7 +32,7 @@ void
hal_nvreg_write(unsigned int reg, uint32_t val)
{
if (reg < HAL_NVREG_MAX) {
- NRF_POWER_S->GPREGRET[reg] = val;
+ NRF_POWER->GPREGRET[reg] = val;
}
}
@@ -41,7 +42,7 @@ hal_nvreg_read(unsigned int reg)
uint32_t val = 0;
if (reg < HAL_NVREG_MAX) {
- val = NRF_POWER_S->GPREGRET[reg];
+ val = NRF_POWER->GPREGRET[reg];
}
return val;
diff --git a/hw/mcu/nordic/nrf5340/src/hal_os_tick.c b/hw/mcu/nordic/nrf5340/src/hal_os_tick.c
index e641a7c..e6c6446 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_os_tick.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_os_tick.c
@@ -21,6 +21,7 @@
#include <os/mynewt.h>
#include <hal/hal_os_tick.h>
#include <nrf.h>
+#include <nrfx_config.h>
#include <mcu/cmsis_nvic.h>
/* The OS scheduler requires a low-frequency timer. */
@@ -29,7 +30,7 @@
#endif
#define RTC_FREQ 32768 /* in Hz */
-#define OS_TICK_TIMER NRF_RTC1_S
+#define OS_TICK_TIMER NRF_RTC1
#define OS_TICK_IRQ RTC1_IRQn
#define OS_TICK_CMPREG 3
#define RTC_COMPARE_INT_MASK(ccreg) (1UL << ((ccreg) + 16))
diff --git a/hw/mcu/nordic/nrf5340/src/hal_reset_cause.c b/hw/mcu/nordic/nrf5340/src/hal_reset_cause.c
index 4eedb1a..04c7939 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_reset_cause.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_reset_cause.c
@@ -18,6 +18,7 @@
*/
#include <nrf.h>
+#include <nrfx_config.h>
#include <hal/hal_system.h>
enum hal_reset_reason
@@ -30,7 +31,7 @@ hal_reset_cause(void)
return reason;
}
- reg = NRF_RESET_S->RESETREAS;
+ reg = NRF_RESET->RESETREAS;
if (reg & (RESET_RESETREAS_DOG0_Msk | RESET_RESETREAS_DOG1_Msk | RESET_RESETREAS_LOCKUP_Msk)) {
reason = HAL_RESET_WATCHDOG;
@@ -44,7 +45,7 @@ hal_reset_cause(void)
reason = HAL_RESET_POR; /* could also be brownout */
}
- NRF_RESET_S->RESETREAS = reg;
+ NRF_RESET->RESETREAS = reg;
return reason;
}
diff --git a/hw/mcu/nordic/nrf5340/src/hal_spi.c b/hw/mcu/nordic/nrf5340/src/hal_spi.c
index ded7bc6..1ba5c34 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_spi.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_spi.c
@@ -25,6 +25,7 @@
#include <hal/hal_spi.h>
#include <mcu/nrf5340_hal.h>
#include <nrf.h>
+#include <nrfx_config.h>
#define SPIM_TXD_MAXCNT_MAX 0xffff
@@ -347,9 +348,9 @@ hal_spi_config_master(struct nrf5340_hal_spi *spi,
*/
pin = spim->PSEL.SCK & SPIM_PSEL_SCK_PIN_Msk;
if (spim->PSEL.SCK & SPIM_PSEL_SCK_PORT_Msk) {
- port = NRF_P1_S;
+ port = NRF_P1;
} else {
- port = NRF_P0_S;
+ port = NRF_P0;
}
if (settings->data_mode <= HAL_SPI_MODE1) {
diff --git a/hw/mcu/nordic/nrf5340/src/hal_system.c b/hw/mcu/nordic/nrf5340/src/hal_system.c
index 4b9058b..668718a 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_system.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_system.c
@@ -22,6 +22,7 @@
#include <hal/hal_system.h>
#include <hal/hal_debug.h>
#include <nrf.h>
+#include <nrfx_config.h>
/**
* Function called at startup. Called after BSS and .data initialized but
@@ -41,10 +42,10 @@ hal_system_init(void)
#endif
#if MYNEWT_VAL(MCU_DCDC_ENABLED)
- NRF_REGULATORS_S->VREGMAIN.DCDCEN = 1;
+ NRF_REGULATORS->VREGMAIN.DCDCEN = 1;
#if MYNEWT_VAL(BSP_NRF5340_NET_ENABLE)
- NRF_REGULATORS_S->VREGRADIO.DCDCEN = 1;
+ NRF_REGULATORS->VREGRADIO.DCDCEN = 1;
#endif
#endif
}
@@ -85,8 +86,8 @@ hal_system_clock_start(void)
regval = CLOCK_LFCLKSTAT_STATE_Running << CLOCK_LFCLKSTAT_STATE_Pos;
#if MYNEWT_VAL_CHOICE(MCU_LFCLK_SOURCE, LFXO)
- NRF_P0_S->PIN_CNF[0] |= GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
- NRF_P0_S->PIN_CNF[1] |= GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
+ NRF_P0->PIN_CNF[0] |= GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
+ NRF_P0->PIN_CNF[1] |= GPIO_PIN_CNF_MCUSEL_Peripheral << GPIO_PIN_CNF_MCUSEL_Pos;
regval |= CLOCK_LFCLKSTAT_SRC_LFXO << CLOCK_LFCLKSTAT_SRC_Pos;
clksrc = CLOCK_LFCLKSTAT_SRC_LFXO;
#elif MYNEWT_VAL_CHOICE(MCU_LFCLK_SOURCE, LFSYNTH)
@@ -101,12 +102,12 @@ hal_system_clock_start(void)
#if MYNEWT_VAL_CHOICE(MCU_LFCLK_SOURCE, LFSYNTH)
/* Must turn on HFLCK for synthesized 32768 crystal */
- if ((NRF_CLOCK_S->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk) !=
+ if ((NRF_CLOCK->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk) !=
(CLOCK_HFCLKSTAT_STATE_Running << CLOCK_HFCLKSTAT_STATE_Pos)) {
- NRF_CLOCK_S->EVENTS_HFCLKSTARTED = 0;
- NRF_CLOCK_S->TASKS_HFCLKSTART = 1;
+ NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
+ NRF_CLOCK->TASKS_HFCLKSTART = 1;
while (1) {
- if ((NRF_CLOCK_S->EVENTS_HFCLKSTARTED) != 0) {
+ if ((NRF_CLOCK->EVENTS_HFCLKSTARTED) != 0) {
break;
}
}
@@ -114,16 +115,16 @@ hal_system_clock_start(void)
#endif
/* Check if this clock source is already running */
- if ((NRF_CLOCK_S->LFCLKSTAT & regmsk) != regval) {
- NRF_CLOCK_S->TASKS_LFCLKSTOP = 1;
- NRF_CLOCK_S->EVENTS_LFCLKSTARTED = 0;
- NRF_CLOCK_S->LFCLKSRC = clksrc;
- NRF_CLOCK_S->TASKS_LFCLKSTART = 1;
+ if ((NRF_CLOCK->LFCLKSTAT & regmsk) != regval) {
+ NRF_CLOCK->TASKS_LFCLKSTOP = 1;
+ NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
+ NRF_CLOCK->LFCLKSRC = clksrc;
+ NRF_CLOCK->TASKS_LFCLKSTART = 1;
/* Wait here till started! */
while (1) {
- if (NRF_CLOCK_S->EVENTS_LFCLKSTARTED) {
- if ((NRF_CLOCK_S->LFCLKSTAT & regmsk) == regval) {
+ if (NRF_CLOCK->EVENTS_LFCLKSTARTED) {
+ if ((NRF_CLOCK->LFCLKSTAT & regmsk) == regval) {
break;
}
}
@@ -131,10 +132,10 @@ hal_system_clock_start(void)
}
#endif
if (MYNEWT_VAL(MCU_HFCLCK192_DIV) == 1) {
- NRF_CLOCK_S->HFCLK192MCTRL = 0;
+ NRF_CLOCK->HFCLK192MCTRL = 0;
} else if (MYNEWT_VAL(MCU_HFCLCK192_DIV) == 2) {
- NRF_CLOCK_S->HFCLK192MCTRL = 1;
+ NRF_CLOCK->HFCLK192MCTRL = 1;
} else if (MYNEWT_VAL(MCU_HFCLCK192_DIV) == 4) {
- NRF_CLOCK_S->HFCLK192MCTRL = 2;
+ NRF_CLOCK->HFCLK192MCTRL = 2;
}
}
diff --git a/hw/mcu/nordic/nrf5340/src/hal_timer.c b/hw/mcu/nordic/nrf5340/src/hal_timer.c
index f642c49..cdc6c1e 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_timer.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_timer.c
@@ -454,28 +454,28 @@ hal_timer_init(int timer_num, void *cfg)
#if MYNEWT_VAL(TIMER_0)
case 0:
irq_num = TIMER0_IRQn;
- hwtimer = NRF_TIMER0_S;
+ hwtimer = NRF_TIMER0;
irq_isr = nrf5340_timer0_irq_handler;
break;
#endif
#if MYNEWT_VAL(TIMER_1)
case 1:
irq_num = TIMER1_IRQn;
- hwtimer = NRF_TIMER1_S;
+ hwtimer = NRF_TIMER1;
irq_isr = nrf5340_timer1_irq_handler;
break;
#endif
#if MYNEWT_VAL(TIMER_2)
case 2:
irq_num = TIMER2_IRQn;
- hwtimer = NRF_TIMER2_S;
+ hwtimer = NRF_TIMER2;
irq_isr = nrf5340_timer2_irq_handler;
break;
#endif
#if MYNEWT_VAL(TIMER_3)
case 3:
irq_num = RTC0_IRQn;
- hwtimer = NRF_RTC0_S;
+ hwtimer = NRF_RTC0;
irq_isr = nrf5340_timer3_irq_handler;
bsptimer->tmr_rtc = 1;
break;
@@ -483,7 +483,7 @@ hal_timer_init(int timer_num, void *cfg)
#if MYNEWT_VAL(TIMER_4)
case 4:
irq_num = RTC1_IRQn;
- hwtimer = NRF_RTC1_S;
+ hwtimer = NRF_RTC1;
irq_isr = nrf5340_timer4_irq_handler;
bsptimer->tmr_rtc = 1;
break;
@@ -613,13 +613,13 @@ hal_timer_config(int timer_num, uint32_t freq_hz)
__HAL_DISABLE_INTERRUPTS(ctx);
/* Make sure HFXO is started */
- if ((NRF_CLOCK_S->HFCLKSTAT &
+ if ((NRF_CLOCK->HFCLKSTAT &
(CLOCK_HFCLKSTAT_SRC_Msk | CLOCK_HFCLKSTAT_STATE_Msk)) !=
(CLOCK_HFCLKSTAT_SRC_Msk | CLOCK_HFCLKSTAT_STATE_Msk)) {
- NRF_CLOCK_S->EVENTS_HFCLKSTARTED = 0;
- NRF_CLOCK_S->TASKS_HFCLKSTART = 1;
+ NRF_CLOCK->EVENTS_HFCLKSTARTED = 0;
+ NRF_CLOCK->TASKS_HFCLKSTART = 1;
while (1) {
- if ((NRF_CLOCK_S->EVENTS_HFCLKSTARTED) != 0) {
+ if ((NRF_CLOCK->EVENTS_HFCLKSTARTED) != 0) {
break;
}
}
diff --git a/hw/mcu/nordic/nrf5340/src/hal_uart.c b/hw/mcu/nordic/nrf5340/src/hal_uart.c
index dbe4f5a..e4a2dac 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_uart.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_uart.c
@@ -324,28 +324,28 @@ hal_uart_init(int port, void *arg)
switch (port) {
#if MYNEWT_VAL(UART_0)
case 0:
- u->nrf_uart = NRF_UARTE0_S;
+ u->nrf_uart = NRF_UARTE0;
u->handler = (uint32_t)uart0_irq_handler;
u->irqn = SPIM0_SPIS0_TWIM0_TWIS0_UARTE0_IRQn;
break;
#endif
#if MYNEWT_VAL(UART_1)
case 1:
- u->nrf_uart = NRF_UARTE1_S;
+ u->nrf_uart = NRF_UARTE1;
u->handler = (uint32_t)uart1_irq_handler;
u->irqn = SPIM1_SPIS1_TWIM1_TWIS1_UARTE1_IRQn;
break;
#endif
#if MYNEWT_VAL(UART_2)
case 2:
- u->nrf_uart = NRF_UARTE2_S;
+ u->nrf_uart = NRF_UARTE2;
u->handler = (uint32_t)uart2_irq_handler;
u->irqn = SPIM2_SPIS2_TWIM2_TWIS2_UARTE2_IRQn;
break;
#endif
#if MYNEWT_VAL(UART_3)
case 3:
- u->nrf_uart = NRF_UARTE3_S;
+ u->nrf_uart = NRF_UARTE3;
u->handler = (uint32_t)uart3_irq_handler;
u->irqn = SPIM3_SPIS3_TWIM3_TWIS3_UARTE3_IRQn;
break;
diff --git a/hw/mcu/nordic/nrf5340/src/hal_watchdog.c b/hw/mcu/nordic/nrf5340/src/hal_watchdog.c
index bc015f8..19a26b9 100644
--- a/hw/mcu/nordic/nrf5340/src/hal_watchdog.c
+++ b/hw/mcu/nordic/nrf5340/src/hal_watchdog.c
@@ -22,6 +22,7 @@
#include <hal/hal_watchdog.h>
#include <mcu/cmsis_nvic.h>
#include <nrf.h>
+#include <nrfx_config.h>
static void
nrf5340_hal_wdt_default_handler(void)
@@ -34,8 +35,8 @@ static void
nrf5340_wdt_irq_handler(void)
{
os_trace_isr_enter();
- if (NRF_WDT0_S->INTENSET & WDT_INTENSET_TIMEOUT_Msk) {
- NRF_WDT0_S->EVENTS_TIMEOUT = 0;
+ if (NRF_WDT0->INTENSET & WDT_INTENSET_TIMEOUT_Msk) {
+ NRF_WDT0->EVENTS_TIMEOUT = 0;
nrf5340_hal_wdt_default_handler();
}
os_trace_isr_exit();
@@ -46,19 +47,19 @@ hal_watchdog_init(uint32_t expire_msecs)
{
uint64_t expiration;
- NRF_WDT0_S->CONFIG = WDT_CONFIG_SLEEP_Msk;
+ NRF_WDT0->CONFIG = WDT_CONFIG_SLEEP_Msk;
/* Convert msec timeout to counts of a 32768 crystal */
expiration = ((uint64_t)expire_msecs * 32768) / 1000;
- NRF_WDT0_S->CRV = (uint32_t)expiration;
+ NRF_WDT0->CRV = (uint32_t)expiration;
- NRF_WDT0_S->CRV = (expire_msecs * 32) + ((expire_msecs * 96) / 125);
+ NRF_WDT0->CRV = (expire_msecs * 32) + ((expire_msecs * 96) / 125);
NVIC_SetVector(WDT0_IRQn, (uint32_t)nrf5340_wdt_irq_handler);
NVIC_SetPriority(WDT0_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
NVIC_ClearPendingIRQ(WDT0_IRQn);
NVIC_EnableIRQ(WDT0_IRQn);
- NRF_WDT0_S->RREN |= 0x1;
+ NRF_WDT0->RREN |= 0x1;
return 0;
}
@@ -66,13 +67,13 @@ hal_watchdog_init(uint32_t expire_msecs)
void
hal_watchdog_enable(void)
{
- NRF_WDT0_S->INTENSET = WDT_INTENSET_TIMEOUT_Msk;
- NRF_WDT0_S->TASKS_START = 1;
+ NRF_WDT0->INTENSET = WDT_INTENSET_TIMEOUT_Msk;
+ NRF_WDT0->TASKS_START = 1;
}
void
hal_watchdog_tickle(void)
{
- NRF_WDT0_S->RR[0] = WDT_RR_RR_Reload;
+ NRF_WDT0->RR[0] = WDT_RR_RR_Reload;
}
diff --git a/hw/mcu/nordic/nrf5340/src/system_nrf5340.c b/hw/mcu/nordic/nrf5340/src/system_nrf5340.c
index 4ebd8ce..84fa385 100644
--- a/hw/mcu/nordic/nrf5340/src/system_nrf5340.c
+++ b/hw/mcu/nordic/nrf5340/src/system_nrf5340.c
@@ -27,6 +27,7 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA.
#include <stdbool.h>
#include <syscfg/syscfg.h>
#include <nrf.h>
+#include <nrfx_config.h>
#include <nrf_erratas.h>
#include <system_nrf5340_application.h>
#include <mcu/cmsis_nvic.h>
@@ -62,11 +63,7 @@ NOTICE: This file has been modified by Nordic Semiconductor ASA.
void SystemCoreClockUpdate(void)
{
-#if defined(NRF_TRUSTZONE_NONSECURE)
- SystemCoreClock = __SYSTEM_CLOCK_MAX >> (NRF_CLOCK_NS->HFCLKCTRL & (CLOCK_HFCLKCTRL_HCLK_Msk));
-#else
- SystemCoreClock = __SYSTEM_CLOCK_MAX >> (NRF_CLOCK_S->HFCLKCTRL & (CLOCK_HFCLKCTRL_HCLK_Msk));
-#endif
+ SystemCoreClock = __SYSTEM_CLOCK_MAX >> (NRF_CLOCK->HFCLKCTRL & (CLOCK_HFCLKCTRL_HCLK_Msk));
}
void SystemInit(void)
@@ -247,9 +244,9 @@ void SystemInit(void)
#endif
if (MYNEWT_VAL(MCU_HFCLK_DIV) == 1) {
- NRF_CLOCK_S->HFCLKCTRL = CLOCK_HFCLKCTRL_HCLK_Div1 << CLOCK_HFCLKCTRL_HCLK_Pos;
+ NRF_CLOCK->HFCLKCTRL = CLOCK_HFCLKCTRL_HCLK_Div1 << CLOCK_HFCLKCTRL_HCLK_Pos;
} else {
- NRF_CLOCK_S->HFCLKCTRL = CLOCK_HFCLKCTRL_HCLK_Div2 << CLOCK_HFCLKCTRL_HCLK_Pos;
+ NRF_CLOCK->HFCLKCTRL = CLOCK_HFCLKCTRL_HCLK_Div2 << CLOCK_HFCLKCTRL_HCLK_Pos;
}
SystemCoreClockUpdate();