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Posted to commits@nuttx.apache.org by xi...@apache.org on 2023/10/17 16:01:24 UTC
[nuttx] branch releases/12.3 updated: cpu_pause.c: fix typo
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch releases/12.3
in repository https://gitbox.apache.org/repos/asf/nuttx.git
The following commit(s) were added to refs/heads/releases/12.3 by this push:
new dfcf4c6217 cpu_pause.c: fix typo
dfcf4c6217 is described below
commit dfcf4c6217e8aad0a9aae026f7934429bc18f662
Author: TaiJuWu <tj...@gmail.com>
AuthorDate: Sat Oct 14 07:38:45 2023 +0800
cpu_pause.c: fix typo
Signed-off-by: TaiJuWu <tj...@gmail.com>
---
arch/arm/src/armv7-a/arm_cpupause.c | 2 +-
arch/arm/src/armv7-r/arm_cpupause.c | 2 +-
arch/arm/src/cxd56xx/cxd56_cpupause.c | 2 +-
arch/arm/src/lc823450/lc823450_cpupause.c | 2 +-
arch/arm/src/rp2040/rp2040_cpupause.c | 2 +-
arch/arm/src/sam34/sam4cm_cpupause.c | 2 +-
arch/arm64/src/common/arm64_cpupause.c | 2 +-
arch/risc-v/src/common/riscv_cpupause.c | 2 +-
arch/sim/src/sim/sim_smpsignal.c | 2 +-
arch/sparc/src/s698pm/s698pm_cpupause.c | 2 +-
10 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/src/armv7-a/arm_cpupause.c b/arch/arm/src/armv7-a/arm_cpupause.c
index efb2fc04f6..c3a00efab1 100644
--- a/arch/arm/src/armv7-a/arm_cpupause.c
+++ b/arch/arm/src/armv7-a/arm_cpupause.c
@@ -90,7 +90,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/arm/src/armv7-r/arm_cpupause.c b/arch/arm/src/armv7-r/arm_cpupause.c
index 61a455fc96..03fe75402d 100644
--- a/arch/arm/src/armv7-r/arm_cpupause.c
+++ b/arch/arm/src/armv7-r/arm_cpupause.c
@@ -90,7 +90,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/arm/src/cxd56xx/cxd56_cpupause.c b/arch/arm/src/cxd56xx/cxd56_cpupause.c
index c69f8035b8..6d34b80460 100644
--- a/arch/arm/src/cxd56xx/cxd56_cpupause.c
+++ b/arch/arm/src/cxd56xx/cxd56_cpupause.c
@@ -172,7 +172,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/arm/src/lc823450/lc823450_cpupause.c b/arch/arm/src/lc823450/lc823450_cpupause.c
index 13116367d2..ab517e5a08 100644
--- a/arch/arm/src/lc823450/lc823450_cpupause.c
+++ b/arch/arm/src/lc823450/lc823450_cpupause.c
@@ -100,7 +100,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/arm/src/rp2040/rp2040_cpupause.c b/arch/arm/src/rp2040/rp2040_cpupause.c
index 1f573016c0..5553debe23 100644
--- a/arch/arm/src/rp2040/rp2040_cpupause.c
+++ b/arch/arm/src/rp2040/rp2040_cpupause.c
@@ -140,7 +140,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/arm/src/sam34/sam4cm_cpupause.c b/arch/arm/src/sam34/sam4cm_cpupause.c
index 48b7944abb..bc834ce666 100644
--- a/arch/arm/src/sam34/sam4cm_cpupause.c
+++ b/arch/arm/src/sam34/sam4cm_cpupause.c
@@ -102,7 +102,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/arm64/src/common/arm64_cpupause.c b/arch/arm64/src/common/arm64_cpupause.c
index 1692521bef..8926414e9b 100644
--- a/arch/arm64/src/common/arm64_cpupause.c
+++ b/arch/arm64/src/common/arm64_cpupause.c
@@ -89,7 +89,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/risc-v/src/common/riscv_cpupause.c b/arch/risc-v/src/common/riscv_cpupause.c
index 87412f7ad4..85e5c157ba 100644
--- a/arch/risc-v/src/common/riscv_cpupause.c
+++ b/arch/risc-v/src/common/riscv_cpupause.c
@@ -90,7 +90,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/sim/src/sim/sim_smpsignal.c b/arch/sim/src/sim/sim_smpsignal.c
index 4246dd5fd5..bc8943e8c9 100644
--- a/arch/sim/src/sim/sim_smpsignal.c
+++ b/arch/sim/src/sim/sim_smpsignal.c
@@ -133,7 +133,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*
diff --git a/arch/sparc/src/s698pm/s698pm_cpupause.c b/arch/sparc/src/s698pm/s698pm_cpupause.c
index b9480d1414..cd4188a5bb 100644
--- a/arch/sparc/src/s698pm/s698pm_cpupause.c
+++ b/arch/sparc/src/s698pm/s698pm_cpupause.c
@@ -90,7 +90,7 @@ bool up_cpu_pausereq(int cpu)
* Description:
* Handle a pause request from another CPU. Normally, this logic is
* executed from interrupt handling logic within the architecture-specific
- * However, it is sometimes necessary necessary to perform the pending
+ * However, it is sometimes necessary to perform the pending
* pause operation in other contexts where the interrupt cannot be taken
* in order to avoid deadlocks.
*