You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by GitBox <gi...@apache.org> on 2022/11/25 11:51:28 UTC
[GitHub] [nuttx] acassis commented on a diff in pull request #7691: GD25Q 4 byte read status issue
acassis commented on code in PR #7691:
URL: https://github.com/apache/nuttx/pull/7691#discussion_r1032380362
##########
drivers/mtd/gd25.c:
##########
@@ -107,6 +107,7 @@
#define GD25_SR_WIP (1 << 0) /* Bit 0: Write in Progress */
#define GD25_SR_WEL (1 << 1) /* Bit 1: Write Enable Latch */
#define GD25_SR1_EN4B (1 << 3) /* Bit 3: Enable 4byte address */
+#define GD25Q_SR1_EN4B (1 << 0) /* Bit 0: Enable 4byte address GD25Q memories */
Review Comment:
Yes, I know it is not WIP, what I said is: in GD25G32 the bit 0 is not EN4B, but WIP:
--
This is an automated message from the Apache Git Service.
To respond to the message, please log on to GitHub and use the
URL above to go to the specific comment.
To unsubscribe, e-mail: commits-unsubscribe@nuttx.apache.org
For queries about this service, please contact Infrastructure at:
users@infra.apache.org