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Posted to commits@tvm.apache.org by tq...@apache.org on 2026/10/18 18:37:35 UTC
(tvm) branch tirx-standalone-root updated (04ef72f0f9 -> 1035f8099a)
This is an automated email from the ASF dual-hosted git repository.
tqchen pushed a change to branch tirx-standalone-root
in repository https://gitbox.apache.org/repos/asf/tvm.git
discard 04ef72f0f9 [DOCS] Add standalone TIRx Python API reference
discard 61cf66fc16 [CI] Add standalone TIRx build, wheel, and docs pipelines
discard 9f8ad158e6 [LINT] Add standalone TIRx lint configuration
discard dff9b45de0 [META] Add repository ignore rules and release keys
discard a3a87bd434 [META] Configure standalone TIRx repository metadata
discard 377737b378 [REFACTOR] Make standalone TIRx the repository root
discard 7d631e4ea8 [TIRx] Store tensor address geometry in layouts (#20786)
discard ca2d38491d [TIRx] Infer variables from linear packed shapes (#20782)
discard 4f60cde6c8 [FIX][TIRx] Preserve loops containing break or continue during unrolling (#20783)
discard c6d6448a9b [REFACTOR][Script] Simplify printer configuration and display options (#20778)
discard 98be1c59bd [REFACTOR][TIRx] Remove redundant helpers and construct tensor variables directly (#20776)
discard b3169844d7 [REFACTOR][TIRx] Expose dispatch and tensor layout lowering passes (#20775)
discard 9aa2b70cbe [REFACTOR][TIRx] Simplify Python APIs and source docstrings (#20777)
discard 234de92238 [REFACTOR] Keep attribute contracts with their owning interfaces (#20772)
discard 3b68199858 [TIRx] Remove obsolete builtin lowering bypass (#20771)
discard b7a4e89c18 [REFACTOR][Python] Use TVM-FFI APIs directly (#20769)
discard 533e0b6660 [REFACTOR] Clean up tensor helpers and parent library visibility (#20770)
discard 7f5217446e [REFACTOR][IR] Align explicit constructors and finish TIRx cleanup (#20768)
discard 0defab0b3f [REFACTOR][TIRx] Return statements from tile dispatch (#20767)
discard 80d645d824 [TIRx] Simplify Python APIs and configuration discovery (#20766)
discard 8a10be0a14 [TIRx] Clarify overload sets, leaf ownership, and terminal throws (#20765)
discard 341e3fd7f5 [REFACTOR] Separate TIRx compiler and runtime deployment APIs (#20763)
discard 52441cdf2b [FIX][Sym] Reject non-positive divisors in iter map floordiv/floormod (#20756)
discard 69215634db [REFACTOR][TIRx] Align public APIs and package boundaries (#20759)
discard 96e7e85dc7 [BUILD] Enable LLVM and automatic CUDA in standalone TIRx (#20755)
discard 7186ad34f8 [CI] Build and consume source wheel artifacts across Jenkins platforms (#20750)
discard 5e488f1bbe [REFACTOR] Simplify TIRx CMake and package installation (#20751)
discard af5d176b73 [REFACTOR] Simplify standalone TIRx CMake (#20749)
discard 011c6429a5 fix(infra): update tir-test for the in-tree TIRx split (#20748)
discard e3b58a3bc0 [TEST] Use subsystem-relative names for standalone TIRx tests (#20747)
discard 293b3dadaf [REFACTOR] Bringup tirx in standalone folder (#20742)
discard 2a2b5e0bca [REFACTOR][CI] Share native Jenkins pipelines and organize CI helpers (#20735)
discard a2d2a698f8 [REFACTOR][HEXAGON] Retire bundled runtime and retain compiler support (#20733)
discard 3cb7cf6e37 [REFACTOR][TIR] Retire legacy CUDA tensorization and warp memory lowering (#20734)
discard 07d1a9dc97 refactor(op-dispatch): unify thread scopes as enum tags (#20732)
discard 80791649df feat(tvmscript): add scoped Python line tracing for IRBuilder (#20731)
discard 143c9a5370 [CMake] Organize optional modules and build both runtime libraries (#20728)
discard 63b4f0853e [FEAT][Script] Emit script-facing void operators through IRBuilder (#20729)
discard b1b200bf18 [Runtime] Register backend memory scopes with EnumDef (#20725)
discard 7be0a8aca4 [REFACTOR][CODEGEN] Separate target configuration from code generation (#20718)
discard eb52a79927 [FIX] Repair shared C++ exports, OpenCL interfaces and compiler loading (#20722)
discard e2fc7f0265 [REFACTOR][PYTHON] Use the native FFI object protocol (#20726)
discard 3153a9c057 [TIRx] Add scalar builder initialization and assignment (#20724)
discard e439a983b3 [REFACTOR][IR] Consolidate builder location resolution and attachment (#20723)
discard e84e08edb8 [REFACTOR][IR] Adopt typed attribute keys (#20717)
discard 397343bced [REFACTOR] Localize lowering helpers and consolidate TIRx tests (#20719)
discard 2d7486b2e4 [REFACTOR][TEST] Consolidate runtime tests and isolate RPC (#20716)
discard cd01521767 [BUGFIX] Fix runtime correctness and backend SDK dependencies (#20715)
discard 00ab87ce1e [REFACTOR][IR] Standardize numeric casts on value-first order (#20713)
discard 9fcb7ed733 [REFACTOR][SYM] Retire optional simplifier extensions (#20712)
discard 816182cbea [REFACTOR] Unify unsigned-index context and remove unused helpers (#20711)
discard 891d6fb7d5 [TVMScript] Default symbolic dimensions to int32 (#20710)
discard 60ecd423ba [REFACTOR][TIRX] Simplify TensorVar and tensor validation hooks (#20709)
discard 1e2f9a136e refactor(op-dispatch): infer CUDA tile descriptors and document contracts (#20708)
discard 7ca044bac4 [REFACTOR][IR] Simplify type scopes and registered annotations (#20707)
discard 32da152e2d refactor(layout): remove unused TIRx layout helpers (#20706)
discard 3787a91edf [REFACTOR] Remove private TIRx dependencies from parent packages (#20703)
discard 275d2db08a refactor(op-dispatch): replace adaptive CUDA tile dispatch with explicit patterns (#20687)
discard 56cf32ff11 [REFACTOR][Runtime] Introduce canonical memory scopes (#20686)
discard 76221b48fe [REFACTOR][Python] Place pass and testing helpers with their owning modules (#20692)
discard bae2394bfc [Fix][Metal] Update Timer construction after the non-nullable handle change (#20698)
discard 743022aa77 [REFACTOR][Script] Print reflected types and expose canonical builder aliases (#20690)
discard 977b091cd0 [REFACTOR][TIRx][S-TIR] Localize SSA conversion and simplify lexical remapping (#20695)
discard 75e0d41b0d [REFACTOR][Sym] Simplify symbolic analysis dependencies (#20694)
discard c0263f568d [REFACTOR] Clarify shared support header ownership (#20693)
discard 74b6ee96af [REFACTOR][TIRx] Keep device-scope decoration in TIRx (#20691)
discard 66454b12a1 [REFACTOR][Support] Expose compiler GPU thread-tag parsing (#20689)
discard 71f9cfe501 [REFACTOR] Localize and simplify internal TIRx helpers (#20683)
discard 4b2110c780 [REFACTOR][S-TIR] Remove test-only force index narrowing (#20685)
discard 4e8c824feb [REFACTOR][Runtime] Use CamelCase for launch dimension methods (#20682)
discard 944a29dde7 [REFACTOR] Use local verifier scopes and exception visit context (#20684)
discard e7192c1c8b [REFACTOR] Expose analyzer-aware statement functors (#20681)
discard 99c714c7a9 [REFACTOR][Runtime] Clarify file helpers and VM parameter ownership (#20679)
discard 32e6dc266b [REFACTOR][Runtime] Extract launch parameter decoding (#20680)
discard b2ba114c04 [REFACTOR] Clarify core ownership and native compilation interfaces (#20678)
discard ba09445aa0 [TEST] Simplify and organize native C++ tests (#20676)
discard 397e5c6dc6 [Refactor][Runtime] Unify tensor pools and VM ownership (#20670)
discard 3ed122a36f [TVMScript] Simplify printing through canonical Op exposure (#20672)
discard 5b68d4e755 refactor(op-dispatch)!: dispatch tile ops through Op attributes (#20671)
discard 9a332a8d6c [FFI] Update tvm-ffi and native Any hooks (#20664)
discard de7b5ac5d6 [REFACTOR][Runtime] Return owning tensors from DeviceAPI (#20669)
discard 896dcb17de [REFACTOR][IR] Distinguish AST nodes from object implementations (#20665)
discard 0cd9270a89 [REFACTOR][RPC] Represent remote devices and tensors explicitly (#20667)
discard 2dd2838a19 refactor(op)!: consolidate TIRx helper ownership (#20668)
discard ada43a5218 [REFACTOR][TIR] Unify loop builders and isolate S-TIR construction (#20660)
discard 208db6e066 refactor(op)!: isolate TIRx tile and backend layout namespaces (#20663)
discard 99ecd73a1c [REFACTOR][TIRx] Carry tensor allocation types in type arguments (#20659)
discard 5708848ba7 [Runtime] Expose device selection through the backend C API (#20661)
discard 22d2af105c [FIX][Codegen] Bind tensor views with their element pointer type (#20657)
discard ae775126c1 [TIRx][S-TIR] Complete tensor terminology migration (#20648)
discard 9da15b40d4 refactor(infra)!: pass backend configuration through Target (#20651)
discard a8e41050e5 [REFACTOR][Script] Isolate printer ownership and pointer type construction (#20647)
discard a31c05a60d [REFACTOR] Make remaining object reference handles non-nullable (#20646)
discard 055400419e refactor(infra)!: unify CUDA backend configuration (#20645)
discard 40b142cf15 [REFACTOR][Script] Simplify region and call printing (#20640)
discard a39b256d70 [REFACTOR][TIRx] Reduce conditional hoisting to HoistIf (#20636)
discard 9a8223db9f [REFACTOR][IR] Replace source spans with non-nullable Location (#20642)
discard e63c691831 [REFACTOR][IR] Standardize metadata key ownership (#20633)
discard dde18fda2f refactor(lower-tirx)!: separate CUDA launch configuration from index bindings (#20639)
discard 86e6668dff [REFACTOR][TIRx] Retire legacy pointer access conveniences (#20637)
discard ca6859318c [REFACTOR][Script] Relocate shared and dialect printer registrations (#20638)
discard ece169d245 [TIRx] Canonicalize CUDA and vector operator identities (#20630)
discard 3957fa766c [REFACTOR][TIRx] Simplify the transform API (#20635)
discard b8a21062e5 [REFACTOR][TIRx] Move tensor placement to producing operations (#20634)
discard e68bf72925 [REFACTOR][CUDA] Retire legacy WMMA tensorization and emission (#20631)
discard d35c676a51 [REFACTOR][IR] Simplify transformation utilities and localize region hooks (#20627)
discard a2742c8a9a refactor(op)!: replace tile statements with tensor instruction calls (#20632)
discard 87dbb01ca1 [REFACTOR][IR] Align operator and shared script-builder ownership (#20628)
discard 4e810fcc3b [REFACTOR][TIRx] Consolidate analysis and split-pattern normalization (#20629)
discard fab0b267b8 [REFACTOR][IR] Share statement definitions across dialects (#20624)
discard b1179e4c86 [TIRx] Own expression methods and properties on TensorType (#20622)
discard e33cfbab69 [REFACTOR] Simplify canonical script operation adapters (#20623)
discard 5972cfa6bd [REFACTOR][TIRx] Simplify shared headers, analysis, and pointer helpers (#20621)
discard ae30e5bfc5 [REFACTOR][TIRx] Organize operator families by canonical ownership (#20619)
discard 00d08d8c17 fix(lower-tirx): restore CUDA lowering with native IR builders (#20620)
discard 29730ac11d [REFACTOR][Python] Align namespace helpers with their implementation owners (#20599)
discard 0c586b7f03 [REFACTOR][TIR] Replace type annotation markers with explicit types (#20602)
discard bd18a87ddd [REFACTOR][TIR] Store loop thread binding in annotations (#20606)
discard 93e296b631 [REFACTOR][IR] Promote TensorRegionType to shared IR (#20600)
discard 2d538b22a3 [REFACTOR][TIRx] Use structural definition renewal in core transforms (#20601)
discard 5ca0a25069 [REFACTOR][IR] Align native and Python operator family ownership (#20603)
discard 2a5cdc61f4 [REFACTOR][IR] Canonicalize executable scope bodies as SeqStmt (#20605)
discard 569394db0a [REFACTOR][IR] Unify Call construction and TVMScript printing (#20578)
discard fa891941db [TIRx][Relax] Preserve native signatures at explicit call boundaries (#20598)
discard bae4bd086f [REFACTOR][CUDA] Store tcgen05 descriptor options in call attributes (#20596)
discard 06f20bce63 [REFACTOR][TIRx] Rename PrimFunc to Function (#20586)
discard 78bdc262e2 [REFACTOR][IR] Colocate and inline expression FFI traits (#20585)
discard e535d241c6 [REFACTOR][TIRx] Rename BufferStore to TensorStore (#20590)
discard 600d656781 [REFACTOR][TIRx] Emit tensor declarations without a dedicated frame (#20587)
discard 6d81699c07 Move iteration axes to S-TIR and lower TE opaque values (#20574)
discard a1cae26b02 [REFACTOR][IR] Consolidate pass instrumentation and call effect headers (#20580)
discard 01adbe183d [REFACTOR][IR] Normalize constant predicate names and grouping (#20581)
discard 6fa8730eca [REFACTOR][TIRx] Store tile operands and configuration as expressions (#20576)
discard 659a4e3129 [REFACTOR][TIRx] Define region body parameters on operations (#20575)
discard 7b6fa3c4b8 [REFACTOR][TIRx] Simplify argument and unroll policy plumbing (#20579)
discard b5f498e40f [FIX][LLVM] Preserve physical-root alignment on outlined aliases (#20577)
discard 946dfa24eb [REFACTOR][TIRx] Remove obsolete AttrStmt infrastructure (#20573)
discard 5fd7729189 [TIRx][CUDA] Configure kernel constraints with CUDA leaf ops (#20565)
discard 5735635ac9 [REFACTOR][S-TIR] Represent async and manual synchronization explicitly (#20562)
discard 4c9d5fcefb [REFACTOR][TIRx] Use regions for CPU and runtime context scopes (#20567)
discard c07ad9cbaa [REFACTOR][LLVM] Express AArch64 SME state as function attributes (#20568)
discard 9f857bb21a [REFACTOR][TRN] Use RegionStmt for tensorized NKI instructions (#20560)
discard 4d156f030f [TIRx] Represent device boundaries with region operations (#20566)
discard f19bda5d9b [REFACTOR][TIRx] Collect root statements without seq_scope (#20564)
discard d624c1bd62 [REFACTOR][TIRx] Declare dynamic shared memory with a CUDA leaf op (#20563)
discard 815299ec7e [REFACTOR][TIRx] Make alignment assumptions explicit and retire legacy bounds checks (#20557)
discard eb1de00936 [REFACTOR][TIRx] Keep unroll policy on loops and retire source imports (#20556)
discard 206135e482 [REFACTOR][IR] Generalize staging lambdas and explicit thread reductions (#20552)
discard b0ecb8eb89 [REFACTOR][TIRx] Add RegionStmt and migrate thread launches (#20555)
discard 2cbcbf8cb7 [FIX][TIRx][CUDA] Support IKET 4.8 injection and trace artifacts (#20554)
discard bb489a951a [REFACTOR][TIRx] Use tensor names for typed variable views (#20548)
discard 8ffc2850cb [REFACTOR][s_tir] Keep partition hints on their owning loops (#20551)
discard 665f1d12e0 [REFACTOR][TIRx] Use function targets in VectorizeLoop (#20550)
discard 36f091dff7 [REFACTOR][TIRx] Make CPU parallel scheduling and barriers explicit (#20549)
discard f755e954a7 [REFACTOR][TIRx] Promote LambdaExpr to Expr (#20546)
discard e41872b64f [REFACTOR][IR] Represent missing type information with MissingType (#20542)
discard 6fb8a0b3b8 [REFACTOR][IR] Initialize Python Op APIs from registered namespaces (#20539)
discard 8cd629fd1b [FIX][Script] Preserve device identity and unify rendering configuration (#20543)
discard 99328f7798 [REFACTOR][IR] Make expression and statement references non-nullable (#20528)
discard 553dd1cb59 [Tests][WebGPU] Update grid-pack test TIRx syntax (#20538)
discard 71a47632a4 [Backend][WebGPU] Fix off-by-one in the grid-packing guard (#20424)
discard b728699812 [FIX][IR] Share typed expression mismatch diagnostics (#20523)
discard 295f2246a2 [REFACTOR][TIRx] Use tensor names for types and allocation APIs (#20519)
discard dceeaaaf5b [REFACTOR][SCRIPT] Share normal IR constructor contracts (#20522)
discard 2a7b6ba876 [REFACTOR][TIR] Attach fragment metadata to allocation calls (#20520)
discard a82b21af4d [REFACTOR][IR] Add scalar integer expression signatures (#20521)
discard ac1c1c261f [REFACTOR][IR] Localize primitive checks and containment queries (#20518)
discard 070cea2ec9 [REFACTOR][S-TIR] Own printer hooks and retire legacy predicated loads (#20517)
discard b8b5eb64ec [REFACTOR][SCRIPT] Introduce NativeFunction backed Printer Mechanism (#20516)
discard 6c5f9dfc9f [REFACTOR][Target] Move ConfigSchema into target headers (#20509)
discard ad96d8d28d [FIX][TIRx] Preserve renewal domains and allocation-bound lifetimes (#20502)
discard 48fc122292 [REFACTOR][TIRx] Represent buffer definitions as operation bindings (#20482)
discard 51901f0a4b [FIX][TIRx][CUDA] Support low-precision, tensor-map and cluster kernels in CUDA-host bundles (#20490)
discard b31b6c67a1 [REFACTOR][TIR] Remove obsolete AttrStmt handling (#20486)
discard 6711b6acee Update FromNative call sites for latest TVM FFI (#20483)
discard 23fab48d3c Add context-free Call reinference and binding type propagation (#20480)
discard cac4d21770 [FEATURE][IR] Add typed OpDef signature registration (#20478)
discard 705a7f1cdc [Fix][NVPTX] Cast thread index to the loop variable dtype (#20476)
discard e9ff183c14 [LLVM] Use external tvm-ffi ORC JIT for LLVMModule execution (#20292)
discard 3810df1e52 [TIRx][CUDA] Remove IKET dependency version restrictions (#20477)
discard 4ed720c1b5 [Runtime][Vulkan] Add timer support for the Vulkan backend (#20471)
discard a3d42dc3e1 [REFACTOR][IR] Introduce OpDef and a dedicated Op registry (#20473)
discard 5cff49d52d Simplify instruction kind and script repr registration (#20472)
discard 1c91885357 Migrate TIRx Axis to native tvm-ffi enum (#20470)
discard 7def5c4448 Use dedicated TargetKind registry and fluent definitions (#20469)
discard eabac6d191 [Target] Replace TargetTag with singleton TargetTagRegistry (#20468)
discard fd01df3168 [REFACTOR][Relax] Remove compiled VM TIR path and AnyList intrinsics (#20464)
discard 53f6398cab [REFACTOR][TIR] Remove obsolete TIRx builtins (#20463)
discard f4c8a345db [IR][TVMScript] Share DataTypeImm values across script dialects (#20462)
discard 32c56a1fc1 [TEST][Script] Organize dialect tests and printer highlighting (#20455)
discard 02e0e915a0 [VERSION] Start the v0.28 development cycle (#20459)
discard eaa5abba2a [FIX][TIRx] Preserve boolean bitwise not semantics in C codegen (#20461)
discard 43c0e1adfb [REFACTOR][Script] Replace handle match-buffer bindings with Buffer signatures (#20460)
discard e958bbb8fd [REFACTOR][Script] Simplify annotation scopes and signature variables (#20456)
discard 9510fbfd34 [REFACTOR][Script] Simplify parser registries and protocol contracts (#20454)
discard 218e5e8e0d [REFACTOR][Script] Separate builder protocols and concrete operations (#20444)
discard d56b392ea6 [REFACTOR] Remove obsolete APIs and compatibility wrappers (#20451)
discard cf1d118bf8 [TVMScript] Fill AST locations at compilation and simplify span inputs (#20450)
discard ff6011cf6a [REFACTOR][TVMScript] Fix syntax roots and simplify annotation scopes (#20446)
discard fef5a2fa64 [Script] Make transpiler call helper keywords explicit (#20448)
discard d8476be573 [REFACTOR][TVMScript] Simplify annotation capture and transpiler contexts (#20447)
discard 920918edf9 [REFACTOR][TVMScript] Align C++ builder and printer ownership (#20443)
discard 0f24f67601 [Script] Introduce explicit dynamic symbols (#20438)
discard 21cf7b532c [REFACTOR][Script] Give S-TIR its own construction namespace (#20437)
discard 06d07a47b4 [REFACTOR][TVMScript] Resolve global-info arguments in builders (#20439)
discard 15896fa204 [REFACTOR][TVMScript] Restore dialect-owned IR builder packages (#20440)
discard dc59117dd4 [PERF][TVMSCRIPT] Use lightweight module decorator detection (#20435)
discard a37afbdf73 [REFACTOR][TVMScript] Consolidate Python IR builder packages (#20433)
discard 2b409efe2c [REFACTOR][Script] Separate declaration and result assembly (#20436)
discard f74ac5a1e1 [REFACTOR][TVMSCRIPT] Introduce a new transpiler based parser (#20423)
discard 0e03a39ac3 [Fix][S-TIR] Add a block-aware ForceNarrowIndexToInt32 (#20409)
discard 829b608e8c [REFACTOR][TIRx] Group buffer APIs and remove generic composition (#20402)
discard b50667b7cd [Fix][Metal][WebGPU] Preserve variable bindings when resolving allocation bounds (#20337)
discard 77a78d2655 [TIRx][CUDA] Preserve kernel launch calls and add CUDA host source bundling (#20395)
discard a698adf5f4 [FIX][TIRx] Avoid stale constraints from mutable memory predicates (#20393)
discard 8f97fbce6f [REFACTOR][IR] Promote primitive bitwise and shift operations to nodes (#20392)
discard dd9f9e6a27 [REFACTOR][IR] Unify constants with GenericConst and shared StringImm (#20386)
discard 8ba57d0d81 [REFACTOR] Rename shared symbolic analysis namespace to sym (#20381)
discard 6775443693 [REFACTOR][IR] Move declared call results into TIRX builders (#20382)
discard 2780989257 Move S-TIR specific node and TensorIntrin out of TIRX (#20378)
discard 3b4f813994 [Arith] Use native GCD for fitting BigInt operands (#20380)
discard dceb291f68 [CLEANUP][IR] Remove redundant functor helpers and CLZ float handling (#20379)
discard bb1671ba4b [IR][Arith] Use BigInt-backed integer immediates and wide coefficients (#20371)
discard 4e2f541aae [REFACTOR][TIRX] Migrate StmtFunctor dispatch and organize analyzer helpers (#20370)
discard a50d26e7d4 [REFACTOR][IR] Share tensor region expressions across dialects (#20369)
discard c559d291ec [REFACTOR][IR] Move dialect and codegen registrations to their owners (#20368)
discard d4b4a4d6f2 [CLEANUP][IR][Arith] Move CLZ to shared prim and remove dialect dependencies (#20367)
discard 3a8b520546 [REFACTOR][IR] Share primitive helpers and Python expressions (#20364)
discard f5138fa946 [REFACTOR][TIRX] Use single-inheritance typed StmtExprMutator (#20365)
discard 7cf0953e06 [IR] Make function attribute updates generic via reflected shallow copy (#20366)
discard e2b52d05a6 [Refactor][IR] Move ExprDeepEqual into shared primitive expressions (#20356)
discard 03d6e06aa0 [REFACTOR][TIRX] Share generic expression functor dispatch (#20358)
discard 4048d72f20 [REFACTOR][RELAX] Own global device metadata in Relax (#20363)
discard 21613aa6ce [IR][TE] Share expression effects and register tensor loads (#20359)
discard 20264d3ae5 [Arith] Remove vscale-specific simplification and analysis (#20357)
discard e8e22576c0 [Refactor][Arith] Move conditional bounds into S-TIR (#20355)
discard 49f0c67646 [REFACTOR][Arith] Evaluate iterator domains through Var maps (#20354)
discard 83922446ca [REFACTOR][TIRx] Migrate visitors to shared expression traversal (#20350)
discard dd0ab7f66b [TIRx][CUDA] Add the declared synchronization-word wait (#20353)
discard 72fe3f74bb [REFACTOR][IR] Share checked PrimVar view across dialects (#20348)
discard 1be1d8942e [CLEANUP][IR] Simplify exception-first traversal (#20347)
discard 791c316522 [REFACTOR] Default mutators to exceptions and migrate arithmetic passes (#20339)
discard ed739fd58c [REFACTOR][IR] Unify structural mutation modes and native traversal entrypoints (#20338)
discard 328a6f6a1a [FIX][TIRx][CUDA] Support SM100 weight-stationary B collectors (#20329)
discard 43f9117fca [REFACTOR][IR] New Functor/Visitor/Mutator Infra at Base Layer (#20327)
discard f977ccc7ff [REFACTOR][IR] Colocate type hooks and registrations (#20325)
discard 82c9cfb540 [REFACTOR][TIR] Use StructuralMap in place of Substitute (#20317)
discard a91eb0b395 [REFACTOR][IR] Rename the uniform dispatch table to ObjectFunctor (#20318)
discard c23725dd9e [REFACTOR][Python] Delete the TIR Py* functor trampoline (#20309)
discard e642f559bc [Fix][Codegen] Avoid extraneous parentheses in if_then_else generated code (#20285)
discard 637a6b9089 [REFACTOR][TIR] Inline StructuralWalk at variable-use checks (#20306)
discard c64a4c5ebe [REFACTOR][TIR] Use StructuralWalk in place of PostOrderVisit (#20308)
discard 39dcf04c98 [REFACTOR][IR] Add structural hooks to remaining Type and Relax Expr nodes (#20302)
discard b17fd9e35c [REFACTOR][TIR] Remove IRTransform in favour of tvm_ffi.structural_map (#20304)
discard 922c2ee8db [REFACTOR][ARITH] Use StructuralWalk and Map in arith (#20300)
discard 0c46ba9f1a [FFI] Bump tvm-ffi for StructuralMap policy (#20299)
discard d372067818 [FFI] Upgrade to latest tvm-ffi (#20294)
discard b5f079196d [TIR] Ignore None-valued pragma annotations (#20265)
discard 920faa8676 [Fix][LLVM] Preserve 64-bit AllocBuffer extents (#20141)
discard d8fcef2b6c [Test] Pin CUDA round ties-to-even on exact midpoints (#20274)
discard c00198a815 [REFACTOR][IR] Add structural hooks for Expr and Stmt (#20275)
discard 22220e281c [TIRx][Test] Gate collector-A-only block-scale MMA test on CUDA 13.4 (#20276)
discard 0cdf901738 [CUDA][TIRx] Allow collector-A-only SM107 block-scale MMA and open cp.async wait_group immediates (#20271)
discard fff5d52a93 [TIRx][Test] Gate tcgen05.mma collector certification on nvcc >= 13.4 (#20270)
discard f3dd5f5e8a [CUDA][TIRx] Add collector-qualified tcgen05.mma block_scale forms and bind tcgen05.ld.red redval as output (#20266)
discard 1c6e9d76a4 [Fix][Metal] Bound symbolic stack allocations (#20236)
discard 681a5b8574 [CUDA] Add NVIDIA Jetson AGX Thor target tag (#20259)
discard 14209417b8 [CUDA][TIRx] PTX ISA 9.4 / CUDA 13.4 support for SM103a and SM107a (Rubin) (#20261)
discard af5afb0da9 [BugFix][Arith] Reject padded IterMapSimplify fallback (#20169)
discard 6c9b82c638 [REFACTOR][TIRx] Make BufferRegion a typed expression (#20256)
discard f86affe400 [REFACTOR][IR] Make expression subscription eager and remove SubscriptProxy (#20257)
discard e0e18f767f [Test] Run round ties-to-even test on every backend that implements it (#20252)
discard 1860886eed [REFACTOR][IR] Lift primitive expressions into core IR (#20249)
discard 2c97f19f10 [TIRx][CUDA] Preserve local mbarrier predicate and count (#20250)
discard 601cb4dab5 [FIX][IR] Complete lazy subscript realization (#20251)
discard 4d484a68ea [REFACTOR][IR] Consolidate expression operator overloading into the base layer (#20248)
discard bdead3e55d [BugFix] Align default (C) tirx.round lowering to ties-to-even (#20131)
discard 1a200e33fc [REFACTOR][IR] Unify expression subscription realization (#20246)
discard 1b8e140857 [REFACTOR][IR] Introduce TensorLoad in core IR (#20247)
discard b637e4f419 [REFACTOR][TIR] Split masked buffer access into special calls (#20244)
discard ba0fcdabf3 [Fix][TIRx] Preserve index semantics when narrowing to int32 (#20129)
discard 2b70cdd350 [CUDA][TIRx] Preserve device state during cleanup and skip invalid Top-K references (#20233)
discard 39bf5a5946 [REFACTOR][TE] Represent tensor loads with opaque callees (#20225)
discard c8d067812a [Fix][Arith] Give each materialized Z3 solver a private context (#20221)
discard fb9c49f2d5 [TIRx][CUDA] Allow launch bounds with required block size (#20226)
discard 183119d2c2 [TIRx][CUDA] Align the PTX dialect with PTX ISA 9.2 (#20224)
discard 1c7a5c48d6 [TIRx][CUDA] Support exact required block dimensions (#20223)
discard 75cffb4ad5 [Fix][Support] Use sbsa-linux CUDA include dir on ARM64 Linux (#20222)
discard 72d5da5059 [Perf][Arith] Materialize Z3 solvers lazily on first query (#20215)
discard 3c5b3171f3 fix(tirx): stabilize multi-GPU correctness tests (#20213)
discard 91f76793c3 [Codegen][LLVM] Add LLVM 23 compatibility (#20189)
discard a07cb9589e [Fix][Arith] Preserve nested floormod semantics (#20181)
discard 524a828280 [TIRx][CUDA] Preserve explicit single-CTA cluster launches (#20180)
discard c4234217cc feat(lower-tirx): support PTX movmatrix (#20171)
discard eb4aef2e45 [TIRx][CUDA] Fix single-CTA clusterCtaIdx resolution and accept packed sub-byte tensor-map dtypes (#20172)
discard 038a057cc8 [TIRx][CUDA] Allow newer CUTLASS packages for IKET (#20164)
discard dc3a2c5438 [IR][TIRX] Add first-class tuple expressions (#20168)
discard 893ebeab2f [TIRx][CUDA] Add register and cluster launch controls (#20159)
discard 96d8e3bf5b [Fix][WebGPU] Validate and bound symbolic stack allocations (#20132)
discard 7dedb56f8f [TIRx][CUDA] Add PTX address expressions with immediate byte offsets (#20153)
discard 2f91bb5034 [TIRx][CUDA] Version-gate CUDA 12.8 tensor-map enums and fix registry-test lock leak (#20154)
discard 168e2339af [TIRx][CUDA] Replace source helpers with typed PTX forms (#20140)
discard 0e357aa473 [TIRX] Split backend.cuda.intrinsics, fold tcgen05 descriptors, and fix two PTX dialect gaps (#20120)
discard 5f219a0e32 [Fix][WebGPU] Preserve read-only buffer access modes (#20113)
discard fda47bdec6 [SCRIPT] Support PEP 695 symbolic variables in Relax and TIR (#20107)
discard 333d98d6e7 [TIRx][CUDA] uint32 index dtypes, directive fixes, and PTX ISA coverage (#20110)
discard 1dc34eef3e [BugFix][Metal] Preserve pointer address spaces for byte offsets (#20101)
discard d984d1babd [TIRx][CUDA] Add a table-driven PTX dialect and retire tirx.ptx.* (#20103)
discard 287612db11 [FIX][CUDA] Select NVRTC architecture for output format (#20100)
discard ba0a321caa [FIX][TIRx] Remap typed buffer expressions during specialization (#20090)
discard d0f47f6ebc [Python] Bump apache-tvm-ffi floor to >=0.1.13.post2 (#20094)
discard 9d9bb52a24 [Fix][TIRx] Fix MSVC build of IndexDataTypeNormalizer (#20098)
discard 63db95951f [Fix][Arith] Isolate Z3 contexts and make memoization deterministic (#20097)
discard 45c8940777 tirx: represent buffer parameters with BufferType (#20086)
discard b641696b1f [FFI] Bump tvm-ffi to 0.1.13.post2 (#20088)
discard e9f802b1b1 feat(lower-tirx): align NVIDIA IKET profiling with the official ABI (#20085)
discard e178706f35 [FIX][TIRx] Use physical order for Buffer.local views (#20076)
discard ed468e10b9 [BUILD] Migrate the Z3 dependency to mlc-z3-static (#20084)
discard 511ed2a727 [FFI] Bump tvm-ffi to latest Aug 3 (#20083)
discard 24087da4a7 [TIRx] Flatten cuda/trn backend operator folder (#20081)
discard 23d7eea85a [TIRx] tcgen05 dispatch paths, buffer dim-surgery views, FlashMLA lowering, and typed-buffer migration fixes (#20080)
discard f5742f5bf6 [TIRX] Represent buffers as typed variables (#20079)
discard 7cfb5aa42a [FEATURE][TIRx][CUDA] Support TMEM datapath B (#20075)
discard cc2cc906f7 [FIX][TIRx] Constant-fold copy slice extents (#20067)
discard 6768a5a7c3 [FIX][TIRx][CUDA] Fix tcgen05 register fragment layouts (#20068)
discard 676ceae530 [FIX][TIRx] Remap buffers consistently in ConvertSSA (#20069)
discard f11f8cf858 [FIX][TIRx] Preserve pointer expression types (#20070)
discard f3bd77cf78 [FIX][TIRx] Make TilePrimitiveCall serializable (#20071)
discard 0cf95216e9 [TVMSCRIPT][TIRx] Preserve parser source spans in IR (#20073)
discard f163e71e03 [FIX][TIRx] Use cluster arrivals for remote mbarrier views (#20074)
discard b3b2e54245 [Fix][TIRx] Handle vector access pointer addresses in C codegen (#20058)
discard ccac330d04 [Fix][LLVM] Keep packed init callbacks local on Mach-O (#20052)
discard 9376652ad4 [Fix][TIRx] Ignore statement spans in structural identity (#20043)
discard 01014330b7 [CI] Verify packed uint1 tvm-ffi revision (#20041)
discard 42f29c948c [TIRx] Improve BufferStore cast warning context (#20038)
discard f326d99d5a [Vulkan] Fix SPIR-V 1.4+ entry-point interfaces (#20028)
discard ae0ebc5327 [CI] Bump tvm-ffi with compatible Python wrappers (#20032)
discard d142bbf1d5 [REFACTOR][TIRx] Keep AttrStmt node values unboxed (#20030)
discard 3d740795b2 [REFACTOR][TIR] Remove buffer type and axis separators (#20019)
discard 0db27a67d5 [TIRx] Introduce first-class Return statement (#20018)
discard 6b5ae6dd2a [IR] Rename Var name_hint field to name (#20016)
discard f989048916 [REFACTOR][TIR] Phase out redundant TIRx attr names (#20017)
discard 95b76eb133 [REFACTOR] Remove redundant defensive code guaranteed by IR invariants (#20011)
discard 73b355ac53 [REFACTOR][IR] Use CamelCase Var copy helpers (#20008)
discard 544bea9e1e [Tests] Reduce runtime of slow Python tests (#20006)
discard 24e778ff5b [IR][Relax][TIRx] Unify Var identity (#20004)
discard 9cd6227dda [RUNTIME][PYTHON] Add explicit Target device conversion (#20005)
discard 1f8802ed42 [Tests][TIRx] Localize hardware test gates (#19985)
discard 93def7353d [CI] Bump CI at the Ubuntu 24.04 images and re-enable USE_Z3 (#19911)
discard c193d2796a [Arith] Fix const-int-bound modular-set tightening for Mod/FloorMod (#19978)
discard 319dc62714 [Fix][Python] Use standard scikit-build directory (#19990)
discard 5a18cf4216 [Metal] Let compile callback declare payload format via (payload, fmt) (#19924)
discard 1a1b877ed5 [TIRx] Reuse pass-through input names for inverse index map vars (#19906)
discard da4bf72765 [ARITH] Scope interval constraints to mapped variables (#19963)
discard 68cd7550ba [FFI] Bump tvm-ffi for stable Optional layout (#19956)
discard fa7e1fb42b [CI] Repair Python test cleanup regressions (#19955)
discard c1dfbb4c80 [ARITH][TIR] Track positive loop extents in analyzer visitors (#19927)
discard 5bbee63f86 [Cleanup] Remove macOS Clang warnings (#19954)
discard 88b4b7a9f6 [TIRx] Phase out duplicate Var type_annotation (#19944)
discard bd1888329c Refactor Tensor arithmetic dispatch away from tirx.generic (#19943)
discard 2dff7cd06a [REFACTOR][SCRIPT] Keep dependent shape recursion in docsifier (#19940)
discard c3e9bb5130 [TEST] Serialize local GPU execution under pytest-xdist (#19942)
discard 583b7ae56a [FFI] Use thread-safe packed function initialization (#19939)
discard cc615eb9d9 [IR][Relax] Include expression types in structural identity (#19933)
discard cc716d7bcf [TIR] Construct proven scalar integer constants directly (#19934)
discard 80c348e235 [TIRx] Generalize expression functor signatures (#19931)
discard 9a99cc79aa [TIRX] Remove SizeVar in favor of contextual constraints (#19930)
discard c192b01860 [REFACTOR][IR] Unify PrimExpr with Expr typed view (#19910)
discard f33129dd51 [TIRx] Add a dedicated boolean buffer lowering pass (#19873)
discard 508cb9aa95 [TVMScript] Render invisible paths in structural diagnostics (#19916)
discard c0569c8f73 [Target][RISC-V] Use riscv_cpu device key for RISC-V target tags (#19915)
discard 44c5dfe4cc [FFI] Bump tvm-ffi to latest June 28 (#19903)
discard a49f2d92ad [TIRx] Bundle CUDA tile primitive and op dispatch updates (#19896)
discard 8755bd4d3c [REFACTOR][Relax] Phase out PrimValue and Relax expression wrappers (#19891)
discard dafb01dca9 [TIRx][LLVM] Support scalable Ramp lowering (#19866)
discard e9c370eda6 [TIRx] Replace vars in buffer strides and elem_offset (#19871)
discard 97d7eb27c7 [REFACTOR][RELAX] Rename Relax base type to AnyType (#19889)
discard ea4ace9b14 [ARITH] Use IntImm in canonical scalar hot paths (#19885)
discard 7a565f2cbe [CI][CMAKE] Install CUDA driver stub for libtvm_runtime_cuda (#19886)
discard 05947b83a0 [REFACTOR][IR] Clean up PrimType follow-ups (#19884)
discard a431b42574 [REFACTOR][IR] Unify PrimExpr type mechanism to PrimType instead of DataType (#19875)
discard e68c35d26d [Docs][CI] Switch docs theme and bump images to 20260619-214849-4174cdf5 (#19828)
discard f7548248ec [REFACTOR][IR] Phase out Downcast usages (#19857)
discard de0dc5763b [REFACTOR][RELAX] Phase out Relax PrimType (#19858)
discard 30beec6161 [Metal] Enable Metal 4 shader compilation (#19595)
discard 5121a14f68 [Docs] Add TIRx documentation section (#19855)
discard 40fd9d4c54 [REFACTOR][IR] Unify StructInfo and Type (#19853)
discard dc656eab6d [BUILD] Sync fallback version strings to 0.26 dev cycle (#19845)
discard 703cd1b60d [TIRx] Phase out flat device-intrinsic op aliases (#19838)
discard e0cf2d29e7 [BUILD] Bump tvm-ffi after RuntimeTypeIndex optimization (#19834)
discard 5bb90fea1e [Arith] Add Analyzer::Clone for deep-copying analyzer state (#19836)
discard 53138832a7 [Arith] Restrict floormod coefficient reduction to keep DetectIterMapstable (#19832)
discard 06e5e55b81 [Tests] Remove dead helpers and unused probes from tvm.testing (#19821)
discard b7099ee4ad [Arith] Let IRMutatorWithAnalyzer take a const Analyzer& (#19829)
discard 337b45dce3 [FFI][ABI] Bump tvm-ffi to latest (#19831)
discard 4f97d21534 [Tests] Migrate off tvm.testing.parametrize_targets to native pytest (#19826)
discard 567b290c5a [ARITH] Add optional Z3-backed proving to Analyzer (#19667)
discard d0156c35a1 [Tests] Inline thin gating helpers in the pytest plugin and tvm.testing.env (#19819)
discard 6c1b06a615 [BUILD] Hide static linked library symbols in shared libs (#19817)
discard 06f747c4fd [FIX][TIRX] Fix dangling Op static reference warning (#19806)
discard aa3e0adceb [Tests] Drop tautological env-probe implication tests (#19811)
discard 8be4178cf9 [Tests] Remove the now-unused tvm.testing.parameters() helper (#19807)
discard 9c3771ad40 [Tests] Migrate tvm.testing.parameters() to pytest.mark.parametrize (#19803)
discard 1cbe0ce40b [REFACTOR][TIRX] Add IntImm common scalar ctor and streamline MakeConst (#19797)
discard 4e3ee0de2c [Tests][Refactor] Remove unused testing helpers (#19800)
discard 2bdb24d4fc [CI] Remove Jenkins PR linter step (#19798)
discard 168d12808b [REFACTOR][IR] Simplify CallingConv attribute access (#19799)
discard 758c28a7b7 [CI] Pin GitHub Actions to SHA for ASF INFRA compliance (#19793)
discard eb4e0bc175 [REFACTOR][HEXAGON] Phase out Hexagon app and test wrappers (#19796)
discard 57b80a87ea [REFACTOR] Phase out unused queue and rang license entries (#19794)
discard fbc0e2d0cc [Docs] Modernize test-gating documentation (#19788)
discard a328f51cca [TIRx][RISC-V] Use scalable RVV loops for fixed vectorize (#19776)
discard d481337084 [Tests] Replace remaining requires_* helpers with standard pytest (#19787)
discard b6f9acaadf [TIRX][CUDA] Framework support for FA4, CLC intrinsics, and nvfp4 tcgen05 GEMM (#19785)
discard 74e564f9f5 [Tests] Modernize test gating (#19777)
discard 374a60924f [CUDA] Narrow the cuda extra from cuda-python to cuda-bindings (#19784)
discard 81f25e79ac [REFACTOR][IR] Cleanup IR naming utilities (#19781)
discard ed794ac843 [REFACTOR][PYTHON] Consolidate backend autoload infra (#19769)
discard 1ed5b0590e [REFACTOR][CUDA] Phase out cuda_common.h (#19770)
discard 1c329e1383 [CMAKE] Upgrade TVM build baseline to C++20 (#19734)
discard efb792b5fe [REFACTOR][CUDA] Phase out l2 cache flush preproc test (#19768)
discard 68f1ce1a34 [REFACTOR][TARGET] Cleanup backend target registration (#19759)
discard 8d03dd2a7d [REFACTOR][DataType] Phase out target custom datatype support (#19760)
discard 6f096027d2 [REFACTOR][VM] Move CUDA graph VM builtin back under VM runtime (#19758)
discard 515d1af566 [TIRx] Post-bringup follow-ups: op-dispatch, namespaces, launch bounds, gemm-async, backend reorg (#19757)
discard db4d8c541b [Tests][AArch64] Make SVE codegen assertions robust across LLVM versions (#19752)
discard 29a4192e21 [S-TIR][CUDA] Fix legacy predicated cp.async zero fill (#19741)
discard 57f934a390 [TIRX][Tests] Fix LLVM version gate for vectorized lround (#19753)
discard b956b5e26a [Tests][LLVM] Gate stepvector intrinsic rename on LLVM 20 (#19745)
discard 0cf06a16ee [Codegen][LLVM][Tests] Gate +v9a vscale_range expectation on LLVM version (#19744)
discard 2c4f745cb5 [Runtime][Disco] Fix session attribute storage, NVSHMEM build, and test gating (#19736)
discard cf3f7ab953 [Tests] Fix flaky popen pool executor test (#19746)
discard 89abf00bcd [Script][Tests] Fix dialect redirect module re-execution and stray category-less tirx.intrin_test op (#19731)
discard 454b644771 [PYTHON] Autoload backends; simplify library loading; remove TVMError for native errors (#19727)
discard 576fc92b78 [TIRx] Preserve Triton call_kernel compile options (#19728)
discard 5ee19deac2 [Python] Refactor pyproject.toml dependencies (#19723)
discard ab78c7400f [REFACTOR][IR] Phase out diagnostic.h for visit-context-aware pass errors (#19722)
discard 52bb3f2cc5 [REFACTOR][PYTHON] Remove tvm.ffi shim; import tvm_ffi directly (#19721)
discard 8d79f1cb6e [Codegen][NVPTX] Skip runtime execution in Vulkan codegen tests (#19717)
discard 7d198ee308 [REFACTOR][PYTHON] Slim tvm.libinfo to info-only helpers (#19719)
discard 43fc471e57 [Codegen][LLVM] Accept splat form in VLA broadcast test (#19716)
discard 7395b2d222 [Tests] Skip test modules cleanly when optional deps are missing (#19704)
discard 93c95e2625 [Python] Bump apache-tvm-ffi floor to >=0.1.12 (#19710)
discard 9065b104bf [CI] Target apache-tvm for PyPI wheel publishing (#19686)
discard 674074846e [Arith] Make Analyzer a tvm-ffi Object (#19675)
discard 97948e17f0 [Bump] tvm-ffi to 59da4c0 (#19681)
discard e61dd5382e [TIRx] Update scoped ops and CUDA launch bounds (#19677)
discard 400d754730 [Arith] Gate canonical-simplify LT Case 2 on extra scale == +1 (#19669)
discard 3293fe08fa [Arith] Memoize IntervalSet variable relaxation to avoid exponential blowup (#19670)
discard f2ba1c7fbe [FFI][REFACTOR] Direct structural APIs to tvm-ffi (#19661)
discard 06943b5246 [CI] Reformat the macOS repair-wheel-command as a multiline script (#19664)
discard 1cd3a7c24e [CI] Derive the version from Git tags via setuptools_scm (#19665)
discard afad2a465f [FFI][IR] Route JSON serialization through tvm-ffi (#19662)
discard eed90fffd2 [REFACTOR][TIRX] Consolidate split host device stages (#19663)
discard 3c817c6a5c [CI] Wheel publishing follow-ups (#19659)
discard 72a2d9cbce [TIRx] Post-bringup op-dispatch / codegen / TVMScript follow-ups (#19657)
discard ce01d1d6ac [CI] Add cibw-based wheel publishing to PyPI (#19656)
discard 609a8f66bd [REFACTOR][PYTHON] Revisit lifted support modules from tvm.contrib (#19653)
discard e22b59ea05 [Relax][IR] Skip in-place multiply when two operands are views of the same tensor (#19644)
discard fc7162dac9 [REFACTOR][IR] Delete class Bool and class Integer boxed-type wrappers (#19636)
discard aab0a8df82 [REFACTOR][ARITH] Phase out arith/scalable_expression; arith no longer proves over scalable vectors (#19638)
discard e8b7697a84 [REFACTOR][SCRIPT] tvmscript streamline: lift printer.h, restore one-way dep, migrate dialect config to extra_config (#19631)
discard 3ef53016a9 [REFACTOR][RUNTIME] Structural reorganization: locality moves for thread_map, texture, minrpc, disco, contrib (#19628)
discard 92d6a964e8 [BugFix][Vulkan][CodeGen] Change OpControlBarrier to AcquireRelease (#19619)
discard e1e2657e84 [REFACTOR][IR] Inline ReplaceGlobalVars into AttachGlobalSymbol (#19625)
discard c722fd21ad [REFACTOR][IR][FFI] Bump tvm-ffi (+ SEqHashDef migration) and phase out tvm/ir/repr.h (#19627)
discard cb59dd39b3 [REFACTOR][PYTHON] Lift compiler/CLI/process modules from tvm.contrib to tvm.support (#19624)
discard 1f24337846 [REFACTOR][RUNTIME] Relocate nvtx.h to tvm/support/cuda and make it header-only (#19621)
discard e823b94327 [REFACTOR][RUNTIME] Phase out tvm::runtime::regex_match (#19620)
discard b6dea30f8d [IR] Rename Call annotations to attrs (#19618)
discard 3d6f759596 [REFACTOR][TIR] Tie AnnotateDeviceRegions/SplitHostDevice/LowerDeviceKernelLaunch together (#19605)
discard dae4f88b0f [REFACTOR][IR] attrs.h follow-up cleanup: drop legacy vtable / rename / phase out AttrFieldInfo (#19615)
discard 53fe2f89ed [CMAKE][RUNTIME] Link tvm_rpc with all backend runtime libraries (#19617)
discard 45c86e70b4 [REFACTOR][IR] Phase out class Integer and class Bool in Attrs and PassConfig (#19614)
discard 5c44ae96ca [REFACTOR][TIR][ARITH] Phase out ControlFlowGraph, NarrowPredicateExpression, and rename Simplify to StmtSimplify (#19604)
discard bf08d4c9d2 [REFACTOR][IR] Inline ApplyPassToFunction into relax decompose_ops, delete the util (#19612)
discard 6d591b3978 [REFACTOR][IR] Phase out src/ir/structural_{hash,equal}.cc to tvm-ffi (#19613)
discard 19d15df6f8 [REFACTOR] Move src/ir/script_printer.cc to src/script/printer/ (#19611)
discard 79dc34d97f [REFACTOR][IR] Cleanup attrs.h: drop NullValue, AttrsNodeReflAdapter, legacy BaseAttrsNode methods (#19607)
discard 339a0540bc Fix PytestUnknownMarkWarning: Unknown pytest.mark.adreno_clml (#19602)
discard c2e1819049 [REFACTOR][RELAX] Fold CalleeCollector into relax DeadCodeElimination (#19603)
discard 802ca6cc5e [IR] Add annotations to Call nodes (#19597)
discard 22729d5bc5 [CodeGen][CUDA] Move fast math intrinsic lowering option to PassContext (#19596)
discard 8457550397 [BUILD] Modularize device runtime into per-backend DSOs (#19594)
discard 993563a09d [BugFix][Target][LLVM] Route sinh/cosh/atan/asinh/erf through libm extern (#19568)
discard 922757a36a [TVMScript] Handle undefined functions when dumping IRModule (#19583)
discard ba69bc9b82 [RFC][CodeGen][CUDA]: Gate fast math intrinsic lowering behind target option (#19565)
discard 84643d8da4 [BugFix][Target][LLVM] Use libm for asin/acos instead of buggy inline Taylor (#19567)
discard e95adaa650 [TIRx] Bringup TIRx Infrastructure (#19581)
discard 4d67886202 [Fix][CI]: remove astral-sh/setup-uv from lint workflow (#19554)
discard b9668bde6e [TIR] Add cooperative_tensor builtins and metal.cooperative_tensor storage scope (#19423)
discard 9c6c6e74cf [REFACTOR][IR] Remove dead AttrFunctor template (#19528)
discard 5415163cdf [BUGFIX][TIR] Skip bool-typed expressions in CSE (#19502)
discard 01c47d9373 [release] Update version to 0.25.dev0 on main branch
discard 9a932f0446 [release] Update version to 0.24.0 on main branch
discard 388c18078e [Metal] Include logging headers for metal (#19493)
discard 0ace3bab84 [REFACTOR][FFI] Cleanup ffi indirections in tvm headers + switch logging.h to ffi/error.h where only ICHECK/THROW are used (#19483)
discard e0aa953d29 [FFI][ABI] Bump tvm-ffi to 0.1.11rc2 (#19484)
discard e78aa0f64f [REFACTOR] Delete src/support/libinfo.cc; replace with runtime FFI-registry env query (#19477)
discard bce6406346 [REFACTOR][SCRIPT] TVMScript dialect-friendly refactor: per-dialect restructure + dialect registry (#19479)
discard b3a3eccb11 [REFACTOR][RUNTIME] Phase out include/tvm/runtime/object.h (#19476)
discard c3bfd83e3b [REFACTOR][IR] Move tvm/support/with.h → tvm/ir/with_context.h (#19474)
discard 679971f6a8 [REFACTOR][RUNTIME][CODEGEN] Backend specific target and runtime to enable cross-compile fallback (#19465)
discard 52b120b1f9 [REFACTOR][RUNTIME] Phase out include/tvm/runtime/builtin_fp16.h (#19472)
discard 55fcd7f4a2 [REFACTOR][RUNTIME] Phase out include/tvm/runtime/threading_backend.h (#19469)
discard 32be7becbc [REFACTOR][IR] Migrate include/tvm/node into include/tvm/ir (#19463)
discard 8db99de53d [REFACTOR][RUNTIME] Phase out profiling.h heavy types, rename to timer.h (#19455)
discard 2c73a55572 [REFACTOR][RUNTIME] Macro cleanup — TVM_DLL alignment, [[maybe_unused]], logging.h legacy macros (#19457)
discard 31a5e59696 [REFACTOR][S-TIR] Minimize src/support/ by relocating s_tir-private headers (#19460)
discard db02778c47 [REFACTOR] Phase out src/support/ffi_testing.cc (#19459)
discard 72193adad0 [REFACTOR][NODE] Migrate ReprPrinter to tvm-ffi __ffi_repr__ mechanism (#19461)
discard fc23300dc9 [REFACTOR] Move source_utils.h into runtime/opencl (#19456)
discard 4245860d2c [REFACTOR] Phase out unreachable contrib/rust_extension.cc (#19458)
discard 4b2288ea5a [REFACTOR][CODEGEN] Phase out tvm_global_barrier_state and tvm_prepare_global_barrier (#19454)
discard 933f831e54 [TIR] Update symbolic index term order in loop fusion (#18406)
discard 47016f7ebf [REFACTOR] Isolate backend module creation via ffi.Module.create.<kind> registry (#19447)
discard 779d71fe66 [CMAKE][REFACTOR] Split libtvm.so into libtvm_runtime.so and libtvm_compiler.so (#19444)
discard 0cbdac17bd [REFACTOR] Remove runtime/object.py shim and route Object via tvm_ffi (#19440)
discard c3c21e9435 [REFACTOR] Remove tvm.runtime.packed_func and container shims; route via tvm_ffi (#19442)
discard b357a3fcef [REFACTOR] Phase out include/tvm/runtime/module.h (#19441)
discard 8095fc631b [ARITH] Expose allow_override parameter in Python Analyzer.bind() (#19417)
discard 58f7add7d8 [FIX] Skip metal target tag registration for unsupported LLVM CPUs (#19427)
discard 91c7a399bc [BugFix][LLVM] Fix `insertDeclare` API mismatch for ROCm-bundled LLVM 20 (#19390)
discard 784dc04e1f [Backend][Relax] Add NPU BYOC backend example (#19425)
discard 4fc86bed99 fix: use `is None` instead of `== None` in test files (PEP 8 E711) (#19393)
discard c4e3d7ede6 [Docs] Fix outdated source install and API reference docs (#19409)
discard eb32c77a24 [Docs] Add tvm.s_tir.tensor_intrin API reference and remove empty legacy tvm/tir directory (#19386)
discard a062de9e95 [BugFix][TIRx] Fix bad-optional-access in BF16/FP8 legalize passes for target-less PrimFuncs (#19383)
discard 1e228517d9 [BugFix][TIRx] Fix VerifyMemory crash for PrimFuncs without target attribute (#19382)
discard 63159c3cb8 [Docs] Add Python API reference for tvm submodule docs (#19379)
discard 393b598c2d [BugFix] Align `tir.round` to ties-to-even across all backends (#19368)
discard 86021eeb6c [Docs] Add API reference documentation for tvm.script module (#19366)
discard 8698536141 [BugFix][ONNX] Fix Round op to use ties-to-even (#19367)
discard 7511175d94 [WebGPU] Add gating logic for subgroup shuffle primitives (#18823)
discard 458dd8ef29 Bump tvm-ffi to 1fed0a (#18967)
discard b4bd7816cf [Fix] Replace str(target.kind) with target.kind.name for Target objects (#18959)
discard b551629520 [WebGPU] Reserve additional keywords to avoid WGSL identifier collisions (#18960)
discard 02b80e4f1a [FFI] Bump tvm-ffi to 63224e3 and fix regressions (#18938)
discard d4e908cb2d [DOC] Fix inconsistent code comments (#18939)
discard bb6e9abefb [Vulkan] Avoid explicit layout decoration on non-interface allocations (#18914)
discard c5b240ed32 [Refactor] Bring up tirx namespace (#18913)
discard c10a23c2ea [Target][LLVM] Fix -mcpu validation compatibility across LLVM versions (#18909)
discard 2d331ec3e4 [FIX][LLVM] Use isCPUStringValid for mcpu validation instead of enumerating processor descriptions (#18884)
discard 40482b0753 [TVMScript] Remove T.Bind backward-compat alias (#18891)
discard 48788579b4 [TIR] Reject non-floating inputs for trig unary ops (#18879)
discard adbff0fcb4 [TVMScript] Normalize T.Bind to T.bind for statement builder convention (#18889)
discard 89ec39ba4b [TIR][REFACTOR] Revamp Common Subexpression Elimination (#18886)
discard 0675ed4d01 [Metal] Batched command dispatch and staging buffer pool (#18877)
discard ce85cc1198 [TARGET] Fix round-trip reconstruction of targets with canonicalizer-generated `feature.*` attrs (#18883)
discard e833021290 [REFACTOR][TIR] Remove body from AllocBuffer and DeclBuffer (#18876)
discard 6471236235 [REFACTOR][TIR] Rename LetStmt to Bind and flatten to sequential semantics (#18874)
discard b5b8a3d706 [TIR] Add VisitBufferDef/VisitBufferUse to base StmtVisitor/StmtMutator (#18873)
discard 09d2471397 [REFACTOR][TIR] Introduce AllocBuffer and phase out Allocate+DeclBuffer (#18865)
discard 3ea41fd2e0 [REFACTOR][TIR] Cleanup AttrStmt attributes (#18862)
discard 147b6f5a65 [TIR][Refactor] Enhance error reporting with structured AssertStmt and TVMFFIABIBuilder (#18857)
discard 04122eff2e fix: Complete ICHECK update across codebase (#18858)
discard 3c8c74627a [REFACTOR][CONTRIB] Remove MSC contrib module (#18845)
discard a1c949577e [LLVM] Bump minimum LLVM version to 15 (#18853)
discard 601ba1d01b [TIR][FEAT] Require DeclBuffer before use in verify_well_formed (#18843)
discard 41b65e3e85 [REFACTOR] Remove unused mscclpp contrib module (#18852)
discard 214cb4c248 [REFACTOR] Further cleanup node redirections (#18844)
discard 95279ecb9d [LINT][PYTHON] Modernize annotations with ruff UP rules (#18830)
discard 979a8581a2 [IR][TIR] Remove body from AssertStmt (#18832)
discard b55ca4ff15 [ROCm] Fix some ROCm codegen bugs (#15518)
discard faecf30fd9 [REFACTOR][NODE] Remove node redirect headers (#18829)
discard 9db7e07f27 fix: replace 6 bare except clauses with except Exception (#18821)
discard a730d1b89a [LLVM] Fix build failures when building with llvm>=22 (#18818)
discard 9923581399 [TARGET] Specify correct `mcpu` for Metal target tags (#18822)
discard 28ed029e2f [REFACTOR][METAL] Update CHECK_LE to TVM_FFI_ICHECK_LE in Metal runtime (#18819)
discard aea6e1adf3 [REFACTOR][S-TIR] Lift STIR-only attributes out of tir::attr namespace (#18816)
discard 9becc88302 [REFACTOR][RUNTIME] Phase out legacy contrib runtime backends (#18813)
discard 23ecbf45fa [Refactor][Metal] Update ICHECK to TVM_FFI_ICHECK in Metal runtime (#18811)
discard 468f5b5117 [REFACTOR][LINT] Modernize ruff config (#18810)
discard 641646ec55 [DRAFT][DO NOT MERGE] Bump tvm-ffi to v0.1.9 (#18801)
discard 4e30fee072 [CI] Add GitHub Actions lint workflow (#18809)
discard 49af9d4d14 [LINT] Modernize lint to use pre-commit hooks (#18807)
discard 9735fb7a4e [REFACTOR][TEST] Migrate tir-transform tests from TE to TVMScript (#18805)
discard e6dfe73b49 [REFACTOR][TEST] Remove unused te imports from test files (#18804)
discard bb7bc1598c [REFACTOR] Migrate CHECK macros to tvm-ffi ones (#18803)
discard 57dc6e4363 [FFI] Bring up latest tvm-ffi (#18802)
discard 2fb0ea22d0 [DOC] Fix docstring, unify CMake, nvidia-docker deprecation (#18799)
discard 420021844f [DOC] Unify CUDA naming (#18797)
discard 318d685fab [DOC] Unify GitHub naming (#18794)
discard 78675cd4d5 [REFACTOR][TARGET] Further cleanup target python api (#18793)
discard 139ab2b015 [REFACTOR][TARGET] Cleanup target config (#18788)
discard a32c6264aa [REFACTOR][TARGET] Phase out legacy target string in favor of json (#18785)
discard 2642d81f15 [REFACTOR][RUNTIME] Transition metadata into ffi (#18784)
discard 4196c7ae0b [chore] cleanup unsed legacy backtrac code in logging (#18781)
discard 8d26f80d04 [REFACTOR] Phase out dmlc dep (#18779)
discard 0d8c0695a2 [REFACTOR][S-TIR] More migrations to s-tir (#18776)
discard 4065d6a78a [LLVM][Codegen] Cast NaN to bool gives true (#18772)
discard a8cfb7aef6 [REFACTOR][S-TIR] Migrate more transform to s_tir (#18771)
discard debb4c7efd [REFACTOR][TIR] Phaseout BufferRealize (#18763)
discard 420b6f1101 [REFACTOR] Remove picojson dependency, replace with tvm::ffi::json API (#18759)
discard 6bf47fb758 [chore] Cleanup stale dependencies (#18760)
discard 238115ddc6 [REFATOR][TIR] Phase out AllocConst (#18761)
discard f6f354b946 [CI] Remove i386 and Hexagon from CI pipeline (1) (#18737)
discard b3f05f5862 [REFACTOR][S-TIR] Move remaining data structures to s_tir (#18743)
discard 3bdd2203f8 fix: correct typos 'recieve' and 'occurence' (#18739)
discard a8d15f49af fix: skip dsymutil for static tvm_runtime on Apple platforms (#18744)
discard d738830c30 fix: correct typo 'occuring' to 'occurring' (#18740)
discard 622f684855 [chore][TIR] reorganize src/tir/transforms to src/tir/transform (#18738)
discard 2936f53048 [REFACTOR][S-TIR] Lift dlight into s_tir namespace (#18734)
discard a8df545410 [REFACTOR][S-TIR] Migrate meta_schedule into s_tir namespace (#18735)
discard 4f5b2de2ac [REFACTOR][S-TIR] Migrate tir/schedule to s_tir (#18728)
discard 9bc8c70a8b [REFACTOR][S-TIR] Lift transform passes to s_tir namespace (#18722)
discard ddbfc80cb5 [REFACTOR][TEST] Migrate all codegen test to tvmscript (#18719)
discard a932dae964 [REFACTOR] Migrate old tir.ir_builder to tvmscript or builder (#18716)
discard 3b21443276 [SPIRV] Fix forloop codegen in vulkan (#18715)
discard 471e5c4d7c [REFACTOR][S-TIR] Initialize the s_tir module (#18712)
discard 99b5f3530a [REFACTOR][TEST] Replace CompareBeforeAfter for pytest compact (#18711)
discard 94626b9eaa [LLVM] Fix insertDbgValueIntrinsic for Metal backend (#18706)
discard 83a4c654cd [TIR] Further robustify floordiv/mod intrin lowering to prevent overflow (#18699)
discard f8c13b1fc3 [BugFix][TIR] Fix incorrect optimization when lowering floordiv and f… (#18694)
discard 5c1aa689d4 [REFACTOR][TIR] Rename tir.Block to SBlock (#18689)
discard 3f2e85776a [release] Update version to 0.24.dev0 on main branch
discard f5ed70235a [release] Update version to 0.23.0 on main branch
discard a2101bfa4f [NVRTC] Add NVSHMEM support to NVRTC compilation path (#18681)
discard 7f2ab012e5 fix: MSVC pragma (#18674)
discard cfcc64a35f [FFI] bump to latest version (#18654)
discard 5ddf5894e5 Put options before objects when compiling (#18656)
discard cda539a098 [ADRENO][TEXTURE] Texture based lowering (#18523)
discard 80f1cb6e4e [Compile] accelerate compilation speed using NVRTC (#18519)
discard 78f4cf1bcc [CUDA] Fix cuModuleUnload crash during interpreter shutdown (#18624)
discard aa84809fbb [CUDA][FFI] Extend kernel launch config to support Programmatic Dependent Launch and cuLaunchCooperativeKernel (#18604)
discard 38cfda1220 [BugFix][OpenCL] Guard QCOM perf hint behind USE_OPENCL_EXTN_QCOM to avoid undefined symbol on non-QCOM runtimes (#18589)
discard 6c39a5e66e Fix ACOS precision issue for boundary values (x=±1.0) (#18582)
discard 1b6b05f5d0 [LLVM][Codegen] Avoid segfault when `arith::GetVScaleValues` returns empty vector (#18586)
discard d0c45e212b [TIR][Schedule] Fix bug on bfloat16 conversion (#18556)
discard a63cb4446d Revert "[ARITH] Fix InternalError: Check failed: (eval_vec_) is false" (#18542)
discard 0bffb12f47 [ARITH] Fix InternalError: Check failed: (eval_vec_) is false (#18536)
discard edbc2e7c67 [Relax][PyTorch] Unify tests using shared tvm.testing.assert_allclose (#18522)
discard 6a258a4694 [TIR] Fix tir.LowerIntrin check failed additional_info.size() == new_size (#18514)
discard 70e1ddfc0d [Pass] Add DumpIR pass instrument to save IR snapshots (#18511)
discard 12f4d9253d [MISC] Remove unused TVMC configs (#18512)
discard 37392664b3 [MISC] Fix compilation warnings (#18509)
discard 8771e7b3c5 [TVMScript] Add block name suffix management for TIR macros (#18465)
discard 16e745b8d9 [TIR]: Fix VerifyStream::Verify causes dereferencing an invalid pointer (#18479)
discard 36a9a3497f [RELAX][PASS] Annotate Custom Scope layout pass for Adreno GPU (#17599)
discard 3a2a5869de [TIR] Add step attribute to ForNode (Initial codes) (#18421)
discard c6ad165ca5 [DataType] Update to use explicit Bool Type Aligning with DLPack (#18453)
discard 6057a1eb83 [TEST][CODEGEN] Fix the test scripts tries to tell numpy a dtype name that it cannot recognise (#18430)
discard c1718170d1 [FFI] Bump tvm-ffi to latest (#18411)
discard 93719d3e10 Support integer types in exp TIR expression operator (#18390)
discard a51917b9de fix the 8-bit vector loads/stores problem, which will solve the problem raised in the codegen test for cuda (#18398)
discard 867d625d9d [release] Update version to 0.23.dev0 on main branch
discard f5fccc83a5 [release] Update version to 0.22.0 on main branch
discard 6dc2c6ccf0 [FFI] Bump tvm-ffi to 0.1.0rc2 (#18376)
discard cd7fe1363f [TIR] Refactor division simplification in RewriteSimplifier (#18319)
discard d731baff33 [Analyzer] Enhance ConstIntBoundAnalyzer and IntervalSet with modular set analysis (#18330)
discard 2c9a6f5f1c Upgrade to CUTLASS 4.2.1 (#18372)
discard e72ec0623f [FFI] Bump tvm-ffi dependency (#18370)
discard 3cc27aa180 [FFI][ABI] Bump tvm-ffi to latest (#18354)
discard 20f3bc769a [FFI][ABI] Bump tvm-ffi to latest (#18349)
discard b0f8fd2f4e [Python] Add library lookup path for tvm installed as a pakcage (#18348)
discard 47044abb45 [FFI][ABI] Bump tvm-ffi version to reflect RC ABI Update (#18345)
discard c92d8b6108 [FFI][ABI] Bump version ffi to latest (#18332)
discard 10a342243d Fix conflict parameter name promote_dtye in FP8ComputeLegalize (#18334)
discard 0b8704f5ea [CMake][Web] Install `web/` directory in cmake for Python package (#18327)
discard a5ca77e9a3 [TIR][CUDA] Preserve float precision in codegen with hexfloat output (#18320)
discard f75761bbb1 [TVMScript] Support continue and break in tvmscript (#17804)
discard c6a5e8dbc8 [REFACTOR][FFI] Split tvm-ffi into a separate repo (#18314)
discard e55f04f940 [FFI][REFACTOR] Update TVM_FFI_STATIC_INIT_BLOCK to fn style (#18312)
discard 2ad44a43e2 [FFI][ABI][REFACTOR] Enhance DLPack Exchange Speed and Behavior (#18306)
discard 38215ceb3b Clear ext_lib_dll_names for macOS platform (#18304)
discard e93045fe5e [CUDA] Support NVTX in CUDA 13 (#18300)
discard 9cec66077b [Fix] Add libxml2 dependency to fix Windows CI build failure (#18296)
discard 910c7fb68d [FFI][ABI] Introduce generic stream exchange protocol (#18295)
discard 530b683d60 [FFI][REFACTOR] Streamline Object Declare Macros (#18289)
discard 954eaf0b45 [Metal] Fix MetalModuleCreate (#18290)
discard 7ff74e13ea [FFI][REFACTOR] Introduce UnsafeInit and enhance ObjectRef null safety (#18284)
discard 5c6efb1509 [Fix][Metal] Fix type for device array in Metal API (#18283)
discard 20e66820b2 [FFI] Relax default alignment and continguous requirement (#18282)
discard fd07ad63f3 [FFI][REFACTOR] Cleanup namespace (#18280)
discard 8a39f30089 [LLVM][METASCHEDULE] Add RISCV V-extension v1.0 kernels to metaschedule (#18243)
discard 01e488f933 [FFI][REFACTOR] Cleanup tvm_ffi python API and types (#18277)
discard f17e5d0ea4 [FFI][REFACTOR][ABI] Rename NDArray to Tensor (#18275)
discard bd9a0b4ed5 [FFI][ABI] Append symbol prefix for ffi exported functions (#18273)
discard f66d23c9bd [FFI] Construct NDArray.strides by default (#18272)
discard 9413163000 [FFI][ABI] Introduce weak rc support (#18259)
discard da7380a6e6 [FFI] fix two seemingly migration issue (#18258)
discard f310809dcc [Python] Complete Python packaging with scikit-build-core (#18251)
discard 30103a9eac [Build] Migrate Python packaging to pyproject.toml with scikit-build-core (#18239)
discard 96d8ca3b7a [LLVM][MSWIN][CI] Fix LLVM module build with latest CI update (#18245)
discard 4c48e6100d [Fix] Update FlashInfer JIT header lookup (#18244)
discard 1626a90ac9 [Relax] Add Python function support and BasePyModule for PyTorch integration (#18229)
discard 73b7ea92ba [LLVM][Fix] Do not emit debuginfo on vscale or other unknown types (#18232)
discard ee354bcc1f [FFI][REFACTOR] Establish tvm_ffi python module (#18226)
discard 7c209f72b1 [NVSHMEM] Fix compatibility with CUDA code without nvshmem use (#18222)
discard f369d583b8 [Fix] Resolve deadlock in PopenPoolExecutor and LocalBuilder (#18219)
discard abbfd40755 [FFI][REFACTOR] Cleanup API locations (#18218)
discard 673f8c8224 [FFI][REFACTOR] Establish Stream Context in ffi (#18216)
discard 8b558a3ae3 [FFI][REFACTOR] Establish ffi.Module in python (#18214)
discard 08e3b585f1 [FFI] Formalize ffi.Module (#18213)
discard 727b7a65df [CODEGEN][REFACTOR] tir.call_llvm_intrin to remove nargs (#18206)
discard 273bba6d6d [FFI][REFATOR] Cleanup entry function to redirect (#18205)
discard 618c068be6 [LLVM] Fixes up to the latest LLVM21 (#18204)
discard b2ddfc3fd0 [FFI][REFACTOR] Move Downcast out of ffi for now (#18198)
discard 7f43571dc7 [TIR] Fix host/device function check for build (#18199)
discard db88d067f7 [REFACTOR] Update data type rewriter to enable recursive rewrite in Any (#18197)
discard df927c5d38 [FFI] Phase out ObjectPath in favor of AccessPath (#18192)
discard 0fa972e0f8 [FFI][REFACTOR] Phase out getattr based attribute handling (#18189)
discard 8221087227 [FFI][REFACTOR] Migrate the Save/Load JSON to the new reflection (#18188)
discard 2540a9db04 [FFI] Introduce small string/bytes (#18185)
discard 86e706c41f [FFI][REFACTOR] Hide StringObj/BytesObj into details (#18184)
discard e623741db1 [FFI][REFACTOR] Cleanup to align to latest ffi (#18183)
discard 0bdbc1ed76 [REFACTOR][FFI] Phase out SEqualReduce/SHashReduce (#18172)
discard 70e926951b [FFI][REFACTOR] Migrate StructuralEqual/Hash to new reflection (#18166)
discard eef9936b99 [TIR] Fix trivial index map [] -> [0] (#18154)
discard 6af05d7e37 [TIR] Decouple DeepEqual from StructuralEqual (#18151)
discard 8d6e40da81 [FFI][REFACTOR] Phase out TVM_FFI_REGISTER_GLOBAL in favor of GlobalDef (#18148)
discard 1f39528469 [FFI][REFACTOR] Modularize refelection (#18147)
discard 523c635047 [TIR] Add `T.thread_return()` for early thread exit in CUDA kernels (#18134)
discard 5b9a2bdeac [CodeGen][CUDA] Add sinhf CUDA Math API for CodeGen (#18144)
discard daaf444d1c [REFACTOR] Migrate TVM_FFI_REGISTER_GLOBAL to new reflection style (#18142)
discard d68e6e7ed7 [MISC] Fix compilation warnings of unnecessary `std::move()` calls (#18130)
discard 555d81f915 [Target] Support CUDA device function calls (#18055)
discard 3ee5ef0d1e Revert "[Refactor] Build cython with isolate environment" (#18127)
discard f68ac80c59 Phase out StackVM runtime support (#18125)
discard 6a1fb8cc98 [Refactor] Build cython with isolate environment (#18124)
discard 55af5d7a5b [Codegen] Update LLVM version requirement for `insertDeclare` (#18123)
discard 161f577dbb [release] Update version to 0.22.dev0 on main branch
discard 6f0188ccfa [release] Update version to 0.21.0 on main branch
discard 701b4e624e [FFI] Replace `__attribute__` with C++ standard attributes (#18114)
discard 4ebc82a9e9 [CMake] Refine C++/CUDA standard settings in CMakeLists.txt (#18113)
discard 781395a1c2 [FFI] Cleanup visit_attrs attribute after refactor (#18112)
discard 1f430b5684 Add LLVM Legalization for tir.erf (#18104)
discard 900cf8cb94 [REFACTOR][FFI] Phase out old VisitAttrs mechanism (#18106)
discard a22f22e050 fix: guard tensormap with cuda version check (#18107)
discard 3ad9c8a4c1 [REFACTOR] Formalize namespace for all objects (#18101)
discard 8a7b0439d0 [Runtime] CutensorMap support (#18097)
discard ac91be6e33 [REFACTOR] Transition VisitAttrs to new reflection mechanism (#18098)
discard 1310ad43eb [REFACTOR] Transition VisitAttrs to new reflection mechanism in tir/ir_builder/meta_schedule (#18096)
discard da1a5d379b [FFI][REFACTOR] Migrate attrs to use new reflection (#18095)
discard 9735538b15 [NVSHMEM] Extend CUDA backend to compile and link TIR modules with NVSHMEM (#18093)
discard 289a605288 [FFI] Provide Field Visit bridge so we can do gradual transition (#18091)
discard 38f5091721 [Script] Enhance alloc buffer handling in nested frames (#18088)
discard d39a1b3a21 [SCRIPT] Bump Python minimum version to 3.9 and update AST compatibility (#18086)
discard 904a48cf96 [Script] Add support for merging block annotations (#18079)
discard f653ee3386 [REFACTOR] Phase out LegacyReprPrinter and improve CommonSubExprElim (#18080)
discard 1e78c1a17e [REFACTOR] Phase out the RelaxExpr.checked_type in favor of struct_info (#18078)
discard 145ddcf884 [ARITH] Add IsBound method to ConstIntBoundAnalyzer (#18067)
discard 7f0afdb710 [TIR] Extend address_of to support Buffer objects (#18068)
discard 53d807f53b Add Python functor support for TIR expressions and statements (#18060)
discard 6483e35b23 [FFI][REFACTOR] Update registry to have complete meta-data (#18062)
discard 16e1ed462b [TEST] Move temp files into tempdir (#18058)
discard 5993c0adb5 [TIR] Phase out ProducerStore, ProducerRealize and Prefetch (#18057)
discard e3e37eb222 [FFI] Enhance FFI Object exception safety during init (#18050)
discard 8512602760 [Refactor] Rename `relax_vm` to `vm` (#18049)
discard 98190aa7ef [3rdparty] Phasing out FlashInfer AOT from 3rdparty (#18046)
discard ff1d89280a [REFACTOR] Phase out the relax tuning_api (#18043)
discard 9cc996259f [REFACTOR][FFI] Update symbol name for library module (#18042)
discard 058a7f8fe5 [Metal] Fix `GetFunction` of metal runtime (#18034)
discard 991982fba9 [Dtype] Low-precision Blackwell Datatype Support (#18027)
discard f046eb5c41 [BugFix][CUDA] Fix: Update settings for rerun on Increase FloatImm precision when printing 64 bit values in CUDA codegen (#18035)
discard b71cc0e4d7 [ARITH] Canonicalize mul-coefficient to rhs (#18031)
discard 80b217bbe9 [Codegen] Resolve issue #17965 where the same model produces different outputs on the LLVM (CPU) and CUDA (GPU) backends (#17985)
discard 01b59e00a4 [CUDA] Fix thrust with latest FFI refactor (#18024)
discard 4941ea0a88 [ARITH] Fix canonical simplify for LE with incorrect range assumptions (#18025)
discard 97691b0b2c [Python] Fix library lookup path for pip installed packages (#18026)
discard d3a3d324da [REFACTOR][FFI] Cleanup PackedFunc redirections (#18022)
discard ce581df33e [REFACTOR][PYTHON] Phase out tvm._ffi and Limited API support (#18020)
discard 09f4b0299e [REFACTOR][FFI] Phase out legacy C API (#18010)
discard 1a2a636af0 [Vulkan] Add TIR unary trigonometric/hyperbolic intrinsic definitions (#18005)
discard 691aed8cc3 Add registion for the operator asinh, acosh, atanh in llvm (#17969)
discard e73f7dcaca [FFI][REFACTOR] Update to distinguish as and cast (#17979)
discard b00b0b1a51 [LLVM][Codegen] Enable SVE/VLA for RISCV targets
discard e9b0206e9f [LLVM] Fix JIT unknown reloc issue for case of RISCV
discard e0b0ec5f09 [FFI][LLVM] Fix compilation errors with clang20 (#17954)
discard 301b7630e6 Add registion for the operator asin and acos in llvm (#17945)
discard 2f42918239 [REFACTOR][FFI][RPC] Migrate RPC to use the latest FFI ABI (#17931)
discard 94938cd2fb [REFACTOR][FFI] Cleanup container redirections (#17929)
discard 4b387b71e5 [REFACTOR][FFI] Cleanup PackedFunc related redirection (#17923)
discard 08df517fe7 [Relax][PyTorch] Add div.Tensor_mode and trunc Op Support for Exported Program and FX graph (#17924)
discard ba27ad420c [REFACTOR] Introduce and modernize FFI system (#17920)
discard 0954b3c368 [WebGPU][CodeGen] Override PrintVecElemLoad and Store for WebGPU (#17917)
discard e066a63008 [Triton] Support latest `triton.compile` interface (#17913)
discard 3523d5785e [Relax][PyTorch] Add Logaddexp op support for exported program (#17803)
discard 059022aab9 [Install] Fix error during python/tvm installation (#17808)
discard 35622ea6cd [release] Update version to 0.21.dev0 on main branch
discard 5a304f254f [release] Update version to 0.20.0 on main branch
discard 791982b346 [NFC] Fix `explict` typo (#17811)
discard b6fbd079d2 [REFACTOR][TIR] remove legacy tir::any (#17783)
discard da59d0a99f [REFACTOR] Phase out StackVM (#17784)
discard 15253adaaf [Codegen] Support codegen for vectorized tir.ShuffleNode (#17748)
discard f356897f1a [Refactor] Clean up Relay references in the codebase (#17733)
discard 05bfad067c [Codegen][CUDA] Fix codegen of cast among vector bfloat16, fp8 and fp4 (#17741)
discard cc7b910034 [BF16] Support ndarray.asnumpy() to bfloat16 tensor natively using ml_dtypes (#17739)
discard dd2d0f972e [IR] Compact Functor vtable (#17731)
discard 586fb0ee64 Fix typos in comments and strings (#17736)
discard 4e2ad56139 [DataType] BF16 Support (#17670)
discard 4de1df1ddb [Refactor] Migrate build API to `tvm.compile` (#17718)
discard b811f14734 [FFI] Phase out ctypes fallback in favor of cython (#17714)
discard 6098f0c07d Fix the get_target_compute_version for sm >= 100 (#17716)
discard 174fd0caae [Refactor] Introduce base Executable class and `tvm.compile` interface (#17710)
discard c0cf726d51 [DataType] Rename FP8 dtypes to standard names (#17712)
discard 4ab9f799ca [CUDA] FP4 cast and reinterpret support (#17708)
discard 6da1878126 Fix typos in multiple files (#17703)
discard 38d85ffaa1 [Refactor] Remove legacy TE schedule tag (#17701)
discard 642335bbf8 [Codegen] FP4 support (#17630)
discard 3f3e35fdf2 [REFACTOR] Cleanup legacy TE-based passes (#17685)
discard 1db7a51bf8 [REFACTOR] Followup cleanup of relay phase out (#17681)
discard e933ef6f83 [REFACTOR] Allow target dependent default tir pipeline dispatch in tir.build() (#17669)
discard c052242e73 [REFACTOR] move build flow from C++ to Python (#17665)
discard 17dbe017e9 Pick up vector length from 'zvlXXXb' (RVV) mattr for riscv (#17641)
discard 564eaa3dda [RELAX][BYOC] OpenCLML offload support for Relax (#17654)
discard 1fa9096e79 [Refactor] Phrase out python dependency `decorator` (#17661)
discard f48f72ba2e [REFACTOR] Phase out te.Schedule c++ components (#17662)
discard ad189bb333 [REFACTOR] Phase out relay c++ components (#17660)
discard c6a8a318ba [REFACTOR] Phase out te.schedule python components (#17658)
discard d59fda033d [REFACTOR] Phase out relay python components (#17656)
discard d7e04e3e8f [OPENCL][TEXTURE] Improved texture memory planning (#17571)
discard 8f0b7b998e [PYTHON] Build cython by default (#17637)
discard e225a6e3d4 [CUDA] Remove htanh from unsupported math ops for CUDA 12.8 (#17639)
discard 8da72fe305 [RUNTIME][CLML] Profiling options enabled for CLML (BYOC via JSON Runtime)
discard 0f569d947d Handle vector width (VLEN) for RISCV arches
discard bc621ce360 [Codegen, CUDA] Add FP8 Tensor Core Codegen (#16950)
discard 9926517c18 [KVCache] Add KV Cache for CPU Runtime (#17615)
discard bdc62b21af [ADRENO][WINDOWS] Windows build dependencies for Adreno target
discard 9ad02f3e84 enforcement on loop partition control
discard 278bcc4fbc [RELAX][PASS] Convert layout pass and ops enhanced to support sub indexing (#17568)
discard a2b0269946 [RUNTIME][OPENCL] Bugfix
discard 67bfbb82d3 [release] Update version to 0.20.dev0 on main branch
discard bcdecdbf63 [release] Update version to 0.19.0 on main branch
discard 7089236e8f [Runtime][Dist] Implementation of KV cache transfer (#17557)
discard cb92a4cb0e [Refactor] Phase out microTVM (#17554)
discard 404e8abc22 [LLVM] Make compilable with LLVM-20 (#17547)
discard 019b74dd58 [LLVM][RUNTIME] Make ORCJIT LLVM executor the default one (#17538)
discard 4dcda77a81 [CI] Upgrade CI image to `20241105-030952-3e386fd3` (#17451)
discard 533e625dd7 [REFACTOR] Phase out VTA (#17542)
discard 98bd58bfb9 [FIX][topi.scatter_nd] fixed shape equality assert by using analyzer to prove equality (#17537)
discard 97640e9aef [OPENCL][ADRENO] Introduce Qualcomm extension support (#17519)
discard 69f4b50602 [TE][CreatePrimFunc] Fix loop carried dependency case with nested block levels (#17474)
discard 7e7248097a [Device][OpenCL] add CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST to … (#17472)
discard 002771f736 [TIR][Schedule] Add annotate_buffer_access primitive (#17423)
discard 71eec2120e [release] Update version to 0.19.dev0 on main branch
discard 00c715dfb9 [release] Update version to 0.18.0 on main branch
discard 90eeedd38c [TIR] Add `is_vector` Method to DataType class and update usages across Codebase (#17443)
discard f5a6afbb5e [TVMScript][TIR] Add source kernel intetration via call_kernel (#17434)
discard 8dd9815045 [CMake] Add NCCL/RCCL header directory to include path (#17422)
discard b2cfa65fa5 [Runtime] Add property Module.is_device_module (#17407)
discard a2e3ec33de [CI][Windows] Workaround for error in FindLLVM (#17409)
discard bf76afdb53 [TIR][NarrowDataType] Bufferload's index should not inherit bits constraint of value (#17411)
discard c25f3fd882 [BYOC][NNAPI] Add NNAPI backend for BYOC (#17385)
discard 26918c06cf [TIR, TVMScript] Add TIR - Triton integration (#17395)
discard 4a59580c8d [WASM] Implement concat embeddings (#17404)
discard b1aeb326ee [CI] Update image tag to 20240917-153130-9f281758 (#17397)
discard 73bc6d4084 [Fix][LLVM] Fix getHostCPUFeatures LLVM version cutoff (#17403)
discard 788e31db0e [TVMScript] Avoid segfault from invalid TVMScript (#17373)
discard c1c65b40fa [FIX] fix bug when normalize iter with different lower bounds (#17360)
discard 2087834704 [IR] Expose ReplaceGlobalVars utility in the Python API (#17361)
discard 618c6b1de4 [LLVM][RUNTIME] Fix RISC-V CodeModel propagation to ORCJIT runtime executor (#17347)
discard 2814a73ded [Relax] Update GlobalVar name in AttachGlobalSymbol (#17202)
discard 4deb2e3f4b [Target] Refine equality check on TargetKind instances (#17321)
discard 61f3ecc30d [Disco] Add NVSHMEM support (#17317)
discard d5428d032b [Codegen][WebGPU] LetNode common subexpr override (#17302)
discard e4917f03c0 [Rocm] Fix non-standard rocm path (#17295)
discard 669f1dbe4b [Docs] Introduce Relax API and move legacy part to standalone page (#17286)
discard bcd4b62aa7 [ROCm] hipBLAS integration (#17290)
discard bf8ac156d6 [FFI][Runtime] Use TVMValue::v_int64 to represent boolean values (#17240)
discard 92c928a1a6 [Codegen] Emit `tir::Let` as var assignment explicitly (#17278)
discard 246188b16e [WINDOWS] Compiler options for non x86 targets (#17260)
discard 4d2340658c [CODEGEN][OPENCL] Fix opencl codegen for few ops (#17273)
discard 1da58f2324 [FFI] Re-introduce the boxed primitive values (#17257)
discard 47afca5457 [ROCm] Support ROCm 6 (#17256)
discard df17775926 Revert "[FFI][RUNTIME] Introduce runtime boxed types for int/float/bool" (#17252)
discard 4cf9f4bc13 [Relax] Implement R.ensure_zero_offset and update memory planning for R.view (#17145)
discard 71e7b80c2d [FFI][RUNTIME] Introduce runtime boxed types for int/float/bool (#16183)
discard cd57c0e68a [TIR] Validate tir::Buffer axis_separators on construction (#17219)
discard eea8e5a83f [LLVM] Fix for getHostCPUFeatures API change (#17199)
discard 941cd1fd72 [Disco] Implement SocketSession (#17182)
discard 03e06da957 Pass to eliminate redundant branch and overcompute (#17170)
discard 74ea74469e [TIR][Analyzer] Simplify `x==x` expressions for all dtypes (#17158)
discard 2db40b2d39 Remove and replace deprecated `distutils.util.strtobool()` (#17185)
discard 53d08cbba1 [Relax] Integrate cuDNN attention (#17157)
discard ae1bf52062 [release] Update version to 0.18.dev0 on main branch
discard 0fc4528e12 [release] Update version to 0.17.0 on main branch
discard e744f25e6a [QoL][IR] Provide default constructor for NameSupply/GlobalVarSupply (#17135)
discard 123e32a5d4 [Utils] Define line-length for "ruff format" (#17125)
discard 203359d1a3 [Backend][ROCm] Fix error when building TVM with LLVM 19 (#17141)
discard 3035dcb8b1 [TOPI] Add dense schedule for fp16 and fp32 using gemm (#17091)
discard a628cf7954 [WebGPU] Implement `tir.dp4a` with WGSL built-in function `dot4I8Packed` (#16976)
discard a5217f2ba2 [Hexagon] Add support for v75 (#17123)
discard d14d1b2fd4 [WebGPU] Add `tir.dp4a` (#17124)
discard c6f45b6d97 [TIR][DLight] Enable SimdGroup op for Metal (#17112)
discard f38f3f39bd [TVMScript] Better Type Annotation for TIR OP (#17107)
discard 73c76eacb1 [Dlight] Use 16x32 spatial x reduction thread extents in GEMV scheduling (#17082)
discard 9c6bbaa188 [TIR][RPC] Allow RPC calls to compiled PrimFuncs with no arguments (#17098)
discard a42009ce7f [UnitTests] Use tvm.ir.assert_structural_equal whenever possible (#17092)
discard 201f465a13 [SME] Utilize predication in fp32 matmul and conv2d schedules (#17054)
discard c1ac86b8db [CMake] Show NVCC include directories in compile_commands.json (#17079)
discard 5c62436f28 [SME] Extract gemm block correctly when fused with bias (#17076)
discard b1a079df2a [Arith][SVE] Add rewrite rules for indices split by scalable expressions (#17046)
discard 4a240871d4 [Metal] Enable Debug Label (#17059)
discard 081576794a [WebGPU] Translate `int8x4` into `u32` (#17071)
discard 6a88a84d5b [FP8][Codegen] Add make_fp8 vector constructors (#17065)
discard bca45deb28 [CODEGEN] Vector-Codegen support for llvm-pure-intrin (#16985)
discard 30bf82a2f3 [Runtime] Compatibility with dmlc::Stream API changes (#16998)
discard 48f310b248 [Runtime][ROCm] Enable ROCm host memory support (#17037)
discard 0563ca0e03 [TIR] Fix Bug in VectorizeLoop (#17039)
discard adfa48e06a [Runtime] Use preferred host memory (pinned memory) in KV cache (#17036)
discard c8dca9e283 [SME][TOPI] Add conv2d NHWC SME fp32 schedule (#17003)
discard 86846136af [SME] Add scalable fp16->fp32 dense schedule (#16981)
discard 3ef71b82bb [SVE] Add support for representing and creating buffer-level predicates (#16966)
discard 685d26201a [TIR] Fix Shuffle rewrite (#17030)
discard 3205a06fde Support multinomial_from_uniform dispatch (#17010)
discard fa6e3a071b [Metal] Support metal device profiling (#17025)
discard daef5b31d6 [USMP] add missing const specifier for global_const_workspace (#16999)
discard 2211bb37a0 [TOPI][Testing] Enable conv2d NHWC fp16 topi testing for `arm_cpu` (#17007)
discard ee42f131c5 [SVE] Use only powers of two as possible vscale values (#17001)
discard 2fa43aa321 [Runtime] Allow query of available device memory through DeviceAPI (#16994)
discard 291c71affd [SME] Introduce scalable fp32 dense schedule (#16921)
discard 5c3e8a6cf2 [Relax][Transform] Handle identical PrimFunc with distinct VDevice (#16959)
discard 59aa2156bb [QoL][IR] Provide std::hash and std::equal_to for IR Variable types (#16909)
discard e8d7633eb0 [Cuda] Skip FreeDataSpace when CUDA driver is in inconsistent state (#16980)
discard 4d284b1857 [UnitTest] Use pytest's scope='session' for tvm.testing.parameter (#16930)
discard 161f9653d5 [SVE] Add codegen support for `vscale_range()` function attribute (#16962)
discard 82de5a934e [TIR] Support narrow dtype for let binding (#16947)
discard b34026765c [LLVM] Stringref API deprecation fixes (#16968)
discard 7154817d8d [SVE] Add get_active_lane_mask builtin (#16965)
discard 4d016b441c [TIR] Enhance CLZ intrinsic support (#16952)
discard ecdfa37ddb [Runtime] Allow offset to be specified in NDArray::CreateView (#16938)
discard 7b5f8550fb [Fix] Fix SSA conversion for SizeVar retention (#16924)
discard 322719b02c [TVMScript] Support `T.launch_thread` with i64 dtype (#16916)
discard 1d2fa37058 [SVE][TOPI] Add conv2d NHWC hybrid SVE schedule for `arm_cpu` (#16899)
discard ded803ed14 [CMAKE] Make LOG_BEFORE_THROW explicit (#16914)
discard ee8a3728e0 [SVE] Check for SVE target in VectorizeLoop (#16893)
discard 408e99b9a2 [Upd] Fixed lld search in rocm (#16907)
discard 93759a9e2e [CMAKE] Misc improvment of Util (#16900)
discard 67406d83dd [Bugfix] CudaDeviceAPI::GetAttr may check kExist when GPUs absent (#16903)
discard 6a88042aa5 [Target] Don't register AArch64 target tags without LLVM compiler support (#16897)
discard 974c94377d [TVMScript] Optionally use `ruff format` instead of `black` (#16876)
discard d2b3b23a38 [RUNTIME][VULKAN] Support total_global_memory (#16890)
discard e88a0a7c44 [SVE] Support splitting by vscale in `tir::split` and `te::split` (#16862)
discard 5d16198be5 [Relax] Stabilize relax pass mutation order (#16883)
discard 7b6696bf1c [TIR] Make T.reinterpret nop when dtype is the same (#16879)
discard 7a7ae1ada2 [release] Update version to 0.17.dev0 on main branch
discard 4fea0eecfa [release] Update version to 0.16.0 on main branch
discard e2149e50b7 [OpenCL] Add OpenCL device for automatic target detection (#16854)
discard b4decaf3fe [BugFix][Target] Added null check to fix segfault at ->defined() in cpu.cc DetectSystemTriple() (#16766)
discard de531b4500 [Codegen, CUDA] Add handling of fp8 broadcast / const (#16865)
discard 5b46112aa7 [TVMScript] Add parser and printer support for e4m3/e5m2 fp8 (#16864)
discard 7081597256 [VULKAN] Fix CLZ support for Vulkan (#16858)
discard 9428e56630 [SVE] Support scalable vectors in LoopVectorizer (#16782)
discard bceba5dec1 [IR] Provide well-formed intermediate in ApplyPassToFunction (#16843)
discard 548ef1a36b [TVMScript] Produce empty DictAttrs when R.func_attrs is absent (#16844)
discard 686777f7e9 [Meta-Schedule][OpenCL] Enable MS tuning for Android OpenCL (#16846)
discard 87ff1504b9 [TIR] Fix segfaults from ordering of Let/Assert in MakePackedAPI (#16543)
discard d907f3dec5 [Disco] Support setting workers' CPU affinity (#16807)
discard 2c9b889a52 [SME] Target parser support for SME (#16794)
discard 912f30afbe [TIR] Ramp and Broadcast lanes fixed to int32 dtype (#16795)
discard b1f6c0f617 [KVCache] Introducing auxiliary data manager (#16824)
discard 4feea359f0 [LLVM] Fix compilation failure due to minor change (#16812)
discard 1966273302 [Codegen] Add check to disable invalid reinterpret (#16786)
discard 6c812ca741 [Cmake] Allow using custom CCCL path for thrust (#16816)
discard 1476c64566 [Runtime][LLVM] Fix errors during loading of target tags (#16808)
discard 7005b02301 [Runtime] Introduce MSCCLPP with NCCL equivalent interface (#16804)
discard e0201462a0 [Runtime] Add "TVM_DLL" to NVTX header (#16809)
discard 83a05dc64e [Relax] Allow R.Prim('bool') in relax::If and assert_op (#16642)
discard b3e49e2622 [Target] Use LLVM target parser for determining Arm(R) A-Profile Architecture features (#16425)
discard 58b19030a0 [SME] Add support for inserting processor state annotations (#16761)
discard 836a5a7998 [Relax] Implement operators to inspec DLTensor::strides and offset (#16721)
discard ca2d4fbb95 [Codegen, Cuda] Add overload for fp8x4 e5m2 <-> half4 conversion (#16787)
discard 46695d7766 [Fix] Fix build errors with VS2022 (#16790)
discard 97d44f8a8a [IR] Default to empty attributes, instead of NULL (#16745)
discard 7e180d618d [TIR][Driver] Use `BindTarget` to specify target for FP8 legalization (#16767)
discard f55c37a218 [RUNTIME][OPENCL] Bugfix for ciImage create with host ptr (#16768)
discard c4b8fa39f6 [LLVM] Lack of DWARF type is not an error (#16748)
discard cca78aa064 [CONTRIB] Add nm symbol dump (#16763)
discard b229d65bc6 [Unity][Parser] Check well-formedness in the parser (#16569)
discard ad94ed8ddd [Runtime] CUDA IPC Memory support and custom allreduce kernels (#16750)
discard a6a23702b2 [Cutlass] Add group gemm kernels (#16751)
discard 90ab6525bf [Arith][Fixup] Require feature flag for tighter inequality bounds (#16735)
discard e77abbb979 [Target][CUDA] Allow non-numeric arch as needed for latest gpu (#16736)
discard 611cbd8507 [Arith] Provide tighter ConstIntBounds for special cases (#16588)
discard 51dc1a80f3 [Fix] Introduce TVM_DEBUG_WITH_ABI_CHANGE to warn ABI changes in debug mode (#16728)
discard 38335fa501 [TIR][CUDA] Add native FP8 support to codegen (#16548)
discard 7f078b9c6e [RUNTIME][METAL] Provide richer runtime when error happens (#16713)
discard d178d2bd00 [RUNTIME] Ensure NDArray.CopyTo(Device) always sync (#16716)
discard 8da1bbf885 [SVE] Add codegen support for scalable buffer accesses (#16696)
discard 939627e3d5 [TIR] Improve well-formed check's handling of match buffer (#16655)
discard 91782158b9 [Target] Automatically detect system triple when not specified by the user (#16513)
discard 708b7fea9d [Fix][Arith] Fix canonical simplification of LE (#16704)
discard e135baefbb [LLVM][RUNTIME] Add optional LLVM ORCJIT runtime executor (#15964)
discard 90f217878b [Lint] Add check to prevent usage of #include <regex> (#16412)
discard a8407e391f [Unity][TIR] Clear struct info when specializing PrimFunc (#16584)
discard 17a005843c [TIR] Support Vector Reinterpret Calls (#16673)
discard 137127f5dd [DeviceAPI] Support "GetCurrentStream" (#16689)
discard 08442dedff [Bugfix][TIR] Handle AttrStmt of upcoming tir.Var in ConvertSSA (#16682)
discard 9a0b4dca57 [TIR] Enhance and fix tensorize schedule for some case (#16560)
discard 09f569ffce [TVMScript] Represent tir::builtin::ret() using python "return" (#16640)
discard e9493366b5 [SVE] Add support for scalable data type strings (#16612)
discard 8d06779011 [Disco] Expose functions to query the per-worker device/rank (#16639)
discard 62f0bfe307 [Disco] Implement `Session.import_python_module` method (#16617)
discard bd1e2b6fb0 [Runtime] Add TVM_DLL to threading backend funcs (#16630)
discard 2fc4383810 [TIR] Expand debug symbol output for CodeGenLLVM (#16544)
discard 19a6d153a4 [Doc] Fixed Docstring usage example in `tvm.ir.make_node` (#16610)
discard 46b418a749 [SVE] Change the dtype of Ramp and Broadcast lanes to PrimExpr (#16523)
discard 53a53dd2b4 [RUNTIME][METAL] Fix multithreading access of metal runtime (#16605)
discard 0402d6ec31 [Marvell BYOC]: Marvell AI Accelerator Integration - Phase 1 (#16570)
discard bc4ab110f3 [MISC] Fix compile warnings (#16571)
discard 0417c9ad1a [Upd] Enable lld search to include /opt/rocm/llvm/bin for rocm (#16540)
discard e667174b8e Improve error message in NDArray::CopyFromTo (#16539)
discard 97090eb60c [Web] Compatibility with PagedKVCache in WebGPU (#16554)
discard 578920654f [Unity][TVMScript] Optionally hide StructInfo that can be inferred (#16356)
discard cd7e912278 [RUNTIME][ROCM] Properly align rocm parameter buffer (#16550)
discard 5fe83a4c13 [CI] Fix CI Script and Broken Tests (#16521)
discard 6c98bbdeb8 [Redo][Unity] Split DecomposeOpsForTraining into two steps (#16465)
discard 22d1a3d4d8 [TIR] Require exactly same-dtype matching for Vulkan smem reuse (#16515)
discard a9ee0e2087 [Minor] Fix Clang compilation warning in fuse_tir.cc and codegen_c_host.cc (#16511)
discard 9e035a9758 [Runtime] ParallelFor skipping thread backend for unit extent (#16508)
discard 129691db08 [SVE] Add vscale builtin (#16484)
discard c279df92d6 [Unity][CodeGen] RunCodegen based on externally-exposed functions (#16422)
discard a6318c5fc4 Revert "[Disco][3rdparty] Add latency optimized all reduce kernels."
discard 85ac5c9992 [Disco][3rdparty] Add latency optimized all reduce kernels.
discard bba5d539b1 fix typo in storage rewrite
discard d964f00b8b Merge branch 'main' into unity
discard a2937f8f7b [ROCm][WebGPU] Intrin Dispatch: `tanh`, `erf`, `log` (#16441)
discard e07606793e Revert "[Unity] Split DecomposeOpsForTraining into two steps" (#16442)
discard ed1d0bf074 [BugFix]Ensure that bf16 arrays are created as expected (#16436)
discard c864357526 [Metal] Dispatch numerically stable tanh for metal (#16438)
discard 90bd74c941 [Unity] Support cumsum with pure int32 (#16439)
discard 3e3ac53308 [Unity] downgrade cmake version requirement (#16432)
discard 4a9247145a Merge branch 'main' of into branch 'unity'
discard c527544fd0 [CMake] Enable cuda lang if USE_CUDA is on (#16426)
discard dbdf4bf7fb [Bugfix][Unity] Recover MSVC/NVCC/ROCm/Vulkan (#16414)
discard d6d0fc77bc [Unity] Split DecomposeOpsForTraining into two steps (#15954)
discard c746a83595 [ROCm] Some fixes of ROCm codegen (#16404)
discard a9e1f959df [DeviceAPI] Support querying total global memory (#16398)
discard 77a7861223 [OpenCL][CMake] Fix OpenCL tests compilation (#16394)
discard c6bc525d9f Merge remote-tracking branch 'upstream/main' into unity
discard efa25b1437 [Bugfix] Disable SingleEnvThreadVerifier (#16361)
discard 5e493fbbaa [TOPI][Target] Add fp16 SIMD support for conv2d on `arm_cpu` targets (#16383)
discard a24ae9a0f2 [Unity] Set CMAKE_CUDA_ARCHITECTURES default to native (#16335)
discard a87d987286 Merge branch 'main' of github.com:apache/tvm into unity
discard e3c02ef437 [Runtime] Use cudaGetDeviceCount to check if device exists (#16377)
discard acc2d7705c [LLVM] Update Host.h path (#16373)
discard 8d2a1f81a1 [TIR] Extend DP4A tensor intrin (#16293)
discard 422fb56e74 Fix after merging 'main' into 'unity'
discard 90c88364ce Merge branch 'main' into 'unity'
discard c9af77b490 [Unity][Contrib] Add vLLM paged attention kernel (#16350)
discard 93cf2ff0aa fix typo
discard 3eab562c8f enhance shared memory merge.
discard 0bd65ad824 [CMake][MSVC] Disable permissive mode for MSVC builds (#16343)
discard 93c9eae32d [Codegen] Fix if_then_else codegen (#16242)
discard 4b04e9f073 [TIR] Allow sync threads inside condition (#16345)
discard bb5161c62a [TIR] In SplitHostDevice, check for variables in thread extents (#16250)
discard 4a5ed2bf84 [TIR][Transform] Implement InlinePrivateFunctions (#16184)
discard 59cb7b15b8 [Unity] Cutlass kernel compatibility with cmake 3.18+ (#16302)
discard 2cf85dbf52 [release] Update version to 0.16.dev0 on main branch
discard e1e5ed587f [release] Update version to 0.15.0 on main branch
discard f241c8ad89 [Unity] Update cutlass FpA IntB GeMM submodule (#16320)
discard aad0a1ca3e [TVMScript] Disable concise scoping when the scope stmt is explicitly annotated (#16271)
discard 2cca9a53ea [Unity] Add Relax multi-device e2e cases (#15823)
discard e30af80814 [Unity] Add missing library import (#16263)
discard 816ba340df [ARITH] Simplify nested if_then_else when constant is appearing in then_expr (#16227)
discard dc836bbfba [Unity][nn.Module] Refactor `ExternModule` (#16247)
discard 08c1e805d7 [Unity] Avoid to use `std::regex` (#16249)
discard add6d790d8 [Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case (#16245)
discard 3f10c970fd Revert "[Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case" (#16241)
discard 21d38517c0 [TIR] ConvertSSA process entry func first (#16236)
discard ce5bacfcd8 [Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case (#16235)
discard 1e12144923 [Relax] Fix to enable emit_te of topi scan/sort kernels (#16226)
discard 55484b7d86 [Unity] Fix upstream tests that fail on unity branch (#16196)
discard 9d8ee21a5e [Unity] Update FlashInfer (#16208)
discard 1a4df0dc7a Fix IRModule initialization with attrs (#16202)
discard 200962a613 [Device][Metal] Fix metal warp size (#16192)
discard 8b52e9ce5c [Unity] Enable ccache for `nn.SourceModule` (#16189)
discard c069074aef Enable ccache to accelerate contrib compilation (#16176)
discard 900bba3543 [Unity][Transform] Implement RemoveUnusedOutputs (#16117)
discard 4d81d11b66 [Unity][3rdparty] Remove TVM in 3rdparty of FlashInfer (#16155)
discard 02be638a43 [Unity] Flash infer integration (#16146)
discard 9310d3982d Merge branch 'main' into 'unity'
discard 0fbb42841b [Runtime] Parallel-for with threading backend (#16133)
discard 229b76cdb4 [CI] Refactor unittest folder (#16110)
discard 9d0441d30f [Packaging] Include BYOC dynamic libraries into wheel (#16034)
discard 929980405a Add _ffi_api.py under script folder (#16087)
discard 0625dee895 [TIR] Enhance Python Type Annotations for TIR Expr (#16083)
discard 8544990935 [Target] Support obtain l2 cache size from target (#16039)
discard 0dcd8938fe [Fix] Broken Windows Build with LLVM (#16081)
discard 06171f4e0c [Fix][TIR] Fix dtype issues for match_buffer and ramp node (#16051)
discard 2d829e70fd [Unity] Implement FNormalize attribute for operators (#16067)
discard 0ab0ef87d0 [TIR] Enhance Python Type Annotations for TIR stmt (#16076)
discard a15f1c988f Merge remote-tracking branch 'main' into unity
discard bc1afaa7fc [Unity] Enhance Python Annotations for Relax Expr (#16075)
discard a483e6f8b5 [CUDA] Add an option for profiling cuda kernels (#16061)
discard cae4e669e7 [CMake] Use llvm-config to locate Findzstd.cmake (#16032)
discard 7d0f737e61 [TVMScript] Fix mismatched dtype of IterVar in `T.thread_binding` (#16041)
discard 8afbca7b01 [Codegen][Metal] Disable cross-function call in Metal codegen (#16033)
discard f1bef0a378 [Pylint] fix pylint issues for thrust&tflite_runtime&util (#16023)
discard 6b3e34bc4e [Codegen] Add shuffle for cuda and metal (#15998)
discard 81b24cc4e5 [Unity] Deterministic Ordering when Iterating IRModule::functions (#16020)
discard b165a376e7 [Unity][nn.Module] Support `nn.SourceModule` (#16006)
discard 64fe5bbfd6 [FFI][Python] Handle error propagation when line number is missing (#15955)
discard 41933d8cd3 [Fix][TIR]fix symbolic strides lower (#16000)
discard 2b54e914ee Fix after merge
discard 6788857dad [MERGE] Merge main into unity 2023-10-29
discard 6844b30c78 [Unity] Support symbolic PrimValue arguments (#15980)
discard 8eaf9e1b9b [TVMScript][TIR] Pretty print TIR LLVM function name (#15953)
discard 9111c43e9f [CMake] Fix order of GNUInstallDirs module (#15966)
discard 9d86ab6b77 [Minor] Fix compilation warnings for clang (#15940)
discard 0b8a74158a [CodeGenC][Redo] Handle GlobalVar callee as internal function call (#15835)
discard d87a5d71b1 [Release] Update version to 0.15.dev0 on main branch
discard b089d446fc [release] Update version to 0.14.0 on main branch
discard 96f18198ec Revert "[release] Update version to 0.14.0 and 0.15.0.dev on main branch (#15847)"
discard e8507266ce [LLVM] Fix for llvm CodeGenOpt API change (#15921)
discard 096464adcd [Unity] Fix TVMScript Issues in Testcases (#15920)
discard 0934e3ad9e [Target][CI] Add LLVM functions for current system info (#15903)
discard 239648632e [release] Update version to 0.14.0 and 0.15.0.dev on main branch (#15847)
discard b8f8ca13da Merge remote-tracking branch 'apache-upstream/main' into apache-upstream-unity
discard a5445cd986 [Arith] Simplify the result of non-divisible floordiv (#15881)
discard 59d2548257 [Disco][Fix] Remove Dependency to PyTest (#15886)
discard e8218bed52 [Fix] Remove duplicated words from comments, NFC (#15873)
discard 9f37c8eb7a [Disco] Add -lrt to TVM runtime for NCCL (#15876)
discard 0adbf09e8a [VM] Memory Manager moved up to runtime (#15833)
discard 933417a8b6 Merge remote-tracking branch 'apache-upstream/main' into unity-staging
discard 9b7472f6fb [Unittest][Metal] Add minimal metal functionality test to CI (#15756)
discard bf8064b0d1 [Target] LLVM helper functions for any target info (#15761)
discard 56d51b22f6 [Unity][TVMScript] Produce var = R.ExternFunc("") statements (#15703)
discard 6b51abf191 [TVMScript] Use environment variable TVM_BLACK_FORMAT for .show() (#15762)
discard 1a5075fb7d Revert "[TensorIR][Visitor] Visit buffer members in `match_buffer`'s in block visitor functions (#15153) (#15816)
discard 71e94cba41 [OpenCL] Don't initialize OpenCL runtime on host (#15745)
discard 887b1eba1d Merge remote-tracking branch 'apache-upstream/main' into unity-staging
discard 194fdfe13b [Disco] Improve RCCL Integration Logic (#15796)
discard 9d6332c5a3 [Disco] Integrate RCCL (#15776)
discard 70a2c859be [Codegen][ROCm] Mismatched Dtype of Workgroup/Workitem (#15777)
discard f88831f680 Merge branch 'main' into unity
discard 8e2911b167 [Hotfix] NVTX for CPU-only Build (#15774)
discard 018edeef39 [Runtime][CUDA] NVTX Integration (#15760)
discard 22025d8392 [Arith] Fix detect non-divisible iteration form like (x % 255) // 16 (#15665)
discard f3068b4cbe [TIR] Do not drop 4th argument to tir.max (#15763)
discard 0c2e2b2f1b [UnitTest][Metal] Parametrize allreduce GPU tests (#15749)
discard acec1f0d69 [Target][TOPI] Use LLVM for x86 CPU feature lookup (#15685)
discard 58d96d77bc [Disco] Pipe-based Multi-processing Session (#15727)
discard 7f6b12c1b3 [Target][Device] Auto detect target and create device from str in torch style (#15714)
discard 92b9ace132 Revert "[CodeGenC] Handle GlobalVar callee as internal function call" (#15725)
discard 6fcb84e94b Merge remote-tracking branch 'main' into 'unity'
discard 1da655ed23 [Hopper TMA] Add intrinsic to create barriers for synchronization (#15684)
discard 2a607cbd41 [TVMScript] Disable `black_format` by default (#15706)
discard 8f24746757 [TVMScript][FIX] Disable `show_object_address` in printing by default (#15705)
discard d134336828 [FFI] Propagate Python errors across FFI boundaries (#15596)
discard 07f8af4126 [Runtime] Make `CSourceModule` and `StaticLibraryModule` Binary Serializable (#15693)
discard 15ad3ce9ff Fix after merge
discard 03fd5846f4 [MERGE] Merge main into unity 2023-09-06
discard 1d5b771941 [Module] Implement custom imported modules serialization (#15666)
discard d4ea2d5a01 [BugFix][Arith] IterMapRewriter abort rewriting once failure (#15677)
discard 5a5f79f785 [Unity] Add support for Google Pixel OpenCL (#15675)
discard 4309b4dec9 [Hopper TMA] Add CUDA codegen support for bulk asynchronous copy (#15656)
discard e79be8346f [IR] Use structural equal for Range equality (#15664)
discard 74442ffc65 [Runtime] Make `export_library` parameters after `file_name` keyword-only (#15658)
discard 94375cefb5 [Arith] MLIR PresburgerSet compile fix mlir >= 160 (#15638)
discard a7696ce216 Do not link LLVM libraries into cpptest binary (#15639)
discard eef7efe606 [Arith] Added simplification rule for multiple equality compares (#15628)
discard 4f7b7d7e74 [TIR] Output DeclBuffer in SplitHostDevice (#15493)
discard d8d799f8a0 [Runtime] Serialization/Deserialization of runtime module (#15244)
discard a596dc45a3 [Runtime] Utils to Stringify Device (#15630)
discard 5195bf2810 [Unity] Disco: A Framework-Agnostic SPMD Runtime for Distributed Inference/Training (#15622)
discard 29317669fd [CMake] Add RCCL to TVM and TVM Runtime (#15624)
discard 40d32a1f6e [Runtime] Expose ModuleGetFunction as PackedFunc (#15623)
discard 0be7767847 [Unity] UpdateVDevice pass and infer vdevice (#15570)
discard e8851ae977 [Hopper TMA] CUDA codegen for async copy with barrier synchronization (#15616)
discard c40b2f0141 [Arith] Fix detect linear equation with uint var (#15558)
discard 152963a670 [CMake] Add NCCL to TVM and TVM Runtime (#15605)
discard 2d65aebf2f [Arith] Add tvm::arith::PresburgerSetNode to work with Presburger Set in MLIR (#14690)
discard e35fbbbae0 [TVMScript] Optionally output the address as part of variable names (#15579)
discard f139d0d21d [TIR] Shuffle in PointerValueTypeRewrite for scalar reads (#15517)
discard 35a4774592 [Testing] Allow Capitalized name in CompareBeforeAfter (#15568)
discard 394c6386b6 [Arith] Fix handling of overlapping predicates (#15555)
discard e6f7b50c9f [TVMScript] Use triple-quoted python strings for metadata (#15564)
discard 91fbbc07e0 [Unity] Fix the ambiguity issue in `vDevice` constructor on Mac with Apple clang version 14.0.3 (#15546)
discard 42c313a842 [TVMScript] Create loop var with min_val dtype in for frame (#15547)
discard 9a18b83e50 [Fix] Fix the typo in compile flag (#15542)
discard b5e49dfba7 [Unity][MSC][M0.1] Enable set name and layout for exprs (#15500)
discard 7b89afd396 [Runtime][Minor] Suppress verbose logging in Metal device API (#15543)
discard 5a895397a2 Remove IRModule Dependency from Target (#15511)
discard 87235d681c [Unity] Multi-device support for Relax (#15447)
discard 5cef55a8f2 Remove duplicate the word (#15524)
discard 3a25336b1c [Relax] CuDNN Fallback Support through BYOC. (#15462)
discard b812ae1062 [CodeGenC] Handle GlobalVar callee as internal function call (#15103)
discard 78ffe3d812 [VM][Textures] Enable OpenCL textures for VM (#15419)
discard 55e1e1d4e8 [ARITH] Enhance Canonical Simplify for LE (#15471)
discard 4203f4a124 [Unity][BYOC] Integrate Flash attention v2 kernel into CUTLASS BYOC (#15467)
discard bcf2161a79 [MERGE] Merge main into unity 2023-08-04
discard cb8bf634a9 [Bugfix][CUTLASS] CUTLASS path finding (#15480)
discard e0d738a488 [TIR] Output DeclBuffer in MakePackedAPI (#15263)
discard 4169dcf607 [Bugfix][CUTLASS] CUTLASS path finding (#15476)
discard 8f3a465416 [ROCm] fma intrin (#15464)
discard 8037682041 [TVMScript] Support starred indices in for-loop (#15442)
discard e5d984bd5d [ROCm] Fix some ROCm codegen bugs (#15454)
discard a536428ffb Merge remote-tracking branch 'upstream/main' into unity-staging
discard c2ae9e4b30 [Submodule] Add Flash attention v2 (#15423)
discard 07545603ef [Hexagon] Add default vtcm capacity for targets (#15414)
discard 815e96716f [TIR][BugFix]Ensure the Var's scope is correct (#15406)
discard d955daa68f [Codegen][Metal] Support metal warp-level primitive (#15401)
discard 32c6323cb3 [BugFix][TIR] Fix multi-grouped multi-warp allreduce (#15399)
discard 35b9695fd5 [Relay] Introduce arguments limit to FuseOps pass (#15137)
discard 465bf482e6 [TIR][UX] Implement privacy annotations in TIR (#15214)
discard d2036f93e1 Merge remote-tracking branch 'apache-upstream/main' into unity
discard fa327f760d [Unity] CUDA Graph update (#15320)
discard 9f4efcd999 [TIR] Return error code from kernels in SplitHostDevice (#15241)
discard c795f6636c [Runtime] Flush L2 cache in time eval (#15305)
discard 6bff8d2873 [Runtime] Device API to query L2 cache size (#15332)
discard e493a11ddc [TIR] ThreadAllreduce warp-level primitive support with multi-warp (#15327)
discard 3014bc805d [Unity] [DistIR] Introducing DistIR (#15289)
discard 778cfc0a40 [TIR] Call TVMBackendFreeWorkspace inside LetStmt (#15253)
discard a23d9d2e7b Merge remote-tracking branch 'apache-upstream/main' into unity-staging
discard 1f37786518 [TIR] Allow symbolic bounds in IndexMap analysis (#15264)
discard 68f1b24043 [Testing] Add tvm.testing.local_run (#15268)
discard 941ce42493 [TIR] Output DeclBuffer in LowerTVMBuiltin (#15243)
discard a4d6e70fa8 [TVMScript] Handle parsing of PrimFunc calls with non-void return (#15239)
discard 134114b655 [TIR] Preserve AllocateNode::annotations (#15242)
discard 5793a72e1e [TIR] Allow VerifyWellFormed to accept IRModule (#15247)
discard a993ac2a41 [CMAKE] Add Vulkan header for Android (#15229)
discard a1400e60a7 [Dlight] Enhance Decode-GEMV Schedule (#15195)
discard 4874ed6410 [ARITH] Enhance buffer shape bound deduction to include offset (#15228)
discard 075878bee8 [Android] ndk static build (#15215)
discard c5d8995972 [MERGE] Merge main into unity 2023-07-03
discard ae25657a09 Update version to 0.14.dev0 on main branch (#15208)
discard f929234024 [TIR][Transform] Add LiftThreadBinding Pass (#15207)
discard 7c4d8f1287 [ARITH] Allow Analyzer to MarkGlobalNonNegValue (#15193)
discard 7cd13ce845 [RPC] Report RPC Session Timeout to Client Instead of "kShutdown" (#15187)
discard fe427cd530 [TensorIR][Visitor] Visit buffer members in `match_buffer`'s in block visitor functions (#15153)
discard ee1bcd6e15 [CMake] Support LLVM-16 static linking (#15164)
discard 38acf29a6e Merge remote-tracking branch 'apache-upstream/main' into unity
discard bf3d20508a [Testing] Utility method to run TVM on remote device (#15179)
discard 9dac1ba201 [RUNTIME] Add weak symbol to builtin fp16 (#15182)
discard 29888acf07 [microNPU][ETHOSU] Fix compiler attributes types (#15159)
discard dc87f72096 [TIR][Schedule] Support padding-by-factor in PadEinsum (#15168)
discard 580f940282 [TensorIR][ROCm] AMD Matrix Core Support (#15106)
discard a97188cd2a [MetaSchedule] Introduce MMA Tensor Core Multilevel Tiling (#14673)
discard 24c43fd777 [Runtime] Clean TVM stacktrace in error messages (#15161)
discard cd37063853 [TIR] Expose UndefinedVars to Python (#15165)
discard 0fed89ce4b [Target] Add MetaSchedule-compatible attributes to OpenCL (#15166)
discard a454ee88dd [Minor] Fix Compilation Warnings (#15154)
discard 3f81c712c9 [MERGE] Merge main to unity 2023-06-24
discard 8837a6a8b8 [TIR] Block dependence analysis without schedules (#15146)
discard 1c2d40a1b1 [LLVM] Remove the "ret_void" argument of AddFunction (#15127)
discard 8c957c0e92 [LLVM] Minor refactor to LLVMModuleNode::SaveToFile (#15139)
discard dbf520c9e4 [Test] Improve check for TVMError exception in test_cast (#15138)
discard 74718bd632 [NDArray] Allow creating a view from a strided array (#15132)
discard be39f45655 [TIR] Avoid duplicate GlobalVar names in SplitHostDevice (#15119)
discard bfb9645d37 [ARITH] Hotfix flaky test in padded matmul (#15131)
discard be7861e2a8 [ARITH] NormalizeToIterSum (#15120)
discard ae9b70047a [Arith][TIR] Recognize empty extents (#15129)
discard e16d4cf51d [#15043][Docs] Updated the copyright year from 2020 to 2023 (#15071)
discard d751d345e0 [Unity][Relax][UX] Specify function purity in the @R.function decorator (#15109)
discard 25d644ae33 [TIR] Handle DeclBuffer in MergeDynamicSharedMemoryAllocations (#15094)
discard a904f9f005 [TIR] Handle DeclBuffer in RemoveNoOp (#15096)
discard 3cd1f1f376 [TIR][TVMScript] Convert tir.op operands to PrimExpr (#15091)
discard 195dd3ebdc [TIR][CodeGen] Define PackedFunc error code in MakePackedAPI (#15076)
discard 0922451c82 [TIR] Update primfunc host attachment to include host (#15102)
discard fb2d81f777 [Target][rocm] Replace rocm arch parsing from int to string (#15088)
discard 95c3511a4d [MERGE] Fix after merge
discard 171b848072 [MERGE] Merge main into unity 2023-06-13
discard 3f61448153 [ARITH] Improve arith simplify to handle symbolic reshape pattern (#15081)
discard e20702ce1e [CodeGenC] Use PrimFuncNode::ret_type in function signature (#15073)
discard 34f4e5d91f [Bugfix][CUDA] Fix codegen for hexp for sm >= 52 (#15079)
discard 53a8f653ce [Unity][Frontend] Add relax onnx importer and tests (#14999)
discard 7818aa5922 [BYOC] Add GEMM kernel from FasterTransformer as submodule (#15046)
discard 1257cac1b1 [Unity] Add hexp for compute capacity <= 5.2 (#15070)
discard ff54b421b0 [TIR] Handle DeclBuffer in Inline/ComputeAt/ReverseComputeAt (#15038)
discard 27ce2eec80 [TOPI][Adreno] Fix problem with ceil_log2 (#15061)
discard 8cbfe73984 [TIR] Handle DeclBuffer in StorageRewrite (#15051)
discard 6bd6adb238 [TIR] Handle DeclBuffer in IRSubstitute (#15054)
discard ace78c8573 [TIR] Move SplitHostDevice to before MakePackedAPI (#14986)
discard 3c95bfd3d2 [Vulkan] Allow DeclBuffer in CodeGenSPIRV (#15035)
discard 5f448e1628 [TIR] Preserve object equality in Buffer::GetFlattenedBuffer (#15040)
discard 12f2793e1e [OpenCLML] Reactor and introduce on chip memory and memory planner (#14922)
discard 48e5f24cf3 [TIR] Enhance TVMScript Buffer Slice Access (#14693)
discard 231e51aa20 [TIR] Keep trivial LetStmt in tir.Simplify when used in buffer decl (#14951)
discard a9d2ad21c6 [TIR] Restrict tir.transform.LowerTVMBuiltin to host functions (#14944)
discard 4f93dee45b [Hotfix] Remove `LOG(INFO)` from unsupported dtype legalization pass (#15015)
discard 3397f9b181 [Minor] Fix compilation warnings (#15007)
discard 2719efd9e0 [IR,TE,TIR] Use f-strings for string formatting, NFC (#14990)
discard c24e6e613e [MERGE] Merge main into unity 2023-06-01
discard f5a68ee517 [OPENCL] Always use convert_T for type conversion (#14972)
discard 1096a4d81a [CMAKE] Introduce dummy build as an option (#15000)
discard 5033c6fb86 [DataType] Initial support of fp8 (e4m3/e5m2) (#14863)
discard cbe362c202 [RUNTIME] Update Module and Registry to use String Container (#14902)
discard 62e8546b8a [OpenCL] Improve diagnostic message (#14995)
discard d881d67ad9 [CMAKE] Add a dummy target to defer libtvm dep (#14975)
discard 2662028f52 [Bugfix][TIR][VTA] Update host-side target, even without device func (#14982)
discard 166a57b2a8 [IR][SIBuilder] (#14574)
discard 22a9e26263 [TIR] Avoid re-defining `var = arg_var` in ArgBinder (#14952)
discard 90de8f491f [Hexagon] Add support for v73, make v68 default (#14965)
discard d87b4d7210 [Runtime,RPC] Use f-strings for string formatting, NFC (#14967)
discard 073a50c6f2 [TIR] SplitHostDevice, handle subroutines (#14918)
discard b86937a1f0 [METAL] Fix int8 vectorized cast (#14962)
discard a2e82e6068 [Codegen][LLVM] Allow void return type from PackedFunc (#14958)
discard eac83b2a2e [TVMScript] Prevent bool to int conversion in T.Assert condition (#14941)
discard 004fe8adb1 [TIR] Preserve existing kTarget function attribute in BindTarget (#14942)
discard 31aff007c9 [Bugfix][TIR] Avoid symbol conflicts in MakePackedAPI/MakeUnpackedAPI (#14950)
discard ba243128e6 [TIR] Restrict tir.transform.CombineContextCall to host functions (#14945)
discard b2cbd89cb4 [TIR] Handle subroutine calls in MakePackedAPI (#14913)
discard a2ded1890a [LLVM] Expose Host CPU Feature Detection (#14946)
discard 97b738077d [Target] Add target to all TVM callbacks (#14939)
discard ba1279e5d3 [BUILD] Enable log before throw message in windows (#14937)
discard d18be023e7 [TVMScript] Allow T.target("device", host="host") to specify host (#14915)
discard 81d6f954d2 [Unity][WebGPU] Try F16 support for WebGPU Backend (#14904)
discard 7e6c4f7a24 [LLVM] Codegen subroutine call when CallNode::op is GlobalVar (#14901)
discard 48709f6862 [TVMScript] Round-trip DeclBuffer with undefined data pointer (#14900)
discard 53e37502ce [TIR] Expand unit tests for ConvertSSA (#14892)
discard dffc6f51ea [Contrib] Use f-strings for string formatting, NFC (#14893)
discard b1866b6fbe [MERGE] merge main into unity 2023-05-20
discard 7bd32d4a95 [TIR][TVMScript] Added format/parsing of subroutine calls (#14889)
discard a9a3a07434 [Vulkan] Add cooperative matrix support (#14817)
discard b5a5b1eccf [TIR][Doc] Fix formatting in pop_trace docstring (#14894)
discard fc19ebdabd [RUNTIME] Make systemlib unique per prefix (#14887)
discard e760106fbb [CONTRIB] Enable create_staticlib to take in tar files (#14876)
discard a13589e68d [bugfix] fix the undeclared identifier 'f' (#14879)
discard e1d7d50baa [TIR] Avoid too complex predicate in compaction (#14866)
discard 5a6cd17d67 [TOPI][Target] Add SVE specific convolution (#14483)
discard cda2e21d3c [LLVM] Use Var annotation in LetStmt for pointer type (#14570)
discard 78595592de [MERGE] Merge main into unity 2023-05-14
discard 6965119684 [Codegen][OpenCL] fix amibiguous selection operator call (#14833)
discard 84c5ef3f12 [METAL] Fix vectorized select (#14846)
discard 590ea87284 [LLVM][RUNTIME] Enable multi systemlib with device code (#14843)
discard 6e648a2e54 [TIR] Improved parameter name in DLTensor unpacking error messages (#14776)
discard 5c428f5225 [Testing] Use TVMScript's "name" argument for error messages (#14808)
discard 54427f40d3 [OpenCL] Refactor OpenCL runtime to support SPIRV binary ingestion (#14792)
discard ef04588114 [MERGE] Fix lint after lint image upgrade
discard b1a37699df [MERGE] Merge main into unity 2023-05-07
discard a903221eab More clear ref of thirdparty license (#14790)
discard 3fa1109b3a [Bugfix][Codegen][CUDA] Wrong casting in ASM (#14782)
discard 13cfed6d25 [TIR][Driver] Move ShouldAnnotateEntryFunc logic into transform (#14562)
discard a6e2a0f723 [Arith] Implement statistics counters for RewriteSimplifier (#14532)
discard 63e85e1603 [CI] Modify test cases to accommodate the CI upgrades (#14651)
discard 53fad48fd3 [TIR] More flexible buffer compaction (#14021)
discard fe16912eab [Unity] Add system lib build option to relax (#14734)
discard 2efa0c5b1a [Unity] Fix ForceNarrowIndexToI32 so it ignores i16 (#14733)
discard 2a4c50a989 [METAL] Update metal runtime to directly store kernel map (#14727)
discard 69279dbac5 [TIR] [Hexagon] Add get_vtcm_allocation_sizes with lowering (#14720)
discard e93bdb5e05 [TIR] [Analysis] Calculate allocated memory at module level (#14711)
discard fcb6ec8534 [MERGE] Merge main into unity 2023-04-23
discard 360b1e9ddd unify search path approach to various libs (#14694)
discard 3276668d7e [CMAKE] Update search pattern of config (#14686)
discard cf706cf25a [TIR] Flatten SeqStmt on construction (#14492)
discard 0d5642e8c9 [Unity] Improve WebGPU codegen for large grid (#14674)
discard 88e16c3d92 [METAL] Fix flaky memory issue due to racing (#14671)
discard 8460be1770 [Unity][TARGET] Updates vulkan codegen for DeclBuffer (#14641)
discard 50c4679ee1 [CODEGEN] Fix metal codegen when with only single working dim (#14628)
discard b96fd760f6 [Unity] hotfix webgpu codegen for vec load (#14630)
discard baef742907 [Unity][CODEGEN] Fix metal codegen when with only single working dim (#14627)
discard c86cc7a273 [Unity] Update specific builtins for LM (#14617)
discard 36ab7044fb [TIR][Hexagon] Use the "target" value in T.func_attr for VTCM limit (#14567)
discard bf8c0978c4 [Unity] Fix ForceNarrowI32 with pod arguments (#14605)
discard 3b88b425d8 [MERGE] Bring changes from main into unity 2023-04-12
discard ac2b8045de [LLVM] Validate generated LLVM module before optimization (#14564)
discard 55f4b87d78 [ARITH][TensorIR] Improve CompactBufferRegion for symbolic shape (#14596)
discard 0eedea9927 [ARITH] Enhance IterMapSimplify for symbolic (#14547)
discard d58a791cf2 [LLVM] Expand tvm::Type to DWARF conversion (#14568)
discard 836be296f6 [Object] Implemented .as<T> for ObjectRef param, returns Optional<T> (#14522)
discard cd6026bf1f [ARITH][BUGFIX] Fix a bug of iter map floormod(x,2) simplify (#14571)
discard f271de4613 [TIR] Use String instead of StringImm for AttrStmtNode::node (#14491)
discard c1eba9dcfe [Codegen][LLVM] Remove cast to i8* in builtin::address_of (#14563)
discard 7838f67c44 [Unity][TVMScript] Update struct_info for GlobalVar (#14579)
discard e350d78660 [TVMScript] Distinguish between void* and handle (#14488)
discard e2ae6197f1 [Unity] Enable pod args in WebGPU (#14560)
discard f03588ef52 [ARITH] Enhance CanonicalSimplify to Simplify ProdDiv (#14538)
discard f2268a30be Update to v0.13.dev0 (#14544)
discard 1d715378a5 [ARITH] Enhance CanProve to handle symbolic bound (#14523)
discard 7ed123e461 [TIR] Update SplitHostDevice to post-process with ConvertSSA (#14496)
discard 64bc52fe2b [LLVM] Use DataLayout::getABITypeAlign instead of getABITypeAlignment
discard 812b0d4093 [Arith][Bugfix] Simplify "x - 1 < y" into "x <= y" (#14528)
discard c7f84ee788 [Runtime] Runtime module property mask for Metal and Vulkan
discard 5db30efeb3 Expose attrs argument of "ir.IRModule" to Rust bindings
discard b1c39e05b7 [TVMScript] Expose IRModule::attrs as I.module_attrs
discard 61e9725208 [TVMScript] IRModule TVMScript Parser.
discard e5e89049e1 [Node] Utility methods for ObjectPathPair handling (#14498)
discard b1461ef357 [TIR] Merged kDeviceThreadAxis and kUseDynamicSharedMemoryTag (#14495)
discard 5541787c69 [TIR] Improved SeqStmt::Flatten utility (#14497)
discard 01ba4b2025 [LLVM] Add missing `override` to GetFormat and GetPropertyMask (#14470)
discard 44b5a1d9bc [TIR] Use IRModuleNode::Remove to remove None in PrimFuncPass (#14494)
discard 63297aaf04 [LLVM] Add guard for #include <llvm/Transforms/IPO/PassManagerBuilder.h> (#14469)
discard e856a6d857 [TIR] Use same DataType of builtin::tvm_struct_set in C++ and Python (#14489)
discard ec4006caa3 [Arith] Simplifications for floormod(x, 2) (#13936)
discard e1969eee23 [TensorIR] Support for L2 prefetch async copy and pred_guard enabled async in vectorized if_then_else (#14329)
discard dfc2ee8d38 [Unity][BYOC] Add cuBLAS backend (#14291)
discard 503882a57c [TVMScript][Bugfix] Tuple on the RHS of AssignDoc (#14452)
discard 0269a35615 [Unity][Hexagon] Enable Relax VM for Hexagon (#14415)
discard cef4525228 [Unity][VM] Add CUDA graph vm builtins (#14371)
discard bd6f1e6d70 [Unity][TVMScript] Update GlobalVar `checked_type_` when `emit_te` (#14367)
discard e98de07f6d [Unity][Transform] DefaultSchedule pass (#14266)
discard f11aac44eb [Unity][DEBUG] Add Instrument (#14302)
discard be6da0e8cc [TVMScript][Unity] Improve PyLint Compatibility (#14276)
discard 5fbc6b239e [Unity][TVMScript] Fix prim_func lost issue in relax.emit_te (#14189)
discard bd14f96750 [Unity][WEB] Simplify WebGPU Codegen per spec (#14225)
discard 62a0133b83 [Unity][WEB] Improve webgpu codegen options to skip readonly (#14213)
discard 57d599ecd0 [Unity] Introduce Default GPU Schedule Pass (#14182)
discard ebaa1b53ee [Unity][TIR][Pass] ForceNarrowIndexToInt32 (#14203)
discard 0113f02aeb [Unity][WEBGPU] Codegen improvements and WebRuntime (#14187)
discard f796df0ec5 [Unity] Add Global info (#14132)
discard 46abce4dbb [Unity][BYOC]Add relax backend pattern registry (#14106)
discard c21173cb1f [Unity][BYOC] Add CUTLASS backend (#14081)
discard ebdde75aef [Unity][BYOC][Pass] RunCodegen and TensorRT (#14078)
discard 8628bf3182 [Unity][Pass] Remove Unused Function (#14061)
discard 1a4e458ff8 [Unity][TVMScript] Move tir/relax import in script out of __init__.py (#14033)
discard 0829439db9 [Unity][Pass][TuningAPI] Introduce TuningAPI and MetaSchedule pass (#14014)
discard 927aa77470 [Unity][Pass] BindParams pass, FoldConstant pass (#14016)
discard 6c8b51ce1c [Unity][VM] Supporting "compiled" exec mode. (#14015)
discard 33c73af427 [Unity][Pass] Operator Fusion Passes (#14001)
discard 2aec893724 [Unity] e2e Relax minimum build flow (#13961)
discard 868ae93d43 [Unity] Relax TVMScript Printer (#13944)
discard 4008dfea38 [Unity] Relax TVMScript Parser. (#13932)
discard 17cdccec7c [Unity] Relax BlockBuilder and ExprMutator (#13926)
discard 4041950151 [Unity] Basic StructInfo Analysis and Expr construction (#13916)
discard 0d5a2e5275 [Unity][IR] First-class StructInfo (#13907)
discard 61128764cc [Unity] Relax expressions and types (#13901)
discard d70d6ffedd [Unity] Relax VM (#13878)
discard 448cc51dc9 [Hexagon] Fix deprecated call for data layout size in bits (#14438)
discard 224be26f81 [Typo] Fix name of iter var type 4 (#14436)
discard bbbc370eec [Runtime] Introduce runtime module property (#14406)
discard db5354097c [TIR] Update LowerTVMBuiltin to use Optional<T> (#14400)
discard f63d357bb7 [Analysis] Improve error message in VerifyWellFormed (#14389)
discard 68dcc33e84 [TIR] Remove special-casing of T.address_of in the storage rewrite pass (#14430)
discard 089163151c [OpenCL][Textures] Always use SSA for texture loading (#14397)
discard 5c0dfdf8e3 [TVMScript] Improved error message for unexpected top frame (#14399)
discard ef533510dd [TIR] Refactor BF16Legalize (#14405)
discard 9a7c3d3002 [TIR] Improved MakePackedAPI error message (#14387)
discard d6a667ce33 [TVMScript][Fix] Fix `bool` printing for roundtrip (#14390)
discard 306a0b57a2 [TIR] Remove LoadNode and StoreNode (#14381)
discard 380cdd33bf [TIR][Utility] More flexible tir::Substitute arguments (#14251)
discard 9cc58c5929 [CI] Update GPU image for CUDA 11.7 (#14363)
discard f99cd5c824 [TIR] Fix Datatype in Lower TVM Builtin (#14347)
discard dee130fd6f [MetaSchedule] Introducing MemHammer (#14164)
discard eeb3418b3f [Hexagon] Add concept of DMA groups (#14254)
discard 85d21a0f08 [CODEGEN][METAL] Fix unaligned vector load (#14332)
discard fc5e8daf60 [METAL][CODEGEN] testcase for ramp codegen (#14331)
discard 5a0cfe581f [CODEGEN][METAL] Fix ramp codegen (#14330)
discard 5a7646717d [LLVM] Fix registerCallbacks API after recent change (#14323)
discard c9eacbbc66 [Fix][TIR] Fix tvm::arith::UnionLowerBound (#14304)
discard 55a35e2e30 [LLVM] Add support to generate llvm.assume (#14294)
discard bf720ce822 [TIR][Compute-at] Utilize InverseAffineIterMap for dom estimation (#14184)
discard 99c0cfbaef [TIR][Hexagon] Enhancement of NarrowDataType pass for binary ops (#14298)
discard 49923d72e2 [IR] Enhance IRModule SEqual/SHash to support cross function calls (#14289)
discard 4d6f9a684e [TVMScript][Parser] Add more warp-level builtins and `Range` (#14279)
discard 49d903de10 [Transform] Use callable() instead of isinstance() for type checking (#14248)
discard 4431a5096e [Arith] Add simplification rule for `x - max(x+y, z)` (#14271)
discard 14d813b49d [SVE] Adding codegen tests for SVE (#14239)
discard 09b5d3a770 Update to v0.12.dev0 (#14241)
discard af0ab5e1d5 [LLVM][BugFix] Fix include Triplet.h bug when LLVM version>= 17 (#14235)
discard c59c228316 [TEST] Fix division by 0 in llvm codegen test (#14232)
discard c98c02c609 [TVMScript] Support SizeVar Roundtripping (#14227)
discard 83bddbe204 [Fix]Fix function ObjectPath in IRModule SEqual (#14230)
discard ccf3b0a396 [Fix][TVMScript]TVMScript BinOP printing refactor (#14200)
discard 8ca5ec94ee [TIR] Enhance loop unroll with unroll local access (#14224)
discard a446716e54 [Refactor] Move `VarUseDefAnalysis` to header file (#14185)
discard b4289be118 [TVMScript] Sugar Var Definition in TIR Buffer (#14223)
discard 90e65d786c [TVMScript] Sugar T.env_thread + T.launch_thread (#14217)
discard c184e7ec26 [TVMScript] Distinguish LetStmt and Let expression (#14207)
discard 22d555c248 [TIR][Analysis] Implement IdentifyMemCpy analysis function (#13947)
discard eeb6db50c0 [microTVM] Use QNN schedules to give SOTA performance (#13752)
discard a8604d976a [Runtime] Fix high RAM usage when saving / loading paramters of big models (#14147)
discard 9f1ccb470b [TVMScript][Printer] Remove relax prefix for now (#14140)
discard b77dccb12a [Arith] ConstIntBound was incorrectly assuming bounds were over int64… (#13918)
discard d5f7d6ff74 [TVMScript] Use op attribute to control whether to print dtype in TVMScript (#14111)
discard 9d751a2219 [LLVM] Add support for DeclBufferNode (#14103)
discard 3f62ca3df8 [Codegen][CUDA] Add error message for missing fragment info (#14073)
discard 7d3cdd7769 [WEB] WebGPU Codegen (#14048)
discard 15997836a7 [TIR] Introduce Pass InjectPTXLDG32 (#13973)
discard 509b7a025f [TIR] Enable Host Func Attribute for PrimFunc (#14020)
discard d25a4bb446 [Arith] Implemented PMatchesOneOf and matches_one_of (#13933)
discard 6907aa6186 [FIX][RUNTIME] Convert container with function value type (#14024)
discard dee5766e5b [TIR] Add cp.async support for tir.if_then_else (#13966)
discard fe1d8cde1a [CLML] Changes corresponding to OpenCL workspace refactorization (#13972)
discard ae9e6837f7 [Build] Fix find_include_path when using TVM python package (#14007)
discard ac1a569e9c [microTVM]Refactor crt_config.h header file generation (#13955)
discard cfa550c069 [microTVM] additional refactoring for enabling USE_MICRO in more builds (#13909)
discard 57206f1033 [TVMScript] Encourage using T.Buffer directly (#13971)
discard f0b37bd5d5 [TVMScript] Simplify TIR Var Definition (#13970)
discard 51190292f1 [TVMScript] Unify `T.handle` and `T.Ptr` (#13969)
discard 3477fcca4c Fix out of bound enum conversion (#13967)
discard 1289d4b632 [TVMScript] Enable Safe Autocasting in BufferStore (#13960)
discard 02faa48320 [TVMScript] Deterministic function ordering (#13962)
discard 359b2e56d8 [TVMScript][Fix] Print Multi-line String as Metadata (#13965)
discard 89fdfa8900 [TIR] Expose bitwise ops to python (#13945)
discard 6b398f134d [TVMScript][UX] Introduce decorator for deprecation (#13941)
discard d0214b5269 [TIR] Allow TransformLayout index_map to contain RVs (#13930)
discard f3a07b13e3 [TVMScript] Support `show_meta` (#13934)
discard 79600b0fa7 [Arith][UnitTest] Parametrize tests of RewriteSimplifier (#13923)
discard 7d9b4d4bc4 [TVMScript] Schedule error reporting with new TVMScript printer (#13921)
discard 6b5eaf9cd2 [OpenCL] Refactor OpenCL init function (#13919)
discard f2f039c1fe [Arith] Updated incorrect simplification rule (#13922)
discard 8fa1baff48 [TVMScript] Connect `assert_structural_equal` with new TVMScript printer (#13859)
discard fc7b825792 [Fix][TVMScript] Fix `LetStmt` printing logic (#13900)
discard 196d4ced8e [Fix][Arith] Analyzer simplification starts with canonical (#13875)
discard eef4764351 [OpenCL] Implement save/load pre-compiled programs (#13868)
discard 79ed82f0f4 Extend the USE_LIBBACKTRACE option (#13816)
discard cfcedcd219 [TIR] Handle nullptr returned by FindEntryFunc (#13852)
discard 088711a293 [Build] Fix misleading error messages (#13887)
discard b99ad20381 [ARITH] support floordiv in deduce bound (#13880)
discard 7e3e6e2a01 [TVMScript] Robustify the Highlight Printer (#13861)
discard 483c700eb0 [LLVM] Remove call to EmitDebugLocation from AddAliasInfo (#13872)
discard 76ab1f2821 Enable C++17 for cmake modules (#13869)
discard 5330216cce [RUNTIME][CLML] OpenCLML tuning and profiling enhanced (#13843)
discard 7fe0afad5e [Arith] Support eq in detect_clip_bound (#13746)
discard b9b95f211c [ROCM] Fixes compiling on ROCM 5 and accuracy on dense op (#13847)
discard 4fef7a5adb [microTVM] Fix host-driven AOT memory workspaces (#13807)
discard 0cc94714d7 [TVMScript] Comments and docstrings printing (#13839)
discard 067c147d64 [TVMScript] Consolidate folder structure (#13841)
discard a8533f3924 [TVMScript] Default to T.Buffer than T.buffer_decl (#13838)
discard 4764655e71 [RUNTIME] Fix determination of big/little cores domains (#13832)
discard 65a6505523 [TVMScript] Introduce `PrinterConfig` (#13831)
discard 52166582c8 [TOOL][NATIVE] Android native application for deploy and run (#13791)
discard df333c3dd4 [TVMScript] More concise `T.allocate` syntax printing (#13830)
discard 4070320df2 [TVMScript] Add ObjectPath to LiteralDoc (#13821)
discard 9564b38963 [microTVM][CRT]Separate CRT template project from standalone CRT build (#13812)
discard e7e3107f8b [TVMScript] Implicit root block syntax sugar for TVMScript printer (#13819)
discard ff95a59f35 [TVMScript] `T.allocate` with `T.decl_buffer` syntax sugar for TVMScript printer (#13813)
discard 7eef65f731 [TVMScript] `T.match_buffer` syntax sugar in arguments for TVMScript printer (#13801)
discard 4df0bfdf2d [TIR]Fix the crash of the pass RemoveNoOp (#13808)
discard c30c7e1c7e [TVMScript] Use TVMScript for all TIR Printing (#13795)
discard cade054497 [TVMScript] `T.axis.remap` syntax sugar for TVMScript printer (#13743)
discard 0b889a0da0 [TVMScript] Migrate More to TVMScripr Printer (#13785)
discard e15b790cd3 [TIR][TOPI][x86][CI] Support skylake avx512 (#13621)
discard 8508b6c9fb [FIX] Minor Compilation Warning Fixes (#13794)
discard e73a2c16cc [TIR][Fix] IndexDataTypeNormalizer not unwrapping float casting (#13789)
discard ad9f1a935d [TIR][Fix] Buffer slicing using index dtype as extent (#13788)
discard a85354330f [TVMScript] IR Fragment Printing (#13742)
discard 7fccbf1119 [UnitTest] Parametrized test_arith_iter_affine_map::test_padding (#13774)
discard 87997167f5 [Target] Make `key=arm_cpu` --> `key=arm_cpu,cpu` on AArch64 (#13775)
discard 02d082334f [Hexagon][QNN] Improve performance wo QNN canonicalization (#13734)
discard 8d74f6d566 [microTVM] tuning on micro targets with meta-schedule (#13514)
discard 97ce228641 [CMake][OpenCL] Remove warning for OpenCL wrapper (#13683)
discard f10b15d6f0 [Profiler] Allow user to flush L2 cache in `time_evalutor` function for profiling CUDA kernels (#13726)
discard c7fa6489a3 [Arith] Use ConstIntBound to remove negative numerator when lowering (#13724)
discard 4fa84de79a [TE][PrimFunc] Fix create primfunc from te extern with explicit buffer load (#13729)
discard 06dbef9507 [TIR][Arith] Add common sub expr analyzer (#13702)
discard b5886e7bf2 [TVMScript] Refactor IRDocsifier (#13593)
discard b7d0cd9a25 [Tests] Replace pytest.main with tvm.testing.main (#13717)
discard 68bccbe286 [TVMScript] Linter-friendly function definitions (#13713)
discard 5c6d6f7cb5 [TIR] Fix dtype mismatch error due to LetStmt (#13710)
discard e77379a5e8 [tir] Add line level debug info (#13012)
discard 7aa98e807c [BugFix][TVMScript] Fix the roundtripability of intrinsic pow (#13692)
discard 14f1752678 [Tensorize][runtime] Add support for AMX(Advanced Matrix Extensions) through Tensor intrinsics (#13642)
discard c4cf155ad6 [Bug][CodeGen,Cuda]fix cast fp16 to int8/uint8 in cuda (#13641)
discard 5829b10a2d [Build] Expose missing USE_VERILATOR in cmake (#13676)
discard 6b97702cb4 [BugFix] Pylance emits the warnning 'Code is unreachable' (#13673)
discard 6d17478b48 [RUNTIME][OPENCL] OpenCL host pointer support to acheive zero copy (#13413)
discard 995556b535 [CONTAINER] Struct Hash/Equal and JSON support for ShapeTuple (#13671)
discard 20f230938d [TVMScript] More accurate hints for ImportError (#13662)
discard 3c61b695dd [Relay][Frontend] Span filling common API (#13402)
discard 525b88f4f5 [CMSIS-NN] Add Cortex-M85 support (#13644)
discard c701420a9a [Arith] Allow const folding on fp16 involving one and zero (#13631)
discard 119a84426b [LLVM] Use std::nullopt instead of llvm::None (#13617)
discard 9d62a92e57 [OpenCL][CI] Enable OpenCL cpp tests in CI (#13400)
discard 29befa2417 [LLVM] Fix get tm allow_missing check pos (#13591)
discard 4b44e78e32 [TIR] Add preserve_unit_iters option to blockize/tensorize (#13579)
discard 34f9a64c60 [CodegenC] Explicit forward function declarations (#13522)
discard 9a4a1305e3 [TIR] Fix layout free annotation in CreatePrimFunc (#13554)
discard 497a59332e [TIR] Fix remaining dtype mismatch issue caused by SubspaceDivide (#13558)
discard 8610b7a129 [MetaSchedule][Hexagon] Add postproc for verifying VTCM usage (#13538)
discard 8160049a43 [Logging] Mark LogFatal::~LogFatal as [[noreturn]] (#13542)
discard 363433eae9 [TIR] Introduce ReduceBranchingThroughOvercompute (#13299)
discard ff0f622a78 [TIR][Analysis][Hexagon] Add vtcm memory capacity verification for Hexagon target (#13349)
discard 30f39fcdb7 [TIR] Disable RewriteSimplifier extensions in RemoveNoOp (#13524)
discard 1ac3acce11 [LLVM] Switch to using New Pass Manager (NPM) with LLVM 16+ (#13515)
discard d486cac00b [tir] Add copy on write to all nodes (#13512)
discard b4f76eda53 Revert "[microTVM] enable building microTVM components by default" (#13503)
discard 0a0a7f2807 [RUNTIME] Correctly handling export_module when exporting modules of different type (#13489)
discard 32a0aa2a3e [TIR][TVMScript] Cleaner printing of And/Or chains (#13432)
discard b94e6cfc78 [TIR][Transform] Optional data-flow analysis in RemoveNoOp (#13217)
discard 206b22758a [TVMScript] Improvements tvm.script.highlight (#13438)
discard 645cd12714 [microTVM] enable building microTVM components by default (#13073)
discard dd6dab10fb Fix building static tvm_runtime on windows (#13445)
discard a826149f06 [Fix] Fix IndexDataTypeNormalizer to avoid redundant casting (#13449)
discard 556ef764d7 [OpenCL] Improve OpenCL version detection (#13434)
discard 069678b2fd [TIR][Hexagon] Async DMA fixups (#13436)
discard 487c814770 [TIR] Unify index data type when creating prim func (#13327)
discard da6fe0a5c4 [Build] Fix MSVC compile option /bigobj (#13411)
discard a080bfa084 [Hexagon] Enable Hexagon User DMA bypass mode (#13381)
discard ceb11755a3 [TIR][Analysis][Arith] Implement basic data-flow analysis (#13130)
discard 6ebc426d6e [TIR] Remove PrimFuncNode::preflattened_buffer_map (#10940)
discard bf4b22ef09 [ci] fix GPU other build (#13366)
discard 9475f7efe8 Add support for cast double to fp16 (#13395)
discard cd7e4f2add [OpenCL] Introduce OpenCL wrapper to TVM (#13362)
discard f5d8dce02e [RUNTIME][ALIGNMENT] Configurable kAllocAlignment if needed (#13307)
discard 33fed5d79d [Codegen] Fix CUDA codegen for int64 Ramp (#13382)
discard 5131f8fb42 [TVMScript] Reorganize the folder structure (#12496)
discard 56b797fb46 [IRBuilder][Minor] Add intrinsics like `T.int32x4` (#13361)
discard 91c5efd0c2 [TIR][Arith] Fix divisor checking in `TryConstFold` (#13348)
discard 75113e2302 [Minor][Testing] Consolidate IRs into corresponding functions (#13339)
discard 328d6954b1 [Bugfix][Runtime] Fix sched_setaffinity in Android (#13158)
discard c3e0fb314e [build][tir] suppress -Woverloaded-virtual warning (#13267)
discard b534e9a826 [TIR][Arith] Use TryCompare to narrow inequalities if possible (#13024)
discard 37ef0408ed [ETHOSN] Throw error message when inference fails (#13022)
discard 83ddd0ea18 [build][relay][te][tir] remove unused vars / args (#13266)
discard ee1f906cf4 [DLPack][runtime] Update DLPack to v0.7 (#13177)
discard 6766e5da05 [BugFix][LLVM] Add UseInitArray flag in target_options_ (#13115)
discard 610523dec9 [Arith][TIR] Check for constant offsets of known literal constraints (#13023)
discard 819311ad66 [TIR] Use Optional<Stmt> for IfThenElseNode::else_case (#13218)
discard e33fb4a91d [CI] Enable iOS RPC tests (#13229)
discard aeebdfadcd [Logging][Hexagon] Improve logging on Hexagon (#13072)
discard ce3509a257 [TIR][Arith] Implement kApplyConstraintsToBooleanBranches extension (#13129)
discard 9159de8906 [MetaSchedule] Enable anchor-block tuning (#13206)
discard 56322dfa50 [TIR][Schedule] Add cache_index to precompute index of buffer load (#13192)
discard c76d2a0399 [TIR][Arith] Support negative coeff in ModularSet (#13081)
discard ef1a143d67 [IR] Remove shadowing in IRSubstituteWithDataTypeLegalization (#13219)
discard c0a2d27e1c [Relay][Hexagon] Add per-channel FixedPointMultiply operation (#13080)
discard cccbbf8bf1 [TIR] Add utility for anchor block extraction (#13194)
discard 8b8425720b [Hexagon] Add support for instrumentation based profiling for Hexagon (#12971)
discard 27e7826fdf [TVMScript] TIR parser (#13190)
discard 557d8f74e2 [AOT] Add CreateFunctionMetadata analysis pass (#13095)
discard 8ce6304ac5 [Target] Replace utility functions with target.features (#12455)
discard b442359b16 [TVMScript] IRModule parser (#13176)
discard a19e08d2ea [TIR] Add the missing nearbyint intrinsic (#13175)
discard 73bb68c67a [Hexagon] Support fetching and building Hexagon runtime with external runtime sources (#13138)
discard 3d63942ea0 [Target] Add Target Parser for Arm(R) Cortex(R) A-Profile CPUs (#12454)
discard 4683eb2f98 [TIR] Allow IndexMap applied to arguments with different dtypes (#13085)
discard 9fa9c1b786 [ci] Lint for trailing newlines and spaces (#13058)
discard 5d443ba9c2 Skip stride check if shape is 1 in IsContiguous (#13121)
discard 5afb3dcd88 [QNN][Hexagon] Disable QNN canonicalization pass (#12398)
discard 9397b54e15 [DOCKER][Adreno]Docker infra for Adreno target with CLML support (#12833)
discard 406007f676 [PopenPool] Enable Stdout & Stderr Redirect in PopenPool & PopenWorker (#13112)
discard 1d5f6446d8 [TIR] Fix handling of int64 extent in blockize and tensorize (#13069)
discard aefb35278e [AOT] Sanitize input/output name in runtime (#13046)
discard 926c9c6995 [TVMScript] Fix parsing int64 loop with optional loop start (#13068)
discard 7f81ca9103 [TE] Raise error for non-bijective transformation (#12926)
discard 99eaaa15a0 [TIR] Refactor NarrowDataType into DataTypeLegalizer (#13049)
discard 64ce679c85 [Arith] Optional rewriting and simplification into AND of ORs (#12972)
discard 65c73773ce [microTVM][Windows] Enable building TVM on Windows with USE_MICRO (#12851)
discard 7eacbc02fe [MetaSchedule] Allow skipping exact NDArray rewrite in RemoveWeightLayoutRewriteBlock (#13052)
discard 6ca2e30c2e Update to 0.11.dev0 (#13036)
discard 0226431eeb [TVMScript] AST, Source and diagnostics for Parser (#12978)
discard d72b843223 [UnitTest][TIR] Support IRModule comparisons in CompareBeforeAfter (#12920)
discard 85c66d06a3 [TIR][Arith] Prove conditionals by transitively applying knowns (#12863)
discard 9125b43dd1 [LOGGING] Optionally print backtrace on segfault (#12959)
discard b4a8dd5d4f [TIR] Require dtype.is_float() inside FloatImm (#12928)
discard d7631f73c1 [Arith][IndexMap] Correct MapShape result for small vectorized dims (#12927)
discard dc3537c1c9 [TEST] CPU feature detection for x86 and ARM dot product instructions (#12980)
discard 09fde4c607 [ci] Disable flaky ethosu + roofline tests (#12956)
discard aaf9c943b6 [TIR, MetaSchedule] Preserve unit block iters for auto-tensorization (#12974)
discard 6b8ed74d77 [TIR] Use IndexMap to transform NDArray (#12949)
discard 5265cb5c51 [CODEGEN][OPENCL] Sampler definition should be at outermost scope (#12951)
discard 7b48dcd986 [Target] Add target_device_type attribute to override default device_type (#12509)
discard fc403a7cce [LLVM] Change CHECK_NE(x, nullptr) to CHECK(x != nullptr), NFC (#12943)
discard 004f45bdf7 [HEXAGON][QHL] Clippling the inputs of HVX version of QHL Sigmoid operation (#12919)
discard ceb6b1e53f [CODEGEN][OPENCL] Compatibility for OpenCL version 3.0 (#12938)
discard 90f98e3c86 [Bugfix][CMake] Update the minimum CMake version to 3.18 (#12682)
discard e88ccaed9f [TIR][Transform] Clear buffer_map during MakeUnpackedAPI (#12891)
discard 82c83b3be9 [TIR][Transform] Remove num_unpacked_args from MakePackedAPI (#12892)
discard f3556bab68 [LLVM] Emit fp16/fp32 builtins directly into target module (#12877)
discard d0c5a497a9 [TIR] Refactor IndexMap::Inverse in terms of NonSurjectiveInverse (#12904)
discard 67843cf5e3 [TVMScript] Import TIR methods into the IRBuilder (#12900)
discard 8d326f779e [BUILD] Re-enable ccache by default (#12839)
discard 409825a1e7 [IR] Use TVM_DEFINE_OBJECT_REF_METHODS macro for Op (#12893)
discard 0fe21eec81 [TIR] Allow missing TensorIntrin in registry lookup (#12875)
discard 22ce015816 Fix clang warnings (#12876)
discard 18f0e7517c [Utils] Disable automatic move constructor for tvm::With (#12822)
discard 364cb864b7 [TVMScript][Fix] Correct round-trip of explicit root block (#12673)
discard 0b847f7ec2 [FIX,PROFILING] Fix gpu timer name and lookup (#12849)
discard c6630b6c1f [TIR] Enhance RemoveNoOp pass to remove negative loop (#12836)
discard d385ee6e9e [Containers] Add Array::Map (#12692)
discard 396d08cdf1 [Hexagon] 2-Stage Pipeline; Lower Async TIR primitives to Hexagon User DMA (#12785)
discard c5d7a899ad [BugFix][LLVM] Fix the bug that the generated systemlib cannot register ```__tvm_module_ctx``` symbol sometimes (#12817)
discard eec9dfeedc [Arith][TIR] IntSetAnalyzer, delay intersection of IntSet until use (#12821)
discard ba0dfcf924 [TIR] Implement API for padded layout transformations (#12720)
discard dd3465128e [TVMScript] IRBuilder methods for `Stmt` (#12831)
discard c6730c451e [TVMScript] IRBuilder methods for `Stmt` (#12830)
discard 32f6f37e3b [TVMScript] Add more helper functions to the printer infra (#12829)
discard 631202db67 [TIR] Construct the inverse in SuggestIndexMap (#12797)
discard 932ddfe379 [TVMScript] IRBuilder methods for `Block` (#12815)
discard a111a9cd37 [Testing] Add decorator tvm.testing.requires_cuda_compute_version (#12778)
discard 1cdb1a0aa1 [TVMScript] IRBuilder methods for `Axis` (#12808)
discard 06f9cd749f [TVMScript] IRBuilder methods for `For` (#12786)
discard 58c35d799a Fix typo in doc of logging (#12798)
discard 53343f3957 [Arith] Simplify nested if_then_else (#12749)
discard 65681f9092 [Arith][Refactor] Return Optional<PrimExpr> from TryConstFold (#12784)
discard 92782ac88a [TVMScript] IRBuilder methods for `PrimFunc` (#12755)
discard 4392a8b864 [AOT] Add AOTLowerMain pass to lower a Relay main into TIR (#12550)
discard 4d6f88e276 [TVMScript] Base IRBuilder methods for `Block` (#12748)
discard 213770cbc4 [TIR][Arith] Add more strict checking in imm construction and folding. (#12515)
discard 25559cfb08 [OpenCL] Enable OpenCL for GPU tests (#12490)
discard df38576362 [TVMScript] Base IRBuilder methods for `PrimFunc` (#12745)
discard 4b1f9b6045 [TIR] Handle axis_separators during FlattenBuffer (#12652)
discard 552e63e2c8 [Test] Add tvm.testing.requires_libtorch (#12737)
discard 082f337c73 [TVMScript] IRBuilder methods for `IRModule` (#12694)
discard 95a509714e [TIR][StorageRewrite] Allow in-place buffer reuse of non-flat memory (#12655)
discard d9d0fb89cc [TIR] Handle DeclBuffer in ToSSA (#12679)
discard b267d62f58 [TIR][TVMScript] Update printer / parser to make T.allocate return buffer var (#12412)
discard 0182164cc8 [Refactor] Replace std::tie with structured bindings (#12610)
discard 1433803ba9 [TIR] Expose MMA-related PTX builtins (#12623)
discard d51236ca53 Replace '> >' in templates with >>, NFC (#12615)
discard 90dc611887 [Hexagon] Initial support for meta schedule tuning (#12587)
discard 8cae958614 [TIR] Expose Memory Copy-Related PTX Builtins (#12611)
discard c406e71684 [Runtime] Change default alignment to 64 bytes. (#12586)
discard 8ce0ffdaed [CUDA][CodeGen] Fix cuda codegen's fp16 inf literal (#12581)
discard 98ddfff3ca [TIR] Expose WMMA-related TensorCore builtins (#12589)
discard 2c54d8f01c [TIR] Expose `shift_left` and `shift_right` to Python (#12584)
discard 4e233365de [TIR] Expose Vector-related API in Python (#12571)
discard 54789279d1 [TIR][CompactBufferAllocation] Improve upperbound estimation of buffer compaction (#12527)
discard ee0a68ff35 [Target] Remove deprecated parameters from target (#12416)
discard 2d61f7b03f [TIR] Add pass to check for out of bounds memory access (#12352)
discard edb9dcdd6a [LLVM] Add "cl-opt" attribute to target_kind "llvm" (#12440)
discard 7bb4585855 [ci] xfail failing ethosu codegen tests (#12508)
discard 6e1e410547 [TIR] Support AllocateConst nodes in TensorIR scheduling flow (#12489)
discard 8d0342714d [TVMScript] Printer: add boolean operators to OperationDoc (#12518)
discard 355d28b660 [TVMScript] Printer entry point (#12462)
discard 4ea92bafb6 [TIR][Schedule][UX] Beautify TIR Trace Printing (#12507)
discard 65309eea72 [Fix] Fix some typos (#11503)
discard 0afc0dbd5e [TOPI]fix scatterND large shape problem (#12200)
discard 65d265a6fd [Target] Only append default keys if target doesn't have any yet (#12474)
discard 48cf84d6c6 [CMSIS-NN] Re-use CPU Target Parser (#12320)
discard d946e98ae6 [TIR] [bfloat16] add bfloat16 promotion for CallNode (#12370)
discard 3856242c73 [HEXAGON] Auto-vectorization (fp16) for v68 (#12397)
discard 4195064c5c [TVMScript] IRBuilder, IRBuilderFrame base class (#12482)
discard 62c3fc2e5b [TIR] Disallow vectorization with strides in VerifyGPUCode (#12477)
discard 8e7ae8decc [TIR] Expose TVM Backend API-related Builtins and Misc (#12468)
discard da68b274cf Expose Missing TIR Builtins to Python (#12466)
discard 255ecebf42 Use std::make_unique instead of std::unique_ptr(new ...), NFC (#12459)
discard 3ddeddc798 [TVMScript] Printer IRDocsifier (#12396)
discard 0c21327f7a Change tir::GetPointerType to return std::optional<DataType> (#12458)
discard 81662c481d Expose `Struct/Tuple`-related TVM Builtins (#12452)
discard a661b5ae03 [Arith] Parse > and >= bounds in ConstIntBoundAnalyzer (#12457)
discard ec1bab39d2 [HotFix] Op is not bound to any variables (#12401)
discard 71516b7b65 [TIR] Expose Misc TIR operations to python (#12435)
discard c25a8c12b8 [TIR][UX] allow override when register TensorIntrin (#12439)
discard 7d7f53ddae [TIR] Expose Stack-related TVM builtins in Python (#12429)
discard 2d2e187334 [TIR] Expose: `call_packed_lowered`, `call_cpacked_lowered` (#12425)
discard bca531687c [TIR] Allow `tir.Buffer` converted to `BufferLoad/BufferRegion` with `__getitem__` (#12422)
discard cf88c61590 [TIR] Avoid `import *` in TIR tensor intrinsic registration (#12424)
discard ac7ec253f1 [TIR] Allow converting `BufferRegion` to vectorized `BufferLoad` (#12420)
discard 929f3efaca Add `operator()` to `support::With` (#12418)
discard 5b0a5f4954 [Fix] Fix errors in error checking and reporting (#12423)
discard 43084497fd [Fix] Fix precision issue in FFI converting `int/float` to `PrimExpr` (#12417)
discard fdb1d472ae [TIR] Add pass ManifestSharedMemoryLocalStage (#12355)
discard 59f9565ff6 Update hexagon max_concurrency to be at most equal to the number of HVX units available. (#12394)
discard 8b97f13a4b [LowerVTCMAlloc] Move LowerVtcmAlloc to after StorageRewrite (#12364)
discard 438bea1a80 [Profiler] Fix graph_executor_debug hang (#12382)
discard e74239b78d [Target] Add Target Parser for Arm(R) Cortex(R) M-Profile CPUs (#12319)
discard 7d9fb85a14 [Adreno][OpenCL] Get rid of extra memory copy (#12286)
discard 11799426e1 Update C++ standard to C++17 (#12337)
discard e47a56be4e Build and test TVM under minimal configuration (#12178)
discard 8c52f9b4ee Unify name mangling in TVM (#12066)
discard c88eb4ed5e [TVMScript] Text underlining in DocPrinter based on Doc's source_paths (#12344)
discard 503ed21ba9 [testing] Remove wrapper from @slow (#11566)
discard 615f8ee642 [FIX,STORAGE REWRITE] Rewrite buffers in let statements (#12349)
discard 1e8f432e5f [Node] fix typos in include/tvm/node/functor.h
discard 9a3e987f30 [Hexagon] Minor changes/fixes in codegen_hexagon.cc (#12308)
discard 28a036825c [UMA] UMA v1.0 (#12087)
discard a090d69750 [OpenCL] Use size_t instead of int64_t for OpenCL timer count (#12328)
discard 0fb7e6a950 [TIR] Add tir::builtin::undef (#12266)
discard e13b0cf996 [TIR] Add DeclBuffer IR node and functors (#12300)
discard 4f52a54538 [TVMScript] Add source_paths to Doc (#12324)
discard 1ed171bf28 [TIR] Add tir::builtin::assume (#12267)
discard a75e2455c0 [LLVM] Create LLVM scope object for use with LLVM libraries (#12140)
discard dbf2f30b08 [TIR][CUDA] Fix sub-warp reduction using "max" (#12275)
discard 6c145206e2 [TVMScript] Add object path tracing to StructuralEqual (#12101)
discard 818d23cfa4 [Arith] Handle bitwise_and with power of 2 in modular set (#12272)
discard 60dde1ed2e [UnitTest][TIR] Testing utility for before/after transform tests (#12264)
discard 583af5e4f0 [microTVM][ARM] Enable tests that were skipped unintentionally (#12223)
discard 27d531d965 [TVMScript] Python Expression Precedence (#12148)
discard 29795ee8dc [Fix] Fix some errors in unittests (#12245)
discard f9cd1dc60a [ROOFLINE] Add CUDA support to roofline analysis (#12205)
discard 2b86fb696e [UX][TVMSciprt] Use HTML formatter in notebook environments (#12240)
discard ded561a887 [UX] highlight tvm script (#12197)
discard 27c094e1d3 [TIR] Asynchronous stage in software pipeline (#12171)
discard d8b3e3af64 [TVMScript] StmtDoc Printing (#12112)
discard e1882b0d46 [TVMScript] StmtDoc Definitions (#12111)
discard f2e6986b57 [Target] Improve string interpretation in Target creation (#12152)
discard f8e6850767 Use std::move to avoid warnings on clang-13 (#12196)
discard 081925fa33 [JIT] Force finalization of JITed code, expose sf/hf runtime functions (#12187)
discard 7fb111cd27 [OpenCL] Fix profiling hang for OpenCL device (#12173)
discard eba968ee3f [TVMScript] ExprDoc (#12048)
discard 9fb14c0509 Update to 0.10.0 (#12190)
discard d47436546e [TIR Pass] decouple flatten buffer to lower opaque block pass and flatten buffer. (#12172)
discard 1ee2e4b9b0 [TIR] Well-Formed Verifier (#12166)
discard 8e4458ae8d [HEXAGON] QCOM hexagon library (qhl) (#12149)
discard d9be07e473 fix T.Ptr[T.void] for packed api roundtrip (#12118)
discard bd4e0ee0ff [arith][BugFix] Fix simplify input PrimExpr of DetectClipBound (#12150)
discard f1c729eac3 Fix #12039‘s broken cases (#12143)
discard 7986b95da7 Revert "support overlapped itersum (#12039)" (#12137)
discard 5306af8dea [LLVM] Clarify the status of pointers to llvm::Module in LLVMModule (#12123)
discard 6581bcde2b support overlapped itersum (#12039)
discard a7f06365ef [Target] Add "features" property to Target (#12121)
discard 8ad2f1fb3e [Target] Add target_parser to TargetKind (#12119)
discard d7eac5d7b7 [TIR] Moved PrimExpr operator overload from op.h to expr.h (#11973)
discard e309c3407c Add member object accessors to With<> (#12100)
discard dc1e727dbc [Relay] Allow Primitive functions to carry virtual device annotations in PlanDevices (#12095)
discard 0facf06494 [TVMSCRIPT] Make ceildiv available from tvmscript (#12096)
discard 69a2a1bbec Fix bug that disabled cuda integer dot product. (#12099)
discard a4e4f9c636 [MetaSchedule] Add MultiLevelTilingTensorCore rule for auto-tensorization on CUDA (#12059)
discard 3c8baf739d [WIN] export void Configure(...) symbol for Windows (#12091)
discard dc0b72e562 [Arith] Updated BufferDomainTouched to use IRVisitorWithAnalyzer (#11970)
discard 51a8cd9320 [CMSIS_NN] Align CMSIS-NN in TVM to TFLu SHA (#12030)
discard 643ed10081 [LLVM] Update creation of llvm::DebugLoc, remove TVM_LLVM_VERSION < 70 (#12069)
discard aa08ebb6b7 [LLVM] Fix build errors in CodeGenCPU::AddDebugInformation (#12054)
discard c0756baf7d [Collage] SubGraphs (#11981)
discard 546850a72e Several type mismatch fixes and checks (#12041)
discard b66ba62197 [Texture] Add memory scope entity into graph JSON/runtime (#11875)
discard e45c5aa856 [TVMScript] Doc Base Class & DocPrinter Scaffolding (#11971)
discard 179cca0a47 [Arith] Allow constant values in InverseAffineIterMap (#12026)
discard 6be787f4a7 [TIR] Make conversion from Integer to int64_t explicit (#12010)
discard 3b41049546 [microTVM] Autotuning performance tests (#11782)
discard 47b57d232d add missing narrow down of index within conditions (#11942)
discard 391dfcad26 [LLVM] Remove use of deprecated PointerType::getPointerElementType() (#11984)
discard 1e99115101 [Hexagon] Enable int8 vlut codegen for Relay take (LUT) operator (#11693)
discard f0366a2a88 [tests] Fix changed var name from 'target_str' to 'target_names', NFC (#11982)
discard 3df02c5b9c [CI] Skip some additional tests that are failing in the wheel (#11969)
discard 009386daf3 [BYOC] Handle constants in IRModule-at-a-time external codegen (#11770)
discard ccd7931f89 [ci] Redirect sphinx-gallery URLs to S3 (#11839)
discard b627ec51ac [MetaSchedule] Handle 'warp_execution' implied extend of threadIdx.x in VerifyGpuCode (#11949)
discard 882e4effa9 [Relay] Handle memory scope during lowering from relay level (#11874)
discard f044d7538a Add cooldown interval logic for the profiling functional (#11465)
discard 65b99e1fac [usmp] U3 use case (#11015)
discard 78b54caaf9 Add missing headers to llvm_module.cc/.h, NFC (#11925)
discard 664c4581a6 [LLVM] Include LLVM headers in files that use them, not in llvm_common.h (#11888)
discard c713429c31 [TIR] HoistExpression, generalization of HoistIfThenElse (#11592)
discard 340debd5f0 [TIR][Arith] Avoid assigning range of possible values to integers (#11859)
discard 42376293ad [Arith] Fix DetectIterMap floordiv when IterSum only contains base expr (#11887)
discard d13d0b9031 [TIR][Pass] Remove-Weight-Layout-Rewrite-Block (#11870)
discard 747e6fd9ee [LLVM] Register factory function for CodeGenCPU (#11852)
discard 89f070eb6b [LLVM] Remove PrintModule (defined in llvm_common.cc) (#11851)
discard 5cc658413f [LLVM] Remove `using llvm::BasicBlock`, NFC (#11850)
discard 5e3e5c5aae [BugFix] IndexMap.Inverse for unit iters (#11841)
discard 86be327da2 [USMP] Adding support for U1 usecase for constant pools (#10189)
discard 75c93ca529 [LLVM/String] Remove conversion operator of String to llvm::StringRef (#11807)
discard 737623d07b [TIR] Add SHash and SEqual to IndexMap (#11798)
discard 867bee178d [LLVM] Retrieve entire target string from LLVMModule (#11802)
discard cfa5976993 [Arith] Simplification of ceil, log2, and left_shift (#11646)
discard f1c179475b [MetaSchedule][Runtime] Enhance Runner RandomFill (#11758)
discard cb113a8d00 Add optional mem_scope parameter to tvm.nd.array and tvm.nd.copyto (#11717)
discard fac20a7f92 [microTVM] Add support for the Raspberry Pi Pico via Arduino (#11694)
discard e895741063 [ci] Skip failing tests in wheel (#11705)
discard ce872a1125 [Bugfix][TIR] Narrow-Datatype for thread axis (#11725)
discard aee4cda8cf [LLVM] Update uses of AllocaInst::getAlign[ment] (#11718)
discard 4d4d5cf079 [microTVM][zephyr] Add support for host-driven AoT execution on zephyr (#11650)
discard be9d653877 [BYOC-OpenCLML] OpenCLML integration with TVM. (#10243)
discard 241bb91b0c Fix typos in target warn of dnnl (#11678)
discard 4c9648ce8d [BYOC] Make CUTLASS BYOC integration 'Collage friendly' (#11631)
discard 5e7f4a413f [DNNL][CBLAS][BYOC] Unifles all MKLDNN/DNNL to DNNL (#11638)
discard 6082fda5ce [TIR, CUDA] Add pass to replace global to shared memory copy with cp.async (#11658)
discard 8d5999a4c3 [microTVM] Add support for Arduino Portenta H7 (#11636)
discard 8fba37d7d5 [PASS] Refactor a couple of TIR passes - BindTarget, AnnotateEntryFunc, Filter, LowerInitBlock (#11628)
discard 5675bb8556 [TIR] CSE pass : Restrict the equivalence to be decided by a normal form - avoids comparison of terms (#11574)
discard 8e678de808 [OpenCL] Implement conv2d_winograd algorithm for Adreno (#11543)
discard 794d1e963a [Hexagon][CI] Re-enable Hexagon tests in CI (#11613)
discard 5ba016e8a6 [TIR] Prevent loop binding over-simplification (#11578)
discard 5b656ba366 [TIR] Expose tir.call_cpacked in python (#11563)
discard d3b23d11fb [CI] Refactor of tvm.testing.requires_* annotations (#11313)
discard d12837c1f5 [BYOC] Two helper passes for external codegen using RelayToTIR custom pass machinery (#11474)
discard 64ed778cd0 [TIR][Arith] Additional Simplifications Inside Conditionals (#11524)
discard cdcb87ea87 [Bugfix][TIR] Handle bool tensor in FlattenBuffer (#11532)
discard 1b591c7aad [VM] check DLManagedTensor for conditions to construct NDArray (#11504)
discard b35a406a7e [Relay] Plumb external codegen target via Target.current() (#11432)
discard 773c96d9b1 [BugFix] Add lock for ModuleNode::GetFuncFromEnv (#11467)
discard dffdcb2a00 [microTVM][ARM][Zephyr] Add CMSIS dependencies in Zephyr project build (#11362)
discard 9785f36480 [Arith] Merge surjective/non-surjective iter mapping detections (#11287)
discard 166fbcba6f Canonicalize type annotation during construction of Var and SizeVar (#11443)
discard 8379ba8d4b [Pass] Add utility that asserts that IRModule is not mutated in a pass. (#11498)
discard 7699c2fb84 [OpenCL] Avoid SelectNode ambiguous overloading (#11488)
discard 147e7588da Silence unnecessary 'host' deprecation warnings (#11499)
discard 983782512a [FFI][CYTHON] Release GIL when calling into long running functions (#11461)
discard acfc41e553 [CUDA] Allow dynamic shmem of size > 48K in runtime (#11478)
discard 151bc78ca3 [VM] Memory alignment check for `set_input` in Virtual Machine (#11391)
discard 7c92f8aea9 [TIR] Additional Stmt/Expr simplication rules (#11373)
discard c2c489a341 [Runtime] Add 'static_library' runtime::Module (#11442)
discard 7a8b537de7 [BYOC] Enable bfloat16 in DNNL BYOC (#11111)
discard 500af93d03 [TIR][Schedule] Transform layout quality of life (#11269)
discard b20812bf46 [Arith][BoundDeducer] Forbid non-supported expr type in bound deducer (#11323)
discard 9b9fa29e70 [Arith] Allow unused trivial iterators in bijective check (#11425)
discard b2dae1fc2b [TIR] Regression test for PrettyPrint/IterMapExpr bugfix (#11418)
discard 50b076a2f2 [Bugfix][TIR] Removed passing of IterMapExpr into PrettyPrint (#11412)
discard 2d4264bea1 [tests] add utility to replace direct call to pytest.main (#11393)
discard f3f5f1dc25 Finish support for list-of-targets (#11382)
discard 5d4cd52d0b [TVMScript] fix typo for block syntax (#11407)
discard 12dc23109a Fix int8 cuda kernels on older SM versions (#11389)
discard 519f2096b0 [FFI] Renamed __VisitAttrs__ and __fvisit__ to non-reserved names (#11392)
discard 1e75ef15a3 [TIR] Support tensorization using ldmatrix + MMA (#11355)
discard fc8cc7ef48 [PTX] Intrinsics for async copy from global to shared (SM80) (#11368)
discard d69b362218 [Relay] Support i16, f16 scalars in Relay text (#11224)
discard f3f0b19b42 [TIR] IndexMap Simplification Constraints (#11342)
discard 56c3f452e2 Improve error messages with TVM_LOG_DEBUG and add docs (#11344)
discard 0e05cc9d0a [build] Fix/simplify `ccache` logic (#11189)
discard 6d477e9c53 [Runtime][ThreadPool] Enhance CPU Affinity configuration for OpenMP case. (#11343)
discard fbd18b696b [Hexagon]Use requires_hexagon instead of requires_hexagon_toolchain if running on hexagon target (#11294)
discard e4f21b4290 [TIR] Propagate storage scope of undefined vars in SplitHostDevice. (#11255)
discard 6d912b3eb5 [ONNX] Fix cast op to/from bfloat16 (#11171)
discard d3f193a270 [ci][docker] Update images to include sccache changes (#11314)
discard 5b250b0195 Avoid use of MemoryInfo when undefined in StorageRewrite (#11254)
discard 490a631782 [TIR][Arith] Implemented padded inverses in IndexMap (#11235)
discard d6f8b23222 [Hexagon] Remove sim_options from tvm.target.hexagon() (#11293)
discard b9630c209f [logging] LOG(FATAL) calls [[noreturn]] functions (#11310)
discard f1a4f3b5ab Add Adreno GPU target and topi supporting textures with dynamically allocated textures (#11161)
discard 9ed44da2bc [rpc] Implemented rpc logging (#11232)
discard 760532caa9 Fix a case of linking to wrong OpenCL library (#11215)
discard b8d0de7a8b [OpenCL] Change of OpenCL profiling logic (#11180)
discard f82e9219cd [microTVM] Add support for host-driven AoT Executor (#11044)
discard a4f2632f7d [LLVM] Make sure all functions have target-related attributes set (#11222)
discard b1b0e797dd [USMP] Change internal workspace section (#11246)
discard fc84aee163 [CI] Identify non-inclusive language in commits (#11230)
discard 7b06d3558f [TIR] Fix reverse_compute_at for trivial region with trivial block var (#11234)
discard 93d52d04ee fix two check typo in codegen (#11240)
discard 2fcea84a0e [LLVM] Fix a possible tbaa issue (#11181)
discard 060905fc6c Revert "Implemented rpc logging (#10967)" (#11227)
discard 8ed19818d8 Implemented rpc logging (#10967)
discard 84d660372a [Relay] Support 'external codegen targets'. (#11173)
discard a23d81bcd0 [Hexagon][Runtime] Add QuRT thread pool backend (#11018)
discard 05a203a318 [Hexagon] Add support for on-device unit testing using gtest (#11145)
discard 369158f9b9 [CI] Update GoogleTest (#11162)
discard 88bae7ad86 [TIR] Reduced duplication in op.h (#11129)
discard e3072ef316 Remove support for run-time linked-params from codegen (#11144)
discard 1c69a48184 [fix] vec * mat in matmul in onnx converter (#11174)
discard eef67ff1a7 [Arith] Simplify the output of InverseAffineIterMap (#11167)
discard c1ff0bb8d6 [Analysis] Readability/Deduplication in Analyzer CanProve/Simplify (#11130)
discard 91feed7e39 [TIR] Get read/write access precisely for opaque access. (#11110)
discard 895d42bc71 [Metaschedule] Auto tensorization for CPU / GPU dot product (#11088)
discard 7d4a5764b7 [USMP] Adding support for U4 usecase (#10785)
discard fec543b571 [CONTRIB] Add PopenWorker process recycling (#11094)
discard 559ef628a1 [Analysis] Exposed Analyzer::CanProveEqual to Python API (#11102)
discard e6b496fa9b Prevent IRSbustitute to create new buffer when buffer var is unchanged (#11103)
discard 452dc88092 [Hexagon] Delete offload runtime, move files to right places (#11090)
discard 7b43d74977 [Hexagon] AoT with LLVM Codegen on Hexagon (#11065)
discard 2b55a37dcb STM32: add as a new target (#9385)
discard 711bec94e0 [TIR] StmtFunctor RenewDefs (#10843)
discard bd62cd396c Add two possible missing visit of let stmt in lowering (#11079)
discard c4888497fe Fix While Node StructuralEqual and StructuralHash issue (#11073)
discard 2a42159c2f [TIR] Utility function to decide loop mapping for auto tensorization (#11050)
discard 1d0ac904e8 [OpenCL] Fix type casting (#11038)
discard c1a9ef032d Revert "[OpenCL] Fix type casting error (#11021)" (#11035)
discard 82da3397d5 [AOT] Support LLVM backend with C++ runtime (#10753)
discard 84346e9752 [Hexagon] Deprecate USE_HEXAGON_DEVICE, introduce USE_HEXAGON (#11025)
discard 37b9949c32 [VirtualMachine] Zero copy in set_input when input is DLTensor (#11003)
discard 4617401776 [OpenCL] Fix type casting error (#11021)
discard 1b3cd544be [Arith] Updated arith::DetectIterMap to keep extent=1 components (#10980)
discard b2a9113f35 [Metaschedule] Support tuning on rocm and vulkan target (#11017)
discard 723dbde770 [ROCM] DP4A intrinsic support for TE/TIR (#11009)
discard 7f51672022 [Runtime][Vulkan] Add RGP support to TVM for vulkan device (#10953)
discard 82db66230f [FIX] resolve int64/32 for AttrStmtNode (#10983)
discard 1200d60473 [Hexagon][LLVM] Enable/test tensorized Hexagon DMA on 2d transformed layout (#10905)
discard 32bd7a1b18 [ci] Don't diff when running clang-format (#10933)
discard dfc529db03 [CI] Bump black version to 22.3.0 (#10960)
discard 47faf5219f [Hexagon][LLVM][CodeGen] Make CodeGenHexagon a subclass of CodeGenCPU (#10908)
discard 8fd400ea27 [TIR] Fix check for multiple axis separators (#10845)
discard 0986f58d18 [TIR] Fix int32 vs int64 mismatch in For construct. (#10595)
discard 2fa320384e [LLVM] Support CodeGenBlob for large >2GB models on x86 (#10882)
discard 367b8cc69b [RUNTIME] Api to get number of runtime threads (#10896)
discard e852d52119 [PTX] `ldmatrix` builtin to accelerate copying data from shared memory to warp memory (#10855)
discard dcfd2a01f1 [Pass] Fix printer formatting for PassInfo (#10844)
discard fab46f545a Fix typo in comment about kill() (#10863)
discard d94ab5f5e6 [Hexagon] Pass extra parameters to link_params via Map (#10830)
discard 3fa210a076 [Metaschedule] Add demonstration of selectively tuning relay ops with TIR schedules (#10793)
discard 88e41627ce [Pass][Bugfix] Disable re-use of non-flat buffers in StorageRewrite. (#10787)
discard e22a94b2e0 [DOCS] Add background context for stack allocation in builtin lowering (#10632)
discard ef5ae531f2 [CI] Fix Vitis-AI tests when USE_VITIS_AI flag set to OFF (#10802)
discard a93891d844 [AutoScheduler] Supported CSE (variable definitions) in feature extraction (#10686)
discard 8da83cf114 Also strip prefix from TVM_LOG_DEBUG specs. (#10755)
discard 2e43b35395 [Arith] Remove diagnostic ctx argument from DetectIterMap (#10798)
discard 72fd4d42a6 added surpport for arg type of numeric float16 and testcase, fixed the (#10797)
discard 0021e10bb5 [Runtime][PipelineExecutor] Fix CPU affinity setting issue. (#10781)
discard a758e33d50 [Hexagon] 2-d allocation cleanup (#10786)
discard e8eff9b27a [TIR][Analysis] Add SuggestIndexMap for layout rewriting (#10732)
discard fa46d96193 Check for toolchain when marking reference system tests (#10659)
discard 60baee1939 [TIR][MetaSchedule] Estimate TIR FLOPs (#10782)
discard 8be879ab84 Eliminate some compiler warnings for microNPU demo app (#10549)
discard c6e12dfab7 Fix clang llvm 12.0.1 warnings (#10744)
discard a4731a8d08 [TIR] Simplify final indices from transform_layout (#10761)
discard 26cf5a2755 [NDArray] Update runtime.TVMArrayAllocWithScope to use ShapeTuple (#10728)
discard 221337fe79 [NDArray] Expose NDArray::CreateView to python (#10712)
discard ddb4e8a7f9 [TIR][Schedule] Change BufferIndexType enum in python side to string (#10737)
discard b8dc4679f5 [Hexagon][Codegen] Implement CodeGenHexagon::CreatePrintf (#10710)
discard 4997613c0f [TIR][Schedule] Transform layout (#10538)
discard 16f66e4647 [UnitTest] Fuzz based on seed rather than random value. (#10515)
discard 835075728e [build] Use mold or lld if detected (#10683)
discard d614bc7a45 [ci] Fix condition for skipping tests in i386 (#10698)
discard 5f87a6bb0f Mark x86 specific test (#10672)
discard 06c418a811 Add order to functions in C Codegen (#10590)
discard d07df1f49e [C Codegen] Remove global packed variables when interface_api="packed" and target="c" (#10645)
discard 20133fcf23 [Hexagon] Add flags to control floating point support in HVX (#10644)
discard e6e0ec0f66 [Hexagon] Add support for Hexagon v69, deprecate v60 and v62 (#10623)
discard 6d9679dcb4 [Arith] Fix floormod rewrite simplify rule (#10626)
discard 526b95e90b [Hexagon] Remove double ".hexagon.hexagon." from registered names, NFC (#10624)
discard 74c0e88dbb [Hexagon] Refactor tvm.contrib.hexagon, NFC (#10616)
discard 918fba4864 [Hexagon] Codegen for 2d Load/Store (#10586)
discard 3f95f09d23 [microTVM] Zephyr: add mps3_an547 board support (#10479)
discard 6596beba68 [Hexagon] Generalize builtin for Nd memory alloc with storage scope and add lowering for VTCM / Hexagon (#10558)
discard 5f9bcdf85c [Arith] Improve floordiv / floormod rewrite simplifing rules (#10591)
discard cec9fbf3b9 [TIR] Updated python docstring and parameter names for AllocateConst (#10602)
discard 06c186e9b0 [TE] Promote substituted variable to iter_var's dtype (#10571)
discard a41c14bc4b [CMAKE,HEXAGON] Only enable Hexagon custom logging when building for Hexagon (#10587)
discard a100ee242b [TIR] Restrict Buffer indices, only last index can be multi-lane (#10513)
discard 585f01305c [CMAKE] Add option to enable custom logging (#10531)
discard 136d27f1e6 [Refactor] Reduced repetition in CodeGenLLVM's buffer access (#10567)
discard 505a8fe326 [Runtime][ThreadPool] Remove a cout log output. (#10560)
discard 6a189aea63 [Hexagon] Resolve breakage in test_hexagon/test_cache_read_write (#10520)
discard 745e67a67d [AOT] Introduce checks for return values from operators (#10424)
discard eb81e97da3 [LLVM][TIR] Propagate variable names to parameters. (#10514)
discard e730e949b6 RFC: initial stab at TorchScript fallback (#7401)
discard c8cd02dc67 [skip ci][Bugfix] Allow constant folding of 0U - 0U (#10535)
discard f4761c897a [PTX] Support mma.sp to use Sparse Tensor Cores and refactor mma codegen (#10339)
discard 0ccf3aca0d Add Check about negative uint constant (#10484)
discard 48e3516123 Automatically close open files to prevent ResourceWarning (#10526)
discard 26c72ff4eb [vulkan] Add integer dot product (4xint8, 4xuint8) tensorization for the vulkan SPIR-V target. (#10391)
discard 99b614f0de fix: select narrow dtype (#10519)
discard 73b14ab160 [TE][TIR] Implement layout transformations, non-flat memory buffers (#9727)
discard 64b6a54983 [MetaSchedule] Update scripts for subgraph tuning (#10501)
discard 503c4c3303 [CodeGen][CUDA] use hrint for cuda half rounding (#10460)
discard 8954a887c6 [Minor][Build] Fix compiler warnings hidden overloaded virtual function (#10485)
discard ebf5eee071 [Arith] Handle mod/floormod in modular set analysis (#10453)
discard 2011e1030a [MetaSchedule] Enable AutoTVM-style template-based search space (#10461)
discard 82032d8a74 [microTVM] Zephyr: add B-U585I-IOT02A board support (#10416)
discard f987d04fb5 [Runtime][ThreadPool] Handle the default value of affinity mode. (#10434)
discard b052a4eada [runtime] AOTExecutor implementation and c target code-generator (#10283)
discard ccb13f0bec Fix plint complain for some files. (#10433)
discard 6cabcb7438 [Bugfix][Arith] Fix TryFuseIter (#10427)
discard 25adf5e93e [Runtime][ThreadPool]Refactor affinity function and support CPU affinity list setting. (#9802)
discard 8b4a0b1c48 Add @slow decorator to run tests on `main` (#10057)
discard b7a50a7fb7 [MetaSchedule] Arithmetic analysis (#10403)
discard 902484128c [TensorIR] Renormalize split pattern (#10401)
discard da15a4f3ed Enable groups argument for conv2d_transpose on the cudnn backend (#10396)
discard b04df3b97f [RELAY] [VIRTUALDEVICE] Change syntax for device planning and store parameter virtual devices in virtual_device_ field (#10352)
discard 6b8d5f21da Lower cache_read and cache_write to Hexagon DMA via tensorize (#10365)
discard e20057b1d2 [TIR, Relay] improve bfloat16 support (#10112)
discard 9358a0faec [BUGFIX][ARITH] Fix FloorMod Simplifier (#10336)
discard b3f1684575 [runtime] Improved log information with function signature (#10326)
discard 247b9cfad8 [AOT] BugFix of workspace calculation (#10337)
discard b4a0e5ddab [TIR] Misc minor updates (#10335)
discard 345a7055cd [TIR] Tir constants integration into compilation pipeline (#8509)
discard 3ccf2248a6 [runtime] Add Metadata classes for AOTExecutor (#10282)
discard 394644f9d8 [TIR] Fix Ramp int32~64 mismatch in VectorizeLoop and NarrowDataType passes (#10172)
discard 6c014c8b4b Generate correct output tensor names in C Interface API (#10191)
discard 4cbd4b39b0 [Arith] Support integer BufferLoad in IntervalSetEvaluator (#10327)
discard 04d8a5051e [TIR] add support for multi-blocking layout and their transformation (#9996)
discard e0f5f22739 [Relay] [Virtual Device] Store function result virtual device in virtual_device_ field (#9848)
discard e2f149cab0 [TOPI] Add support for groupped conv3d (#9873)
discard c522f20aee [UnitTest] Disable ptx mma tests on unsupported nvcc versions. (#10229)
discard fe5ed6f5b0 [TIR] Add software pipelining (#10066)
discard 61c5e9efe1 [CMake] add support for find_package (#10097)
discard 0ca1212f21 [Cuda] Updated bfloat16 math defs. (#10258)
discard 5a25717057 Support sub warp reduction for CUDA target. (#10207)
discard ef25902a00 add a simplify rule for floordiv(x*8+7, 16) => floordiv(x, 2) (#10232)
discard 39d9a6caaa [USMP] adding support for U2 and U3 usecases (#10193)
discard e3ba38991f Implementation of Common Subexpression Elimination for TIR (#9482)
discard 1a1d8f0f93 [TIR] Allow compute_at create block predicate for non-trivial bounds and support floordiv pattern (#9527)
discard 0520760df4 OpenCL debug runtime timer handler added. (#10140)
discard 0278a3be37 remove async tst (#10160)
discard e08b24e42a [Runtime][PackedFunc] Bring `PackedFunc` into TVM Object System (#10032)
discard 1c1be6a6aa [CUDA] Support float16 erf,tan,atan (#10122)
discard 1ced0063f4 [Ansor] Improve OpenCL support (#10108)
discard 74df0dee5b [LLVM,TIR] Print LLVM intrinsic names instead of ids (#9964)
discard eed94e8681 [TE] Fix Const Int bound analysis to handle uints for division (#10102)
discard 96354f7cde Change function constructors to WithFields (#9690)
discard 80633462b3 Don't explicitly link libgcc.a into libtvm_runtime.so on Android (#10052)
discard f415dbbf06 Clear warnings when building with MSVC. (#10059)
discard 1c731b93c5 [MetaSchedule][M4a] Schedule Rule: Multi-Level-Tiling (#10043)
discard fbecc5ac94 [TIR][Schedule] Blockize and Tensorize (#9871)
discard f6db4eaa04 [CUTLASS] Profile only the largest-possible alignment by default (#10036)
discard a190f65b05 [Hexagon] Do not auto-build apps when building TVM (#9970)
discard c575fcbd40 [PTX-MMA] Add full PTX MMA code generation support (#9909)
discard ee46234a39 [MetaSchedule] Schedule Rule: Parallelize-Vectorize-Unroll (#10033)
discard aed0df094c Add user-configurable backtrace limit (#10025)
discard 920de846b1 Auto-discover C/C++ compiler instead of hardcoding g++ (#10007)
discard ea102a3eca [Minor] Typo Fixes (#10000)
discard 27f31a50f1 Add runtime.ModuleGetFormat method enabling export of BYOC generated sources which require a .cpp/.cc file extension (#9243)
discard 930e922041 [MetaSchedule] Schedule Rule: Add RFactor (#9975)
discard 7f222b3e23 [Fix] Fix flaky test of #9952 (#9958)
discard a592fe3c7f [TIR][USMP] Integrating USMP to AoT Executor (#9565)
discard 6ddfead129 [MetaSchedule] random compute location (#9940)
discard e68122e5f0 [TIR] Encode conditional accesses info into block read/write regions (#9880)
discard 279215b00d [TEST] Remove `llvm -device=arm_cpu` and `cuda -libs=cudnn` from (#9905)
discard 19541c2f6c [BUGFIX] Check that virtual device is unchanged in WithFields (#9826)
discard 7f5a01bb49 Add a JSON converter for 0.7 -> 0.8 and 0.8 -> 0.9 (#9874)
discard acc3edd0a6 [MetaSchedule] Add Per-Store-Feature (#9860)
discard 96ac6e1332 [LLVM] LLVM codegen debug utilities (#9857)
discard 0edf299915 Generate compile_commands.json by default (#9763)
discard bf2b1cc978 Add Python representation for VirtualDevice (#9812)
discard 9e05dc6ba2 [Target][BugFix] Convert dict and str to TVM object (#9807)
discard 315ed80789 [TVM Basic] Extend generic func with get_packed_func() interface (#9784)
discard cc7baafd37 [TIR] Affine utility support iter lowerbound and diagnostics (#9699)
discard b3fb32c1cc [CMAKE] Automatically detect newly added source files (#9611)
discard 65639cb412 [Target] Fix device mask issue and typos (#9768)
discard 523abfa7b0 [CodeGen] avoid crash if an exception is raised during llvm cpu codegen (#9786)
discard eea67b632e fix int set analysis on negative scale (#9776)
discard e574831dc4 [TIRScript] fix parse StringImm value in for loop annotations (#9755)
discard 25c7111103 Clarify error message for missing libraries (#9710)
discard c0478a0fe8 [Relay] s/SEScope/VirtualDevice/g (#9759)
discard de7c4b2cf2 Add unit tests for HexagonBuffer (#9736)
discard 6287e83e48 [Relay] Re-run PlanDevices after LowerTE to flow new memory scope constraints. (#9613)
discard 6740e7f7b2 [CUDA] Do not emit vector load on unaligned base offset (#9731)
discard b6e65a7d0a Add CMake summary (#9696)
discard 9c8ac2bc28 [Hexagon] Detect link-params via IRModule instead of target attribute (#9695)
discard 9cdf049b33 [Relay] PlanDevices supports 'free' on_device annotations (#9693)
discard 3d68720ad3 [RELAY] [AST] Add virtual_device as a first class field in Relay (#9641)
discard 8d83872ba4 [TIR] Allow memory (aka storage) scopes to be retrieved/applied to PrimFuncs (#9689)
discard 383259b62a [TIR][USMP] adding the pass to convert to pool offsets (#9418)
discard 19e9833edf [Hexagon] Add RPC Mechanism for Hexagon (#9631)
discard 373c4b1139 [TVMScript] Add for loop syntax sugar (#9620)
discard 1cc72ceb8c [Target][TVMC][UX] Avoid creation of dummy Target objects in TVMC (#9662)
discard c971c47f52 [microNPU] Move the compilation to use Target Hooks. (#9597)
discard 7441255aec Add minimal forwarding RPC server for host driven python execution on Hexagon (#9526)
discard 8fed443703 Section names for TVM generated constants (#9524)
discard 757a52c419 [BugFix] fix nvptx not supported by device_enabled error (#9585)
discard 2ffc347e43 Introduction tutorial formatting fixes (#9539)
discard 54fd073875 Bump version to 0.9.dev0 (#9581)
discard 91006a8be4 Update license file to note libbacktrace (#9579)
discard d95df2d2fc [Target] enable -arch=sm_xx for assigning cuda target arch and deprecate autotvm.measure.set_cuda_target_arch api (#9544)
discard b50875f2ca Prepare for switching VM to LowerTEPass. (#9550)
discard 4605039efd [TIR][USMP] Added buffer info extraction pass (#8468)
discard 7c7ff3571d [3/3][AOT][DeviceAPI] Wire up cpacked Device API context (#9501)
discard a56d8efa3c [TVMC][Relay] Introduce executor and runtime parameters (#9352)
discard 322d69ad27 Add a 'rolling_buffer' scheduling primitive (#9444)
discard ec904e4488 [4/10] Code generation for Conv2D via CMSIS-NN (#9331)
discard c4c7d79a59 [ETHOSN] Cleanup of trademarks and registered trademarks (#9516)
discard 1f22b3da44 [Topi] Cortex-M DSP support (#9233)
discard 034e2f5f29 [TensorIR] Cross-Thread Reduction (#9360)
discard 9e792b4b31 [1/3][AOT][DeviceAPI] Connecting devices structure to relevant operators (#9395)
discard 3b11daa371 Switch PlanDevices pass to be w.r.t. SEScopes instead of DLDeviceTypes. (#9326)
discard 9040c28de6 [TARGET] Move target_host usage to new target style. (#9497)
discard 8df3a169b2 [Support] Add libinfo into the runtime build (#9310)
discard dd46953bb8 Better host handling in CompilationConfig & debug printing (#9460)
discard e1aa35d22d add is_entry_func tag for device function (#9436)
discard 5bec93218f [TIR] Make compact buffer and get access region aware of conditions (#9372)
discard ca8dc5d6cb [TensorIR] Print TVMScript with prefix T instead of tir (#9422)
discard fb4e182aaf [PyTorch]Add PyTorchTVM: compile torchscript to tvm and export as pytorch_op (#8777)
discard ff9b4f5950 Adds SEScope (Storage/Execution Scope) for use as new unit of planning in 'device' planning. (#9313)
discard 997c6c89ac BUG: Make sure FoldConstant can inline constants underneath on_device annotations (#9367)
discard b177001707 [microTVM] Add microTVM Template Projects to tlcpack pip Package (#9309)
discard e3c72b7aa2 [CUDA] Support memory reuse for dynamic shared memory (#9341)
discard ca9222f201 [BYOC] CUTLASS integration (#9261)
discard 78165b4f77 [OPENCL] Workaround for zero size allocation (#9379)
discard c640548284 [BugFix][Opencl] Explicitly cast min/max operands (#9374)
discard 3a51f4b0be [TVMScript] Parser for Lambdas, Parser/Printer for `CommReducer` (#9358)
discard e443580738 Specify argument to FastMathFlags setAllowContract (#9337)
discard e5252b5ca1 [Error reporting] Replace runtime errors with LOG(FATAL) (#9311)
discard b7bead53cd [Codegen][LLVM] Add ability to turn on fast math flags (#9223)
discard 7c264ac55b update block syntax (#9286)
discard 9f0e216365 [iOS] Fix build issues on the latest XCode and iOS (#9298)
discard b9c2aa1b10 [Hexagon] Fix addressing TVMValue array (#9302)
discard cc8cb9e62b [TVMC] Compose target options from target registry (#9218)
discard d65eaeb494 [LLVM] Treat scalars as single-lane vectors in CreateVecConcat (#9264)
discard dcd1bc46b8 [Simplifier] Add printing of SplitExprNode and SumExprNode (#9262)
discard 4575f73e4f [TIR][USMP] Add a parallel to serial for loop converter pass (#8469)
discard 01d1e4ef69 Fix typo in error message in CMakeLists.txt (#9251)
discard 7f4267a82a Initial Implementation of TIRToRuntime Target hook (#9190)
discard 6c0817e6ff [cpptest] Use find_package to locate GTest files (#9208)
discard 5a6449437a Adding annotations for tir.allocate (#9168)
discard 7c5a3d7e0d fix (#9205)
discard 4f04e1a18e Fix end to end benchmark with rpc devices (#9175)
discard f630ebb5c1 [TIR] Fix FlattenBuffer computing size for buffer with strides (#9195)
discard db71e06ab2 [UnitTests][CMSISNN] Mark CMSISNN with skipif they are missing libraries (#9179)
discard 24e1614007 [LLVM/CPU] Add comments with origins of various runtime/backend types, NFC (#9177)
discard 591fa4541f [LLVM] Rename t_tvm_context_ to t_tvm_device_, NFC (#9176)
discard f650f2e92c [TVMScript] Script namespace changes (#9115)
discard c532c6145e [TEST] Move llvm import test away from minimum test (#9171)
discard 80134f8b5b [TIR] tir.transform.StorageFlatten refactor (#9091)
discard 0284d60add Update find cublas so it search default path if needed. (#9149)
discard d98c0a6742 [LLVM] Make changes needed for opaque pointers (#9138)
discard 2f7157c773 [TIR] add loop partition hint pragma (#9121)
discard 10f98d6e6b [OpenCL] Remove redundant visit statement in CodeGen. (#9144)
discard 72393fe3b6 [Relay] Prepare for new plan_devices.cc (part II) (#9130)
discard bc8ea9cdaf [microTVM][Zephyr] Add MIMXRT1050 board support (#9068)
discard b7fa42529b [Bugfix] Add nullptr checking for `AttrStmt` with `coproc_uop_scope` attr key (#9123)
discard 0dd91c4cc1 [Codegen] Swap out analyzer when outlining (#9117)
discard bd47e84581 [LLVM] Refactor MakeCallPacked, NFC (#9118)
discard cf6cc757ce prevent casting handle to other types (#9114)
discard 31a33d91e1 Fix the missing `dtype` attribute of `tir.Shuffle` in Python level (#9131)
discard d367b1f271 [Relay] Prepare for merging context_analysis.cc and device_annotation.cc (#9077)
discard ce5f104fd1 [PYTHON][FFI] Skip numpy.ascontiguousarray if C_CONTIGUOUS == True (#9073)
discard 79bbbc7b1b Move the allocates of AoT codegen to be TVMBAWs (#9065)
discard e5ea5ddccc [Hexagon] Pytestify Hexagon unit test (#8955)
discard 4e08ef3e34 [iOS] Add tracker support into ios-rpc application (#7876)
discard a6e82335e4 [Meta Schedule][M3c] Argument Info (#9059)
discard 90506d71bb [Relay] VLOG for finer grained control of hyper-detailed logging (#9012)
discard 5b853e1e2a [Meta Schedule][M3b] Builder (#9044)
discard 6129b82767 Support match pvar with dtype constraint (#9016)
discard 1ad67673f6 Implementation of relay_to_tir target hook (#8423)
discard 725935a472 [Bugfix] Fix other div zero errors also in rewrite_simplify (#8983)
discard 174db07601 [Hexagon] Disable `thread_local` on Hexagon (#9025)
discard afd5f22a8b [Hexagon] Allow undefined symbols in libtvm_runtime.so on Hexagon (#9024)
discard 1021d240e9 [Runtime] Pipeline Executor Initial patch. (#8702)
discard 8afda5eec3 [Hexagon] `llvm-options` attribute is an array of strings (#9011)
discard 2fb6ce177b [TIR] Add conversion from FloatImm to float in Python (#9009)
discard 4b5dd03319 [CMake] Corrected warning message about USE_GRAPH_EXECUTOR_DEBUG (#9006)
discard 13d3bd7504 Add while node support in TVMScript (#9004)
discard b20e3fab9b Clean up LowerTEPass and pass IRModule Attrs through passes (#8914)
discard f362e23b3d [TensorIR][M2a] Compute-At (#8943)
discard 5933855fc8 [TIR][VM] Revert a change to lower_tvm_builtin.cc from #6126 (#8274)
discard c479cd292f [microTVM] Add support for AutoTVM (#8715)
discard 29c5fae540 [Bugfix] Fix div zero error in rewrite_simplify (#8961)
discard 56711a3ad2 [LLVM/CG] Sort PrimFuncs when creating LLVM module (#8958)
discard 1bba318d07 [Bugfix] Add a nullptr check to tir.Buffer to fix the illegal memory access (#8910)
discard 36e029d1e0 [2/6] Arm(R) Ethos(TM)-U NPU Relay passes and Conv2D op (#8795)
discard 12e3e9cc2b [AutoTVM] Use popenpool in local_executor (#8851)
discard 7b9e4d2667 [CMSIS-NN] code generator for softmax (#8833)
discard 4a223c649d [UnitTest][Vulkan] Runnable relay unit tests on Vulkan (#8947)
discard e840841e6b [Bugfix] Add check to avoid calling back() on an empty container (#8930)
discard 5d3ff11071 [Hexagon] Add support for linked-in model parameters (#8865)
discard 9ba0990ba7 [UnitTests][Ethos-N] Mark unit tests as requiring Ethos-N (#8873)
discard 0e5495d8e7 Sanitize names of input tensors in interface header (#8720)
discard 5a6e5a2a6f Remove LoweredModule (#8886)
discard 065950d910 [UnitTests][Contrib] Enable contrib tensorrt/coreml unit tests (#8902)
discard 1c0a70e393 [Vulkan][Topi] Parametrizing additional topi tests, marking vulkan failures (#8904)
discard 1c34aae7a9 Change target string to Target object in the TE compiler and interpreter (#8835)
discard fc9e4eab32 [Vulkan][Target] Added the driver name to the vulkan target string. (#8882)
discard 398dce0f16 [RISCV] Add support for llvm parameter -mabi (-target-abi) (#8860)
discard 77da423d3b [TIR] GetBlockReadWriteRegion (#8875)
discard 26783e88eb [UnitTests] Expose TVM pytest helpers as plugin (#8532)
discard 707f337f78 [Hexagon] Change declaration order of unique_ptr objects to fix crash (#8859)
discard 30ee0412cc [FIX] Bug fix for a floormod rewrite simplify rule (#8852)
discard 6cfd371639 [Hexagon] Rework tvm.target.hexagon() interface (#8823)
discard bea19ac6ed [GRAPH EXECUTOR,VM] Add benchmarking function to graph executor and vm (#8807)
discard c58c8f9ad3 Apply CPPLint to C++ Unit Tests (#8827)
discard b152f709e9 [FLAKY] A small bug fix on the CmakeLists (#8826)
discard e743d63f1e [FIX] Remove leftover instances of USE_GRAPH_EXECUTOR_DEBUG (#8796)
discard c51ea42b0c Use CTest for C++ tests (#8809)
discard 1985d0a474 [Vulkan] Remote target.h #include (#8813)
discard 8cdb3ab383 [TIR] Support fold constants in specialize process (#8803)
discard 3cfb970165 [CODEGEN][OpenCL]: fix tir.erf codegen to opencl directly (#8756)
discard 7c430c05e2 [Texture support][Part 1] TIR lowering and OpenCL support (#7686)
discard 2db6405d25 [CONTRIB] Allow customized initializer in PopenPool (#8789)
discard cd6f78c0a3 [TIR] Fix buffer scope in structural equal (#8768)
discard cb308ad7f4 [microTVM] Project API Arduino support (#8708)
discard c87b6452dd [TensorIR][M2a] Parallel, Vectorize, Bind & Unroll (#8716)
discard 3593f963d5 [Relay] Refactor Interpreter to treat lowering as IRModule->IRModule rewrite. (#8597)
discard 033866f66e [UnitTests] Require cached fixtures to be copy-able, with opt-in. (#8451)
discard e22c2748d3 Add DictAttrs to IRModule and refactor DictAttrs utility functions (#8750)
discard 94fe390494 [Vulkan] Check at codegen if the shader is within shared memory limits. (#8746)
discard 6d638a5a41 [TIR] Use PopenPool instead of multiprocessing.pool (#8492)
discard 3026ce733a [FIX] Correctly link to PAPI (#8691)
discard 0ae2150227 Improve the error message in module.cc (#8694)
discard ae363896b3 [UnitTests] Added cuDNN to default test targets (#8383)
discard 8964b71a02 Fix error when compile tvm with latest llvm14git (#8682)
discard 70c4c7bf96 [microTVM] Project API infrastructure (#8380)
discard 6fcf4ba7f2 [Target] Add __launch_bounds__ directive as part of the CUDA code generation (#8678)
discard 147786895b [FIX] Fix threadpool reset by killing threads before destroying their shared queue (#8658)
discard c691cb4a0f [UnitTests] Apply correct requires_gpu() pytest marks for parametrized target (#8542)
discard 909782e773 [TENSORIR] Add `from_legacy_te_schdule` attr to TE PrimFuncs (#8641)
discard 62a6c27c17 [Bugfix][Target] Correct passing of target-queried bool/int parameters (#8660)
discard 07d4d547ac [Target] Several minor corrections to the device property query (#8651)
discard 16eff0828b [Target] Allow spaces in target attributes (#8587)
discard 641c9d8463 [Relay] Change Default "opt_level" of Sequantial from 2 to 0 (#8634)
discard 21a6fd7b05 [Target] Enable device querying for all targets. (#8602)
discard e13a9fd8df [Relay][Quantization] Extend FakeQuantizationToInteger to more ops (#8241)
discard 853d9a1784 [Fix] Fix a typo in include/tvm/ir/function.h (#8617)
discard d2f328ef88 Introduce --interface-api={c,packed} parameter (#8280)
discard 0584a3f080 [BUILD] Add caching to CMake (#8373)
discard 32f63f4e9f [CUDA] Support multiple TIR-level dynamic shared memory allocations (#8571)
discard f4c6cc5dc9 [TensorIR] Support for match_buffer from subregion (#8585)
discard 89207aff29 [TensorIR][M2a] Reduction Factoring (RFactor) (#8544)
discard 07926c25a0 [Vulkan] Rewrote PointerValueTypeRewrite transform (#8528)
discard 86e7e5f7a6 use sizevar when convert any to tir (#8555)
discard 8f695dbae0 [Vulkan] Prioritize discrete GPUs as device_id=0. (#8588)
discard 790e9d34fb [Refactor] Remove AttrStmt with storage_scope key (#8516)
discard 18c56a5a3b [CMake] Split out libinfo.cc into a separate target. (#8520)
discard 270372a414 [microTVM][Cortex-R5] Add zephyr cortex-r5 board to Zephyr (#8519)
discard 4b59636bfc [CUDA] Initial support for dynamic shared memory (#8466)
discard b5e504e099 [TensorIR][M2a] Fuse, Split (#8467)
discard 9717200beb [TIR] Bugfix for zero number arguments tir functions. (#8515)
discard 1935426816 [Refactor] Remove scope attribute from Buffer class (#8463)
discard b3c74e0213 Fix 8093, Enhance Buffer Index Simplify (#8204)
discard 81f9ffe7c4 src/runtime/module.cc (#8496)
discard e439152d93 [ARITH] fix zero iter bug in arith (#8494)
discard 2eca0d1d3a Switch from CompileEngine to TECompiler in Interpreter (#8486)
discard 1a1f3bcd27 [Bugfix] [tir] do not simplify 'Any() - Any()' to 0 (#8266)
discard ed8fc38bdf fix typo (#8484)
discard d2718caf98 [UnitTests] Minor fixes to unit tests for cudnn/vulkan targets (#8462)
discard 7d75090fe9 [Fix] Explicitly retain `__hash__` of `StringImm` (#8449)
discard c4efb4f81b [Refactor] Enforce attaching storage scope to PointerType (#8366)
discard e5ef34c763 [PROFILING] Use PAPI to collect hardware performance counters on CPU and CUDA (#7983)
discard 95bf16bb4f [MyPy] Extend type checking and annotation for TIR (#8429)
discard df174a5c5f [ROCM] Fix undefined symbols by adding library (#8446)
discard d1bac06ce6 fix wrong log of tir pass VerifyMemory (#8445)
discard cda070ad6b [Arith] Simplify MatchFusePattern in InverseAffineMap (#8427)
discard 32c8e684b8 Refactor the compile engine into a cleaner interface. (#7518)
discard 54f496f6b1 [DOCS] Add docs for Pass Instrument (#8220)
discard 4f2fd6c75a Cleanup more uses of np.bool and np.int. (#8399)
discard 92597f3b78 fix storage rewrite index remap (#8338)
discard 21cc28a91f [Arith] Inverse affine map (#8384)
discard 1e2b01f44f [microTVM] Add Nucleo stm32l4r5zi board to zephyr (#8386)
discard 9e62e60609 Add "operator" style to Model Library Format (#8072)
discard 1d3dcd83a4 [TIR][TVMScript] specialize (#8354)
discard 07a5ff6956 [Tuning] Allow multiprocessing spawn to work (on macOS llvm at least) (#8363)
discard 89bf9833b1 [Metal] Add pass for splitting kernel with huge number of args (#8313)
discard 5570284516 [FIX] Detect like cores by looking at scaling_max_freq instead of (#8370)
discard 9e390a735d [Vulkan][Unittests] Add parametrization to vulkan unit tests. (#8348)
discard bb8738ef02 [Build] Add CUDA_VERSION and GIT_COMMIT_TIME (#8372)
discard 488bd58ad0 [Topi][Unittests] Parametrized tests in `test_topi_dense.py`, split out gpu-independent implementations (#8336)
discard 2b954331da Decoupling AOT from graph memory planner (#8096)
discard 08d3cb24c7 [TIR] Tighten up invariance of CopyOnWrite in recursive stmt visitor (#8358)
discard 5ec02c48e0 [AOT] Name mangling in AOT (#8014)
discard 228338b914 [Vulkan] Added debug saving of Vulkan shaders, environment variable documentation. (#8333)
discard 9c7be47411 [Vulkan] Improved error message for extern calls passed to SPIR-V codegen. (#8332)
discard 11d82ae12c [Vulkan] Implement sync for SyncThread("warp") (#8320)
discard 54992eac1b [UnitTests] Automatic parametrization over targets, with explicit opt-out (#8010)
discard f6205c8f6c [Docs] Prevented docs/1 file from being generated. (#8029)
discard 1b6b2c9b70 Fix Intel OpenCL SDK search path for Windows (#8301)
discard bd33cfaeb9 [Vulkan][Codegen] Fixed SPIR-V scoping bug with threadIdx (#8281)
discard 381c8c144f Fix a word typo and add spaces. (#8278)
discard eb3dabb862 [Metal] Fix bad stream after interrupted tuning session (#8244)
discard 74cf78a37c [Metal] Fix run metal model when non first device is selected (#8261)
discard 0ca59cd3bb Fix compilation of tvm runtime for iOS (#8242)
discard 7f6f1dc498 Add check to only cast opaque handles to cl::BufferDescriptor at runtime. (#8256)
discard f23c924cfa Update parsed kernel sources check. (#8257)
discard 2a20127190 [Target] Allow 'true' and 'false' strings in conversions to integer (#8254)
discard 42321063c5 [BUG FIX] Add _type_has_method_sequal_reduce to Span and SourceNode (#8248)
discard 224455fcf0 Unify Python and C++ TIR lower API (#8110)
discard 6f32ca63b9 [Vulkan][Refactor] Move ownership of per-CPU-thread objects to VulkanDeviceAPI (#8196)
discard e4cb2acd3b [LLVM] Fix CodeGenLLVM::LinkParameters (#8213)
discard 069d74adfc Add metadata information to the listing of PassContext configuration listing function (#8226)
discard 33c4dd815d [RUNTIME] ShapeTuple Container (#8200)
discard 5370343d98 Expose list of PassContext configurations to the Python APIs (#8212)
discard 70dd1108c0 Add thread_warp_size for Metal device in default target attributes (#8202)
discard a8d6f69228 [RUNTIME][REFACTOR] Re-organize Containers into SubFolders (#8183)
discard fe27d76706 [Texture support][Part 0] Device API and runtime support (#7711)
discard b57a6bec4a fix py files (#8194)
discard de9430a885 [AOT] Initial implementation of --unpacked-api (#8023)
discard 08b55c9708 [CMake] Add compile-time check that libtvm_runtime.so has no undefined symbols. (#8178)
discard 598aefc4e3 [METAL] Fix the rest memory leaks in Metal runtime (#8175)
discard 8c8204d8e4 [Codegen] Use "target.build.$TARGET_KIND" for all codegen functions. (#8071)
discard de7e6494d6 Complete register op from python (#8079)
discard 4aa0c09222 [Vulkan][Refactor] Pull out vulkan initialization into VulkanInstance and VulkanDevice (#8188)
discard 4d3a9c8470 [Vulkan] Corrected typo in Vulkan capability error messages. (#8187)
discard 9cd2254f66 [Vulkan][UnitTests] Compatibility fix for test_vulkan_unique(). (#8186)
discard 68b3830ebe [Vulkan] Remove dependency on Target from -from_device functionality. (#8171)
discard 62b7b1cc9e [Vulkan][Docs] Minor updates following Vulkan target query. (#8151)
discard 81981d99a6 [CMake][Minor] Update CMake warning flags (#8152)
discard 99574de631 [Vulkan][Refactor] Split out vulkan.cc into separate distinct functionality. (#8157)
discard fcff90797f [IR][Pass][Instrument] Pass instrument framework (#7952)
discard 7a8903181d [microTVM] AOT Demo (#8075)
discard e606bcc5a5 [Codegen][CUDA] Fix make_int4x cuda codegen vectorize (#8137)
discard 62457d7d6d [Vulkan] Add device capabilities to Target, use in codegen (#8127)
discard e1701d089a [TensorIR][M2a] Structural Error Reporting (#8121)
discard a9eb1cf490 [METAL] Split kernels and compile them separately (#7980)
discard cb0da3a3b4 [TensorIR][M2a] Verification of cached flags (#8114)
discard 4c100512e3 Add a default warp size 1 for vulkan and opencl (#8109)
discard fafe6ca109 [Vulkan] Remove some interface block decoration (#8102)
discard f26b77de6a [Refactor] Rename asnumpy -> numpy in NDArray (#8083)
discard b3a1c76134 [Vulkan][Codegen] Added spvValidate check after vulkan shader generation (#8098)
discard 7eae79b4ad [AOT] Remove lookup parameter function in AOT (#7988)
discard d46889aa7c Custom dyld linker for iOS mach-o executable files (#7875)
discard 23d3c49cf2 Add flag to build static version of TVM runtime (#8059)
discard c841f354f5 [Vulkan] Broke out implicit device requirements into SPIRVSupport (#8048)
discard 807fbc3633 [IR] Add storage scope to PointerType (#8017)
discard b9fd166a2b allow module exits without del (#8063)
discard a417af9875 [METAL] Fix codegen for inf and erf (#8054)
discard 375aef93ba [TensorIR][M1c] Lower and build TensorIR (#8044)
discard 09bce03a20 [Tests] Fix requires_gpu (#8050)
discard 59dfdec978 [RUNTIME] Improve signal handling in python env. (#7919)
discard 3c8128ee5a [uTVM][AOT] Adding workspace byte alignment (#8019)
discard 853b8cfff1 Rename gpu to cuda in java/rust/typescript (#8036)
discard aa11cb1b65 Rename gpu to cuda, and bump dlpack to v0.5 (#8032)
discard d2c09f0365 [Vulkan][Codegen] Spir-V codegen, correct labels/blocks in WhileNode. (#8013)
discard d9d6f5f5c3 [RELAY] Enable registering op with python (#8002)
discard a774c0205d [DLPACK] Support the new python array api with DLPack (#7993)
discard 3011e193be [AOT] Introducing AOT in TVM (#7785)
discard 73e91bda79 [Vulkan][Runtime] Uniform buffer bugfix, minor cleanup (#7966)
discard b97c4db097 [RPC] Make tracker jupyter friendly (#7961)
discard 4f6af57d6e [TensorIR][Pass][M1c] FlattenBuffer (#7962)
discard 03d04d2b40 [Graph Executor Debugger] Fix parameter dump (#7903)
discard 40d84d483e [Codegen] Fix assertion errors in llvm backend when using llvm debug build (#7959)
discard 869a157ed8 [NVCC] Bugfix nvcc command tool that relies on the compile time env (#7964)
discard 5dc6d3cb3c Replace 0.0.0.0 with 127.0.0.1 for client connections (#7766)
discard 9aca2ac7df [OpenCL] Refactor cl_program generation (#7834)
discard a61ca2a187 [Target][Legalization]Add Tir Level Legalization Function Registration And Update Intrinsic Lowering Pass (#7936)
discard 06d14f2418 [AutoTVM] [TOPI] Support AutoTVM for int4 tensorcore (#7831)
discard 7600303134 [TIR][TRANSFORM] Return value support in tir.tvm_call_packed (#7932)
discard 25ff3a0ec7 [RUNTIME][BUGFIX] Fix DSO module problem when its parent get destructed. (#7918)
discard dd34447a9f [TensorIR][PASS] CompactBufferAllocation (#7923)
discard 0376b60795 [CodeGenC] Fix bugs when calling extern functions (#7911)
discard fef2d7252d [TIR][SPIR-V] Fix computing clz on int64 input for vulkan (#7913)
discard 8f8a543deb [Target][Lowering] Update Op Intrinsic Lowering Mechanism And Intrinsic Lowering Pass (#7809)
discard 7224440c40 Remove unnecessary bracelet around make_int (#7907)
discard 8dc9f52f2e Update ICHECK error message with link to documentation page. (#7869)
discard adb4d0d6dc [Runtime] Driver version + consistent clock speed units (#7867)
discard 132e9e4ba2 [RPC][REFACTOR] Use PopenWorker to handle RPC Server. (#7889)
discard 568f85cb71 [PROFILER] Add CSV output to profiler (#7797)
discard 6b892a319f [VTA][OpenCL] intelfocl (#6126)
discard 8db8c3ac10 [TensorIR][PASS][M1c] PlanUpdateBufferAllocationLocation (#7873)
discard 528f453ad7 [TIR] An analysis pass to calculate workspace size for primfuncs (#7859)
discard 089f61fff3 [TensorIR][M1b] Schedule class (#7847)
discard d869f25ede [METAL] Fix issue with GPU fails (#7819)
discard 3c59135727 [TensorIR][M1c] LCA detector (#7848)
discard 809b22de1a [TIR] Add a new intrinsic count leading zeros for LLVM and SPIR-V (#7825)
discard 4d42311fba [Vulkan] Support uniform buffer object for passing many scalar arguments (Take 2) (#7833)
discard 23a49d320c Fix typos in comments (#7862)
discard aee28d5bbf Misc. improvements to documentation/build setup for first-time builds. (#7840)
discard f02ef2955a [TensorIR] [Script] adding support for opaque block (#7829)
discard d414431690 [µTVM] Add support for mps2_an521 board (#7813)
discard 54f920a44b Fix Metal accuracy problem caused by <dtype>3 vectors usage (#7830)
discard 9c58cfbaf0 [BugFix] Fix the race condition issue of packed func. (#7246). (#7619)
discard 30bd78e484 Revert "[Vulkan] Support uniform buffer object for passing many scalar arguments (#7717)" (#7821)
discard e1f5fba766 [Vulkan] Support uniform buffer object for passing many scalar arguments (#7717)
discard 7f3433dda2 introduce pass lower_init_block (#7806)
discard d376c59ba2 [M1b] Scaffolding ScheduleState data structure (#7765)
discard 40614d3469 [FIX] tvm.testing.parametrize_targets documentation for arguments does not match what it is acutally using. (#7778)
discard 2273a8c7f1 [Target] Fix empty target and host for autotvm task (#7791)
discard 9e748a8a1c [Hexagon] Reenable compilation of TVM runtime for Hexagon (#7784)
discard 3a6ecce422 Fix compilation errors with clang 11 (#7783)
discard 8b7319055a [ARITH] Subspace division (#7760)
discard 472becc3c7 [CodeGen][OpenCL] Limit OpenCL built-in vector lanes to 2, 3, 4, 8, 16. (#7777)
discard ccd47a4ec4 [PYTHON][RPC] Make rpc proxy jupyter friendly via PopenWorker. (#7757)
discard f0555d8e4b [Target] Add support for target object with host field compatible with previous api (#7534)
discard 0f76da38ec Add support for using the VM across the RPC boundary. (#7746)
discard 5bd8e22f74 [ONNX] Enable GPU in ONNX importer tests (#7438)
discard e778f5d20e Rename GraphRuntime to GraphExecutor (#7653)
discard 5556bb5227 [ARITH] normalize iter affine map expr to PrimExpr (#7759)
discard 2e74846c39 Clean up uTVM demo runtime, add ONNX model test and tutorial (#7557)
discard fb0e5765d7 [Logging] Bring back the stack size optimization (#7756)
discard e7fee7f92f [ARITH] detect iter affine map with predicate (#7752)
discard 0451ab2a34 [RUNTIME][WEB] Cleanup logging for web runtime. (#7750)
discard d335c59f8d [Refactor] Rename TVMContext to Device (#7721)
discard bcad6560b6 [METAL] Fix memory leaks in Metal runtime (#7714)
discard 4e9380720c [TensorIR] add TIRTextPrinter support for Block and BlockRealize (#7716)
discard 4a740b712c [TensorIR] TVMScript Parser/Printer (#7630)
discard 172d25a6c5 [RUNTIME] Cleanup build for libbacktrace (#7706)
discard ffecfa0b32 [RUNTIME] Add libbacktrace for backtraces with line numbers (#7153)
discard a662c881fc [Runtime] Extend Graph Runtime To Support Cuda Graph Launch (#7616)
discard 518ba366f8 [SPIRV] Declare int64 capability by default (#7681)
discard 2866d138bf add nvcc support (#7668)
discard 09cdaeb856 [TOPI][GPU] Mergepath sort with odd-even block sort (#7611)
discard f332a7978f [PROFILING] Combine USE_VM_PROFILER and USE_GRAPH_RUNTIME_DEBUG into a single flag USE_PROFILER (#7637)
discard 54b05580c8 Introduce Apple BNNS backend (#7299)
discard 42b249f376 [MIPS] Fix CALL16 reloc at 0x290 not against global symbol (#7634)
discard f29bb6acf0 [TIR] Add PreOrderVisit and VisitPrimFuncs (#7627)
discard ec2ff77d3c [CUDA][TOPI] Fix CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES with NMS for certain GPUs (#7623)
discard ff699ae919 Introduce Model Library Format export format (#7533)
discard 7da56a976e [SPIR-V] Fix pushconstants offset calculation for 32 bit values (#7620)
discard 648dfa665d Allow cuDNN in non-CUDA non-system dir (#7608)
discard 70a3a2b3e7 Prevent host Vulkan SDK blocking cross-compilation (#7609)
discard a771fc77e9 Added MaybeAlign to CreateAtomicRMW calls to fix build for LLVM13 (#7617)
discard c4e78be781 [RUNTIME] Unify load params interface (#7559)
discard 70f92985f4 [CUDA] BF16 support (#7014)
discard 8211fc13b6 [RUNTIME] Add device specific timers (#7472)
discard 63589ece0e [Vulkan] Support passing 64 bit scalar (#7572)
discard d6e94c9d35 [SPIRV] Support Bool buffer argument (#7591)
discard 70ad9aa706 Fixes for using Python APIs from Rust. (#7085)
discard 889c397b61 [RUNTIME] Move Map into runtime (#7570)
discard 5daaca71cd [SPIR-V] Add SPIR-V lowering for While node (#7574)
discard 0bc1b0417e [TIR] Add TIR While node (#7425)
discard 88bff5ad46 [Pass] Profiling TVM compiler passes (#7500)
discard be5a480e9c [Codegen][CUDA] Fix: cuda codegen vectorize cast (#7561)
discard e564758999 [TensorIR] introduce Block and BlockRealize (#312) (#7553)
discard 643fecaaca [Runtime] Special Memory Scope Support (#7488)
discard de1707f5ad [CI] Move ci-cpu to use llvm-11 (#7541)
discard 7352b12c33 Many fixes to get unit tests passing on Windows. (#7431)
discard f07f3e6eed [PYTHON] Enable proper error message in python package (#7521)
discard 8ab9a8e4bd [DOCS] Remove incubating from docs (#7525)
discard 27f4e48553 [CRT] Create C-runtime-style metadata module for llvm builds (#7398)
discard b0b44674b2 [Target] Add target host field for target specification (#7462)
discard e59bbf691b Fixed minor misspelling (#7499)
discard f661571a95 [TIR] Specialize MutateArray in StmtFunctor. (#7486)
discard 418fff935f [RUNTIME] Fast path for single thread run to allow app level threading (#7454)
discard 121ed876c0 [ROCM] Add Thrust support (#7458)
discard 7f29b66912 update stm32mp1 arm_cpu target configuration (#7443)
discard 189e608d5f Make the TVM targets list available in Python (#7427)
discard 2027e1bb6d [Arith] Fix iter_affine_map with non-const extent (#7437)
discard 14e7818913 [FIX,CMAKE] Only set Clang flags for C++ files (#7424)
discard 1d764156bd [FIX,CMAKE] Only compile runtime files once (#7417)
discard 9d724d8b0e Add cuda tags and unit test (#7410)
discard 38821a5b29 [FFI] Improve error messages when array/map types do not match in function calls (#7330)
discard 2940d9ccd4 Fix missing round(), floor(), ceil() for target C lowering (#7382)
discard 3fb05f779c Improve op_type missing message (#7384)
discard c061d249a4 Update uTVM code to work with the nRF5340DK dev board. (#7331)
discard 26ee9d3c68 [FIX] Don't add $TVM_HOME/.. to the include path when compiling code. (#7342)
discard 0e079e5109 [CMake] use wrong flag name (#7341)
discard f3a5f0009c [TOPI] Rewrite GPU argwhere using exclusive scan (#7314)
discard 9498693bac [TFLite] Strided slice handling of shrink_axis_mask improved (#6998)
discard 95657e0b39 [TIR][REFACTOR] ForNode introduce thread binding and remove legacy field (#7306)
discard ea7751abea [TIR] Support Return in TIR (#7084)
discard e9318ab3e4 fix mcpu on os x (#7276)
discard f97179f23f Change the all #pragma once to ifdef include guard (#7264)
discard d5700e9355 [Arith] Simplify cast (#7045)
discard d8b68f1c45 [TIR][REFACTOR] Enforce allocate to use the correct var pointer hint. (#7216)
discard f1cd3258f1 [FIX] Fix using num_workers in omp (#7078)
discard b2a2b953c8 [AutoScheduler] Fix the conflict of thread pool in measurement (#7166)
discard 4a65016d40 [AutoScheduler] Add layout rewrite support for dense and batch matmul on CPU (#7161)
discard 65c5c9313e Created CSourceMetaData module for model metadata (#7002)
discard 26b59ea275 Fix a few OpNode argument field descriptions when registered (#7140)
discard df86ee470e [CONTRIB] PopenPoolExecutor (#6959)
discard 9ba7288261 [metal] Remove support of `double` type (#7118)
discard 37e196e98b [metal] update language version (#7116)
discard 47ac8f7961 [metal] support int64 (#7105)
discard 50f241eea7 Rollback changes to SSA begin/end scope for Store in (#7073)
discard 2f4bb29460 [Relay][Strategy] Allow cuda cross compilation without physical device. (#7063)
discard e14bbee5d5 [FIX] Remove debugging print statement (#7072)
discard 95951c3e21 [FIX] Improve error messages and docs (#7064)
discard d8f021f45e fix nvcc compile option to be compatible with older cuda (#7065)
discard 68f3ade292 [TOPI] GPU scatter 1D via sorting based approach (#7056)
discard 6f68d5f5ed [LLVM] Support atomic for GPU backend (NVPTX, ROCm) (#7051)
discard 15820f9586 [TVMSCRIPT] Attach span information to tir nodes in tvmscript (#6910)
discard 775edc18ec Add version 11.1 in finding CUDA libdevice (#7033)
discard d67b5c34c4 [Diagnostics] Add environment variable for controlling top-level printing and fix issue with pretty printing/parsing roundtrip. (#6874)
discard 11d063080c [AutoScheduler] Support layout rewrite for whole networks (#6987)
discard 94e5ae45a5 [Hardware][Verilator] Integrating and simulating hardware accelerators in TVM (#6971)
discard b4c15b1f53 Add Relay option to link parameters into runtime Modules (#6917)
discard 705f559d43 Fix #6954 uTVM, fix when building the runtime for native hardware (#6957)
discard e56e2beb3b Fix code to work with cmake 3.2 (#6952)
discard 7e19b5d591 [DOC] Fix typo (#6920)
discard 4064d0b8a0 Consolidate RPC Context helper functions (#6915)
discard bff971eea1 Fix edge cases in const_int_bound and fold_scale_axis (#6911)
discard fde3ad61a2 [TIR] Add spans to all ExprNodes (#6860)
discard b2683847d1 Fix bug of generate-unmatched-brackets in CodeGenC::PrintSSAAssign (#6887)
discard 7a1b1c320a [GCC] Fix GCC8.1 and GCC8.2 template dispatch compilation issue (#6893)
discard 8670771681 Do not show meta-data when printing IRModule (#6881)
discard 5da8388d92 Update search for bitcode files for rocm 3.9 (#6865)
discard bd3d8d1a3c [BYOC][CONTRIB] Vitis-AI codegen integration (#6343)
discard d3b820b21e [Bugfix][Module] Fix recursive GetFunction in runtime::Module (#6859)
discard 180e82000f [Rust][IRModule] Flesh out IRModule methods (#6741)
discard 6ad5540972 [µTVM] Add virtual machine, test zephyr runtime on real hardware (#6703)
discard cfe6624781 [Rust][Diagnostics] Add initial boilerplate for Rust diagnostic interface. (#6656)
discard 08ad283af3 [OBJECT] Update types slots for baseexpr and primexpr (#6814)
discard 1dab6984cd [CI] Add m6g instance (ARM64) to mainline CI (#6804)
discard f1ff590604 [µTVM] Add serial transport, parameterize µTVM Zephyr test, run on physical HW (#6789)
discard 5a044f0f76 [FIX,AUTOSCHEDULER] Fix auto_scheduler to run with multiprocessing's spawn start method (#6671)
discard 3a4e45c597 [QNN] Optimize requantize for power of 2 and fix dequantize for per-channel quantized input (#6675)
discard 0a0ad6bfd0 fix a bug in convertSSA. (#6785)
discard e56b55601d [REFACTOR] Remainings of util => utils (#6778)
discard 4fd41d4534 [ARITH] Tight bound for floormod (#6771)
discard 8ea2f75b3b [LLVM] Add target feature string to function attributes (#6763)
discard bd8245536b More CHECK to ICHECK (#6758)
discard 825939cd91 [ARITH] iter_affine_map bug fix, stride generalize (#6753)
discard 16c4b2415f [CI] Introduce all platform test for windows/mac/linux. (#6756)
discard f491dbf104 Update include and src dir CHECK* to ICHECK* (#6745)
discard 184f2f54ef [LLVM] Avoid warnings when compiling getNumElements with LLVM12+ (#6738)
discard eac2970aeb [LLVM] Create fixed vector size according to latest LLVM12+ changes (#6717)
discard 2cf13b213c [FIX,CMAKE] Use set_property with append flag instead of (#6725)
discard 108c009cef [TVMScript] refactor (#6734)
discard 131e5f6e9a [BYOC][TensorRT] TensorRT BYOC integration (#6395)
discard 62fa64c8b3 Fix the Type bug in ConvertSSA. (#6709)
discard 7adb087756 [CI] Update docker to latest (#6708)
discard 0a45a5f570 [PYTHON][WINDOWS] More robust dll loading behavior after python3.8 (#6707)
discard ba0553d441 [LLVM][WINDOWS] Recover windows support for the latest LLVM (#6698)
discard 2628f0252b [FIX,MICROTVM] Skip microtvm tests if microtvm is not built (#6693)
discard 7310fae494 [REFACTOR] util => utils for consistency in the project. (#6684)
discard a7bdaeb0d2 [ARITH] Introduce iterator (quasi)affine map detection. (#6667)
discard 077fef78f0 don't validate AttrInitEntry until a value has attempted to be set (#6672)
discard 1b1c0e9558 [CI] Move to use main as the default (#6665)
discard d07dc8643c Faster sparse_dense on GPUs (#6580)
discard 1a910ea970 [Diagnostics][Relay][InferType] Refactor InferType to work on whole module, and use new diagnostics. (#6274)
discard d26f962be1 [µTVM] Avoid use of builtin math functions (#6630)
discard cb2b84a6b4 [Rust] Improve NDArray, GraphRt, and Relay bindings (#6563)
discard b804156c16 [VERSION] Version for v0.8 cycle (#6615)
discard f52e45d4a6 Updated runtime to run under FreeBSD. (#6600)
discard 62df82724a [RELEASE] Bump version to 0.7.0 (#6614)
discard aad85170c6 [Parser] Fix parsing op string attributes (#6605)
discard 7c5bf8ac2b dynamic conv2d for cuda (#6598)
discard 3d9a7e6faf [RUNTIME] NDArray CopyFrom/To Bytes always synchronize (#6586)
discard b1c9681f10 [BYODT] fix CMAKE flag name + update documentation (#6567)
discard 9c9d241a86 Bring Your Own Datatypes (#5812)
discard 5315a9b029 Rename tvm.hybrid.script to tvm.script. (#6522)
discard 340558fd75 Make CMakefile/config.cmake/install_tvm consistent (#6562)
discard 72beba638a Add proper cmake PATHS when multiple NAMES. (#6558)
discard 6e8f0f7654 [TIR] Fix rewrite_simplify tir::builtin::shift_left (#6555)
discard 8579a294a6 Generalize the use of booleans to support all cmake boolean values. (#6515)
discard 75286e3453 Add alternate cublaslt library name. CUDA 11.0 uses cublasLt. (#6541)
discard 896e64648f Add the SYSTEM keyword to all cmake include_directories commands for 3rd party or external headers. Warning flags should only be applied to code within the tvm repository. (#6531)
discard a96afba97b fix libtvm build dependencies when USE_MICRO is ON. (#6524)
discard 78ca92c0e9 Enable more warnings when compiling with clang 10.0 or greater (#6456)
discard 920b8c6cbb [LINT] Use fmt off to disable problematic black fmt (#6519)
discard eae5ccfaaf Add beagleboard ai, thunderx and stm32mp1 to the arm_cpu target. (#6501)
discard 1a53cfb60a Switch CRC-CCITT libraries (#6499)
discard e515125eab extending FindVulkan to build RPC server on Windows correctly (#6498)
discard efe0f17cae black format master (#6494)
discard f0f346ac97 [PY] GraphRuntime: Update the tutorials to the module-based interface (#6482)
discard 0aa55c11fd [FIX] Save tensor size with alignment (#6487)
discard f467470992 µTVM RPC server and Part 1 of AutoTVM compilation infrastructure (#6334)
discard 6788660db6 [RFC][Formatting] Add scripts for applying Black to the Python code. (#6437)
discard cb81e0eb93 [CMAKE] Improve FindLLVM to handle llvm-prefix with space. (#6466)
discard e438eb7abe [WINDOWS][MSVC] Fix MSVC warnings (#6450)
discard 8e65e63891 [TEST] Fix Some Failed Test Cases and Tutorials of The Issue #6453 (#6454)
discard fe02080265 [Format] Convert all Python code w/o CI (#6448)
discard 737d3b36d3 ROCm: use GcnArch for mcpu and ApiVersion to select code object version (#6447)
discard d47b427609 CUDA: broaden path detection (#6444)
discard fa1a362c53 [Target] Tags, Composite Target, Unified Interface (#6369)
discard 60af8cad8d [METAL] set MTLBuffer purgeable state (#6376) (#6438)
discard d76ae73f7c [TESTING] Fix the error when running tests with default targets (#6394)
discard 5a73295918 Remove unintentional pytest dependency. Fix #6398 (#6399)
discard 41c206b264 [METAL] Use CFBridgeRetain for retaining the allocated resource (#6393)
discard 7af3d709b4 [RELAY][VM] Enable heterogeneous execution for Relay VM (#6337)
discard c0cfe05e95 [TESTS] Refactor tests to run on either the GPU or CPU. (#6331)
discard 4104ea7a31 [Relay] support i64 indices (#6143)
discard 93c3831269 [TIR][Transform]Block scope hoisting added (#6238)
discard b74a5d8b8c [Target][Codegen] Use target class in all codegens (#6347)
discard 45c18daf72 [CMAKE] Compatible for ROCm before 3.7 (#6359)
discard eb5c94ae93 Add `init` member to ReduceNode (#6138)
discard b5e83bffc9 ROCm changed name of library and removed old one in ROCm 3.7 release. (#6345)
discard b12d10d840 [MSVC] Make able to compile with MSVC (#6341)
discard c9c85b61d1 [Relay] Make check stricter: disallow inserting function with free vars into module. (#6313)
discard 2e0729a13c [TIR] Enforce buffer pointer var type to be consistent with dtype. (#6317)
discard 831d232316 [Target] Add python binding to new JSON target construction. (#6315)
discard 9ebdd5ff69 [BYOC][ETHOSN] Introduce the Ethos-N BYOC integration (#6222)
discard 352d1a7eaf [Hexagon] Initial support for Hexagon codegen (#6261)
discard 81034f27b3 Add tvm::support::hexdump() debug utility (#6154)
discard b78fe28a23 [Autodiff] Optimize and eliminate the Jacobian tensor for te.autodiff (#6078)
discard 856db45c28 [RUNTIME][REFACTOR] Use new to avoid exit-time de-allocation order problem in DeviceAPI (#6292)
discard 2857a5de93 [TOPI] Support int4/int8 conv2d tensor core with HWNC layout (#6121)
discard b9dfc7ea11 [Build] Add cmake options into libinfo (#6286)
discard f9bf0deb7a [Build] Reflect Compile-Time CMake Options into libtvm.so (#6280)
discard 4d8ac78df3 Improve error messages for memory verifier and gpu memory verifier (#6281)
discard 5d23d260a5 [Target] Creating Target from JSON-like Configuration (#6218)
discard 0814ccba54 [TESTS] Decrease test times by introducing testing model (#6235)
discard d47fcea37d fix cuda half math function is undefined: hpow, htanh (#6253)
discard a270d91672 Revert "fix cuda half math function is undefined: hpow, htanh (#6225)" (#6249)
discard 360482efce [Parser] Parser 2.0 part 2 (#6162)
discard 62a25cee22 Fix division range estimation error in simplifier (#6244)
discard a17b39f31f [RPC] Update build support for cross compiling apps/cpp_rpc with OpenCL (#6229)
discard ca0f84c68b [Topi,x86] Split MKL from BLAS. (#6182)
discard 0861511a24 fix cuda half math function is undefined: hpow, htanh (#6225)
discard ec3420b2f8 [TIR][Hybrid] Hybrid Script Support for TIR (#6227)
discard 7b3808eeeb [uTVM] fix crt building and running error (#6231)
discard 738cdb1885 [µTVM] Add --runtime=c, remove micro_dev target, enable LLVM backend (#6145)
discard 4c55822e20 Pass mfloat-abi to LLVMModule::Init (#6150)
discard 42c00aaa99 [Target] 64-bit RPi4b target (#6211)
discard e353c74fb9 Fix compile warnings. (#6204)
discard dda2996345 [Target] Rename target_id => target_kind (#6199)
discard 84a3588406 [TIR][Transform] HoistIfThenElse added (#6066)
discard c364e3486c [Fix] avoid unexpected throw in AttrInitEntry (#6128)
discard 09be51e55c [BUILD] Remove libtopi from the build (#6189)
discard a709ddd3cf [REFACTOR] topi -> tvm/topi (#6186)
discard d5ad375f08 [BYOC] Retire the example json runtime (#6177)
discard bc78f7d745 [TIR][Bugfix] Improved massive build times caused by tir.floormod and tir.floordiv. Fixed Topi testcase. (#5666)
discard 125f073cf3 add attr option mfloat-abi for arm32 (#6123)
discard a67b6b1aab [BYOC][Contrib] Arm Compute Library integration (#5915)
discard ef7fa11cc4 [Cmake] Add default value for option USE_DNNL_CODEGEN in the cmake (#6099)
discard 13e9dc40bc [DSL/TE] Scalar support for `te.extern` (#6079)
discard f9f91e2232 Fixed point multiplication improvements for AArch64 (#5980)
discard cea000c3ed [ARITH] Improve vector simplification for float operands (#6043)
discard 622cd0a654 Fix error message in Buffer::vstore, NFC (#6056)
discard 87c91359ac [clflush] Enable x86 cpu cache flush (#5914)
discard 52919bdef0 [TARGET] ONNX codegen (#5052)
discard bed5dd1538 [Ansor][AutoTVM v2.0] Part 1: Rename namspace form auto_schedule to auto_scheduler (#6059)
discard 1dc812109b [RUNTIME] Support module based interface runtime (#5753)
discard c6ba8a3e7b [Ansor][AutoTVM v2.0] Part 0: Ansor minimum system for auto schedule generating (#5962)
discard 3abc4c1fdd [IR] Fix a primitive check error (#5991)
discard 35c73eb902 [LLVM] Create TBAA information based on the unrelying buffer type (#6046)
discard 2a903cc1e9 [CODEGEN] Fix code generation bugs for C/CUDA & Improve VerifyGPUCode pass (#6041)
discard 7666dcd4de µTVM CRT modifications for on-device RPC server (#5921)
discard 1e9ff8e8a5 [LLVM/CPU] Terminate basic block after "ret" instruction (#6036)
discard 70cf477e6d [TARGET] each option of target str should only contain one '=' (#5988)
discard d096a7d2a0 [Frontend][Relay] Add Parser 2.0 (#5932)
discard 09cfed427f [LLVM] Auto-convert shuffle with single index to "extract element" (#6006)
discard 806bbb70bd Undefuned names: import os for line 324 & import re for line 308 (#6003)
discard b15c0b3714 [Arith] Inequalities solver (#5618)
discard daf9fbf80e [Target] Use TargetNode::attrs for Target serialization (#5993)
discard 53a29f5226 [LLVM] VectorType::get with two parameters is deprecated in LLVM 11+ (#5984)
discard 9fd77dfa35 [Target] Migrate data structure of TargetNode (#5960)
discard 44a3129975 [LLVM] Remove redundant function CreateBufferVecPtr (#5982)
discard ef114370cb [OpenCL] Fix OpenCL get_valid_counts errors due to intrinsic atomic_add (#5857)
discard ba61a94d0c [TIR][ANALYSIS] Refine side effect analysis. (#5954)
discard 2db0aed5ad [BUGFIX] Add cuda 11 to contrib.nvcc.find_libdevice_path() (#5902)
discard 41cc341c08 [REFACTOR][TIR][API-Change] Range/IntSet API style consistency. (#5953)
discard 606353c810 [TIR] Improve Let/LetStmt support. (#5949)
discard f78aca2039 Update date in the NOTICE (#5942)
discard 83500ec81e [TIR][OP][API-CHANGE] Remove CallNode.call_type in favor of attribute. (#5937)
discard 36fa4c6a21 [Arith][GPU]Rewrite simplify fix for Vectorized Cooperative Fetching (#5924)
discard 12182b5d4d [BACKPORT-0.6][Bugfix][Arith] keep div_mode during floordiv simplify (#5922)
discard 0d75b0193a Two small fixes to AMDCPU codegen for LLVM 10+ and ROCm 3.5+ (#5920)
discard 941d75a240 CUDA device API & VerifyGPUCode pass update (#5898)
discard 3b7c7c2fce [Thread Backend]Fix CPU Thread Binding for Multiple Sockets (#5918)
discard 61cbef8825 [TIR][REFACTOR] Deprecate FreeStmt (#5890)
discard 52b5e5c660 Allow implicit conversion in TVM FFI to tvm::Bool (#5907)
discard ac9b2aee36 Add Binary Intrinsic ops to TIR Ops in C++ (#5900)
discard 5ddaa2a673 Fix the python intrin rule (#5895)
discard 9031d1fb96 [Relay]Allow every runtime module to handle constants (#5885)
discard ca7699b244 remove fatal (#5888)
discard f548f26104 [TIR][REFACTOR][API-CHANGE] Change Call.name to Call.op(RelayExpr) (#5863)
discard 827e08d346 [Bugfix][Build] Fix building with LLVM-10 on macOS (#5859)
discard 5b7e4c5fed [Target] Introduce Target Id Registry (#5838)
discard f1c969617e Fix map assign issue in CI test (#5854)
discard c3a74d39d8 [DataType] Add bfloat16 (#5601)
discard 81e1367f8a [Object] Introduce POD-C Compliant tvm::Map (#5740)
discard fdebe1b4e2 [FIX] Recover global state after test_util.py (#5824)
discard 9a8fa1cbf2 Additional canonicalization added for AddNode (#5846)
discard 9199d3d895 [RUNTIME] Introduce MetadataModule to separate code compilation/interpretation and weight initialization (#5770)
discard 19396327fe [RUNTIME][String] Overload string operators (#5806)
discard 18492237f7 Error msg update (#5818)
discard 156e84a5b2 [TIR][REFACTOR] Add tir prefix to type keys (#5802)
discard a3d832759e [TIR][REFACTIR] Update TIR nodes std::string->String. (#5793)
discard 1c9bd31c54 [TIR][REFACTOR] Cleanup unused classes (#5789)
discard a902973018 [cmake] update vulkan rules (#5777)
discard cacf466888 [CODEGEN][CONTRIB] CoreML codegen (#5634)
discard e2388a8c87 [REFACTOR][API-Change] Migrate all Object construction to constructor. (#5784)
discard eb17fb0897 [RUNTIME] Add compile_shared option to linux compile utility fn (#5751)
discard 121f5b77c5 [TIR][REFACTOR][API-Change] Migrate tir/stmt.h to use constructor. (#5778)
discard 40d02fd1a8 [TIR][REFACTOR][API-Change] Migrate the tvm/tir/expr.h to construct style. (#5773)
discard 721bc930a0 [Rust] Second stage of Rust Refactor (#5527)
discard 08c9300e71 [REFACTOR][TIR] Provide->ProducerStore, Realize->ProducerRealize. (#5750)
discard feeec1dfde [ARITH][BACKPORT-0.6] fix a min/max simplify bug (#5749)
discard c73ace7b7c [REFACTOR][TE][TIR] Call::Halide => ProducerLoad, DSL/TIR decouple. (#5743)
discard 635e90e1ac [REFACTOR][ARITH] Remove legacy compute_expr.h (#5738)
discard 29f29d7b42 ROCm: Add warp shuffles and enable reductions (#5727)
discard b60e65a6c4 [REFACTOR] Separate ArgTypeCode from DLDataTypeCode (#5730)
discard 044be816dd codegen llvm: move nvptx-specific intrinsic handling into codegen_nvptx (#5726)
discard a1a96c6961 Fix runtime::String backward compatibility in JSON (#5725)
discard bca0b1eb50 Fix generating types like float44 and float88 (#5722)
discard 95beb2ded6 [Object] Restore the StrMap behavior in JSON/SHash/SEqual (#5719)
discard d9634cae13 [Object][FFI] Introduce runtime::String::CanConvertFrom (#5718)
discard 67464de391 [Object] Unify StrMapNode and MapNode (#5687)
discard bba08772b8 Remove deprecated opengl files (#5711)
discard e07e795410 [REFACTOR][PY] relay.op.Op -> tvm.ir.Op (#5705)
discard 317d7318fb [Arith] ExtendedEuclidean merge impl to int_operator (#5625)
discard a6d8b4115c [REFACTOR][RELAY] Replace build_config with PassContext (#5698)
discard 4459fc6265 [REFACTOR][RELAY] move fallback_device to config (#5690)
discard ae9143b3af [TIR][REFACTOR] std::string -> String Migration in TIR nodes (#5596)
discard 024f625196 [Bugfix] Fix Python debugger segfaults with TVM built with LLVM (#5685)
discard 3dbeaf040f Call previous excepthook in tvm_excepthook. (#5675)
discard 14545fac76 [REFACTOR][TIR][API-Change] Migrate BuildConfig to PassContext. (#5668)
discard 3a95dd8858 [Relay][Op]Support symbolic TopK, Ones, Zeros and Full (#5459)
discard 0abcfe557f [TOPI] Improve CUDA softmax scheduling (#5600)
discard 18dbacecb8 handle likely in IRMutatorWithAnalyzer (#5665)
discard d68c1da3c2 [TIR][BUILD] Remove buffer params from pass config. (#5652)
discard 784cf244db [REFACTOR][IR] Migrate IRModule ObjectRef to not-null (#5654)
discard 70188b2f3b [Runtime] Introduce runtime::Array (#5585)
discard 894330d0c8 [NODE][PASS] Introduce config to PassContext. (#5631)
discard 5e38d73066 Fix three typos (#5620)
discard 50e1e62ef5 [Relay][Refactor][std::string --> String] Relay updated with String (#5578)
discard fdf81c22fd Fix a typo. (#5611)
discard bc6cf8726a [CUDA] Fix codegen for warp shuffle intrinsics (#5606)
discard 9e161a64da [REFACTOR][IR] Streamline ir/op Registry (#5609)
discard 03277c92a4 Add debug mode to tempdir() (#5581)
discard 8027819d59 [LLVM] Represent alignment information in LLVM IR (#5598)
discard 1317665b18 [Reduction] Fix cross thread redunction (#5551)
discard 63f99f6a92 [Relay][VM] Memory planner (part 1) (#5144)
discard 397b18ef0f [TFLite Runtime] Fix bug and re-enable RPC execution test (#5436)
discard bd13627c8b [Hexagon] One more fix for concurrency count (#5589)
discard d3355efe26 [LINT] Enable clang-format. (#5572)
discard 0573707490 [TARGET] Phase out WebGL (#5570)
discard f6c53ba041 [Refactor][std::string --> String] IR is updated with String (#5547)
discard 740edd271d [LINT] clang-format the h,cc,m files. (#5557)
discard d4083b437b [RUNTIME] Hexagon driver for offloading kernels to simulator (#5492)
discard 963e900fce [WEB] WebGPU support (#5545)
discard 95e4437291 [Optimization] Warp level reduction support for CUDA (#5498)
discard da42cfebe4 [TIR][Printer] text format printer considering future parsing use (#5483)
discard 874af4377e [Refactor][std::string --> String] IRModule is updated with String (#5523)
discard 8284b9cbaa [WEB][RUNTIME] TVM WebAssembly JS Runtime (#5506)
discard adb62b2a2c Cache PrimExpr instead of raw pointers in bound analyzer (#5533)
discard 031e6bd2a9 [RUNTIME] Improve PackedFunc robustness (#5517)
discard 557f1a8dc4 [REFACTOR][RPC][PROCOTOL-CHANGE] Modularize the RPC infra (#5484)
discard cab72d7241 Fix Canonical Simplifier (#5505)
discard 4fd4ad9b9b Link necessary libraries when building runtime for Android (#5496)
discard 75231658e3 Make "none" DataType explicit (#5491)
discard 557f947209 [IR] Initial stab at std::string->String upgrade (#5438)
discard 1cba010db9 [RUNTIME][uTVM] AutoTVM + uTVM for Cortex-M7 (#5417)
discard 084654a19a [intrin] a few more math functions (#5468)
discard 26e99eda51 [CODEGEN][CUDA] Fix a bug when vectorized load&store was involved for… (#5428)
discard f5d01252cf Improve IntervalSet's floormod (#5367)
discard 88d0d3277e [CodeGen] Cleanup generated code (#5424)
discard ec011e318f [RELAY][PYTORCH]cosh,sinh,log2,log10,log1p op support (#5395)
discard e83dcc59ab [RUNTIME][OBJECT] Introduce static slots for common objects. (#5423)
discard 3b7da14b5f misc fixes for ROCm (pointer lifetime, runtime::String refactor) (#5431)
discard 5a00ae1aee [PY][FFI] Introduce PyNativeObject, enable runtime.String to subclass str (#5426)
discard 7847a0369b [RUNTIME][CONTRIB] CoreML Runtime (#5283)
discard 3ce44c6635 [TIR][REFACTOR] Remove ir_pass in favor of analysis/transform. (#5415)
discard 74d80b62ee Don't remove() TempDirectory in __del__ after atexit hook runs. (#5414)
discard 52e8f29dc6 [LLVM] Replace calls to Type::getVectorNumElements (#5398)
discard 5cfe61ed6f [TIR] Enhance Substitute, python bindings for Substitute/PostOrderVisit/IRTransform. (#5400)
discard e93f6e018c [LLVM] Use ArrayRef<int> in calls to CreateShuffleVector (#5399)
discard cc4a888065 [PTYTHON] Migrate VTA TIR passes to the new pass manager. (#5397)
discard 503910f9e2 Fix test_ir_type. (#5390)
discard 222d014775 [ARITH] Remove legacy const pattern functions (#5387)
discard ddc335ea2d [ARITH] Remove the legacy Simplify, migrate to Analyzer. (#5385)
discard 696f75f3cc [TIR][REFACTOR] Remove te::Tensor dependencies from TIR passes. (#5372)
discard 0f2b26e67a [TIR][REFACTOR] Migrate low-level passes in tvm.lower to the Unified IR pass manager. (#5364)
discard 6d5831761f [TIR] Make lower_warp_memory support extent(threadIdx.x) < warp_size (#5307)
discard 81e12ff5b8 [Hexagon] Add hexagon_posix.cc to TVM/RT sources in the right place (#5346)
discard af444c60a5 [TIR] Remove ProducerConsumer and AllocateNode::new_expr (#5333)
discard d49bbfcf0f [PYTHON] Enhance with_attr API, cleanup MakeAPILegacy in testcases (#5335)
discard 603c07b58e Windows Support for cpp_rpc (#4857)
discard 3042df08af [LLVM] Use llvm::FunctionCallee in IRBuilder::CreateCall with LLVM 11+ (#5338)
discard b24aa42645 [RELAY] Remove re-exports of tvm.transform (#5337)
discard 0874024725 [TIR] Refactor MakePackedAPI to target dependent stage. (#5326)
discard 1e8a880c0d [CODEGEN][CUDA] Fix vector load (#5226)
discard 61cdf37bba [RUNTIME][IR] Allow non-nullable ObjectRef, introduce Optional<T>. (#5314)
discard 946de13a42 [Intrinsic] Add log1p, ldexp, atan2, hypot, nextafter, copysign (#5312)
discard bc2cc1a5e5 Remove PrimExpr from String (#5311)
discard 420c0397c4 [IR][TRANSFORM] Enable CopyOnWrite for passes. (#5309)
discard 3b78441c7d [LLVM] Fix generation of LLVM intrinsics (#5282)
discard 1e4c14f44c [RUNTIME] Introduce RValue reference(move) support to TypedPackedFunc (#5271)
discard bed470b2cb [CI] Fix the hexagon string (#5304)
discard cf790fd114 [Arith] linear system and equation solver (#5171)
discard f21c614150 [REFACTOR][IR] Move to runtime::String (#5276)
discard 4484e9cd52 [NDArray] Set shape_ in NDArray::FromDLPack (#5301)
discard 93a893d387 [RUNTIME] Initial implementation of Hexagon runtime support (#5252)
discard 2204ce376b [NODE] General serialzation of leaf objects into bytes. (#5299)
discard b173a8f9c4 [RUNTIME] Implement TVMDSOOp(TensorFlow custom op) for TVM runtime (#4459)
discard 00a6552f9f [LLVM] Do not use x86_vcvtph2ps_256 intrinsic with LLVM 11+ (#5267)
discard b9c5f83c94 [LLVM] Use llvm::ElementCount with LLVM 11+ when creating vectors (#5265)
discard f81d4fa766 [LLVM] Use llvm::Align with LLVM 11+ to avoid warnings (#5264)
discard 087883ec00 [TIR] Fix perf regression of tir refactor (#5258)
discard 3b54a04596 [REFACTOR][TIR] Migrate all low-level passes to the Pass Manager. (#5233)
discard 4cfd75006c [TE] Support mixing normal and cross-thread reduction (#5193)
discard 39236fd4ae [REFACTOR][TIR] Migrate most of low-level build to use the Pass Manager. (#5225)
discard eb984b5d0e [PYTHON] Make IntImm more like an integer (#5232)
discard fb82dae43f [CodeGen][CUDA] Fix bugs (#5209)
discard 21aade06c5 [REFACTOR] tvm.hybrid -> te.hybrid (#5223)
discard 41babb5842 [REFACTOR][TIR] Migrate low-level pass functions to Pass Manager, (#5213)
discard 6b3d358c16 [TIR] Introduce BufferLoad/Store (#5205)
discard 228a35f236 [TIR][PASS] dtype rewrite for indexing variables (#5092)
discard f022283528 [REFACTOR][TIR] Introduce ExprDeepEqual, Remove IRDeepCompare (#5206)
discard 3610e53e02 [REFACTOR][TIR] Migrate Low-level Passes to Pass Manager (#5198)
discard fc516a0d5b remove AttrsEqual and AttrsHash related code (#5169)
discard 689cbc7109 [REFACTOR][IR] alpha_equal to structural_equal (#5161)
discard 4637eafe01 [NODE][IR] Introduce StructuralHash for the Unified IR. (#5160)
discard b0b1911a30 [NODE][IR] Introduce StructuralEqual Infra for the unified IR. (#5154)
discard e40879654d Handle empty LLVMModule in GetFunction (#5146)
discard 8d0678b5aa [REFACTOR][TIR] Introduce PrimFuncPass. (#5139)
discard 75051722f8 [Relay] GradientCell Relay Pass (#5039)
discard fa893f8ba0 [Bugfix] Fixed bug where shifting by out-of-bounds value results in no compute code being emitted. (#5115)
discard b35dc1f7c3 [Relay, Topi, TF Frontend] Isfinite operator (#4981)
discard bc241a559a [CodeGen][CUDA] Vectorization for intrinsics (#5101)
discard 5a70da7cb7 [TOPI][OP] Use Thrust sort for argsort and topk (#5097)
discard 937475962c [TIR][TARGET] Refactor Target codegen to use IRModule and PrimFunc. (#5107)
discard 9cf769f4a1 [CODEGEN][OPENCL] Explicitly cast min/max operands (#5090)
discard 70e44cd2c7 Return empty CSourceModule when no lowered_funcs exists in Relay mod (#4847)
discard 2541663674 [IR] Update the type_keys to reflect the code-org (#5074)
discard caca2df1fd [TESTS] Triage the testcases to fit the the new namespaces (#5071)
discard 77efceafa5 [TIR] Introduce tir::PrimFunc (#5070)
discard b3898ac65f [Bugfix][IR][ATTRS] Fix AttrEqual for Array and StrMap, double (#5054)
discard 142943fdb3 [C++] Require c++14 by default (#5056)
discard db8ee4c8d4 Fixed div by zero core dump. Fixed rounding intrinsics on int crash (#5026)
discard 20fb3cb653 [REFACTOR] Streamline Function Attr interface. (#5045)
discard 68b26ffae4 [refactor][relay pass] Separate analysis and transform passes (#5035)
discard dcab6e4230 [Intrin] Adding a few missing math intrin (#5011)
discard 696a4e7134 [CodeGen][CUDA] Enhance CUDA codegen for SelectNode (#4983)
discard 501e663caf [topi][relay] new PR to re-add tan to TVM (#5025)
discard 06021ceacd Revert "[topi][relay] add operation tan to TVM (#4938)" (#5017)
discard 572914da2b Implemented kDLCPUPinned (cudaMallocHost) (#4985)
discard 1eaa35203f Revive the Rust + SGX refactor (#4976)
discard 5ff9682407 typo (#5008)
discard a8aeea9c16 [topi][relay] add operation tan to TVM (#4938)
discard a2f5997173 [Doc]refine the example description of max/min/sum/tag_scope (#4974)
discard d77457010f Added CopyFromBytes and CopyToBytes convenience methods to NDArray. Fixed typos. (#4970)
discard b5af4bc679 [DOCS] Sphinx -- Introduce alias detection. (#4954)
discard 2378c1c6ab [RELAY] fix error message (#4945)
discard 4154b1527a [REFACTOR][PY][API-CHANGE] Remove legacy python files. (#4943)
discard 9144a8c65d Bump up dev version (#4941)
discard 677426e69f [LLVM] Fix build breaks from StringRef changes (#4923)
discard ec46a0270f [Relay][AutoTVM] Relay op strategy (#4644)
discard 67bdafb1d8 [CODEGEN] Support cuda tensorcore subbyte int data type in auto tensorcore (#4546)
discard 36b408172d [DOCS] Fix sphinx warnings (#4917)
discard d80444723e [REFACTOR] Polish ffi convention. (#4912)
discard 76093ce0ce [DOCS] Update API docs to reflect the status after the refactor. (#4907)
discard f612d4fb74 [REFACTOR][PY] Establish tvm.arith (#4904)
discard 8dbc5fde1e Fixed bugs that occured when using bitwise operators on floating point type expressions. Further crash when using ops <<, >>, %. Finally added regression tests for both types of bug. (#4892)
discard 68a2caf2cf [REFACTOR][PY] Establish tvm.te and tvm.driver (#4900)
discard f7b0e3d960 [CodeGen][CUDA] Fix issues in cuda codegen (#4876)
discard 8236b6721a [REFACTOR][PY] Establish tvm.tir
discard 57b48334bb [REFACTOR][PY][API-CHANGE] Establish tvm.target
discard 178508c57c [DOCS][PY] Sphinx docs about tvm.ir
discard 44f5a385e4 [REFACTOR][PY][API-CHANGE] establish tvm.ir, migrate corresponding files (#4862)
discard 94a2b6dd7c [LLVM] Explicit llvm::StringRef to std::string conversion (#4859)
discard 21e5f28e59 Fixed bug in ExprOp that caused bitwise operators to fail when a basic python type was on the left hand side of the expression. Added regression test for crashing cases. (#4852)
discard 0c1b5e6e1e [LINT][PY] Fixes for pylint==2.4.4 (#4849)
discard 04ab5fe999 [REFACTOR][PY][API-Change] Polish tvm.runtime, tvm.runtime.module API update (#4837)
discard 15193b41c1 It's gpu not cpu. (#4832)
discard 401edf64a6 [CONTRIB][CC] Enhance cc.cross_compiler (#4817)
discard 485387d0d8 [REFACTOR][PY] Establish tvm.runtime (#4818)
discard 4af09fd3ea [REFACTOR][PY] tvm._ffi (#4813)
discard a9e5796992 fix memory leak (#4811)
discard c6bc8e00b1 [LINT] Fix -Wextra (#4804)
discard 6a2fb831bb [TIR] Create a StringImm reference type (#4806)
discard feb070fc4e [ThreadPool] Solve ARM BIG.LITTLE heterogeneous multicores (#4747)
discard 3e952ddc2f Fix parsing of different exception string formats (#4785)
discard 2751749102 [PassManager] Implement pass manager tracing API (#4782)
discard 22e1699004 properly extract error type from windows error message (#4780)
discard 8de63d1fda [Build] Explicitly link to cublasLt if it exists (#4776)
discard dd6b61d087 [REFACTOR] top->te (#4759)
discard 94da267479 [REFACTOR] Establish printer in the source folder (#4752)
discard 6acd32b714 [REFACTOR][TYPE] Finish move all types to IR. (#4746)
discard bf789f311d [REFACTOR][CODEGEN] codegen->target, build_module->driver (#4742)
discard 6db6bb7064 [REFACTOR] Establish tir (#4740)
discard c63dffd06f [CodeGen][CUDA] Improve CUDA vectorizer (#4736)
discard 17ebdbdd5b [REFACTOR] Get rid of packed_func_ext. (#4735)
discard 52bbec7c8d [TOOLS] JSON upgrader to upgrade serialized json. (#4730)
discard 1ce9484a9b export builtin_fp16 on Windows (#4731)
discard 1bf78b3885 [REFACTOR] Polish runtime (#4729)
discard 10221f7d01 [REFACTOR] top - namespace for Tensor Operation DSL (#4727)
discard ca4f733e3b [REFACTOR][ARITH] Unified IR, introduce arith subfolder. (#4722)
discard 454832fc32 [Arith] add SizeVar representing non-neg valued variable in a tensor shape (#4684)
discard 847f60d0aa [REFACTOR][IR] Introduce include/tvm/target (#4721)
discard 1a7a4547d6 [VERSION] Update mainline version to 0.7.dev0 (#4720)
discard 1bca186756 [REFACTOR][FFI] Make more clear naming for C API Type codes. (#4715)
discard 1cf2248bbd [REFACTOR] Move support related code to include/tvm/support (#4716)
discard 2eaec1662e [REFACTOR][IR] attrs.h -> ir (#4709)
discard 3ac83f674d link the math library by default (#4713)
discard dc5948a1b1 use packed func macro for external codegen (#4710)
discard a10f0ecad1 [REFACTOR][IR] Unify IntImm and UIntImm (#4706)
discard b12e68c253 [REFACTOR][IR] Polish ir/type (#4705)
discard b71128f94b [REFACTOR][IR] Initialize Unified IR Pass Infra. (#4702)
discard ab351a6a0c [REFACTOR][IR] Unified IR IRModule structure. (#4699)
discard 2aa666611a [REFACTOR][IR] Unified IR Primitive Op and Registry (#4687)
discard 26cefe419d [REFACTOR][IR] Allow Module to store BaseFunc. (#4678)
discard b508ed59c8 [REFACTOR][IR] Initialize Unified IR Expr Data Structure (#4673)
discard 328080dd29 [REFACTOR] Replace TensorObj and TensorValue with NDArray (#4643)
discard 907afdaea0 [CodeGen] Generate blob use LLVM directly (#4657)
discard e2735b2cb2 [REFACTOR][IR] tvm::Expr -> PrimExpr(Primitive Expr) (#4669)
discard 6c6d2804e7 Use int for endch to fix portability issues regarding signed/unsigned char (#4668)
discard 8ab852e496 [REFACTOR] relay::Module Def -> TypeDef (#4665)
discard a6cbbea6e6 [CI] Recover Windows Mac Build CI via Github Actions (#4662)
discard c6095ed700 [REFACTOR][IR] Add Node suffix to low-level IR nodes (#4649)
discard 1a09be4d80 [RUNTIME][DSO] Improve TVMBackendPackedCFunc to allow return val (#4637)
discard 88c4add4c4 [REFACTOR][IR] Introduce SeqStmt to replace ir::Block (#4627)
discard 4743f8de1a [REFACTOR] Automatically deduce function type signature in Registry.set_body_typed (#4623)
discard fdbc92eeb1 Get around limitation of g++-4.8 (#4626)
discard 80fab401d2 [REFACTOR] IRPrinter->NodePrinter, move to node/printer.h (#4622)
discard d25486dc91 [REFACTOR] TVM_REGISTER_API -> TVM_REGISTER_GLOBAL (#4621)
discard 6105de1fe0 [REFACTOR] Unified IR base types. (#4616)
discard 94228f6cbe [REFACTOR][TYPE] Remove un-necessary var sub-field in GlobalTypeVar and TypeVar (#4615)
discard 88ec2ae1e0 [CMAKE] Remove unecessary rdynamic (#4613)
discard 59455aa670 [REFACTOR] Migrate Low-level IR Passes into the New Stmt/Expr Mutator (#4607)
discard c18c61db94 Bugfix StmtMutator IfThenElse (#4609)
discard 9f6887d222 [IR] Unify approach to Visitor/Mutator under Functor (#4606)
discard 5c949a2d5e [REFACTOR][OBJECT] Consoldiate NodePtr/Ref/Hash/Equal to Object (#4603)
discard 08466321c2 [relay][refactor] Cache Op::Get in passes to reduce lookup overhead (#4594)
discard cc0b425e18 [REFACTOR][RUNTIME] Update NDArray use the Unified Object System (#4581)
discard b6ea37e05c [Runtime] add necessary const qualifier for NDArray container of parameters (#4590)
discard 7c2401eded [Container] Fix NDArray SaveDLTensor declaration and implementation signature different (#4586)
discard f5ced88995 Some Windows and MSVC fixes (#4569)
discard 3b64dd9820 [RUNTIME] Remove Extension VTable in favor of Unified Object system. (#4578)
discard 61e1b3fd67 [DEPRECATION] Cleanup legacy verilog support (#4576)
discard 5f5721b12e [DEPRECATION] Remove NNVM compiler (#4571)
discard eded6b328f [TEST] Remove nnvm related code in topi and test script (#4562)
discard ca3ce0d635 Support standardize runtime module (#4532)
discard b2c3ba7c44 [REFACTOR][DTYPE] Isolate dtype to runtime (#4560)
discard fe5dcb42fc [PYTHON][FFI] Cythonize NDArray.copyto (#4549)
discard 5f7bba7f25 [Relay] External codegen (#4482)
discard 52ac683852 [ir] use DataType instead of Type for readability because Type has been deprecated (#4513)
discard 872f40c5f3 Fix build for llvm newer than 9.0 (#4515)
discard d4e6109c80 Add AMD codeGen unit tests (#4509)
discard ebbde5c677 [codegen][Build] it's more readable to move the if condition out of the loop (#4501)
discard 31ef4b0b73 update rocm intrin rule (#4499)
discard f18a5bb238 Add __float2half_rn for cuda compute capabilities less than 53 (#4489)
discard d5fe932a0f [docs] typos in include/tvm/ir.h (#4493)
discard d346f12f8b [REFACTOR][RUNTIME] Add LibraryModule that merges systemlib and dso. (#4481)
discard eff688c737 [Codegen] fix bug on LLVM 10.0 (#4480)
discard f1a7f73d9d Fix typo in travserse (#4469)
discard 3a46e12a0f [BUGFIX] Fix search path for libtvm_topi.so (#4467)
discard e166a5f7c9 [CONTRIB] TFLite Runtime (#4439)
discard 74ccffe579 [doc] fix typo (#4463)
discard 80a54b3524 [µTVM] Enable AutoTVM for ARM STM32F746XX Boards (#4274)
discard 26015790a8 add DeviceName to ROCm api (#4437)
discard 0fb1144e9b [RELEASE] Update copyright message, change notice, remove cma kernel module for now (#4431)
discard 5fa5ec0d40 add rocm codegen unittest for cross thread reduction (#4423)
discard bb3e818e8d [LICENSE] clarify the blockingqueue license, update version to 0.6.0 (#4414)
discard acda75a226 [License] move cma_api to 3rdparty. separate BSD 2-clause and 3-clause (#4410)
discard 838eecac08 [LINT] Remove unnecessary copyright message for files with ASF header (#4409)
discard 821319b2d9 [Release] resolve license issues (#4408)
discard 02e5a8d421 [TVM][RUNTIME] A minimum example to generate external library wrappers for DSOModule (#4280)
discard 5a6ea1872d [LICENSE] add 3rdparty licenses (#4402)
discard 5309b2da35 [ThreadPool] Solve thread transitions issue (#4344)
discard 046699a851 fix build with llvm trunk (#4386)
discard e7c136f2b9 [nvcc] enable multiple arch in one fatbin (#4377)
discard 4ae91bce80 [Relay tests] AlterOpLayout - Temporary attr update (#4357)
discard a71114b8ec proper device query through rocm api (#4305)
discard 7abed1450c Add workgroup size attribute to AMDGPU functions in codegen (#4342)
discard 7e753de3a8 [Relay][VM][Interpreter] Enable first-class constructors in VM and interpreter via eta expansion (#4218)
discard 2d7580763a [COMMUNITY] Add DISCLAIMER, KEYS for ASF release (#4345)
discard 90237b845a [CodeGen] Add build config option disable_assert to control whether to generate assert (#4340)
discard c0954d9b64 [RUNTIME] Add device query for AMD GcnArch (#4341)
discard fc0ba556b7 [Contrib] Add MKL DNN option (#4323)
discard 0f4fd0b237 Enable hipModuleGetGlobal() (#4321)
discard f5b6033ca8 [Codegen] remove fp16 function override for cuda (#4331)
discard d80d1b6785 [RUNTIME][REFACTOR] Use object protocol to support runtime::Module (#4289)
discard 3a5fe9c7c0 [Codegen][cuda-fp16] fallback to fp32 simulation when cuda arch < sm53 (#4268)
discard 56994dce58 Auto TensorCore CodeGen (#4234)
discard 0e3d7952e8 [DOCS] Update link loc (#4257)
discard f4f6b26571 Require LLVM >= 9 for AMDGPU backend (#4253)
discard 263fab1da9 [NODE][REFACTOR] Rename IRFunctor->NodeFunctor, use func pointer (#4247)
discard fb46e77ebc Implement explicit IR representation of memory alloction (#3560)
discard 8b132b989d [ARITH] Fix lowering of FloorMod (#4236)
discard c2d8c12aa9 [CUDA] Fix fp16 intrin, disable bad fp16 vecadd test for now (#4239)
discard 6090d1bf31 [CI] Update GPU docker to cuda10 (#4228)
discard fd39fed665 [Relay][Topi][TensorFlow][ONNX][Lang] Add support for Any op (#4205)
discard f5143104f8 [ARITH] Fix the rule y < x && x <= y (#4220)
discard 2f842d5e77 Update have_int8 condition to run on compute capability 7.x devices (#4214)
discard dd2868e91c [Relay][Op] Enhance Upsample Operator to support float scales (#4206)
discard c6000c101a [RUNTIME] Separate runtime related contrib into runtime/contrib (#4207)
discard f2436c89ca [hotfix] missing include headers (#4204)
discard cd629573d3 [NODE][REFACTOR] Refactor reflection system in node. (#4189)
discard cc07ec824b TensorCore Support using Intrinsic (#4136)
discard e1d3d09631 [TOPI] Tunable Template for Conv2D HWCN on CUDA (#4168)
discard 84f41653d0 [cmake][ANTLR] Support setting path to ANTLR jar (#4176)
discard 3fc71cf2b8 [REFACTOR][NODE][RUNTIME] Move Node to the new Object protocol. (#4161)
discard 04541896a2 [Runtime] Enable option to use OpenMP thread pool (#4089)
discard 00358a1d99 Fix typo (#4144)
discard f983bb063c [ARITH] Fix lowering of floormod(x, y) != 0 (#4127)
discard 249bf14d98 [codegen] Add multiple operands and function support when using fp16 compilation (#4056)
discard 244ffeaed2 [tvm][any] broadcast with values other than one (#3967)
discard 2853a37063 force code object v2 for amd gpu backend (#4099)
discard 987e56b747 [TVM] Rewrite simplification rule to eliminate unnecessary conditionals. (#4076)
discard 3155eb3b94 [ARITH] Add floordiv for the deduce bound (#4025)
discard 544653762a Hide symbols from dependent libraries if HIDE_PRIVATE_SYMBOLS is ON. (#4041)
discard 138bb31df7 [llvm] switch to use Align for llvm trunk (#4051)
discard 5c6897c2b3 [QNN][Relay] Calling Dialect passes from inside Relay Build API. (#3971)
discard e5c674f0a3 Add dmlc-core to the list of installed header directories. (#4035)
discard 69785e653c [ARITH] migrate indexdiv/mod to floordiv/mod (#4008)
discard 9139135704 [Relay] Move prelude to text format (#3939)
discard 8e85584e63 [ARITH] cleanup the indexmod/div on python side (#4028)
discard bef349ebd5 [ARITH] Use explicit div mode in python. (#4014)
discard 0c17c517b1 [ARITH] Refactor to use explicit div/mod functions instead of operators. (#4000)
discard 00b8b88df6 Expose llvm.nearbyint intrinsic. This is a faster alternate to rounding. (#4001)
discard fc26fa1188 Changes to make tensorize work. These changes also fix the previously broken test. (#3981)
discard ebc2456b2e [ARITH] Explicitly state truncdiv/mod in pattern matching. (#3986)
discard 9c86a89a72 Add operator `isnan` (#3979)
discard 11b7fddfc3 add bc for gfx1010 (#3984)
discard 1f0a93b00e [ARITH] Add Lowering rule for FloorDiv/Mod (#3976)
discard d1c906591a Add support for MXNet pad operator. (#3739)
discard 66c6411b55 [ARITH] Introduce base-class IRMutatorWithAnalyzer for scope dependent analysis (#3969)
discard 7c0d58aaab [TVM][AutoTVM] cast filepath arguments to string (#3968)
discard 357546b436 [Vulkan] Minor optimization for deferred token lookups. (#3960)
discard adecd37690 More friendly error msg; Fix Android Demo LLVM ver (#3962)
discard 683915405e [tvm][codegen] Make buffer auto broadcast independent to the order of input args (#3956)
discard d59c4534d9 trivial (#3954)
discard a2eab8bc55 1) Add EQ op to the deduce_bound and add unittests for the same (#3775)
discard 1f43bb20f5 Vulkan2 Runtime API (#3849)
discard e89395dab8 Fix CUDA int8x4 vectorize (#3928)
discard b585d98e99 [RFC] [Contrib] Minimal runtime (~12kb .text on ARMv7/x86) for subset of TVM models (#3567)
discard a9c8c7565d [Relay][Module] Refactor the way we interface between different modules of Relay. (#3906)
discard 36b306a9d3 [CODEGEN] Remove incorrect check for LLVM in C codegen test (#3921)
discard 7e8b87e96c Numpy compatible dtype inference for `tvm.convert` and `tvm.const` (#3861)
discard f811f7fd2d [Relay/TOPI][Op] Add erf intrinsic and op (#3702)
discard 8cd7358b45 Support LLVM trunk (#3907)
discard ea7a7e907e Add .hsaco save/load for ROCm target (#3852)
discard eb03699e6f [Relay] Add ADTs to text format (#3863)
discard 2ce393b651 [PYTHON/FFI] Search PATH for DLLs (#3888)
discard c58f2b2a30 Revert "[Runtime] Allow parameter sharing between modules (#3489)" (#3884)
discard 65d268d888 [Runtime] Allow parameter sharing between modules (#3489)
discard c282706e7d [WIP][µTVM] Add OpenOCD Low-Level Device (RISC-V Support) (#3756)
discard 60c6d02b67 [Relay][Any] Add shape func for dynamic shape (#3606)
discard 11b7ae410a codegen_spirv support Call::reinterpret (#3795)
discard 985774bfba Add build_create_shared_func to tvm/contrib/cc.py (#3840)
discard cb511af940 Fix inconsistent python/cpp API behavior for if_then_else, power (#3829)
discard 41a3cd0848 [CODE] Halide attributions (#3824)
discard afaa5e160a [TVM] Fix warnings (#3817)
discard cc2af5f3f5 [Relay][VM]VM Profiler (#3727)
discard f39a312ac2 add gfx906 bc (#3808)
discard 9b6f89aba5 [ARITH] Simplify casts of constants 0 and 1 (#3758)
discard 18339066ba Don't replace reduction init axis with new axis if bound to a thread. (#3408)
discard 2baee2c85c Revert compile_cmd kwarg name change (#3746)
discard 8d4da5b62e Take zero extent loops as NoOp and remove it and add unittest for the same (#3724)
discard 68b9a12cc5 [Bugfix] Fix the issue that function pass modifies original module (#3712)
discard f85c862084 Export tvm::relay::OpRegistry::OpRegistry (#3711)
discard e507bf816c Quit and clean when TVM is interrupted (#3640)
discard 97bb71a6da Metal reinterpret fix (#3706)
discard 13d198827c Add an option to build with -pthread (ON by default) (#3671)
discard 8a09df86bb Align the naming rule for OpAttributeUnImplemented (#3695)
discard 00e03ca51a Add shuffle support to TVM (#3633)
discard 455b3c2bd0 Add support for Tensorflow operators log1p, cos, sin (#3614)
discard 16f9ed95ce ROCm: Add SaveToFile and LoadFile (#3665)
discard df76cbf394 tvm/contrib/rocm: improve finding of ld.lld (#3664)
discard d4165ef6d6 Print llvm source by default in ROCMModuleNode::GetSource (#3662)
discard b53ccea363 Make Google Test usage configurable in CMake files (#3628)
discard 6da8cd76fe Implementation of uTVM (#3227)
discard 01214dfc9e Add a missing header in cuda_device_api.cc (#3621)
discard 356c944c7e fix typo (#3611)
discard a86200a626 [TEST] Fix testcase to make them more compatible to zero-rank (#3612)
discard f12707adca {relay,topi}.reinterpret support (#3599)
discard 5d1889eb4c [Runtime] [ThreadPool] Make SpscTaskQueue::Pop(..) spin_count configurable (#3577)
discard 1dc11fc6eb [CI] Upgrade LLVM envs (#3590)
discard 260bbb4b76 [RPC] Better handle tempdir if subprocess killed. (#3574)
discard a2d7f26ea3 [ARITH] Simplify let (#3568)
discard d18e3f4b8d Emit DWARF debug information (#3420)
discard ced69e02bb [Runtime] Enable set_input_zero_copy in GraphRuntime (#3416)
discard e23fbb3232 [ARITH][IR] Introduce FloorDiv/Mod (#3479)
discard 4c44be074c [INFA][IR] Build and Evolve Low-level IR. Remove HalideIR dep. (#3533)
discard d43492050f posix_memalign appears in API 17, not 16 (#3532)
discard 75e2a306ff init (#3476)
discard 7d2f090506 [Relay][RFC] Implement type checking for Any (#3221)
discard b2aac07fbd [Relay][Testing] Relay-to-Python compilation (#3156)
discard 201515d784 [Vulkan] Added conversion from bool to float. (#3513)
discard e1e97fc22f [ARITH] More recursive rewrite rule, cleanup simplify tests (#3502)
discard 31f0ecda35 [ARITH] Bugfix div subtract rewrite rule (#3504)
discard 751e611483 [ARITH] Refactor: Remove un-necessary usage of ComputeExpr (#3503)
discard 4175bd2d9e [relay][frontend] Return Module from get_workload (#3483)
discard bc289e1760 [Relay][Module] Make tags for ADT constructors and ConstructorValues more robust (#3369)
discard 30951e811b [Relay] Fix PE (#3482)
discard e2c09572d2 [Relay] Continuation Passing Style (#3456)
discard 6bad1a4455 Clean up pass.h (#3312)
discard 1b9352b0ba [Codegen] Support broadcast op with symbolic shape (#3389)
discard ed948e5bb6 [Relay] fix 'please use input parameter mod warning' triggered in build_module (#3452)
discard 2eb70e9846 Migrate simplifier to new infra. (#3368)
discard 0c952c593c [Relay][Pass] Only allow Module -> Module for opts managed by pass infra (#3430)
discard 404c03e174 [ARITH] Canonicalize comparison to move constant to one side (#3467)
discard 4db01a4612 [ARITH][SCHEDULE] Update schedule to use the new analyzer (#3466)
discard 4686270e85 [ARITH] CanonicalSimplifier, better folding, eliminate store. (#3464)
discard 64f07b31e4 [ARITH] Improve min/max/div cases in RewriteSimplify (#3463)
discard 18ed468d0b [CI] Fix windows build, add azure pipeline (#3458)
discard 405cd87321 [VTA][Relay] Relay Compilation + AutoTVM compatible operator libraries for VTA (#3135)
discard 56d3c4b579 fix (#3417)
discard c1aa06bb04 [ARITH] Bugfix min/max const canonicalize rule (#3386)
discard 783fbb9431 Fix typo in word explicitly (#3376)
discard b5dc01f267 [Relay][VM] Add AllocTensor instruction and better instruction printer (#3306)
discard 964f3b3eb6 [BUILD] Enable more visible symbols by default (#3365)
discard 8f1e8c1c5a Update CMakeLists.txt to be more flexible (#3354)
discard c420b39c28 [ARITH] Revamp IntSet (#3272)
discard 3df130c701 [Relay][Transform] quantize opt passes to pass manager (#3289)
discard fba9840429 Support export ADT value in Python (#3299)
discard 43feaa49f0 [RELAY] Pass infra cleanup (#3336)
discard cdadeb4573 [relay][vm] move vm opt passes to pass manager (#3323)
discard d871fa2e3e [PASS][RELAY] polish pass infra (#3319)
discard be20a4a4c8 [LANG] Comparison operators support for Imm expressions (#3283)
discard 3815a141cf [ARITH] Bugfix: int bound analysis for mod (#3288)
discard cd09bbc7d7 [RELAY][TRANSFORM] Migrate buildmodule to transform (#3251)
discard b117186231 [ARITH] Bugfix: check arg positiveness for mod rules (#3279)
discard a2f8618824 [Bugfix] Fix a memory leak in OpManager (#3263)
discard 3892e78a4b [C++] Cleanup transform API nits (#3253)
discard 5265273fcc [ARITH] Improve div/mod in rewrite simplifier (#3149)
discard 8c06974ef8 [Relay] Start porting pass to the pass manager (#3191)
discard 51b51527e5 [Relay][Transform] merge PassContext and BuildConfig (#3234)
discard 36c17c2ade [C++][API] Consistent RAII scoping API. (#3231)
discard 208eb11df2 [NODE] Macro to define NodeRef methods, constructor style example (#3224)
discard a876737a66 [relay][pass manager] Open transform namespace (#3226)
discard c1fa0ed4ab Add `SkipVectorize` pass (#3222)
discard 9cafaf4bb2 [Relay][TOPI] operator All (#3124)
discard 7923865469 [BugFix] Fix bug in cast to bool (#3207)
discard d8c6d2a86b [CODEGEN][CUDA][OPENCL] Handle INF and NAN (#3194)
discard 8294f359bc [Datatypes] Custom datatypes (#2900)
discard 5f8c930d30 Avoid using heavy API to query single attribution (#3179)
discard acd6e9b7b3 Fix a multithreaded bug in llvm LazyInitJIT (#3158)
discard b266cfe41b [Relay][Runtime] Implementation of Relay VM (#2889)
discard 66389c54b1 Handle vectorize for LE statement (#3137)
discard 51acf8b074 [ARITH] Constraint-aware ConstIntBound, Enhance CanonicalSimplify (#3132)
discard 33be4734ae [Relay][Runtime] Add memory manager for NDArray (#3121)
discard 11de734bbf [DOC] various assorted grammar fixes (#3127)
discard f45bb6acfd [Bugfix] Fix type code error for StringImm (#3050)
discard 79f5be9e5a [TVM][ARITH] Teach BoundDeduce to handle the case in which target var can appear in rhs of expression (#2795)
discard 0dbb328bfa [Relay][TOPI] Add rsqrt operator (#2949)
discard 55be0cc7aa Fix code comment and typos. (#3063)
discard e467cfd566 [ARITH] Fix x||!x for comparisons in rewrite simplifier (#3029)
discard e715bc3389 [Relay] C++ GraphRuntimeCodegen, Deprecate Python2 (#2986)
discard 659482bc4f [REFACTOR] Use more TypedPackedFuncs (#2981)
discard 3956b10103 add output format to ndk build func (#2999)
discard bf193cba23 Expose backtrace symbols in Debug mode (#3001)
discard aabb21954c [HEADER] Add Header to Comply with ASF Release Policy (#2982)
discard b8761533a3 fix undefined reference to dlopen, etc (#2957)
discard 75e0fff1af [RUNTIME][OPENCL] Make OpenCL runtime Compatible with OpenCL2.0 #2897 (#2950)
discard 6f11a9e910 [ARITH] Analyzer CanonicalSimplifier (#2891)
discard 88a745bbd6 Fix vcvtph2ps codegen (#2925)
discard 47e6fcc91f Consistent result of DetectLinearEquation() when an empy vars is passed (#2860)
discard e008050f98 Fix intersect of modular set (#2904)
discard ae3747f926 [AUTOTVM] Refactor measure build func (#2927)
discard b31dab6252 [ARITH] RewriteSimplifier: improved cmp simplification (#2851)
discard 4b38d63c0a [RUNTIME] Scaffold structured error handling. (#2838)
discard e6daa3a64d [CODEGEN][OPENCL] Fix compile error about ternary expression. (#2821)
discard f0788e4c73 Fix Xcode 10 metal compile error (#2836)
discard 4c3ccf6f36 xcode.py: Decode bytes before output (#2833)
discard ee2ffda4cb [ARITH] RewriteSimplifier: min/max, logical, select (#2768)
discard 6128a5bc46 Ensure loop count is a constant before trying to unroll. (#2797)
discard 1457728c87 Make cpptest build on Ubuntu (#2798)
discard 4790797b64 [DOCKER] Update docker protocol (#2793)
discard e989d60bb5 [Relay] Pass manager (#2546)
discard 5d7da79592 [ARITH] Analyzer RewriteSimplifier: add/sub/mul/div/mod (#2722)
discard 607488c344 [WIN] Fix a bug in find_llvm when specify llvm-config (#2758)
discard 86d2d35b79 [RUNTIME][OPENCL] set type_key even when platform is not available (#2741)
discard d4f0c33145 Fix vmlal.s16 code generation for int8 x int8 -> int32 (#2748)
discard 3162170412 [RUNTIME][OPENCL] clFinish before releasing memory (#2737)
discard bb661b8360 [VERSION] Update to 0.6.dev (#2736)
discard 2da1e550c8 use LLVM linker (#2713)
discard 124c0039f9 [EXPR] ir_operator.h->expr_operator.h Centralize const folder logic (#2719)
discard db741ad528 [ARITH] Analyzer Infra, ConstIntBound, Modular (#2668)
discard 902e7618c4 [CODEGEN LLVM GPU] Initialize llvm before lookup for the target (#2683)
discard 74e545527c Handle Select in IntSetEvaluator (#2687)
discard f75ff0023f [BUILD] Simplify after bind device type (#2670)
discard a4d3e71cc9 [Relay] add more function to prelude (#2660)
discard 8a1e4e40c9 Fix pylint 2.2.2 gripes. (#2642)
discard 8c3b452b4c [RUNTIME][NDArray] Allowing External Libraries to Subclass NDArrays (#2613)
discard 2c943702b9 [Bugfix] Missing #include <sstream> (#2629)
discard 96bf518618 [TVM][LANG] Add eager simplification for operations with FloatImm (#2615)
discard 21e5593e0d [EXPR] Expression-template based pattern matching. (#2589)
discard 6f99dfcdeb [Relay] Algebraic data types (#2442)
discard 9bf59923fa [TVM][Bugfix] fix storage_rewrite bug when input is big (#2580)
discard 8f787e9b67 [RUNTIME] Enable NDArray type extension (#2598)
discard 68109bd2ed [Hybrid script] Backend support (#2477)
discard 671ec093cf Tighten buffer bound for TensorComputeOp by improving EvalSet on ranges (#2565)
discard 1f0363d79b Misc refactor on graph runtime, layout node (#2557)
discard ae775934a9 Remove duplicate as Checks and CHECK value (#2531)
discard bce5e44a66 [OPT] Low-bit Quantization (#2116)
discard a7855578b4 Optimize Linux shared library modules (*.so files) (#2445)
discard e3aebb1413 [Relay] Add generic & informative Relay error reporting (#2408)
discard 311de169d6 Fix broadcast add and subtract grad (#2465)
discard d3e8d19db9 [Relay][Parser] Improve Relay parser and pretty printing, including CMAKE (#2377)
discard aba55bd72f [Runtime] Make runtime compatible with android ndk api 15 (#2446)
discard 5458428994 [RELAY] Support recursive call syntax (#2352)
discard 880f353a1b [relay][pass] Annotation for heterogeneous compilation (#2361)
discard 106d09aa37 [PASS][TENSOR] Use correct select semantics (#2394)
discard e8a9c36e63 [LLVM CodeGen] Partially disable unsafe fp math (#2422)
discard 9e82226404 [PASS] not vectorize if_then_else (#2389)
discard 28e33bcc58 [RUNTIME][TRACE] Support trace primitive. (#1973)
discard d4fe1b7d22 Added LLVM TargetIRAnalysis pass (#2386)
discard be6d82c8cb [RELAY] Port winograd ops to relay (#2356)
discard eb57e90237 Enhanced simplification rules for Div by a positive constant (#2346)
discard 3568329510 [RUNTIME] Add min_repeat_ms to time_evaluator (#2200)
discard 9a31606a36 [RELAY][EXPR] Make const numpy consistent (#2349)
discard 5ee5c4e706 [ROCM] Make sure all bit code files exist (#2323)
discard 8d768b3ba4 [TVM] Move check_numerical_grads to tvm.testing_ (#2314)
discard a785e0b93d Fix serialization issue (#2263)
discard d776af8819 Fix missing sigmoid intrinsic in C++ (#2231)
discard 956173b9f9 GetChar() in base64.h should return int, not char (#2255)
discard 43a11f0876 [typo] fucn => func (#2240)
discard 3e57e5fd54 [typo] fucntion ==> function (#2239)
discard 0dbafb170d [Relay][RFC] Relay IR Text Format (#1781)
discard 43bc129bdb Run verifier during LLVM code generation (#2211)
discard 099454e23d Python security issue about mktemp() and abspath() (#2202)
discard 3da9877da7 [TVM] Fix llvm codegen (div by power of 2) (#2204)
discard 2a1c482cb3 NOTICE (#2203)
discard 90baa82d48 [PASS] InstrumentBoundCheckers pass (#2079)
discard 8d9cd7b3e8 [Relay] Alter Op Layout (#2150)
discard a730053b1c fix llvm dependency bug (#2198)
discard 489928b0f1 [BACKEND][CODEGEN] C codegen with tests (#2161)
discard 1ba3037bf9 [RELAY][IR] Introduce IdNode to preserve var id across rewriting (#2178)
discard ef96445277 Fix str decoding error on non-English Windows (#2158)
discard 2efbe30955 [HYBRID FRONTEND] Modify hybrid script to new interface; hybrid op supported; enable compilation_database in CMakeList.txt (#1757)
discard ec40f8ae5c [RELAY][[PASS] Consolidate ForwardRewrite pass. (#2124)
discard 611fa3e6e3 [RELAY][PASS] Bind, FoldConstant (#2100)
discard 5e42611ec3 [RELAY][OP] strided_slice (#2094)
discard 35c840f99a [OPENCL] Make use of cpu device when gpu device doesn't exist. (#2076)
discard ec29fd456e [CODEGEN][LLVM] Cache packed func ptr, lift alloca (#2070)
discard 8fa11a761a [RELAY][BACKEND] CompileEngine refactor. (#2059)
discard 661f51fdd4 [RELAY][RUNTIME] Add compute and schedule attributes for all ops in relay/op/tensor.py (#2050)
discard 4ab3a9e2d6 Rename relay::Environment to relay::Module (#2054)
discard 108087a992 Refine CMakeLists.txt (#2049)
discard 05c77e9127 [Cleanliness] [Easy] Make TVM leak-sanitizer and Wnon-virtual-dtor clean. (#2046)
discard b05369a145 Better gemm support for cublas and cpu (#1967)
discard ab7ef88630 [RELAY][RUNTIME] Add Relay interpreter and compiler for TVM runtime system. (#1954)
discard cd94520958 [PASS] add a pass for the specific hardware accelarator when it is not binded (#1999)
discard 9e6bb6d1ba [PASS]unroll loops with extent=1 (#2027)
discard 6bb0cbc023 [intrin]support fmod for cuda (#1964)
discard bfc737e19e [RELAY][PASS] FoldScaleAxis Forward (#2020)
discard ee7714b751 [OPENCL][RUNTIME] Fix race condition of modules (#2018)
discard f1940ebdfd [RELAY][OP] Fix conv2d NHWC type inference. (#2019)
discard df92cb9186 [RELAY][OP] Split (#1876)
discard 73589fdc67 [ATTR] Introduce Integer container (#1994)
discard 4753855801 [RELAY] BiasAdd, MLP, Resnet testing (#1969)
discard df43909b70 Fix int8x4 broadcast value codegen in cuda (#1959)
discard fd23c06cf3 [RELAY][TypeSystem] Add support for populating type args (#1962)
discard e6d94b3071 [RELAY] Refactor AlphaEqual to support deep comparison of Attrs. (#1958)
discard 90e7efe7e7 [Relay] Fix format (#1957)
discard 3b9395486b up (#1940)
discard 102aa05c79 Fix non-zero extent of access_ptr out of range (#1937) (#1939)
discard 892f3ea8d3 [TOPI] Specify non-zero absolute tolerance in tests (#1925)
discard 867b41cfdd Fix typo in module.py line 90 (#1947)
discard 4767b1d533 [RELAY] IR builder stablize refactor, clean pass (#1934)
discard adbd1c5d75 [RELAY][Refactor] TextPrinter, move ret_type after body in Function. (#1918)
discard ecd0f0bc8b fix build issue for MSVC 2017 15.8.0 and above (#1928)
discard e658770421 [LANG][ATTRS] Enable deep equality comparison and hash of Attrs (#1903)
discard 0ef3ffdbf7 Fixes for tensorize in Windows build to expose TensorIntrin::make and search clang.exe (#1896)
discard 3909b6f613 Allow override gtest library search path (#1867)
discard dc1ca0169a Enable bool type as storage type (#1853)
discard 89d49437f1 [RELAY][PASS] Dead Code Elimination (#1776)
discard 9c7e525413 [RELAY][DOCS] Core Operator docs (#1821)
discard 6f3bf510d0 [DEBUG]Support a debug framework for TVM Runtime (#1378)
discard d6c5c12928 [TVM] Fix negating undefined in DetectLinearEquation (#1816)
discard bc2b69697e [RELAY][OP] conv2d, ShapeExpr->IndexExpr (#1798)
discard 68a0838610 Fix vulkan build with homebrew install of vulkan-sdk (#1802)
discard ce4b3bd9b4 [NODE] Keep base node system in HalideIR (#1793)
discard 83bde32429 [RELAY] First pass at pretty printer (#1749)
discard d741a4ef21 [IR] eager constant folding in operator overloading (#1789)
discard a227f5b337 [BUG] Fix incorrect libcuda.so found by cmake when multiple versions of CUDA exist (#1788)
discard 59bec7caeb [RELAY] Refactor type inference to use type solver (#1779)
discard 7c4d9a4360 [SGX] Improve edgeroutines (#1775)
discard bc681b7042 [RUNTIME] Use weak link for fp16 functions (#1769)
discard 0fd95d4e14 [RUNTIME] Add fp16/fp32 conversion functions (#1766)
discard dd1d8545be [DOC]Errors corrected (#1767)
discard ca9341981b Update SGX cmake (#1763)
discard bcd9cad6ef fix buffer elem_offset calculation (#1762)
discard eb857719b2 [NODE][RELAY] Move most of the reference related code to node (#1747)
discard 2ba02cee5f [NODE] Node base system refactor (#1739)
discard 80e42c7572 [High level OPT][RFC] NNVMv2 IR - Relay (#1672)
discard 9ab0db0430 [CODEGEN] Fix let expression (#1727)
discard 9be162f5b0 [NNVM][TOPI] Add mean and product operators (#1628)
discard 51e3585bfa [NODE] Enable EnvFunc to serialize global function as node (#1721)
discard 6db6e3254b [RUNTIME][API] Graph runtime API enahncement to support NDArray (#1659)
discard e92c062668 [AUTOTVM][TOPI] Use tunable templates for GPU (CUDA/OpenCL/ROCm/Mali) (#1638)
discard 8bcad304e2 [CUDA][TVM] fix constructing invalid command line string for nvcc (#1674)
discard f4e194e300 [RUNTIME][OPENCL] delay device check (#1657)
discard 96a2bd15c0 [LANG] Improve serializer (#1658)
discard f281aa479a [NODE] Enable global singleton object, allow set_body_typed in function registry, default fallback of IRPrinter. (#1652)
discard 55cebe5dfb [PYTHON] Enable constructors in Node (#1647)
discard 660fb85829 [RUNTIME] [OPENCL] Fix access modifiers (#1643)
discard 9132c96c76 Remove leading "./" from include paths (#1640)
discard 5771175997 [ATTRS] change AttrFiledInfo->Node (#1634)
discard 1b7bfd64aa [VERSION] Update to 0.5.dev (#1623)
discard 54fd4d83c6 [NODEREF] Introduce named attribute system. (#1618)
discard 5b7d327055 #1592 [PASS] Fix missing mem CHECK in storage_rewrite (#1616)
discard 0d00c0ada3 [RUNTIME] Enable return NDArray in RPC (#1610)
discard f0643d018d [DLPACK] Enable cython support (#1589)
discard b5715c8ae8 [RUNTIME] Refactor to enable stackvm in runtime. (#1588)
discard 521a9bf990 DLPack Conversion API (#1573)
discard 9882646cd0 Use int for int8x4 due to performance overhead of char4 (#1569)
discard bd69f23c43 add tvm external registry entrypoint (#1562)
discard 4aa320bec0 [AUTOTVM] TOPI integration for ARM CPU (#1487)
discard 17a3e28d23 Fix a testcase name in test_codegen_cuda (#1526)
discard 2934d4f3d1 [TVM][CUDA] NVIDIA GPU Int8 Support (#1503)
discard 84f38015d5 Add initial support for Intel FPGA SDK for OpenCL (AOCL) (#1474)
discard 6e3790becf [BUILD] warning fix: new does not have an alignment parameter (#1478)
discard 4c5340dcd9 [CODEGEN] Enable inline llvm asm code (#1486)
discard 158b60a61a [IR] support general type annotation. (#1480)
discard 8a18d2dd35 [BUILD] Fix LLVM static/dynamic link issue (#1461)
discard 166f0710a0 [TOPI] Bitserial low-precision convolution (#1332)
discard 6ec9755de3 [CUDA] FP16 support (#1413)
discard b21d31b02d [NODE][REFLECTION] Support NDArray as field (#1452)
discard cfca1c83dd use SetAffinity when logical cores > physical cores (hyperthreading) (#1453)
discard 3d5a22c753 Fix conda package builds (#1445)
discard 0345df5138 [BUILD] restrict runtime include headers (#1444)
discard 29815c1c83 [RUNTIME][OPENCL] show correct device type name (#1441)
discard 6052de61fa Fix cmake for building with cuda in msvc (#1437)
discard 50b3006dba [BUILD] enhance vta build (#1434)
discard 30b9f388b6 Add support for absolute opeartion (#1406)
discard 9ab924af0c [AUTOTVM] Core part of auto-tuning module (#1312)
discard c1d39984f1 [RUNTIME] Support setting CPU affinity (#1403)
discard 86f57cd256 Added option to build android rpc app with vulkan support
discard 6bcd4cd0d2 [BUILD][DOCS] Migrate VTA CI, test, build, docs
discard 3e5e03cf4e [RUNTIME] Simple NDArray container API in c++ (#1418)
discard 58ee0b3b61 [OP] Improve bitwise op type checks (#1415)
discard 00bc7cb092 [TVM] Fixed SPIR-V codegen for OpControlBarrier (#1409)
discard f255b3fae2 [RPC] graduate tvm.contrib.rpc -> tvm.rpc (#1410)
discard 8e444e3279 [TVM] Fixed SPIR-V codegen incorrectly not declaring the interface for the entry point (#1400)
discard b84b054aa1 [RUNTIME][OPENCL] Create program lazily when the program is built (#1408)
discard af46219868 Add support for multiple OpenCL platforms (#1345)
discard 2221fa1a86 Fixing issue #1395: Undefined symbol: cudaGetDevice (#1396)
discard 0e26ab5d6f [NVPTX] libdevice support, enable NVPTX backend in topi tests (#1365)
discard f53155936d fix narrow conversion on gcc-8 (#1376)
discard 8b26f374b9 update include regex to work for path with symbol (#1354)
discard f7c7259530 [PYTHON] Make decorator optional for runtime (#1350)
discard 95deb56a4d [RUNTIME] keep opencl runtime deps free from node (#1349)
discard 27ca257d64 Fix cmake search for vulkan on Windows (#1343)
discard e269e8f760 Add support for Xilinx FPGA board with SDAccel (#1278)
discard fb91d6ebf3 Contrib: add mkl blas support (#1336)
discard 151604424d [PASS] Add GPU IR verifier (#1296)
discard 3bb666fbeb Import hybrid module in __init__.py (#1323)
discard 333972598d [TOPI] Numpy consistency: always broadcast binary op. (#1321)
discard 89c007ae2c [TOPI] Conv2d Added and Optimized for Intel HD Graphics (#1290)
discard 996605017a [MATH][TOPI][NNVM] introduce trunc, round (#1310)
discard a4e127ace0 [BUILD] Fix reflection build for gcc-8 (#1304)
discard 0e6f68b5ff Check common subdirs for vulkan/spirv headers (#1298)
discard f478cd60c7 [DOCS] Improve review guide, improve cmake llvm build (#1295)
discard 880b32ca60 [CONTAINER] Introduce StrMap (#1292)
discard 9b7367900f Link system library needed for LLVM (#1282)
discard a025bffe3c Fix missing cublas libraries (#1281)
discard dce168f287 [BUILD] Add clang to build matrix, -Werror (#1273)
discard 77ff479ad1 [BUILD] Enable path option for ROCM, CUDA, Vulkan, simplify optional build (#1270)
discard b6df54a1ec [CODEGEN] ARM Popcount lowering rule and codegen updates (#1235)
discard f0b6b9f493 [INTRIN] Add support for floor and ceil (#1267)
discard e9874c188b Fix the building error in android_deploy (#1262)
discard bc058900af [BUILD] Switch to CMake only Infra (#1254)
discard dc6a124a24 Unite cmake builds (#1248)
discard 3c9628d526 fix extern naming (#1238)
discard 78f4e2b3e0 add test to irbuilder for gpu execution (#1228)
discard 577a9f7988 [Metal] Fix block launching parameter (#1219)
discard 89f777180e Fix compilation failure with latest LLVM (#1208)
discard 583344c232 [RUNTIME] update to make runtime copy type aware
discard 49405021b0 [DOCS] Improve docs naming, fix docs warnings
discard fe2fb56cf7 [DOCS] documentation merge
discard 3ab55f90f9 change version number (#1175)
discard 83118fab2e [llvm] fixed issue with llvm 5 vs 6 (#1167)
discard a82e7f3cda Fix error during running on nvptx with cuda9 (#1162)
discard 33321c8124 make ThreadPool thread local (#1152)
discard 4ffb41edb9 [CODEGEN] Enable cross compile of AMDGPU without rocm, update rpc (#1154)
discard b3f8632be4 register loadbinary_hip (#1151)
discard 1b2567b961 [Metal] Correct handle warning info (#1140)
discard 9d12f2845d add two more device properties (#1124)
discard fdacad2b4a [IR] Change pragma convention, enable pass unroll option via pragma (#1112)
discard f759c756d2 [RUNTIME] Fault tolerant vulkan init error (#1107)
discard 380e07995c Fix metal backward compatibility (#1105)
discard 73bb55ff33 [RPC] LocalSession to provide RPCSession back by local env (#1102)
discard 9cc4095418 Fix device name and Issue #874 (#1096)
discard 8c82906c89 Add SGXModule (#1019)
discard 554772a78a add device name to context attribute (#1090)
discard 0b540314ae Update halideIR, add more device query for shared memory (#1087)
discard 5f7be26fb4 Intel target added, sub group sync added (#1084)
discard 0c76445304 add query for shared memory size (#1083)
discard 076d75cbce fix warning (#1041)
discard a4a98cbf4e fix Android build w/ threading_backend (#1059)
discard df63d3ffea [TOPI] Overload operators of Tensor when TOPI is imported (#1029)
discard f1ea3c9c70 [SCHEDULE][PASS] Enable Warp memory and lower to shuffle (#1050)
discard 696e3a4507 [CONTRIB] Patch nnvcc to generate error when build the empty result (#1049)
discard 2b9d29dee4 LLVM 7.0 support (#1048)
discard b4243a5282 Fix fatal error <CL/opencl.h: No such file> when building with CMake (#1045)
discard aad518c62d [RUNTIME] better parallel launcher and task distribution (#1026)
discard 31c7957fa7 Implement C++ registry to back Python target.generic_func (#892)
discard e3daa3302f [RUNTIME] More reliable thread enumeration (#1017)
discard ca2b7c9c0a Simplify enclave lifecycle management (#1013)
discard 728b231f6b [PASS] Fix reuse small buffer in storage rewrite (#1012)
discard e0397c56ff [CONTRIB] windows compatiblity (#1009)
discard 6cd75690dd Pluggable Thread Launching Mechanism (#991)
discard cb9411e6ba [PASS] Add VerifyMemory pass and test cases (#410) (#993)
discard b0d60916a2 [BUILD] Windows build with cuDNN support (#999)
discard c716f6d6f3 [RUNTIME] Update graph runtime to rely on smarter planner, add get_input (#990)
discard 206e683b93 Bug fix for Android platforms (https://github.com/dmlc/tvm/pull/971) (#986)
discard d307f92523 [IOS] Improve the iOS RPC with exclusive filesys lock (#981)
discard ec80ba8f5a [RUNTIME] Better scalability for multi-thread parallelization of CPUs (#971)
discard c6d34612ee enhance access_ptr that args can support Expr (#970)
discard 248d11ce9e MPS conv (#822)
discard dc34371040 [CODEGEN] Fix alignment generation (#955)
discard ec01cb8e5e [RUNTIME] Stream API (#953)
discard 90acfa4f7d Better error message handling for contrib (#946)
discard 6e1438ac56 Fix compiler warnings (#939)
discard 26b59c49b2 Add test case: Create a static WebGL library and run it in the browser. (#932)
discard e140edcabd Name all the lock guards. (#938)
discard 47e7c1f199 TVM SGX (#919)
discard 78ed0b61c6 [EXT] Allow easy extraction of extern module (#926)
discard 01d626c60b Revert "[RUNTIME] Refactor extension type handling, now it is header only (#924)" (#925)
discard 7a9bf1df07 [RUNTIME] Refactor extension type handling, now it is header only (#924)
discard c6fbedc542 [PASS] Support buffer reuse for different types (#891)
discard 19194d4e1e [RUNTIME] More reliable runtime only detection (#914)
discard b243b41040 Change CodeGenCPU::GetPackedFuncHandle to generate global variable with InternalLinkage. (#901)
discard 8b83259311 [PASS] Prepare storage rewrite for unified buffer (#885)
discard b6edc723a2 [PASS] Enable StorageRewrite before virtual thread lowering (#880)
discard 61cc077def [WIP] Add OpenGL topi. (#836)
discard 13c2dd36ab [CODEGEN] Fix vector element access in metal (#872)
discard ec9b15e8b1 enhance pragma to support single point copy (#863)
discard a37d07fc8b Fix bugs with C++ TOPI flatten and relu (#869)
discard 983261be57 Fix Vulkan Build, add tanh to llvm instrinsic, fix halideIR (#868)
discard d2588bd970 Note about CodeGenC's Range of Use (#866)
discard 8a3b9b3938 Fix boolean type (#862)
discard 3828a22e05 [BACKEND] Vulkan Runtime and SPIRV Codegen (#861)
discard 9a1d7ae627 [RELEASE] Release note for 0.2 (#853)
discard ce6ecd0960 [TOPI] Fix cpp library dependency on MAC (#852)
discard 2feac25dc5 [PASS] Improve storage rewrite(#846) (#847)
discard ebfe44788d fixed #841 (#845)
discard 71cde22b47 Porting schedules (except convolutions) to C++ (#763)
discard a118732eb7 Add type code and bits to AllocWorkspace. (#831)
discard 2895168c3a [TIMER] Enhance time evaluator to create multiple results (#830)
discard 9d863a4c71 support using pointer with an original offset (#826)
discard 727bde3be0 [PASS] enhance storage_rewrite to support different dtypes for unified buffer (#805)
discard 9a6c566cab [OPENCL] Fix 32bit pointer size in OpenCL runtime (#809)
discard 31ebd1deed [WIP] WebGL Backend (#672)
discard 8513138f7b fix the description of create_shared (#793)
discard 629f33e4ad [CODEGEN] fix vector conversion for opencl (#783)
discard 4ca420ea44 [LLVM] Enable same target option in JITModule (#778)
discard 2d935a509b [INTRIN] enable popcount on cuda, opencl, metal (#774)
discard b56a60eede [PASS] Fix storage rewrite merge rule for special tag memory (#770)
discard 1bc7cb1dca [PASS] StorageRewrite Fold Inplace op storage when possible (#759)
discard dac3df740d [SCHEDULE]Improve bound deduce for loop partition (#743) (#755)
discard 84b11075bf [CODEGEN] use charp for voidp (#753)
discard 88098825c1 [CODEGEN] fix & improments in codegen (#745)
discard bf2a186570 enable partition const loop with build flag (#732)
discard 6f7f351252 [CODEGEN] update codegen for vector operation (#711)
discard 1211929e5e [CODEGEN] enable static handle cache (#723)
discard b8e7f5461c Update metal_module.mm
discard 044685589b Halide -> HalideIR (#698)
discard 4863f6575d Simplify expressions early on (#702)
discard 927f66c9a9 1) Make unroll code reusable 2) reduce non-determinisim in CanonicalSimplify (#701)
discard 880bc892f6 Fix long for windows in cuda (#700)
discard 91932641b5 [CODEGEN] add fp16 and fp64 enable pragma for opencl (#697)
discard 3992029bc7 Support rank-0 tensor (#687)
discard c9f66fd3a6 [CUDA] Enable int64 (#683)
discard c2321d2846 [PASS/SETUP] Fix minior issues (#663)
discard 8279131216 [RUNTIME] support limited save without cross compile (#659)
discard 1be5e05e79 Compat for opencl mode between cpu mode and gpu mode (#655)
discard 72dc9fb70c [UNROLL] New unroll option (#647)
discard 1f68e8b92b [CODEGEN] Enable closure with no argument (#635)
discard 07a2058ce3 [PASS] Update coproc sync (#634)
discard 8212c82af8 inline AMD GPU functions (#625)
discard 93ca3617f0 Support vector operations for AMD (llvm IR) (#623)
discard f767da8140 add tanh dispatch (#619)
discard bbc4be948b [DLPack] Upgrade dlpack to 0.2 (#609)
discard 046161ed7c [INTRIN] Enable popcount (#606)
discard 67a443981e [ROCM] remove fma dispatch (#591)
discard b87ad52202 [ROCM] View llvm ir and gcn asm with module.get_source(...) (#590)
discard 835cdf1b37 [BUFFER] Smarter slice to detect compactness (#587)
discard eb3d79eaa6 [CODEGEN] Fix CPU compute attribute (#582)
discard e56264d75e [PASS] More robust UnrollLoop configuratin (#576)
discard a6f6718b6d add friendly tips when not found cl and link (#574)
discard 8b84d7d007 [ROCM] Working math function support for ROCm backend, a bug fix in LLVM based codegen (#570)
discard 1f9e1b8794 [PYTHON] Improve equality wrapper (#567)
discard 7a506b2136 [PYTHON] Improve equal sugar (#564)
discard a49be4e8cc [CODEGEN] Use correct math intrin for metal (#562)
discard 6f94c26344 [CODEGEN] Allow link additional module (#559)
discard ff3ef46520 [CODEGEN] Bugfix multiple condition generation (#558)
discard bdd2dcba0b [CODEGEN] Force not inline compute core for better debug (#557)
discard 6453527a58 [Refactor] Introduce target generic dispatch system (#556)
discard ba11c2ac8e [CODEGEN] Detect broadcast(cast(x)) pattern in FMA (#551)
discard a56a5022f3 Add same_as to NodeBase (#550)
discard f9cbb8012c added support for rocm gpu autodetect (#549)
discard 12f574b1b2 add msvc in cc (#531)
discard b26e04e442 [CODEGEN] Skip unrolled hint, export symbol on win32 (#547)
discard cf162cd2b6 [TOPI] Fix declaration for different dtypes (#546)
discard bcca95b2f0 fixed rocm runtime. set default gcn arch to be gfx803 (#544)
discard ab49a74058 [RUNTIME] Enable ext_dev type for quick plugin of device (#542)
discard e292784e7e [PASS] copy intrin (#536)
discard 2e1b5088e9 Case-sensitive CMake module for OpenCL (#537)
discard 7204f49688 [ARITH] Improve detect linear equation (#529)
discard 9448d31c44 Use LIB_SUFFIX (#526)
discard a9b03198a3 [BUILD] Windows support of DLL exports (#522)
discard ec7fa92a4a [CMAKE] Fix cmake build (#520)
discard 160eda3d0e [CODEGEN] More robust llvm intrin handling, remove graph executor (#519)
discard a1668ca63c [RUNTIME] Better error message in cuda launch (#513)
discard e3fbd5367c [LANG] Support for Bitwise Operation (#502)
discard 196222f15a [UTILS] Move target to tvm; rename convolution as conv2d (#492)
discard ee308b840f [CUDA] auto detect compatibility when arch is not passed (#490)
discard 0cb367f520 [ARITH] More robust int set checking (#487)
discard ea5290b842 [DOC][BUILD] Fix cmake and docs (#485)
discard 8f1c12c6ae [RUNTIME] Minimum graph runtime (#484)
discard a809c9da43 [BASE] Make macro namespace angostic (#480)
discard 5eae7f4423 [INTRIN] Enable pow (#471)
discard fef5bf147f [CODEGEN] Fix Metal codegen when storage scope is needed (#469)
discard 960f2f2a79 More on source reference (#466)
discard 31db3cb157 Acknowledge related projects (#465)
discard 23f97768ce [RUNTIME][PYTHON] More compatibility in ndarray (#463)
discard 4903907b84 [METAL] use 32bit indexing for metal until we have a bound adapted pass (#462)
discard d07a3fb2ff [PASS] Fix intrinsic lowering with fma and other intrin (#457)
discard 0b365c3d80 [BACKEND] initial llvm codegen for amdgpu (#402)
discard 4fe81dda55 [RUNTIME] Add function to pack arguments (#452)
discard 0cdd7c673a [RUNTIME] Enable extension type to PackedFunc. (#447)
discard 6b5c10d5d1 [RUNTIME][RPC] Enable remote linking of device code. (#444)
discard 3fb23fc43c [LLVM] Protect ll when emit pass (#436)
discard 71b73cf8a0 [METAL][RUNTIME] Fix bug of memcpy into metal buffer (#428)
discard 6acc980b44 [PYTHON] Allow general types (#425)
discard 11dafbd8fc [TEST] Add memoize to save test data (#424)
discard b5c8db87bd [BUILD] Improve build instruction with llvm. (#422)
discard d63d53093e [SETUP] Always use relpath for setup (#421)
discard c20b6806ed [PASS] Improve vthread injection. (#411)
discard 45a4a08473 [BACKEND] Explicitly allow specialization of FMA in llvm (#407)
discard eb465f8777 [PASS] InjectDoubleBuffer (#405)
discard 18aba00f0e [BACKEND] Allow nvptx to pass ll ir to CUDAModule (#404)
discard e117b79cb9 [PASS] IRTransform to enable IR pass proptype in python (#401)
discard 84ede2943f [SCHEDULE][PASS] support storage_align of certain axis (#400)
discard e1a9b14599 [CODEGEN] Multiple parallel in one launch (#399)
discard 8348885a5d [CODEGEN] NVPTX backend. (#392)
discard ae47a6c3c0 [RUNTIME] v2: runtime support for rocm (#386)
discard 8c8d667331 [APP] Android RPC (#359)
discard 693d4cc979 [CODEGEN][LLVM] Refactor cpu runtime related code to CodeGenCPU (#361)
discard 597584e4bd [iOS] Better RPC guide and bug fix (#357)
discard b156b4ffd0 [BUILD][LLVM] Support LLVM mainline 5.0 6.0 (#356)
discard 13dd5e1bf5 [Python] Dist wheel tools (#348)
discard 86c0e83ca4 Fix CUDA library search (#339)
discard e4da9c3f48 Allow install-dev to include all necessary header files (#338)
discard d6d0574178 [PASS] RewriteUnsafeSelect lowers unsafe select to condition expr (#335)
discard aa04c79978 [Contrib] CuDNN v7 Support (#311)
discard 36627369a6 [TOPI] Isolate padding option, improve decl of depthwise/conv2d/pool (#332)
discard ea3cde968e [TOPI] Add broadcast and reduce operators (#267)
discard 7b01f51a39 [PASS][PRAGMA] Allow pragma debug_skip_region to skip region of computation (#318)
discard ab17733c1f [PASS] Memory barrier detection, storage access lower. (#317)
discard 39be98eb02 [TEST] Upgrade gpu docker to cudnn7 (#306)
discard 576dd071f9 [PASS] Allow allocation in parallel scope (#305)
discard e0d18afad8 [PASS][RUNTIME] Support attr scope lift and runonce (#303)
discard 7908ceda62 [RUNTIME][PASS] Allow declare vector type array (#302)
discard 7b133cdba7 [SCHEDULE][RUNIME] Introduce pragma for additional extension hint, threadpool runtime. (#299)
discard 7e35854e97 [PASS] More storage sync. (#297)
discard e0de790846 [PASS] Refactor thread storage sync to a common visitor (#296)
discard 7fc6d14ca2 [ARITH] Refactor intset eval with functor (#295)
discard 08a8c165b8 Conda build recipe (#288)
discard ddcf159c83 [PASS] Simplify dependency of StorageRewrite (#291)
discard 04ad349c9c Build system and dynamic library fixes (#283)
discard f26c0e73bd Fix issue relating to serialization of reducer (#282)
discard a96168506b [BUILD] rename build.py to avoid conflict name of build (#284)
discard 90bfdc249e [BUILD] Fix osx compilation (#271)
discard 45acd4eb16 [BUGFIX] Fix CanonicalSimplify change type of int constant (#269)
discard cb45172b88 [STORAGE][BUFFER] Support access ptr for clear access pattern. (#266)
discard 5554dde689 [LANG] Add reflection routine to construct node (#265)
discard 264c5c313d [RPC] IOS RPC (#261)
discard 4b436c2b6f [RUNTIME] Enable injection of some core runtime functions to avoid dynamic lookup (#260)
discard 408a860385 [API] Prefetch schedule supported (#258)
discard 0ec936f24b [RPC] Allow RPCServer to run without decorator (#257)
discard e5e7d11028 [PASS] CombineContextCall (#255)
discard 24d2b6e396 [PASS] Add storage alignment info to heap allocated data (#254)
discard 8b727b32ba [CODEGEN] Generate main compute function separately with alias info (#253)
discard 49df927b10 [EXECUTOR] Enable load executor remotely (#245)
discard 30a3c19275 [DOC] Make range related function consistent (#249)
discard 400666e268 [RENAME] nvcc_compiler->nvcc, cc_compiler->cc, metal_compiler->xcode (#248)
discard 5722640ea8 [DOC] Fix doxygen comments (#247)
discard ac165b429b [INTRIN] prefetch support (#246)
discard 19b6c6b7ae [REFACTOR] collections->container, RPC returns func, time_evaluator r… (#244)
discard 84de38f327 [RUNTIME] Fix Metal runtime compile (#241)
discard e6e75d6b4d [JS][WEB][BACKEND] Javascript(webassembly) backend. (#239)
discard d5eb26f739 [RUNTIME][ABI] Flat structure arguments (#232)
discard 4b96fbad5f [TEST] Add scipy to test dep (#231)
discard fe1bfe7142 [RUNTIME] Add workspace pool (#229)
discard f9afabc0a7 [RUNTIME] Add System Lib (#227)
discard a4bc8b16d1 [SCHEDULE] tensorize (#223)
discard be5a5de989 [C API] Make DSL API registerable, add copy from/to raw bytes (#222)
discard 21d4275992 [CODEGEN/PASS] add restricted, alignment option (#221)
discard b2d8d2e7ce [IR] Add body to AssertStmt (#220)
discard 91d1ee4b4f [TAG] Add tvm.tag module for tagging operator (#217)
discard a52493107b [PASS/OP/REFACTOR] IRDeepCompare, isolate computeop part, allow fuzzy bind (#218)
discard 35e9aea948 [REFACTOR/PASS] Formalize argument bind and match util (#214)
discard 2255c2b927 [BUFFER/REFACTOR] Buffer byte_offset-> elem_offset, add buffer_bind_scope (#209)
discard 597da4bd0c [CODEGEN] Concise typecast for threadIdx (#208)
discard 907f7a6b64 [LANG/BUFFER] Change buffer arguments to match DLPack order, add scope (#203)
discard ad482fe64d [INTRINSIC] Add sqrt (#202)
discard 3d3a60e08e [OP] Initial Stucture of Op Library (#198)
discard b5654d3c02 [LANG] Add all and any in the python API (#196)
discard 8b41e63b69 [LANG] Expose tvm.cast (#195)
discard add37906cc [CODEGEN] Make codegen registerable (#193)
discard 0ad03b94fc [IR] Include PrefetchIR (#189)
discard a0885673da [LLVM] More optimized option, allow emit assembly (#187)
discard e1a692beac [CODEGEN] More storage alignment info aware generation (#186)
discard 704e1a277c [RUNTIME] Move device_api to include (#185)
discard 730ea88a9b [TUTORIAL] Cross Compilation and RPC (#184)
discard 2ecef2e264 [MODULE] support load back of .ll file into llvm module (#183)
discard bd0a5f321e Support for Tuple Inputs of Reducer and ComputeOp (#175)
discard 534bdfde59 [MODULE/RUNTIME] Remove Precompile, simplify module (#174)
discard 970a593a62 [BUILD/CODEGEN] Allow combine multiple functions in build stage. (#169)
discard c3aebf3f73 [PERF/TIMER] Add builtin timing logic (#168)
discard f70c47b258 [PASS] Refactor build config, allow implicit unroll pragma (#167)
discard 252a9e0008 [CODEGEN] Change default max_auto_unroll from 256 to 32 (#164)
discard 36963623d7 [EXAMPLE/PYTHON] Improve extension type, add operator lib (#162)
discard 895bea8ece [BUILD] Enable RTTI of most part of library, example extension pkg. (#161)
discard 7afd311dfa [CODEGEN/RUNTIME] Cross Compile Test (#160)
new f1677441a7 [CODEGEN/RUNTIME] Cross Compile Test (#160)
new 07727a642b [BUILD] Enable RTTI of most part of library, example extension pkg. (#161)
new b565480c2f [EXAMPLE/PYTHON] Improve extension type, add operator lib (#162)
new e8f7c6a3f6 [CODEGEN] Change default max_auto_unroll from 256 to 32 (#164)
new 7686a72e77 [PASS] Refactor build config, allow implicit unroll pragma (#167)
new 6f5305d201 [PERF/TIMER] Add builtin timing logic (#168)
new 57dd5b3006 [BUILD/CODEGEN] Allow combine multiple functions in build stage. (#169)
new 212504d361 [MODULE/RUNTIME] Remove Precompile, simplify module (#174)
new c94ea346d3 Support for Tuple Inputs of Reducer and ComputeOp (#175)
new bc9f5d1dad [MODULE] support load back of .ll file into llvm module (#183)
new d08a1d194d [TUTORIAL] Cross Compilation and RPC (#184)
new 859ae478bf [RUNTIME] Move device_api to include (#185)
new 0da41ab490 [CODEGEN] More storage alignment info aware generation (#186)
new 279f6826bf [LLVM] More optimized option, allow emit assembly (#187)
new 02c50e2551 [IR] Include PrefetchIR (#189)
new dc1bba59af [CODEGEN] Make codegen registerable (#193)
new 011b94503c [LANG] Expose tvm.cast (#195)
new 6c1379eb19 [LANG] Add all and any in the python API (#196)
new cc3dc1965f [OP] Initial Stucture of Op Library (#198)
new ebf856c1d4 [INTRINSIC] Add sqrt (#202)
new eb404db9b0 [LANG/BUFFER] Change buffer arguments to match DLPack order, add scope (#203)
new 07b399c4cc [CODEGEN] Concise typecast for threadIdx (#208)
new cf2e7e23bd [BUFFER/REFACTOR] Buffer byte_offset-> elem_offset, add buffer_bind_scope (#209)
new 07fdb511fe [REFACTOR/PASS] Formalize argument bind and match util (#214)
new dd5587d622 [PASS/OP/REFACTOR] IRDeepCompare, isolate computeop part, allow fuzzy bind (#218)
new cf514eb123 [TAG] Add tvm.tag module for tagging operator (#217)
new fcd4f87074 [IR] Add body to AssertStmt (#220)
new 6a620dd7ea [CODEGEN/PASS] add restricted, alignment option (#221)
new c59cff1209 [C API] Make DSL API registerable, add copy from/to raw bytes (#222)
new 49e5a7a387 [SCHEDULE] tensorize (#223)
new c1ad9825d4 [RUNTIME] Add System Lib (#227)
new 56c284eac2 [RUNTIME] Add workspace pool (#229)
new 004562dbf2 [TEST] Add scipy to test dep (#231)
new 5141414f2e [RUNTIME][ABI] Flat structure arguments (#232)
new 0fad9954d0 [JS][WEB][BACKEND] Javascript(webassembly) backend. (#239)
new 1e0ac2f794 [RUNTIME] Fix Metal runtime compile (#241)
new 3dbdcda090 [REFACTOR] collections->container, RPC returns func, time_evaluator r… (#244)
new 66903db182 [INTRIN] prefetch support (#246)
new 26619a0a95 [DOC] Fix doxygen comments (#247)
new c1593704f9 [RENAME] nvcc_compiler->nvcc, cc_compiler->cc, metal_compiler->xcode (#248)
new 1c9d40684a [DOC] Make range related function consistent (#249)
new f943de9fdb [EXECUTOR] Enable load executor remotely (#245)
new f8c40ddf2a [CODEGEN] Generate main compute function separately with alias info (#253)
new 25795b504c [PASS] Add storage alignment info to heap allocated data (#254)
new 50ff26dbd8 [PASS] CombineContextCall (#255)
new 5628ba06d0 [RPC] Allow RPCServer to run without decorator (#257)
new 2576f86a23 [API] Prefetch schedule supported (#258)
new d6e07d15b5 [RUNTIME] Enable injection of some core runtime functions to avoid dynamic lookup (#260)
new c81d941a2d [RPC] IOS RPC (#261)
new 023500b5e4 [LANG] Add reflection routine to construct node (#265)
new 1b57199589 [STORAGE][BUFFER] Support access ptr for clear access pattern. (#266)
new 48263272b9 [BUGFIX] Fix CanonicalSimplify change type of int constant (#269)
new ea2cff68ab [BUILD] Fix osx compilation (#271)
new 1f8d39bed0 [BUILD] rename build.py to avoid conflict name of build (#284)
new 72f2f50742 Fix issue relating to serialization of reducer (#282)
new 94d397b7b7 Build system and dynamic library fixes (#283)
new 66d5e76044 [PASS] Simplify dependency of StorageRewrite (#291)
new 56855928c9 Conda build recipe (#288)
new e6e758f751 [ARITH] Refactor intset eval with functor (#295)
new a6ad911af6 [PASS] Refactor thread storage sync to a common visitor (#296)
new bacfb39add [PASS] More storage sync. (#297)
new 9df5933fcd [SCHEDULE][RUNIME] Introduce pragma for additional extension hint, threadpool runtime. (#299)
new 66a8681584 [RUNTIME][PASS] Allow declare vector type array (#302)
new 297af7c888 [PASS][RUNTIME] Support attr scope lift and runonce (#303)
new 2ef240f5d4 [PASS] Allow allocation in parallel scope (#305)
new 40b38db5bb [TEST] Upgrade gpu docker to cudnn7 (#306)
new 655b6ac9b5 [PASS] Memory barrier detection, storage access lower. (#317)
new 1f0dfa20d2 [PASS][PRAGMA] Allow pragma debug_skip_region to skip region of computation (#318)
new 7ba4ff1bb7 [TOPI] Add broadcast and reduce operators (#267)
new 18ef19b3fd [TOPI] Isolate padding option, improve decl of depthwise/conv2d/pool (#332)
new c985551a34 [Contrib] CuDNN v7 Support (#311)
new e901dcf855 [PASS] RewriteUnsafeSelect lowers unsafe select to condition expr (#335)
new 954342892b Allow install-dev to include all necessary header files (#338)
new dcbef5fce2 Fix CUDA library search (#339)
new 4e5000d5c7 [Python] Dist wheel tools (#348)
new c8ee325c66 [BUILD][LLVM] Support LLVM mainline 5.0 6.0 (#356)
new a97d0740eb [iOS] Better RPC guide and bug fix (#357)
new b8007d14f9 [CODEGEN][LLVM] Refactor cpu runtime related code to CodeGenCPU (#361)
new 6e57d18017 [APP] Android RPC (#359)
new ea0c965e10 [RUNTIME] v2: runtime support for rocm (#386)
new d478d90f16 [CODEGEN] NVPTX backend. (#392)
new 487290819c [CODEGEN] Multiple parallel in one launch (#399)
new e7c03ff702 [SCHEDULE][PASS] support storage_align of certain axis (#400)
new 16729467e2 [PASS] IRTransform to enable IR pass proptype in python (#401)
new 514e8217aa [BACKEND] Allow nvptx to pass ll ir to CUDAModule (#404)
new 320e665d9e [PASS] InjectDoubleBuffer (#405)
new bdf97febb3 [BACKEND] Explicitly allow specialization of FMA in llvm (#407)
new 435870bc70 [PASS] Improve vthread injection. (#411)
new 9d30369f73 [SETUP] Always use relpath for setup (#421)
new 6ef7628d17 [BUILD] Improve build instruction with llvm. (#422)
new 42351e7b7b [TEST] Add memoize to save test data (#424)
new fb1ac1f1b0 [PYTHON] Allow general types (#425)
new 54998bf21b [METAL][RUNTIME] Fix bug of memcpy into metal buffer (#428)
new 027bd377f9 [LLVM] Protect ll when emit pass (#436)
new 3c973924e3 [RUNTIME][RPC] Enable remote linking of device code. (#444)
new 26698296e2 [RUNTIME] Enable extension type to PackedFunc. (#447)
new 2ea845a2b1 [RUNTIME] Add function to pack arguments (#452)
new 316c8b23ee [BACKEND] initial llvm codegen for amdgpu (#402)
new 9b6c812cf4 [PASS] Fix intrinsic lowering with fma and other intrin (#457)
new 30c62327c4 [METAL] use 32bit indexing for metal until we have a bound adapted pass (#462)
new 073e0ef000 [RUNTIME][PYTHON] More compatibility in ndarray (#463)
new 4e07d413e2 Acknowledge related projects (#465)
new c95ba9e3d8 More on source reference (#466)
new 1540ee66d4 [CODEGEN] Fix Metal codegen when storage scope is needed (#469)
new 0d1f0d0df2 [INTRIN] Enable pow (#471)
new 400812d159 [BASE] Make macro namespace angostic (#480)
new 603af3a682 [RUNTIME] Minimum graph runtime (#484)
new 2dfb354a0d [DOC][BUILD] Fix cmake and docs (#485)
new af5c6ae08d [ARITH] More robust int set checking (#487)
new 35dde27e24 [CUDA] auto detect compatibility when arch is not passed (#490)
new 98bbf3b707 [UTILS] Move target to tvm; rename convolution as conv2d (#492)
new 19f03a7e1b [LANG] Support for Bitwise Operation (#502)
new 28446f5466 [RUNTIME] Better error message in cuda launch (#513)
new cbf562fc0c [CODEGEN] More robust llvm intrin handling, remove graph executor (#519)
new 806141c534 [CMAKE] Fix cmake build (#520)
new ddbd649322 [BUILD] Windows support of DLL exports (#522)
new 12fca5570b Use LIB_SUFFIX (#526)
new 25c51a056b [ARITH] Improve detect linear equation (#529)
new cccb5238b7 Case-sensitive CMake module for OpenCL (#537)
new dc8ea925e5 [PASS] copy intrin (#536)
new 3f46103abd [RUNTIME] Enable ext_dev type for quick plugin of device (#542)
new 13bc8a92f9 fixed rocm runtime. set default gcn arch to be gfx803 (#544)
new 4b427aa1d9 [TOPI] Fix declaration for different dtypes (#546)
new 7548811599 [CODEGEN] Skip unrolled hint, export symbol on win32 (#547)
new b863e72c9b add msvc in cc (#531)
new e73b00f388 added support for rocm gpu autodetect (#549)
new a266748031 Add same_as to NodeBase (#550)
new a84da55912 [CODEGEN] Detect broadcast(cast(x)) pattern in FMA (#551)
new be02fa8f20 [Refactor] Introduce target generic dispatch system (#556)
new 57dd2670b9 [CODEGEN] Force not inline compute core for better debug (#557)
new b166b09268 [CODEGEN] Bugfix multiple condition generation (#558)
new 133aa5babc [CODEGEN] Allow link additional module (#559)
new 6ddc6213e8 [CODEGEN] Use correct math intrin for metal (#562)
new 055e3ba54e [PYTHON] Improve equal sugar (#564)
new 4095f418c6 [PYTHON] Improve equality wrapper (#567)
new 307e0eb08f [ROCM] Working math function support for ROCm backend, a bug fix in LLVM based codegen (#570)
new f2d20f7fa0 add friendly tips when not found cl and link (#574)
new c4acc3176b [PASS] More robust UnrollLoop configuratin (#576)
new cc3f43ddf9 [CODEGEN] Fix CPU compute attribute (#582)
new da457c1208 [BUFFER] Smarter slice to detect compactness (#587)
new 22aa3bd8cb [ROCM] View llvm ir and gcn asm with module.get_source(...) (#590)
new 92ab86ea1b [ROCM] remove fma dispatch (#591)
new cf6b9defe9 [INTRIN] Enable popcount (#606)
new 58890bd008 [DLPack] Upgrade dlpack to 0.2 (#609)
new 448942208b add tanh dispatch (#619)
new 5711c59563 Support vector operations for AMD (llvm IR) (#623)
new 1332cb114b inline AMD GPU functions (#625)
new 5e170a473c [PASS] Update coproc sync (#634)
new 5cd7536949 [CODEGEN] Enable closure with no argument (#635)
new 395016bb6a [UNROLL] New unroll option (#647)
new c07f506435 Compat for opencl mode between cpu mode and gpu mode (#655)
new d7b15c0364 [RUNTIME] support limited save without cross compile (#659)
new 44d5987d87 [PASS/SETUP] Fix minior issues (#663)
new 93c2e1f372 [CUDA] Enable int64 (#683)
new 413b3868c1 Support rank-0 tensor (#687)
new e355655604 [CODEGEN] add fp16 and fp64 enable pragma for opencl (#697)
new a796376b56 Fix long for windows in cuda (#700)
new e9461d275c 1) Make unroll code reusable 2) reduce non-determinisim in CanonicalSimplify (#701)
new b203f6fe00 Simplify expressions early on (#702)
new 4dc4fef194 Halide -> HalideIR (#698)
new 1b95d061c6 Update metal_module.mm
new 7797c2db34 [CODEGEN] enable static handle cache (#723)
new ff3248d180 [CODEGEN] update codegen for vector operation (#711)
new 6d0f025fbe enable partition const loop with build flag (#732)
new e1163eacb9 [CODEGEN] fix & improments in codegen (#745)
new 50faaacf42 [CODEGEN] use charp for voidp (#753)
new 8e5765b3a3 [SCHEDULE]Improve bound deduce for loop partition (#743) (#755)
new f0993b7cf3 [PASS] StorageRewrite Fold Inplace op storage when possible (#759)
new ca6e2f8d8e [PASS] Fix storage rewrite merge rule for special tag memory (#770)
new 9d973e86e4 [INTRIN] enable popcount on cuda, opencl, metal (#774)
new d73c60b8a7 [LLVM] Enable same target option in JITModule (#778)
new 110e280e23 [CODEGEN] fix vector conversion for opencl (#783)
new ab917e8e8c fix the description of create_shared (#793)
new 32cb6e37fc [WIP] WebGL Backend (#672)
new be9a753ecc [OPENCL] Fix 32bit pointer size in OpenCL runtime (#809)
new b38981c229 [PASS] enhance storage_rewrite to support different dtypes for unified buffer (#805)
new 650d003543 support using pointer with an original offset (#826)
new dce8c597ac [TIMER] Enhance time evaluator to create multiple results (#830)
new d6666178fc Add type code and bits to AllocWorkspace. (#831)
new e8a4a4b33c Porting schedules (except convolutions) to C++ (#763)
new 0ab1903770 fixed #841 (#845)
new 2fd4b85d86 [PASS] Improve storage rewrite(#846) (#847)
new 462bad58b4 [TOPI] Fix cpp library dependency on MAC (#852)
new 1d9363e40f [RELEASE] Release note for 0.2 (#853)
new d42bfdf78c [BACKEND] Vulkan Runtime and SPIRV Codegen (#861)
new 4a60238acc Fix boolean type (#862)
new 7e94b337d3 Note about CodeGenC's Range of Use (#866)
new d7c2a0f5b5 Fix Vulkan Build, add tanh to llvm instrinsic, fix halideIR (#868)
new 55a9690815 Fix bugs with C++ TOPI flatten and relu (#869)
new f79acd00c9 enhance pragma to support single point copy (#863)
new 0aff6ba874 [CODEGEN] Fix vector element access in metal (#872)
new 0d8d6326ad [WIP] Add OpenGL topi. (#836)
new a05a100546 [PASS] Enable StorageRewrite before virtual thread lowering (#880)
new ccbff6d19f [PASS] Prepare storage rewrite for unified buffer (#885)
new 1716bde2a1 Change CodeGenCPU::GetPackedFuncHandle to generate global variable with InternalLinkage. (#901)
new 7022bd448f [RUNTIME] More reliable runtime only detection (#914)
new 4ffadd5c43 [PASS] Support buffer reuse for different types (#891)
new 8958046309 [RUNTIME] Refactor extension type handling, now it is header only (#924)
new 22cf51d1c7 Revert "[RUNTIME] Refactor extension type handling, now it is header only (#924)" (#925)
new 39487ddfb0 [EXT] Allow easy extraction of extern module (#926)
new c491b843b6 TVM SGX (#919)
new 90a63e06b1 Name all the lock guards. (#938)
new a99c53f378 Add test case: Create a static WebGL library and run it in the browser. (#932)
new f93eb15e97 Fix compiler warnings (#939)
new 8f314d4754 Better error message handling for contrib (#946)
new c95f759d4f [RUNTIME] Stream API (#953)
new bb4a33ff41 [CODEGEN] Fix alignment generation (#955)
new 59924441e6 MPS conv (#822)
new 6655aa6acf enhance access_ptr that args can support Expr (#970)
new fa09e62656 [RUNTIME] Better scalability for multi-thread parallelization of CPUs (#971)
new 26f60c733b [IOS] Improve the iOS RPC with exclusive filesys lock (#981)
new 944bebbc6c Bug fix for Android platforms (https://github.com/dmlc/tvm/pull/971) (#986)
new 805179626b [RUNTIME] Update graph runtime to rely on smarter planner, add get_input (#990)
new 4cbf0b27cf [BUILD] Windows build with cuDNN support (#999)
new 499ea19e31 [PASS] Add VerifyMemory pass and test cases (#410) (#993)
new 9942dc3543 Pluggable Thread Launching Mechanism (#991)
new a0c2dc0614 [CONTRIB] windows compatiblity (#1009)
new 85203e2875 [PASS] Fix reuse small buffer in storage rewrite (#1012)
new 6d2fd67a68 Simplify enclave lifecycle management (#1013)
new 441adf328b [RUNTIME] More reliable thread enumeration (#1017)
new 4e9cca3a3d Implement C++ registry to back Python target.generic_func (#892)
new 0ff1d89c96 [RUNTIME] better parallel launcher and task distribution (#1026)
new a101c804dd Fix fatal error <CL/opencl.h: No such file> when building with CMake (#1045)
new 01c5dcb505 LLVM 7.0 support (#1048)
new 98e261259e [CONTRIB] Patch nnvcc to generate error when build the empty result (#1049)
new 1e53002a81 [SCHEDULE][PASS] Enable Warp memory and lower to shuffle (#1050)
new 4b8e23fab5 [TOPI] Overload operators of Tensor when TOPI is imported (#1029)
new 5c25ab9b75 fix Android build w/ threading_backend (#1059)
new d8de6a13b0 fix warning (#1041)
new aa7571feff support string option when create cuda/rocm/... target (#1071)
new f27f119dd3 add query for shared memory size (#1083)
new 59d4cfe514 Intel target added, sub group sync added (#1084)
new de3a024169 Update halideIR, add more device query for shared memory (#1087)
new 9d9a435dfa Make target and build module more pythonic (#1089)
new 6bd18e2dd4 add device name to context attribute (#1090)
new 18251f3cf4 Add SGXModule (#1019)
new b7a320301d Fix device name and Issue #874 (#1096)
new f5f3a91ab8 [RPC] LocalSession to provide RPCSession back by local env (#1102)
new 6cec206c6a Fix metal backward compatibility (#1105)
new 9420ceef23 [RUNTIME] Fault tolerant vulkan init error (#1107)
new 3e89874afd [IR] Change pragma convention, enable pass unroll option via pragma (#1112)
new b609309a40 add two more device properties (#1124)
new 0cd0549f44 [Metal] Correct handle warning info (#1140)
new 7b21365d6d register loadbinary_hip (#1151)
new d4afaea49a [CODEGEN] Enable cross compile of AMDGPU without rocm, update rpc (#1154)
new 1762b75dde make ThreadPool thread local (#1152)
new 2552f0363e Fix error during running on nvptx with cuda9 (#1162)
new e3765ce545 [llvm] fixed issue with llvm 5 vs 6 (#1167)
new d839f3436c change version number (#1175)
new be3f99ec38 [DOCS] documentation merge
new 72682b486b [DOCS] Improve docs naming, fix docs warnings
new 3f60c5a0f7 [RUNTIME] update to make runtime copy type aware
new 0a453592c0 Fix compilation failure with latest LLVM (#1208)
new f684ca3429 [Metal] Fix block launching parameter (#1219)
new 7998d5b5d7 add test to irbuilder for gpu execution (#1228)
new d0e7a28d90 fix extern naming (#1238)
new 2d3cef8989 Unite cmake builds (#1248)
new 6956d57db8 [BUILD] Switch to CMake only Infra (#1254)
new e47a6d02d8 Fix the building error in android_deploy (#1262)
new 6f97eaaa12 [INTRIN] Add support for floor and ceil (#1267)
new 87136b975f [CODEGEN] ARM Popcount lowering rule and codegen updates (#1235)
new 0427c71828 [BUILD] Enable path option for ROCM, CUDA, Vulkan, simplify optional build (#1270)
new cc047c1670 [BUILD] Add clang to build matrix, -Werror (#1273)
new e4e79242c3 Fix missing cublas libraries (#1281)
new 2e46a5abfd Link system library needed for LLVM (#1282)
new 3dbc922996 [CONTAINER] Introduce StrMap (#1292)
new 98ed0cadd4 [DOCS] Improve review guide, improve cmake llvm build (#1295)
new 34b521bc45 Check common subdirs for vulkan/spirv headers (#1298)
new bdf0837907 [BUILD] Fix reflection build for gcc-8 (#1304)
new 1dac37e9c5 [MATH][TOPI][NNVM] introduce trunc, round (#1310)
new f77972fed2 [TOPI] Conv2d Added and Optimized for Intel HD Graphics (#1290)
new 04c1a9ccae [TOPI] Numpy consistency: always broadcast binary op. (#1321)
new b84dd16037 Import hybrid module in __init__.py (#1323)
new 8bb8c9b9c4 [PASS] Add GPU IR verifier (#1296)
new 90750a3287 Contrib: add mkl blas support (#1336)
new 3404f34a66 Add support for Xilinx FPGA board with SDAccel (#1278)
new e7354a248c Fix cmake search for vulkan on Windows (#1343)
new a515d1b991 [RUNTIME] keep opencl runtime deps free from node (#1349)
new 0438713a1e [PYTHON] Make decorator optional for runtime (#1350)
new 1e98cef307 update include regex to work for path with symbol (#1354)
new 40dd3eef66 fix narrow conversion on gcc-8 (#1376)
new 855f6cafd0 [NVPTX] libdevice support, enable NVPTX backend in topi tests (#1365)
new 3f2049ad7e Fixing issue #1395: Undefined symbol: cudaGetDevice (#1396)
new 186f92baaa Add support for multiple OpenCL platforms (#1345)
new 87df7728cd [RUNTIME][OPENCL] Create program lazily when the program is built (#1408)
new 39c0c7d1c1 [TVM] Fixed SPIR-V codegen incorrectly not declaring the interface for the entry point (#1400)
new bec40886a2 [RPC] graduate tvm.contrib.rpc -> tvm.rpc (#1410)
new 0381842fa6 [TVM] Fixed SPIR-V codegen for OpControlBarrier (#1409)
new 6fbbe5b403 [OP] Improve bitwise op type checks (#1415)
new 110a90addb [RUNTIME] Simple NDArray container API in c++ (#1418)
new d788cce46a [BUILD][DOCS] Migrate VTA CI, test, build, docs
new fd85c906c8 Added option to build android rpc app with vulkan support
new 18fd8a53f3 [RUNTIME] Support setting CPU affinity (#1403)
new 35ba5557d5 [AUTOTVM] Core part of auto-tuning module (#1312)
new ba132e85c5 Add support for absolute opeartion (#1406)
new 19ff4f0744 [BUILD] enhance vta build (#1434)
new a2a62d9baf Fix cmake for building with cuda in msvc (#1437)
new 88b9a91225 [RUNTIME][OPENCL] show correct device type name (#1441)
new 3255705aaa [BUILD] restrict runtime include headers (#1444)
new bedcef2f7b Fix conda package builds (#1445)
new 8677ce389f use SetAffinity when logical cores > physical cores (hyperthreading) (#1453)
new 3309bd760f [NODE][REFLECTION] Support NDArray as field (#1452)
new acd560ab69 [CUDA] FP16 support (#1413)
new 0d7df6bd8e [TOPI] Bitserial low-precision convolution (#1332)
new 1f17cca4c6 [BUILD] Fix LLVM static/dynamic link issue (#1461)
new 349df9dda4 [IR] support general type annotation. (#1480)
new 56fd2dd78d [CODEGEN] Enable inline llvm asm code (#1486)
new 109e4a167b [BUILD] warning fix: new does not have an alignment parameter (#1478)
new f9f9c2cf3a Add initial support for Intel FPGA SDK for OpenCL (AOCL) (#1474)
new 1ec8772ce4 [TVM][CUDA] NVIDIA GPU Int8 Support (#1503)
new 63ea3a5da5 Fix a testcase name in test_codegen_cuda (#1526)
new 0cc71d8e34 [AUTOTVM] TOPI integration for ARM CPU (#1487)
new 77f9cb1e56 add tvm external registry entrypoint (#1562)
new bb8937521f Use int for int8x4 due to performance overhead of char4 (#1569)
new a648f423e0 DLPack Conversion API (#1573)
new 723e59504b [RUNTIME] Refactor to enable stackvm in runtime. (#1588)
new 485f3510b3 [DLPACK] Enable cython support (#1589)
new b68bf22812 [RUNTIME] Enable return NDArray in RPC (#1610)
new efe9c21a74 #1592 [PASS] Fix missing mem CHECK in storage_rewrite (#1616)
new 2d8138f6bc [NODEREF] Introduce named attribute system. (#1618)
new fb086c651f [VERSION] Update to 0.5.dev (#1623)
new 6ada2ea358 [ATTRS] change AttrFiledInfo->Node (#1634)
new 4c73d1d95b Remove leading "./" from include paths (#1640)
new 00629648ad [RUNTIME] [OPENCL] Fix access modifiers (#1643)
new 8f7888bd42 [PYTHON] Enable constructors in Node (#1647)
new 4928a785cb [NODE] Enable global singleton object, allow set_body_typed in function registry, default fallback of IRPrinter. (#1652)
new dba84994a0 [LANG] Improve serializer (#1658)
new f25d24c842 [RUNTIME][OPENCL] delay device check (#1657)
new a23c969c5b [CUDA][TVM] fix constructing invalid command line string for nvcc (#1674)
new 1f934c2115 [AUTOTVM][TOPI] Use tunable templates for GPU (CUDA/OpenCL/ROCm/Mali) (#1638)
new 3d28aebb7b [RUNTIME][API] Graph runtime API enahncement to support NDArray (#1659)
new 203d05672f [NODE] Enable EnvFunc to serialize global function as node (#1721)
new ea96a2b9cb [NNVM][TOPI] Add mean and product operators (#1628)
new dc5d437072 [CODEGEN] Fix let expression (#1727)
new 2dc1a3aba9 [High level OPT][RFC] NNVMv2 IR - Relay (#1672)
new 126be9e04b [NODE] Node base system refactor (#1739)
new c0bf6ecef9 [NODE][RELAY] Move most of the reference related code to node (#1747)
new 9f30e2d28e fix buffer elem_offset calculation (#1762)
new 1ef7f886a5 Update SGX cmake (#1763)
new 8a14c6c024 [DOC]Errors corrected (#1767)
new c0c8b7794e [RUNTIME] Add fp16/fp32 conversion functions (#1766)
new b05bae1fad [RUNTIME] Use weak link for fp16 functions (#1769)
new c29659f844 [SGX] Improve edgeroutines (#1775)
new d122880451 [RELAY] Refactor type inference to use type solver (#1779)
new b981db0a86 [BUG] Fix incorrect libcuda.so found by cmake when multiple versions of CUDA exist (#1788)
new d209b75b9d [IR] eager constant folding in operator overloading (#1789)
new 21b53830cf [RELAY] First pass at pretty printer (#1749)
new 99e234fbb0 [NODE] Keep base node system in HalideIR (#1793)
new 0bdd30ee55 Fix vulkan build with homebrew install of vulkan-sdk (#1802)
new 076f2b7304 [RELAY][OP] conv2d, ShapeExpr->IndexExpr (#1798)
new e93e603e1a [TVM] Fix negating undefined in DetectLinearEquation (#1816)
new 12ce102ea3 [DEBUG]Support a debug framework for TVM Runtime (#1378)
new 70453fb641 [RELAY][DOCS] Core Operator docs (#1821)
new 86135eb2a9 [RELAY][PASS] Dead Code Elimination (#1776)
new 638905c28b Enable bool type as storage type (#1853)
new 117897404a Allow override gtest library search path (#1867)
new 9d1174a34b Fixes for tensorize in Windows build to expose TensorIntrin::make and search clang.exe (#1896)
new 60347605e4 [LANG][ATTRS] Enable deep equality comparison and hash of Attrs (#1903)
new b1b5a48acd [TVM] Eagerer const folding for logic ops (#1907)
new 72ce6f63a2 fix build issue for MSVC 2017 15.8.0 and above (#1928)
new 3046e153b2 [RELAY][Refactor] TextPrinter, move ret_type after body in Function. (#1918)
new 4b95b2e79a [RELAY] IR builder stablize refactor, clean pass (#1934)
new ab1f9361e5 Fix typo in module.py line 90 (#1947)
new 23291a1bb6 [TOPI] Specify non-zero absolute tolerance in tests (#1925)
new faf5b644ed Fix non-zero extent of access_ptr out of range (#1937) (#1939)
new f1aa0d47f6 up (#1940)
new 1ced09d0ba [Relay] Fix format (#1957)
new 65aabef5bd [RELAY] Refactor AlphaEqual to support deep comparison of Attrs. (#1958)
new 021f82575c [RELAY][TypeSystem] Add support for populating type args (#1962)
new 4dbb66d814 Fix int8x4 broadcast value codegen in cuda (#1959)
new dcb4827b20 [RELAY] BiasAdd, MLP, Resnet testing (#1969)
new e3d7d633d8 [ATTR] Introduce Integer container (#1994)
new 16373888af [RELAY][OP] Split (#1876)
new 3294f9ee24 [RELAY][OP] Fix conv2d NHWC type inference. (#2019)
new 4eab71f084 [OPENCL][RUNTIME] Fix race condition of modules (#2018)
new 323e4baf13 [RELAY][PASS] FoldScaleAxis Forward (#2020)
new 7571a91115 [intrin]support fmod for cuda (#1964)
new 012d0be63d [PASS]unroll loops with extent=1 (#2027)
new 90c866c64a [PASS] add a pass for the specific hardware accelarator when it is not binded (#1999)
new d24976fbe0 [RELAY][RUNTIME] Add Relay interpreter and compiler for TVM runtime system. (#1954)
new 73f03c26c8 Better gemm support for cublas and cpu (#1967)
new c675e1455a [Cleanliness] [Easy] Make TVM leak-sanitizer and Wnon-virtual-dtor clean. (#2046)
new f24fea4162 Refine CMakeLists.txt (#2049)
new 6422f71620 Rename relay::Environment to relay::Module (#2054)
new 5c82732b1a [RELAY][RUNTIME] Add compute and schedule attributes for all ops in relay/op/tensor.py (#2050)
new 778cf82c42 [RELAY][BACKEND] CompileEngine refactor. (#2059)
new acfff037a7 [CODEGEN][LLVM] Cache packed func ptr, lift alloca (#2070)
new a2e12f1f5b [OPENCL] Make use of cpu device when gpu device doesn't exist. (#2076)
new 0a8d790f4d [RELAY][OP] strided_slice (#2094)
new da59f1e5df [RELAY][PASS] Bind, FoldConstant (#2100)
new 0131cff03f [RELAY][[PASS] Consolidate ForwardRewrite pass. (#2124)
new f7f0f7917a [HYBRID FRONTEND] Modify hybrid script to new interface; hybrid op supported; enable compilation_database in CMakeList.txt (#1757)
new d0ddc669f4 Fix str decoding error on non-English Windows (#2158)
new 2434919b37 [RELAY][IR] Introduce IdNode to preserve var id across rewriting (#2178)
new 166dc30c93 [BACKEND][CODEGEN] C codegen with tests (#2161)
new 833838ccda fix llvm dependency bug (#2198)
new 2d280a2845 [Relay] Alter Op Layout (#2150)
new 77620fdc1a [PASS] InstrumentBoundCheckers pass (#2079)
new e548de1eb5 NOTICE (#2203)
new 3a9d24ecfe [TVM] Fix llvm codegen (div by power of 2) (#2204)
new 4eff60deb9 Python security issue about mktemp() and abspath() (#2202)
new 520d457c62 Run verifier during LLVM code generation (#2211)
new b59c24e68e [Relay][RFC] Relay IR Text Format (#1781)
new 1e3b12ef7b [typo] fucntion ==> function (#2239)
new 5b82a0a9fe [typo] fucn => func (#2240)
new 75d9d69361 GetChar() in base64.h should return int, not char (#2255)
new b5f0073e68 Fix missing sigmoid intrinsic in C++ (#2231)
new ea36ce2ee9 Fix serialization issue (#2263)
new c67123c75e [TVM] Move check_numerical_grads to tvm.testing_ (#2314)
new f4f7f9636c [ROCM] Make sure all bit code files exist (#2323)
new 1f3b5c7fe4 [RELAY][EXPR] Make const numpy consistent (#2349)
new bee7865c1e [RUNTIME] Add min_repeat_ms to time_evaluator (#2200)
new 694a40a05a Enhanced simplification rules for Div by a positive constant (#2346)
new 59743bd609 [RELAY] Port winograd ops to relay (#2356)
new 7ab6854d43 Added LLVM TargetIRAnalysis pass (#2386)
new 25e15fec27 [RUNTIME][TRACE] Support trace primitive. (#1973)
new 332047ebb2 [PASS] not vectorize if_then_else (#2389)
new a3c6749e91 [LLVM CodeGen] Partially disable unsafe fp math (#2422)
new bfc3248375 [PASS][TENSOR] Use correct select semantics (#2394)
new e4de1eb400 [relay][pass] Annotation for heterogeneous compilation (#2361)
new 18db560362 [RELAY] Support recursive call syntax (#2352)
new 6cd2cc4b48 [Runtime] Make runtime compatible with android ndk api 15 (#2446)
new 5669197a74 [Relay][Parser] Improve Relay parser and pretty printing, including CMAKE (#2377)
new 1aca1e14d3 Fix broadcast add and subtract grad (#2465)
new 70d6394cbc [Relay] Add generic & informative Relay error reporting (#2408)
new ccda6d16c9 Optimize Linux shared library modules (*.so files) (#2445)
new 1246e959fb [OPT] Low-bit Quantization (#2116)
new 2f8f47dd1f Remove duplicate as Checks and CHECK value (#2531)
new 29cc911403 Misc refactor on graph runtime, layout node (#2557)
new 5c646ea5ed Tighten buffer bound for TensorComputeOp by improving EvalSet on ranges (#2565)
new 7649b9cbce [Hybrid script] Backend support (#2477)
new bee9aeba2a [RUNTIME] Enable NDArray type extension (#2598)
new 2ee5c8dee3 [TVM][Bugfix] fix storage_rewrite bug when input is big (#2580)
new 596c5a0f01 [Relay] Algebraic data types (#2442)
new 0af5018ff2 [EXPR] Expression-template based pattern matching. (#2589)
new 6d367558fc [TVM][LANG] Add eager simplification for operations with FloatImm (#2615)
new 52bfe7caa7 [Bugfix] Missing #include <sstream> (#2629)
new 22edce55e5 [RUNTIME][NDArray] Allowing External Libraries to Subclass NDArrays (#2613)
new 18516e8620 Fix pylint 2.2.2 gripes. (#2642)
new f7a53a720f [Relay] add more function to prelude (#2660)
new 684f0efa28 [BUILD] Simplify after bind device type (#2670)
new 43ab4fbe66 Handle Select in IntSetEvaluator (#2687)
new dd4ec38d99 [CODEGEN LLVM GPU] Initialize llvm before lookup for the target (#2683)
new c41875b48f [ARITH] Analyzer Infra, ConstIntBound, Modular (#2668)
new cc35b20e8e [EXPR] ir_operator.h->expr_operator.h Centralize const folder logic (#2719)
new d625ad6788 use LLVM linker (#2713)
new eecb8a865f [VERSION] Update to 0.6.dev (#2736)
new 6673861edc [RUNTIME][OPENCL] clFinish before releasing memory (#2737)
new 6a0d2c405b Fix vmlal.s16 code generation for int8 x int8 -> int32 (#2748)
new b247ca03b8 [RUNTIME][OPENCL] set type_key even when platform is not available (#2741)
new e196f6e003 [WIN] Fix a bug in find_llvm when specify llvm-config (#2758)
new e1e30f00ef [ARITH] Analyzer RewriteSimplifier: add/sub/mul/div/mod (#2722)
new 9d6c01bff6 [Relay] Pass manager (#2546)
new 4a57531097 [DOCKER] Update docker protocol (#2793)
new 5b326c53e9 Make cpptest build on Ubuntu (#2798)
new ba24b70e5d Ensure loop count is a constant before trying to unroll. (#2797)
new e4ac602918 [ARITH] RewriteSimplifier: min/max, logical, select (#2768)
new b76c18f41a xcode.py: Decode bytes before output (#2833)
new cd4ffbeb5a Fix Xcode 10 metal compile error (#2836)
new 724169fd42 [CODEGEN][OPENCL] Fix compile error about ternary expression. (#2821)
new 97eb7a9274 [RUNTIME] Scaffold structured error handling. (#2838)
new 0473a5c91c [ARITH] RewriteSimplifier: improved cmp simplification (#2851)
new 3329211db9 [AUTOTVM] Refactor measure build func (#2927)
new 7f0c596037 Fix intersect of modular set (#2904)
new e4ceb6f406 Consistent result of DetectLinearEquation() when an empy vars is passed (#2860)
new 7aa4edcc4e Fix vcvtph2ps codegen (#2925)
new f136801680 [ARITH] Analyzer CanonicalSimplifier (#2891)
new 03c996351a [RUNTIME][OPENCL] Make OpenCL runtime Compatible with OpenCL2.0 #2897 (#2950)
new 100f06ccb2 fix undefined reference to dlopen, etc (#2957)
new 1c07cc94d5 [HEADER] Add Header to Comply with ASF Release Policy (#2982)
new 552e3fcc3e Expose backtrace symbols in Debug mode (#3001)
new 772629164c add output format to ndk build func (#2999)
new facfde029c [REFACTOR] Use more TypedPackedFuncs (#2981)
new e37cbd4dc5 [Relay] C++ GraphRuntimeCodegen, Deprecate Python2 (#2986)
new 355b25df55 [ARITH] Fix x||!x for comparisons in rewrite simplifier (#3029)
new 9fc193a279 Fix code comment and typos. (#3063)
new cfbd5e1388 [Relay][TOPI] Add rsqrt operator (#2949)
new b7b5cd1512 [TVM][ARITH] Teach BoundDeduce to handle the case in which target var can appear in rhs of expression (#2795)
new c86d22c235 [Bugfix] Fix type code error for StringImm (#3050)
new 90579171b6 [DOC] various assorted grammar fixes (#3127)
new 83021e860d [Relay][Runtime] Add memory manager for NDArray (#3121)
new 6c3be0712d [ARITH] Constraint-aware ConstIntBound, Enhance CanonicalSimplify (#3132)
new 98703c0268 Handle vectorize for LE statement (#3137)
new 1e930acb30 [Relay][Runtime] Implementation of Relay VM (#2889)
new 73d00746d6 Fix a multithreaded bug in llvm LazyInitJIT (#3158)
new 11776049e4 Avoid using heavy API to query single attribution (#3179)
new 0ee4825d27 [Datatypes] Custom datatypes (#2900)
new e6330bd93f [CODEGEN][CUDA][OPENCL] Handle INF and NAN (#3194)
new d11a60a80b [BugFix] Fix bug in cast to bool (#3207)
new 9daa0b3aa0 [Relay][TOPI] operator All (#3124)
new 1e35f91e84 Add `SkipVectorize` pass (#3222)
new 358b71ef23 [relay][pass manager] Open transform namespace (#3226)
new 6df80a0ef9 [NODE] Macro to define NodeRef methods, constructor style example (#3224)
new 81decee177 [C++][API] Consistent RAII scoping API. (#3231)
new 0f58e66028 [Relay][Transform] merge PassContext and BuildConfig (#3234)
new 85a7d67325 [Relay] Start porting pass to the pass manager (#3191)
new 380e173a4c [ARITH] Improve div/mod in rewrite simplifier (#3149)
new 4767d6dbeb [C++] Cleanup transform API nits (#3253)
new 8bddafa0cb [Bugfix] Fix a memory leak in OpManager (#3263)
new 345a13bf7c [ARITH] Bugfix: check arg positiveness for mod rules (#3279)
new aec09f508c [RELAY][TRANSFORM] Migrate buildmodule to transform (#3251)
new 0e6969e578 [ARITH] Bugfix: int bound analysis for mod (#3288)
new cb25965e1e [LANG] Comparison operators support for Imm expressions (#3283)
new 8d8be4fd2c [PASS][RELAY] polish pass infra (#3319)
new b4768cb6d6 [relay][vm] move vm opt passes to pass manager (#3323)
new 5c30b12ae4 [RELAY] Pass infra cleanup (#3336)
new 3fcc25b994 Support export ADT value in Python (#3299)
new 4df9a1dc83 [Relay][Transform] quantize opt passes to pass manager (#3289)
new 8493ddef24 [ARITH] Revamp IntSet (#3272)
new 30d0a18b15 Update CMakeLists.txt to be more flexible (#3354)
new 979c55c646 [BUILD] Enable more visible symbols by default (#3365)
new 75d7d69c4b [Relay][VM] Add AllocTensor instruction and better instruction printer (#3306)
new 45a8d363d2 Fix typo in word explicitly (#3376)
new a52e1b3fd8 [ARITH] Bugfix min/max const canonicalize rule (#3386)
new 94830d7283 fix (#3417)
new 2ec8ac2d79 [VTA][Relay] Relay Compilation + AutoTVM compatible operator libraries for VTA (#3135)
new 44fc6e939e [CI] Fix windows build, add azure pipeline (#3458)
new e4f1d0ebd2 [ARITH] Improve min/max/div cases in RewriteSimplify (#3463)
new 0b9c4e4b37 [ARITH] CanonicalSimplifier, better folding, eliminate store. (#3464)
new c33d3a213a [ARITH][SCHEDULE] Update schedule to use the new analyzer (#3466)
new 22d29a2fd2 [ARITH] Canonicalize comparison to move constant to one side (#3467)
new af4f32f672 [Relay][Pass] Only allow Module -> Module for opts managed by pass infra (#3430)
new 55805b7728 Migrate simplifier to new infra. (#3368)
new aa9856eae6 [Relay] fix 'please use input parameter mod warning' triggered in build_module (#3452)
new ff2bbf118e [Codegen] Support broadcast op with symbolic shape (#3389)
new b67e18eb70 Clean up pass.h (#3312)
new fd8d4452b4 [Relay] Continuation Passing Style (#3456)
new 358bdee786 [Relay] Fix PE (#3482)
new 992d51706c [Relay][Module] Make tags for ADT constructors and ConstructorValues more robust (#3369)
new 8156ab0bd6 [relay][frontend] Return Module from get_workload (#3483)
new f1bafa1385 [ARITH] Refactor: Remove un-necessary usage of ComputeExpr (#3503)
new ed30f734e8 [ARITH] Bugfix div subtract rewrite rule (#3504)
new e464633e80 [ARITH] More recursive rewrite rule, cleanup simplify tests (#3502)
new c11df92f7d [Vulkan] Added conversion from bool to float. (#3513)
new bc5950eea5 [Relay][Testing] Relay-to-Python compilation (#3156)
new 3adb8a03fc [Relay][RFC] Implement type checking for Any (#3221)
new 3d6415f98e init (#3476)
new 1f6aa37bc8 posix_memalign appears in API 17, not 16 (#3532)
new bd503349a2 [INFA][IR] Build and Evolve Low-level IR. Remove HalideIR dep. (#3533)
new 7f731ea4de [ARITH][IR] Introduce FloorDiv/Mod (#3479)
new e0a382d0ba [Runtime] Enable set_input_zero_copy in GraphRuntime (#3416)
new e600f57a9e Emit DWARF debug information (#3420)
new bed1e0d4a9 [ARITH] Simplify let (#3568)
new 9f5d601769 [RPC] Better handle tempdir if subprocess killed. (#3574)
new 2ba0aec433 [CI] Upgrade LLVM envs (#3590)
new c806ea7112 [Runtime] [ThreadPool] Make SpscTaskQueue::Pop(..) spin_count configurable (#3577)
new ed48abbc76 {relay,topi}.reinterpret support (#3599)
new 53304f4e16 [TEST] Fix testcase to make them more compatible to zero-rank (#3612)
new 67a71ea007 fix typo (#3611)
new 131309b375 Add a missing header in cuda_device_api.cc (#3621)
new adfcbc508d Implementation of uTVM (#3227)
new 74bcb2dd3e Make Google Test usage configurable in CMake files (#3628)
new 6906bbd915 Print llvm source by default in ROCMModuleNode::GetSource (#3662)
new 33c6130937 tvm/contrib/rocm: improve finding of ld.lld (#3664)
new 38c67bbe13 ROCm: Add SaveToFile and LoadFile (#3665)
new 6eca7f5681 Add support for Tensorflow operators log1p, cos, sin (#3614)
new dbb325d08d Add shuffle support to TVM (#3633)
new dd48365070 Align the naming rule for OpAttributeUnImplemented (#3695)
new d20d12cfb0 Add an option to build with -pthread (ON by default) (#3671)
new 4657d92ae3 Metal reinterpret fix (#3706)
new 4bf8354c2d Quit and clean when TVM is interrupted (#3640)
new 83868e4676 Export tvm::relay::OpRegistry::OpRegistry (#3711)
new 9cf86909bb [Bugfix] Fix the issue that function pass modifies original module (#3712)
new 7607196e68 Take zero extent loops as NoOp and remove it and add unittest for the same (#3724)
new 1e629ddeb5 Revert compile_cmd kwarg name change (#3746)
new 77050dc0d0 Don't replace reduction init axis with new axis if bound to a thread. (#3408)
new a3d97291fe [ARITH] Simplify casts of constants 0 and 1 (#3758)
new 67ec999dd3 add gfx906 bc (#3808)
new a33c1c3d02 [Relay][VM]VM Profiler (#3727)
new 13e36b604f [TVM] Fix warnings (#3817)
new 1a1dc494f3 [CODE] Halide attributions (#3824)
new c457797fc8 Fix inconsistent python/cpp API behavior for if_then_else, power (#3829)
new 0fe6670120 Add build_create_shared_func to tvm/contrib/cc.py (#3840)
new e52ef2f5aa codegen_spirv support Call::reinterpret (#3795)
new 78d8a84228 [Relay][Any] Add shape func for dynamic shape (#3606)
new 4919f13d96 [WIP][µTVM] Add OpenOCD Low-Level Device (RISC-V Support) (#3756)
new a078515b81 [Runtime] Allow parameter sharing between modules (#3489)
new 2819af9edc Revert "[Runtime] Allow parameter sharing between modules (#3489)" (#3884)
new 9f59b71df4 [PYTHON/FFI] Search PATH for DLLs (#3888)
new 9177b4e293 [Relay] Add ADTs to text format (#3863)
new d7abb4ea17 Add .hsaco save/load for ROCm target (#3852)
new 10beecab34 Support LLVM trunk (#3907)
new 8391653851 [Relay/TOPI][Op] Add erf intrinsic and op (#3702)
new 2f17de948d Numpy compatible dtype inference for `tvm.convert` and `tvm.const` (#3861)
new 1e0b0884d4 [CODEGEN] Remove incorrect check for LLVM in C codegen test (#3921)
new 80d81e6ce9 [Relay][Module] Refactor the way we interface between different modules of Relay. (#3906)
new 7c04ba0ef5 [RFC] [Contrib] Minimal runtime (~12kb .text on ARMv7/x86) for subset of TVM models (#3567)
new 4a34b1ee4b Fix CUDA int8x4 vectorize (#3928)
new f5fd1b1756 Vulkan2 Runtime API (#3849)
new 26cb3376a6 1) Add EQ op to the deduce_bound and add unittests for the same (#3775)
new 233954fc8b trivial (#3954)
new 4836d1b612 [tvm][codegen] Make buffer auto broadcast independent to the order of input args (#3956)
new 56eed317d5 More friendly error msg; Fix Android Demo LLVM ver (#3962)
new a483188bc8 [Vulkan] Minor optimization for deferred token lookups. (#3960)
new 657c66439f [TVM][AutoTVM] cast filepath arguments to string (#3968)
new 74fcde01bb [ARITH] Introduce base-class IRMutatorWithAnalyzer for scope dependent analysis (#3969)
new 3d6c17820f Add support for MXNet pad operator. (#3739)
new 5253122d3a [ARITH] Add Lowering rule for FloorDiv/Mod (#3976)
new 21bd3125cd add bc for gfx1010 (#3984)
new 50b9681812 Add operator `isnan` (#3979)
new 90f4b04c09 [ARITH] Explicitly state truncdiv/mod in pattern matching. (#3986)
new b4fc509cb8 Changes to make tensorize work. These changes also fix the previously broken test. (#3981)
new c388358163 Expose llvm.nearbyint intrinsic. This is a faster alternate to rounding. (#4001)
new 8e74834e7a [ARITH] Refactor to use explicit div/mod functions instead of operators. (#4000)
new e730b99f78 [ARITH] Use explicit div mode in python. (#4014)
new dd77739754 [ARITH] cleanup the indexmod/div on python side (#4028)
new 3a0e3d33c6 [Relay] Move prelude to text format (#3939)
new e0f5abdfb8 [ARITH] migrate indexdiv/mod to floordiv/mod (#4008)
new 838befc4ab Add dmlc-core to the list of installed header directories. (#4035)
new f474afe972 [QNN][Relay] Calling Dialect passes from inside Relay Build API. (#3971)
new 8c3ccaad88 [llvm] switch to use Align for llvm trunk (#4051)
new 97155e751b Hide symbols from dependent libraries if HIDE_PRIVATE_SYMBOLS is ON. (#4041)
new 6e4827a864 [ARITH] Add floordiv for the deduce bound (#4025)
new d592d64c79 [TVM] Rewrite simplification rule to eliminate unnecessary conditionals. (#4076)
new 66729db320 force code object v2 for amd gpu backend (#4099)
new 86fdaac417 [tvm][any] broadcast with values other than one (#3967)
new 4bb0f99ca4 [codegen] Add multiple operands and function support when using fp16 compilation (#4056)
new 52fccc90f7 [ARITH] Fix lowering of floormod(x, y) != 0 (#4127)
new 62456048b5 Fix typo (#4144)
new d6e33b676f [Runtime] Enable option to use OpenMP thread pool (#4089)
new 2b4178a7ad [REFACTOR][NODE][RUNTIME] Move Node to the new Object protocol. (#4161)
new 5cbbb85dcf [cmake][ANTLR] Support setting path to ANTLR jar (#4176)
new f5ef6939f6 [TOPI] Tunable Template for Conv2D HWCN on CUDA (#4168)
new b20bcf7e0b TensorCore Support using Intrinsic (#4136)
new c6795edd0f [NODE][REFACTOR] Refactor reflection system in node. (#4189)
new c129f39b23 [hotfix] missing include headers (#4204)
new b908529d4f [RUNTIME] Separate runtime related contrib into runtime/contrib (#4207)
new cfe6c8356a [Relay][Op] Enhance Upsample Operator to support float scales (#4206)
new 9117ce1a63 Update have_int8 condition to run on compute capability 7.x devices (#4214)
new f1902c3da1 [ARITH] Fix the rule y < x && x <= y (#4220)
new ec00e2627d [Relay][Topi][TensorFlow][ONNX][Lang] Add support for Any op (#4205)
new 9ca6c0590e [CI] Update GPU docker to cuda10 (#4228)
new 3f9d490c73 [CUDA] Fix fp16 intrin, disable bad fp16 vecadd test for now (#4239)
new f3c38ddeac [ARITH] Fix lowering of FloorMod (#4236)
new 64d8d02356 Implement explicit IR representation of memory alloction (#3560)
new ddd90367c0 [NODE][REFACTOR] Rename IRFunctor->NodeFunctor, use func pointer (#4247)
new 5c849ed19d Require LLVM >= 9 for AMDGPU backend (#4253)
new b0d1acbc7b [DOCS] Update link loc (#4257)
new cd967a3185 Auto TensorCore CodeGen (#4234)
new 318f3565be [Codegen][cuda-fp16] fallback to fp32 simulation when cuda arch < sm53 (#4268)
new fe7d5cb581 [RUNTIME][REFACTOR] Use object protocol to support runtime::Module (#4289)
new 9a2eb2ec03 [Codegen] remove fp16 function override for cuda (#4331)
new 19c3eda89d Enable hipModuleGetGlobal() (#4321)
new cfa5efd1ce [Contrib] Add MKL DNN option (#4323)
new b1dbdf0af2 [RUNTIME] Add device query for AMD GcnArch (#4341)
new 87e0436a84 [CodeGen] Add build config option disable_assert to control whether to generate assert (#4340)
new f23961510c [COMMUNITY] Add DISCLAIMER, KEYS for ASF release (#4345)
new a1253775fe [Relay][VM][Interpreter] Enable first-class constructors in VM and interpreter via eta expansion (#4218)
new 55f84b62b3 Add workgroup size attribute to AMDGPU functions in codegen (#4342)
new 68fa36b224 proper device query through rocm api (#4305)
new 7ffa642a1f [Relay tests] AlterOpLayout - Temporary attr update (#4357)
new 5122cf0218 [nvcc] enable multiple arch in one fatbin (#4377)
new aa16d0986c fix build with llvm trunk (#4386)
new a427dbe765 [ThreadPool] Solve thread transitions issue (#4344)
new 0912ed84e8 [LICENSE] add 3rdparty licenses (#4402)
new d6594f1cfe [TVM][RUNTIME] A minimum example to generate external library wrappers for DSOModule (#4280)
new 0c115b2802 [Release] resolve license issues (#4408)
new ab133c6269 [LINT] Remove unnecessary copyright message for files with ASF header (#4409)
new f8275d8cf1 [License] move cma_api to 3rdparty. separate BSD 2-clause and 3-clause (#4410)
new 8eef64e1a2 [LICENSE] clarify the blockingqueue license, update version to 0.6.0 (#4414)
new ec2bbec564 add rocm codegen unittest for cross thread reduction (#4423)
new bdd783768b [RELEASE] Update copyright message, change notice, remove cma kernel module for now (#4431)
new 16ce6a7cdb add DeviceName to ROCm api (#4437)
new f8b91134da [µTVM] Enable AutoTVM for ARM STM32F746XX Boards (#4274)
new 49b01e2085 [doc] fix typo (#4463)
new c41d864ad3 [CONTRIB] TFLite Runtime (#4439)
new ce8705de26 [BUGFIX] Fix search path for libtvm_topi.so (#4467)
new 7833d8fe6d Fix typo in travserse (#4469)
new 85ec8fc3a0 [Codegen] fix bug on LLVM 10.0 (#4480)
new ae14cf8171 [REFACTOR][RUNTIME] Add LibraryModule that merges systemlib and dso. (#4481)
new a9cbb890fb [docs] typos in include/tvm/ir.h (#4493)
new b38c3479d3 Add __float2half_rn for cuda compute capabilities less than 53 (#4489)
new 4e4a551f25 update rocm intrin rule (#4499)
new 6e2ffb283e [codegen][Build] it's more readable to move the if condition out of the loop (#4501)
new 23c4ce7ec4 Add AMD codeGen unit tests (#4509)
new 51ae2d05fc Fix build for llvm newer than 9.0 (#4515)
new 83d3ca1c22 [ir] use DataType instead of Type for readability because Type has been deprecated (#4513)
new 9130b53bf1 [Relay] External codegen (#4482)
new 45759e62c4 [PYTHON][FFI] Cythonize NDArray.copyto (#4549)
new df50a80a5b [REFACTOR][DTYPE] Isolate dtype to runtime (#4560)
new 40b5fa8b7b Support standardize runtime module (#4532)
new c2489c0a5d [TEST] Remove nnvm related code in topi and test script (#4562)
new eef99fb30b [DEPRECATION] Remove NNVM compiler (#4571)
new efbaee908a [DEPRECATION] Cleanup legacy verilog support (#4576)
new cd9a6c0c8a [RUNTIME] Remove Extension VTable in favor of Unified Object system. (#4578)
new 0f756328b9 Some Windows and MSVC fixes (#4569)
new 3e6856be6f [Container] Fix NDArray SaveDLTensor declaration and implementation signature different (#4586)
new e4a95162fc [Runtime] add necessary const qualifier for NDArray container of parameters (#4590)
new 04f5cdab20 [REFACTOR][RUNTIME] Update NDArray use the Unified Object System (#4581)
new 7089c4eeed [relay][refactor] Cache Op::Get in passes to reduce lookup overhead (#4594)
new 4159ea1aa6 [REFACTOR][OBJECT] Consoldiate NodePtr/Ref/Hash/Equal to Object (#4603)
new 2bccb5bad0 [IR] Unify approach to Visitor/Mutator under Functor (#4606)
new e83afb1ebc Bugfix StmtMutator IfThenElse (#4609)
new 94cc163349 [REFACTOR] Migrate Low-level IR Passes into the New Stmt/Expr Mutator (#4607)
new 8aa837f95e [CMAKE] Remove unecessary rdynamic (#4613)
new 71d031057b [REFACTOR][TYPE] Remove un-necessary var sub-field in GlobalTypeVar and TypeVar (#4615)
new 1e80870849 [REFACTOR] Unified IR base types. (#4616)
new 566f3445e5 [REFACTOR] TVM_REGISTER_API -> TVM_REGISTER_GLOBAL (#4621)
new 424ece3c49 [REFACTOR] IRPrinter->NodePrinter, move to node/printer.h (#4622)
new 47b8b6b97c Get around limitation of g++-4.8 (#4626)
new 5e8433966d [REFACTOR] Automatically deduce function type signature in Registry.set_body_typed (#4623)
new 2d2f42d141 [REFACTOR][IR] Introduce SeqStmt to replace ir::Block (#4627)
new 98b265167c [RUNTIME][DSO] Improve TVMBackendPackedCFunc to allow return val (#4637)
new 1c0feecb10 [REFACTOR][IR] Add Node suffix to low-level IR nodes (#4649)
new d04d125b54 [CI] Recover Windows Mac Build CI via Github Actions (#4662)
new 1cb5fcb51d [REFACTOR] relay::Module Def -> TypeDef (#4665)
new 541a832488 Use int for endch to fix portability issues regarding signed/unsigned char (#4668)
new 5daf5725ee [REFACTOR][IR] tvm::Expr -> PrimExpr(Primitive Expr) (#4669)
new 400957621a [CodeGen] Generate blob use LLVM directly (#4657)
new 528bc8f856 [REFACTOR] Replace TensorObj and TensorValue with NDArray (#4643)
new 8765b1b970 [REFACTOR][IR] Initialize Unified IR Expr Data Structure (#4673)
new 7f3c91ff8a [REFACTOR][IR] Allow Module to store BaseFunc. (#4678)
new 9d0ce549cf [REFACTOR][IR] Unified IR Primitive Op and Registry (#4687)
new 4a9c6f7207 [REFACTOR][IR] Unified IR IRModule structure. (#4699)
new 49a31110b3 [REFACTOR][IR] Initialize Unified IR Pass Infra. (#4702)
new cd313d5ad3 [REFACTOR][IR] Polish ir/type (#4705)
new 4177b0e6d6 [REFACTOR][IR] Unify IntImm and UIntImm (#4706)
new c1a3d99a78 use packed func macro for external codegen (#4710)
new d47cfd9964 link the math library by default (#4713)
new acd481e85c [REFACTOR][IR] attrs.h -> ir (#4709)
new 6ad593522c [REFACTOR] Move support related code to include/tvm/support (#4716)
new cac715d398 [REFACTOR][FFI] Make more clear naming for C API Type codes. (#4715)
new 0444d69112 [VERSION] Update mainline version to 0.7.dev0 (#4720)
new b2baa97ebb [REFACTOR][IR] Introduce include/tvm/target (#4721)
new 2a51542c00 [Arith] add SizeVar representing non-neg valued variable in a tensor shape (#4684)
new 203a30df12 [REFACTOR][ARITH] Unified IR, introduce arith subfolder. (#4722)
new 5ee40f90fd [REFACTOR] top - namespace for Tensor Operation DSL (#4727)
new a426afeea7 [REFACTOR] Polish runtime (#4729)
new 9f6f0a40d5 export builtin_fp16 on Windows (#4731)
new 975f19c06c [TOOLS] JSON upgrader to upgrade serialized json. (#4730)
new 83ffc33848 [REFACTOR] Get rid of packed_func_ext. (#4735)
new 8abfb48930 [CodeGen][CUDA] Improve CUDA vectorizer (#4736)
new 6b6c5ea9d3 [REFACTOR] Establish tir (#4740)
new d7fdd6c3c2 [REFACTOR][CODEGEN] codegen->target, build_module->driver (#4742)
new a00e9e64dc [REFACTOR][TYPE] Finish move all types to IR. (#4746)
new 59fd3a7f15 [REFACTOR] Establish printer in the source folder (#4752)
new 59cbc76e2f [REFACTOR] top->te (#4759)
new 84090add2a [Build] Explicitly link to cublasLt if it exists (#4776)
new a994551c64 properly extract error type from windows error message (#4780)
new 33d7233b92 [PassManager] Implement pass manager tracing API (#4782)
new ce92136422 Fix parsing of different exception string formats (#4785)
new cd257e8b4e [ThreadPool] Solve ARM BIG.LITTLE heterogeneous multicores (#4747)
new da5423bc7f [TIR] Create a StringImm reference type (#4806)
new 7d862e0f10 [LINT] Fix -Wextra (#4804)
new 4726c94409 fix memory leak (#4811)
new 9c2a80ad0b [REFACTOR][PY] tvm._ffi (#4813)
new f012f37f2e [REFACTOR][PY] Establish tvm.runtime (#4818)
new bbbc6a1db4 [CONTRIB][CC] Enhance cc.cross_compiler (#4817)
new dc6eb29ab6 It's gpu not cpu. (#4832)
new be977f9a6c [REFACTOR][PY][API-Change] Polish tvm.runtime, tvm.runtime.module API update (#4837)
new 2a1ee93ae1 [LINT][PY] Fixes for pylint==2.4.4 (#4849)
new 3795935cf2 Fixed bug in ExprOp that caused bitwise operators to fail when a basic python type was on the left hand side of the expression. Added regression test for crashing cases. (#4852)
new ea14fd5af8 [LLVM] Explicit llvm::StringRef to std::string conversion (#4859)
new db0944c5db [REFACTOR][PY][API-CHANGE] establish tvm.ir, migrate corresponding files (#4862)
new 5d03e84f3b [DOCS][PY] Sphinx docs about tvm.ir
new 19a76e69a7 [REFACTOR][PY][API-CHANGE] Establish tvm.target
new ab80c44b1c [REFACTOR][PY] Establish tvm.tir
new 85da76ac64 [CodeGen][CUDA] Fix issues in cuda codegen (#4876)
new 7d7c5f2880 [REFACTOR][PY] Establish tvm.te and tvm.driver (#4900)
new 6c2fdbdcef Fixed bugs that occured when using bitwise operators on floating point type expressions. Further crash when using ops <<, >>, %. Finally added regression tests for both types of bug. (#4892)
new ea6180a0ae [REFACTOR][PY] Establish tvm.arith (#4904)
new 0ef5265209 [DOCS] Update API docs to reflect the status after the refactor. (#4907)
new a4a967c3af [REFACTOR] Polish ffi convention. (#4912)
new e5a7ece661 [DOCS] Fix sphinx warnings (#4917)
new 18d62e924e [CODEGEN] Support cuda tensorcore subbyte int data type in auto tensorcore (#4546)
new bf68c0cfe8 [Relay][AutoTVM] Relay op strategy (#4644)
new 6ed8bd280a [LLVM] Fix build breaks from StringRef changes (#4923)
new ad5623c152 Bump up dev version (#4941)
new aee0ba4619 [REFACTOR][PY][API-CHANGE] Remove legacy python files. (#4943)
new e64f5d9e7e [RELAY] fix error message (#4945)
new 8a75ff44e9 [DOCS] Sphinx -- Introduce alias detection. (#4954)
new d8c0865107 Added CopyFromBytes and CopyToBytes convenience methods to NDArray. Fixed typos. (#4970)
new 8b7611f648 [Doc]refine the example description of max/min/sum/tag_scope (#4974)
new c7b71daf68 [topi][relay] add operation tan to TVM (#4938)
new 0c0fbb3216 typo (#5008)
new dadb7dc4c5 Revive the Rust + SGX refactor (#4976)
new 88cca872b4 Implemented kDLCPUPinned (cudaMallocHost) (#4985)
new 0e8353a1aa Revert "[topi][relay] add operation tan to TVM (#4938)" (#5017)
new b3b37253c7 [topi][relay] new PR to re-add tan to TVM (#5025)
new 4c8e7c6f16 [CodeGen][CUDA] Enhance CUDA codegen for SelectNode (#4983)
new bcfd6ceac4 [Intrin] Adding a few missing math intrin (#5011)
new 29f1dc88eb [refactor][relay pass] Separate analysis and transform passes (#5035)
new 2bec44fb04 [REFACTOR] Streamline Function Attr interface. (#5045)
new b041595492 Fixed div by zero core dump. Fixed rounding intrinsics on int crash (#5026)
new 438ba62471 [C++] Require c++14 by default (#5056)
new fe55e70413 [Bugfix][IR][ATTRS] Fix AttrEqual for Array and StrMap, double (#5054)
new 1432bbcef6 [TIR] Introduce tir::PrimFunc (#5070)
new 916ae39caf [TESTS] Triage the testcases to fit the the new namespaces (#5071)
new ef9f9885eb [IR] Update the type_keys to reflect the code-org (#5074)
new 260342377f Return empty CSourceModule when no lowered_funcs exists in Relay mod (#4847)
new 2212aad652 [CODEGEN][OPENCL] Explicitly cast min/max operands (#5090)
new 001f9b5984 [TIR][TARGET] Refactor Target codegen to use IRModule and PrimFunc. (#5107)
new 4b2dcf5225 [TOPI][OP] Use Thrust sort for argsort and topk (#5097)
new 2f9b52c681 [CodeGen][CUDA] Vectorization for intrinsics (#5101)
new 42ca479ca6 [Relay, Topi, TF Frontend] Isfinite operator (#4981)
new edebc7d05c [Bugfix] Fixed bug where shifting by out-of-bounds value results in no compute code being emitted. (#5115)
new bf82505540 [Relay] GradientCell Relay Pass (#5039)
new e7aeb22615 [REFACTOR][TIR] Introduce PrimFuncPass. (#5139)
new 7db64f0d0c Handle empty LLVMModule in GetFunction (#5146)
new 4cef7a9753 [NODE][IR] Introduce StructuralEqual Infra for the unified IR. (#5154)
new b2b741e1b8 [NODE][IR] Introduce StructuralHash for the Unified IR. (#5160)
new ea3530cd8d [REFACTOR][IR] alpha_equal to structural_equal (#5161)
new 5692c0828e remove AttrsEqual and AttrsHash related code (#5169)
new 468e6dcbc6 [REFACTOR][TIR] Migrate Low-level Passes to Pass Manager (#5198)
new 12142eaefb [REFACTOR][TIR] Introduce ExprDeepEqual, Remove IRDeepCompare (#5206)
new 49f8878afd [TIR][PASS] dtype rewrite for indexing variables (#5092)
new 4b5a26964c [TIR] Introduce BufferLoad/Store (#5205)
new 97cf59ab5c [REFACTOR][TIR] Migrate low-level pass functions to Pass Manager, (#5213)
new 6fdff5e855 [REFACTOR] tvm.hybrid -> te.hybrid (#5223)
new 7a22e53798 [CodeGen][CUDA] Fix bugs (#5209)
new 304726f518 [PYTHON] Make IntImm more like an integer (#5232)
new 4eb3a08fd4 [REFACTOR][TIR] Migrate most of low-level build to use the Pass Manager. (#5225)
new 21ad02ae0a [TE] Support mixing normal and cross-thread reduction (#5193)
new dc27cd9b7d [REFACTOR][TIR] Migrate all low-level passes to the Pass Manager. (#5233)
new df1dfd1ee1 [TIR] Fix perf regression of tir refactor (#5258)
new 2aba2f1383 [LLVM] Use llvm::Align with LLVM 11+ to avoid warnings (#5264)
new 939d1948fa [LLVM] Use llvm::ElementCount with LLVM 11+ when creating vectors (#5265)
new 0b6ae9947b [LLVM] Do not use x86_vcvtph2ps_256 intrinsic with LLVM 11+ (#5267)
new ff9b6da83c [RUNTIME] Implement TVMDSOOp(TensorFlow custom op) for TVM runtime (#4459)
new 5bcb8b82b4 [NODE] General serialzation of leaf objects into bytes. (#5299)
new ae23c89aa5 [RUNTIME] Initial implementation of Hexagon runtime support (#5252)
new 15549848d4 [NDArray] Set shape_ in NDArray::FromDLPack (#5301)
new ca90be7742 [REFACTOR][IR] Move to runtime::String (#5276)
new 039c4c2ba3 [Arith] linear system and equation solver (#5171)
new 0d79b8aec2 [CI] Fix the hexagon string (#5304)
new d561c28a58 [RUNTIME] Introduce RValue reference(move) support to TypedPackedFunc (#5271)
new e0012ad659 [LLVM] Fix generation of LLVM intrinsics (#5282)
new 94cd1fa51e [IR][TRANSFORM] Enable CopyOnWrite for passes. (#5309)
new 328af2b986 Remove PrimExpr from String (#5311)
new d68ffbed82 [Intrinsic] Add log1p, ldexp, atan2, hypot, nextafter, copysign (#5312)
new f5e868ad0f [RUNTIME][IR] Allow non-nullable ObjectRef, introduce Optional<T>. (#5314)
new 0ac6876ba0 [CODEGEN][CUDA] Fix vector load (#5226)
new 74f2a51ad5 [TIR] Refactor MakePackedAPI to target dependent stage. (#5326)
new ace9a1d383 [RELAY] Remove re-exports of tvm.transform (#5337)
new c32b6412aa [LLVM] Use llvm::FunctionCallee in IRBuilder::CreateCall with LLVM 11+ (#5338)
new 2a194a06e4 Windows Support for cpp_rpc (#4857)
new 55cb69f542 [PYTHON] Enhance with_attr API, cleanup MakeAPILegacy in testcases (#5335)
new a534c30f60 [TIR] Remove ProducerConsumer and AllocateNode::new_expr (#5333)
new 0d55741059 [Hexagon] Add hexagon_posix.cc to TVM/RT sources in the right place (#5346)
new 051b742cc9 [TIR] Make lower_warp_memory support extent(threadIdx.x) < warp_size (#5307)
new e315ecf333 [TIR][REFACTOR] Migrate low-level passes in tvm.lower to the Unified IR pass manager. (#5364)
new 58179c94d3 [TIR][REFACTOR] Remove te::Tensor dependencies from TIR passes. (#5372)
new 82af12787b [ARITH] Remove the legacy Simplify, migrate to Analyzer. (#5385)
new dbb761d716 [ARITH] Remove legacy const pattern functions (#5387)
new d9185a93fa Fix test_ir_type. (#5390)
new ec8f18df56 [PTYTHON] Migrate VTA TIR passes to the new pass manager. (#5397)
new 72bb45b8f0 [LLVM] Use ArrayRef<int> in calls to CreateShuffleVector (#5399)
new b23f483998 [TIR] Enhance Substitute, python bindings for Substitute/PostOrderVisit/IRTransform. (#5400)
new a41345c72f [LLVM] Replace calls to Type::getVectorNumElements (#5398)
new e8bb5b2b1c Don't remove() TempDirectory in __del__ after atexit hook runs. (#5414)
new a6e8782012 [TIR][REFACTOR] Remove ir_pass in favor of analysis/transform. (#5415)
new 7a744cb552 [RUNTIME][CONTRIB] CoreML Runtime (#5283)
new bc462a4e30 [PY][FFI] Introduce PyNativeObject, enable runtime.String to subclass str (#5426)
new c484710710 misc fixes for ROCm (pointer lifetime, runtime::String refactor) (#5431)
new 07fb6da414 [RUNTIME][OBJECT] Introduce static slots for common objects. (#5423)
new 2392633997 [RELAY][PYTORCH]cosh,sinh,log2,log10,log1p op support (#5395)
new 42828e17fe [CodeGen] Cleanup generated code (#5424)
new 6815c2e761 Improve IntervalSet's floormod (#5367)
new 8042b3d65f [CODEGEN][CUDA] Fix a bug when vectorized load&store was involved for… (#5428)
new c9867cffda [intrin] a few more math functions (#5468)
new da659029ac [RUNTIME][uTVM] AutoTVM + uTVM for Cortex-M7 (#5417)
new 6884f0d51e [IR] Initial stab at std::string->String upgrade (#5438)
new 57a5ac6542 Make "none" DataType explicit (#5491)
new 40beadffa7 Link necessary libraries when building runtime for Android (#5496)
new 2a40d250ab Fix Canonical Simplifier (#5505)
new 9aa4cde2c5 [REFACTOR][RPC][PROCOTOL-CHANGE] Modularize the RPC infra (#5484)
new dc56de800c [RUNTIME] Improve PackedFunc robustness (#5517)
new b2b9da18ed Cache PrimExpr instead of raw pointers in bound analyzer (#5533)
new 5ef1866ef7 [WEB][RUNTIME] TVM WebAssembly JS Runtime (#5506)
new 73bdd052d9 [Refactor][std::string --> String] IRModule is updated with String (#5523)
new 81e1a13ef8 [TIR][Printer] text format printer considering future parsing use (#5483)
new a9e6dd602c [Optimization] Warp level reduction support for CUDA (#5498)
new 4e7b0905be [WEB] WebGPU support (#5545)
new 6fc2c79269 [RUNTIME] Hexagon driver for offloading kernels to simulator (#5492)
new b67b2b66b7 [LINT] clang-format the h,cc,m files. (#5557)
new 2eb7cb130f [Refactor][std::string --> String] IR is updated with String (#5547)
new ea4454d708 [TARGET] Phase out WebGL (#5570)
new c9c10cc659 [LINT] Enable clang-format. (#5572)
new 92079c07d1 [Hexagon] One more fix for concurrency count (#5589)
new 7c2e23a090 [TFLite Runtime] Fix bug and re-enable RPC execution test (#5436)
new 8956adcc2c [Relay][VM] Memory planner (part 1) (#5144)
new f9330239ad [Reduction] Fix cross thread redunction (#5551)
new 2900083adc [LLVM] Represent alignment information in LLVM IR (#5598)
new 950e2b14ce Add debug mode to tempdir() (#5581)
new 5478c1490a [REFACTOR][IR] Streamline ir/op Registry (#5609)
new 9026951a71 [CUDA] Fix codegen for warp shuffle intrinsics (#5606)
new a6297376b6 Fix a typo. (#5611)
new bec5ff5cec [Relay][Refactor][std::string --> String] Relay updated with String (#5578)
new 8bda65871e Fix three typos (#5620)
new fcf89b4e6b [NODE][PASS] Introduce config to PassContext. (#5631)
new b594670006 [Runtime] Introduce runtime::Array (#5585)
new 2d605479f1 [REFACTOR][IR] Migrate IRModule ObjectRef to not-null (#5654)
new bf16a2fb78 [TIR][BUILD] Remove buffer params from pass config. (#5652)
new b093932582 handle likely in IRMutatorWithAnalyzer (#5665)
new 1a780954bf [TOPI] Improve CUDA softmax scheduling (#5600)
new a5ec592524 [Relay][Op]Support symbolic TopK, Ones, Zeros and Full (#5459)
new c2b9a1701a [REFACTOR][TIR][API-Change] Migrate BuildConfig to PassContext. (#5668)
new ecbb88b014 Call previous excepthook in tvm_excepthook. (#5675)
new f9850eef19 [Bugfix] Fix Python debugger segfaults with TVM built with LLVM (#5685)
new cc8bbe47c5 [TIR][REFACTOR] std::string -> String Migration in TIR nodes (#5596)
new 08f15c2443 [REFACTOR][RELAY] move fallback_device to config (#5690)
new 53e76d25e3 [REFACTOR][RELAY] Replace build_config with PassContext (#5698)
new a65f31bea5 [Arith] ExtendedEuclidean merge impl to int_operator (#5625)
new e2f7bba547 [REFACTOR][PY] relay.op.Op -> tvm.ir.Op (#5705)
new 87d937bffd Remove deprecated opengl files (#5711)
new 628ebf4268 [Object] Unify StrMapNode and MapNode (#5687)
new 00cc4d255d [Object][FFI] Introduce runtime::String::CanConvertFrom (#5718)
new c7da19a5ed [Object] Restore the StrMap behavior in JSON/SHash/SEqual (#5719)
new 218b2f8036 Fix generating types like float44 and float88 (#5722)
new 508d912336 Fix runtime::String backward compatibility in JSON (#5725)
new 3158c51aa7 codegen llvm: move nvptx-specific intrinsic handling into codegen_nvptx (#5726)
new 1c89c1e652 [REFACTOR] Separate ArgTypeCode from DLDataTypeCode (#5730)
new 672109096d ROCm: Add warp shuffles and enable reductions (#5727)
new e3c9929498 [REFACTOR][ARITH] Remove legacy compute_expr.h (#5738)
new 5760e79303 [REFACTOR][TE][TIR] Call::Halide => ProducerLoad, DSL/TIR decouple. (#5743)
new c5d25b06d1 [ARITH][BACKPORT-0.6] fix a min/max simplify bug (#5749)
new 1b1c28b40b [REFACTOR][TIR] Provide->ProducerStore, Realize->ProducerRealize. (#5750)
new 8a3e4223a6 [Rust] Second stage of Rust Refactor (#5527)
new b379d3a97d [TIR][REFACTOR][API-Change] Migrate the tvm/tir/expr.h to construct style. (#5773)
new cc98b88374 [TIR][REFACTOR][API-Change] Migrate tir/stmt.h to use constructor. (#5778)
new e9a2a0be73 [RUNTIME] Add compile_shared option to linux compile utility fn (#5751)
new 564a42a68c [REFACTOR][API-Change] Migrate all Object construction to constructor. (#5784)
new 602b5cea59 [CODEGEN][CONTRIB] CoreML codegen (#5634)
new 502760ba6c [cmake] update vulkan rules (#5777)
new d4d1490606 [TIR][REFACTOR] Cleanup unused classes (#5789)
new e015744cde [TIR][REFACTIR] Update TIR nodes std::string->String. (#5793)
new 3c3301c5d1 [TIR][REFACTOR] Add tir prefix to type keys (#5802)
new 4c7c6f8919 Error msg update (#5818)
new ae016870ad [RUNTIME][String] Overload string operators (#5806)
new 8e2842d78a [RUNTIME] Introduce MetadataModule to separate code compilation/interpretation and weight initialization (#5770)
new 53c2f19ae0 Additional canonicalization added for AddNode (#5846)
new 5ed0dd8b06 [FIX] Recover global state after test_util.py (#5824)
new e29c7de1eb [Object] Introduce POD-C Compliant tvm::Map (#5740)
new 19f9a1a8dd [DataType] Add bfloat16 (#5601)
new c28da31f33 Fix map assign issue in CI test (#5854)
new c84295ae29 [Target] Introduce Target Id Registry (#5838)
new 0d13540c9a [Bugfix][Build] Fix building with LLVM-10 on macOS (#5859)
new 132e6e44b1 [TIR][REFACTOR][API-CHANGE] Change Call.name to Call.op(RelayExpr) (#5863)
new 216c3c8bf1 remove fatal (#5888)
new 3d39c011d8 [Relay]Allow every runtime module to handle constants (#5885)
new 44d9b5b2ce Fix the python intrin rule (#5895)
new 11883085fb Add Binary Intrinsic ops to TIR Ops in C++ (#5900)
new bcecc3feb8 Allow implicit conversion in TVM FFI to tvm::Bool (#5907)
new daa0e854d6 [TIR][REFACTOR] Deprecate FreeStmt (#5890)
new 9bb231d68a [Thread Backend]Fix CPU Thread Binding for Multiple Sockets (#5918)
new f389b61377 CUDA device API & VerifyGPUCode pass update (#5898)
new 133a4bf4c8 Two small fixes to AMDCPU codegen for LLVM 10+ and ROCm 3.5+ (#5920)
new 761c7e5667 [BACKPORT-0.6][Bugfix][Arith] keep div_mode during floordiv simplify (#5922)
new a4c04b95de [Arith][GPU]Rewrite simplify fix for Vectorized Cooperative Fetching (#5924)
new 181f5309f9 [TIR][OP][API-CHANGE] Remove CallNode.call_type in favor of attribute. (#5937)
new 0f4dac16b8 Update date in the NOTICE (#5942)
new 347f7338ad [TIR] Improve Let/LetStmt support. (#5949)
new d0ef0915bc [REFACTOR][TIR][API-Change] Range/IntSet API style consistency. (#5953)
new f6471fd23f [BUGFIX] Add cuda 11 to contrib.nvcc.find_libdevice_path() (#5902)
new ebb87eae6f [TIR][ANALYSIS] Refine side effect analysis. (#5954)
new f04e7ab773 [OpenCL] Fix OpenCL get_valid_counts errors due to intrinsic atomic_add (#5857)
new 8f775e9fc4 [LLVM] Remove redundant function CreateBufferVecPtr (#5982)
new c38055e3ba [Target] Migrate data structure of TargetNode (#5960)
new 792b3c4963 [LLVM] VectorType::get with two parameters is deprecated in LLVM 11+ (#5984)
new 170c83e22c [Target] Use TargetNode::attrs for Target serialization (#5993)
new 524addc581 [Arith] Inequalities solver (#5618)
new 393594946f Undefuned names: import os for line 324 & import re for line 308 (#6003)
new f12893797a [LLVM] Auto-convert shuffle with single index to "extract element" (#6006)
new a99bf1b00f [Frontend][Relay] Add Parser 2.0 (#5932)
new 50102d5387 [TARGET] each option of target str should only contain one '=' (#5988)
new c0f450844c [LLVM/CPU] Terminate basic block after "ret" instruction (#6036)
new 87d6413ee7 µTVM CRT modifications for on-device RPC server (#5921)
new 92b5b86510 [CODEGEN] Fix code generation bugs for C/CUDA & Improve VerifyGPUCode pass (#6041)
new 7c1aa066be [LLVM] Create TBAA information based on the unrelying buffer type (#6046)
new ffa6209783 [IR] Fix a primitive check error (#5991)
new 6644546ce4 [Ansor][AutoTVM v2.0] Part 0: Ansor minimum system for auto schedule generating (#5962)
new 73066a5d53 [RUNTIME] Support module based interface runtime (#5753)
new 1feec56a44 [Ansor][AutoTVM v2.0] Part 1: Rename namspace form auto_schedule to auto_scheduler (#6059)
new 5709c38e60 [TARGET] ONNX codegen (#5052)
new ed50cb43a4 [clflush] Enable x86 cpu cache flush (#5914)
new efe5580fc9 Fix error message in Buffer::vstore, NFC (#6056)
new b3ad26f80b [ARITH] Improve vector simplification for float operands (#6043)
new 761c51bdcb Fixed point multiplication improvements for AArch64 (#5980)
new 2535fb3c98 [DSL/TE] Scalar support for `te.extern` (#6079)
new 432353243b [Cmake] Add default value for option USE_DNNL_CODEGEN in the cmake (#6099)
new 480d4317c6 [BYOC][Contrib] Arm Compute Library integration (#5915)
new 9f8a219eb0 add attr option mfloat-abi for arm32 (#6123)
new 2b00ec6963 [TIR][Bugfix] Improved massive build times caused by tir.floormod and tir.floordiv. Fixed Topi testcase. (#5666)
new 338daf8e12 [BYOC] Retire the example json runtime (#6177)
new b9a327ecc1 [REFACTOR] topi -> tvm/topi (#6186)
new d42364c16f [BUILD] Remove libtopi from the build (#6189)
new 6e82666cba [Fix] avoid unexpected throw in AttrInitEntry (#6128)
new ea8b05f0f0 [TIR][Transform] HoistIfThenElse added (#6066)
new 3ec59fca78 [Target] Rename target_id => target_kind (#6199)
new 5c4a2cf6eb Fix compile warnings. (#6204)
new fc1e394b3a [Target] 64-bit RPi4b target (#6211)
new 346ea5be79 Pass mfloat-abi to LLVMModule::Init (#6150)
new dad0d8c455 [µTVM] Add --runtime=c, remove micro_dev target, enable LLVM backend (#6145)
new 78a99bca8d [uTVM] fix crt building and running error (#6231)
new 0f9f17fc41 [TIR][Hybrid] Hybrid Script Support for TIR (#6227)
new 21cc7c3562 fix cuda half math function is undefined: hpow, htanh (#6225)
new e169e06c85 [Topi,x86] Split MKL from BLAS. (#6182)
new 653a665326 [RPC] Update build support for cross compiling apps/cpp_rpc with OpenCL (#6229)
new a2ed041628 Fix division range estimation error in simplifier (#6244)
new 8c21a7cc9f [Parser] Parser 2.0 part 2 (#6162)
new c2d3545251 Revert "fix cuda half math function is undefined: hpow, htanh (#6225)" (#6249)
new 8e3f83bd7f fix cuda half math function is undefined: hpow, htanh (#6253)
new 431e1814e7 [TESTS] Decrease test times by introducing testing model (#6235)
new 4e289724f7 [Target] Creating Target from JSON-like Configuration (#6218)
new 3a15ab2bec Improve error messages for memory verifier and gpu memory verifier (#6281)
new a613eb5ab0 [Build] Reflect Compile-Time CMake Options into libtvm.so (#6280)
new 93c9576efc [Build] Add cmake options into libinfo (#6286)
new 2ad63a6c4b [TOPI] Support int4/int8 conv2d tensor core with HWNC layout (#6121)
new b60d47795b [RUNTIME][REFACTOR] Use new to avoid exit-time de-allocation order problem in DeviceAPI (#6292)
new 9fb4b5b2ff [Autodiff] Optimize and eliminate the Jacobian tensor for te.autodiff (#6078)
new f363ab1985 Add tvm::support::hexdump() debug utility (#6154)
new 5487c3e046 [Hexagon] Initial support for Hexagon codegen (#6261)
new 55f8b9966a [BYOC][ETHOSN] Introduce the Ethos-N BYOC integration (#6222)
new e69d7d0815 [Target] Add python binding to new JSON target construction. (#6315)
new 063fe47347 [TIR] Enforce buffer pointer var type to be consistent with dtype. (#6317)
new eeb457a995 [Relay] Make check stricter: disallow inserting function with free vars into module. (#6313)
new bc7b579127 [MSVC] Make able to compile with MSVC (#6341)
new 08521d35c4 ROCm changed name of library and removed old one in ROCm 3.7 release. (#6345)
new b22d8b708e Add `init` member to ReduceNode (#6138)
new 9ba654856c [CMAKE] Compatible for ROCm before 3.7 (#6359)
new eed84bdcc4 [Target][Codegen] Use target class in all codegens (#6347)
new 0435807143 [TIR][Transform]Block scope hoisting added (#6238)
new dd9b1453d1 [Relay] support i64 indices (#6143)
new 1b91f78e54 [TESTS] Refactor tests to run on either the GPU or CPU. (#6331)
new 69a7cdebcc [RELAY][VM] Enable heterogeneous execution for Relay VM (#6337)
new ee93e0718e [METAL] Use CFBridgeRetain for retaining the allocated resource (#6393)
new 57f4ab1598 Remove unintentional pytest dependency. Fix #6398 (#6399)
new a9d23e8a87 [TESTING] Fix the error when running tests with default targets (#6394)
new d77b1b41ce [METAL] set MTLBuffer purgeable state (#6376) (#6438)
new f5b8daf9b9 [Target] Tags, Composite Target, Unified Interface (#6369)
new f48f8d6407 CUDA: broaden path detection (#6444)
new 5c77b9311f ROCm: use GcnArch for mcpu and ApiVersion to select code object version (#6447)
new 83a7218508 [Format] Convert all Python code w/o CI (#6448)
new 0cdc9fecdc [TEST] Fix Some Failed Test Cases and Tutorials of The Issue #6453 (#6454)
new 7f1a50ee3d [WINDOWS][MSVC] Fix MSVC warnings (#6450)
new 6535ff3fd3 [CMAKE] Improve FindLLVM to handle llvm-prefix with space. (#6466)
new dfc191599d [RFC][Formatting] Add scripts for applying Black to the Python code. (#6437)
new a2866bd013 µTVM RPC server and Part 1 of AutoTVM compilation infrastructure (#6334)
new 14729132fd [FIX] Save tensor size with alignment (#6487)
new 923278cd2f [PY] GraphRuntime: Update the tutorials to the module-based interface (#6482)
new 56b81f4d04 black format master (#6494)
new 75ef9153a3 extending FindVulkan to build RPC server on Windows correctly (#6498)
new bb92bfb38b Switch CRC-CCITT libraries (#6499)
new d71fdc6298 [TIR][Hybrid] Hybrid Script Improvement (#6507)
new 97b071d7a8 Add beagleboard ai, thunderx and stm32mp1 to the arm_cpu target. (#6501)
new a892c20655 [LINT] Use fmt off to disable problematic black fmt (#6519)
new 45bd42c16c Enable more warnings when compiling with clang 10.0 or greater (#6456)
new 06ac3d8481 fix libtvm build dependencies when USE_MICRO is ON. (#6524)
new 2beb1f797a Add the SYSTEM keyword to all cmake include_directories commands for 3rd party or external headers. Warning flags should only be applied to code within the tvm repository. (#6531)
new e0c2fd06e3 Add alternate cublaslt library name. CUDA 11.0 uses cublasLt. (#6541)
new 8c906c9b44 Generalize the use of booleans to support all cmake boolean values. (#6515)
new 4c5510382d [TIR] Fix rewrite_simplify tir::builtin::shift_left (#6555)
new 8e000c2a74 Add proper cmake PATHS when multiple NAMES. (#6558)
new ae599e3155 Make CMakefile/config.cmake/install_tvm consistent (#6562)
new 866467988e Rename tvm.hybrid.script to tvm.script. (#6522)
new c82301d98a Bring Your Own Datatypes (#5812)
new 61411dd1be [BYODT] fix CMAKE flag name + update documentation (#6567)
new 9a2f5cd859 [RUNTIME] NDArray CopyFrom/To Bytes always synchronize (#6586)
new 47c55a7cb2 dynamic conv2d for cuda (#6598)
new 96643a870f [Parser] Fix parsing op string attributes (#6605)
new c8f3280e24 [RELEASE] Bump version to 0.7.0 (#6614)
new 1b9717c761 Updated runtime to run under FreeBSD. (#6600)
new ffdb2fffb3 [VERSION] Version for v0.8 cycle (#6615)
new e64bb6e908 [Rust] Improve NDArray, GraphRt, and Relay bindings (#6563)
new 3f328455df [µTVM] Avoid use of builtin math functions (#6630)
new ce448669ba [Diagnostics][Relay][InferType] Refactor InferType to work on whole module, and use new diagnostics. (#6274)
new dc1b894b6b Faster sparse_dense on GPUs (#6580)
new 79dd543957 [CI] Move to use main as the default (#6665)
new 3c33a880c0 don't validate AttrInitEntry until a value has attempted to be set (#6672)
new 7cb98925fc [ARITH] Introduce iterator (quasi)affine map detection. (#6667)
new ad1a061f3e [REFACTOR] util => utils for consistency in the project. (#6684)
new f720ecb629 [FIX,MICROTVM] Skip microtvm tests if microtvm is not built (#6693)
new d227c82ae9 [LLVM][WINDOWS] Recover windows support for the latest LLVM (#6698)
new 757fa1bdab [PYTHON][WINDOWS] More robust dll loading behavior after python3.8 (#6707)
new 02c4a1b38f [CI] Update docker to latest (#6708)
new 4896cbb305 Fix the Type bug in ConvertSSA. (#6709)
new a43db49333 [BYOC][TensorRT] TensorRT BYOC integration (#6395)
new 6039b8521c [TVMScript] refactor (#6734)
new 18e082e191 [FIX,CMAKE] Use set_property with append flag instead of (#6725)
new daa6703bb4 [LLVM] Create fixed vector size according to latest LLVM12+ changes (#6717)
new 6f19598f4b [LLVM] Avoid warnings when compiling getNumElements with LLVM12+ (#6738)
new 80db13b1c4 Update include and src dir CHECK* to ICHECK* (#6745)
new 5b7b9147ae [CI] Introduce all platform test for windows/mac/linux. (#6756)
new 9ca697bc42 [ARITH] iter_affine_map bug fix, stride generalize (#6753)
new 2c8bdeecb0 More CHECK to ICHECK (#6758)
new 047e9ba7a3 [LLVM] Add target feature string to function attributes (#6763)
new 589ec10024 [ARITH] Tight bound for floormod (#6771)
new a58a8cb482 [REFACTOR] Remainings of util => utils (#6778)
new 28f094c796 fix a bug in convertSSA. (#6785)
new 750452a9fd [QNN] Optimize requantize for power of 2 and fix dequantize for per-channel quantized input (#6675)
new 11bc488168 [FIX,AUTOSCHEDULER] Fix auto_scheduler to run with multiprocessing's spawn start method (#6671)
new 1559086050 [µTVM] Add serial transport, parameterize µTVM Zephyr test, run on physical HW (#6789)
new 0ec9b53c89 [CI] Add m6g instance (ARM64) to mainline CI (#6804)
new 904e8578b5 [OBJECT] Update types slots for baseexpr and primexpr (#6814)
new c60ba81041 [Rust][Diagnostics] Add initial boilerplate for Rust diagnostic interface. (#6656)
new 4570eb3022 [µTVM] Add virtual machine, test zephyr runtime on real hardware (#6703)
new a5dd0fbb3d [Rust][IRModule] Flesh out IRModule methods (#6741)
new f76436de12 [TVMSCRIPT] Using diagnostics for TVM Script (#6797)
new 493c056f17 [Bugfix][Module] Fix recursive GetFunction in runtime::Module (#6859)
new dd52f1f586 [BYOC][CONTRIB] Vitis-AI codegen integration (#6343)
new 016d8011b3 Update search for bitcode files for rocm 3.9 (#6865)
new f87ce8bcb6 Do not show meta-data when printing IRModule (#6881)
new a794ee866a [GCC] Fix GCC8.1 and GCC8.2 template dispatch compilation issue (#6893)
new e8ae03d378 Fix bug of generate-unmatched-brackets in CodeGenC::PrintSSAAssign (#6887)
new 2f5605d209 [TIR] Add spans to all ExprNodes (#6860)
new dd9dd88a6a Fix edge cases in const_int_bound and fold_scale_axis (#6911)
new 14852f1b73 Consolidate RPC Context helper functions (#6915)
new dfb9a42321 [DOC] Fix typo (#6920)
new 9c0809c934 Fix code to work with cmake 3.2 (#6952)
new 12c9d2bbe9 Fix #6954 uTVM, fix when building the runtime for native hardware (#6957)
new cab6a14e6c Add Relay option to link parameters into runtime Modules (#6917)
new b0911e3f37 [Hardware][Verilator] Integrating and simulating hardware accelerators in TVM (#6971)
new 9ce848df3e [AutoScheduler] Support layout rewrite for whole networks (#6987)
new 0d8bfd116f [Diagnostics] Add environment variable for controlling top-level printing and fix issue with pretty printing/parsing roundtrip. (#6874)
new fb3b856009 Add version 11.1 in finding CUDA libdevice (#7033)
new 59d7d7a82b [TVMSCRIPT] Attach span information to tir nodes in tvmscript (#6910)
new a62da08729 [LLVM] Support atomic for GPU backend (NVPTX, ROCm) (#7051)
new 9bc1c3af44 [TOPI] GPU scatter 1D via sorting based approach (#7056)
new 19af07d0b1 fix nvcc compile option to be compatible with older cuda (#7065)
new 57c630f260 [FIX] Improve error messages and docs (#7064)
new c10b12ef18 [FIX] Remove debugging print statement (#7072)
new 613ad112ac [Relay][Strategy] Allow cuda cross compilation without physical device. (#7063)
new b435d227fe Rollback changes to SSA begin/end scope for Store in (#7073)
new 43b86c8051 [metal] support int64 (#7105)
new 0d454e288e [metal] update language version (#7116)
new 26331146c9 [metal] Remove support of `double` type (#7118)
new 65c28dccaa [CONTRIB] PopenPoolExecutor (#6959)
new 883a0d476c Fix a few OpNode argument field descriptions when registered (#7140)
new 0bd7fdacfa Created CSourceMetaData module for model metadata (#7002)
new b464fc9139 [AutoScheduler] Add layout rewrite support for dense and batch matmul on CPU (#7161)
new 5d07ef2657 [AutoScheduler] Fix the conflict of thread pool in measurement (#7166)
new 5ac1fc3abb [FIX] Fix using num_workers in omp (#7078)
new b23414ceed [TIR][REFACTOR] Enforce allocate to use the correct var pointer hint. (#7216)
new bf080527c8 [Arith] Simplify cast (#7045)
new 9ca7a3e28e Change the all #pragma once to ifdef include guard (#7264)
new aefef06639 fix mcpu on os x (#7276)
new 5dc2a7f451 [TIR] Support Return in TIR (#7084)
new dc79f52a75 [TIR][REFACTOR] ForNode introduce thread binding and remove legacy field (#7306)
new 15629ffe84 [TFLite] Strided slice handling of shrink_axis_mask improved (#6998)
new 7475975275 [TOPI] Rewrite GPU argwhere using exclusive scan (#7314)
new ab5782cd64 [CMake] use wrong flag name (#7341)
new f14fb6df18 [FIX] Don't add $TVM_HOME/.. to the include path when compiling code. (#7342)
new 1469a55dd8 Update uTVM code to work with the nRF5340DK dev board. (#7331)
new 88c01ef66e Improve op_type missing message (#7384)
new 94efca533d Fix missing round(), floor(), ceil() for target C lowering (#7382)
new 22b8ef454f [FFI] Improve error messages when array/map types do not match in function calls (#7330)
new f64763672d Add cuda tags and unit test (#7410)
new 8bdc9851d5 [FIX,CMAKE] Only compile runtime files once (#7417)
new e4cdb46aef [FIX,CMAKE] Only set Clang flags for C++ files (#7424)
new 842f37270d [Arith] Fix iter_affine_map with non-const extent (#7437)
new 76731c7cc9 Make the TVM targets list available in Python (#7427)
new e14564941b update stm32mp1 arm_cpu target configuration (#7443)
new cb4ce233f2 [ROCM] Add Thrust support (#7458)
new d5467a98b3 [RUNTIME] Fast path for single thread run to allow app level threading (#7454)
new a3f213e622 [TIR] Specialize MutateArray in StmtFunctor. (#7486)
new 22d0f453f8 Fixed minor misspelling (#7499)
new 36756c39e5 [Target] Add target host field for target specification (#7462)
new 5bbb89ec32 [CRT] Create C-runtime-style metadata module for llvm builds (#7398)
new 2801f9964e [DOCS] Remove incubating from docs (#7525)
new 4284e6a23e [PYTHON] Enable proper error message in python package (#7521)
new 3b8843effb Many fixes to get unit tests passing on Windows. (#7431)
new 1cd58d1160 [CI] Move ci-cpu to use llvm-11 (#7541)
new ceb18b73d6 [Runtime] Special Memory Scope Support (#7488)
new fce7a7b087 [TensorIR] introduce Block and BlockRealize (#312) (#7553)
new 05ceb77364 [Codegen][CUDA] Fix: cuda codegen vectorize cast (#7561)
new b50a38608b [Pass] Profiling TVM compiler passes (#7500)
new e99acbc6c6 [TIR] Add TIR While node (#7425)
new 086b8d4f2d [SPIR-V] Add SPIR-V lowering for While node (#7574)
new 75546495db [RUNTIME] Move Map into runtime (#7570)
new df0ec77f34 Fixes for using Python APIs from Rust. (#7085)
new bf97ee1878 [SPIRV] Support Bool buffer argument (#7591)
new 6b6aa7a19c [Vulkan] Support passing 64 bit scalar (#7572)
new f4c0a3ffc3 [RUNTIME] Add device specific timers (#7472)
new 6a9013b1da [CUDA] BF16 support (#7014)
new aa2b082b4e [RUNTIME] Unify load params interface (#7559)
new 1333a79708 Added MaybeAlign to CreateAtomicRMW calls to fix build for LLVM13 (#7617)
new f669706d0a Prevent host Vulkan SDK blocking cross-compilation (#7609)
new ebd3dc7f2b Allow cuDNN in non-CUDA non-system dir (#7608)
new c4f3f49f65 [SPIR-V] Fix pushconstants offset calculation for 32 bit values (#7620)
new 7aa0188502 Introduce Model Library Format export format (#7533)
new 848e87e2e6 [CUDA][TOPI] Fix CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES with NMS for certain GPUs (#7623)
new e649f9871b [TIR] Add PreOrderVisit and VisitPrimFuncs (#7627)
new 126033c3a1 [MIPS] Fix CALL16 reloc at 0x290 not against global symbol (#7634)
new 39eff13326 Introduce Apple BNNS backend (#7299)
new 7d36f66017 [PROFILING] Combine USE_VM_PROFILER and USE_GRAPH_RUNTIME_DEBUG into a single flag USE_PROFILER (#7637)
new 697003da25 [TOPI][GPU] Mergepath sort with odd-even block sort (#7611)
new 35f503a32b add nvcc support (#7668)
new 8db99685f0 [SPIRV] Declare int64 capability by default (#7681)
new 81391ad0fa [Runtime] Extend Graph Runtime To Support Cuda Graph Launch (#7616)
new e048585ce2 [RUNTIME] Add libbacktrace for backtraces with line numbers (#7153)
new 00fb894712 [RUNTIME] Cleanup build for libbacktrace (#7706)
new 1c0b7c5755 [TensorIR] TVMScript Parser/Printer (#7630)
new 1003826b37 [TensorIR] add TIRTextPrinter support for Block and BlockRealize (#7716)
new 5abb6982de [METAL] Fix memory leaks in Metal runtime (#7714)
new e8481e9b9c [TensorIR] Fix parser autocompletion mode (#7737)
new 268f932041 [Refactor] Rename TVMContext to Device (#7721)
new 20b5a8a13f [RUNTIME][WEB] Cleanup logging for web runtime. (#7750)
new 43e754aff6 [ARITH] detect iter affine map with predicate (#7752)
new 20dcb41bfc [Logging] Bring back the stack size optimization (#7756)
new c0f7208d43 Clean up uTVM demo runtime, add ONNX model test and tutorial (#7557)
new 63e55bdb44 [ARITH] normalize iter affine map expr to PrimExpr (#7759)
new 9835549eda Rename GraphRuntime to GraphExecutor (#7653)
new 91e733dd16 [ONNX] Enable GPU in ONNX importer tests (#7438)
new 958686ca20 Add support for using the VM across the RPC boundary. (#7746)
new fdc1afe05e [Target] Add support for target object with host field compatible with previous api (#7534)
new ed8309b8c4 [PYTHON][RPC] Make rpc proxy jupyter friendly via PopenWorker. (#7757)
new 8e028f7829 [CodeGen][OpenCL] Limit OpenCL built-in vector lanes to 2, 3, 4, 8, 16. (#7777)
new c1632f5dee [ARITH] Subspace division (#7760)
new 9cc84152c8 Fix compilation errors with clang 11 (#7783)
new 3da13c9ab4 [Hexagon] Reenable compilation of TVM runtime for Hexagon (#7784)
new 62c5b0e936 [Target] Fix empty target and host for autotvm task (#7791)
new b7849ed60a [FIX] tvm.testing.parametrize_targets documentation for arguments does not match what it is acutally using. (#7778)
new c3038985d9 [M1b] Scaffolding ScheduleState data structure (#7765)
new ea2402f263 introduce pass lower_init_block (#7806)
new ac415eef94 [Vulkan] Support uniform buffer object for passing many scalar arguments (#7717)
new 00712bf234 Revert "[Vulkan] Support uniform buffer object for passing many scalar arguments (#7717)" (#7821)
new 6c762e4149 [BugFix] Fix the race condition issue of packed func. (#7246). (#7619)
new e89a71840b Fix Metal accuracy problem caused by <dtype>3 vectors usage (#7830)
new 1b2dfbf090 [µTVM] Add support for mps2_an521 board (#7813)
new 91fd3f4d5d [TensorIR] [Script] adding support for opaque block (#7829)
new d67a1cd88c Misc. improvements to documentation/build setup for first-time builds. (#7840)
new 3562f4fbf7 Fix typos in comments (#7862)
new a05c76b283 [Vulkan] Support uniform buffer object for passing many scalar arguments (Take 2) (#7833)
new 5933506e53 [TIR] Add a new intrinsic count leading zeros for LLVM and SPIR-V (#7825)
new 1ce952d423 [TensorIR][M1c] LCA detector (#7848)
new dd66d20261 [METAL] Fix issue with GPU fails (#7819)
new 5aa41b63ea [TensorIR][M1b] Schedule class (#7847)
new 0ede35266a [TIR] An analysis pass to calculate workspace size for primfuncs (#7859)
new 39618d31c1 [TensorIR][PASS][M1c] PlanUpdateBufferAllocationLocation (#7873)
new 6208c0d832 [VTA][OpenCL] intelfocl (#6126)
new 3313a34423 [PROFILER] Add CSV output to profiler (#7797)
new e42c8e8b2b [RPC][REFACTOR] Use PopenWorker to handle RPC Server. (#7889)
new 73e9fb7fdb [Runtime] Driver version + consistent clock speed units (#7867)
new 4def45b968 Update ICHECK error message with link to documentation page. (#7869)
new d0ce2875b2 Remove unnecessary bracelet around make_int (#7907)
new ad8d47b73f [Target][Lowering] Update Op Intrinsic Lowering Mechanism And Intrinsic Lowering Pass (#7809)
new 6614fd3b62 [TIR][SPIR-V] Fix computing clz on int64 input for vulkan (#7913)
new f3852da808 [CodeGenC] Fix bugs when calling extern functions (#7911)
new a5afe84898 [TensorIR][PASS] CompactBufferAllocation (#7923)
new aa7c3f8ff4 [RUNTIME][BUGFIX] Fix DSO module problem when its parent get destructed. (#7918)
new c01e7b945e [TIR][TRANSFORM] Return value support in tir.tvm_call_packed (#7932)
new cfe1f97475 [AutoTVM] [TOPI] Support AutoTVM for int4 tensorcore (#7831)
new 63a1cf5bdc [Target][Legalization]Add Tir Level Legalization Function Registration And Update Intrinsic Lowering Pass (#7936)
new f737b5e78b [OpenCL] Refactor cl_program generation (#7834)
new b88bba10f4 Replace 0.0.0.0 with 127.0.0.1 for client connections (#7766)
new 71666f2643 [NVCC] Bugfix nvcc command tool that relies on the compile time env (#7964)
new 8ab4de650f [Codegen] Fix assertion errors in llvm backend when using llvm debug build (#7959)
new 13931c1fbe [Graph Executor Debugger] Fix parameter dump (#7903)
new fd605d341c [TensorIR][Pass][M1c] FlattenBuffer (#7962)
new aeb5f9869f [RPC] Make tracker jupyter friendly (#7961)
new 86c0adafee [Vulkan][Runtime] Uniform buffer bugfix, minor cleanup (#7966)
new 372846280a [AOT] Introducing AOT in TVM (#7785)
new 3cf522c188 [DLPACK] Support the new python array api with DLPack (#7993)
new 82d68d0dbe [RELAY] Enable registering op with python (#8002)
new 569ec21a76 [Vulkan][Codegen] Spir-V codegen, correct labels/blocks in WhileNode. (#8013)
new 5eaaf2b9e0 Rename gpu to cuda, and bump dlpack to v0.5 (#8032)
new 6d4a82e729 Rename gpu to cuda in java/rust/typescript (#8036)
new fd558c6700 [uTVM][AOT] Adding workspace byte alignment (#8019)
new 05787309f9 [RUNTIME] Improve signal handling in python env. (#7919)
new d550237577 [Tests] Fix requires_gpu (#8050)
new 4d683fe3bf [TensorIR][M1c] Lower and build TensorIR (#8044)
new 30ee8f871f [METAL] Fix codegen for inf and erf (#8054)
new c11eaa19fc allow module exits without del (#8063)
new 54a5ee7b4c [IR] Add storage scope to PointerType (#8017)
new 29614e1ed5 [Vulkan] Broke out implicit device requirements into SPIRVSupport (#8048)
new e149efae84 Add flag to build static version of TVM runtime (#8059)
new 2da1365d83 Custom dyld linker for iOS mach-o executable files (#7875)
new 23e23f4f40 [AOT] Remove lookup parameter function in AOT (#7988)
new e5b47f112c [Vulkan][Codegen] Added spvValidate check after vulkan shader generation (#8098)
new cb2e73f37f [Refactor] Rename asnumpy -> numpy in NDArray (#8083)
new 58acca1135 [Vulkan] Remove some interface block decoration (#8102)
new fb9d22dee6 Add a default warp size 1 for vulkan and opencl (#8109)
new 07be31bccc [TensorIR][M2a] Verification of cached flags (#8114)
new 74f72398d1 [METAL] Split kernels and compile them separately (#7980)
new c217b91db9 [TensorIR][M2a] Structural Error Reporting (#8121)
new 66da8f797a [Vulkan] Add device capabilities to Target, use in codegen (#8127)
new 8b6b97f829 [Codegen][CUDA] Fix make_int4x cuda codegen vectorize (#8137)
new 3067b11792 [microTVM] AOT Demo (#8075)
new ab34347bcb [IR][Pass][Instrument] Pass instrument framework (#7952)
new cc4b7bf849 [Vulkan][Refactor] Split out vulkan.cc into separate distinct functionality. (#8157)
new 2e8cf5ef71 [CMake][Minor] Update CMake warning flags (#8152)
new 687d1bd33f [Vulkan][Docs] Minor updates following Vulkan target query. (#8151)
new 6df2d4f1ed [Vulkan] Remove dependency on Target from -from_device functionality. (#8171)
new e2358a01b2 [Vulkan][UnitTests] Compatibility fix for test_vulkan_unique(). (#8186)
new 26e7be96e8 [Vulkan] Corrected typo in Vulkan capability error messages. (#8187)
new d31bf56df7 [Vulkan][Refactor] Pull out vulkan initialization into VulkanInstance and VulkanDevice (#8188)
new 599f734f89 Complete register op from python (#8079)
new 8dd3b141dc [Codegen] Use "target.build.$TARGET_KIND" for all codegen functions. (#8071)
new 277b543e09 [METAL] Fix the rest memory leaks in Metal runtime (#8175)
new 71a28cfd9c [CMake] Add compile-time check that libtvm_runtime.so has no undefined symbols. (#8178)
new 660a3bc059 [AOT] Initial implementation of --unpacked-api (#8023)
new 956f75e05f fix py files (#8194)
new dc49259d15 [Texture support][Part 0] Device API and runtime support (#7711)
new 786a1a8a00 [RUNTIME][REFACTOR] Re-organize Containers into SubFolders (#8183)
new 604f76db3c Add thread_warp_size for Metal device in default target attributes (#8202)
new ddda33ad2b Expose list of PassContext configurations to the Python APIs (#8212)
new 22b0302b9e [RUNTIME] ShapeTuple Container (#8200)
new 129778c8c6 Add metadata information to the listing of PassContext configuration listing function (#8226)
new 74edf7d0eb [LLVM] Fix CodeGenLLVM::LinkParameters (#8213)
new 787864e954 [Vulkan][Refactor] Move ownership of per-CPU-thread objects to VulkanDeviceAPI (#8196)
new 97e59e7f3b Unify Python and C++ TIR lower API (#8110)
new 8fda85c62b [BUG FIX] Add _type_has_method_sequal_reduce to Span and SourceNode (#8248)
new 8d16a70e9e [Target] Allow 'true' and 'false' strings in conversions to integer (#8254)
new 25b0df2d5d Update parsed kernel sources check. (#8257)
new b3ad41870e Add check to only cast opaque handles to cl::BufferDescriptor at runtime. (#8256)
new 6d18fa8542 Fix compilation of tvm runtime for iOS (#8242)
new 65567178f8 [Metal] Fix run metal model when non first device is selected (#8261)
new 305de7c99e [TVMSCRIPT] Fix printing of rank 0 buffer access (#8215)
new 9f2292e377 [Metal] Fix bad stream after interrupted tuning session (#8244)
new 8d248b0886 Fix a word typo and add spaces. (#8278)
new 82b3de62cc [Vulkan][Codegen] Fixed SPIR-V scoping bug with threadIdx (#8281)
new 26e48c88db Fix Intel OpenCL SDK search path for Windows (#8301)
new 378afc5816 [TVMSCRIPT] add more type support in script function parameter (#8235)
new 59db51339d [Docs] Prevented docs/1 file from being generated. (#8029)
new da42c09804 [UnitTests] Automatic parametrization over targets, with explicit opt-out (#8010)
new 166a1bccea [Vulkan] Implement sync for SyncThread("warp") (#8320)
new b2c4da89d7 [Vulkan] Improved error message for extern calls passed to SPIR-V codegen. (#8332)
new cbc4c38647 [Vulkan] Added debug saving of Vulkan shaders, environment variable documentation. (#8333)
new 373d7e98c7 [AOT] Name mangling in AOT (#8014)
new 2b6cdc3552 [TIR] Tighten up invariance of CopyOnWrite in recursive stmt visitor (#8358)
new 9a1d5e9683 Decoupling AOT from graph memory planner (#8096)
new 1aec776d53 [Topi][Unittests] Parametrized tests in `test_topi_dense.py`, split out gpu-independent implementations (#8336)
new bdd9ade4ba [Build] Add CUDA_VERSION and GIT_COMMIT_TIME (#8372)
new bc321c8e7d [Vulkan][Unittests] Add parametrization to vulkan unit tests. (#8348)
new f6ceb95fa9 [FIX] Detect like cores by looking at scaling_max_freq instead of (#8370)
new ad6a2af0d0 [Metal] Add pass for splitting kernel with huge number of args (#8313)
new 24b943746b [Tuning] Allow multiprocessing spawn to work (on macOS llvm at least) (#8363)
new 839c0abd85 [TIR][TVMScript] specialize (#8354)
new 0f2849d44d Add "operator" style to Model Library Format (#8072)
new 26d049803c [microTVM] Add Nucleo stm32l4r5zi board to zephyr (#8386)
new 0ff5f3e0eb [Arith] Inverse affine map (#8384)
new 8603b8d681 fix storage rewrite index remap (#8338)
new 43a743060a Cleanup more uses of np.bool and np.int. (#8399)
new b844c5e6e6 [DOCS] Add docs for Pass Instrument (#8220)
new 7f5466ab73 Refactor the compile engine into a cleaner interface. (#7518)
new 0f8c7f59b3 [Arith] Simplify MatchFusePattern in InverseAffineMap (#8427)
new a08826bfaf [TVMSCRIPT] TVMScript Parser support BufferSlice indices (#8408)
new e71f9db831 fix wrong log of tir pass VerifyMemory (#8445)
new 5b6b2ac5c7 [ROCM] Fix undefined symbols by adding library (#8446)
new 15d538ffe8 [MyPy] Extend type checking and annotation for TIR (#8429)
new 6c2b060b13 [PROFILING] Use PAPI to collect hardware performance counters on CPU and CUDA (#7983)
new 9afc6da40f [Refactor] Enforce attaching storage scope to PointerType (#8366)
new 9887c3d8a3 [Fix] Explicitly retain `__hash__` of `StringImm` (#8449)
new 14331cb519 [UnitTests] Minor fixes to unit tests for cudnn/vulkan targets (#8462)
new 6517035b35 fix typo (#8484)
new 6a56af7745 [TVMSCRIPT] Support tir.abs node in tvm script (#8488)
new 8033c2a32e [Bugfix] [tir] do not simplify 'Any() - Any()' to 0 (#8266)
new 181be7f574 Switch from CompileEngine to TECompiler in Interpreter (#8486)
new eb3fbde539 [ARITH] fix zero iter bug in arith (#8494)
new daa0272d85 src/runtime/module.cc (#8496)
new 13481515a5 Fix 8093, Enhance Buffer Index Simplify (#8204)
new 7282bb7dc0 [Refactor] Remove scope attribute from Buffer class (#8463)
new 1facd61e03 [TIR] Bugfix for zero number arguments tir functions. (#8515)
new f0e8011682 [TensorIR][M2a] Fuse, Split (#8467)
new ba668c9047 [CUDA] Initial support for dynamic shared memory (#8466)
new cdb711aae2 [microTVM][Cortex-R5] Add zephyr cortex-r5 board to Zephyr (#8519)
new a0f640a3e1 [TVMSCRIPT]Fix script printters StructuralEqual check failed (#8499)
new b98c543441 [PRINTER] Fix the repeatitive cast in scripr printing (#8531)
new 0198299068 [CMake] Split out libinfo.cc into a separate target. (#8520)
new 331d273591 [RUNTIME] Fix TypeKey2Index when for root Object (#8547)
new 6a85b0955c [TIR] cast disparate floating point types for binary ops (#8517)
new a69cf82030 [Refactor] Remove AttrStmt with storage_scope key (#8516)
new a26311a4b7 [Vulkan] Prioritize discrete GPUs as device_id=0. (#8588)
new a6950e4ba4 use sizevar when convert any to tir (#8555)
new 1c9f2d7523 [Vulkan] Rewrote PointerValueTypeRewrite transform (#8528)
new f9ca835825 [TensorIR][M2a] Reduction Factoring (RFactor) (#8544)
new e8442cdca8 [TensorIR] Support for match_buffer from subregion (#8585)
new 5a53c2d2b9 [CUDA] Support multiple TIR-level dynamic shared memory allocations (#8571)
new e4d65c1a86 [BUILD] Add caching to CMake (#8373)
new 0d5a925050 Introduce --interface-api={c,packed} parameter (#8280)
new 6107a4655e [Fix] Fix a typo in include/tvm/ir/function.h (#8617)
new 2684c0ddfa [Relay][Quantization] Extend FakeQuantizationToInteger to more ops (#8241)
new b48e0aa617 [Target] Enable device querying for all targets. (#8602)
new 573bf062e2 [Relay] Change Default "opt_level" of Sequantial from 2 to 0 (#8634)
new 3492ee728c [Target] Allow spaces in target attributes (#8587)
new f7f55e391e [Target] Several minor corrections to the device property query (#8651)
new 82242046b3 [Bugfix][Target] Correct passing of target-queried bool/int parameters (#8660)
new f684e105f5 [TENSORIR] Add `from_legacy_te_schdule` attr to TE PrimFuncs (#8641)
new e2ed5e790d [UnitTests] Apply correct requires_gpu() pytest marks for parametrized target (#8542)
new 3de2f8889c [FIX] Fix threadpool reset by killing threads before destroying their shared queue (#8658)
new 594327e64a [Target] Add __launch_bounds__ directive as part of the CUDA code generation (#8678)
new f767307d28 [microTVM] Project API infrastructure (#8380)
new 568d04aa20 Fix error when compile tvm with latest llvm14git (#8682)
new aeabe3c9d1 [UnitTests] Added cuDNN to default test targets (#8383)
new 8a0defce8f Improve the error message in module.cc (#8694)
new 8b9cbc4b4f [FIX] Correctly link to PAPI (#8691)
new b9f44fa4ee [TIR] Use PopenPool instead of multiprocessing.pool (#8492)
new f12da78bb1 enhance tir signed-unsigned cast (#8706)
new a5cd56c6e7 [Vulkan] Check at codegen if the shader is within shared memory limits. (#8746)
new 20a799e161 Add DictAttrs to IRModule and refactor DictAttrs utility functions (#8750)
new 702e28a1f0 [UnitTests] Require cached fixtures to be copy-able, with opt-in. (#8451)
new 470fef1cff [TIR] Change Integer Implicit Conversion Rule to C Standard Way (#8733)
new 729ce6fc44 [Relay] Refactor Interpreter to treat lowering as IRModule->IRModule rewrite. (#8597)
new e43b5b6ea1 [TensorIR][M2a] Parallel, Vectorize, Bind & Unroll (#8716)
new cb08f9902e [microTVM] Project API Arduino support (#8708)
new 7031764300 [TIR] Fix buffer scope in structural equal (#8768)
new e4c60fa445 [CONTRIB] Allow customized initializer in PopenPool (#8789)
new 54437392c9 [Texture support][Part 1] TIR lowering and OpenCL support (#7686)
new ab93c632d9 [CODEGEN][OpenCL]: fix tir.erf codegen to opencl directly (#8756)
new 3608288ddb [TIR] Support fold constants in specialize process (#8803)
new f7dd30cffb [Vulkan] Remote target.h #include (#8813)
new 6409936361 Use CTest for C++ tests (#8809)
new 0f6062a661 [FIX] Remove leftover instances of USE_GRAPH_EXECUTOR_DEBUG (#8796)
new 1a8ef1ac20 [FLAKY] A small bug fix on the CmakeLists (#8826)
new 49ff3e24da Apply CPPLint to C++ Unit Tests (#8827)
new d80f8974a8 [GRAPH EXECUTOR,VM] Add benchmarking function to graph executor and vm (#8807)
new 7c9b248431 [Hexagon] Rework tvm.target.hexagon() interface (#8823)
new d49dc28ec6 [FIX] Bug fix for a floormod rewrite simplify rule (#8852)
new 05adbd0253 [Hexagon] Change declaration order of unique_ptr objects to fix crash (#8859)
new 4bb7520246 [UnitTests] Expose TVM pytest helpers as plugin (#8532)
new bd85e6c769 [TIR] GetBlockReadWriteRegion (#8875)
new 4e88ada372 [RISCV] Add support for llvm parameter -mabi (-target-abi) (#8860)
new deb4625937 [Vulkan][Target] Added the driver name to the vulkan target string. (#8882)
new 55f4132cc3 Change target string to Target object in the TE compiler and interpreter (#8835)
new c63d9a17e7 [TVMScript] Fix printing ForNode annotations (#8891)
new 7a1f60be6a fix error report on Store (#8895)
new db64ff8112 [Vulkan][Topi] Parametrizing additional topi tests, marking vulkan failures (#8904)
new 924c5a46fc [UnitTests][Contrib] Enable contrib tensorrt/coreml unit tests (#8902)
new 1c182a3c0e Remove LoweredModule (#8886)
new 660f1d9755 Sanitize names of input tensors in interface header (#8720)
new 568aa86270 [UnitTests][Ethos-N] Mark unit tests as requiring Ethos-N (#8873)
new 25495a3eaf [TVMScript] Enhance printer (#8934)
new 625fee52f8 [Hexagon] Add support for linked-in model parameters (#8865)
new a9f23239d2 [Bugfix] Add check to avoid calling back() on an empty container (#8930)
new 3cd747293f [UnitTest][Vulkan] Runnable relay unit tests on Vulkan (#8947)
new 3b70689b16 [CMSIS-NN] code generator for softmax (#8833)
new 9cb54a9348 [AutoTVM] Use popenpool in local_executor (#8851)
new 876f2c2818 [2/6] Arm(R) Ethos(TM)-U NPU Relay passes and Conv2D op (#8795)
new 51dee6eb51 [Bugfix] Add a nullptr check to tir.Buffer to fix the illegal memory access (#8910)
new a39a5ad7e6 [LLVM/CG] Sort PrimFuncs when creating LLVM module (#8958)
new 114725e55b [Bugfix] Fix div zero error in rewrite_simplify (#8961)
new 8290d28b34 [microTVM] Add support for AutoTVM (#8715)
new 081c97dc03 [TIR][VM] Revert a change to lower_tvm_builtin.cc from #6126 (#8274)
new e52e76dad8 [TensorIR][M2a] Compute-At (#8943)
new c10a9e70c2 Clean up LowerTEPass and pass IRModule Attrs through passes (#8914)
new cf62fed83c Add while node support in TVMScript (#9004)
new edeb9ed65a [CMake] Corrected warning message about USE_GRAPH_EXECUTOR_DEBUG (#9006)
new 9271300f2d [TIR] Add conversion from FloatImm to float in Python (#9009)
new 77def5b3eb [Hexagon] `llvm-options` attribute is an array of strings (#9011)
new 549c9a21a3 [Runtime] Pipeline Executor Initial patch. (#8702)
new c17b98bed0 [Hexagon] Allow undefined symbols in libtvm_runtime.so on Hexagon (#9024)
new 0e382f7a1c [Hexagon] Disable `thread_local` on Hexagon (#9025)
new 3fbe9851ce [Bugfix] Fix other div zero errors also in rewrite_simplify (#8983)
new 32597fbfad Implementation of relay_to_tir target hook (#8423)
new 59311c3b0e Support match pvar with dtype constraint (#9016)
new a21af4f005 [Meta Schedule][M3b] Builder (#9044)
new 40fdc17aee [Relay] VLOG for finer grained control of hyper-detailed logging (#9012)
new ce6e886729 [Meta Schedule][M3c] Argument Info (#9059)
new 87e4ad85e4 [iOS] Add tracker support into ios-rpc application (#7876)
new 8c8579da69 [Hexagon] Pytestify Hexagon unit test (#8955)
new 4bad896883 Move the allocates of AoT codegen to be TVMBAWs (#9065)
new 90854fe573 [PYTHON][FFI] Skip numpy.ascontiguousarray if C_CONTIGUOUS == True (#9073)
new a1d7535585 [Relay] Prepare for merging context_analysis.cc and device_annotation.cc (#9077)
new 39496f1582 Fix the missing `dtype` attribute of `tir.Shuffle` in Python level (#9131)
new 1b5be049ae prevent casting handle to other types (#9114)
new e97439f5e5 [LLVM] Refactor MakeCallPacked, NFC (#9118)
new dd28ef6d4f [Codegen] Swap out analyzer when outlining (#9117)
new 863cba2eed [Bugfix] Add nullptr checking for `AttrStmt` with `coproc_uop_scope` attr key (#9123)
new 0f2efb37e9 [microTVM][Zephyr] Add MIMXRT1050 board support (#9068)
new 0260a12a82 [Relay] Prepare for new plan_devices.cc (part II) (#9130)
new 9ab3b0494a [OpenCL] Remove redundant visit statement in CodeGen. (#9144)
new 713a2d3376 [TIR] add loop partition hint pragma (#9121)
new bbabfbaa41 [LLVM] Make changes needed for opaque pointers (#9138)
new 0bafb18589 Update find cublas so it search default path if needed. (#9149)
new 451e1d0371 [TIR] tir.transform.StorageFlatten refactor (#9091)
new e178842873 [TEST] Move llvm import test away from minimum test (#9171)
new a30ccd8a2a [TVMScript] Script namespace changes (#9115)
new b5008cde5c [LLVM] Rename t_tvm_context_ to t_tvm_device_, NFC (#9176)
new 43457baa61 [LLVM/CPU] Add comments with origins of various runtime/backend types, NFC (#9177)
new 87d2443536 [UnitTests][CMSISNN] Mark CMSISNN with skipif they are missing libraries (#9179)
new 32dc643c51 [TIR] Fix FlattenBuffer computing size for buffer with strides (#9195)
new 8ac5fdaae9 Fix end to end benchmark with rpc devices (#9175)
new 3718631f36 fix (#9205)
new e8ea9769e8 Adding annotations for tir.allocate (#9168)
new 58e03921b1 [cpptest] Use find_package to locate GTest files (#9208)
new 3eee0e642a Initial Implementation of TIRToRuntime Target hook (#9190)
new 20681a3cf9 Fix typo in error message in CMakeLists.txt (#9251)
new 682de67905 [TIR][USMP] Add a parallel to serial for loop converter pass (#8469)
new 66be86598c [Simplifier] Add printing of SplitExprNode and SumExprNode (#9262)
new f06d51b3a3 [LLVM] Treat scalars as single-lane vectors in CreateVecConcat (#9264)
new d43c8081b6 [TVMC] Compose target options from target registry (#9218)
new e61ad60390 [TIR] Add support for 0-dim buffer (#9224)
new 470a0357e2 [Hexagon] Fix addressing TVMValue array (#9302)
new 6384580ad4 [iOS] Fix build issues on the latest XCode and iOS (#9298)
new 421ef48399 update block syntax (#9286)
new e90fcc5603 [Codegen][LLVM] Add ability to turn on fast math flags (#9223)
new acb06a1bb6 [Error reporting] Replace runtime errors with LOG(FATAL) (#9311)
new 6c49fd5a4c Specify argument to FastMathFlags setAllowContract (#9337)
new 9d04b68156 [TIR] Add structural error printing for TensorIR (#9306)
new fedd2a718e [TVMScript] Parser for Lambdas, Parser/Printer for `CommReducer` (#9358)
new e7ef6ed040 [BugFix][Opencl] Explicitly cast min/max operands (#9374)
new c5e0bfcb99 [OPENCL] Workaround for zero size allocation (#9379)
new 785d49ed7c [BYOC] CUTLASS integration (#9261)
new a0ba40d5a2 [CUDA] Support memory reuse for dynamic shared memory (#9341)
new 42dbca9268 [microTVM] Add microTVM Template Projects to tlcpack pip Package (#9309)
new 6eed854fa2 BUG: Make sure FoldConstant can inline constants underneath on_device annotations (#9367)
new d30c747f00 Adds SEScope (Storage/Execution Scope) for use as new unit of planning in 'device' planning. (#9313)
new 57891a553d [TVMScript] Use // and % for FloorDiv/FloorMod (#9437)
new 17f425f94d [PyTorch]Add PyTorchTVM: compile torchscript to tvm and export as pytorch_op (#8777)
new db66eed7d8 [TensorIR] Print TVMScript with prefix T instead of tir (#9422)
new cfcd364f53 [TIR] Make compact buffer and get access region aware of conditions (#9372)
new 9a42c21f89 add is_entry_func tag for device function (#9436)
new 1c3098abec [TIR] Add type hint for TIR (#9432)
new 239fb031f2 Better host handling in CompilationConfig & debug printing (#9460)
new af168d59e3 [Support] Add libinfo into the runtime build (#9310)
new b5961ef8be [TARGET] Move target_host usage to new target style. (#9497)
new 2def3dc8ce Switch PlanDevices pass to be w.r.t. SEScopes instead of DLDeviceTypes. (#9326)
new 9991ba5589 [1/3][AOT][DeviceAPI] Connecting devices structure to relevant operators (#9395)
new 6f983d3e43 [TensorIR] Cross-Thread Reduction (#9360)
new 913b8a46be [BugFix][TVMScript] Fix printer for dependent loops (#9506)
new 0ba0cf6712 [Topi] Cortex-M DSP support (#9233)
new 6a5671a27b [TVMScript] Report error if add attr to implicit root block (#9507)
new 935aeaf295 [ETHOSN] Cleanup of trademarks and registered trademarks (#9516)
new b4d724b542 [4/10] Code generation for Conv2D via CMSIS-NN (#9331)
new 977a68faed Add a 'rolling_buffer' scheduling primitive (#9444)
new 1805a9a97f [TVMC][Relay] Introduce executor and runtime parameters (#9352)
new 15b54b0255 [TVMScript][Fix] Add type hints for more uncovered cases (#9505)
new 12e64401c1 [3/3][AOT][DeviceAPI] Wire up cpacked Device API context (#9501)
new 91946dea5e [TIR][USMP] Added buffer info extraction pass (#8468)
new ae0393866a [BUG][TVMScript] fix block range error (#9574)
new 0277999e07 Prepare for switching VM to LowerTEPass. (#9550)
new 780b80e240 [Target] enable -arch=sm_xx for assigning cuda target arch and deprecate autotvm.measure.set_cuda_target_arch api (#9544)
new 3848520edc Update license file to note libbacktrace (#9579)
new bf568f85c5 Bump version to 0.9.dev0 (#9581)
new f288803912 Introduction tutorial formatting fixes (#9539)
new b56388d4ec [BugFix] fix nvptx not supported by device_enabled error (#9585)
new ec62e49dbd Section names for TVM generated constants (#9524)
new f778c60550 Add minimal forwarding RPC server for host driven python execution on Hexagon (#9526)
new e57525daaf [microNPU] Move the compilation to use Target Hooks. (#9597)
new b1e602f2df [TVMScript] support kTarget func attr in tir script (#9594)
new 8c67eae172 [TVMSCRIPT] Misc error message improvements (#9543)
new 2bef4c967f [TVMScript] Syntax sugar for reads & writes (#9634)
new 3c43fbb8a1 [TVMScript] fixing block attr printing bug (#9667)
new 978d221944 [Target][TVMC][UX] Avoid creation of dummy Target objects in TVMC (#9662)
new c776d983e8 [TVMScript] Add for loop syntax sugar (#9620)
new 9eb1eae9c5 [TVMScript] Add syntax sugar for T.handle and T.match_buffer (#9492)
new 5bba37f0a7 [Hexagon] Add RPC Mechanism for Hexagon (#9631)
new 40e3da9e4c [TIR][USMP] adding the pass to convert to pool offsets (#9418)
new ebb9addd18 [TIR] Allow memory (aka storage) scopes to be retrieved/applied to PrimFuncs (#9689)
new f3fc580223 [TVMScript] Improve printer for TIR syntax sugar (#9680)
new 2c75f344cf [RELAY] [AST] Add virtual_device as a first class field in Relay (#9641)
new 573a54f6e4 [Relay] PlanDevices supports 'free' on_device annotations (#9693)
new 998dffd376 [Hexagon] Detect link-params via IRModule instead of target attribute (#9695)
new ac54ba693d Add CMake summary (#9696)
new 7b0dd7e39e [CUDA] Do not emit vector load on unaligned base offset (#9731)
new 5651d22223 [Relay] Re-run PlanDevices after LowerTE to flow new memory scope constraints. (#9613)
new 58bc376790 Add unit tests for HexagonBuffer (#9736)
new 18441e6f82 [TVMScript][FIX] Fix number of arguments for T.Buffer[...] (#9758)
new aca560edf0 [Relay] s/SEScope/VirtualDevice/g (#9759)
new c565177f0b Clarify error message for missing libraries (#9710)
new 4377739527 [TIRScript] fix parse StringImm value in for loop annotations (#9755)
new 3ee19a46ab fix int set analysis on negative scale (#9776)
new a331af7a0a [CodeGen] avoid crash if an exception is raised during llvm cpu codegen (#9786)
new bdbe84dd88 [Target] Fix device mask issue and typos (#9768)
new 8e291ea0a1 [CMAKE] Automatically detect newly added source files (#9611)
new 0bf75b8032 [TIR] Affine utility support iter lowerbound and diagnostics (#9699)
new ad1db4c0d7 [TVM Basic] Extend generic func with get_packed_func() interface (#9784)
new 261447b585 [Target][BugFix] Convert dict and str to TVM object (#9807)
new cac7ae73ed Add Python representation for VirtualDevice (#9812)
new 353d0d80cc Generate compile_commands.json by default (#9763)
new 987f705591 [LLVM] LLVM codegen debug utilities (#9857)
new a733524fe5 [MetaSchedule] Add Per-Store-Feature (#9860)
new 33c0597e73 Add a JSON converter for 0.7 -> 0.8 and 0.8 -> 0.9 (#9874)
new 1beab14c16 [BUGFIX] Check that virtual device is unchanged in WithFields (#9826)
new 075f434b4a [TEST] Remove `llvm -device=arm_cpu` and `cuda -libs=cudnn` from (#9905)
new c1bcee0217 [TIR] Encode conditional accesses info into block read/write regions (#9880)
new 915146ad60 [MetaSchedule] random compute location (#9940)
new 9815279bdc [TIR][USMP] Integrating USMP to AoT Executor (#9565)
new b6e5fb0b27 [Fix] Fix flaky test of #9952 (#9958)
new b89ef23035 [bugfix] Fix the behavior of TVMScript printer (#9974)
new cfa4fcc2b0 [MetaSchedule] Schedule Rule: Add RFactor (#9975)
new afdaf61429 Add runtime.ModuleGetFormat method enabling export of BYOC generated sources which require a .cpp/.cc file extension (#9243)
new a49f185c5a [Minor] Typo Fixes (#10000)
new 2d7dd0ab4b Auto-discover C/C++ compiler instead of hardcoding g++ (#10007)
new 35afa10124 Add user-configurable backtrace limit (#10025)
new cbf58146b1 [MetaSchedule] Schedule Rule: Parallelize-Vectorize-Unroll (#10033)
new 79f32001cd [PTX-MMA] Add full PTX MMA code generation support (#9909)
new a5d089eef1 [Hexagon] Do not auto-build apps when building TVM (#9970)
new 6f7105087c [CUTLASS] Profile only the largest-possible alignment by default (#10036)
new 833969c380 [TIR][Schedule] Blockize and Tensorize (#9871)
new 70c7c415d9 [MetaSchedule][M4a] Schedule Rule: Multi-Level-Tiling (#10043)
new dcff81d172 Clear warnings when building with MSVC. (#10059)
new e3c1378f93 Don't explicitly link libgcc.a into libtvm_runtime.so on Android (#10052)
new 01bf06fd34 Change function constructors to WithFields (#9690)
new be4711081c [TE] Fix Const Int bound analysis to handle uints for division (#10102)
new 2ab95f493f [LLVM,TIR] Print LLVM intrinsic names instead of ids (#9964)
new 14ff948d1e [Ansor] Improve OpenCL support (#10108)
new f276181ac8 [CUDA] Support float16 erf,tan,atan (#10122)
new 4d3cd53b86 [Runtime][PackedFunc] Bring `PackedFunc` into TVM Object System (#10032)
new 0eeecfbdb7 [TVMScript] Support T.buffer_decl using data pointer from Let/Allocate (#10099)
new 8338719927 remove async tst (#10160)
new 034b33500f OpenCL debug runtime timer handler added. (#10140)
new c3d759df72 [BugFix][TVMScript] Use operator `is` when recognizing TIR Module (#10175)
new 15c0ff38b3 [TIR] Allow compute_at create block predicate for non-trivial bounds and support floordiv pattern (#9527)
new b6e9b60950 Implementation of Common Subexpression Elimination for TIR (#9482)
new 021b46b654 [USMP] adding support for U2 and U3 usecases (#10193)
new 1243ab087e add a simplify rule for floordiv(x*8+7, 16) => floordiv(x, 2) (#10232)
new 90091608de Support sub warp reduction for CUDA target. (#10207)
new c89baae8fa [Cuda] Updated bfloat16 math defs. (#10258)
new 8ec131fa95 [CMake] add support for find_package (#10097)
new 3f3a18919b [TIR] Add software pipelining (#10066)
new 17b4f8d9f5 [UnitTest] Disable ptx mma tests on unsupported nvcc versions. (#10229)
new c663670b38 [TOPI] Add support for groupped conv3d (#9873)
new 9b82386a8b [Relay] [Virtual Device] Store function result virtual device in virtual_device_ field (#9848)
new 83cda4cd6c [TIR] add support for multi-blocking layout and their transformation (#9996)
new 06086a89b7 [Arith] Support integer BufferLoad in IntervalSetEvaluator (#10327)
new ff3ff95142 Generate correct output tensor names in C Interface API (#10191)
new 5e7e411214 [TIR] Fix Ramp int32~64 mismatch in VectorizeLoop and NarrowDataType passes (#10172)
new 67861eaa59 [runtime] Add Metadata classes for AOTExecutor (#10282)
new 8e41c47331 [TIR] Tir constants integration into compilation pipeline (#8509)
new 17ea0a2c8d [TIR] Misc minor updates (#10335)
new fce0553efe [AOT] BugFix of workspace calculation (#10337)
new dcf751d830 [runtime] Improved log information with function signature (#10326)
new 865dce6d04 [BUGFIX][ARITH] Fix FloorMod Simplifier (#10336)
new 7a51a1a47f [TIR, Relay] improve bfloat16 support (#10112)
new 5055824398 Lower cache_read and cache_write to Hexagon DMA via tensorize (#10365)
new 4be30e7083 [RELAY] [VIRTUALDEVICE] Change syntax for device planning and store parameter virtual devices in virtual_device_ field (#10352)
new 7538a7921b [Bugfix][TVMScript] Convert BufferSlice to BufferLoad when used as range/loop start and end (#10370)
new af838aa55b Enable groups argument for conv2d_transpose on the cudnn backend (#10396)
new efc36b0e45 [TensorIR] Renormalize split pattern (#10401)
new 96fb693573 [MetaSchedule] Arithmetic analysis (#10403)
new 79e292f423 Add @slow decorator to run tests on `main` (#10057)
new 37dd8147a7 [Runtime][ThreadPool]Refactor affinity function and support CPU affinity list setting. (#9802)
new b6f706d10a [Bugfix][Arith] Fix TryFuseIter (#10427)
new 46b74aff8a Fix plint complain for some files. (#10433)
new 8f1a0a5dd6 [runtime] AOTExecutor implementation and c target code-generator (#10283)
new 8494228f3c [Runtime][ThreadPool] Handle the default value of affinity mode. (#10434)
new 6367831ed4 [microTVM] Zephyr: add B-U585I-IOT02A board support (#10416)
new 344c3abcd7 [MetaSchedule] Enable AutoTVM-style template-based search space (#10461)
new df0a0b7ea6 [Arith] Handle mod/floormod in modular set analysis (#10453)
new 737fa4833a [Minor][Build] Fix compiler warnings hidden overloaded virtual function (#10485)
new 90d4ba66ee [CodeGen][CUDA] use hrint for cuda half rounding (#10460)
new ddd154f984 [MetaSchedule] Update scripts for subgraph tuning (#10501)
new fe08def1e5 [TE][TIR] Implement layout transformations, non-flat memory buffers (#9727)
new 83d92e3962 fix: select narrow dtype (#10519)
new 8ca3d6b561 [vulkan] Add integer dot product (4xint8, 4xuint8) tensorization for the vulkan SPIR-V target. (#10391)
new 5c04069576 Automatically close open files to prevent ResourceWarning (#10526)
new eec76813b3 Add Check about negative uint constant (#10484)
new f41a3aa974 [PTX] Support mma.sp to use Sparse Tensor Cores and refactor mma codegen (#10339)
new 9ab6cafc6f [skip ci][Bugfix] Allow constant folding of 0U - 0U (#10535)
new b8b3ba863a RFC: initial stab at TorchScript fallback (#7401)
new 3bc7d98668 [LLVM][TIR] Propagate variable names to parameters. (#10514)
new 6471f8893b [AOT] Introduce checks for return values from operators (#10424)
new ce972e3259 [Hexagon] Resolve breakage in test_hexagon/test_cache_read_write (#10520)
new 6adadb378b [Runtime][ThreadPool] Remove a cout log output. (#10560)
new 885bc24737 [TVMScript] Add intrinsic to look up llvm intrinsic id (#10551)
new fae8326b7e [Refactor] Reduced repetition in CodeGenLLVM's buffer access (#10567)
new eda74025f2 [CMAKE] Add option to enable custom logging (#10531)
new 3c8f345384 [TIR] Restrict Buffer indices, only last index can be multi-lane (#10513)
new fb5581f916 [CMAKE,HEXAGON] Only enable Hexagon custom logging when building for Hexagon (#10587)
new 33c92999af [TE] Promote substituted variable to iter_var's dtype (#10571)
new 7780b7efb9 [Fix] Refactor the roundtrip test. (#10592)
new af5f394b9c [TIR] Updated python docstring and parameter names for AllocateConst (#10602)
new e0767b2cf2 [TVMScript] fix print target's host (#10598)
new 65078c281e [Arith] Improve floordiv / floormod rewrite simplifing rules (#10591)
new 9777a60fbb [Hexagon] Generalize builtin for Nd memory alloc with storage scope and add lowering for VTCM / Hexagon (#10558)
new 3db553dab6 [microTVM] Zephyr: add mps3_an547 board support (#10479)
new f658d9f4f6 [Hexagon] Codegen for 2d Load/Store (#10586)
new 754b601413 [Hexagon] Refactor tvm.contrib.hexagon, NFC (#10616)
new dd2b8774de [Hexagon] Remove double ".hexagon.hexagon." from registered names, NFC (#10624)
new 9fc3e5a5ab [Arith] Fix floormod rewrite simplify rule (#10626)
new e08ef04a92 [Hexagon] Add support for Hexagon v69, deprecate v60 and v62 (#10623)
new 4a2054423c [Hexagon] Add flags to control floating point support in HVX (#10644)
new a1d6352b66 [C Codegen] Remove global packed variables when interface_api="packed" and target="c" (#10645)
new 9964c3bf49 Add order to functions in C Codegen (#10590)
new e0d9196c27 Mark x86 specific test (#10672)
new 1e1eb313f7 [ci] Fix condition for skipping tests in i386 (#10698)
new 00cd9c1d99 [build] Use mold or lld if detected (#10683)
new a057ab88fd [UnitTest] Fuzz based on seed rather than random value. (#10515)
new c848897866 [TIR][Schedule] Transform layout (#10538)
new 8ddc6c8349 [Hexagon][Codegen] Implement CodeGenHexagon::CreatePrintf (#10710)
new 9c23466a24 [TVMScript] Enable assignment statement without type annotation (#10736)
new 79a9962749 [TIR][Schedule] Change BufferIndexType enum in python side to string (#10737)
new 501513ba8d [NDArray] Expose NDArray::CreateView to python (#10712)
new 7dc5e36dd8 [NDArray] Update runtime.TVMArrayAllocWithScope to use ShapeTuple (#10728)
new 3157e7b219 [TIR] Simplify final indices from transform_layout (#10761)
new 9195ad50e7 Fix clang llvm 12.0.1 warnings (#10744)
new bfb1b46a5b Eliminate some compiler warnings for microNPU demo app (#10549)
new ec65019716 [TIR][MetaSchedule] Estimate TIR FLOPs (#10782)
new 1b7d54a98a Check for toolchain when marking reference system tests (#10659)
new db7c3e18d5 [TIR][Analysis] Add SuggestIndexMap for layout rewriting (#10732)
new 62ca7aeaa4 [TVMScript] Parser `int64` support (#10789)
new d2e9b0f392 [Hexagon] 2-d allocation cleanup (#10786)
new 0d00e2df8d [Runtime][PipelineExecutor] Fix CPU affinity setting issue. (#10781)
new 91b2ba26cb added surpport for arg type of numeric float16 and testcase, fixed the (#10797)
new 62fe786ec7 [Arith] Remove diagnostic ctx argument from DetectIterMap (#10798)
new 513dc7cab7 Also strip prefix from TVM_LOG_DEBUG specs. (#10755)
new 79a7a417ab [AutoScheduler] Supported CSE (variable definitions) in feature extraction (#10686)
new 65934b04c3 [CI] Fix Vitis-AI tests when USE_VITIS_AI flag set to OFF (#10802)
new d0cf76d2db [DOCS] Add background context for stack allocation in builtin lowering (#10632)
new b3e9f6075f [Pass][Bugfix] Disable re-use of non-flat buffers in StorageRewrite. (#10787)
new 94362f5c20 [Metaschedule] Add demonstration of selectively tuning relay ops with TIR schedules (#10793)
new 2011519fdd [Hexagon] Pass extra parameters to link_params via Map (#10830)
new 55f595f3a1 Fix typo in comment about kill() (#10863)
new 4a833e5ac0 [Pass] Fix printer formatting for PassInfo (#10844)
new 7c895eaf74 [PTX] `ldmatrix` builtin to accelerate copying data from shared memory to warp memory (#10855)
new 6b0b43febe [RUNTIME] Api to get number of runtime threads (#10896)
new 9318291ee1 [LLVM] Support CodeGenBlob for large >2GB models on x86 (#10882)
new a3db163c34 [TIR] Fix int32 vs int64 mismatch in For construct. (#10595)
new 5a487ec62c [TIR] Fix check for multiple axis separators (#10845)
new c21b085ecb [Hexagon][LLVM][CodeGen] Make CodeGenHexagon a subclass of CodeGenCPU (#10908)
new a3c0d92920 [TVMScript] Fixing T.buffer with typed positional arguments other than int32 (#10892)
new 38bc8eebdb escape tvmscript's string literal (#10954)
new 27f826fc5a [CI] Bump black version to 22.3.0 (#10960)
new c8c017f81c [ci] Don't diff when running clang-format (#10933)
new c97bc9bcfd [Hexagon][LLVM] Enable/test tensorized Hexagon DMA on 2d transformed layout (#10905)
new 528b44a0d7 [FIX] resolve int64/32 for AttrStmtNode (#10983)
new eb6ba61125 [Runtime][Vulkan] Add RGP support to TVM for vulkan device (#10953)
new d33336622e [ROCM] DP4A intrinsic support for TE/TIR (#11009)
new 02a7bd2aca [Metaschedule] Support tuning on rocm and vulkan target (#11017)
new eb851528f2 [Arith] Updated arith::DetectIterMap to keep extent=1 components (#10980)
new cfa64844d7 [OpenCL] Fix type casting error (#11021)
new 13945f9381 [VirtualMachine] Zero copy in set_input when input is DLTensor (#11003)
new 96b668f43c [Hexagon] Deprecate USE_HEXAGON_DEVICE, introduce USE_HEXAGON (#11025)
new 42d32f0324 [AOT] Support LLVM backend with C++ runtime (#10753)
new ebbe6ec9e4 Revert "[OpenCL] Fix type casting error (#11021)" (#11035)
new 92e57f1951 [OpenCL] Fix type casting (#11038)
new 39728884f0 [TIR] Utility function to decide loop mapping for auto tensorization (#11050)
new a9dae87ed5 Fix While Node StructuralEqual and StructuralHash issue (#11073)
new ecb029402a Add two possible missing visit of let stmt in lowering (#11079)
new ef498e9436 [TVMScript] Allow `val = buf[index]` without type annotation (#11060)
new 430c1b73fe [TIR] StmtFunctor RenewDefs (#10843)
new e76ae674a9 STM32: add as a new target (#9385)
new 826b57b63b [Hexagon] AoT with LLVM Codegen on Hexagon (#11065)
new 16f0be7c32 [Hexagon] Delete offload runtime, move files to right places (#11090)
new 4a7cefd5ec Prevent IRSbustitute to create new buffer when buffer var is unchanged (#11103)
new 7a846d20ea [Analysis] Exposed Analyzer::CanProveEqual to Python API (#11102)
new 6fef84319c [CONTRIB] Add PopenWorker process recycling (#11094)
new d13a5bdcc5 [USMP] Adding support for U4 usecase (#10785)
new 57f9e30710 allow constant value let binding in script (#11115)
new 9392077759 [Metaschedule] Auto tensorization for CPU / GPU dot product (#11088)
new f7cf83eb97 [TVMScript] Support TVMScript template meta-programming over variables (#11097)
new 39ec7438aa [TIR] Get read/write access precisely for opaque access. (#11110)
new 2ea15d7cc7 [Analysis] Readability/Deduplication in Analyzer CanProve/Simplify (#11130)
new 11b48a8eb3 [Arith] Simplify the output of InverseAffineIterMap (#11167)
new fd32b03afc [fix] vec * mat in matmul in onnx converter (#11174)
new 27c05c4491 support round-trip for T.Ptr in tvmscript (#11179)
new d46bc064d6 Remove support for run-time linked-params from codegen (#11144)
new 611de4de9f [TIR] Reduced duplication in op.h (#11129)
new f0cefd9813 [CI] Update GoogleTest (#11162)
new d52acdab6b [Hexagon] Add support for on-device unit testing using gtest (#11145)
new b8f54e06d2 [Hexagon][Runtime] Add QuRT thread pool backend (#11018)
new 030c75a241 [Relay] Support 'external codegen targets'. (#11173)
new 1c8bfff2b2 Implemented rpc logging (#10967)
new 457334e5c1 Revert "Implemented rpc logging (#10967)" (#11227)
new 5675a625d8 [TIR] Add schedule primitive SetAxisSeparator (#11225)
new ed1786d0ea [LLVM] Fix a possible tbaa issue (#11181)
new 07f8bd0ffd fix two check typo in codegen (#11240)
new 7ed73c7817 [TIR] Fix reverse_compute_at for trivial region with trivial block var (#11234)
new 76598176a0 [CI] Identify non-inclusive language in commits (#11230)
new 5c90067a05 [USMP] Change internal workspace section (#11246)
new 7b6c1e4fce [LLVM] Make sure all functions have target-related attributes set (#11222)
new 59fbea46bf [microTVM] Add support for host-driven AoT Executor (#11044)
new a16695a41d [OpenCL] Change of OpenCL profiling logic (#11180)
new 957d565da4 [ARM][Strategy] Fix is_int8_hw_support check function (#11193)
new 4cd78ecd69 Fix a case of linking to wrong OpenCL library (#11215)
new e08d2c6e7f [rpc] Implemented rpc logging (#11232)
new 2195c32630 Add Adreno GPU target and topi supporting textures with dynamically allocated textures (#11161)
new 7f5b41dffb [logging] LOG(FATAL) calls [[noreturn]] functions (#11310)
new 18127d040a [Hexagon] Remove sim_options from tvm.target.hexagon() (#11293)
new 4f214802f5 [TIR][Arith] Implemented padded inverses in IndexMap (#11235)
new 6f98fa1721 Avoid use of MemoryInfo when undefined in StorageRewrite (#11254)
new 3eef906173 [ci][docker] Update images to include sccache changes (#11314)
new 09dfdcf430 [TVMScript] Represent ramp as index slice (#11308)
new bbd038dfd3 [ONNX] Fix cast op to/from bfloat16 (#11171)
new 8404795021 [TIR] Propagate storage scope of undefined vars in SplitHostDevice. (#11255)
new f175fd0523 [TIR] Simplify indices in layout transform (#11330)
new 81860b6940 [Hexagon]Use requires_hexagon instead of requires_hexagon_toolchain if running on hexagon target (#11294)
new bf4c4b870d [Runtime][ThreadPool] Enhance CPU Affinity configuration for OpenMP case. (#11343)
new 02d5389d8a [build] Fix/simplify `ccache` logic (#11189)
new becd8ddd44 Improve error messages with TVM_LOG_DEBUG and add docs (#11344)
new d3dbc656f8 [TVMScript] Support inlined function call as a sugar (#11324)
new 17049f6d6a [TIR] IndexMap Simplification Constraints (#11342)
new 53b0dc1a9e [Relay] Support i16, f16 scalars in Relay text (#11224)
new 3219b0ed32 [PTX] Intrinsics for async copy from global to shared (SM80) (#11368)
new df5f02e871 [TIR] Support tensorization using ldmatrix + MMA (#11355)
new 0c263ca854 [FFI] Renamed __VisitAttrs__ and __fvisit__ to non-reserved names (#11392)
new 14b431149f Fix int8 cuda kernels on older SM versions (#11389)
new 137cf161c5 [TVMScript] fix typo for block syntax (#11407)
new 3d66577ad8 Finish support for list-of-targets (#11382)
new 045137fcc2 [tests] add utility to replace direct call to pytest.main (#11393)
new 3e3cd8c86c [Bugfix][TIR] Removed passing of IterMapExpr into PrettyPrint (#11412)
new eb36c97080 [TIR] Regression test for PrettyPrint/IterMapExpr bugfix (#11418)
new de135af628 [Arith] Allow unused trivial iterators in bijective check (#11425)
new d16ab4c177 [Arith][BoundDeducer] Forbid non-supported expr type in bound deducer (#11323)
new 0f78e0a211 [TIR][Schedule] Transform layout quality of life (#11269)
new c1407273a4 [BYOC] Enable bfloat16 in DNNL BYOC (#11111)
new 9a7ad60492 [Runtime] Add 'static_library' runtime::Module (#11442)
new e989ca10b8 [TIR] Additional Stmt/Expr simplication rules (#11373)
new bd30c7019f [VM] Memory alignment check for `set_input` in Virtual Machine (#11391)
new c39eb0c808 [CUDA] Allow dynamic shmem of size > 48K in runtime (#11478)
new b5bd97656f Fix structural error reporting on root block (#11477)
new cdc4ebb14b [FFI][CYTHON] Release GIL when calling into long running functions (#11461)
new ad6638af3b Silence unnecessary 'host' deprecation warnings (#11499)
new 4480bb85c0 [OpenCL] Avoid SelectNode ambiguous overloading (#11488)
new 62b401572a [TIR] Add schedule primitive TransformBlockLayout (#11485)
new 8d6071922b [TVMScript] Allow T.Buffer[] arg annotation to use int as shape (#11454)
new 8e6d40679e [Pass] Add utility that asserts that IRModule is not mutated in a pass. (#11498)
new 1b7aa50690 Canonicalize type annotation during construction of Var and SizeVar (#11443)
new 6a26012e88 [Arith] Merge surjective/non-surjective iter mapping detections (#11287)
new 56c8814d60 [microTVM][ARM][Zephyr] Add CMSIS dependencies in Zephyr project build (#11362)
new 2281b7688a [BugFix] Add lock for ModuleNode::GetFuncFromEnv (#11467)
new 7dd2ca6783 [Relay] Plumb external codegen target via Target.current() (#11432)
new 98a4c08f71 [VM] check DLManagedTensor for conditions to construct NDArray (#11504)
new 228e1828f7 [Bugfix][TIR] Handle bool tensor in FlattenBuffer (#11532)
new 457aa60c0a [TIR][Arith] Additional Simplifications Inside Conditionals (#11524)
new 21c171a6b6 [BYOC] Two helper passes for external codegen using RelayToTIR custom pass machinery (#11474)
new 7e45711b09 [CI] Refactor of tvm.testing.requires_* annotations (#11313)
new dce24fe965 [TIR] Expose tir.call_cpacked in python (#11563)
new ca5b6b7734 [TIR] Prevent loop binding over-simplification (#11578)
new fce1693333 [Hexagon][CI] Re-enable Hexagon tests in CI (#11613)
new 073fcad6a6 [OpenCL] Implement conv2d_winograd algorithm for Adreno (#11543)
new 5cd4a64de3 [TIR] CSE pass : Restrict the equivalence to be decided by a normal form - avoids comparison of terms (#11574)
new 97ae9c0de3 [PASS] Refactor a couple of TIR passes - BindTarget, AnnotateEntryFunc, Filter, LowerInitBlock (#11628)
new c8168a3f30 [TIR][Schedule] Allow named block and buffer arguments in Schedule (#11624)
new 13a6b85113 [microTVM] Add support for Arduino Portenta H7 (#11636)
new ea5a318d0c [TIR, CUDA] Add pass to replace global to shared memory copy with cp.async (#11658)
new f398d4a39b [DNNL][CBLAS][BYOC] Unifles all MKLDNN/DNNL to DNNL (#11638)
new bf2fde3feb [BYOC] Make CUTLASS BYOC integration 'Collage friendly' (#11631)
new c6e08e661b Fix typos in target warn of dnnl (#11678)
new 4affab3d55 [BYOC-OpenCLML] OpenCLML integration with TVM. (#10243)
new baf04d0029 [microTVM][zephyr] Add support for host-driven AoT execution on zephyr (#11650)
new 8a96aefd3e [LLVM] Update uses of AllocaInst::getAlign[ment] (#11718)
new 94976095ec [Bugfix][TIR] Narrow-Datatype for thread axis (#11725)
new 9dd0db08fd [ci] Skip failing tests in wheel (#11705)
new ff1c15c55c [microTVM] Add support for the Raspberry Pi Pico via Arduino (#11694)
new 05ccce6042 [TVMScript] Support roundtrip of LetNode (#11742)
new e79d0a1c98 Add optional mem_scope parameter to tvm.nd.array and tvm.nd.copyto (#11717)
new c90df818b9 [MetaSchedule][Runtime] Enhance Runner RandomFill (#11758)
new 427d6ca823 [Arith] Simplification of ceil, log2, and left_shift (#11646)
new aac49c921a [LLVM] Retrieve entire target string from LLVMModule (#11802)
new b8c1da7024 [TIR] Add SHash and SEqual to IndexMap (#11798)
new 9c9dc71e9f [LLVM/String] Remove conversion operator of String to llvm::StringRef (#11807)
new 651bb3a1de [USMP] Adding support for U1 usecase for constant pools (#10189)
new 5870b6874b [BugFix] IndexMap.Inverse for unit iters (#11841)
new 5b7ebaf573 [LLVM] Remove `using llvm::BasicBlock`, NFC (#11850)
new 61ad52b6af [LLVM] Remove PrintModule (defined in llvm_common.cc) (#11851)
new 0cd37677fd [LLVM] Register factory function for CodeGenCPU (#11852)
new b9ba8960bf [TIR][Pass] Remove-Weight-Layout-Rewrite-Block (#11870)
new 24d7d99760 [Arith] Fix DetectIterMap floordiv when IterSum only contains base expr (#11887)
new 82d41af964 [TIR][Arith] Avoid assigning range of possible values to integers (#11859)
new f47a738da1 [TIR] HoistExpression, generalization of HoistIfThenElse (#11592)
new 4819f6ed71 [LLVM] Include LLVM headers in files that use them, not in llvm_common.h (#11888)
new b97e92e8f4 Add missing headers to llvm_module.cc/.h, NFC (#11925)
new 36f80e0d0a [usmp] U3 use case (#11015)
new 4514401e86 Add cooldown interval logic for the profiling functional (#11465)
new d3c7d80541 [Relay] Handle memory scope during lowering from relay level (#11874)
new 0112314e10 [MetaSchedule] Handle 'warp_execution' implied extend of threadIdx.x in VerifyGpuCode (#11949)
new 0941eb357d [ci] Redirect sphinx-gallery URLs to S3 (#11839)
new 9fb88c1d41 [BYOC] Handle constants in IRModule-at-a-time external codegen (#11770)
new 544f11b4de [CI] Skip some additional tests that are failing in the wheel (#11969)
new 8b63243129 [tests] Fix changed var name from 'target_str' to 'target_names', NFC (#11982)
new b31b0854e0 [Hexagon] Enable int8 vlut codegen for Relay take (LUT) operator (#11693)
new 864e44ad7a [LLVM] Remove use of deprecated PointerType::getPointerElementType() (#11984)
new 2a0ab05438 add missing narrow down of index within conditions (#11942)
new 8e4d9840fa [microTVM] Autotuning performance tests (#11782)
new 1ac8b1df28 [TIR] Make conversion from Integer to int64_t explicit (#12010)
new f8d6760790 [Arith] Allow constant values in InverseAffineIterMap (#12026)
new 04cade6f6a [TVMScript] Doc Base Class & DocPrinter Scaffolding (#11971)
new 64a6748290 [TIR] fix crash when comparing IntImm to None (#12034)
new fb6da138ef [Texture] Add memory scope entity into graph JSON/runtime (#11875)
new 316a44f164 Several type mismatch fixes and checks (#12041)
new f3adf6f023 [Collage] SubGraphs (#11981)
new b4c975d105 [LLVM] Fix build errors in CodeGenCPU::AddDebugInformation (#12054)
new 0d52d93170 [LLVM] Update creation of llvm::DebugLoc, remove TVM_LLVM_VERSION < 70 (#12069)
new e9f573d43a [CMSIS_NN] Align CMSIS-NN in TVM to TFLu SHA (#12030)
new 388502ef06 [Arith] Updated BufferDomainTouched to use IRVisitorWithAnalyzer (#11970)
new 408ae1c860 [WIN] export void Configure(...) symbol for Windows (#12091)
new 2f5cab545a [MetaSchedule] Add MultiLevelTilingTensorCore rule for auto-tensorization on CUDA (#12059)
new 722d0ecc90 Fix bug that disabled cuda integer dot product. (#12099)
new 5ab8176bcc [TVMSCRIPT] Make ceildiv available from tvmscript (#12096)
new 13c6c4df2b [Relay] Allow Primitive functions to carry virtual device annotations in PlanDevices (#12095)
new c2c89c9e58 Add member object accessors to With<> (#12100)
new 9a101ce38e [TIR] Moved PrimExpr operator overload from op.h to expr.h (#11973)
new ee8e116741 [Target] Add target_parser to TargetKind (#12119)
new 195e5104f4 [Target] Add "features" property to Target (#12121)
new f0e69b8c37 support overlapped itersum (#12039)
new 955984166e [LLVM] Clarify the status of pointers to llvm::Module in LLVMModule (#12123)
new 83d67ab741 Revert "support overlapped itersum (#12039)" (#12137)
new 50e0189867 Fix #12039‘s broken cases (#12143)
new 9f16e35719 [arith][BugFix] Fix simplify input PrimExpr of DetectClipBound (#12150)
new 78c0111bb1 fix T.Ptr[T.void] for packed api roundtrip (#12118)
new 98bb996c83 [HEXAGON] QCOM hexagon library (qhl) (#12149)
new d820da61c9 [TIR] Well-Formed Verifier (#12166)
new cd1e0142d9 [Fix] Fix some errors in unittests (#12170)
new 9a0373918d [TIR Pass] decouple flatten buffer to lower opaque block pass and flatten buffer. (#12172)
new a8891f4b13 Update to 0.10.0 (#12190)
new 38e5f14741 [TVMScript] ExprDoc (#12048)
new e427e6c76d [OpenCL] Fix profiling hang for OpenCL device (#12173)
new 9d5e7adcc6 [JIT] Force finalization of JITed code, expose sf/hf runtime functions (#12187)
new 481416f40c Use std::move to avoid warnings on clang-13 (#12196)
new 67070d8928 [Target] Improve string interpretation in Target creation (#12152)
new 99c077ed37 [TVMScript] StmtDoc Definitions (#12111)
new b6c70583a3 [TVMScript] StmtDoc Printing (#12112)
new e6e891c3eb [TIR] Asynchronous stage in software pipeline (#12171)
new 84c7409f84 [UX] highlight tvm script (#12197)
new a2dfef25ee [UX][TVMSciprt] Use HTML formatter in notebook environments (#12240)
new 036cf2a7b2 [ROOFLINE] Add CUDA support to roofline analysis (#12205)
new 73c37cfe64 [Fix] Fix some errors in unittests (#12245)
new 9c2b56479a [TVMScript] Python Expression Precedence (#12148)
new cd0ceb6939 [microTVM][ARM] Enable tests that were skipped unintentionally (#12223)
new acc0f996fe [UnitTest][TIR] Testing utility for before/after transform tests (#12264)
new 82c554acbc [Arith] Handle bitwise_and with power of 2 in modular set (#12272)
new 16195c6453 [TVMScript] Add object path tracing to StructuralEqual (#12101)
new 849f629eb9 [TIR][CUDA] Fix sub-warp reduction using "max" (#12275)
new aabde9df44 [LLVM] Create LLVM scope object for use with LLVM libraries (#12140)
new b2c903b871 [TIR] Add tir::builtin::assume (#12267)
new c7331b6ccc [TVMScript] Add source_paths to Doc (#12324)
new d511bf6cf0 [TIR] Add DeclBuffer IR node and functors (#12300)
new c82f459191 [TIR] Add tir::builtin::undef (#12266)
new 704ecb7274 [OpenCL] Use size_t instead of int64_t for OpenCL timer count (#12328)
new 599075a98e [UMA] UMA v1.0 (#12087)
new c0c17a0cac [Hexagon] Minor changes/fixes in codegen_hexagon.cc (#12308)
new 581ba92d9a [Node] fix typos in include/tvm/node/functor.h
new e24601ed33 [FIX,STORAGE REWRITE] Rewrite buffers in let statements (#12349)
new 235a46d5bf [testing] Remove wrapper from @slow (#11566)
new 0cc6c4846e [TVMScript] Text underlining in DocPrinter based on Doc's source_paths (#12344)
new 54172e14e5 Unify name mangling in TVM (#12066)
new a8a49dc61c Build and test TVM under minimal configuration (#12178)
new 592c3805ea Update C++ standard to C++17 (#12337)
new 23413accdd [Adreno][OpenCL] Get rid of extra memory copy (#12286)
new fac6f0bcb8 [Target] Add Target Parser for Arm(R) Cortex(R) M-Profile CPUs (#12319)
new 92b67f0c9c [Profiler] Fix graph_executor_debug hang (#12382)
new deb7084cee [LowerVTCMAlloc] Move LowerVtcmAlloc to after StorageRewrite (#12364)
new 3b79c1e397 Update hexagon max_concurrency to be at most equal to the number of HVX units available. (#12394)
new bf7629e5d8 [TIR] Add pass ManifestSharedMemoryLocalStage (#12355)
new 8d6349a675 [Fix] Fix precision issue in FFI converting `int/float` to `PrimExpr` (#12417)
new 19765f6797 [Fix] Fix errors in error checking and reporting (#12423)
new ac5c0277b5 Add `operator()` to `support::With` (#12418)
new 319f370022 [TIR] Allow converting `BufferRegion` to vectorized `BufferLoad` (#12420)
new 4930170c5f [TIR] Avoid `import *` in TIR tensor intrinsic registration (#12424)
new 07ecb634fe [TIR] Allow `tir.Buffer` converted to `BufferLoad/BufferRegion` with `__getitem__` (#12422)
new fccc65641d [TIR] Expose: `call_packed_lowered`, `call_cpacked_lowered` (#12425)
new b4afc0c207 [TIR] Expose Stack-related TVM builtins in Python (#12429)
new 6f5f980261 [TIR][UX] allow override when register TensorIntrin (#12439)
new b907a9895a [TIR] Expose Misc TIR operations to python (#12435)
new 85c535a052 [HotFix] Op is not bound to any variables (#12401)
new 1cb358e34f [Arith] Parse > and >= bounds in ConstIntBoundAnalyzer (#12457)
new adec3ede68 Expose `Struct/Tuple`-related TVM Builtins (#12452)
new 2a138c9800 Change tir::GetPointerType to return std::optional<DataType> (#12458)
new 8cbe2d21fc [TVMScript] Printer IRDocsifier (#12396)
new e78dcde469 Use std::make_unique instead of std::unique_ptr(new ...), NFC (#12459)
new 5ecfb2a98b Expose Missing TIR Builtins to Python (#12466)
new 4a5188bc65 [TIR] Expose TVM Backend API-related Builtins and Misc (#12468)
new 744738acca [TIR] Disallow vectorization with strides in VerifyGPUCode (#12477)
new 5d052548f3 [TVMScript] IRBuilder, IRBuilderFrame base class (#12482)
new 69ee5e8ec4 [HEXAGON] Auto-vectorization (fp16) for v68 (#12397)
new e8a143fdac [TIR] [bfloat16] add bfloat16 promotion for CallNode (#12370)
new 6c3c38a866 [CMSIS-NN] Re-use CPU Target Parser (#12320)
new 3a48ac6669 [Target] Only append default keys if target doesn't have any yet (#12474)
new c27abd125f [TOPI]fix scatterND large shape problem (#12200)
new f2cf25edfc [Fix] Fix some typos (#11503)
new 1374eefba4 [TIR][Schedule][UX] Beautify TIR Trace Printing (#12507)
new 6598d829d6 [TVMScript] Printer entry point (#12462)
new 95c68f36cf [TVMScript] Printer: add boolean operators to OperationDoc (#12518)
new c5c6ecd1e1 [TIR] Support AllocateConst nodes in TensorIR scheduling flow (#12489)
new 2729a1b9ec [ci] xfail failing ethosu codegen tests (#12508)
new e5a57dcd2b [LLVM] Add "cl-opt" attribute to target_kind "llvm" (#12440)
new 2767375830 [TIR] Add pass to check for out of bounds memory access (#12352)
new 62300a9a37 [Target] Remove deprecated parameters from target (#12416)
new 6bc520892c [TIR][CompactBufferAllocation] Improve upperbound estimation of buffer compaction (#12527)
new 41d9134bad [TIR] Expose Vector-related API in Python (#12571)
new 6ec0d8d24b [TIR] Expose `shift_left` and `shift_right` to Python (#12584)
new 3434f1a989 [TIR] Expose WMMA-related TensorCore builtins (#12589)
new 733fcd91e8 [CUDA][CodeGen] Fix cuda codegen's fp16 inf literal (#12581)
new a3522c559a [Runtime] Change default alignment to 64 bytes. (#12586)
new 5919f86c8a [TIR] Expose Memory Copy-Related PTX Builtins (#12611)
new 9329faf9c5 [Hexagon] Initial support for meta schedule tuning (#12587)
new 837d71d998 Replace '> >' in templates with >>, NFC (#12615)
new f9ed18230d [TIR] Expose MMA-related PTX builtins (#12623)
new 601839d4d4 [Refactor] Replace std::tie with structured bindings (#12610)
new 3a6a72ff4e [TVMScript] support float inf, -inf and nan in TVMScript parser and printer (#12618)
new 78fb5476de [TIR][TVMScript] Update printer / parser to make T.allocate return buffer var (#12412)
new d8144b225a [TIR] Handle DeclBuffer in ToSSA (#12679)
new 2d6e4d5691 [TIR][StorageRewrite] Allow in-place buffer reuse of non-flat memory (#12655)
new 1970254b2e [TVMScript] IRBuilder methods for `IRModule` (#12694)
new f7efee13e0 [Test] Add tvm.testing.requires_libtorch (#12737)
new 316cf391d6 [TIR] Handle axis_separators during FlattenBuffer (#12652)
new c7f4ebf6ff [TVMScript] Base IRBuilder methods for `PrimFunc` (#12745)
new b9bcf0a53a [OpenCL] Enable OpenCL for GPU tests (#12490)
new 770df029ef [TIR][Arith] Add more strict checking in imm construction and folding. (#12515)
new 5d13aed7ce [TVMScript] Base IRBuilder methods for `Block` (#12748)
new e9f0d1b3f7 [AOT] Add AOTLowerMain pass to lower a Relay main into TIR (#12550)
new 99a359b571 [TVMScript] IRBuilder methods for `PrimFunc` (#12755)
new 0c98b1bb01 [Arith][Refactor] Return Optional<PrimExpr> from TryConstFold (#12784)
new 569c3b6b3c [Arith] Simplify nested if_then_else (#12749)
new a712e0a977 Fix typo in doc of logging (#12798)
new 6b969d33b9 [TVMScript] IRBuilder methods for `For` (#12786)
new 88a1bb262b [TVMScript] Fix parse minimal i32 literal for tir script (#12772)
new 5df224541b [TVMScript] IRBuilder methods for `Axis` (#12808)
new caba2e410f [Testing] Add decorator tvm.testing.requires_cuda_compute_version (#12778)
new c0e729d5d9 [TVMScript] IRBuilder methods for `Block` (#12815)
new 399a539d9e [TIR] Construct the inverse in SuggestIndexMap (#12797)
new 231fbb41e0 [TVMScript] Add more helper functions to the printer infra (#12829)
new 2b20826840 [TVMScript] IRBuilder methods for `Stmt` (#12830)
new b0368ad1a6 [TVMScript] IRBuilder methods for `Stmt` (#12831)
new 20f64357a1 [TIR] Implement API for padded layout transformations (#12720)
new ae3c27606c [Arith][TIR] IntSetAnalyzer, delay intersection of IntSet until use (#12821)
new ac61aa4319 [BugFix][LLVM] Fix the bug that the generated systemlib cannot register ```__tvm_module_ctx``` symbol sometimes (#12817)
new b9ac2676da [Hexagon] 2-Stage Pipeline; Lower Async TIR primitives to Hexagon User DMA (#12785)
new b7627d0f00 [Containers] Add Array::Map (#12692)
new 6851154e23 [TIR] Enhance RemoveNoOp pass to remove negative loop (#12836)
new c80722fbe6 [FIX,PROFILING] Fix gpu timer name and lookup (#12849)
new 53a92dec88 [TVMScript][Fix] Correct round-trip of explicit root block (#12673)
new 6e2cc837e1 [Utils] Disable automatic move constructor for tvm::With (#12822)
new 5a937dcd64 Fix clang warnings (#12876)
new 2cc0c9fb9a [TIR] Allow missing TensorIntrin in registry lookup (#12875)
new 8269b6915c [IR] Use TVM_DEFINE_OBJECT_REF_METHODS macro for Op (#12893)
new c135e615a7 [BUILD] Re-enable ccache by default (#12839)
new e1900fd499 [TVMScript] Import TIR methods into the IRBuilder (#12900)
new cf78e5855f [TVMScript] Infer T.match_buffer parameters for region (#12890)
new 6cd18403b3 [TIR] Refactor IndexMap::Inverse in terms of NonSurjectiveInverse (#12904)
new 0455683e23 [LLVM] Emit fp16/fp32 builtins directly into target module (#12877)
new 8af5e2cf31 [TIR][Transform] Remove num_unpacked_args from MakePackedAPI (#12892)
new 1201f30391 [TIR][Transform] Clear buffer_map during MakeUnpackedAPI (#12891)
new 4ddd9eb298 [Bugfix][CMake] Update the minimum CMake version to 3.18 (#12682)
new e0331330ae [CODEGEN][OPENCL] Compatibility for OpenCL version 3.0 (#12938)
new c8f15b3918 [TIR] Use buffer's dtype when converting pad_value to TIR (#12925)
new a8e1cf5830 [HEXAGON][QHL] Clippling the inputs of HVX version of QHL Sigmoid operation (#12919)
new 1948b307c5 [LLVM] Change CHECK_NE(x, nullptr) to CHECK(x != nullptr), NFC (#12943)
new af24c8b234 [Target] Add target_device_type attribute to override default device_type (#12509)
new 45b3e01b39 [CODEGEN][OPENCL] Sampler definition should be at outermost scope (#12951)
new 100ade6d0f [TIR] Use IndexMap to transform NDArray (#12949)
new 7f34d40457 [TIR, MetaSchedule] Preserve unit block iters for auto-tensorization (#12974)
new 0aab4e03e2 [ci] Disable flaky ethosu + roofline tests (#12956)
new 614aac9d15 [TVMScript] Allow T.bool type annotations (#12975)
new 27e4301228 [TEST] CPU feature detection for x86 and ARM dot product instructions (#12980)
new 627020b7ee [Arith][IndexMap] Correct MapShape result for small vectorized dims (#12927)
new 97878fa28e [TIR] Require dtype.is_float() inside FloatImm (#12928)
new 5b0484a17b [LOGGING] Optionally print backtrace on segfault (#12959)
new fceb18bf35 [TIR][Arith] Prove conditionals by transitively applying knowns (#12863)
new 29aa019d23 [UnitTest][TIR] Support IRModule comparisons in CompareBeforeAfter (#12920)
new 0669e5e9e2 [TVMScript] AST, Source and diagnostics for Parser (#12978)
new 90efe3dbcd Update to 0.11.dev0 (#13036)
new 5c0e05a0a1 [MetaSchedule] Allow skipping exact NDArray rewrite in RemoveWeightLayoutRewriteBlock (#13052)
new 686c1f39ec [microTVM][Windows] Enable building TVM on Windows with USE_MICRO (#12851)
new b8e77c1e81 [Arith] Optional rewriting and simplification into AND of ORs (#12972)
new 3beae76db0 [TIR] Refactor NarrowDataType into DataTypeLegalizer (#13049)
new 236b8e41ae [TE] Raise error for non-bijective transformation (#12926)
new fa8eb2c6e9 [TVMScript] Fix parsing int64 loop with optional loop start (#13068)
new c9781e894a [AOT] Sanitize input/output name in runtime (#13046)
new c3eb393085 [TIR] Fix handling of int64 extent in blockize and tensorize (#13069)
new f435fa846e [PopenPool] Enable Stdout & Stderr Redirect in PopenPool & PopenWorker (#13112)
new 829af2a61d [DOCKER][Adreno]Docker infra for Adreno target with CLML support (#12833)
new 93f1d08b8c [QNN][Hexagon] Disable QNN canonicalization pass (#12398)
new 1035a3e1e0 Skip stride check if shape is 1 in IsContiguous (#13121)
new 18fbcae5f0 [ci] Lint for trailing newlines and spaces (#13058)
new 620bb9e97f [TIR] Allow IndexMap applied to arguments with different dtypes (#13085)
new 06a59725ba [Target] Add Target Parser for Arm(R) Cortex(R) A-Profile CPUs (#12454)
new f6dab1b4a7 [Hexagon] Support fetching and building Hexagon runtime with external runtime sources (#13138)
new 197dffa3d7 [TIR] Add the missing nearbyint intrinsic (#13175)
new 2090dd96d9 [TVMScript] IRModule parser (#13176)
new c9171e46f8 [Target] Replace utility functions with target.features (#12455)
new 0ef9f63343 [AOT] Add CreateFunctionMetadata analysis pass (#13095)
new fcc52897d5 [TVMScript] TIR parser (#13190)
new 18d3dc7f01 [Hexagon] Add support for instrumentation based profiling for Hexagon (#12971)
new 6611406184 [TIR] Add utility for anchor block extraction (#13194)
new bccd8f43c9 [Relay][Hexagon] Add per-channel FixedPointMultiply operation (#13080)
new 87d10ca09a [IR] Remove shadowing in IRSubstituteWithDataTypeLegalization (#13219)
new a87fe10bc9 [TIR][Arith] Support negative coeff in ModularSet (#13081)
new 94bdfe4dbc [TIR][Schedule] Add cache_index to precompute index of buffer load (#13192)
new 9e95f3ac48 [MetaSchedule] Enable anchor-block tuning (#13206)
new c2dc34e907 [TIR][Arith] Implement kApplyConstraintsToBooleanBranches extension (#13129)
new 3fd850604f [Logging][Hexagon] Improve logging on Hexagon (#13072)
new 2ef44af519 [CI] Enable iOS RPC tests (#13229)
new 26f60cd610 [TIR] Use Optional<Stmt> for IfThenElseNode::else_case (#13218)
new c8be3f01b8 [Arith][TIR] Check for constant offsets of known literal constraints (#13023)
new 018e45e615 [BugFix][LLVM] Add UseInitArray flag in target_options_ (#13115)
new bf759cf184 [DLPack][runtime] Update DLPack to v0.7 (#13177)
new 2812c124ad [build][relay][te][tir] remove unused vars / args (#13266)
new 27fb460bb9 [ETHOSN] Throw error message when inference fails (#13022)
new 9933d95d4b [TIR][Arith] Use TryCompare to narrow inequalities if possible (#13024)
new f9db2c1daa [build][tir] suppress -Woverloaded-virtual warning (#13267)
new 40bd49b93e [TIR] Added unit test for dynamic parameter in layout transform (#13298)
new ab39994045 [Bugfix][Runtime] Fix sched_setaffinity in Android (#13158)
new 4c0283aa2b [TVMScript] Hide trailing return type if None (#13308)
new 9292d6ad5b [Minor][Testing] Consolidate IRs into corresponding functions (#13339)
new 36b0f73a0a [TIR][Arith] Fix divisor checking in `TryConstFold` (#13348)
new 92aa54224e [TIR] Make syntax of AST nodes different than ops (#13358)
new d359ac7279 [IRBuilder][Minor] Add intrinsics like `T.int32x4` (#13361)
new 5161335db6 [TVMScript] Reorganize the folder structure (#12496)
new ff7bd2b2e9 [TIR][Bugfix] Fix AXIS_SEPARATORS in tir.Schedule.transform_layout (#13326)
new 4f48d0c88f [Codegen] Fix CUDA codegen for int64 Ramp (#13382)
new 15b6405a1e [RUNTIME][ALIGNMENT] Configurable kAllocAlignment if needed (#13307)
new 6c7320cb84 [OpenCL] Introduce OpenCL wrapper to TVM (#13362)
new 3c0aa25121 [TVMScript] Use tir::Evaluate if expression is in statement context (#13396)
new 5eba3d7954 Add support for cast double to fp16 (#13395)
new a92279c46a [ci] fix GPU other build (#13366)
new 80e1f8938e [TIR] Remove PrimFuncNode::preflattened_buffer_map (#10940)
new 73e671c3bd [TIR][Analysis][Arith] Implement basic data-flow analysis (#13130)
new ab1553e5a7 [Hexagon] Enable Hexagon User DMA bypass mode (#13381)
new d0e4a0c317 [Build] Fix MSVC compile option /bigobj (#13411)
new a3e0425896 [TIR] Unify index data type when creating prim func (#13327)
new 551399d520 [TIR][Hexagon] Async DMA fixups (#13436)
new a3d29f1898 [OpenCL] Improve OpenCL version detection (#13434)
new 12f1533642 [TVMScript] Output elif where possible (#13433)
new 21695c9d9d [Fix] Fix IndexDataTypeNormalizer to avoid redundant casting (#13449)
new 844e5318de Fix building static tvm_runtime on windows (#13445)
new 90c87daf06 [microTVM] enable building microTVM components by default (#13073)
new a4d738bd5d [TVMScript] Improvements tvm.script.highlight (#13438)
new 83ae694d19 [TIR][Transform] Optional data-flow analysis in RemoveNoOp (#13217)
new f8e95e128a [TIR][TVMScript] Cleaner printing of And/Or chains (#13432)
new 358cff080a [RUNTIME] Correctly handling export_module when exporting modules of different type (#13489)
new 5086d59bdc [TIR][Schedule] Add condition to check buffer type (#13429)
new 185a470b5a [TIR] Fix buffer shape and IndexMap indices dtype mismatch (#13463)
new 2d3f396951 Revert "[microTVM] enable building microTVM components by default" (#13503)
new e37fafe886 [tir] Add copy on write to all nodes (#13512)
new 02aa3aaba0 [LLVM] Switch to using New Pass Manager (NPM) with LLVM 16+ (#13515)
new 119c652e7e [TIR] Disable RewriteSimplifier extensions in RemoveNoOp (#13524)
new ea5e7080d9 [TIR][Analysis][Hexagon] Add vtcm memory capacity verification for Hexagon target (#13349)
new eeed951ef9 [TIR] Introduce ReduceBranchingThroughOvercompute (#13299)
new 213503666b [Logging] Mark LogFatal::~LogFatal as [[noreturn]] (#13542)
new e61785ae81 [MetaSchedule][Hexagon] Add postproc for verifying VTCM usage (#13538)
new b355de45ef [TIR] Fix remaining dtype mismatch issue caused by SubspaceDivide (#13558)
new 200b7ce841 [TIR] Fix layout free annotation in CreatePrimFunc (#13554)
new 6ec691c3eb [CodegenC] Explicit forward function declarations (#13522)
new be8115269c [TIR] Add preserve_unit_iters option to blockize/tensorize (#13579)
new 875c49cfe6 [LLVM] Fix get tm allow_missing check pos (#13591)
new 84bea06cae [OpenCL][CI] Enable OpenCL cpp tests in CI (#13400)
new 263a635610 [LLVM] Use std::nullopt instead of llvm::None (#13617)
new 27d454864f [TVMScript] Fix print round-tripable multi thread env binding (#13622)
new b2c2bf2a5b [Arith] Allow const folding on fp16 involving one and zero (#13631)
new d8556c7118 [BugFix][TVMScript] Parser crash (#13630)
new 1f04167b52 [BugFix][TVMScript]fix var capturing order error (#13640)
new 3cc0e2a34f [CMSIS-NN] Add Cortex-M85 support (#13644)
new 3ffecf23bd [Relay][Frontend] Span filling common API (#13402)
new d59515ced9 [TVMScript] More accurate hints for ImportError (#13662)
new e8f99f247c [CONTAINER] Struct Hash/Equal and JSON support for ShapeTuple (#13671)
new 1194b464bf [RUNTIME][OPENCL] OpenCL host pointer support to acheive zero copy (#13413)
new e138f2ae95 [BugFix] Pylance emits the warnning 'Code is unreachable' (#13673)
new 260a77fbfa [Build] Expose missing USE_VERILATOR in cmake (#13676)
new fe861ffda1 [Bug][CodeGen,Cuda]fix cast fp16 to int8/uint8 in cuda (#13641)
new d6a9da4a18 [Tensorize][runtime] Add support for AMX(Advanced Matrix Extensions) through Tensor intrinsics (#13642)
new d33cb6fab1 [BugFix][TVMScript] Fix the roundtripability of intrinsic pow (#13692)
new 6bb8ae75a4 [tir] Add line level debug info (#13012)
new b4e24ec9c3 [TIR] Fix dtype mismatch error due to LetStmt (#13710)
new 8d07d2dc17 [TVMScript] Linter-friendly function definitions (#13713)
new 3c847af63e [Tests] Replace pytest.main with tvm.testing.main (#13717)
new 9dcf5e9b45 [TVMScript] Refactor IRDocsifier (#13593)
new 48b481956e [TIR][Arith] Add common sub expr analyzer (#13702)
new e6e4d7d758 [TE][PrimFunc] Fix create primfunc from te extern with explicit buffer load (#13729)
new b12a9aa835 [Arith] Use ConstIntBound to remove negative numerator when lowering (#13724)
new ed289b1135 [Profiler] Allow user to flush L2 cache in `time_evalutor` function for profiling CUDA kernels (#13726)
new fff876e03e [CMake][OpenCL] Remove warning for OpenCL wrapper (#13683)
new 49805f28a1 [microTVM] tuning on micro targets with meta-schedule (#13514)
new 40b9ee4721 [Hexagon][QNN] Improve performance wo QNN canonicalization (#13734)
new fa342a4a2f [Target] Make `key=arm_cpu` --> `key=arm_cpu,cpu` on AArch64 (#13775)
new 59dbfb25d8 [UnitTest] Parametrized test_arith_iter_affine_map::test_padding (#13774)
new 6724751250 [TVMScript] IR Fragment Printing (#13742)
new e5a9c479cb [TIR][Fix] Buffer slicing using index dtype as extent (#13788)
new 3e4f73ead4 [TIR][Fix] IndexDataTypeNormalizer not unwrapping float casting (#13789)
new 47e08bf5c5 [FIX] Minor Compilation Warning Fixes (#13794)
new cc24f32d72 [TIR][TOPI][x86][CI] Support skylake avx512 (#13621)
new 7a4f259e95 [TVMScript] Migrate More to TVMScripr Printer (#13785)
new e931926155 [TVMScript] `T.axis.remap` syntax sugar for TVMScript printer (#13743)
new 25a8806d88 [TVMScript] Use TVMScript for all TIR Printing (#13795)
new 8aa808a70f [TIR]Fix the crash of the pass RemoveNoOp (#13808)
new 9f3d00f761 [TVMScript] `T.match_buffer` syntax sugar in arguments for TVMScript printer (#13801)
new c0acf50f42 [TVMScript] `T.allocate` with `T.decl_buffer` syntax sugar for TVMScript printer (#13813)
new 7a4c92613a [TVMScript] Implicit root block syntax sugar for TVMScript printer (#13819)
new 2dc50846f9 [microTVM][CRT]Separate CRT template project from standalone CRT build (#13812)
new 68f9801b31 [TVMScript] Add ObjectPath to LiteralDoc (#13821)
new 7bfc971105 [TVMScript] More concise `T.allocate` syntax printing (#13830)
new 95f52553d8 [TOOL][NATIVE] Android native application for deploy and run (#13791)
new f55ac2207b [TVMScript] Introduce `PrinterConfig` (#13831)
new 20fe67ffbf [RUNTIME] Fix determination of big/little cores domains (#13832)
new 5c818c7ee0 [TVMScript] Default to T.Buffer than T.buffer_decl (#13838)
new 2afdb1d148 [TVMScript] Consolidate folder structure (#13841)
new 9857c93b68 [TVMScript] Comments and docstrings printing (#13839)
new 147d5bec82 [microTVM] Fix host-driven AOT memory workspaces (#13807)
new c79727ff6e [ROCM] Fixes compiling on ROCM 5 and accuracy on dense op (#13847)
new 9d2a3e0063 [Arith] Support eq in detect_clip_bound (#13746)
new 85c51026eb [RUNTIME][CLML] OpenCLML tuning and profiling enhanced (#13843)
new e24229f34c Enable C++17 for cmake modules (#13869)
new 0d756aeb10 [LLVM] Remove call to EmitDebugLocation from AddAliasInfo (#13872)
new b536612467 [TVMScript] Robustify the Highlight Printer (#13861)
new ee66fbc1b4 [ARITH] support floordiv in deduce bound (#13880)
new 1d2c14d696 [Build] Fix misleading error messages (#13887)
new b245ec5b69 [TIR] Handle nullptr returned by FindEntryFunc (#13852)
new b86fd4a1de Extend the USE_LIBBACKTRACE option (#13816)
new d8d89d75f6 [OpenCL] Implement save/load pre-compiled programs (#13868)
new 4ae67c294a [Fix][Arith] Analyzer simplification starts with canonical (#13875)
new ef259f4698 [Fix][TVMScript] Fix `LetStmt` printing logic (#13900)
new fcc0f900c4 [TVMScript] Connect `assert_structural_equal` with new TVMScript printer (#13859)
new 6e13a956ba [Arith] Updated incorrect simplification rule (#13922)
new bb9012daf1 [OpenCL] Refactor OpenCL init function (#13919)
new c399edf5a0 [TVMScript] Schedule error reporting with new TVMScript printer (#13921)
new 35afcf552d [Arith][UnitTest] Parametrize tests of RewriteSimplifier (#13923)
new cb3a4835b5 [TVMScript] Support `show_meta` (#13934)
new 19dec9e9a2 [TIR] Allow TransformLayout index_map to contain RVs (#13930)
new b4d7fded3b [TVMScript][UX] Introduce decorator for deprecation (#13941)
new 67298905cf [TIR] Expose bitwise ops to python (#13945)
new 2341483f5a [TVMScript][Fix] Print Multi-line String as Metadata (#13965)
new 967fea8192 [TVMScript] Deterministic function ordering (#13962)
new 5084bd7720 [TVMScript] Enable Safe Autocasting in BufferStore (#13960)
new d799840f8f Fix out of bound enum conversion (#13967)
new 77d74b7c14 [TVMScript] Unify `T.handle` and `T.Ptr` (#13969)
new 7d30da7be8 [TVMScript] Simplify TIR Var Definition (#13970)
new 1af30a6a7f [TVMScript] Encourage using T.Buffer directly (#13971)
new c2231b7d4d [microTVM] additional refactoring for enabling USE_MICRO in more builds (#13909)
new 9ff0c4c8df [microTVM]Refactor crt_config.h header file generation (#13955)
new 311cac70bb [Build] Fix find_include_path when using TVM python package (#14007)
new 160beaf91d [CLML] Changes corresponding to OpenCL workspace refactorization (#13972)
new 44179702de [TIR] Add cp.async support for tir.if_then_else (#13966)
new 4fbfc58118 [FIX][RUNTIME] Convert container with function value type (#14024)
new 0fd039a36e [Arith] Implemented PMatchesOneOf and matches_one_of (#13933)
new 17a000220e [TIR] [Bugfix] Pass the correct block_sref_reuse to Replace (#14023)
new 4ee468d77c [TIR] Enable Host Func Attribute for PrimFunc (#14020)
new b7b335507f [TIR] Introduce Pass InjectPTXLDG32 (#13973)
new be07ff45be [WEB] WebGPU Codegen (#14048)
new 0af7185dab [Codegen][CUDA] Add error message for missing fragment info (#14073)
new 7e44f43d9f [LLVM] Add support for DeclBufferNode (#14103)
new b8ef73da37 [TVMScript] Use op attribute to control whether to print dtype in TVMScript (#14111)
new 0b9a73fb84 [Fix][TVMScript] Fix index of metadata in printed script (#14130)
new 1379231cb1 [Arith] ConstIntBound was incorrectly assuming bounds were over int64… (#13918)
new 2364b6acee [Unittest] merge test_cp_async_in_if_then_else into test_tir_transform_inject_ptx_async_copy (#14138)
new 5091a0585b [TVMScript][Printer] Remove relax prefix for now (#14140)
new 66789753ea [Runtime] Fix high RAM usage when saving / loading paramters of big models (#14147)
new 4e12508aa5 [microTVM] Use QNN schedules to give SOTA performance (#13752)
new a6e641626d [TIR] Allow TransformLayout with non-inversible index map (#14095)
new cd9105747b [TIR][Analysis] Implement IdentifyMemCpy analysis function (#13947)
new 74a3f5d6f2 [TVMScript] Distinguish LetStmt and Let expression (#14207)
new 8d34bedfb3 [TVMScript] Sugar T.env_thread + T.launch_thread (#14217)
new 5e7ee367ee [TVMScript] Sugar Var Definition in TIR Buffer (#14223)
new 318eb7f537 [Refactor] Move `VarUseDefAnalysis` to header file (#14185)
new bec28e8693 [TIR] Enhance loop unroll with unroll local access (#14224)
new 5d76716fcf [Fix][TVMScript]TVMScript BinOP printing refactor (#14200)
new c99ad4cbf7 [Fix]Fix function ObjectPath in IRModule SEqual (#14230)
new 527ebb0e4b [TVMScript] Support SizeVar Roundtripping (#14227)
new 0057d2aad5 [TEST] Fix division by 0 in llvm codegen test (#14232)
new 2bc1a1bc89 [LLVM][BugFix] Fix include Triplet.h bug when LLVM version>= 17 (#14235)
new 9fcf09568d Update to v0.12.dev0 (#14241)
new 0013b3a5ef [SVE] Adding codegen tests for SVE (#14239)
new 04c4593af9 [Arith] Add simplification rule for `x - max(x+y, z)` (#14271)
new ed5c513c3a [Transform] Use callable() instead of isinstance() for type checking (#14248)
new b1147bbf81 [TVMScript][Parser] Add more warp-level builtins and `Range` (#14279)
new 8fdffbf6db [IR] Enhance IRModule SEqual/SHash to support cross function calls (#14289)
new b1dacdfe40 [TIR][Hexagon] Enhancement of NarrowDataType pass for binary ops (#14298)
new d8d754e3c3 [TIR][Compute-at] Utilize InverseAffineIterMap for dom estimation (#14184)
new d0d50283f6 [LLVM] Add support to generate llvm.assume (#14294)
new 26e0d13b94 [Bugfix][TVMScript] Preserve variable names in LetStmt (#14319)
new a196a47e83 [Fix][TIR] Fix tvm::arith::UnionLowerBound (#14304)
new 94a22d1b30 [LLVM] Fix registerCallbacks API after recent change (#14323)
new e022da63c1 [CODEGEN][METAL] Fix ramp codegen (#14330)
new a4f3371b4a [METAL][CODEGEN] testcase for ramp codegen (#14331)
new a7ab6ea5ce [CODEGEN][METAL] Fix unaligned vector load (#14332)
new af0bd4120a [Hexagon] Add concept of DMA groups (#14254)
new c78c806777 [MetaSchedule] Introducing MemHammer (#14164)
new e78e095b05 [TIR] Fix Datatype in Lower TVM Builtin (#14347)
new 8e4e359cde [CI] Update GPU image for CUDA 11.7 (#14363)
new 06c8e5f1f3 [TIR][Utility] More flexible tir::Substitute arguments (#14251)
new 9a1a6a9a48 [TVMScript] Use new variable frame in If/Then/Else (#14250)
new 5bd6cc181a [TIR] Remove LoadNode and StoreNode (#14381)
new 6c7b0ac935 [TVMScript][Fix] Fix `bool` printing for roundtrip (#14390)
new 367d57b870 [TIR] Legalize dtype of constants in IndexMap (#14385)
new b51a635017 [TIR] Improved MakePackedAPI error message (#14387)
new 1b5d2ced02 [TIR] Refactor BF16Legalize (#14405)
new 0eab9d618b [TVMScript] Improved error message for unexpected top frame (#14399)
new aafd336d4b [OpenCL][Textures] Always use SSA for texture loading (#14397)
new 8a58fdd374 [TIR] Remove special-casing of T.address_of in the storage rewrite pass (#14430)
new b1e5eb5f42 [Analysis] Improve error message in VerifyWellFormed (#14389)
new bb7a05bded [TIR] Update LowerTVMBuiltin to use Optional<T> (#14400)
new 9092a820ac [Runtime] Introduce runtime module property (#14406)
new b8ab20af49 [Typo] Fix name of iter var type 4 (#14436)
new b3639397fc [Hexagon] Fix deprecated call for data layout size in bits (#14438)
new ebc6a5d66d [Unity] Relax VM (#13878)
new f03351d26f [Unity] Relax expressions and types (#13901)
new 0a6a022010 [Unity][IR] First-class StructInfo (#13907)
new 26723bd259 [Unity] Basic StructInfo Analysis and Expr construction (#13916)
new 0109fd81b2 [Unity] Relax BlockBuilder and ExprMutator (#13926)
new ae5accd3e6 [Unity] Relax TVMScript Parser. (#13932)
new fd217ce2a7 [Unity] Relax TVMScript Printer (#13944)
new ca279a1b62 [Unity] e2e Relax minimum build flow (#13961)
new 28868de049 [Unity][Pass] Operator Fusion Passes (#14001)
new cdd898e87b [Unity][VM] Supporting "compiled" exec mode. (#14015)
new ac6341d8e2 [Unity][Pass] BindParams pass, FoldConstant pass (#14016)
new a341608bae [Unity][Pass][TuningAPI] Introduce TuningAPI and MetaSchedule pass (#14014)
new 813d7dfff3 [Unity][TVMScript] Move tir/relax import in script out of __init__.py (#14033)
new 10548e5d68 [Unity][Pass] Remove Unused Function (#14061)
new 9c5149e9df [Unity][BYOC][Pass] RunCodegen and TensorRT (#14078)
new bad4bb6ff8 [Unity][BYOC] Add CUTLASS backend (#14081)
new 163496a3d4 [Unity][BYOC]Add relax backend pattern registry (#14106)
new b071bb8f16 [Unity] Add Global info (#14132)
new 2f1d6897a0 [Unity][WEBGPU] Codegen improvements and WebRuntime (#14187)
new e6a39f6651 [Unity][TIR][Pass] ForceNarrowIndexToInt32 (#14203)
new 387ec4b750 [Unity] Introduce Default GPU Schedule Pass (#14182)
new 77238f5c94 [Unity][WEB] Improve webgpu codegen options to skip readonly (#14213)
new 1ff3026332 [Unity][WEB] Simplify WebGPU Codegen per spec (#14225)
new bada3bfb52 [Unity][TVMScript] Fix prim_func lost issue in relax.emit_te (#14189)
new 7551feda9b [TVMScript][Unity] Improve PyLint Compatibility (#14276)
new 7fa1cd1f5e [Unity][DEBUG] Add Instrument (#14302)
new 09654404df [Unity][Transform] DefaultSchedule pass (#14266)
new a84261ad82 [Unity][TVMScript] Update GlobalVar `checked_type_` when `emit_te` (#14367)
new ff72a13652 [Unity][VM] Add CUDA graph vm builtins (#14371)
new 637a8ca1b8 [Unity][Hexagon] Enable Relax VM for Hexagon (#14415)
new 626fe5ebee [TVMScript][Bugfix] Tuple on the RHS of AssignDoc (#14452)
new d5248493d7 [Unity][BYOC] Add cuBLAS backend (#14291)
new 46da721435 [Unity] Enable pod args in WebGPU (#14560)
new a5408c3e09 [Unity][TVMScript] Update struct_info for GlobalVar (#14579)
new 394b55921c [Bugfix][TVMScript] Handle LetStmt for `var1 = var2` expressions (#14320)
new f1b903d82e [TensorIR] Support for L2 prefetch async copy and pred_guard enabled async in vectorized if_then_else (#14329)
new 10c4e16fd9 [Arith] Simplifications for floormod(x, 2) (#13936)
new cd6e0164a2 [TIR] Use same DataType of builtin::tvm_struct_set in C++ and Python (#14489)
new 4b71a30127 [LLVM] Add guard for #include <llvm/Transforms/IPO/PassManagerBuilder.h> (#14469)
new 6018d0ff3d [TIR] Use IRModuleNode::Remove to remove None in PrimFuncPass (#14494)
new 60fce10a75 [LLVM] Add missing `override` to GetFormat and GetPropertyMask (#14470)
new a169c486b7 [TIR] Improved SeqStmt::Flatten utility (#14497)
new 5171a97a1a [TIR] Merged kDeviceThreadAxis and kUseDynamicSharedMemoryTag (#14495)
new e60e2a03a1 [Node] Utility methods for ObjectPathPair handling (#14498)
new fc7a3b2972 [TVMScript] IRModule TVMScript Parser.
new b65b1f64d7 [TVMScript] Expose IRModule::attrs as I.module_attrs
new 894676af6e Expose attrs argument of "ir.IRModule" to Rust bindings
new b73819b164 [Runtime] Runtime module property mask for Metal and Vulkan
new 6074aaa996 [Arith][Bugfix] Simplify "x - 1 < y" into "x <= y" (#14528)
new 1a4c747369 [LLVM] Use DataLayout::getABITypeAlign instead of getABITypeAlignment
new ec6dd2e0f4 [TIR] Update SplitHostDevice to post-process with ConvertSSA (#14496)
new 53fce09d68 [ARITH] Enhance CanProve to handle symbolic bound (#14523)
new c4f355bdfd Update to v0.13.dev0 (#14544)
new d8a5114f43 [ARITH] Enhance CanonicalSimplify to Simplify ProdDiv (#14538)
new 4b9910fcec [TVMScript] Distinguish between void* and handle (#14488)
new f04b3b9333 [Codegen][LLVM] Remove cast to i8* in builtin::address_of (#14563)
new c2937b7320 [TIR] Use String instead of StringImm for AttrStmtNode::node (#14491)
new 2abafd61ff [ARITH][BUGFIX] Fix a bug of iter map floormod(x,2) simplify (#14571)
new 159e579bb7 [Object] Implemented .as<T> for ObjectRef param, returns Optional<T> (#14522)
new 5cde4d1d84 [LLVM] Expand tvm::Type to DWARF conversion (#14568)
new 32bab8a610 [ARITH] Enhance IterMapSimplify for symbolic (#14547)
new da4e800825 [ARITH][TensorIR] Improve CompactBufferRegion for symbolic shape (#14596)
new ad0d7d1e10 [LLVM] Validate generated LLVM module before optimization (#14564)
new 0a83b9d8ba [MERGE] Bring changes from main into unity 2023-04-12
new 561511ea2d [Unity] Fix ForceNarrowI32 with pod arguments (#14605)
new 3ffe4f9e11 [Unity] Update specific builtins for LM (#14617)
new d0b781a266 [Unity][CODEGEN] Fix metal codegen when with only single working dim (#14627)
new 5e3a9b37be [Unity] hotfix webgpu codegen for vec load (#14630)
new 3c568e804e [Unity][TARGET] Updates vulkan codegen for DeclBuffer (#14641)
new a05235ee26 [Unity] Improve WebGPU codegen for large grid (#14674)
new e36f1ac66a [TIR][Hexagon] Use the "target" value in T.func_attr for VTCM limit (#14567)
new 162d0f6cf4 [CODEGEN] Fix metal codegen when with only single working dim (#14628)
new 26db4c7650 [METAL] Fix flaky memory issue due to racing (#14671)
new 5330d57998 [TIR] Flatten SeqStmt on construction (#14492)
new 422bfa97cc [CMAKE] Update search pattern of config (#14686)
new d18f2fb189 unify search path approach to various libs (#14694)
new 5b1baf1226 [MERGE] Merge main into unity 2023-04-23
new 533b6d2dc1 [Unity] Fix ForceNarrowIndexToI32 so it ignores i16 (#14733)
new b910feb4db [Unity] Add system lib build option to relax (#14734)
new 2236e07636 [TIR] [Analysis] Calculate allocated memory at module level (#14711)
new ae31afa2d5 [TIR] [Hexagon] Add get_vtcm_allocation_sizes with lowering (#14720)
new 748157ac67 [METAL] Update metal runtime to directly store kernel map (#14727)
new e51de371da [TIR] More flexible buffer compaction (#14021)
new a39a317ee6 [CI] Modify test cases to accommodate the CI upgrades (#14651)
new 4c78a3a6a3 [Arith] Implement statistics counters for RewriteSimplifier (#14532)
new 2623cbbc5c [TVMScript] Preserve LetStmt of constants (#14531)
new ff0bea51cf [TIR][Driver] Move ShouldAnnotateEntryFunc logic into transform (#14562)
new 7d510cf0d4 [Bugfix][Codegen][CUDA] Wrong casting in ASM (#14782)
new 7dd8ef10f3 [TVMScript] Add `__name__` attr for parsed PrimFunc and IRModule (#14786)
new 52bdc84a7a More clear ref of thirdparty license (#14790)
new eaa2f9562c [MERGE] Merge main into unity 2023-05-07
new 7840f81ba6 [MERGE] Fix lint after lint image upgrade
new 74d239a01e [OpenCL] Refactor OpenCL runtime to support SPIRV binary ingestion (#14792)
new 8086e534b4 [Testing] Use TVMScript's "name" argument for error messages (#14808)
new e7248f1090 [TIR] Improved parameter name in DLTensor unpacking error messages (#14776)
new 4c28a63cf5 [LLVM][RUNTIME] Enable multi systemlib with device code (#14843)
new f40e0175d0 [Bugfix][TVMScript] Capture fails if var appears only in annotation (#14849)
new 671e18c692 [METAL] Fix vectorized select (#14846)
new f27c76e073 [Codegen][OpenCL] fix amibiguous selection operator call (#14833)
new f5aa3c4c1d [MERGE] Merge main into unity 2023-05-14
new 58d44795ed [TIR][Doc] Fix formatting in pop_trace docstring (#14894)
new ab797006dd [LLVM] Use Var annotation in LetStmt for pointer type (#14570)
new 54d659f149 [TOPI][Target] Add SVE specific convolution (#14483)
new 1220cfcfde [TIR] Avoid too complex predicate in compaction (#14866)
new 3453f3173d [bugfix] fix the undeclared identifier 'f' (#14879)
new 002af920df [CONTRIB] Enable create_staticlib to take in tar files (#14876)
new ab74c57239 [RUNTIME] Make systemlib unique per prefix (#14887)
new 9b06fab15a [Vulkan] Add cooperative matrix support (#14817)
new 117a08706c [TIR][TVMScript] Added format/parsing of subroutine calls (#14889)
new 2e888fa8a0 [MERGE] merge main into unity 2023-05-20
new 4454d59556 [Unity][WebGPU] Try F16 support for WebGPU Backend (#14904)
new 10db131537 [Contrib] Use f-strings for string formatting, NFC (#14893)
new 6bbf2cc99f [TIR] Expand unit tests for ConvertSSA (#14892)
new 956dffa93f [TVMScript] Round-trip DeclBuffer with undefined data pointer (#14900)
new acc872d866 [LLVM] Codegen subroutine call when CallNode::op is GlobalVar (#14901)
new d5b2d4a550 [TVMScript] Allow T.target("device", host="host") to specify host (#14915)
new 3a2487ad97 [BUILD] Enable log before throw message in windows (#14937)
new 2b59970a8f [Target] Add target to all TVM callbacks (#14939)
new bd6cff35ee [LLVM] Expose Host CPU Feature Detection (#14946)
new d960f4dfee [TIR] Handle subroutine calls in MakePackedAPI (#14913)
new cd321768be [TIR] Restrict tir.transform.CombineContextCall to host functions (#14945)
new ef8ec72d72 [Bugfix][TIR] Avoid symbol conflicts in MakePackedAPI/MakeUnpackedAPI (#14950)
new 5e8870634a [TIR] Preserve existing kTarget function attribute in BindTarget (#14942)
new f048ce46dc [TVMScript] Prevent bool to int conversion in T.Assert condition (#14941)
new 1b85503ccb [Codegen][LLVM] Allow void return type from PackedFunc (#14958)
new 17be53729a [METAL] Fix int8 vectorized cast (#14962)
new f1afa116fc [TIR] SplitHostDevice, handle subroutines (#14918)
new 65818ac612 [Runtime,RPC] Use f-strings for string formatting, NFC (#14967)
new 6bf5bb0207 [Hexagon] Add support for v73, make v68 default (#14965)
new 4de0c08e94 [TVMScript][TIR] Parse subroutine calls with no arguments (#14919)
new aabf1e97f4 [TIR] Avoid re-defining `var = arg_var` in ArgBinder (#14952)
new 7d1a8f5dc8 [IR][SIBuilder] (#14574)
new 556a892107 [Bugfix][TIR][VTA] Update host-side target, even without device func (#14982)
new 3b2ff7feb2 [CMAKE] Add a dummy target to defer libtvm dep (#14975)
new 9a2c0838ee [OpenCL] Improve diagnostic message (#14995)
new fc7593363e [RUNTIME] Update Module and Registry to use String Container (#14902)
new 46e5dde295 [DataType] Initial support of fp8 (e4m3/e5m2) (#14863)
new 7808e846d4 [CMAKE] Introduce dummy build as an option (#15000)
new 8b585d7278 [OPENCL] Always use convert_T for type conversion (#14972)
new c6b2918b0e [MERGE] Merge main into unity 2023-06-01
new 179693a9b5 [Unity] Add hexp for compute capacity <= 5.2 (#15070)
new 43ef45b3d4 [Unity][Frontend] Add relax onnx importer and tests (#14999)
new 6dbae68e9d [Bugfix][CUDA] Fix codegen for hexp for sm >= 52 (#15079)
new d9f11abee8 [IR,TE,TIR] Use f-strings for string formatting, NFC (#14990)
new 834fb629cf [Minor] Fix compilation warnings (#15007)
new e0d2fa2dc9 [Hotfix] Remove `LOG(INFO)` from unsupported dtype legalization pass (#15015)
new d85bdabe2e [TIR] Restrict tir.transform.LowerTVMBuiltin to host functions (#14944)
new 336ba94a40 [TIR] Keep trivial LetStmt in tir.Simplify when used in buffer decl (#14951)
new be0fc2be11 [TIR] Enhance TVMScript Buffer Slice Access (#14693)
new a722c0d812 [OpenCLML] Reactor and introduce on chip memory and memory planner (#14922)
new b07f541217 [TIR] Preserve object equality in Buffer::GetFlattenedBuffer (#15040)
new 29e40b152e [Vulkan] Allow DeclBuffer in CodeGenSPIRV (#15035)
new fc1f6af034 [TIR] Move SplitHostDevice to before MakePackedAPI (#14986)
new 75979c6161 [TIR] Handle DeclBuffer in IRSubstitute (#15054)
new fb45672942 [TIR] Handle DeclBuffer in StorageRewrite (#15051)
new 142c6deeca [TOPI][Adreno] Fix problem with ceil_log2 (#15061)
new 386509e7ac [TIR] Handle DeclBuffer in Inline/ComputeAt/ReverseComputeAt (#15038)
new f7e1a851db [BYOC] Add GEMM kernel from FasterTransformer as submodule (#15046)
new 7c4523ef69 [CodeGenC] Use PrimFuncNode::ret_type in function signature (#15073)
new b76148b518 [ARITH] Improve arith simplify to handle symbolic reshape pattern (#15081)
new 3fc4cdc6fd [MERGE] Merge main into unity 2023-06-13
new 5bcf35a2e9 [MERGE] Fix after merge
new 5ca220d00c [Unity][Relax][UX] Specify function purity in the @R.function decorator (#15109)
new a6b5176e59 [Target][rocm] Replace rocm arch parsing from int to string (#15088)
new 97feb0ae3d [TIR] Update primfunc host attachment to include host (#15102)
new 9a36a59edf [TIR][CodeGen] Define PackedFunc error code in MakePackedAPI (#15076)
new 0e05cef8be [TIR][TVMScript] Convert tir.op operands to PrimExpr (#15091)
new d5c2063b76 [TIR] Handle DeclBuffer in RemoveNoOp (#15096)
new cbb7102328 [TIR] Handle DeclBuffer in MergeDynamicSharedMemoryAllocations (#15094)
new 8f527256b2 [#15043][Docs] Updated the copyright year from 2020 to 2023 (#15071)
new 248af5dc53 [Arith][TIR] Recognize empty extents (#15129)
new 7273988fb8 [ARITH] NormalizeToIterSum (#15120)
new a4ab92da11 [ARITH] Hotfix flaky test in padded matmul (#15131)
new 005bcd5fb1 [TIR] Avoid duplicate GlobalVar names in SplitHostDevice (#15119)
new 035e5d67c3 [NDArray] Allow creating a view from a strided array (#15132)
new b102e9219f [Test] Improve check for TVMError exception in test_cast (#15138)
new a028ef7c66 [LLVM] Minor refactor to LLVMModuleNode::SaveToFile (#15139)
new c705269ae4 [LLVM] Remove the "ret_void" argument of AddFunction (#15127)
new a10b061d76 [TIR] Block dependence analysis without schedules (#15146)
new 81ab1e2830 [MERGE] Merge main to unity 2023-06-24
new 593f056143 [Minor] Fix Compilation Warnings (#15154)
new ef3d497053 [Target] Add MetaSchedule-compatible attributes to OpenCL (#15166)
new 9d68750b09 [TIR] Fix RenewDef for symbolic input shapes (#15163)
new bb464bffc9 [TIR] Expose UndefinedVars to Python (#15165)
new 65fae2883c [Runtime] Clean TVM stacktrace in error messages (#15161)
new accb5a211f [MetaSchedule] Introduce MMA Tensor Core Multilevel Tiling (#14673)
new 654a89e91a [TensorIR][ROCm] AMD Matrix Core Support (#15106)
new 45c3370443 [TIR][Schedule] Support padding-by-factor in PadEinsum (#15168)
new 1f701c3387 [microNPU][ETHOSU] Fix compiler attributes types (#15159)
new 5f59227991 [RUNTIME] Add weak symbol to builtin fp16 (#15182)
new 51c9c9799c [Testing] Utility method to run TVM on remote device (#15179)
new 7639e7f742 Merge remote-tracking branch 'apache-upstream/main' into unity
new ac140c30de [CMake] Support LLVM-16 static linking (#15164)
new 77fb5b95db [TensorIR][Visitor] Visit buffer members in `match_buffer`'s in block visitor functions (#15153)
new a6f79c15d1 [RPC] Report RPC Session Timeout to Client Instead of "kShutdown" (#15187)
new bfba8756b0 [ARITH] Allow Analyzer to MarkGlobalNonNegValue (#15193)
new 73f1ed9d16 [TIR][Transform] Add LiftThreadBinding Pass (#15207)
new 96ae534612 Update version to 0.14.dev0 on main branch (#15208)
new f6b61c2d09 [MERGE] Merge main into unity 2023-07-03
new 418db68c66 [Dlight] Enhance Decode-GEMV Schedule (#15195)
new d0e98e396f [Android] ndk static build (#15215)
new 4af76474a5 [ARITH] Enhance buffer shape bound deduction to include offset (#15228)
new a43858d8fc [CMAKE] Add Vulkan header for Android (#15229)
new d2b5d0b88e [UnitTest][NVPTX] Avoid cascading failures from CUDA postproc (#15136)
new 9fa4a87704 [TIR] Allow VerifyWellFormed to accept IRModule (#15247)
new 52b62b2675 [TIR] Preserve AllocateNode::annotations (#15242)
new da010bf5fd [TVMScript] Handle parsing of PrimFunc calls with non-void return (#15239)
new 68fbd33c44 [TIR] Output DeclBuffer in LowerTVMBuiltin (#15243)
new ba5643d546 [Testing] Add tvm.testing.local_run (#15268)
new 267f5694d1 [TIR] Allow symbolic bounds in IndexMap analysis (#15264)
new 63a865b92f Merge remote-tracking branch 'apache-upstream/main' into unity-staging
new 41d9143ea0 [Unity] [DistIR] Introducing DistIR (#15289)
new 81a3c37cc7 [Unity] CUDA Graph update (#15320)
new 3fdd06994b [TIR] Call TVMBackendFreeWorkspace inside LetStmt (#15253)
new 23abaa8795 [TIR] Implement TIR macros (#15260)
new 7e11c66a8e [TIR] ThreadAllreduce warp-level primitive support with multi-warp (#15327)
new 77fc49d584 [Runtime] Device API to query L2 cache size (#15332)
new 78c18b3d85 [Runtime] Flush L2 cache in time eval (#15305)
new 45cf64badb [TIR] Return error code from kernels in SplitHostDevice (#15241)
new 34a18544e1 Merge remote-tracking branch 'apache-upstream/main' into unity
new 84bf2ef9aa [TIR][UX] Implement privacy annotations in TIR (#15214)
new 5fad153f57 [Relay] Introduce arguments limit to FuseOps pass (#15137)
new 998b75096b [BugFix][TIR] Fix multi-grouped multi-warp allreduce (#15399)
new c47d275139 [TIR] Allow starred expressions in TIR script (#15404)
new 8e631d7fbf [Codegen][Metal] Support metal warp-level primitive (#15401)
new 26a196a11a [TIR][BugFix]Ensure the Var's scope is correct (#15406)
new e01d2c1ed0 [Hexagon] Add default vtcm capacity for targets (#15414)
new a428cb4b43 [Submodule] Add Flash attention v2 (#15423)
new f7345f3b68 Merge remote-tracking branch 'upstream/main' into unity-staging
new f987537be9 [Bugfix][CUTLASS] CUTLASS path finding (#15476)
new 8f33eebac2 [ROCm] Fix some ROCm codegen bugs (#15454)
new e67cc31727 [TVMScript] Support starred indices in for-loop (#15442)
new f2fb558bcb [ROCm] fma intrin (#15464)
new 0a584aba3c [TIR] Output DeclBuffer in MakePackedAPI (#15263)
new bb521d0fb7 [Bugfix][CUTLASS] CUTLASS path finding (#15480)
new 4ad9811c0a [MERGE] Merge main into unity 2023-08-04
new f2034a44d5 [Unity][BYOC] Integrate Flash attention v2 kernel into CUTLASS BYOC (#15467)
new 3df9dcd281 [Relax] CuDNN Fallback Support through BYOC. (#15462)
new 357d74e3b8 [Unity] Multi-device support for Relax (#15447)
new f3e1b6cbc2 [Unity][MSC][M0.1] Enable set name and layout for exprs (#15500)
new 03042fb02f [Unity] Fix the ambiguity issue in `vDevice` constructor on Mac with Apple clang version 14.0.3 (#15546)
new 4c76394db6 [Unity] UpdateVDevice pass and infer vdevice (#15570)
new 13eebe7c23 [Unity] Disco: A Framework-Agnostic SPMD Runtime for Distributed Inference/Training (#15622)
new 8e7b65ce71 [Unity] Add support for Google Pixel OpenCL (#15675)
new 6ac7b82563 [Script] Be more careful when generating ast.ExtSlice for Subscript (#15483)
new 4bf7a4793e [TVMScript] Allow use of Python builtins in script (#15492)
new 4c58749b39 [ARITH] Enhance Canonical Simplify for LE (#15471)
new 56d187337e [VM][Textures] Enable OpenCL textures for VM (#15419)
new e1f79eb002 [CodeGenC] Handle GlobalVar callee as internal function call (#15103)
new 684a802539 Remove duplicate the word (#15524)
new 6ac2a80b31 Remove IRModule Dependency from Target (#15511)
new 44911c9791 [Runtime][Minor] Suppress verbose logging in Metal device API (#15543)
new 2be8184118 [Fix] Fix the typo in compile flag (#15542)
new b77eed5b71 [TVMScript] Create loop var with min_val dtype in for frame (#15547)
new 119ee623c9 [TVMScript] Use triple-quoted python strings for metadata (#15564)
new 9f0ccd4449 [Arith] Fix handling of overlapping predicates (#15555)
new 9c238f75f0 [Testing] Allow Capitalized name in CompareBeforeAfter (#15568)
new 08bdebee94 [TIR] Shuffle in PointerValueTypeRewrite for scalar reads (#15517)
new 600cda54c2 [TVMScript] Optionally output the address as part of variable names (#15579)
new aaa0360c6c [Arith] Add tvm::arith::PresburgerSetNode to work with Presburger Set in MLIR (#14690)
new dc02c24b50 [CMake] Add NCCL to TVM and TVM Runtime (#15605)
new bae261036f [Arith] Fix detect linear equation with uint var (#15558)
new 9c8de9ce3e [Hopper TMA] CUDA codegen for async copy with barrier synchronization (#15616)
new 2351c24eb0 [Runtime] Expose ModuleGetFunction as PackedFunc (#15623)
new 0d6b69b19b [CMake] Add RCCL to TVM and TVM Runtime (#15624)
new bcc5c1873e [Runtime] Utils to Stringify Device (#15630)
new 415d1670eb [Runtime] Serialization/Deserialization of runtime module (#15244)
new 8cfa724278 [TIR] Output DeclBuffer in SplitHostDevice (#15493)
new fd4476bcba [Arith] Added simplification rule for multiple equality compares (#15628)
new 4bc3608e19 Do not link LLVM libraries into cpptest binary (#15639)
new 02fc9d4fb2 [Arith] MLIR PresburgerSet compile fix mlir >= 160 (#15638)
new d30e97b5a3 [Runtime] Make `export_library` parameters after `file_name` keyword-only (#15658)
new 83d92fc004 [IR] Use structural equal for Range equality (#15664)
new ed3528fe1c [Hopper TMA] Add CUDA codegen support for bulk asynchronous copy (#15656)
new 9e3490f296 [BugFix][Arith] IterMapRewriter abort rewriting once failure (#15677)
new 4d85efe57b [MERGE] Merge main into unity 2023-09-06
new 54ef2cda6e Fix after merge
new 956030aa51 [Module] Implement custom imported modules serialization (#15666)
new 5835c228c4 [Runtime] Make `CSourceModule` and `StaticLibraryModule` Binary Serializable (#15693)
new 405b59c4a3 [FFI] Propagate Python errors across FFI boundaries (#15596)
new 543bdd08c3 [TVMScript][FIX] Disable `show_object_address` in printing by default (#15705)
new d03626a0c6 [TVMScript] Disable `black_format` by default (#15706)
new 35d14ca824 [Hopper TMA] Add intrinsic to create barriers for synchronization (#15684)
new 39195dece8 Merge remote-tracking branch 'main' into 'unity'
new 91f915307b [Disco] Pipe-based Multi-processing Session (#15727)
new aff7168b03 [Runtime][CUDA] NVTX Integration (#15760)
new 3e584434f7 [Hotfix] NVTX for CPU-only Build (#15774)
new 06f74f560b Revert "[CodeGenC] Handle GlobalVar callee as internal function call" (#15725)
new fdbb1f26fc [Target][Device] Auto detect target and create device from str in torch style (#15714)
new 3ac6a77988 [Target][TOPI] Use LLVM for x86 CPU feature lookup (#15685)
new dfc4456bc5 [UnitTest][Metal] Parametrize allreduce GPU tests (#15749)
new 5f25bcb4da [TIR] Do not drop 4th argument to tir.max (#15763)
new 7fb70da232 [Arith] Fix detect non-divisible iteration form like (x % 255) // 16 (#15665)
new 91f083ccd1 Merge branch 'main' into unity
new d320887da7 [Disco] Integrate RCCL (#15776)
new 63f46341bc [Disco] Improve RCCL Integration Logic (#15796)
new e7c5a60f40 [Codegen][ROCm] Mismatched Dtype of Workgroup/Workitem (#15777)
new 0dd2a43bf4 Merge remote-tracking branch 'apache-upstream/main' into unity-staging
new fe1ff7dcb6 [Unity][TVMScript] Produce var = R.ExternFunc("") statements (#15703)
new b80f33e56f [OpenCL] Don't initialize OpenCL runtime on host (#15745)
new 1bcb3a55d5 Revert "[TensorIR][Visitor] Visit buffer members in `match_buffer`'s in block visitor functions (#15153) (#15816)
new e31371654f [TVMScript] Use environment variable TVM_BLACK_FORMAT for .show() (#15762)
new 67956f73c8 [Target] LLVM helper functions for any target info (#15761)
new 157f7bd22d [Unittest][Metal] Add minimal metal functionality test to CI (#15756)
new 9ecaef796a Merge remote-tracking branch 'apache-upstream/main' into unity-staging
new b87c33e20a [Disco] Add -lrt to TVM runtime for NCCL (#15876)
new 9aa8526992 [Disco][Fix] Remove Dependency to PyTest (#15886)
new 4e77e36449 [VM] Memory Manager moved up to runtime (#15833)
new 2ea9cd3237 [Fix] Remove duplicated words from comments, NFC (#15873)
new e921fa6dba [Arith] Simplify the result of non-divisible floordiv (#15881)
new a276f5f28b Merge remote-tracking branch 'apache-upstream/main' into apache-upstream-unity
new c55851fc07 [Unity] Fix TVMScript Issues in Testcases (#15920)
new 3094d049ab [Unity] Support symbolic PrimValue arguments (#15980)
new eb29567225 [release] Update version to 0.14.0 and 0.15.0.dev on main branch (#15847)
new 71b5f72b72 [Target][CI] Add LLVM functions for current system info (#15903)
new 45bca5db64 [LLVM] Fix for llvm CodeGenOpt API change (#15921)
new 6edd647ed2 Revert "[release] Update version to 0.14.0 and 0.15.0.dev on main branch (#15847)"
new 0032fcce42 [release] Update version to 0.14.0 on main branch
new bdbc5fcdba [Release] Update version to 0.15.dev0 on main branch
new 1dbb22fffe [CodeGenC][Redo] Handle GlobalVar callee as internal function call (#15835)
new 69fbee22c4 [Minor] Fix compilation warnings for clang (#15940)
new 3153830aad [CMake] Fix order of GNUInstallDirs module (#15966)
new e011ffab6b [TVMScript][TIR] Pretty print TIR LLVM function name (#15953)
new 31c79b0070 [MERGE] Merge main into unity 2023-10-29
new 61e574ef99 Fix after merge
new 2b9181ce70 [Unity][nn.Module] Support `nn.SourceModule` (#16006)
new 3a34cee30a [Unity] Deterministic Ordering when Iterating IRModule::functions (#16020)
new 53ebf90829 [Unity] Fix FuseTIR pass for gather/take cases (#16064)
new a931f309e1 [Unity] Enhance Python Annotations for Relax Expr (#16075)
new 144ef16a9c [Fix][TIR]fix symbolic strides lower (#16000)
new 2aae90e42a [FFI][Python] Handle error propagation when line number is missing (#15955)
new 7cf07eb6b9 [Fix][TIR]fix mul dtype mismatch (#16010)
new bba3fa4d32 [Codegen] Add shuffle for cuda and metal (#15998)
new 908277c83a [Pylint] fix pylint issues for thrust&tflite_runtime&util (#16023)
new 018f95b113 [Codegen][Metal] Disable cross-function call in Metal codegen (#16033)
new 1038279d84 [TVMScript] Fix mismatched dtype of IterVar in `T.thread_binding` (#16041)
new 61cc0b8855 [CMake] Use llvm-config to locate Findzstd.cmake (#16032)
new 7179f7e872 [TIR] Fix pass RenewDefs error in gather/take case (#16063)
new 5060fe4809 [CUDA] Add an option for profiling cuda kernels (#16061)
new 549684e84c Merge remote-tracking branch 'main' into unity
new 15f0cf0c2e [Unity] Implement FNormalize attribute for operators (#16067)
new 3a4bc25daa [TIR] Enhance Python Type Annotations for TIR stmt (#16076)
new 55fc309159 [Fix][TIR] Fix dtype issues for match_buffer and ramp node (#16051)
new 442525e0b3 [Fix] Broken Windows Build with LLVM (#16081)
new fc8c834b14 [Target] Support obtain l2 cache size from target (#16039)
new 2918dca658 [TIR] Enhance Python Type Annotations for TIR Expr (#16083)
new db212dd73a Add _ffi_api.py under script folder (#16087)
new faaf2235cc [Packaging] Include BYOC dynamic libraries into wheel (#16034)
new a548f00f00 [CI] Refactor unittest folder (#16110)
new 140b494495 [Runtime] Parallel-for with threading backend (#16133)
new 4cc93515ed Merge branch 'main' into 'unity'
new cda84eac8f [Unity] Flash infer integration (#16146)
new 6f29fb1889 [Unity][3rdparty] Remove TVM in 3rdparty of FlashInfer (#16155)
new 6f29206e4c [Unity][Transform] Implement RemoveUnusedOutputs (#16117)
new 6bf3e55883 [Unity] Enable ccache for `nn.SourceModule` (#16189)
new 6da7ad1d02 [Unity] Update FlashInfer (#16208)
new f765d603c5 [Unity] Fix upstream tests that fail on unity branch (#16196)
new 949d295529 [Relax] Fix to enable emit_te of topi scan/sort kernels (#16226)
new 5ce817e3ae [Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case (#16235)
new 8c23bb2015 Revert "[Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case" (#16241)
new 6bea617e4a [Unity] Fix IndexDataTypeNormalizer so that it correctly handles corner case (#16245)
new d034b0b26b [Unity] Avoid to use `std::regex` (#16249)
new 116e69a24a [Unity][nn.Module] Refactor `ExternModule` (#16247)
new ddabe20e51 [Unity] Add missing library import (#16263)
new aa2ccd51fb [Unity] Add Relax multi-device e2e cases (#15823)
new a3ecc17f59 [Unity] Update cutlass FpA IntB GeMM submodule (#16320)
new af1ccc48ed [Unity] Cutlass kernel compatibility with cmake 3.18+ (#16302)
new a9bb13e696 enhance shared memory merge.
new 78eb73b994 fix typo
new 9ba0a0e8c2 [Unity][Contrib] Add vLLM paged attention kernel (#16350)
new b7f9ba3e67 Enable ccache to accelerate contrib compilation (#16176)
new 319f8b28bc [Device][Metal] Fix metal warp size (#16192)
new 1d425c1748 Fix IRModule initialization with attrs (#16202)
new d139ed962c [TIR] ConvertSSA process entry func first (#16236)
new c24efe628e [ARITH] Simplify nested if_then_else when constant is appearing in then_expr (#16227)
new f23b3c5a06 [TVMScript] Disable concise scoping when the scope stmt is explicitly annotated (#16271)
new cfb207ae8a [release] Update version to 0.15.0 on main branch
new 8c5ea7fbed [release] Update version to 0.16.dev0 on main branch
new 6306b49670 [TIR][Transform] Implement InlinePrivateFunctions (#16184)
new a68af9548e [TIR] In SplitHostDevice, check for variables in thread extents (#16250)
new eb326df2a1 [TIR] Allow sync threads inside condition (#16345)
new b0746f5b83 [Codegen] Fix if_then_else codegen (#16242)
new c12e5e62c3 [CMake][MSVC] Disable permissive mode for MSVC builds (#16343)
new 6ea7858a68 Merge branch 'main' into 'unity'
new 52fcab2bdd Fix after merging 'main' into 'unity'
new 038d8a5f69 [TIR] Extend DP4A tensor intrin (#16293)
new 68463c63f9 [LLVM] Update Host.h path (#16373)
new 2da1f186bf [Runtime] Use cudaGetDeviceCount to check if device exists (#16377)
new 161766b84a Merge branch 'main' of github.com:apache/tvm into unity
new 42af1725f7 [Unity] Set CMAKE_CUDA_ARCHITECTURES default to native (#16335)
new a91e35cf7b [TOPI][Target] Add fp16 SIMD support for conv2d on `arm_cpu` targets (#16383)
new ebb60cf1a5 [Bugfix] Disable SingleEnvThreadVerifier (#16361)
new 999823fd66 Merge remote-tracking branch 'upstream/main' into unity
new 958c76cce6 [Unity] Split DecomposeOpsForTraining into two steps (#15954)
new ec3fc6b65f [Bugfix][Unity] Recover MSVC/NVCC/ROCm/Vulkan (#16414)
new e21e6f4b8c [OpenCL][CMake] Fix OpenCL tests compilation (#16394)
new 0f56bab59f [DeviceAPI] Support querying total global memory (#16398)
new 6767e23807 [ROCm] Some fixes of ROCm codegen (#16404)
new 26f8b668c6 [CMake] Enable cuda lang if USE_CUDA is on (#16426)
new f1d551917f Merge branch 'main' of into branch 'unity'
new 787e6be2c8 [Unity] downgrade cmake version requirement (#16432)
new b5dc27adf1 [Unity] Support cumsum with pure int32 (#16439)
new 93cd7925d0 Revert "[Unity] Split DecomposeOpsForTraining into two steps" (#16442)
new 69e3eafa1a [Metal] Dispatch numerically stable tanh for metal (#16438)
new 07305fc2d8 [BugFix]Ensure that bf16 arrays are created as expected (#16436)
new 6a07b3d2d0 [ROCm][WebGPU] Intrin Dispatch: `tanh`, `erf`, `log` (#16441)
new f35c612d5d Merge branch 'main' into unity
new 81b6919a67 fix typo in storage rewrite
new 1b4d1369d2 [Disco][3rdparty] Add latency optimized all reduce kernels.
new 2527374633 Revert "[Disco][3rdparty] Add latency optimized all reduce kernels."
new d3fd01b01a [Unity][CodeGen] RunCodegen based on externally-exposed functions (#16422)
new 3427c4f559 [SVE] Add vscale builtin (#16484)
new 74ca912202 [Runtime] ParallelFor skipping thread backend for unit extent (#16508)
new f9908cb411 [Minor] Fix Clang compilation warning in fuse_tir.cc and codegen_c_host.cc (#16511)
new 3e59640a37 [TIR] Require exactly same-dtype matching for Vulkan smem reuse (#16515)
new 13e53839ef [Redo][Unity] Split DecomposeOpsForTraining into two steps (#16465)
new a18f6d1ab5 [CI] Fix CI Script and Broken Tests (#16521)
new 0f477768cb [RUNTIME][ROCM] Properly align rocm parameter buffer (#16550)
new fa9ea98237 [Unity][TVMScript] Optionally hide StructInfo that can be inferred (#16356)
new 2c7a79e8a2 [Web] Compatibility with PagedKVCache in WebGPU (#16554)
new a0719f5d32 Improve error message in NDArray::CopyFromTo (#16539)
new caec6da42d [Upd] Enable lld search to include /opt/rocm/llvm/bin for rocm (#16540)
new 043dd9fcab [MISC] Fix compile warnings (#16571)
new e38cd9852a [Marvell BYOC]: Marvell AI Accelerator Integration - Phase 1 (#16570)
new 051c7ced42 [RUNTIME][METAL] Fix multithreading access of metal runtime (#16605)
new a96ef428d6 [SVE] Change the dtype of Ramp and Broadcast lanes to PrimExpr (#16523)
new c0df7f7062 [Doc] Fixed Docstring usage example in `tvm.ir.make_node` (#16610)
new d960f4c83a [TIR] Expand debug symbol output for CodeGenLLVM (#16544)
new 8f92d6d6e9 [Runtime] Add TVM_DLL to threading backend funcs (#16630)
new e6db834329 [Disco] Implement `Session.import_python_module` method (#16617)
new 5a2e07e0d2 [Disco] Expose functions to query the per-worker device/rank (#16639)
new e67617b2e6 [SVE] Add support for scalable data type strings (#16612)
new 41a525bd6c [TVMScript] Represent tir::builtin::ret() using python "return" (#16640)
new 6830334b2b [TIR] Enhance and fix tensorize schedule for some case (#16560)
new 55d8e8607b [Bugfix][TIR] Handle AttrStmt of upcoming tir.Var in ConvertSSA (#16682)
new 9bcbb89516 [DeviceAPI] Support "GetCurrentStream" (#16689)
new 2610c6780a [TIR] Support Vector Reinterpret Calls (#16673)
new e9777edc04 [Unity][TIR] Clear struct info when specializing PrimFunc (#16584)
new 2a9caa44b6 [Lint] Add check to prevent usage of #include <regex> (#16412)
new 2f9f44b37c [LLVM][RUNTIME] Add optional LLVM ORCJIT runtime executor (#15964)
new e853f50eb2 [Fix][Arith] Fix canonical simplification of LE (#16704)
new 1e0406942b [Transform] Remove R.Object parameters after LazyTransformParams (#16699)
new 03726e4e98 [Target] Automatically detect system triple when not specified by the user (#16513)
new dc60aedc70 [TIR] Improve well-formed check's handling of match buffer (#16655)
new 95dfa35513 [SVE] Add codegen support for scalable buffer accesses (#16696)
new ee0f43ea95 [RUNTIME] Ensure NDArray.CopyTo(Device) always sync (#16716)
new cb40470c3b [RUNTIME][METAL] Provide richer runtime when error happens (#16713)
new 2de4a8f4ba [TIR][CUDA] Add native FP8 support to codegen (#16548)
new 1d4631996e [Fix] Introduce TVM_DEBUG_WITH_ABI_CHANGE to warn ABI changes in debug mode (#16728)
new 5e36ae728e [Arith] Provide tighter ConstIntBounds for special cases (#16588)
new bbecefdbfa [Target][CUDA] Allow non-numeric arch as needed for latest gpu (#16736)
new 3cc3b0c31f [Arith][Fixup] Require feature flag for tighter inequality bounds (#16735)
new 8098f5377b [Cutlass] Add group gemm kernels (#16751)
new f22c85baf5 [Runtime] CUDA IPC Memory support and custom allreduce kernels (#16750)
new 603c36f4b0 [Unity][Parser] Check well-formedness in the parser (#16569)
new 28d6647d10 [CONTRIB] Add nm symbol dump (#16763)
new e722cbb667 [LLVM] Lack of DWARF type is not an error (#16748)
new aafb743647 [Hotfix] Revert driver API pass ordering that breaks MLC, mark failing test (#16770)
new 6c6ccb870b [RUNTIME][OPENCL] Bugfix for ciImage create with host ptr (#16768)
new e7eeb12824 [TIR][Driver] Use `BindTarget` to specify target for FP8 legalization (#16767)
new 711cb0c3a9 [IR] Default to empty attributes, instead of NULL (#16745)
new 86790aa304 [Fix] Fix build errors with VS2022 (#16790)
new 58ceeb2ece [Codegen, Cuda] Add overload for fp8x4 e5m2 <-> half4 conversion (#16787)
new aae89ab2cb [Relax] Implement operators to inspec DLTensor::strides and offset (#16721)
new 0d837b6be7 [SME] Add support for inserting processor state annotations (#16761)
new 955145d1cc [Target] Use LLVM target parser for determining Arm(R) A-Profile Architecture features (#16425)
new 962639ccd0 [Relax] Allow R.Prim('bool') in relax::If and assert_op (#16642)
new b7f07aaeac [Runtime] Add "TVM_DLL" to NVTX header (#16809)
new ff96ed2bc7 [Runtime] Introduce MSCCLPP with NCCL equivalent interface (#16804)
new 8d9729304f [Runtime][LLVM] Fix errors during loading of target tags (#16808)
new 1aa9622ec6 [Cmake] Allow using custom CCCL path for thrust (#16816)
new 5a3add0f84 [Codegen] Add check to disable invalid reinterpret (#16786)
new a225fa3685 [LLVM] Fix compilation failure due to minor change (#16812)
new cbd7fc0053 [KVCache] Introducing auxiliary data manager (#16824)
new 6f24da2ed9 [TIR] Ramp and Broadcast lanes fixed to int32 dtype (#16795)
new 15ace454b4 [SME] Target parser support for SME (#16794)
new c8b831d22a [Disco] Support setting workers' CPU affinity (#16807)
new 28a218978d [TIR] Fix segfaults from ordering of Let/Assert in MakePackedAPI (#16543)
new 24b74b00b7 [Meta-Schedule][OpenCL] Enable MS tuning for Android OpenCL (#16846)
new 713fcc6b29 [TVMScript] Produce empty DictAttrs when R.func_attrs is absent (#16844)
new b11b4e5223 [IR] Provide well-formed intermediate in ApplyPassToFunction (#16843)
new 3ff1dc0e82 [SVE] Support scalable vectors in LoopVectorizer (#16782)
new 8aaf229fad [VULKAN] Fix CLZ support for Vulkan (#16858)
new 8229a4265e [TVMScript] Add parser and printer support for e4m3/e5m2 fp8 (#16864)
new 9ab465c2ef [Codegen, CUDA] Add handling of fp8 broadcast / const (#16865)
new 62ee10bf83 [BugFix][Target] Added null check to fix segfault at ->defined() in cpu.cc DetectSystemTriple() (#16766)
new 74ab7a386b [OpenCL] Add OpenCL device for automatic target detection (#16854)
new 15b0c5ea39 [release] Update version to 0.16.0 on main branch
new 4653b72621 [release] Update version to 0.17.dev0 on main branch
new 8614b08827 [TIR] Make T.reinterpret nop when dtype is the same (#16879)
new 2073b221da [Relax] Stabilize relax pass mutation order (#16883)
new e7e19d3fc2 [SVE] Support splitting by vscale in `tir::split` and `te::split` (#16862)
new 4576459247 [RUNTIME][VULKAN] Support total_global_memory (#16890)
new 611fed80c6 [TVMScript] Optionally use `ruff format` instead of `black` (#16876)
new 54c247a038 [Target] Don't register AArch64 target tags without LLVM compiler support (#16897)
new e7fe0aefd3 [Bugfix] CudaDeviceAPI::GetAttr may check kExist when GPUs absent (#16903)
new 357881f310 [CMAKE] Misc improvment of Util (#16900)
new dfeba5f4cc [Upd] Fixed lld search in rocm (#16907)
new 8feec0e15c [SVE] Check for SVE target in VectorizeLoop (#16893)
new f199ee6829 [CMAKE] Make LOG_BEFORE_THROW explicit (#16914)
new 74b3c151f8 [SVE][TOPI] Add conv2d NHWC hybrid SVE schedule for `arm_cpu` (#16899)
new 5e5471c619 [TVMScript] Support `T.launch_thread` with i64 dtype (#16916)
new d52b6dcc9f [Fix] Fix SSA conversion for SizeVar retention (#16924)
new 6616cacf53 [Runtime] Allow offset to be specified in NDArray::CreateView (#16938)
new 7ba650ceaf [TIR] Enhance CLZ intrinsic support (#16952)
new f8974a143d [SVE] Add get_active_lane_mask builtin (#16965)
new 88dfd077da [LLVM] Stringref API deprecation fixes (#16968)
new 3e23225558 [TIR] Support narrow dtype for let binding (#16947)
new b1fcf42f97 [SVE] Add codegen support for `vscale_range()` function attribute (#16962)
new e267e96f0e [UnitTest] Use pytest's scope='session' for tvm.testing.parameter (#16930)
new 89667a8b9a [Cuda] Skip FreeDataSpace when CUDA driver is in inconsistent state (#16980)
new ec8caf03e4 [QoL][IR] Provide std::hash and std::equal_to for IR Variable types (#16909)
new 4e69f4b471 [Relax][Transform] Handle identical PrimFunc with distinct VDevice (#16959)
new f7f9e201d8 [SME] Introduce scalable fp32 dense schedule (#16921)
new cf0551ba7f [Runtime] Allow query of available device memory through DeviceAPI (#16994)
new fb1bf8bbde [SVE] Use only powers of two as possible vscale values (#17001)
new 1675de9c30 [TOPI][Testing] Enable conv2d NHWC fp16 topi testing for `arm_cpu` (#17007)
new bbf15c28c5 [USMP] add missing const specifier for global_const_workspace (#16999)
new ba852a2fc4 [Metal] Support metal device profiling (#17025)
new 85820b8199 Support multinomial_from_uniform dispatch (#17010)
new afba8b777b [TIR] Fix Shuffle rewrite (#17030)
new ec4bd164a3 [SVE] Add support for representing and creating buffer-level predicates (#16966)
new 1ac6afb63f [SME] Add scalable fp16->fp32 dense schedule (#16981)
new ef23e09c1a [SME][TOPI] Add conv2d NHWC SME fp32 schedule (#17003)
new 6a3a8bfbfd [Runtime] Use preferred host memory (pinned memory) in KV cache (#17036)
new e9a6615584 [TIR] Fix Bug in VectorizeLoop (#17039)
new f170a4722c [Runtime][ROCm] Enable ROCm host memory support (#17037)
new d485ce90cb [Runtime] Compatibility with dmlc::Stream API changes (#16998)
new 96da2b3db6 [CODEGEN] Vector-Codegen support for llvm-pure-intrin (#16985)
new 1a9cc6570a [FP8][Codegen] Add make_fp8 vector constructors (#17065)
new aa49ada941 [WebGPU] Translate `int8x4` into `u32` (#17071)
new 5eecf27c27 [Metal] Enable Debug Label (#17059)
new ffd5d7f332 [Arith][SVE] Add rewrite rules for indices split by scalable expressions (#17046)
new aaeb5c1662 [SME] Extract gemm block correctly when fused with bias (#17076)
new a7339443e4 [CMake] Show NVCC include directories in compile_commands.json (#17079)
new 4f57b767b6 [TVMScript][Relax] Preserve tir.SizeVar through TVMScript round-trip (#17083)
new c89c628159 [SME] Utilize predication in fp32 matmul and conv2d schedules (#17054)
new 21ec67144a [UnitTests] Use tvm.ir.assert_structural_equal whenever possible (#17092)
new 2603f20347 [TIR][RPC] Allow RPC calls to compiled PrimFuncs with no arguments (#17098)
new abf38c9aae [Dlight] Use 16x32 spatial x reduction thread extents in GEMV scheduling (#17082)
new 1009a7d42e [TVMScript] Better Type Annotation for TIR OP (#17107)
new bdf9498c25 [TIR][DLight] Enable SimdGroup op for Metal (#17112)
new dd26290309 [WebGPU] Add `tir.dp4a` (#17124)
new 7fd96cacbb [Hexagon] Add support for v75 (#17123)
new 03c90b9f43 [WebGPU] Implement `tir.dp4a` with WGSL built-in function `dot4I8Packed` (#16976)
new c866a9a2ea [TOPI] Add dense schedule for fp16 and fp32 using gemm (#17091)
new 8ce56bb8dc [Backend][ROCm] Fix error when building TVM with LLVM 19 (#17141)
new 0abbdba2e1 [Utils] Define line-length for "ruff format" (#17125)
new 45d6545244 [QoL][IR] Provide default constructor for NameSupply/GlobalVarSupply (#17135)
new b825c7467c [release] Update version to 0.17.0 on main branch
new b7acdaee37 [release] Update version to 0.18.dev0 on main branch
new 84205dda75 [Relax] Integrate cuDNN attention (#17157)
new 59ecf25fec Remove and replace deprecated `distutils.util.strtobool()` (#17185)
new 287f82bb63 [TIR][Analyzer] Simplify `x==x` expressions for all dtypes (#17158)
new f146ef7315 Pass to eliminate redundant branch and overcompute (#17170)
new 3d5a34a70a [Disco] Implement SocketSession (#17182)
new 7628e2dcfb [LLVM] Fix for getHostCPUFeatures API change (#17199)
new dcf08d3664 [TIR] Validate tir::Buffer axis_separators on construction (#17219)
new 2b2f918dcb [FFI][RUNTIME] Introduce runtime boxed types for int/float/bool (#16183)
new 7863278e0a [Relax] Implement R.ensure_zero_offset and update memory planning for R.view (#17145)
new d9ff139866 Revert "[FFI][RUNTIME] Introduce runtime boxed types for int/float/bool" (#17252)
new 5a43aac9b6 [ROCm] Support ROCm 6 (#17256)
new d2fbc0c210 [FFI] Re-introduce the boxed primitive values (#17257)
new a5b24e8524 [CODEGEN][OPENCL] Fix opencl codegen for few ops (#17273)
new a92ed4e18b [WINDOWS] Compiler options for non x86 targets (#17260)
new 88d926bf58 [Codegen] Emit `tir::Let` as var assignment explicitly (#17278)
new b11d46d2a9 [FFI][Runtime] Use TVMValue::v_int64 to represent boolean values (#17240)
new 96084cfd7e [ROCm] hipBLAS integration (#17290)
new 2c7222c0e0 [Docs] Introduce Relax API and move legacy part to standalone page (#17286)
new 0733a85fad [Rocm] Fix non-standard rocm path (#17295)
new d2edd027a6 [Codegen][WebGPU] LetNode common subexpr override (#17302)
new f1650a3410 [Disco] Add NVSHMEM support (#17317)
new 79e20b0715 [Target] Refine equality check on TargetKind instances (#17321)
new 62a9cffc31 [Relax] Update GlobalVar name in AttachGlobalSymbol (#17202)
new cd593f2989 [LLVM][RUNTIME] Fix RISC-V CodeModel propagation to ORCJIT runtime executor (#17347)
new faf0a27aaf [IR] Expose ReplaceGlobalVars utility in the Python API (#17361)
new 7da0b746c8 [FIX] fix bug when normalize iter with different lower bounds (#17360)
new 249b94a7e0 [TVMScript] Avoid segfault from invalid TVMScript (#17373)
new 2e8ebc0dc9 [Fix][LLVM] Fix getHostCPUFeatures LLVM version cutoff (#17403)
new d345de657e [CI] Update image tag to 20240917-153130-9f281758 (#17397)
new f41a48af23 [WASM] Implement concat embeddings (#17404)
new 45bf409cc0 [TIR, TVMScript] Add TIR - Triton integration (#17395)
new ee56c531d8 [BYOC][NNAPI] Add NNAPI backend for BYOC (#17385)
new 5b51232910 [TIR][NarrowDataType] Bufferload's index should not inherit bits constraint of value (#17411)
new fffffd7900 [CI][Windows] Workaround for error in FindLLVM (#17409)
new 0e740e663a [Runtime] Add property Module.is_device_module (#17407)
new bd112feb3f [CMake] Add NCCL/RCCL header directory to include path (#17422)
new 9cf6791408 [NVSHMEM] Enable nvshmem memory allocation (#17415)
new 1b3fb255a0 [TVMScript][TIR] Add source kernel intetration via call_kernel (#17434)
new f0d1a3bdb4 [TVMScript] Enable T.macro decorateing class method (#17435)
new a70fc852c4 [TIR] Add `is_vector` Method to DataType class and update usages across Codebase (#17443)
new a5b2f81f55 [release] Update version to 0.18.0 on main branch
new 183d24acde [release] Update version to 0.19.dev0 on main branch
new 08b3143cf3 [TIR][Schedule] Add annotate_buffer_access primitive (#17423)
new 639dbc839d [Device][OpenCL] add CL_EXEC_STATUS_ERROR_FOR_EVENTS_IN_WAIT_LIST to … (#17472)
new db845b2993 [TE][CreatePrimFunc] Fix loop carried dependency case with nested block levels (#17474)
new 4a17bbab0a [OPENCL][ADRENO] Introduce Qualcomm extension support (#17519)
new 7f6b5e7520 [FIX][topi.scatter_nd] fixed shape equality assert by using analyzer to prove equality (#17537)
new 7208bbdf76 [REFACTOR] Phase out VTA (#17542)
new e836146574 [CI] Upgrade CI image to `20241105-030952-3e386fd3` (#17451)
new c5f2fb0791 [LLVM][RUNTIME] Make ORCJIT LLVM executor the default one (#17538)
new 0a84a6fe81 [LLVM] Make compilable with LLVM-20 (#17547)
new 18b5fd13bc [Refactor] Phase out microTVM (#17554)
new 5d4e559e42 [Runtime][Dist] Implementation of KV cache transfer (#17557)
new 8239ebace4 [release] Update version to 0.19.0 on main branch
new 0a6005160f [release] Update version to 0.20.dev0 on main branch
new cb26f14571 [RUNTIME][OPENCL] Bugfix
new 1294790eb7 [RELAX][PASS] Convert layout pass and ops enhanced to support sub indexing (#17568)
new f6c3cae254 enforcement on loop partition control
new 8527e0a32a [ADRENO][WINDOWS] Windows build dependencies for Adreno target
new 5600d223e6 [KVCache] Add KV Cache for CPU Runtime (#17615)
new 3e3691f9f0 [Codegen, CUDA] Add FP8 Tensor Core Codegen (#16950)
new 9b52347fcb Handle vector width (VLEN) for RISCV arches
new 6fc583570a [RUNTIME][CLML] Profiling options enabled for CLML (BYOC via JSON Runtime)
new 5a2b77474c [CUDA] Remove htanh from unsupported math ops for CUDA 12.8 (#17639)
new 9aca745531 [PYTHON] Build cython by default (#17637)
new 86b9bd2bb1 [OPENCL][TEXTURE] Improved texture memory planning (#17571)
new f1c212acf5 [REFACTOR] Phase out relay python components (#17656)
new bb15a7a661 [REFACTOR] Phase out te.schedule python components (#17658)
new 1a1d827a76 [REFACTOR] Phase out relay c++ components (#17660)
new 7c0853c222 [REFACTOR] Phase out te.Schedule c++ components (#17662)
new afa7b27018 [Refactor] Phrase out python dependency `decorator` (#17661)
new 386820d214 [RELAX][BYOC] OpenCLML offload support for Relax (#17654)
new 62639fca1e Pick up vector length from 'zvlXXXb' (RVV) mattr for riscv (#17641)
new d56ab252f5 [REFACTOR] move build flow from C++ to Python (#17665)
new 33a150b90c [REFACTOR] Allow target dependent default tir pipeline dispatch in tir.build() (#17669)
new f5f4bfe40d [REFACTOR] Followup cleanup of relay phase out (#17681)
new 127474fa4c [REFACTOR] Cleanup legacy TE-based passes (#17685)
new 6e814680bb [Codegen] FP4 support (#17630)
new dba8ea81cc [Refactor] Remove legacy TE schedule tag (#17701)
new 1d18b2145d Fix typos in multiple files (#17703)
new 90208ab9b1 [CUDA] FP4 cast and reinterpret support (#17708)
new 4f49fd4ad3 [DataType] Rename FP8 dtypes to standard names (#17712)
new ce939a6a6f [Refactor] Introduce base Executable class and `tvm.compile` interface (#17710)
new a1daf617c8 Fix the get_target_compute_version for sm >= 100 (#17716)
new 59644a52c8 [FFI] Phase out ctypes fallback in favor of cython (#17714)
new 500e57b8ee [Refactor] Migrate build API to `tvm.compile` (#17718)
new 9a031d1136 [DataType] BF16 Support (#17670)
new 1ae078824c Fix typos in comments and strings (#17736)
new 9ab9e6f021 [IR] Compact Functor vtable (#17731)
new b9e3de99ca [BF16] Support ndarray.asnumpy() to bfloat16 tensor natively using ml_dtypes (#17739)
new 1bc60191d6 [Codegen][CUDA] Fix codegen of cast among vector bfloat16, fp8 and fp4 (#17741)
new e64d6af737 [Refactor] Clean up Relay references in the codebase (#17733)
new 8e98a0ed5e [Codegen] Support codegen for vectorized tir.ShuffleNode (#17748)
new 8e83c95671 [REFACTOR] Phase out StackVM (#17784)
new cf10068659 [REFACTOR][TIR] remove legacy tir::any (#17783)
new a2b8de6a94 [NFC] Fix `explict` typo (#17811)
new 002f0ab7fc [release] Update version to 0.20.0 on main branch
new 3d91ff73db [release] Update version to 0.21.dev0 on main branch
new f87bca8f5f [Install] Fix error during python/tvm installation (#17808)
new f4353fa576 [Relax][PyTorch] Add Logaddexp op support for exported program (#17803)
new 46f77f33ea [Triton] Support latest `triton.compile` interface (#17913)
new 9ef4c21ae2 [WebGPU][CodeGen] Override PrintVecElemLoad and Store for WebGPU (#17917)
new 7163e06b6c [REFACTOR] Introduce and modernize FFI system (#17920)
new e8f1a2c7a9 [Relax][PyTorch] Add div.Tensor_mode and trunc Op Support for Exported Program and FX graph (#17924)
new af9ab7bf32 [REFACTOR][FFI] Cleanup PackedFunc related redirection (#17923)
new 6526297c51 [REFACTOR][FFI] Cleanup container redirections (#17929)
new b1aa2a1334 [REFACTOR][FFI][RPC] Migrate RPC to use the latest FFI ABI (#17931)
new 558a34906e Add registion for the operator asin and acos in llvm (#17945)
new 422747e8fa [FFI][LLVM] Fix compilation errors with clang20 (#17954)
new 6bce20df56 [LLVM] Fix JIT unknown reloc issue for case of RISCV
new a7efbfb843 [LLVM][Codegen] Enable SVE/VLA for RISCV targets
new da7487a626 [FFI][REFACTOR] Update to distinguish as and cast (#17979)
new 84f2a8a162 Add registion for the operator asinh, acosh, atanh in llvm (#17969)
new a757e1f9f7 [Vulkan] Add TIR unary trigonometric/hyperbolic intrinsic definitions (#18005)
new 3396ccd13a [REFACTOR][FFI] Phase out legacy C API (#18010)
new 1817cb86ae [REFACTOR][PYTHON] Phase out tvm._ffi and Limited API support (#18020)
new bf2eb2e1e5 [REFACTOR][FFI] Cleanup PackedFunc redirections (#18022)
new e4643265f3 [Python] Fix library lookup path for pip installed packages (#18026)
new 505bf162fc [ARITH] Fix canonical simplify for LE with incorrect range assumptions (#18025)
new a491910c78 [CUDA] Fix thrust with latest FFI refactor (#18024)
new 71c2abe197 [Codegen] Resolve issue #17965 where the same model produces different outputs on the LLVM (CPU) and CUDA (GPU) backends (#17985)
new 8292919e05 [ARITH] Canonicalize mul-coefficient to rhs (#18031)
new 3acca66d78 [BugFix][CUDA] Fix: Update settings for rerun on Increase FloatImm precision when printing 64 bit values in CUDA codegen (#18035)
new 7b546afa21 [Dtype] Low-precision Blackwell Datatype Support (#18027)
new c7fb79d239 [Metal] Fix `GetFunction` of metal runtime (#18034)
new 5f14d0be6f [REFACTOR][FFI] Update symbol name for library module (#18042)
new 5197e523f4 [REFACTOR] Phase out the relax tuning_api (#18043)
new 6183707b40 [3rdparty] Phasing out FlashInfer AOT from 3rdparty (#18046)
new 2bef3872ff [Refactor] Rename `relax_vm` to `vm` (#18049)
new 2f18643fa2 [FFI] Enhance FFI Object exception safety during init (#18050)
new 99d7c5d0c6 [TIR] Phase out ProducerStore, ProducerRealize and Prefetch (#18057)
new b0e2fdd21a [TEST] Move temp files into tempdir (#18058)
new 02c9c832d7 [FFI][REFACTOR] Update registry to have complete meta-data (#18062)
new d934d60149 Add Python functor support for TIR expressions and statements (#18060)
new 72750b420a [TIR] Extend address_of to support Buffer objects (#18068)
new 0f34f41de8 [ARITH] Add IsBound method to ConstIntBoundAnalyzer (#18067)
new b42f81ea51 [REFACTOR] Phase out the RelaxExpr.checked_type in favor of struct_info (#18078)
new 4038f35ac0 [REFACTOR] Phase out LegacyReprPrinter and improve CommonSubExprElim (#18080)
new ee80b3538a [Script] Add support for merging block annotations (#18079)
new 5c1e7d25bb [SCRIPT] Bump Python minimum version to 3.9 and update AST compatibility (#18086)
new 970fd4764d [Script] Enhance alloc buffer handling in nested frames (#18088)
new 563d9c7718 [FFI] Provide Field Visit bridge so we can do gradual transition (#18091)
new dbdbde3aa5 [NVSHMEM] Extend CUDA backend to compile and link TIR modules with NVSHMEM (#18093)
new df3f0d70a4 [FFI][REFACTOR] Migrate attrs to use new reflection (#18095)
new 8e3f3bbf4d [REFACTOR] Transition VisitAttrs to new reflection mechanism in tir/ir_builder/meta_schedule (#18096)
new b64f61b032 [REFACTOR] Transition VisitAttrs to new reflection mechanism (#18098)
new 73196124ad [Runtime] CutensorMap support (#18097)
new a9604c2443 [REFACTOR] Formalize namespace for all objects (#18101)
new 65daddb2a4 fix: guard tensormap with cuda version check (#18107)
new 1c01e010e0 [REFACTOR][FFI] Phase out old VisitAttrs mechanism (#18106)
new e0a084a81b Add LLVM Legalization for tir.erf (#18104)
new 84936f9f92 [FFI] Cleanup visit_attrs attribute after refactor (#18112)
new 81963d0b20 [CMake] Refine C++/CUDA standard settings in CMakeLists.txt (#18113)
new be94a848d3 [FFI] Replace `__attribute__` with C++ standard attributes (#18114)
new 8313ebdb93 [release] Update version to 0.21.0 on main branch
new 6c6f02b182 [release] Update version to 0.22.dev0 on main branch
new 09174bc679 [Codegen] Update LLVM version requirement for `insertDeclare` (#18123)
new 30583187f9 [Refactor] Build cython with isolate environment (#18124)
new f4627f6c26 Phase out StackVM runtime support (#18125)
new 37daebdc95 Revert "[Refactor] Build cython with isolate environment" (#18127)
new c8dc5880bd [Target] Support CUDA device function calls (#18055)
new 4be9b52dd7 [MISC] Fix compilation warnings of unnecessary `std::move()` calls (#18130)
new 86dcf1a58e [REFACTOR] Migrate TVM_FFI_REGISTER_GLOBAL to new reflection style (#18142)
new 8e5e307eee [CodeGen][CUDA] Add sinhf CUDA Math API for CodeGen (#18144)
new 25ca4ec52c [TIR] Add `T.thread_return()` for early thread exit in CUDA kernels (#18134)
new fc7a8d796f [FFI][REFACTOR] Modularize refelection (#18147)
new a0dd2562f2 [FFI][REFACTOR] Phase out TVM_FFI_REGISTER_GLOBAL in favor of GlobalDef (#18148)
new d13301c9da [TIR] Decouple DeepEqual from StructuralEqual (#18151)
new a56ceacb33 [TIR] Fix trivial index map [] -> [0] (#18154)
new 533bfe3e52 [FFI][REFACTOR] Migrate StructuralEqual/Hash to new reflection (#18166)
new b303472a87 [REFACTOR][FFI] Phase out SEqualReduce/SHashReduce (#18172)
new fd543178e4 [FFI][REFACTOR] Cleanup to align to latest ffi (#18183)
new 9068524232 [FFI][REFACTOR] Hide StringObj/BytesObj into details (#18184)
new d1b9bf8238 [FFI] Introduce small string/bytes (#18185)
new 0572da9703 [FFI][REFACTOR] Migrate the Save/Load JSON to the new reflection (#18188)
new ffafaef783 [FFI][REFACTOR] Phase out getattr based attribute handling (#18189)
new 1935ed72fc [FFI] Phase out ObjectPath in favor of AccessPath (#18192)
new a0b216980b [REFACTOR] Update data type rewriter to enable recursive rewrite in Any (#18197)
new 3953f6cb79 [TIR] Fix host/device function check for build (#18199)
new 08e9196141 [FFI][REFACTOR] Move Downcast out of ffi for now (#18198)
new 3c64e427d3 [LLVM] Fixes up to the latest LLVM21 (#18204)
new 69d435f3ac [FFI][REFATOR] Cleanup entry function to redirect (#18205)
new 1b99943449 [CODEGEN][REFACTOR] tir.call_llvm_intrin to remove nargs (#18206)
new 4499ab0fad [FFI] Formalize ffi.Module (#18213)
new bd7bca8d56 [FFI][REFACTOR] Establish ffi.Module in python (#18214)
new 5581eab002 [FFI][REFACTOR] Establish Stream Context in ffi (#18216)
new b9adcb473a [FFI][REFACTOR] Cleanup API locations (#18218)
new 491e0672b7 [Fix] Resolve deadlock in PopenPoolExecutor and LocalBuilder (#18219)
new f4587566c3 [NVSHMEM] Fix compatibility with CUDA code without nvshmem use (#18222)
new 9861c35423 [FFI][REFACTOR] Establish tvm_ffi python module (#18226)
new 54e95ee3ed [LLVM][Fix] Do not emit debuginfo on vscale or other unknown types (#18232)
new 195fdc5d16 [Relax] Add Python function support and BasePyModule for PyTorch integration (#18229)
new 5b8dba4a27 [Fix] Update FlashInfer JIT header lookup (#18244)
new 8e4f18a559 [LLVM][MSWIN][CI] Fix LLVM module build with latest CI update (#18245)
new dec5f732b3 [Build] Migrate Python packaging to pyproject.toml with scikit-build-core (#18239)
new 0c13088237 [Python] Complete Python packaging with scikit-build-core (#18251)
new 4134e189d1 [FFI] fix two seemingly migration issue (#18258)
new 48565342e0 [FFI][ABI] Introduce weak rc support (#18259)
new 0a203d7424 [FFI] Construct NDArray.strides by default (#18272)
new 53925dfd23 [FFI][ABI] Append symbol prefix for ffi exported functions (#18273)
new f02f986e00 [FFI][REFACTOR][ABI] Rename NDArray to Tensor (#18275)
new ed8a5768ac [FFI][REFACTOR] Cleanup tvm_ffi python API and types (#18277)
new 6a0db4a7bf [LLVM][METASCHEDULE] Add RISCV V-extension v1.0 kernels to metaschedule (#18243)
new 1dedb7b325 [FFI][REFACTOR] Cleanup namespace (#18280)
new 1b90c5b48e [FFI] Relax default alignment and continguous requirement (#18282)
new f39bc543bd [Fix][Metal] Fix type for device array in Metal API (#18283)
new 5130a4ec65 [FFI][REFACTOR] Introduce UnsafeInit and enhance ObjectRef null safety (#18284)
new eb89e9c4c7 [Metal] Fix MetalModuleCreate (#18290)
new ba2ced89a3 [FFI][REFACTOR] Streamline Object Declare Macros (#18289)
new 6e63bc416b [FFI][ABI] Introduce generic stream exchange protocol (#18295)
new c01e7c468c [Fix] Add libxml2 dependency to fix Windows CI build failure (#18296)
new ac82b6202e [CUDA] Support NVTX in CUDA 13 (#18300)
new bfc47a0d77 Clear ext_lib_dll_names for macOS platform (#18304)
new 5d337793ab [FFI][ABI][REFACTOR] Enhance DLPack Exchange Speed and Behavior (#18306)
new 3200fd242c [FFI][REFACTOR] Update TVM_FFI_STATIC_INIT_BLOCK to fn style (#18312)
new daef9444f8 [REFACTOR][FFI] Split tvm-ffi into a separate repo (#18314)
new 4f4384dcc6 [TVMScript] Support continue and break in tvmscript (#17804)
new f7b51331b0 [TIR][CUDA] Preserve float precision in codegen with hexfloat output (#18320)
new 19138bdf18 [TIR] Add support for conditional expressions in TVMScript (#18323)
new 6462719207 [CMake][Web] Install `web/` directory in cmake for Python package (#18327)
new 73d7833282 Fix conflict parameter name promote_dtye in FP8ComputeLegalize (#18334)
new 97f3765df8 [FFI][ABI] Bump version ffi to latest (#18332)
new 3455804162 [TIR] Support sequence comparisons in TVMScript (#18341)
new 21c9fdc632 [FFI][ABI] Bump tvm-ffi version to reflect RC ABI Update (#18345)
new 5317c962f5 [Python] Add library lookup path for tvm installed as a pakcage (#18348)
new 15bb34c1e2 [FFI][ABI] Bump tvm-ffi to latest (#18349)
new de697228d8 [FFI][ABI] Bump tvm-ffi to latest (#18354)
new 8678b63450 [FFI] Bump tvm-ffi dependency (#18370)
new c41bbe89b6 Upgrade to CUTLASS 4.2.1 (#18372)
new 105aafe5a6 [Analyzer] Enhance ConstIntBoundAnalyzer and IntervalSet with modular set analysis (#18330)
new 01c8e1dd62 [TIR] Refactor division simplification in RewriteSimplifier (#18319)
new 9cbcaa49b0 [FFI] Bump tvm-ffi to 0.1.0rc2 (#18376)
new 15cb241a91 [release] Update version to 0.22.0 on main branch
new 54ccc70871 [release] Update version to 0.23.dev0 on main branch
new 206e138e2c fix the 8-bit vector loads/stores problem, which will solve the problem raised in the codegen test for cuda (#18398)
new 3fa603f01a Support integer types in exp TIR expression operator (#18390)
new c533901c33 [FFI] Bump tvm-ffi to latest (#18411)
new a4cd26f027 [TEST][CODEGEN] Fix the test scripts tries to tell numpy a dtype name that it cannot recognise (#18430)
new 2e24c5a4b9 [DataType] Update to use explicit Bool Type Aligning with DLPack (#18453)
new 2e57c69771 [TIR] Add step attribute to ForNode (Initial codes) (#18421)
new 2f29e164b3 [RELAX][PASS] Annotate Custom Scope layout pass for Adreno GPU (#17599)
new e59d1a204b [TIR]: Fix VerifyStream::Verify causes dereferencing an invalid pointer (#18479)
new 794d325b35 [TVMScript] Add block name suffix management for TIR macros (#18465)
new 0413378979 [TVMScript] Add test for TIR macro block name suffix handling (#18504)
new d780bdd16e [MISC] Fix compilation warnings (#18509)
new 6708dd696b [MISC] Remove unused TVMC configs (#18512)
new 3ee531fa77 [Pass] Add DumpIR pass instrument to save IR snapshots (#18511)
new 20afe51db1 [TIR] Fix tir.LowerIntrin check failed additional_info.size() == new_size (#18514)
new a47a67ea2f [Relax][PyTorch] Unify tests using shared tvm.testing.assert_allclose (#18522)
new 8780aeff1e [ARITH] Fix InternalError: Check failed: (eval_vec_) is false (#18536)
new d2cdd986d3 Revert "[ARITH] Fix InternalError: Check failed: (eval_vec_) is false" (#18542)
new 46b377b2fc [TIR][Schedule] Fix bug on bfloat16 conversion (#18556)
new b27aea2e74 [LLVM][Codegen] Avoid segfault when `arith::GetVScaleValues` returns empty vector (#18586)
new 11b6927a90 Fix ACOS precision issue for boundary values (x=±1.0) (#18582)
new e74c3536ab [BugFix][OpenCL] Guard QCOM perf hint behind USE_OPENCL_EXTN_QCOM to avoid undefined symbol on non-QCOM runtimes (#18589)
new efb34b62a7 [CUDA][FFI] Extend kernel launch config to support Programmatic Dependent Launch and cuLaunchCooperativeKernel (#18604)
new f3e674b0fd [CUDA] Fix cuModuleUnload crash during interpreter shutdown (#18624)
new d59cf09af1 [Compile] accelerate compilation speed using NVRTC (#18519)
new df88b01fa0 [ADRENO][TEXTURE] Texture based lowering (#18523)
new 7afe8c9e6f Put options before objects when compiling (#18656)
new aa463d3edd [FFI] bump to latest version (#18654)
new b10a416964 fix: MSVC pragma (#18674)
new 809b96c740 [NVRTC] Add NVSHMEM support to NVRTC compilation path (#18681)
new 4a9b9f246d [release] Update version to 0.23.0 on main branch
new 5ba9410443 [release] Update version to 0.24.dev0 on main branch
new 14d825190c [REFACTOR][TIR] Rename tir.Block to SBlock (#18689)
new e2e65e872e [BugFix][TIR] Fix incorrect optimization when lowering floordiv and f… (#18694)
new 720d9a9a06 [TIR] Further robustify floordiv/mod intrin lowering to prevent overflow (#18699)
new dcf536cd03 [LLVM] Fix insertDbgValueIntrinsic for Metal backend (#18706)
new c174c5514c [REFACTOR][TEST] Replace CompareBeforeAfter for pytest compact (#18711)
new e924135371 [REFACTOR][S-TIR] Initialize the s_tir module (#18712)
new 70981fedea [SPIRV] Fix forloop codegen in vulkan (#18715)
new b1f2116b6a [REFACTOR] Migrate old tir.ir_builder to tvmscript or builder (#18716)
new 4ba3f9f549 [REFACTOR][TEST] Migrate all codegen test to tvmscript (#18719)
new b632705c89 [REFACTOR][S-TIR] Lift transform passes to s_tir namespace (#18722)
new e902a8b0cd [REFACTOR][S-TIR] Migrate tir/schedule to s_tir (#18728)
new c3cf8b5d77 [REFACTOR][S-TIR] Migrate meta_schedule into s_tir namespace (#18735)
new fbf51877d9 [REFACTOR][S-TIR] Lift dlight into s_tir namespace (#18734)
new 35697cff76 [chore][TIR] reorganize src/tir/transforms to src/tir/transform (#18738)
new ff09fa1e3f fix: correct typo 'occuring' to 'occurring' (#18740)
new e7304d2469 fix: skip dsymutil for static tvm_runtime on Apple platforms (#18744)
new d7896f10ce fix: correct typos 'recieve' and 'occurence' (#18739)
new 478bca5cdb [REFACTOR][S-TIR] Move remaining data structures to s_tir (#18743)
new 70f30819e5 [CI] Remove i386 and Hexagon from CI pipeline (1) (#18737)
new 7ebe8ce8a9 [REFATOR][TIR] Phase out AllocConst (#18761)
new eb50e22dce [chore] Cleanup stale dependencies (#18760)
new b51ca10cb4 [REFACTOR] Remove picojson dependency, replace with tvm::ffi::json API (#18759)
new a8d699bad0 [REFACTOR][TIR] Phaseout BufferRealize (#18763)
new 9517481727 [REFACTOR][S-TIR] Migrate more transform to s_tir (#18771)
new e61946e225 [LLVM][Codegen] Cast NaN to bool gives true (#18772)
new fac9acef8c [REFACTOR][S-TIR] More migrations to s-tir (#18776)
new d1c1ba90a3 [REFACTOR] Phase out dmlc dep (#18779)
new 843419a515 [chore] cleanup unsed legacy backtrac code in logging (#18781)
new c704cc9a23 [REFACTOR][RUNTIME] Transition metadata into ffi (#18784)
new a1556a2595 [REFACTOR][TARGET] Phase out legacy target string in favor of json (#18785)
new 58d5a74897 [REFACTOR][TARGET] Cleanup target config (#18788)
new a735bd3d94 [REFACTOR][TARGET] Further cleanup target python api (#18793)
new 6640a0c961 [DOC] Unify GitHub naming (#18794)
new 9479ff6667 [DOC] Unify CUDA naming (#18797)
new 4904c0a975 [DOC] Fix docstring, unify CMake, nvidia-docker deprecation (#18799)
new 7b852943a7 [FFI] Bring up latest tvm-ffi (#18802)
new 6e4463c88b [REFACTOR] Migrate CHECK macros to tvm-ffi ones (#18803)
new b2a593514f [REFACTOR][TEST] Remove unused te imports from test files (#18804)
new 8462ca398a [REFACTOR][TEST] Migrate tir-transform tests from TE to TVMScript (#18805)
new b030b0b995 [LINT] Modernize lint to use pre-commit hooks (#18807)
new c7f5e7f3c9 [CI] Add GitHub Actions lint workflow (#18809)
new e3a4203e20 [DRAFT][DO NOT MERGE] Bump tvm-ffi to v0.1.9 (#18801)
new 72e8cd4a97 [REFACTOR][LINT] Modernize ruff config (#18810)
new 892ce32fee [Refactor][Metal] Update ICHECK to TVM_FFI_ICHECK in Metal runtime (#18811)
new 901bf81a6c [REFACTOR][RUNTIME] Phase out legacy contrib runtime backends (#18813)
new 66796ccf45 [REFACTOR][S-TIR] Lift STIR-only attributes out of tir::attr namespace (#18816)
new e020066d9f [REFACTOR][METAL] Update CHECK_LE to TVM_FFI_ICHECK_LE in Metal runtime (#18819)
new de7022cf33 [TARGET] Specify correct `mcpu` for Metal target tags (#18822)
new f852c8c718 [LLVM] Fix build failures when building with llvm>=22 (#18818)
new 6200ad5163 fix: replace 6 bare except clauses with except Exception (#18821)
new 7dd5be2842 [REFACTOR][NODE] Remove node redirect headers (#18829)
new 32c1dee760 [ROCm] Fix some ROCm codegen bugs (#15518)
new d7eaa6610e [IR][TIR] Remove body from AssertStmt (#18832)
new 3512635b01 [LINT][PYTHON] Modernize annotations with ruff UP rules (#18830)
new 0d9932363f [REFACTOR] Further cleanup node redirections (#18844)
new c1cae9826b [REFACTOR] Remove unused mscclpp contrib module (#18852)
new 0f76326bf5 [TIR][FEAT] Require DeclBuffer before use in verify_well_formed (#18843)
new 2ce1b57383 [LLVM] Bump minimum LLVM version to 15 (#18853)
new 7b4a003c56 [REFACTOR][CONTRIB] Remove MSC contrib module (#18845)
new dcf5e26b1d [TVMScript] Fix PEP 563 closure variable resolution (#18856)
new a56f687fba fix: Complete ICHECK update across codebase (#18858)
new e5ccc62cf8 [TIR][Refactor] Enhance error reporting with structured AssertStmt and TVMFFIABIBuilder (#18857)
new a801dce8ff [REFACTOR][TIR] Cleanup AttrStmt attributes (#18862)
new 15c29f60a5 [REFACTOR][TIR] Introduce AllocBuffer and phase out Allocate+DeclBuffer (#18865)
new 6f358d305f [TIR] Add VisitBufferDef/VisitBufferUse to base StmtVisitor/StmtMutator (#18873)
new eafe8d688b [REFACTOR][TIR] Rename LetStmt to Bind and flatten to sequential semantics (#18874)
new 11333f9dc1 [REFACTOR][TIR] Remove body from AllocBuffer and DeclBuffer (#18876)
new ee79911630 [TARGET] Fix round-trip reconstruction of targets with canonicalizer-generated `feature.*` attrs (#18883)
new ac9dab1639 [Metal] Batched command dispatch and staging buffer pool (#18877)
new 175006182e [TIR][REFACTOR] Revamp Common Subexpression Elimination (#18886)
new 7533b4fce9 [TVMScript] Normalize T.Bind to T.bind for statement builder convention (#18889)
new 62ce227f2f [TIR] Reject non-floating inputs for trig unary ops (#18879)
new 6f5013840e [TVMScript] Remove T.Bind backward-compat alias (#18891)
new a3e410f1e9 [FIX][LLVM] Use isCPUStringValid for mcpu validation instead of enumerating processor descriptions (#18884)
new 9abe91a011 [Target][LLVM] Fix -mcpu validation compatibility across LLVM versions (#18909)
new be34fbf3cb [Refactor] Bring up tirx namespace (#18913)
new 63909835f9 [Vulkan] Avoid explicit layout decoration on non-interface allocations (#18914)
new 50638069ae [DOC] Fix inconsistent code comments (#18939)
new 765475ebbf [FFI] Bump tvm-ffi to 63224e3 and fix regressions (#18938)
new 9b76ef0a9c [WebGPU] Reserve additional keywords to avoid WGSL identifier collisions (#18960)
new 17bb4182df [Fix] Replace str(target.kind) with target.kind.name for Target objects (#18959)
new 82f5c29f9e Bump tvm-ffi to 1fed0a (#18967)
new 3ac73e866c [WebGPU] Add gating logic for subgroup shuffle primitives (#18823)
new 7546fa33d2 [BugFix][ONNX] Fix Round op to use ties-to-even (#19367)
new ebfbd42318 [Docs] Add API reference documentation for tvm.script module (#19366)
new fcd0bc2101 [BugFix] Align `tir.round` to ties-to-even across all backends (#19368)
new 29eda48b5a [Docs] Add Python API reference for tvm submodule docs (#19379)
new 78d1e5ebad [BugFix][TIRx] Fix VerifyMemory crash for PrimFuncs without target attribute (#19382)
new d611bd195a [BugFix][TIRx] Fix bad-optional-access in BF16/FP8 legalize passes for target-less PrimFuncs (#19383)
new def23faf31 [Docs] Add tvm.s_tir.tensor_intrin API reference and remove empty legacy tvm/tir directory (#19386)
new d3651719d9 [Docs] Fix outdated source install and API reference docs (#19409)
new 8272596bbc fix: use `is None` instead of `== None` in test files (PEP 8 E711) (#19393)
new 3383e8666e [Backend][Relax] Add NPU BYOC backend example (#19425)
new f2b6038c46 [BugFix][LLVM] Fix `insertDeclare` API mismatch for ROCm-bundled LLVM 20 (#19390)
new 9d28739ccd [FIX] Skip metal target tag registration for unsupported LLVM CPUs (#19427)
new 467a4803ea [ARITH] Expose allow_override parameter in Python Analyzer.bind() (#19417)
new 7ea749ada0 [REFACTOR] Phase out include/tvm/runtime/module.h (#19441)
new cf882cb4d8 [REFACTOR] Remove tvm.runtime.packed_func and container shims; route via tvm_ffi (#19442)
new f08031fc21 [REFACTOR] Remove runtime/object.py shim and route Object via tvm_ffi (#19440)
new 2818bffcc7 [CMAKE][REFACTOR] Split libtvm.so into libtvm_runtime.so and libtvm_compiler.so (#19444)
new bb3aa190ae [REFACTOR] Isolate backend module creation via ffi.Module.create.<kind> registry (#19447)
new ae09915216 [TIR] Update symbolic index term order in loop fusion (#18406)
new 82fb857866 [REFACTOR][CODEGEN] Phase out tvm_global_barrier_state and tvm_prepare_global_barrier (#19454)
new 8914e69ac4 [REFACTOR] Phase out unreachable contrib/rust_extension.cc (#19458)
new dfaec8f68d [REFACTOR] Move source_utils.h into runtime/opencl (#19456)
new ded7021fe0 [REFACTOR][NODE] Migrate ReprPrinter to tvm-ffi __ffi_repr__ mechanism (#19461)
new fa4b84078e [REFACTOR] Phase out src/support/ffi_testing.cc (#19459)
new 2668eff7db [REFACTOR][S-TIR] Minimize src/support/ by relocating s_tir-private headers (#19460)
new 02199a29a4 [REFACTOR][RUNTIME] Macro cleanup — TVM_DLL alignment, [[maybe_unused]], logging.h legacy macros (#19457)
new 02eabd5325 [REFACTOR][RUNTIME] Phase out profiling.h heavy types, rename to timer.h (#19455)
new 59bfe42011 [REFACTOR][IR] Migrate include/tvm/node into include/tvm/ir (#19463)
new 3238370b02 [REFACTOR][RUNTIME] Phase out include/tvm/runtime/threading_backend.h (#19469)
new 483ad95a97 [REFACTOR][RUNTIME] Phase out include/tvm/runtime/builtin_fp16.h (#19472)
new 325ede1536 [REFACTOR][RUNTIME][CODEGEN] Backend specific target and runtime to enable cross-compile fallback (#19465)
new 671d82d1b9 [REFACTOR][IR] Move tvm/support/with.h → tvm/ir/with_context.h (#19474)
new 6dcb7d0754 [REFACTOR][RUNTIME] Phase out include/tvm/runtime/object.h (#19476)
new a03309ebd5 [REFACTOR][SCRIPT] TVMScript dialect-friendly refactor: per-dialect restructure + dialect registry (#19479)
new 565bf721bf [REFACTOR] Delete src/support/libinfo.cc; replace with runtime FFI-registry env query (#19477)
new ead507b6a9 [FFI][ABI] Bump tvm-ffi to 0.1.11rc2 (#19484)
new 03f31dfdc5 [REFACTOR][FFI] Cleanup ffi indirections in tvm headers + switch logging.h to ffi/error.h where only ICHECK/THROW are used (#19483)
new 90c54760bd [Metal] Include logging headers for metal (#19493)
new 92d37136b0 [release] Update version to 0.24.0 on main branch
new c7adf9e0c1 [release] Update version to 0.25.dev0 on main branch
new 2339fbc216 [BUGFIX][TIR] Skip bool-typed expressions in CSE (#19502)
new 627d202b8f [REFACTOR][IR] Remove dead AttrFunctor template (#19528)
new 660c8b3492 [TIR] Add cooperative_tensor builtins and metal.cooperative_tensor storage scope (#19423)
new 5a967ad3ce [Fix][CI]: remove astral-sh/setup-uv from lint workflow (#19554)
new bcb95693ff [TIRx] Bringup TIRx Infrastructure (#19581)
new 754c9bee9f [BugFix][Target][LLVM] Use libm for asin/acos instead of buggy inline Taylor (#19567)
new 8c5966a113 [RFC][CodeGen][CUDA]: Gate fast math intrinsic lowering behind target option (#19565)
new 014b3e4af7 [TVMScript] Handle undefined functions when dumping IRModule (#19583)
new 529ca73e1d [BugFix][Target][LLVM] Route sinh/cosh/atan/asinh/erf through libm extern (#19568)
new 0039fb7d80 [BUILD] Modularize device runtime into per-backend DSOs (#19594)
new 69d0373ab2 [CodeGen][CUDA] Move fast math intrinsic lowering option to PassContext (#19596)
new e2810a9ab8 [IR] Add annotations to Call nodes (#19597)
new 3e32b2586c [REFACTOR][RELAX] Fold CalleeCollector into relax DeadCodeElimination (#19603)
new e297d50d31 Fix PytestUnknownMarkWarning: Unknown pytest.mark.adreno_clml (#19602)
new bf3dd0d908 [REFACTOR][IR] Cleanup attrs.h: drop NullValue, AttrsNodeReflAdapter, legacy BaseAttrsNode methods (#19607)
new fcbc281b66 [REFACTOR] Move src/ir/script_printer.cc to src/script/printer/ (#19611)
new 7ccbdb46ac [REFACTOR][IR] Phase out src/ir/structural_{hash,equal}.cc to tvm-ffi (#19613)
new d76e786ec5 [REFACTOR][IR] Inline ApplyPassToFunction into relax decompose_ops, delete the util (#19612)
new 3977eb5153 [REFACTOR][TIR][ARITH] Phase out ControlFlowGraph, NarrowPredicateExpression, and rename Simplify to StmtSimplify (#19604)
new 20f91ea8d7 [REFACTOR][IR] Phase out class Integer and class Bool in Attrs and PassConfig (#19614)
new 71c348d49c [CMAKE][RUNTIME] Link tvm_rpc with all backend runtime libraries (#19617)
new 216dafeea0 [REFACTOR][IR] attrs.h follow-up cleanup: drop legacy vtable / rename / phase out AttrFieldInfo (#19615)
new b425d266e1 [REFACTOR][TIR] Tie AnnotateDeviceRegions/SplitHostDevice/LowerDeviceKernelLaunch together (#19605)
new 1277a15c46 [IR] Rename Call annotations to attrs (#19618)
new f533c59622 [REFACTOR][RUNTIME] Phase out tvm::runtime::regex_match (#19620)
new 59f12d20aa [REFACTOR][RUNTIME] Relocate nvtx.h to tvm/support/cuda and make it header-only (#19621)
new 689eb0a73d [REFACTOR][PYTHON] Lift compiler/CLI/process modules from tvm.contrib to tvm.support (#19624)
new 08923e410b [REFACTOR][IR][FFI] Bump tvm-ffi (+ SEqHashDef migration) and phase out tvm/ir/repr.h (#19627)
new d788f8e3be [REFACTOR][IR] Inline ReplaceGlobalVars into AttachGlobalSymbol (#19625)
new d870b9d4d6 [BugFix][Vulkan][CodeGen] Change OpControlBarrier to AcquireRelease (#19619)
new ad04d10d16 [REFACTOR][RUNTIME] Structural reorganization: locality moves for thread_map, texture, minrpc, disco, contrib (#19628)
new 4791dbe41d [REFACTOR][SCRIPT] tvmscript streamline: lift printer.h, restore one-way dep, migrate dialect config to extra_config (#19631)
new dad7c4bc8f [REFACTOR][ARITH] Phase out arith/scalable_expression; arith no longer proves over scalable vectors (#19638)
new 36f889c1de [REFACTOR][IR] Delete class Bool and class Integer boxed-type wrappers (#19636)
new 17485f75a0 [Relax][IR] Skip in-place multiply when two operands are views of the same tensor (#19644)
new 4ad2eadca2 [REFACTOR][PYTHON] Revisit lifted support modules from tvm.contrib (#19653)
new 7ed3ead8ab [CI] Add cibw-based wheel publishing to PyPI (#19656)
new 1d50f30974 [TIRx] Post-bringup op-dispatch / codegen / TVMScript follow-ups (#19657)
new 6b99ade8b6 [CI] Wheel publishing follow-ups (#19659)
new f31444752d [REFACTOR][TIRX] Consolidate split host device stages (#19663)
new 51675451e7 [FFI][IR] Route JSON serialization through tvm-ffi (#19662)
new 7bc129b4e7 [CI] Derive the version from Git tags via setuptools_scm (#19665)
new 17fa7e81e9 [CI] Reformat the macOS repair-wheel-command as a multiline script (#19664)
new b214e1532d [FFI][REFACTOR] Direct structural APIs to tvm-ffi (#19661)
new 52bfb6c3d9 [Arith] Memoize IntervalSet variable relaxation to avoid exponential blowup (#19670)
new c221572e31 [Arith] Gate canonical-simplify LT Case 2 on extra scale == +1 (#19669)
new 9f16ae0879 [TIRx] Update scoped ops and CUDA launch bounds (#19677)
new 119f5f617c [Bump] tvm-ffi to 59da4c0 (#19681)
new 49ab07305f [Arith] Make Analyzer a tvm-ffi Object (#19675)
new 866a4e4fb3 [CI] Target apache-tvm for PyPI wheel publishing (#19686)
new ea607737fe [Python] Bump apache-tvm-ffi floor to >=0.1.12 (#19710)
new 30c6226382 [Tests] Skip test modules cleanly when optional deps are missing (#19704)
new 494e584722 [Codegen][LLVM] Accept splat form in VLA broadcast test (#19716)
new feba3bfc77 [REFACTOR][PYTHON] Slim tvm.libinfo to info-only helpers (#19719)
new 5b6d973dc9 [Codegen][NVPTX] Skip runtime execution in Vulkan codegen tests (#19717)
new f427a6a71f [REFACTOR][PYTHON] Remove tvm.ffi shim; import tvm_ffi directly (#19721)
new 211b4b6ba1 [REFACTOR][IR] Phase out diagnostic.h for visit-context-aware pass errors (#19722)
new a6822b9745 [Python] Refactor pyproject.toml dependencies (#19723)
new 0e8962f7e0 [TIRx] Preserve Triton call_kernel compile options (#19728)
new 0a69d8d537 [PYTHON] Autoload backends; simplify library loading; remove TVMError for native errors (#19727)
new 3826f6b9d0 [Script][Tests] Fix dialect redirect module re-execution and stray category-less tirx.intrin_test op (#19731)
new e849de33c8 [TIRx] Use canonical PTX async script API in s_tir test (#19739)
new 6d1765a6f2 [Tests] Fix flaky popen pool executor test (#19746)
new fdf31a718b [Runtime][Disco] Fix session attribute storage, NVSHMEM build, and test gating (#19736)
new f3e6499aec [Codegen][LLVM][Tests] Gate +v9a vscale_range expectation on LLVM version (#19744)
new 53f935f394 [Tests][LLVM] Gate stepvector intrinsic rename on LLVM 20 (#19745)
new 961f4f782f [S-TIR][Tests] Mark test_cp_async_in_if_then_else as xfail (#19751)
new d4eea658b3 [TIRX][Tests] Fix LLVM version gate for vectorized lround (#19753)
new c1acb6c253 [S-TIR][CUDA] Fix legacy predicated cp.async zero fill (#19741)
new a60343e82e [Tests][AArch64] Make SVE codegen assertions robust across LLVM versions (#19752)
new e9dc1338b4 [TIRx] Post-bringup follow-ups: op-dispatch, namespaces, launch bounds, gemm-async, backend reorg (#19757)
new d029f7b196 [REFACTOR][VM] Move CUDA graph VM builtin back under VM runtime (#19758)
new 62d22a6c1e [REFACTOR][DataType] Phase out target custom datatype support (#19760)
new 9363b07b3a [REFACTOR][TARGET] Cleanup backend target registration (#19759)
new 763b1cee35 [REFACTOR][CUDA] Phase out l2 cache flush preproc test (#19768)
new 7a209adacf [CMAKE] Upgrade TVM build baseline to C++20 (#19734)
new e84fc9d001 [REFACTOR][CUDA] Phase out cuda_common.h (#19770)
new 3ad8a681fd [REFACTOR][PYTHON] Consolidate backend autoload infra (#19769)
new 7e4e4eb9d4 [REFACTOR][IR] Cleanup IR naming utilities (#19781)
new 28527aa080 [CUDA] Narrow the cuda extra from cuda-python to cuda-bindings (#19784)
new 6c5315fb3a [Tests] Modernize test gating (#19777)
new 9bb23850e4 [TIRX][CUDA] Framework support for FA4, CLC intrinsics, and nvfp4 tcgen05 GEMM (#19785)
new e8a7625779 [Tests] Replace remaining requires_* helpers with standard pytest (#19787)
new 489c1bdc6f [TIRx][RISC-V] Use scalable RVV loops for fixed vectorize (#19776)
new a3c4d44148 [Docs] Modernize test-gating documentation (#19788)
new 94283a5de1 [REFACTOR] Phase out unused queue and rang license entries (#19794)
new b0ae3d4cac [REFACTOR][HEXAGON] Phase out Hexagon app and test wrappers (#19796)
new e6d264e2d8 [CI] Pin GitHub Actions to SHA for ASF INFRA compliance (#19793)
new efaf4c1dc4 [REFACTOR][IR] Simplify CallingConv attribute access (#19799)
new 13accdb04b [CI] Remove Jenkins PR linter step (#19798)
new bc55f028b0 [Tests][Refactor] Remove unused testing helpers (#19800)
new 62c0e15eb3 [REFACTOR][TIRX] Add IntImm common scalar ctor and streamline MakeConst (#19797)
new e4ff5da69a [Tests] Migrate tvm.testing.parameters() to pytest.mark.parametrize (#19803)
new 45c0ce6c89 [Tests] Remove the now-unused tvm.testing.parameters() helper (#19807)
new b6fa75c6f6 [Tests] Drop tautological env-probe implication tests (#19811)
new 9528652613 [FIX][TIRX] Fix dangling Op static reference warning (#19806)
new a8f34a4606 [BUILD] Hide static linked library symbols in shared libs (#19817)
new 392f69f181 [Tests] Inline thin gating helpers in the pytest plugin and tvm.testing.env (#19819)
new 6424bb26c0 [ARITH] Add optional Z3-backed proving to Analyzer (#19667)
new 3954aee1f1 [Tests] Migrate off tvm.testing.parametrize_targets to native pytest (#19826)
new 32f5847238 [FFI][ABI] Bump tvm-ffi to latest (#19831)
new 4bf5ec51f4 [Arith] Let IRMutatorWithAnalyzer take a const Analyzer& (#19829)
new fd5ccbab3e [Tests] Remove dead helpers and unused probes from tvm.testing (#19821)
new c4483b51eb [Arith] Restrict floormod coefficient reduction to keep DetectIterMapstable (#19832)
new 67f680fd3b [Arith] Add Analyzer::Clone for deep-copying analyzer state (#19836)
new e574850f58 [BUILD] Bump tvm-ffi after RuntimeTypeIndex optimization (#19834)
new 2dc3a93ff4 [TIRx] Phase out flat device-intrinsic op aliases (#19838)
new 9ae0b0ed85 [BUILD] Sync fallback version strings to 0.26 dev cycle (#19845)
new 408012cf54 [REFACTOR][IR] Unify StructInfo and Type (#19853)
new e4700850e8 [Docs] Add TIRx documentation section (#19855)
new f5eb0a8754 [Metal] Enable Metal 4 shader compilation (#19595)
new d1faf7d340 [REFACTOR][RELAX] Phase out Relax PrimType (#19858)
new c80e682294 [REFACTOR][IR] Phase out Downcast usages (#19857)
new 01f9d2fbe3 [Docs][CI] Switch docs theme and bump images to 20260619-214849-4174cdf5 (#19828)
new 0b3ce08936 [REFACTOR][IR] Unify PrimExpr type mechanism to PrimType instead of DataType (#19875)
new d00ae3fc67 [REFACTOR][IR] Clean up PrimType follow-ups (#19884)
new 1f3804a937 [CI][CMAKE] Install CUDA driver stub for libtvm_runtime_cuda (#19886)
new f8f7c41ada [ARITH] Use IntImm in canonical scalar hot paths (#19885)
new dba6356e2c [REFACTOR][RELAX] Rename Relax base type to AnyType (#19889)
new 62da11d900 [TIRx] Replace vars in buffer strides and elem_offset (#19871)
new ac151e5661 [TIRx][LLVM] Support scalable Ramp lowering (#19866)
new e42b4b2738 [REFACTOR][Relax] Phase out PrimValue and Relax expression wrappers (#19891)
new dafe7550e7 [TIRx] Bundle CUDA tile primitive and op dispatch updates (#19896)
new 7d716f49ab [FFI] Bump tvm-ffi to latest June 28 (#19903)
new ff9c6b4b64 [Target][RISC-V] Use riscv_cpu device key for RISC-V target tags (#19915)
new 956c4276ed [TVMScript] Render invisible paths in structural diagnostics (#19916)
new 13f1c44700 [TIRx] Add a dedicated boolean buffer lowering pass (#19873)
new 56af907db4 [REFACTOR][IR] Unify PrimExpr with Expr typed view (#19910)
new ae6b3d41dd [TIRX] Remove SizeVar in favor of contextual constraints (#19930)
new f5ee537d25 [TIRx] Generalize expression functor signatures (#19931)
new 35044ea99d [TIR] Construct proven scalar integer constants directly (#19934)
new 90826a75f3 [IR][Relax] Include expression types in structural identity (#19933)
new c336d91a0e [FFI] Use thread-safe packed function initialization (#19939)
new af5d0e4967 [TEST] Serialize local GPU execution under pytest-xdist (#19942)
new 461105e056 [REFACTOR][SCRIPT] Keep dependent shape recursion in docsifier (#19940)
new 6e38c24097 Refactor Tensor arithmetic dispatch away from tirx.generic (#19943)
new ff1b0afcef [TIRx] Phase out duplicate Var type_annotation (#19944)
new 610946b81e [Cleanup] Remove macOS Clang warnings (#19954)
new 437db4496d [ARITH][TIR] Track positive loop extents in analyzer visitors (#19927)
new de3e559075 [CI] Repair Python test cleanup regressions (#19955)
new 67adde7e3e [FFI] Bump tvm-ffi for stable Optional layout (#19956)
new 71e4993572 [ARITH] Scope interval constraints to mapped variables (#19963)
new 0b49be2dcf [TIRx] Reuse pass-through input names for inverse index map vars (#19906)
new 01fcd82c85 [Metal] Let compile callback declare payload format via (payload, fmt) (#19924)
new 814b1ae539 [Fix][Python] Use standard scikit-build directory (#19990)
new eeb2da380f [Arith] Fix const-int-bound modular-set tightening for Mod/FloorMod (#19978)
new 2add18805e [CI] Bump CI at the Ubuntu 24.04 images and re-enable USE_Z3 (#19911)
new 07ce17cc77 [Tests][TIRx] Localize hardware test gates (#19985)
new 44a484421f [RUNTIME][PYTHON] Add explicit Target device conversion (#20005)
new 251c483557 [IR][Relax][TIRx] Unify Var identity (#20004)
new 01c4107de4 [Tests] Reduce runtime of slow Python tests (#20006)
new bd7871f330 [REFACTOR][IR] Use CamelCase Var copy helpers (#20008)
new 9c1ced5971 [REFACTOR] Remove redundant defensive code guaranteed by IR invariants (#20011)
new 32e7862d2b [REFACTOR][TIR] Phase out redundant TIRx attr names (#20017)
new 4eaf372f9f [IR] Rename Var name_hint field to name (#20016)
new 856d9d11fa [TIRx] Introduce first-class Return statement (#20018)
new 9501cd43d3 [REFACTOR][TIR] Remove buffer type and axis separators (#20019)
new 983ae29a2d [REFACTOR][TIRx] Keep AttrStmt node values unboxed (#20030)
new 559ab82bd9 [CI] Bump tvm-ffi with compatible Python wrappers (#20032)
new 539b261863 [Vulkan] Fix SPIR-V 1.4+ entry-point interfaces (#20028)
new a68c882acd [TIRx] Improve BufferStore cast warning context (#20038)
new 594b570952 [CI] Verify packed uint1 tvm-ffi revision (#20041)
new c621ed02cd [Fix][TIRx] Ignore statement spans in structural identity (#20043)
new 739c6c6eb7 [Fix][LLVM] Keep packed init callbacks local on Mach-O (#20052)
new fd3e6e9f3b [Fix][TIRx] Handle vector access pointer addresses in C codegen (#20058)
new b88510818c [FIX][TIRx] Use cluster arrivals for remote mbarrier views (#20074)
new 388e6c5ad5 [TVMSCRIPT][TIRx] Preserve parser source spans in IR (#20073)
new de25caf3ed [FIX][TIRx] Make TilePrimitiveCall serializable (#20071)
new e1e9087e6a [FIX][TIRx] Preserve pointer expression types (#20070)
new 7e4eb3be38 [FIX][TIRx] Remap buffers consistently in ConvertSSA (#20069)
new f3d1ae7876 [FIX][TIRx][CUDA] Fix tcgen05 register fragment layouts (#20068)
new 7cb7f2f02f [FIX][TIRx] Constant-fold copy slice extents (#20067)
new bca4895528 [FEATURE][TIRx][CUDA] Support TMEM datapath B (#20075)
new bec8d1b560 [TIRX] Represent buffers as typed variables (#20079)
new 4ec8f6d7dc [TIRx] tcgen05 dispatch paths, buffer dim-surgery views, FlashMLA lowering, and typed-buffer migration fixes (#20080)
new 3da6b47bc8 [TIRx] Flatten cuda/trn backend operator folder (#20081)
new b3334b0b3d [FFI] Bump tvm-ffi to latest Aug 3 (#20083)
new 7d7c55ee44 [BUILD] Migrate the Z3 dependency to mlc-z3-static (#20084)
new ee6443c9f4 [FIX][TIRx] Use physical order for Buffer.local views (#20076)
new e1f6cd35e4 feat(lower-tirx): align NVIDIA IKET profiling with the official ABI (#20085)
new f0b6b16215 [FFI] Bump tvm-ffi to 0.1.13.post2 (#20088)
new 5d21bff58a tirx: represent buffer parameters with BufferType (#20086)
new 67c532ee0c [Fix][Arith] Isolate Z3 contexts and make memoization deterministic (#20097)
new ebb353e02d [Fix][TIRx] Fix MSVC build of IndexDataTypeNormalizer (#20098)
new 700c9a3b1b [Python] Bump apache-tvm-ffi floor to >=0.1.13.post2 (#20094)
new 51c083ea1a [FIX][TIRx] Remap typed buffer expressions during specialization (#20090)
new 67c08ce71a [FIX][CUDA] Select NVRTC architecture for output format (#20100)
new a046da47ad [TIRx][CUDA] Add a table-driven PTX dialect and retire tirx.ptx.* (#20103)
new 51780d8d34 [BugFix][Metal] Preserve pointer address spaces for byte offsets (#20101)
new c03b2b6223 [TIRx][CUDA] uint32 index dtypes, directive fixes, and PTX ISA coverage (#20110)
new 28987378a9 [SCRIPT] Support PEP 695 symbolic variables in Relax and TIR (#20107)
new e5d3655c87 [Fix][WebGPU] Preserve read-only buffer access modes (#20113)
new 57ef4986f8 [TIRX] Split backend.cuda.intrinsics, fold tcgen05 descriptors, and fix two PTX dialect gaps (#20120)
new 12d64bda53 [TIRx][CUDA] Replace source helpers with typed PTX forms (#20140)
new 845e459a4f [TIRx][CUDA] Version-gate CUDA 12.8 tensor-map enums and fix registry-test lock leak (#20154)
new 2ae7142b4b [TIRx][CUDA] Add PTX address expressions with immediate byte offsets (#20153)
new 2947e9b1db [Fix][WebGPU] Validate and bound symbolic stack allocations (#20132)
new 35dbfd1431 [TIRx][CUDA] Add register and cluster launch controls (#20159)
new 37b0da57bc [IR][TIRX] Add first-class tuple expressions (#20168)
new 6441952f0b [TIRx][CUDA] Allow newer CUTLASS packages for IKET (#20164)
new 190aa25773 [TIRx][CUDA] Fix single-CTA clusterCtaIdx resolution and accept packed sub-byte tensor-map dtypes (#20172)
new a8ef19e37c feat(lower-tirx): support PTX movmatrix (#20171)
new cebe852d60 [TIRx][CUDA] Preserve explicit single-CTA cluster launches (#20180)
new 3a2b45e375 [Fix][Arith] Preserve nested floormod semantics (#20181)
new 6503bb738c [Codegen][LLVM] Add LLVM 23 compatibility (#20189)
new f40f77bedf fix(tirx): stabilize multi-GPU correctness tests (#20213)
new 69c8a28a59 [Perf][Arith] Materialize Z3 solvers lazily on first query (#20215)
new ca408e94a6 [Fix][Support] Use sbsa-linux CUDA include dir on ARM64 Linux (#20222)
new 492f419388 [TIRx][CUDA] Support exact required block dimensions (#20223)
new b27c75a1d4 [TIRx][CUDA] Align the PTX dialect with PTX ISA 9.2 (#20224)
new 3450a2bb78 [TIRx][CUDA] Allow launch bounds with required block size (#20226)
new dd3caa1cac [Fix][Arith] Give each materialized Z3 solver a private context (#20221)
new 28881c1529 [REFACTOR][TE] Represent tensor loads with opaque callees (#20225)
new 510fd27d35 [CUDA][TIRx] Preserve device state during cleanup and skip invalid Top-K references (#20233)
new faec3587e9 [Fix][TIRx] Preserve index semantics when narrowing to int32 (#20129)
new d4279f17f9 [REFACTOR][TIR] Split masked buffer access into special calls (#20244)
new fe1ed1f1d4 [REFACTOR][IR] Introduce TensorLoad in core IR (#20247)
new 848c3f7d33 [REFACTOR][IR] Unify expression subscription realization (#20246)
new dfbe594b22 [BugFix] Align default (C) tirx.round lowering to ties-to-even (#20131)
new fde7935206 [REFACTOR][IR] Consolidate expression operator overloading into the base layer (#20248)
new 762fb81be7 [FIX][IR] Complete lazy subscript realization (#20251)
new c48d41799c [TIRx][CUDA] Preserve local mbarrier predicate and count (#20250)
new 611a68afcf [REFACTOR][IR] Lift primitive expressions into core IR (#20249)
new 554f2ea5b7 [Test] Run round ties-to-even test on every backend that implements it (#20252)
new da1825fe0b [REFACTOR][IR] Make expression subscription eager and remove SubscriptProxy (#20257)
new cdc0b91581 [REFACTOR][TIRx] Make BufferRegion a typed expression (#20256)
new 9478e5990e [BugFix][Arith] Reject padded IterMapSimplify fallback (#20169)
new a055783b1b [CUDA][TIRx] PTX ISA 9.4 / CUDA 13.4 support for SM103a and SM107a (Rubin) (#20261)
new 7c22df2525 [CUDA] Add NVIDIA Jetson AGX Thor target tag (#20259)
new e107af7f10 [Fix][Metal] Bound symbolic stack allocations (#20236)
new 670de86c5e [CUDA][TIRx] Add collector-qualified tcgen05.mma block_scale forms and bind tcgen05.ld.red redval as output (#20266)
new f5a4515af5 [TIRx][Test] Gate tcgen05.mma collector certification on nvcc >= 13.4 (#20270)
new 32d91fdeba [CUDA][TIRx] Allow collector-A-only SM107 block-scale MMA and open cp.async wait_group immediates (#20271)
new 7d3be7449e [TIRx][Test] Gate collector-A-only block-scale MMA test on CUDA 13.4 (#20276)
new aa533d2176 [REFACTOR][IR] Add structural hooks for Expr and Stmt (#20275)
new 5bd324e17c [Test] Pin CUDA round ties-to-even on exact midpoints (#20274)
new 415eb992fd [Fix][LLVM] Preserve 64-bit AllocBuffer extents (#20141)
new 69410996bd [TIR] Ignore None-valued pragma annotations (#20265)
new 5abe220c92 [FFI] Upgrade to latest tvm-ffi (#20294)
new c8255c6574 [FFI] Bump tvm-ffi for StructuralMap policy (#20299)
new c046148422 [REFACTOR][ARITH] Use StructuralWalk and Map in arith (#20300)
new 46b47a9566 [REFACTOR][TIR] Remove IRTransform in favour of tvm_ffi.structural_map (#20304)
new ba40865c10 [REFACTOR][IR] Add structural hooks to remaining Type and Relax Expr nodes (#20302)
new 3315f0a650 [REFACTOR][TIR] Use StructuralWalk in place of PostOrderVisit (#20308)
new 138c6a44a9 [REFACTOR][TIR] Inline StructuralWalk at variable-use checks (#20306)
new e935069628 [Fix][Codegen] Avoid extraneous parentheses in if_then_else generated code (#20285)
new f71e1b404a [REFACTOR][Python] Delete the TIR Py* functor trampoline (#20309)
new e150a0a378 [REFACTOR][IR] Rename the uniform dispatch table to ObjectFunctor (#20318)
new d1d7af4605 [REFACTOR][TIR] Use StructuralMap in place of Substitute (#20317)
new 7092ccbac2 [REFACTOR][IR] Colocate type hooks and registrations (#20325)
new 0316e13609 [REFACTOR][IR] New Functor/Visitor/Mutator Infra at Base Layer (#20327)
new ab029fd22c [FIX][TIRx][CUDA] Support SM100 weight-stationary B collectors (#20329)
new 7c055df518 [REFACTOR][IR] Unify structural mutation modes and native traversal entrypoints (#20338)
new e164b218ae [REFACTOR] Default mutators to exceptions and migrate arithmetic passes (#20339)
new f7281ff082 [CLEANUP][IR] Simplify exception-first traversal (#20347)
new c3e80df340 [REFACTOR][IR] Share checked PrimVar view across dialects (#20348)
new c45b8e1ba3 [TIRx][CUDA] Add the declared synchronization-word wait (#20353)
new 746ffa4371 [REFACTOR][TIRx] Migrate visitors to shared expression traversal (#20350)
new 070554b23f [REFACTOR][Arith] Evaluate iterator domains through Var maps (#20354)
new b9ad5844c7 [Refactor][Arith] Move conditional bounds into S-TIR (#20355)
new e137874f45 [Arith] Remove vscale-specific simplification and analysis (#20357)
new 746d2463cd [IR][TE] Share expression effects and register tensor loads (#20359)
new 13cf30380d [REFACTOR][RELAX] Own global device metadata in Relax (#20363)
new 945e935ded [REFACTOR][TIRX] Share generic expression functor dispatch (#20358)
new c626a6b211 [Refactor][IR] Move ExprDeepEqual into shared primitive expressions (#20356)
new bae3486297 [IR] Make function attribute updates generic via reflected shallow copy (#20366)
new 6846be13fe [REFACTOR][TIRX] Use single-inheritance typed StmtExprMutator (#20365)
new fbbe345c62 [REFACTOR][IR] Share primitive helpers and Python expressions (#20364)
new 5e544f764b [CLEANUP][IR][Arith] Move CLZ to shared prim and remove dialect dependencies (#20367)
new ddceec28fb [REFACTOR][IR] Move dialect and codegen registrations to their owners (#20368)
new 4986fad3b4 [REFACTOR][IR] Share tensor region expressions across dialects (#20369)
new 086316b616 [REFACTOR][TIRX] Migrate StmtFunctor dispatch and organize analyzer helpers (#20370)
new 5a367b066f [IR][Arith] Use BigInt-backed integer immediates and wide coefficients (#20371)
new ab7f7becf8 [CLEANUP][IR] Remove redundant functor helpers and CLZ float handling (#20379)
new 7c4f1dea6e [Arith] Use native GCD for fitting BigInt operands (#20380)
new e84d7f9e41 Move S-TIR specific node and TensorIntrin out of TIRX (#20378)
new 2e17c2a37c [REFACTOR][IR] Move declared call results into TIRX builders (#20382)
new 781efa5474 [REFACTOR] Rename shared symbolic analysis namespace to sym (#20381)
new 01bc77db3e [REFACTOR][IR] Unify constants with GenericConst and shared StringImm (#20386)
new 5e39bcc4fd [REFACTOR][IR] Promote primitive bitwise and shift operations to nodes (#20392)
new 427fb300d3 [FIX][TIRx] Avoid stale constraints from mutable memory predicates (#20393)
new 0645aad074 [TIRx][CUDA] Preserve kernel launch calls and add CUDA host source bundling (#20395)
new 7d138d86a7 [Fix][Metal][WebGPU] Preserve variable bindings when resolving allocation bounds (#20337)
new 408a06d834 [REFACTOR][TIRx] Group buffer APIs and remove generic composition (#20402)
new 288d84c51c [Fix][S-TIR] Add a block-aware ForceNarrowIndexToInt32 (#20409)
new 4e51cc4322 [REFACTOR][TVMSCRIPT] Introduce a new transpiler based parser (#20423)
new c4ce1347e4 [REFACTOR][Script] Separate declaration and result assembly (#20436)
new 0a066ef36c [REFACTOR][TVMScript] Consolidate Python IR builder packages (#20433)
new 7e460aa71a [PERF][TVMSCRIPT] Use lightweight module decorator detection (#20435)
new 44ecf98284 [REFACTOR][TVMScript] Restore dialect-owned IR builder packages (#20440)
new 0bf469a698 [REFACTOR][TVMScript] Resolve global-info arguments in builders (#20439)
new 6a16851b68 [REFACTOR][Script] Give S-TIR its own construction namespace (#20437)
new 4cadcbf68f [Script] Introduce explicit dynamic symbols (#20438)
new a49e5f7f89 [REFACTOR][TVMScript] Align C++ builder and printer ownership (#20443)
new e4d2569781 [REFACTOR][TVMScript] Simplify annotation capture and transpiler contexts (#20447)
new 28e1c9f473 [Script] Make transpiler call helper keywords explicit (#20448)
new 3a377f4f80 [REFACTOR][TVMScript] Fix syntax roots and simplify annotation scopes (#20446)
new 6fd6e584dc [TVMScript] Fill AST locations at compilation and simplify span inputs (#20450)
new bb65f4b2e5 [REFACTOR] Remove obsolete APIs and compatibility wrappers (#20451)
new e7ea436bc0 [REFACTOR][Script] Separate builder protocols and concrete operations (#20444)
new d653fef5fb [REFACTOR][Script] Simplify parser registries and protocol contracts (#20454)
new 3b81e1066e [REFACTOR][Script] Simplify annotation scopes and signature variables (#20456)
new f92c8b656d [REFACTOR][Script] Replace handle match-buffer bindings with Buffer signatures (#20460)
new d73e5c4e4a [FIX][TIRx] Preserve boolean bitwise not semantics in C codegen (#20461)
new 3d02e80aa9 [VERSION] Start the v0.28 development cycle (#20459)
new 942db4c27b [TEST][Sym] Cover large masks in modular-set analysis (#20458)
new e24f1b5d24 [TEST][Script] Organize dialect tests and printer highlighting (#20455)
new 6380faa9df [IR][TVMScript] Share DataTypeImm values across script dialects (#20462)
new 4b9242972a [REFACTOR][TIR] Remove obsolete TIRx builtins (#20463)
new 37e040eb95 [REFACTOR][Relax] Remove compiled VM TIR path and AnyList intrinsics (#20464)
new 1df9438786 [Target] Replace TargetTag with singleton TargetTagRegistry (#20468)
new a28384d6a7 Use dedicated TargetKind registry and fluent definitions (#20469)
new d3a876535f Migrate TIRx Axis to native tvm-ffi enum (#20470)
new fac7004075 Simplify instruction kind and script repr registration (#20472)
new 0a27bdb5aa [REFACTOR][IR] Introduce OpDef and a dedicated Op registry (#20473)
new 481badbc37 [Runtime][Vulkan] Add timer support for the Vulkan backend (#20471)
new c36a622dc6 [TIRx][CUDA] Remove IKET dependency version restrictions (#20477)
new 9322c86a5c [LLVM] Use external tvm-ffi ORC JIT for LLVMModule execution (#20292)
new a1d89fcc56 [Fix][NVPTX] Cast thread index to the loop variable dtype (#20476)
new ff36e6dce4 [FEATURE][IR] Add typed OpDef signature registration (#20478)
new 3d45dda128 Add context-free Call reinference and binding type propagation (#20480)
new 8d71cedd13 Update FromNative call sites for latest TVM FFI (#20483)
new 3bf3f2b256 [REFACTOR][TIR] Remove obsolete AttrStmt handling (#20486)
new 2bec02de27 [FIX][TIRx][CUDA] Support low-precision, tensor-map and cluster kernels in CUDA-host bundles (#20490)
new 71639a9724 [REFACTOR][TIRx] Represent buffer definitions as operation bindings (#20482)
new 1f88684cb1 [FIX][TIRx] Preserve renewal domains and allocation-bound lifetimes (#20502)
new 191a2a2041 [REFACTOR][Target] Move ConfigSchema into target headers (#20509)
new e454914347 [REFACTOR][SCRIPT] Introduce NativeFunction backed Printer Mechanism (#20516)
new b2aa1c946c [REFACTOR][S-TIR] Own printer hooks and retire legacy predicated loads (#20517)
new 9fcbc010ec [REFACTOR][IR] Localize primitive checks and containment queries (#20518)
new c8f124f09e [REFACTOR][IR] Add scalar integer expression signatures (#20521)
new 0702c5b204 [REFACTOR][TIR] Attach fragment metadata to allocation calls (#20520)
new e0c29ef681 [REFACTOR][SCRIPT] Share normal IR constructor contracts (#20522)
new ddc264c96a [REFACTOR][TIRx] Use tensor names for types and allocation APIs (#20519)
new e2c9764f09 [FIX][IR] Share typed expression mismatch diagnostics (#20523)
new 31f531d741 [Backend][WebGPU] Fix off-by-one in the grid-packing guard (#20424)
new 5e048eb2fa [Tests][WebGPU] Update grid-pack test TIRx syntax (#20538)
new 07e5393cd6 [REFACTOR][IR] Make expression and statement references non-nullable (#20528)
new f86e61bc61 [FIX][Script] Preserve device identity and unify rendering configuration (#20543)
new 7a14e24e12 [REFACTOR][IR] Initialize Python Op APIs from registered namespaces (#20539)
new 6ecba169a6 [REFACTOR][IR] Represent missing type information with MissingType (#20542)
new 34a9052a60 [REFACTOR][TIRx] Promote LambdaExpr to Expr (#20546)
new 0c96582a49 [REFACTOR][TIRx] Make CPU parallel scheduling and barriers explicit (#20549)
new 235e30281f [REFACTOR][TIRx] Use function targets in VectorizeLoop (#20550)
new abd3ee0ab7 [REFACTOR][s_tir] Keep partition hints on their owning loops (#20551)
new 996fffc900 [REFACTOR][TIRx] Use tensor names for typed variable views (#20548)
new b3f394095f [FIX][TIRx][CUDA] Support IKET 4.8 injection and trace artifacts (#20554)
new 06e3f7ab59 [REFACTOR][TIRx] Add RegionStmt and migrate thread launches (#20555)
new 5b68da104b [REFACTOR][IR] Generalize staging lambdas and explicit thread reductions (#20552)
new 17702eb6e4 [REFACTOR][TIRx] Keep unroll policy on loops and retire source imports (#20556)
new f225dacb48 [REFACTOR][TIRx] Make alignment assumptions explicit and retire legacy bounds checks (#20557)
new b57a8c561b [REFACTOR][TIRx] Declare dynamic shared memory with a CUDA leaf op (#20563)
new 1ab1d3a02c [REFACTOR][TIRx] Collect root statements without seq_scope (#20564)
new 484545a254 [TIRx] Represent device boundaries with region operations (#20566)
new 1067bf72be [REFACTOR][TRN] Use RegionStmt for tensorized NKI instructions (#20560)
new dbc2f6865f [REFACTOR][LLVM] Express AArch64 SME state as function attributes (#20568)
new 838d32a682 [REFACTOR][TIRx] Use regions for CPU and runtime context scopes (#20567)
new e692ae1990 [REFACTOR][S-TIR] Represent async and manual synchronization explicitly (#20562)
new 0f6816be70 [TIRx][CUDA] Configure kernel constraints with CUDA leaf ops (#20565)
new c0bf9414c6 [REFACTOR][TIRx] Remove obsolete AttrStmt infrastructure (#20573)
new 65efd8b276 [FIX][LLVM] Preserve physical-root alignment on outlined aliases (#20577)
new 5d3e9dce70 [REFACTOR][TIRx] Simplify argument and unroll policy plumbing (#20579)
new ae24290d54 [REFACTOR][TIRx] Define region body parameters on operations (#20575)
new d7ac3bb796 [REFACTOR][TIRx] Store tile operands and configuration as expressions (#20576)
new eb0cbb2bda [REFACTOR][IR] Normalize constant predicate names and grouping (#20581)
new 758b9c4a9d [REFACTOR][IR] Consolidate pass instrumentation and call effect headers (#20580)
new 35d6e91902 Move iteration axes to S-TIR and lower TE opaque values (#20574)
new 215eb1887e [REFACTOR][TIRx] Emit tensor declarations without a dedicated frame (#20587)
new 07d236bd07 [REFACTOR][TIRx] Rename BufferStore to TensorStore (#20590)
new 82f51cf517 [REFACTOR][IR] Colocate and inline expression FFI traits (#20585)
new f140a080a0 [REFACTOR][TIRx] Rename PrimFunc to Function (#20586)
new 5928789cbb [REFACTOR][CUDA] Store tcgen05 descriptor options in call attributes (#20596)
new 71d2f63c42 [TIRx][Relax] Preserve native signatures at explicit call boundaries (#20598)
new 7112177b16 [REFACTOR][IR] Unify Call construction and TVMScript printing (#20578)
new 4ea10dada1 [REFACTOR][IR] Canonicalize executable scope bodies as SeqStmt (#20605)
new a0fd4e35e5 [REFACTOR][Relax] Prefer tuple literals in script value contexts (#20604)
new 215876d5a9 [REFACTOR][IR] Align native and Python operator family ownership (#20603)
new 2c80c7774d [REFACTOR][TIRx] Use structural definition renewal in core transforms (#20601)
new 992b914c7f [REFACTOR][IR] Promote TensorRegionType to shared IR (#20600)
new 1f7a31b794 [REFACTOR][TIR] Store loop thread binding in annotations (#20606)
new f0361cd95f [REFACTOR][TIR] Replace type annotation markers with explicit types (#20602)
new 1b41d84e18 [REFACTOR][Python] Align namespace helpers with their implementation owners (#20599)
new 1dda728eb6 fix(lower-tirx): restore CUDA lowering with native IR builders (#20620)
new 19bf5b8914 [REFACTOR][TIRx] Organize operator families by canonical ownership (#20619)
new 579ae7b3d7 [REFACTOR][TIRx] Simplify shared headers, analysis, and pointer helpers (#20621)
new a699a4cecb [REFACTOR] Simplify canonical script operation adapters (#20623)
new 5106c73e13 [TIRx] Own expression methods and properties on TensorType (#20622)
new d9e2f7048b [REFACTOR][IR] Share statement definitions across dialects (#20624)
new cbdcc7d5e3 [REFACTOR][TIRx] Consolidate analysis and split-pattern normalization (#20629)
new 72e5c61de8 [REFACTOR][IR] Align operator and shared script-builder ownership (#20628)
new 46dff34f25 refactor(op)!: replace tile statements with tensor instruction calls (#20632)
new 945c401223 [REFACTOR][IR] Simplify transformation utilities and localize region hooks (#20627)
new 1fa76d2739 [REFACTOR][CUDA] Retire legacy WMMA tensorization and emission (#20631)
new eaa4d8430f [REFACTOR][TIRx] Move tensor placement to producing operations (#20634)
new c18d971ad1 [REFACTOR][TIRx] Simplify the transform API (#20635)
new e31969ccf5 [TIRx] Canonicalize CUDA and vector operator identities (#20630)
new 65bae494d5 [REFACTOR][Script] Relocate shared and dialect printer registrations (#20638)
new 4dd2ef0269 [REFACTOR][TIRx] Retire legacy pointer access conveniences (#20637)
new 813ec10e95 refactor(lower-tirx)!: separate CUDA launch configuration from index bindings (#20639)
new 89890f1e28 [REFACTOR][IR] Standardize metadata key ownership (#20633)
new 84b7dc2911 [REFACTOR][IR] Replace source spans with non-nullable Location (#20642)
new cd745c3b3d [REFACTOR][TIRx] Reduce conditional hoisting to HoistIf (#20636)
new 3582fb9783 [REFACTOR][Script] Simplify region and call printing (#20640)
new a17697b3b3 refactor(infra)!: unify CUDA backend configuration (#20645)
new 4c2e5e995c [REFACTOR] Make remaining object reference handles non-nullable (#20646)
new 9240ba06a6 [REFACTOR][Script] Isolate printer ownership and pointer type construction (#20647)
new 40df81f862 refactor(infra)!: pass backend configuration through Target (#20651)
new 7132dddc13 [TIRx][S-TIR] Complete tensor terminology migration (#20648)
new 62cf34a1b7 [FIX][Codegen] Bind tensor views with their element pointer type (#20657)
new 771b462ffc [Runtime] Expose device selection through the backend C API (#20661)
new c9ae2ca255 [REFACTOR][TIRx] Carry tensor allocation types in type arguments (#20659)
new b626ad27eb refactor(op)!: isolate TIRx tile and backend layout namespaces (#20663)
new 75773c9b83 [REFACTOR][TIR] Unify loop builders and isolate S-TIR construction (#20660)
new 7a3c4e3b76 refactor(op)!: consolidate TIRx helper ownership (#20668)
new 2ba52f4a53 [REFACTOR][RPC] Represent remote devices and tensors explicitly (#20667)
new adbe2ae01b [REFACTOR][IR] Distinguish AST nodes from object implementations (#20665)
new f1b2c58d20 [REFACTOR][Runtime] Return owning tensors from DeviceAPI (#20669)
new 25683eb773 [FFI] Update tvm-ffi and native Any hooks (#20664)
new 79b22c51b3 refactor(op-dispatch)!: dispatch tile ops through Op attributes (#20671)
new 204abd247d [TVMScript] Simplify printing through canonical Op exposure (#20672)
new 2b8726490b [Refactor][Runtime] Unify tensor pools and VM ownership (#20670)
new 72456d40b8 [TEST] Simplify and organize native C++ tests (#20676)
new 842f699472 [REFACTOR] Clarify core ownership and native compilation interfaces (#20678)
new d54edca28a [REFACTOR][Runtime] Extract launch parameter decoding (#20680)
new 14a1c255c6 [REFACTOR][Runtime] Clarify file helpers and VM parameter ownership (#20679)
new f983d7be5e [REFACTOR] Expose analyzer-aware statement functors (#20681)
new 4e4503a9af [REFACTOR] Use local verifier scopes and exception visit context (#20684)
new e2e2b9faf9 [REFACTOR][Runtime] Use CamelCase for launch dimension methods (#20682)
new dd8fc26dfe [REFACTOR][S-TIR] Remove test-only force index narrowing (#20685)
new 990b55b403 [REFACTOR] Localize and simplify internal TIRx helpers (#20683)
new 22e7c49ed7 [REFACTOR][Support] Expose compiler GPU thread-tag parsing (#20689)
new c9c1cb3458 [REFACTOR][TIRx] Keep device-scope decoration in TIRx (#20691)
new 3f191d6c9a [REFACTOR] Clarify shared support header ownership (#20693)
new 08b5c06e23 [REFACTOR][Sym] Simplify symbolic analysis dependencies (#20694)
new 221d0193a3 [REFACTOR][TIRx][S-TIR] Localize SSA conversion and simplify lexical remapping (#20695)
new 5a345b0fa2 [REFACTOR][Script] Print reflected types and expose canonical builder aliases (#20690)
new e3492cea9d [Fix][Metal] Update Timer construction after the non-nullable handle change (#20698)
new 0f5ede3b6f [REFACTOR][Python] Place pass and testing helpers with their owning modules (#20692)
new f49e78ad2c [REFACTOR][Runtime] Introduce canonical memory scopes (#20686)
new 1cd5505ad1 refactor(op-dispatch): replace adaptive CUDA tile dispatch with explicit patterns (#20687)
new 2d5f6620c3 [REFACTOR] Remove private TIRx dependencies from parent packages (#20703)
new 07b2f23ae4 refactor(layout): remove unused TIRx layout helpers (#20706)
new de7b5cdd28 [REFACTOR][IR] Simplify type scopes and registered annotations (#20707)
new 706e421854 refactor(op-dispatch): infer CUDA tile descriptors and document contracts (#20708)
new fd1d3c955f [REFACTOR][TIRX] Simplify TensorVar and tensor validation hooks (#20709)
new 86d5f5d19a [TVMScript] Default symbolic dimensions to int32 (#20710)
new 3334ac112a [REFACTOR] Unify unsigned-index context and remove unused helpers (#20711)
new 6229419cda [REFACTOR][SYM] Retire optional simplifier extensions (#20712)
new 1158fdd764 [REFACTOR][IR] Standardize numeric casts on value-first order (#20713)
new 25ac46a787 [BUGFIX] Fix runtime correctness and backend SDK dependencies (#20715)
new d1b604cf4c [REFACTOR][TEST] Consolidate runtime tests and isolate RPC (#20716)
new df9f5e22ba [REFACTOR] Localize lowering helpers and consolidate TIRx tests (#20719)
new ee09615894 [REFACTOR][IR] Adopt typed attribute keys (#20717)
new fa73e0fa49 [REFACTOR][IR] Consolidate builder location resolution and attachment (#20723)
new e9f3df11ed [TIRx] Add scalar builder initialization and assignment (#20724)
new ecf4893b29 [REFACTOR][PYTHON] Use the native FFI object protocol (#20726)
new 2c5c7d2416 [FIX] Repair shared C++ exports, OpenCL interfaces and compiler loading (#20722)
new e760a09d78 [REFACTOR][CODEGEN] Separate target configuration from code generation (#20718)
new 8f8d5dccef [Runtime] Register backend memory scopes with EnumDef (#20725)
new 93c70bbc61 [FEAT][Script] Emit script-facing void operators through IRBuilder (#20729)
new 9a0cb7cdf8 [CMake] Organize optional modules and build both runtime libraries (#20728)
new 4f150bf597 feat(tvmscript): add scoped Python line tracing for IRBuilder (#20731)
new c1008c4917 refactor(op-dispatch): unify thread scopes as enum tags (#20732)
new e69f4baab7 [REFACTOR][TIR] Retire legacy CUDA tensorization and warp memory lowering (#20734)
new dd887010ae [REFACTOR][HEXAGON] Retire bundled runtime and retain compiler support (#20733)
new 59b32b3bca [REFACTOR][CI] Share native Jenkins pipelines and organize CI helpers (#20735)
new 37dd2d2c2a [REFACTOR] Bringup tirx in standalone folder (#20742)
new bf75d05302 [TEST] Use subsystem-relative names for standalone TIRx tests (#20747)
new 3092dae255 fix(infra): update tir-test for the in-tree TIRx split (#20748)
new ceebf227da [REFACTOR] Simplify standalone TIRx CMake (#20749)
new 18b5ae7f13 [REFACTOR] Simplify TIRx CMake and package installation (#20751)
new 785ed29493 [CI] Build and consume source wheel artifacts across Jenkins platforms (#20750)
new 3539d4181a [BUILD] Enable LLVM and automatic CUDA in standalone TIRx (#20755)
new 1399038b58 [REFACTOR][TIRx] Align public APIs and package boundaries (#20759)
new f23ac95b2d [FIX][Sym] Reject non-positive divisors in iter map floordiv/floormod (#20756)
new 7c364a20c7 [REFACTOR] Separate TIRx compiler and runtime deployment APIs (#20763)
new 2807c4a4f4 [TIRx] Clarify overload sets, leaf ownership, and terminal throws (#20765)
new 3aa9aa5872 [TIRx] Simplify Python APIs and configuration discovery (#20766)
new 676d08efc1 [REFACTOR][TIRx] Return statements from tile dispatch (#20767)
new 0e7a76326f [REFACTOR][IR] Align explicit constructors and finish TIRx cleanup (#20768)
new 31e7a2f65c [REFACTOR] Clean up tensor helpers and parent library visibility (#20770)
new c3976d2a08 [REFACTOR][Python] Use TVM-FFI APIs directly (#20769)
new 2ca08b768a [TIRx] Remove obsolete builtin lowering bypass (#20771)
new 76cd6625a7 [REFACTOR] Keep attribute contracts with their owning interfaces (#20772)
new 6b60683616 [REFACTOR][TIRx] Simplify Python APIs and source docstrings (#20777)
new 713d586633 [REFACTOR][TIRx] Expose dispatch and tensor layout lowering passes (#20775)
new dd5aa9c86e [REFACTOR][TIRx] Remove redundant helpers and construct tensor variables directly (#20776)
new 93a6d7d6a5 [REFACTOR][Script] Simplify printer configuration and display options (#20778)
new 69bcfd4ca1 [FIX][TIRx] Preserve loops containing break or continue during unrolling (#20783)
new eda60dfef9 [TIRx] Infer variables from linear packed shapes (#20782)
new a2102e166f [TIRx] Store tensor address geometry in layouts (#20786)
new 01b408e163 [TIRx] Preserve parameter strides and physical view extents (#20788)
new b7280fbd7e [REFACTOR][TIRx] Replace legacy specialization with structural mapping (#20787)
new 11667fa947 [TEST][TIRx] Complete standalone core test migration (#20789)
new 873d60332d [REFACTOR] Make standalone TIRx the repository root
new 542a1472b6 [META] Configure standalone TIRx repository metadata
new 943fd5c364 [META] Add repository ignore rules and release keys
new e6cca0b94d [LINT] Add standalone TIRx lint configuration
new e5a0b87b22 [CI] Add standalone TIRx build, wheel, and docs pipelines
new 1035f8099a [DOCS] Add standalone TIRx Python API reference
This update added new revisions after undoing existing revisions.
That is to say, some revisions that were in the old version of the
branch are not in the new version. This situation occurs
when a user --force pushes a change and generates a repository
containing something like this:
* -- * -- B -- O -- O -- O (04ef72f0f9)
\
N -- N -- N refs/heads/tirx-standalone-root (1035f8099a)
You should already have received notification emails for all of the O
revisions, and so the following emails describe only the N revisions
from the common base, B.
Any revisions marked "omit" are not gone; other references still
refer to them. Any revisions marked "discard" are gone forever.
The 3704 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
.github/workflows/main.yml | 6 +-
include/tvm/tirx/function.h | 42 +-
python/tvm_tirx/backend/cuda/cpp/nvshmem.py | 22 +-
python/tvm_tirx/tirx/_compile.py | 2 +
python/tvm_tirx/tirx/function.py | 60 +-
src/backend/trn/transform/lower_trainium_layout.cc | 14 +-
src/tirx/ir/function.cc | 7 +-
src/tirx/ir/specialize.cc | 466 -----
src/tirx/transform/flatten_tensor.cc | 5 +-
src/tirx/transform/flatten_tensor_utils.h | 119 ++
src/tirx/transform/flattened_tensor.h | 77 -
src/tirx/transform/lower_tensor_layouts.cc | 2 +-
tests/python/codegen/llvm/test_cross_compile.py | 88 +
tests/python/codegen/llvm/test_fp8.py | 51 +
tests/python/codegen/llvm/test_minimal.py | 61 +
tests/python/codegen/llvm/test_sve.py | 140 ++
tests/python/codegen/test_nvshmem.py | 253 +++
tests/python/codegen/test_triton.py | 126 ++
.../test_structural_walk.py} | 49 +-
tests/python/script/test_constructor_contracts.py | 159 ++
tests/python/script/test_printer_entry.py | 78 +
tests/python/sym/test_canonical_simplify.py | 511 ++++++
tests/python/sym/test_modular_set.py | 254 +++
tests/python/target/test_target.py | 499 +++++
tests/python/tirx/base/test_ptx_cp_async.py | 18 +
tests/python/tirx/base/test_specialize.py | 410 -----
.../trn/tile => tests/python/tirx/ir}/__init__.py | 0
tests/python/tirx/ir/test_function.py | 65 +
tests/python/tirx/script/test_basic_usage.py | 800 ++++++++
tests/python/tirx/script/test_dynamic_shape.py | 126 ++
tests/python/tirx/script/test_error_handling.py | 180 ++
tests/python/tirx/script/test_ir_builder.py | 497 +++++
tests/python/tirx/script/test_meta_programming.py | 183 ++
tests/python/tirx/script/test_namespace.py | 45 +
tests/python/tirx/script/test_printer.py | 1100 +++++++++++
tests/python/tirx/script/test_printer_function.py | 1926 ++++++++++++++++++++
tests/python/tirx/script/test_source_locations.py | 15 +
tests/python/tirx/test_base.py | 245 +++
tests/python/tirx/test_binding_type_propagation.py | 143 ++
tests/python/tirx/test_constructor.py | 365 ++++
.../tirx/test_kernels_registry_correctness.py | 199 ++
tests/python/tirx/test_ops.py | 226 +++
tests/python/tirx/test_renew_defs.py | 86 +
tests/python/tirx/tile/trn/test_copy.py | 34 +-
tests/python/tirx/transform/test_flatten_tensor.py | 21 +-
.../tirx/transform/test_lower_tensor_layouts.py | 20 +-
46 files changed, 8676 insertions(+), 1119 deletions(-)
delete mode 100644 src/tirx/ir/specialize.cc
create mode 100644 src/tirx/transform/flatten_tensor_utils.h
delete mode 100644 src/tirx/transform/flattened_tensor.h
create mode 100644 tests/python/codegen/llvm/test_cross_compile.py
create mode 100644 tests/python/codegen/llvm/test_fp8.py
create mode 100644 tests/python/codegen/llvm/test_minimal.py
create mode 100644 tests/python/codegen/llvm/test_sve.py
create mode 100644 tests/python/codegen/test_nvshmem.py
create mode 100644 tests/python/codegen/test_triton.py
copy tests/python/{runtime/test_device_api.py => ir/test_structural_walk.py} (53%)
create mode 100644 tests/python/script/test_constructor_contracts.py
create mode 100644 tests/python/script/test_printer_entry.py
create mode 100644 tests/python/sym/test_canonical_simplify.py
create mode 100644 tests/python/sym/test_modular_set.py
create mode 100644 tests/python/target/test_target.py
delete mode 100644 tests/python/tirx/base/test_specialize.py
copy {python/tvm_tirx/backend/trn/tile => tests/python/tirx/ir}/__init__.py (100%)
create mode 100644 tests/python/tirx/ir/test_function.py
create mode 100644 tests/python/tirx/script/test_ir_builder.py
create mode 100644 tests/python/tirx/script/test_namespace.py
create mode 100644 tests/python/tirx/script/test_printer.py
create mode 100644 tests/python/tirx/script/test_printer_function.py
create mode 100644 tests/python/tirx/test_base.py
create mode 100644 tests/python/tirx/test_binding_type_propagation.py
create mode 100644 tests/python/tirx/test_constructor.py
create mode 100644 tests/python/tirx/test_kernels_registry_correctness.py
create mode 100644 tests/python/tirx/test_ops.py
create mode 100644 tests/python/tirx/test_renew_defs.py