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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/03/26 02:42:54 UTC
[incubator-nuttx] branch master updated (5340fde -> da65128)
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git.
from 5340fde sim: fix signal deliver calling error on sim platform
new 1809d56 arch: arm: arm: Author Gregory Nutt: update licenses to Apache
new 2f2bda3 arch: arm: armv6-m: Author Gregory Nutt: update licenses to Apache
new b2cd6fb arch: arm: armv6-m: fix nxstyle errors
new 8dc6fc7 arch: arm: armv7-m: fix nxstyle errors
new 1d1da33 arch: arm: armv7-a: Author Gregory Nutt: update licenses to Apache
new 3ea545e arch: arm: armv7-a: fix nxstyle errors
new 2a9e424 arch: arm: armv7-r: Author Gregory Nutt: update licenses to Apache
new df7bffe arch: arm: armv7-r: fix nxstyle errors
new da65128 arch: arm: armv8-m: fix nxstyle errors
The 9 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/arm/arm.h | 39 +--
arch/arm/src/arm/arm_allocpage.c | 40 +--
arch/arm/src/arm/arm_assert.c | 40 +--
arch/arm/src/arm/arm_blocktask.c | 39 +--
arch/arm/src/arm/arm_copyfullstate.c | 39 +--
arch/arm/src/arm/arm_fullcontextrestore.S | 39 +--
arch/arm/src/arm/arm_head.S | 39 +--
arch/arm/src/arm/arm_initialstate.c | 39 +--
arch/arm/src/arm/arm_nommuhead.S | 39 +--
arch/arm/src/arm/arm_pginitialize.c | 1 -
arch/arm/src/arm/arm_saveusercontext.S | 39 +--
arch/arm/src/arm/arm_schedulesigaction.c | 39 +--
arch/arm/src/arm/arm_syscall.c | 43 +--
arch/arm/src/arm/arm_undefinedinsn.c | 39 +--
arch/arm/src/arm/arm_va2pte.c | 40 +--
arch/arm/src/arm/arm_vectoraddrexcptn.S | 39 +--
arch/arm/src/arm/arm_vectors.S | 39 +--
arch/arm/src/arm/arm_vectortab.S | 39 +--
arch/arm/src/arm/pg_macros.h | 39 +--
arch/arm/src/arm/vfork.S | 39 +--
arch/arm/src/armv6-m/arm_assert.c | 39 +--
arch/arm/src/armv6-m/arm_copyfullstate.c | 39 +--
arch/arm/src/armv6-m/arm_dumpnvic.c | 39 +--
arch/arm/src/armv6-m/arm_exception.S | 20 +-
arch/arm/src/armv6-m/arm_fullcontextrestore.S | 67 ++---
arch/arm/src/armv6-m/arm_hardfault.c | 39 +--
arch/arm/src/armv6-m/arm_initialstate.c | 39 +--
arch/arm/src/armv6-m/arm_saveusercontext.S | 28 +-
arch/arm/src/armv6-m/arm_schedulesigaction.c | 39 +--
arch/arm/src/armv6-m/arm_signal_dispatch.c | 39 +--
arch/arm/src/armv6-m/arm_signal_handler.S | 39 +--
arch/arm/src/armv6-m/arm_switchcontext.S | 28 +-
arch/arm/src/armv6-m/exc_return.h | 89 +++---
arch/arm/src/armv6-m/nvic.h | 36 +--
arch/arm/src/armv6-m/psr.h | 55 ++--
arch/arm/src/armv6-m/svcall.h | 34 ++-
arch/arm/src/armv6-m/vfork.S | 63 ++--
arch/arm/src/armv7-a/addrenv.h | 39 +--
arch/arm/src/armv7-a/arm.h | 51 ++--
arch/arm/src/armv7-a/arm_addrenv.c | 47 ++-
arch/arm/src/armv7-a/arm_addrenv_kstack.c | 43 +--
arch/arm/src/armv7-a/arm_addrenv_ustack.c | 39 +--
arch/arm/src/armv7-a/arm_addrenv_utils.c | 43 +--
arch/arm/src/armv7-a/arm_allocpage.c | 71 ++---
arch/arm/src/armv7-a/arm_blocktask.c | 39 +--
arch/arm/src/armv7-a/arm_cache.c | 43 +--
arch/arm/src/armv7-a/arm_checkmapping.c | 47 +--
arch/arm/src/armv7-a/arm_copyarmstate.c | 39 +--
arch/arm/src/armv7-a/arm_copyfullstate.c | 39 +--
arch/arm/src/armv7-a/arm_cpuhead.S | 43 +--
arch/arm/src/armv7-a/arm_cpuidlestack.c | 39 +--
arch/arm/src/armv7-a/arm_cpuindex.c | 41 +--
arch/arm/src/armv7-a/arm_cpupause.c | 43 +--
arch/arm/src/armv7-a/arm_cpustart.c | 39 +--
arch/arm/src/armv7-a/arm_dataabort.c | 51 ++--
arch/arm/src/armv7-a/arm_doirq.c | 41 +--
arch/arm/src/armv7-a/arm_fetchadd.S | 43 +--
arch/arm/src/armv7-a/arm_fpuconfig.S | 39 +--
arch/arm/src/armv7-a/arm_fullcontextrestore.S | 39 +--
arch/arm/src/armv7-a/arm_gicv2.c | 39 +--
arch/arm/src/armv7-a/arm_gicv2_dump.c | 43 +--
arch/arm/src/armv7-a/arm_head.S | 43 +--
arch/arm/src/armv7-a/arm_initialstate.c | 39 +--
arch/arm/src/armv7-a/arm_l2cc_pl310.c | 50 ++--
arch/arm/src/armv7-a/arm_mmu.c | 43 +--
arch/arm/src/armv7-a/arm_pghead.S | 44 +--
arch/arm/src/armv7-a/arm_pginitialize.c | 44 +--
arch/arm/src/armv7-a/arm_physpgaddr.c | 58 ++--
arch/arm/src/armv7-a/arm_prefetchabort.c | 71 ++---
arch/arm/src/armv7-a/arm_restorefpu.S | 59 ++--
arch/arm/src/armv7-a/arm_savefpu.S | 63 ++--
arch/arm/src/armv7-a/arm_saveusercontext.S | 39 +--
arch/arm/src/armv7-a/arm_scu.c | 43 +--
arch/arm/src/armv7-a/arm_signal_dispatch.c | 39 +--
arch/arm/src/armv7-a/arm_testset.S | 39 +--
arch/arm/src/armv7-a/arm_undefinedinsn.c | 39 +--
arch/arm/src/armv7-a/arm_va2pte.c | 40 +--
arch/arm/src/armv7-a/arm_vectoraddrexcptn.S | 39 +--
arch/arm/src/armv7-a/arm_vectors.S | 107 +++----
arch/arm/src/armv7-a/arm_vectortab.S | 39 +--
arch/arm/src/armv7-a/arm_virtpgaddr.c | 39 +--
arch/arm/src/armv7-a/barriers.h | 51 ++--
arch/arm/src/armv7-a/cp15.h | 67 ++---
arch/arm/src/armv7-a/cp15_cacheops.h | 208 ++++++-------
arch/arm/src/armv7-a/crt0.c | 41 +--
arch/arm/src/armv7-a/fpu.h | 40 +--
arch/arm/src/armv7-a/gic.h | 110 ++++---
arch/arm/src/armv7-a/gtm.h | 51 ++--
arch/arm/src/armv7-a/l2cc.h | 43 +--
arch/arm/src/armv7-a/l2cc_pl310.h | 80 ++---
arch/arm/src/armv7-a/mmu.h | 346 +++++++++++-----------
arch/arm/src/armv7-a/mpcore.h | 49 ++-
arch/arm/src/armv7-a/pgalloc.h | 45 +--
arch/arm/src/armv7-a/sctlr.h | 143 +++++----
arch/arm/src/armv7-a/scu.h | 51 ++--
arch/arm/src/armv7-a/smp.h | 40 +--
arch/arm/src/armv7-a/svcall.h | 29 +-
arch/arm/src/armv7-m/arm_mpu.c | 61 ++--
arch/arm/src/armv7-m/barriers.h | 12 +-
arch/arm/src/armv7-m/etm.h | 29 +-
arch/arm/src/armv7-m/exc_return.h | 55 ++--
arch/arm/src/armv7-m/gnu/arm_exception.S | 32 +-
arch/arm/src/armv7-m/gnu/arm_fpu.S | 28 +-
arch/arm/src/armv7-m/gnu/arm_fullcontextrestore.S | 28 +-
arch/arm/src/armv7-m/gnu/arm_lazyexception.S | 34 +--
arch/arm/src/armv7-m/gnu/arm_saveusercontext.S | 28 +-
arch/arm/src/armv7-m/gnu/arm_setjmp.S | 28 +-
arch/arm/src/armv7-m/gnu/arm_switchcontext.S | 28 +-
arch/arm/src/armv7-m/gnu/vfork.S | 24 +-
arch/arm/src/armv7-m/iar/arm_fullcontextrestore.S | 28 +-
arch/arm/src/armv7-m/iar/arm_saveusercontext.S | 28 +-
arch/arm/src/armv7-m/iar/arm_switchcontext.S | 28 +-
arch/arm/src/armv7-m/iar/vfork.S | 24 +-
arch/arm/src/armv7-m/itm.h | 54 ++--
arch/arm/src/armv7-m/itm_syslog.h | 2 +-
arch/arm/src/armv7-m/mpu.h | 84 +++---
arch/arm/src/armv7-m/nvic.h | 42 +--
arch/arm/src/armv7-m/psr.h | 16 +-
arch/arm/src/armv7-m/svcall.h | 31 +-
arch/arm/src/armv7-m/tpi.h | 41 +--
arch/arm/src/armv7-r/arm.h | 55 ++--
arch/arm/src/armv7-r/arm_blocktask.c | 39 +--
arch/arm/src/armv7-r/arm_cache.c | 43 +--
arch/arm/src/armv7-r/arm_dataabort.c | 43 +--
arch/arm/src/armv7-r/arm_doirq.c | 39 +--
arch/arm/src/armv7-r/arm_fetchadd.S | 43 +--
arch/arm/src/armv7-r/arm_fpuconfig.S | 39 +--
arch/arm/src/armv7-r/arm_fullcontextrestore.S | 39 +--
arch/arm/src/armv7-r/arm_gicv2.c | 64 ++--
arch/arm/src/armv7-r/arm_head.S | 43 +--
arch/arm/src/armv7-r/arm_initialstate.c | 39 +--
arch/arm/src/armv7-r/arm_l2cc_pl310.c | 83 +++---
arch/arm/src/armv7-r/arm_mpu.c | 46 +--
arch/arm/src/armv7-r/arm_prefetchabort.c | 43 +--
arch/arm/src/armv7-r/arm_restorefpu.S | 59 ++--
arch/arm/src/armv7-r/arm_savefpu.S | 63 ++--
arch/arm/src/armv7-r/arm_saveusercontext.S | 39 +--
arch/arm/src/armv7-r/arm_signal_dispatch.c | 39 +--
arch/arm/src/armv7-r/arm_signal_handler.S | 39 +--
arch/arm/src/armv7-r/arm_testset.S | 39 +--
arch/arm/src/armv7-r/arm_undefinedinsn.c | 39 +--
arch/arm/src/armv7-r/arm_vectoraddrexcptn.S | 39 +--
arch/arm/src/armv7-r/arm_vectors.S | 95 +++---
arch/arm/src/armv7-r/arm_vectortab.S | 39 +--
arch/arm/src/armv7-r/barriers.h | 51 ++--
arch/arm/src/armv7-r/cp15.h | 56 ++--
arch/arm/src/armv7-r/cp15_cacheops.h | 201 +++++++------
arch/arm/src/armv7-r/fpu.h | 40 +--
arch/arm/src/armv7-r/gic.h | 322 ++++++++++----------
arch/arm/src/armv7-r/l2cc.h | 43 +--
arch/arm/src/armv7-r/l2cc_pl310.h | 87 +++---
arch/arm/src/armv7-r/mpcore.h | 65 ++--
arch/arm/src/armv7-r/mpu.h | 52 ++--
arch/arm/src/armv7-r/sctlr.h | 230 ++++++++------
arch/arm/src/armv7-r/svcall.h | 28 +-
arch/arm/src/armv8-m/arm_exception.S | 38 +--
arch/arm/src/armv8-m/arm_fpu.S | 28 +-
arch/arm/src/armv8-m/arm_fullcontextrestore.S | 28 +-
arch/arm/src/armv8-m/arm_lazyexception.S | 34 +--
arch/arm/src/armv8-m/arm_mpu.c | 61 ++--
arch/arm/src/armv8-m/arm_saveusercontext.S | 28 +-
arch/arm/src/armv8-m/arm_setjmp.S | 30 +-
arch/arm/src/armv8-m/arm_switchcontext.S | 28 +-
arch/arm/src/armv8-m/barriers.h | 12 +-
arch/arm/src/armv8-m/dwt.h | 41 +--
arch/arm/src/armv8-m/etm.h | 20 +-
arch/arm/src/armv8-m/exc_return.h | 69 ++---
arch/arm/src/armv8-m/itm.h | 53 ++--
arch/arm/src/armv8-m/mpu.h | 84 +++---
arch/arm/src/armv8-m/nvic.h | 42 +--
arch/arm/src/armv8-m/psr.h | 16 +-
arch/arm/src/armv8-m/svcall.h | 30 +-
arch/arm/src/armv8-m/tpi.h | 41 +--
arch/arm/src/armv8-m/vfork.S | 24 +-
174 files changed, 3559 insertions(+), 5128 deletions(-)
[incubator-nuttx] 04/09: arch: arm: armv7-m: fix nxstyle errors
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 8dc6fc74eb6226faf039f6866eee880ff2ba5f99
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:13:30 2021 +0100
arch: arm: armv7-m: fix nxstyle errors
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/armv7-m/arm_mpu.c | 61 ++++++++--------
arch/arm/src/armv7-m/barriers.h | 12 ++--
arch/arm/src/armv7-m/etm.h | 29 ++++----
arch/arm/src/armv7-m/exc_return.h | 55 ++++++++-------
arch/arm/src/armv7-m/gnu/arm_exception.S | 32 ++++-----
arch/arm/src/armv7-m/gnu/arm_fpu.S | 28 ++++----
arch/arm/src/armv7-m/gnu/arm_fullcontextrestore.S | 28 ++++----
arch/arm/src/armv7-m/gnu/arm_lazyexception.S | 34 ++++-----
arch/arm/src/armv7-m/gnu/arm_saveusercontext.S | 28 ++++----
arch/arm/src/armv7-m/gnu/arm_setjmp.S | 28 ++++----
arch/arm/src/armv7-m/gnu/arm_switchcontext.S | 28 ++++----
arch/arm/src/armv7-m/gnu/vfork.S | 24 +++----
arch/arm/src/armv7-m/iar/arm_fullcontextrestore.S | 28 ++++----
arch/arm/src/armv7-m/iar/arm_saveusercontext.S | 28 ++++----
arch/arm/src/armv7-m/iar/arm_switchcontext.S | 28 ++++----
arch/arm/src/armv7-m/iar/vfork.S | 24 +++----
arch/arm/src/armv7-m/itm.h | 54 ++++++++-------
arch/arm/src/armv7-m/itm_syslog.h | 2 +-
arch/arm/src/armv7-m/mpu.h | 84 +++++++++++------------
arch/arm/src/armv7-m/nvic.h | 42 +++++++-----
arch/arm/src/armv7-m/psr.h | 16 ++---
arch/arm/src/armv7-m/svcall.h | 31 +++++----
arch/arm/src/armv7-m/tpi.h | 41 +++++------
23 files changed, 390 insertions(+), 375 deletions(-)
diff --git a/arch/arm/src/armv7-m/arm_mpu.c b/arch/arm/src/armv7-m/arm_mpu.c
index 171bbea..b241661 100644
--- a/arch/arm/src/armv7-m/arm_mpu.c
+++ b/arch/arm/src/armv7-m/arm_mpu.c
@@ -1,4 +1,4 @@
-/*****************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/arm_mpu.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- *****************************************************************************/
+ ****************************************************************************/
-/*****************************************************************************
+/****************************************************************************
* Included Files
- *****************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -30,19 +30,19 @@
#include "mpu.h"
#include "arm_internal.h"
-/*****************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- *****************************************************************************/
+ ****************************************************************************/
-/* Configuration *************************************************************/
+/* Configuration ************************************************************/
#ifndef CONFIG_ARM_MPU_NREGIONS
# define CONFIG_ARM_MPU_NREGIONS 8
#endif
-/*****************************************************************************
+/****************************************************************************
* Private Data
- *****************************************************************************/
+ ****************************************************************************/
/* These sets represent the set of disabled memory sub-regions. A bit set
* corresponds to a disabled sub-region; the LS bit corresponds to the first
@@ -72,11 +72,11 @@ static const uint8_t g_ls_regionmask[9] =
static uint8_t g_region;
-/*****************************************************************************
+/****************************************************************************
* Private Functions
- *****************************************************************************/
+ ****************************************************************************/
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_subregion_ms
*
* Description:
@@ -88,7 +88,7 @@ static uint8_t g_region;
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
- *****************************************************************************/
+ ****************************************************************************/
static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
{
@@ -126,7 +126,7 @@ static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
return g_ms_regionmask[nsrs];
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_subregion_ls
*
* Description:
@@ -139,7 +139,7 @@ static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
- *****************************************************************************/
+ ****************************************************************************/
static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
{
@@ -177,11 +177,11 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
return g_ls_regionmask[nsrs];
}
-/*****************************************************************************
+/****************************************************************************
* Public Functions
- *****************************************************************************/
+ ****************************************************************************/
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_allocregion
*
* Description:
@@ -192,7 +192,7 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
* - Regions are only allocated early in initialization, so no special
* protection against re-entrancy is required;
*
- *****************************************************************************/
+ ****************************************************************************/
unsigned int mpu_allocregion(void)
{
@@ -200,7 +200,7 @@ unsigned int mpu_allocregion(void)
return (unsigned int)g_region++;
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_log2regionceil
*
* Description:
@@ -209,7 +209,7 @@ unsigned int mpu_allocregion(void)
*
* size <= (1 << l2size)
*
- *****************************************************************************/
+ ****************************************************************************/
uint8_t mpu_log2regionceil(size_t size)
{
@@ -221,7 +221,7 @@ uint8_t mpu_log2regionceil(size_t size)
return l2size;
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_log2regionfloor
*
* Description:
@@ -230,7 +230,7 @@ uint8_t mpu_log2regionceil(size_t size)
*
* size >= (1 << l2size)
*
- *****************************************************************************/
+ ****************************************************************************/
uint8_t mpu_log2regionfloor(size_t size)
{
@@ -244,7 +244,7 @@ uint8_t mpu_log2regionfloor(size_t size)
return l2size;
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_subregion
*
* Description:
@@ -256,7 +256,7 @@ uint8_t mpu_log2regionfloor(size_t size)
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
- *****************************************************************************/
+ ****************************************************************************/
uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size)
{
@@ -301,13 +301,13 @@ uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size)
return ret;
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_control
*
* Description:
* Configure and enable (or disable) the MPU
*
- *****************************************************************************/
+ ****************************************************************************/
void mpu_control(bool enable, bool hfnmiena, bool privdefena)
{
@@ -331,13 +331,13 @@ void mpu_control(bool enable, bool hfnmiena, bool privdefena)
putreg32(regval, MPU_CTRL);
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_configure_region
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
- *****************************************************************************/
+ ****************************************************************************/
void mpu_configure_region(uintptr_t base, size_t size,
uint32_t flags)
@@ -362,7 +362,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
l2size = mpu_log2regionceil(size + base - alignedbase);
DEBUGASSERT(alignedbase + (1 << l2size) >= base + size);
- DEBUGASSERT(l2size == 5 || alignedbase + (1 << (l2size - 1)) < base + size);
+ DEBUGASSERT(l2size == 5 ||
+ alignedbase + (1 << (l2size - 1)) < base + size);
DEBUGASSERT((alignedbase & MPU_RBAR_ADDR_MASK) == alignedbase);
DEBUGASSERT((alignedbase & ((1 << l2size) - 1)) == 0);
diff --git a/arch/arm/src/armv7-m/barriers.h b/arch/arm/src/armv7-m/barriers.h
index 1aa3ae9..5ac66c7 100644
--- a/arch/arm/src/armv7-m/barriers.h
+++ b/arch/arm/src/armv7-m/barriers.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/barriers.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* ARMv7-M memory barriers */
diff --git a/arch/arm/src/armv7-m/etm.h b/arch/arm/src/armv7-m/etm.h
index 3f476de..b379c1d 100644
--- a/arch/arm/src/armv7-m/etm.h
+++ b/arch/arm/src/armv7-m/etm.h
@@ -1,4 +1,4 @@
-/*******************************************************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/etm.h
*
* Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
@@ -15,10 +15,10 @@
*
* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
* has no obligation to support this Software. Silicon Laboratories, Inc. is
- * providing the Software "AS IS", with no express or implied warranties of any
- * kind, including, but not limited to, any implied warranties of
- * merchantability or fitness for any particular purpose or warranties against
- * infringement of any proprietary rights of a third party.
+ * providing the Software "AS IS", with no express or implied warranties of
+ * any kind, including, but not limited to, any implied warranties of
+ * merchantability or fitness for any particular purpose or warranties
+ * against infringement of any proprietary rights of a third party.
*
* Silicon Laboratories, Inc. will not be liable for any consequential,
* incidental, or special damages, or any other relief, or for any claim by
@@ -56,23 +56,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- *******************************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7_M_ETM_H
#define __ARCH_ARM_SRC_ARMV7_M_ETM_H
-/*******************************************************************************************************************************
+/****************************************************************************
* Included Files
- *******************************************************************************************************************************/
+ ****************************************************************************/
-/*******************************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- *******************************************************************************************************************************/
-/* ETM Register Base Address ***************************************************************************************************/
+ ****************************************************************************/
+
+/* ETM Register Base Address ************************************************/
#define ETM_BASE (0xe0041000ul)
-/* ETM Register Offsets ********************************************************************************************************/
+/* ETM Register Offsets *****************************************************/
#define ETM_ETMCR_OFFSET 0x0000 /* Main Control Register */
#define ETM_ETMCCR_OFFSET 0x0004 /* Configuration Code Register */
@@ -115,7 +116,7 @@
#define ETM_ETMCIDR2_OFFSET 0x0ff8 /* Component ID2 Register */
#define ETM_ETMCIDR3_OFFSET 0x0ffc /* Component ID3 Register */
-/* ETM Register Addresses ******************************************************************************************************/
+/* ETM Register Addresses ***************************************************/
#define ETM_ETMCR (ETM_BASE+ETM_ETMCR_OFFSET)
#define ETM_ETMCCR (ETM_BASE+ETM_ETMCCR_OFFSET)
@@ -158,7 +159,7 @@
#define ETM_ETMCIDR2 (ETM_BASE+ETM_ETMCIDR2_OFFSET)
#define ETM_ETMCIDR3 (ETM_BASE+ETM_ETMCIDR3_OFFSET)
-/* ETM Register Bit Field Definitions ******************************************************************************************/
+/* ETM Register Bit Field Definitions ***************************************/
/* Bit fields for ETM ETMCR */
diff --git a/arch/arm/src/armv7-m/exc_return.h b/arch/arm/src/armv7-m/exc_return.h
index 2ba5db5..14147be 100644
--- a/arch/arm/src/armv7-m/exc_return.h
+++ b/arch/arm/src/armv7-m/exc_return.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/exc_return.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,66 +16,69 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7_M_EXC_RETURN_H
#define __ARCH_ARM_SRC_ARMV7_M_EXC_RETURN_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* The processor saves an EXC_RETURN value to the LR on exception entry. The
* exception mechanism relies on this value to detect when the processor has
* completed an exception handler.
*
- * Bits [31:28] of an EXC_RETURN value are always 1. When the processor loads a
- * value matching this pattern to the PC it detects that the operation is a not
- * a normal branch operation and instead, that the exception is complete.
+ * Bits [31:28] of an EXC_RETURN value are always 1.
+ * When the processor loads a value matching this pattern to the PC it
+ * detects that the operation is a not a normal branch operation and instead,
+ * that the exception is complete.
* Therefore, it starts the exception return sequence.
*
- * Bits[4:0] of the EXC_RETURN value indicate the required return stack and eventual
- * processor mode. The remaining bits of the EXC_RETURN value should be set to 1.
+ * Bits[4:0] of the EXC_RETURN value indicate the required return stack and
+ * eventual processor mode.
+ *
+ * The remaining bits of the EXC_RETURN value should be set to 1.
*/
/* EXC_RETURN_BASE: Bits that are always set in an EXC_RETURN value. */
#define EXC_RETURN_BASE 0xffffffe1
-/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the hardware
- * context using the process stack pointer (if not set, the context was saved
- * using the main stack pointer)
+/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the
+ * hardware context using the process stack pointer (if not set, the context
+ * was saved using the main stack pointer)
*/
#define EXC_RETURN_PROCESS_STACK (1 << 2)
-/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not set,
- * return stays in handler mode)
+/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode
+ * (if not set, return stays in handler mode)
*/
#define EXC_RETURN_THREAD_MODE (1 << 3)
/* EXC_RETURN_STD_CONTEXT: The state saved on the stack does not include the
- * volatile FP registers and FPSCR. If this bit is clear, the state does include
- * these registers.
+ * volatile FP registers and FPSCR.
+ * If this bit is clear, the state does include these registers.
*/
#define EXC_RETURN_STD_CONTEXT (1 << 4)
-/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state from
- * the main stack. Execution uses MSP after return.
+/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state
+ * from the main stack. Execution uses MSP after return.
*/
#define EXC_RETURN_HANDLER 0xfffffff1
-/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return gets
- * state from the main stack. Execution uses MSP after return.
+/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return
+ * gets state from the main stack. Execution uses MSP after return.
*/
#if !defined(CONFIG_ARMV7M_LAZYFPU) && defined(CONFIG_ARCH_FPU)
@@ -85,8 +88,8 @@
EXC_RETURN_THREAD_MODE)
#endif
-/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets
- * state from the process stack. Execution uses PSP after return.
+/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return
+ * gets state from the process stack. Execution uses PSP after return.
*/
#if !defined(CONFIG_ARMV7M_LAZYFPU) && defined(CONFIG_ARCH_FPU)
@@ -97,8 +100,8 @@
EXC_RETURN_THREAD_MODE | EXC_RETURN_PROCESS_STACK)
#endif
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV7_M_EXC_RETURN_H */
diff --git a/arch/arm/src/armv7-m/gnu/arm_exception.S b/arch/arm/src/armv7-m/gnu/arm_exception.S
index 34e5031..caf1523 100644
--- a/arch/arm/src/armv7-m/gnu/arm_exception.S
+++ b/arch/arm/src/armv7-m/gnu/arm_exception.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/gnu/arm_exception.S
*
* Copyright (C) 2009-2013, 2015-2016, 2018 Gregory Nutt. All rights reserved.
@@ -32,11 +32,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -46,9 +46,9 @@
#include "chip.h"
#include "exc_return.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* Configuration ********************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
@@ -80,9 +80,9 @@
# endif
#endif
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl exception_common
@@ -90,18 +90,18 @@
.thumb
.file "arm_exception.S"
-/************************************************************************************
+/****************************************************************************
* Macro Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: setintstack
*
* Description:
* Set the current stack pointer to the "top" the interrupt stack. Single CPU
* case. Must be provided by MCU-specific logic in the SMP case.
*
- ************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro setintstack, tmp1, tmp2
@@ -109,9 +109,9 @@
.endm
#endif
-/************************************************************************************
+/****************************************************************************
* .text
- ************************************************************************************/
+ ****************************************************************************/
/* Common exception handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
@@ -309,13 +309,13 @@ exception_common:
.size exception_common, .-exception_common
-/************************************************************************************
+/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
- ************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
diff --git a/arch/arm/src/armv7-m/gnu/arm_fpu.S b/arch/arm/src/armv7-m/gnu/arm_fpu.S
index a4b31cb..114b45c 100644
--- a/arch/arm/src/armv7-m/gnu/arm_fpu.S
+++ b/arch/arm/src/armv7-m/gnu/arm_fpu.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/gnu/arm_fpu.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,16 +16,16 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/*
* When this file is assembled, it will require the following GCC options:
*
* -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfp -meabi=5 -mthumb
*/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -33,13 +33,13 @@
#ifdef CONFIG_ARCH_FPU
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_savefpu
.globl arm_restorefpu
@@ -48,11 +48,11 @@
.thumb
.file "arm_fpu.S"
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_savefpu
*
* Description:
@@ -69,7 +69,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.type arm_savefpu, function
@@ -157,7 +157,7 @@ arm_savefpu:
.size arm_savefpu, .-arm_savefpu
-/************************************************************************************
+/****************************************************************************
* Name: arm_restorefpu
*
* Description:
@@ -175,7 +175,7 @@ arm_savefpu:
* This function does not return anything explicitly. However, it is called from
* interrupt level assembly logic that assumes that r0 is preserved.
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.type arm_restorefpu, function
diff --git a/arch/arm/src/armv7-m/gnu/arm_fullcontextrestore.S b/arch/arm/src/armv7-m/gnu/arm_fullcontextrestore.S
index dd3c824..2966281 100644
--- a/arch/arm/src/armv7-m/gnu/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv7-m/gnu/arm_fullcontextrestore.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/gnu/arm_fullcontextrestore.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.syntax unified
.thumb
.file "arm_fullcontextrestore.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_fullcontextrestore
*
* Description:
@@ -59,7 +59,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.globl arm_fullcontextrestore
diff --git a/arch/arm/src/armv7-m/gnu/arm_lazyexception.S b/arch/arm/src/armv7-m/gnu/arm_lazyexception.S
index 9d15f90..edc913a 100644
--- a/arch/arm/src/armv7-m/gnu/arm_lazyexception.S
+++ b/arch/arm/src/armv7-m/gnu/arm_lazyexception.S
@@ -1,4 +1,4 @@
-/************************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/gnu/up_lazyexcption.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -30,11 +30,11 @@
#include "chip.h"
#include "exc_return.h"
-/************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************************/
+/* Configuration ************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the MSP to the
@@ -63,9 +63,9 @@
# endif
#endif
-/************************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************************/
+ ****************************************************************************/
.globl exception_common
@@ -73,18 +73,18 @@
.thumb
.file "arm_lazyexception.S"
-/************************************************************************************************
+/****************************************************************************
* Macro Definitions
- ************************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************************
+/****************************************************************************
* Name: setintstack
*
* Description:
* Set the current stack pointer to the "top" the interrupt stack. Single CPU case. Must be
* provided by MCU-specific logic in chip.h for the SMP case.
*
- ************************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro setintstack, tmp1, tmp2
@@ -92,9 +92,9 @@
.endm
#endif
-/************************************************************************************************
+/****************************************************************************
* .text
- ************************************************************************************************/
+ ****************************************************************************/
/* Common IRQ handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
@@ -328,13 +328,13 @@ exception_common:
bx r14 /* And return */
.size exception_common, .-exception_common
-/************************************************************************************************
+/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
- ************************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
diff --git a/arch/arm/src/armv7-m/gnu/arm_saveusercontext.S b/arch/arm/src/armv7-m/gnu/arm_saveusercontext.S
index a75127b..ec98733 100644
--- a/arch/arm/src/armv7-m/gnu/arm_saveusercontext.S
+++ b/arch/arm/src/armv7-m/gnu/arm_saveusercontext.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/gnu/arm_saveusercontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.syntax unified
.thumb
.file "arm_saveusercontext.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_saveusercontext
*
* Description:
@@ -60,7 +60,7 @@
* 0: Normal return
* 1: Context switch return
*
- ************************************************************************************/
+ ****************************************************************************/
.text
.thumb_func
diff --git a/arch/arm/src/armv7-m/gnu/arm_setjmp.S b/arch/arm/src/armv7-m/gnu/arm_setjmp.S
index 224a0b7..c173566 100644
--- a/arch/arm/src/armv7-m/gnu/arm_setjmp.S
+++ b/arch/arm/src/armv7-m/gnu/arm_setjmp.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/gnu/arm_setjmp.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,26 +16,26 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/* When this file is assembled, it will require the following GCC options:
*
* -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -meabi=5 -mthumb
*/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl setjmp
.globl longjmp
@@ -44,11 +44,11 @@
.thumb
.file "setjmp.S"
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: setjmp
*
* Description:
@@ -67,7 +67,7 @@
* 0 setjmp called directly
* non-0 we justed returned from a longjmp()
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.type setjmp, function
@@ -97,7 +97,7 @@ setjmp:
.size setjmp, .-setjmp
-/************************************************************************************
+/****************************************************************************
* Name: longjmp
*
* Description:
@@ -117,7 +117,7 @@ setjmp:
* Returned Value:
* This function does not return anything explicitly.
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.type longjmp, function
diff --git a/arch/arm/src/armv7-m/gnu/arm_switchcontext.S b/arch/arm/src/armv7-m/gnu/arm_switchcontext.S
index c9c3db9..8428193 100644
--- a/arch/arm/src/armv7-m/gnu/arm_switchcontext.S
+++ b/arch/arm/src/armv7-m/gnu/arm_switchcontext.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/gnu/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.syntax unified
.thumb
.file "arm_switchcontext.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_switchcontext
*
* Description:
@@ -60,7 +60,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.globl arm_switchcontext
diff --git a/arch/arm/src/armv7-m/gnu/vfork.S b/arch/arm/src/armv7-m/gnu/vfork.S
index 2082011..c416515 100644
--- a/arch/arm/src/armv7-m/gnu/vfork.S
+++ b/arch/arm/src/armv7-m/gnu/vfork.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/gnu/vfork.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,34 +16,34 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "arm_vfork.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.syntax unified
.thumb
.file "vfork.S"
.globl up_vfork
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: vfork
*
* Description:
@@ -82,7 +82,7 @@
* returned to the parent, no child process is created, and errno is set to
* indicate the error.
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.globl vfork
diff --git a/arch/arm/src/armv7-m/iar/arm_fullcontextrestore.S b/arch/arm/src/armv7-m/iar/arm_fullcontextrestore.S
index 20c1533..ea1e028 100644
--- a/arch/arm/src/armv7-m/iar/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv7-m/iar/arm_fullcontextrestore.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/iar/arm_fullcontextrestore.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -31,25 +31,25 @@
MODULE arm_fullcontextrestore
SECTION .text:CODE:NOROOT(2)
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
PUBLIC arm_fullcontextrestore
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_fullcontextrestore
*
* Description:
@@ -60,7 +60,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
THUMB
diff --git a/arch/arm/src/armv7-m/iar/arm_saveusercontext.S b/arch/arm/src/armv7-m/iar/arm_saveusercontext.S
index c66a89c..2efe9f3 100644
--- a/arch/arm/src/armv7-m/iar/arm_saveusercontext.S
+++ b/arch/arm/src/armv7-m/iar/arm_saveusercontext.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/iar/arm_saveusercontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -31,25 +31,25 @@
MODULE arm_saveusercontext
SECTION .text:CODE:NOROOT(2)
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
PUBLIC arm_saveusercontext
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_saveusercontext
*
* Description:
@@ -61,7 +61,7 @@
* 0: Normal return
* 1: Context switch return
*
- ************************************************************************************/
+ ****************************************************************************/
THUMB
diff --git a/arch/arm/src/armv7-m/iar/arm_switchcontext.S b/arch/arm/src/armv7-m/iar/arm_switchcontext.S
index 1b6ebd0..e8f9575 100644
--- a/arch/arm/src/armv7-m/iar/arm_switchcontext.S
+++ b/arch/arm/src/armv7-m/iar/arm_switchcontext.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/iar/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -31,25 +31,25 @@
MODULE arm_switchcontext
SECTION .text:CODE:NOROOT(2)
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
PUBLIC arm_switchcontext
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_switchcontext
*
* Description:
@@ -61,7 +61,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
THUMB
diff --git a/arch/arm/src/armv7-m/iar/vfork.S b/arch/arm/src/armv7-m/iar/vfork.S
index ce7c563..2c4fe6b 100644
--- a/arch/arm/src/armv7-m/iar/vfork.S
+++ b/arch/arm/src/armv7-m/iar/vfork.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/iar/vfork.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -29,22 +29,22 @@
MODULE vfork
SECTION .text:CODE:NOROOT(2)
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
PUBLIC vfork
EXTERN up_vfork
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: vfork
*
* Description:
@@ -83,7 +83,7 @@
* returned to the parent, no child process is created, and errno is set to
* indicate the error.
*
- ************************************************************************************/
+ ****************************************************************************/
THUMB
diff --git a/arch/arm/src/armv7-m/itm.h b/arch/arm/src/armv7-m/itm.h
index 736af43..ad78fe5 100644
--- a/arch/arm/src/armv7-m/itm.h
+++ b/arch/arm/src/armv7-m/itm.h
@@ -1,11 +1,12 @@
-/***********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/itm.h
*
* Copyright (c) 2009 - 2013 ARM LIMITED
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * modification, are permitted provided that the following conditions
+ * are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
@@ -16,17 +17,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
+ * AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville <pn...@gmail.com>
@@ -58,27 +59,28 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ***********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7_M_ITM_H
#define __ARCH_ARM_SRC_ARMV7_M_ITM_H
-/***********************************************************************************************
+/****************************************************************************
* Included Files
- ***********************************************************************************************/
+ ****************************************************************************/
#include <stdint.h>
-/***********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ***********************************************************************************************/
+ ****************************************************************************/
-/* Instrumentation Trace Macrocell Register (ITM) Definitions **********************************/
-/* ITM Register Base Address *******************************************************************/
+/* Instrumentation Trace Macrocell Register (ITM) Definitions ***************/
+
+/* ITM Register Base Address ************************************************/
#define ITM_BASE (0xe0000000ul)
-/* ITM Register Addresses **********************************************************************/
+/* ITM Register Addresses ***************************************************/
#define ITM_PORT(i) (ITM_BASE + (i * 4)) /* Stimulus Port 32-bit */
#define ITM_TER (ITM_BASE + 0x0e00) /* Trace Enable Register */
@@ -102,7 +104,7 @@
#define ITM_CID2 (ITM_BASE + 0x0ff8) /* Component Identification Register #2 */
#define ITM_CID3 (ITM_BASE + 0x0ffc) /* Component Identification Register #3 */
-/* ITM Register Bit Field Definitions **********************************************************/
+/* ITM Register Bit Field Definitions ***************************************/
/* ITM TPR */
@@ -158,9 +160,9 @@
#define ITM_RXBUFFER_EMPTY 0x5aa55aa5
-/***********************************************************************************************
+/****************************************************************************
* Public Data
- ***********************************************************************************************/
+ ****************************************************************************/
#ifdef __cplusplus
extern "C"
@@ -169,9 +171,9 @@ extern "C"
extern volatile int32_t g_itm_rxbuffer; /* External variable to receive characters. */
-/***********************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ***********************************************************************************************/
+ ****************************************************************************/
uint32_t itm_sendchar(uint32_t ch);
int32_t itm_receivechar(void);
diff --git a/arch/arm/src/armv7-m/itm_syslog.h b/arch/arm/src/armv7-m/itm_syslog.h
index 40f7162..4d279e5 100644
--- a/arch/arm/src/armv7-m/itm_syslog.h
+++ b/arch/arm/src/armv7-m/itm_syslog.h
@@ -39,7 +39,7 @@
#define __ARCH_ARM_SRC_ARMV7_M_ITM_SYSLOG_H
/****************************************************************************
- * Public Functions
+ * Public Functions Prototypes
****************************************************************************/
/****************************************************************************
diff --git a/arch/arm/src/armv7-m/mpu.h b/arch/arm/src/armv7-m/mpu.h
index 045d4a5..2d8fb88 100644
--- a/arch/arm/src/armv7-m/mpu.h
+++ b/arch/arm/src/armv7-m/mpu.h
@@ -1,4 +1,4 @@
-/*********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/mpu.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- *********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7M_MPU_H
#define __ARCH_ARM_SRC_ARMV7M_MPU_H
-/*********************************************************************************************
+/****************************************************************************
* Included Files
- *********************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -37,9 +37,9 @@
# include "arm_arch.h"
#endif
-/*********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- *********************************************************************************************/
+ ****************************************************************************/
/* MPU Register Addresses */
@@ -134,9 +134,9 @@
#ifdef CONFIG_ARM_MPU
-/*********************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- *********************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
@@ -148,17 +148,17 @@ extern "C"
#define EXTERN extern
#endif
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_allocregion
*
* Description:
* Allocate the next region
*
- *********************************************************************************************/
+ ****************************************************************************/
unsigned int mpu_allocregion(void);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_log2regionceil
*
* Description:
@@ -167,11 +167,11 @@ unsigned int mpu_allocregion(void);
*
* size <= (1 << l2size)
*
- *********************************************************************************************/
+ ****************************************************************************/
uint8_t mpu_log2regionceil(size_t size);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_log2regionfloor
*
* Description:
@@ -180,11 +180,11 @@ uint8_t mpu_log2regionceil(size_t size);
*
* size >= (1 << l2size)
*
- *********************************************************************************************/
+ ****************************************************************************/
uint8_t mpu_log2regionfloor(size_t size);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_subregion
*
* Description:
@@ -196,42 +196,42 @@ uint8_t mpu_log2regionfloor(size_t size);
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
- *********************************************************************************************/
+ ****************************************************************************/
uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_control
*
* Description:
* Configure and enable (or disable) the MPU
*
- *********************************************************************************************/
+ ****************************************************************************/
void mpu_control(bool enable, bool hfnmiena, bool privdefena);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_configure_region
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
- *********************************************************************************************/
+ ****************************************************************************/
void mpu_configure_region(uintptr_t base, size_t size,
uint32_t flags);
-/*********************************************************************************************
+/****************************************************************************
* Inline Functions
- *********************************************************************************************/
+ ****************************************************************************/
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_showtype
*
* Description:
* Show the characteristics of the MPU
*
- *********************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_DEBUG_SCHED_INFO
# define mpu_showtype() \
@@ -247,13 +247,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
# define mpu_showtype() do { } while (0)
#endif
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_priv_stronglyordered
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_priv_stronglyordered(base, size) \
do \
@@ -268,13 +268,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_user_flash
*
* Description:
* Configure a region for user program flash
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_user_flash(base, size) \
do \
@@ -289,13 +289,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_priv_flash
*
* Description:
* Configure a region for privileged program flash
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_priv_flash(base, size) \
do \
@@ -310,13 +310,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_user_intsram
*
* Description:
* Configure a region as user internal SRAM
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_user_intsram(base, size) \
do \
@@ -331,13 +331,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_priv_intsram
*
* Description:
* Configure a region as privileged internal SRAM
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_priv_intsram(base, size) \
do \
@@ -352,13 +352,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_user_extsram
*
* Description:
* Configure a region as user external SRAM
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_user_extsram(base, size) \
do \
@@ -373,13 +373,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_priv_extsram
*
* Description:
* Configure a region as privileged external SRAM
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_priv_extsram(base, size) \
do \
@@ -394,13 +394,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_peripheral
*
* Description:
* Configure a region as privileged peripheral address space
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_peripheral(base, size) \
do \
@@ -415,13 +415,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
MPU_RASR_XN /* No Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_user_peripheral
*
* Description:
* Configure a region as user peripheral address space
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_user_peripheral(base, size) \
do \
diff --git a/arch/arm/src/armv7-m/nvic.h b/arch/arm/src/armv7-m/nvic.h
index 1886be1..4029963 100644
--- a/arch/arm/src/armv7-m/nvic.h
+++ b/arch/arm/src/armv7-m/nvic.h
@@ -1,4 +1,4 @@
-/********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/nvic.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,24 +16,26 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H
-/********************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************/
+ ****************************************************************************/
-/* Exception/interrupt vector numbers *******************************************************/
+/* Exception/interrupt vector numbers ***************************************/
- /* Vector 0: Reset stack pointer value */
+ /* Vector 0: Reset stack
+ * pointer value
+ */
/* Vector 1: Reset */
#define NVIC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
@@ -48,15 +50,17 @@
#define NVIC_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define NVIC_IRQ_SYSTICK (15) /* Vector 15: System tick */
-/* External interrupts (vectors >= 16). These definitions are chip-specific */
+/* External interrupts (vectors >= 16).
+ * These definitions are chip-specific
+ */
#define NVIC_IRQ_FIRST (16) /* Vector number of the first interrupt */
-/* NVIC base address ************************************************************************/
+/* NVIC base address ********************************************************/
#define ARMV7M_NVIC_BASE 0xe000e000
-/* NVIC register offsets ********************************************************************/
+/* NVIC register offsets ****************************************************/
#define NVIC_ICTR_OFFSET 0x0004 /* Interrupt controller type register */
#define NVIC_SYSTICK_CTRL_OFFSET 0x0010 /* SysTick control and status register */
@@ -253,7 +257,7 @@
#define NVIC_CID2_OFFSET 0x0ff8 /* Component identification register bits 23:16 (CID0) */
#define NVIC_CID3_OFFSET 0x0ffc /* Component identification register bits 23:16 (CID0) */
-/* NVIC register addresses ******************************************************************/
+/* NVIC register addresses **************************************************/
#define NVIC_ICTR (ARMV7M_NVIC_BASE + NVIC_ICTR_OFFSET)
#define NVIC_SYSTICK_CTRL (ARMV7M_NVIC_BASE + NVIC_SYSTICK_CTRL_OFFSET)
@@ -443,7 +447,7 @@
#define NVIC_CID2 (ARMV7M_NVIC_BASE + NVIC_CID2_OFFSET)
#define NVIC_CID3 (ARMV7M_NVIC_BASE + NVIC_CID3_OFFSET)
-/* NVIC register bit definitions ************************************************************/
+/* NVIC register bit definitions ********************************************/
/* Interrupt controller type (INCTCTL_TYPE) */
@@ -683,16 +687,16 @@
#define NVIC_CACR_ECCDIS (1 << 1) /* Bit 1: Enables ECC in the instruction and data cache */
#define NVIC_CACR_FORCEWT (1 << 2) /* Bit 2: Enables Force Write-Through in the data cache */
-/********************************************************************************************
+/****************************************************************************
* Public Types
- ********************************************************************************************/
+ ****************************************************************************/
-/********************************************************************************************
+/****************************************************************************
* Public Data
- ********************************************************************************************/
+ ****************************************************************************/
-/********************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ********************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_NVIC_H */
diff --git a/arch/arm/src/armv7-m/psr.h b/arch/arm/src/armv7-m/psr.h
index 450eb3d..11fffd0 100644
--- a/arch/arm/src/armv7-m/psr.h
+++ b/arch/arm/src/armv7-m/psr.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/psr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* Application Program Status Register (APSR) */
@@ -65,8 +65,8 @@
#define ARMV7M_XPSR_Z ARMV7M_APSR_Z
#define ARMV7M_XPSR_N ARMV7M_APSR_N
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H */
diff --git a/arch/arm/src/armv7-m/svcall.h b/arch/arm/src/armv7-m/svcall.h
index 948f6b2..a5e9497 100644
--- a/arch/arm/src/armv7-m/svcall.h
+++ b/arch/arm/src/armv7-m/svcall.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/svcall.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7_M_SVCALL_H
#define __ARCH_ARM_SRC_ARMV7_M_SVCALL_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -31,15 +31,17 @@
# include <syscall.h>
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************/
+/* Configuration ************************************************************/
-/* This logic uses three system calls {0,1,2} for context switching and one for the
- * syscall return. So a minimum of four syscall values must be reserved. If
- * CONFIG_BUILD_PROTECTED is defined, then four more syscall values must be reserved.
+/* This logic uses three system calls {0,1,2} for context switching and one
+ * for the syscall return.
+ * So a minimum of four syscall values must be reserved.
+ * If CONFIG_BUILD_PROTECTED is defined, then four more syscall values must
+ * be reserved.
*/
#ifdef CONFIG_LIB_SYSCALL
@@ -58,7 +60,7 @@
# endif
#endif
-/* Cortex-M system calls ************************************************************/
+/* Cortex-M system calls ****************************************************/
/* SYS call 0:
*
@@ -108,7 +110,8 @@
/* SYS call 6:
*
- * void signal_handler(_sa_sigaction_t sighand, int signo, FAR siginfo_t *info,
+ * void signal_handler(_sa_sigaction_t sighand,
+ * int signo, FAR siginfo_t *info,
* FAR void *ucontext);
*/
@@ -124,8 +127,8 @@
#endif /* CONFIG_BUILD_PROTECTED */
#endif /* CONFIG_LIB_SYSCALL */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV7_M_SVCALL_H */
diff --git a/arch/arm/src/armv7-m/tpi.h b/arch/arm/src/armv7-m/tpi.h
index efef668..817ce70 100644
--- a/arch/arm/src/armv7-m/tpi.h
+++ b/arch/arm/src/armv7-m/tpi.h
@@ -1,11 +1,12 @@
-/***********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-m/tpi.h
*
* Copyright (c) 2009 - 2013 ARM LIMITED
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * modification, are permitted provided that the following conditions
+ * are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
@@ -16,17 +17,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
+ * AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville <pn...@gmail.com>
@@ -58,22 +59,22 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ***********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7_M_TPI_H
#define __ARCH_ARM_SRC_ARMV7_M_TPI_H
-/***********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ***********************************************************************************************/
+ ****************************************************************************/
-/* Trace Port Interface Register (TPI) Definitions *********************************************/
+/* Trace Port Interface Register (TPI) Definitions **************************/
-/* TPI Register Base Address *******************************************************************/
+/* TPI Register Base Address ************************************************/
#define TPI_BASE (0xe0040000ul)
-/* TPI Register Addresses **********************************************************************/
+/* TPI Register Addresses ***************************************************/
#define TPI_SSPSR (TPI_BASE + 0x0000) /* Supported Parallel Port Size Register */
#define TPI_CSPSR (TPI_BASE + 0x0004) /* Current Parallel Port Size Register */
@@ -93,7 +94,7 @@
#define TPI_DEVID (TPI_BASE + 0x0fc8) /* TPIU_DEVID */
#define TPI_DEVTYPE (TPI_BASE + 0x0fcc) /* TPIU_DEVTYPE */
-/* TPI Register Bit Field Definitions **********************************************************/
+/* TPI Register Bit Field Definitions ***************************************/
/* TPI ACPR */
[incubator-nuttx] 02/09: arch: arm: armv6-m: Author Gregory Nutt:
update licenses to Apache
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 2f2bda3385bcf42f999428d141bc298496ebdef2
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:11:24 2021 +0100
arch: arm: armv6-m: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/armv6-m/arm_assert.c | 39 +++++++++------------------
arch/arm/src/armv6-m/arm_copyfullstate.c | 39 +++++++++------------------
arch/arm/src/armv6-m/arm_dumpnvic.c | 39 +++++++++------------------
arch/arm/src/armv6-m/arm_fullcontextrestore.S | 39 +++++++++------------------
arch/arm/src/armv6-m/arm_hardfault.c | 39 +++++++++------------------
arch/arm/src/armv6-m/arm_initialstate.c | 39 +++++++++------------------
arch/arm/src/armv6-m/arm_schedulesigaction.c | 39 +++++++++------------------
arch/arm/src/armv6-m/arm_signal_dispatch.c | 39 +++++++++------------------
arch/arm/src/armv6-m/arm_signal_handler.S | 39 +++++++++------------------
arch/arm/src/armv6-m/exc_return.h | 39 +++++++++------------------
arch/arm/src/armv6-m/psr.h | 39 +++++++++------------------
arch/arm/src/armv6-m/vfork.S | 39 +++++++++------------------
12 files changed, 144 insertions(+), 324 deletions(-)
diff --git a/arch/arm/src/armv6-m/arm_assert.c b/arch/arm/src/armv6-m/arm_assert.c
index 11c97ba..1c31158 100644
--- a/arch/arm/src/armv6-m/arm_assert.c
+++ b/arch/arm/src/armv6-m/arm_assert.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_assert.c
*
- * Copyright (C) 2013-2015, 2016, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv6-m/arm_copyfullstate.c b/arch/arm/src/armv6-m/arm_copyfullstate.c
index 591b9c9..f4788ac 100644
--- a/arch/arm/src/armv6-m/arm_copyfullstate.c
+++ b/arch/arm/src/armv6-m/arm_copyfullstate.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_copyfullstate.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv6-m/arm_dumpnvic.c b/arch/arm/src/armv6-m/arm_dumpnvic.c
index febdf7c..505a932 100644
--- a/arch/arm/src/armv6-m/arm_dumpnvic.c
+++ b/arch/arm/src/armv6-m/arm_dumpnvic.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_dumpnvic.c
*
- * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv6-m/arm_fullcontextrestore.S b/arch/arm/src/armv6-m/arm_fullcontextrestore.S
index 3d9940d..5f49087 100644
--- a/arch/arm/src/armv6-m/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv6-m/arm_fullcontextrestore.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv6-m/arm_fullcontextrestore.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv6-m/arm_hardfault.c b/arch/arm/src/armv6-m/arm_hardfault.c
index 85181fd..15bfa0f 100644
--- a/arch/arm/src/armv6-m/arm_hardfault.c
+++ b/arch/arm/src/armv6-m/arm_hardfault.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_hardfault.c
*
- * Copyright (C) 2013, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv6-m/arm_initialstate.c b/arch/arm/src/armv6-m/arm_initialstate.c
index 01163e6..c38a4fb 100644
--- a/arch/arm/src/armv6-m/arm_initialstate.c
+++ b/arch/arm/src/armv6-m/arm_initialstate.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_initialstate.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv6-m/arm_schedulesigaction.c b/arch/arm/src/armv6-m/arm_schedulesigaction.c
index 00b2fc1..b7dcf8a 100644
--- a/arch/arm/src/armv6-m/arm_schedulesigaction.c
+++ b/arch/arm/src/armv6-m/arm_schedulesigaction.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_schedulesigaction.c
*
- * Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv6-m/arm_signal_dispatch.c b/arch/arm/src/armv6-m/arm_signal_dispatch.c
index 4f613aa..7b53d89 100644
--- a/arch/arm/src/armv6-m/arm_signal_dispatch.c
+++ b/arch/arm/src/armv6-m/arm_signal_dispatch.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_signal_dispatch.c
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv6-m/arm_signal_handler.S b/arch/arm/src/armv6-m/arm_signal_handler.S
index 7b019ed..f2743af 100644
--- a/arch/arm/src/armv6-m/arm_signal_handler.S
+++ b/arch/arm/src/armv6-m/arm_signal_handler.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/srcm/armv6-m/arm_signal_handler.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv6-m/exc_return.h b/arch/arm/src/armv6-m/exc_return.h
index 85fd4d9..b9391a1 100644
--- a/arch/arm/src/armv6-m/exc_return.h
+++ b/arch/arm/src/armv6-m/exc_return.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv6-m/exc_return.h
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv6-m/psr.h b/arch/arm/src/armv6-m/psr.h
index 13e4e18..ea08383 100644
--- a/arch/arm/src/armv6-m/psr.h
+++ b/arch/arm/src/armv6-m/psr.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv6-m/psr.h
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv6-m/vfork.S b/arch/arm/src/armv6-m/vfork.S
index 95c6374..e67b350 100644
--- a/arch/arm/src/armv6-m/vfork.S
+++ b/arch/arm/src/armv6-m/vfork.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv6-m/vfork.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
[incubator-nuttx] 01/09: arch: arm: arm: Author Gregory Nutt:
update licenses to Apache
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 1809d5698233dd1c4be1348a82d0ca2238d7f38b
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Thu Mar 25 07:10:25 2021 +0100
arch: arm: arm: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/arm/arm.h | 39 +++++++++-------------------
arch/arm/src/arm/arm_allocpage.c | 40 +++++++++-------------------
arch/arm/src/arm/arm_assert.c | 40 +++++++++-------------------
arch/arm/src/arm/arm_blocktask.c | 39 +++++++++-------------------
arch/arm/src/arm/arm_copyfullstate.c | 39 +++++++++-------------------
arch/arm/src/arm/arm_fullcontextrestore.S | 39 +++++++++-------------------
arch/arm/src/arm/arm_head.S | 39 +++++++++-------------------
arch/arm/src/arm/arm_initialstate.c | 39 +++++++++-------------------
arch/arm/src/arm/arm_nommuhead.S | 39 +++++++++-------------------
arch/arm/src/arm/arm_pginitialize.c | 1 -
arch/arm/src/arm/arm_saveusercontext.S | 39 +++++++++-------------------
arch/arm/src/arm/arm_schedulesigaction.c | 39 +++++++++-------------------
arch/arm/src/arm/arm_syscall.c | 43 ++++++++++---------------------
arch/arm/src/arm/arm_undefinedinsn.c | 39 +++++++++-------------------
arch/arm/src/arm/arm_va2pte.c | 40 +++++++++-------------------
arch/arm/src/arm/arm_vectoraddrexcptn.S | 39 +++++++++-------------------
arch/arm/src/arm/arm_vectors.S | 39 +++++++++-------------------
arch/arm/src/arm/arm_vectortab.S | 39 +++++++++-------------------
arch/arm/src/arm/pg_macros.h | 39 +++++++++-------------------
arch/arm/src/arm/vfork.S | 39 +++++++++-------------------
20 files changed, 230 insertions(+), 519 deletions(-)
diff --git a/arch/arm/src/arm/arm.h b/arch/arm/src/arm/arm.h
index c68ab6e..a1473b1 100644
--- a/arch/arm/src/arm/arm.h
+++ b/arch/arm/src/arm/arm.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm.h
*
- * Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_allocpage.c b/arch/arm/src/arm/arm_allocpage.c
index 49c8685..ad503bf 100644
--- a/arch/arm/src/arm/arm_allocpage.c
+++ b/arch/arm/src/arm/arm_allocpage.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_allocpage.c
- * Allocate a new page and map it to the fault address of a task.
*
- * Copyright (C) 2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_assert.c b/arch/arm/src/arm/arm_assert.c
index 0db0c41..a84314a 100644
--- a/arch/arm/src/arm/arm_assert.c
+++ b/arch/arm/src/arm/arm_assert.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_assert.c
*
- * Copyright (C) 2007-2010, 2012-2016, 2018 Gregory Nutt. All rights
- * reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_blocktask.c b/arch/arm/src/arm/arm_blocktask.c
index d146927..f2fd961 100644
--- a/arch/arm/src/arm/arm_blocktask.c
+++ b/arch/arm/src/arm/arm_blocktask.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_blocktask.c
*
- * Copyright (C) 2007-2009, 2013-2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_copyfullstate.c b/arch/arm/src/arm/arm_copyfullstate.c
index e4515d4..fd05df0 100644
--- a/arch/arm/src/arm/arm_copyfullstate.c
+++ b/arch/arm/src/arm/arm_copyfullstate.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_copyfullstate.c
*
- * Copyright (C) 2007-2009, 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_fullcontextrestore.S b/arch/arm/src/arm/arm_fullcontextrestore.S
index ca9d663..57f44f8 100644
--- a/arch/arm/src/arm/arm_fullcontextrestore.S
+++ b/arch/arm/src/arm/arm_fullcontextrestore.S
@@ -1,35 +1,20 @@
/**************************************************************************
* arch/arm/src/arm/arm_fullcontextrestore.S
*
- * Copyright (C) 2007, 2009-2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
**************************************************************************/
diff --git a/arch/arm/src/arm/arm_head.S b/arch/arm/src/arm/arm_head.S
index 8972cdd..5d7be13 100644
--- a/arch/arm/src/arm/arm_head.S
+++ b/arch/arm/src/arm/arm_head.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_head.S
*
- * Copyright (C) 2007, 2009-2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_initialstate.c b/arch/arm/src/arm/arm_initialstate.c
index d2b6c29..3b0544a 100644
--- a/arch/arm/src/arm/arm_initialstate.c
+++ b/arch/arm/src/arm/arm_initialstate.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_initialstate.c
*
- * Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_nommuhead.S b/arch/arm/src/arm/arm_nommuhead.S
index f497daa..0ddc339 100644
--- a/arch/arm/src/arm/arm_nommuhead.S
+++ b/arch/arm/src/arm/arm_nommuhead.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_nommuhead.S
*
- * Copyright (C) 2007, 2009-2010, 2012 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_pginitialize.c b/arch/arm/src/arm/arm_pginitialize.c
index 98e9f3d..22a1aed 100644
--- a/arch/arm/src/arm/arm_pginitialize.c
+++ b/arch/arm/src/arm/arm_pginitialize.c
@@ -1,6 +1,5 @@
/****************************************************************************
* arch/arm/src/arm/arm_pginitialize.c
- * Initialize the MMU for on-demand paging support.
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
diff --git a/arch/arm/src/arm/arm_saveusercontext.S b/arch/arm/src/arm/arm_saveusercontext.S
index a1c9c05..0a95b0f 100644
--- a/arch/arm/src/arm/arm_saveusercontext.S
+++ b/arch/arm/src/arm/arm_saveusercontext.S
@@ -1,35 +1,20 @@
/**************************************************************************
* arch/arm/src/arm/arm_saveusercontext.S
*
- * Copyright (C) 2007, 2009 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
**************************************************************************/
diff --git a/arch/arm/src/arm/arm_schedulesigaction.c b/arch/arm/src/arm/arm_schedulesigaction.c
index ea83142..30a1d58 100644
--- a/arch/arm/src/arm/arm_schedulesigaction.c
+++ b/arch/arm/src/arm/arm_schedulesigaction.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_schedulesigaction.c
*
- * Copyright (C) 2007-2010, 2015-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_syscall.c b/arch/arm/src/arm/arm_syscall.c
index d5bba2f..57f2aa8 100644
--- a/arch/arm/src/arm/arm_syscall.c
+++ b/arch/arm/src/arm/arm_syscall.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_syscall.c
*
- * Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_undefinedinsn.c b/arch/arm/src/arm/arm_undefinedinsn.c
index bbb3552..8dbc1ae 100644
--- a/arch/arm/src/arm/arm_undefinedinsn.c
+++ b/arch/arm/src/arm/arm_undefinedinsn.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_undefinedinsn.c
*
- * Copyright (C) 2007-2009, 2013, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_va2pte.c b/arch/arm/src/arm/arm_va2pte.c
index 3a47ce3..be78671 100644
--- a/arch/arm/src/arm/arm_va2pte.c
+++ b/arch/arm/src/arm/arm_va2pte.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_va2pte.c
- * Utility to map a virtual address to a L2 page table entry.
*
- * Copyright (C) 2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/arm_vectoraddrexcptn.S b/arch/arm/src/arm/arm_vectoraddrexcptn.S
index e183cc4..2d484e4 100644
--- a/arch/arm/src/arm/arm_vectoraddrexcptn.S
+++ b/arch/arm/src/arm/arm_vectoraddrexcptn.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/arm/up_vectoraddrexceptn.S
*
- * Copyright (C) 2008-2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/arm/arm_vectors.S b/arch/arm/src/arm/arm_vectors.S
index 9606131..9905d77 100644
--- a/arch/arm/src/arm/arm_vectors.S
+++ b/arch/arm/src/arm/arm_vectors.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/arm/arm_vectors.S
*
- * Copyright (C) 2007-2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/arm/arm_vectortab.S b/arch/arm/src/arm/arm_vectortab.S
index c20b1d8..35ccec0 100644
--- a/arch/arm/src/arm/arm_vectortab.S
+++ b/arch/arm/src/arm/arm_vectortab.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/arm_vectortab.S
*
- * Copyright (C) 2007, 2009-2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/pg_macros.h b/arch/arm/src/arm/pg_macros.h
index 6d5d4b2..d1c59b5 100644
--- a/arch/arm/src/arm/pg_macros.h
+++ b/arch/arm/src/arm/pg_macros.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm/pg_macros.h
*
- * Copyright (C) 2010 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/arm/vfork.S b/arch/arm/src/arm/vfork.S
index 66aa2e3..3c22ee5 100644
--- a/arch/arm/src/arm/vfork.S
+++ b/arch/arm/src/arm/vfork.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/arm/vfork.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
[incubator-nuttx] 03/09: arch: arm: armv6-m: fix nxstyle errors
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit b2cd6fb980929f853d60ecbf9a1dad4529805941
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:12:03 2021 +0100
arch: arm: armv6-m: fix nxstyle errors
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/armv6-m/arm_exception.S | 20 +++++------
arch/arm/src/armv6-m/arm_fullcontextrestore.S | 28 +++++++--------
arch/arm/src/armv6-m/arm_saveusercontext.S | 28 +++++++--------
arch/arm/src/armv6-m/arm_switchcontext.S | 28 +++++++--------
arch/arm/src/armv6-m/exc_return.h | 50 ++++++++++++++-------------
arch/arm/src/armv6-m/nvic.h | 36 +++++++++----------
arch/arm/src/armv6-m/psr.h | 16 ++++-----
arch/arm/src/armv6-m/svcall.h | 34 ++++++++++--------
arch/arm/src/armv6-m/vfork.S | 24 ++++++-------
9 files changed, 135 insertions(+), 129 deletions(-)
diff --git a/arch/arm/src/armv6-m/arm_exception.S b/arch/arm/src/armv6-m/arm_exception.S
index ecc6c04..392edbc 100644
--- a/arch/arm/src/armv6-m/arm_exception.S
+++ b/arch/arm/src/armv6-m/arm_exception.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/arm_exception.S
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
@@ -35,11 +35,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -48,18 +48,18 @@
#include "chip.h"
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl exception_common
.cpu cortex-m0
.file "arm_exception.S"
-/************************************************************************************
+/****************************************************************************
* .text
- ************************************************************************************/
+ ****************************************************************************/
/* Common exception handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
@@ -258,13 +258,13 @@ exception_common:
.size exception_common, .-exception_common
-/************************************************************************************
+/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
- ************************************************************************************/
+ ****************************************************************************/
#if CONFIG_ARCH_INTERRUPTSTACK > 3
.bss
diff --git a/arch/arm/src/armv6-m/arm_fullcontextrestore.S b/arch/arm/src/armv6-m/arm_fullcontextrestore.S
index 5f49087..2974437 100644
--- a/arch/arm/src/armv6-m/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv6-m/arm_fullcontextrestore.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/arm_fullcontextrestore.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,26 +28,26 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.cpu cortex-m0
.file "arm_fullcontextrestore.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_fullcontextrestore
*
* Description:
@@ -58,7 +58,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.align 2
.code 16
diff --git a/arch/arm/src/armv6-m/arm_saveusercontext.S b/arch/arm/src/armv6-m/arm_saveusercontext.S
index 842788a..fb13851 100644
--- a/arch/arm/src/armv6-m/arm_saveusercontext.S
+++ b/arch/arm/src/armv6-m/arm_saveusercontext.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/arm_saveusercontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,26 +28,26 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.cpu cortex-m0
.file "arm_saveusercontext.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_saveusercontext
*
* Description:
@@ -59,7 +59,7 @@
* 0: Normal return
* 1: Context switch return
*
- ************************************************************************************/
+ ****************************************************************************/
.text
.align 2
diff --git a/arch/arm/src/armv6-m/arm_switchcontext.S b/arch/arm/src/armv6-m/arm_switchcontext.S
index 4181840..2833ec6 100644
--- a/arch/arm/src/armv6-m/arm_switchcontext.S
+++ b/arch/arm/src/armv6-m/arm_switchcontext.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,26 +28,26 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.cpu cortex-m0
.file "arm_switchcontext.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_switchcontext
*
* Description:
@@ -59,7 +59,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.align 2
.code 16
diff --git a/arch/arm/src/armv6-m/exc_return.h b/arch/arm/src/armv6-m/exc_return.h
index b9391a1..007cb22 100644
--- a/arch/arm/src/armv6-m/exc_return.h
+++ b/arch/arm/src/armv6-m/exc_return.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/exc_return.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,73 +16,75 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV6_M_EXC_RETURN_H
#define __ARCH_ARM_SRC_ARMV6_M_EXC_RETURN_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* The processor saves an EXC_RETURN value to the LR on exception entry. The
* exception mechanism relies on this value to detect when the processor has
* completed an exception handler.
*
- * Bits [31:4] of an EXC_RETURN value are always 1. When the processor loads a
- * value matching this pattern to the PC it detects that the operation is a not
- * a normal branch operation and instead, that the exception is complete.
+ * Bits [31:4] of an EXC_RETURN value are always 1. When the processor loads
+ * a value matching this pattern to the PC it detects that the operation is a
+ * not a normal branch operation and instead, that the exception is complete.
* Therefore, it starts the exception return sequence.
*
- * Bits[3:0] of the EXC_RETURN value indicate the required return stack and eventual
- * processor mode. The remaining bits of the EXC_RETURN value should be set to 1.
+ * Bits[3:0] of the EXC_RETURN value indicate the required return stack and
+ * eventual processor mode.
+ *
+ * The remaining bits of the EXC_RETURN value should be set to 1.
*/
/* EXC_RETURN_BASE: Bits that are always set in an EXC_RETURN value. */
#define EXC_RETURN_BASE 0xfffffff1
-/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the hardware
- * context using the process stack pointer (if not set, the context was saved
- * using the main stack pointer)
+/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the
+ * hardware context using the process stack pointer (if not set, the context
+ * was saved using the main stack pointer)
*/
#define EXC_RETURN_PROCESS_BITNO (2)
#define EXC_RETURN_PROCESS_STACK (1 << EXC_RETURN_PROCESS_BITNO)
-/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not set,
- * return stays in handler mode).
+/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode
+ * (if not set, return stays in handler mode).
*/
#define EXC_RETURN_THREAD_BITNO (3)
#define EXC_RETURN_THREAD_MODE (1 << EXC_RETURN_THREAD_BITNO)
-/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state from
- * the main stack. Execution uses MSP after return.
+/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state
+ * from the main stack. Execution uses MSP after return.
*/
#define EXC_RETURN_HANDLER 0xfffffff1
-/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return gets
- * state from the main stack. Execution uses MSP after return.
+/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return
+ * gets state from the main stack. Execution uses MSP after return.
*/
#define EXC_RETURN_PRIVTHR 0xfffffff9
-/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets
- * state from the process stack. Execution uses PSP after return.
+/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return
+ * gets state from the process stack. Execution uses PSP after return.
*/
#define EXC_RETURN_UNPRIVTHR 0xfffffffd
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV6_M_EXC_RETURN_H */
diff --git a/arch/arm/src/armv6-m/nvic.h b/arch/arm/src/armv6-m/nvic.h
index cfd1935..a26c7ed 100644
--- a/arch/arm/src/armv6-m/nvic.h
+++ b/arch/arm/src/armv6-m/nvic.h
@@ -1,4 +1,4 @@
-/****************************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/nvic.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,23 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ****************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV6_M_NVIC_H
#define __ARCH_ARM_SRC_COMMON_ARMV6_M_NVIC_H
-/****************************************************************************************************
+/****************************************************************************
* Included Files
- ****************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
-/****************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ****************************************************************************************************/
+ ****************************************************************************/
-/* Base addresses ***********************************************************************************/
+/* Base addresses ***********************************************************/
#define ARMV6M_SYSCON1_BASE 0xe000e008 /* 0xe000e008-0xe000e00f System Control Block */
/* 0xe000e010-0xe000e01f Reserved */
@@ -41,7 +41,7 @@
#define ARMV6M_SYSCON2_BASE 0xe000ed00 /* 0xe000ed00-0xe000ed3f System Control Block */
#define ARMV6M_NVIC2_BASE 0xe000ef00 /* 0xe000ef00-0xe000ef03 Nested Vectored Interrupt Controller */
-/* NVIC register offsets ****************************************************************************/
+/* NVIC register offsets ****************************************************/
/* NVIC register offsets (all relative to ARMV6M_NVIC1_BASE) */
@@ -77,7 +77,7 @@
#define ARMV6M_SYSTICK_CVR_OFFSET 0x0008 /* SysTick current value register */
#define ARMV6M_SYSTICK_CALIB_OFFSET 0x000c /* SysTick calibration value register */
-/* Register addresses *******************************************************************************/
+/* Register addresses *******************************************************/
/* NVIC register addresses */
@@ -113,7 +113,7 @@
#define ARMV6M_SYSTICK_CVR (ARMV6M_SYSTICK_BASE+ARMV6M_SYSTICK_CVR_OFFSET)
#define ARMV6M_SYSTICK_CALIB (ARMV6M_SYSTICK_BASE+ARMV6M_SYSTICK_CALIB_OFFSET)
-/* Register bit definitions *************************************************************************/
+/* Register bit definitions *************************************************/
/* Interrupt set-enable register */
@@ -347,13 +347,13 @@
#define SYSTICK_CALIB_SKEW (1 << 30) /* Bit 30: TENMS value is exact */
#define SYSTICK_CALIB_NOREF (1 << 31) /* Bit 31: Device provides a reference clock */
-/****************************************************************************************************
+/****************************************************************************
* Public Types
- ****************************************************************************************************/
+ ****************************************************************************/
-/****************************************************************************************************
+/****************************************************************************
* Public Data
- ****************************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
@@ -365,17 +365,17 @@ extern "C"
#define EXTERN extern
#endif
-/****************************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ****************************************************************************************************/
+ ****************************************************************************/
-/****************************************************************************************************
+/****************************************************************************
* Function: arm_dumpnvic
*
* Description:
* Dump all NVIC and SYSCON registers along with a user message.
*
- ****************************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
void arm_dumpnvic(FAR const char *msg);
diff --git a/arch/arm/src/armv6-m/psr.h b/arch/arm/src/armv6-m/psr.h
index ea08383..71c4347 100644
--- a/arch/arm/src/armv6-m/psr.h
+++ b/arch/arm/src/armv6-m/psr.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/psr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H
#define __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* Application Program Status Register (APSR) */
@@ -55,8 +55,8 @@
#define ARMV6M_XPSR_Z ARMV6M_APSR_Z
#define ARMV6M_XPSR_N ARMV6M_APSR_N
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H */
diff --git a/arch/arm/src/armv6-m/svcall.h b/arch/arm/src/armv6-m/svcall.h
index 5441a45..74dff16 100644
--- a/arch/arm/src/armv6-m/svcall.h
+++ b/arch/arm/src/armv6-m/svcall.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/svcall.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV6_M_SVCALL_H
#define __ARCH_ARM_SRC_ARMV6_M_SVCALL_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -31,15 +31,17 @@
# include <syscall.h>
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************/
+/* Configuration ************************************************************/
-/* This logic uses three system calls {0,1,2} for context switching and one for the
- * syscall return. So a minimum of four syscall values must be reserved. If
- * CONFIG_BUILD_PROTECTED is defined, then four more syscall values must be reserved.
+/* This logic uses three system calls {0,1,2} for context switching and one
+ * for the syscall return.
+ * So a minimum of four syscall values must be reserved.
+ * If CONFIG_BUILD_PROTECTED is defined, then four more syscall values must
+ * be reserved.
*/
#ifdef CONFIG_LIB_SYSCALL
@@ -58,7 +60,7 @@
# endif
#endif
-/* Cortex M0 system calls ***********************************************************/
+/* Cortex M0 system calls ***************************************************/
/* SYS call 0:
*
@@ -100,7 +102,8 @@
/* SYS call 5:
*
- * void up_pthread_start(pthread_startroutine_t entrypt, pthread_addr_t arg)
+ * void up_pthread_start(pthread_startroutine_t entrypt,
+ * pthread_addr_t arg)
* noreturn_function
*/
@@ -108,7 +111,8 @@
/* SYS call 6:
*
- * void signal_handler(_sa_sigaction_t sighand, int signo, FAR siginfo_t *info,
+ * void signal_handler(_sa_sigaction_t sighand, int signo,
+ * FAR siginfo_t *info,
* FAR void *ucontext);
*/
@@ -124,8 +128,8 @@
#endif /* CONFIG_BUILD_PROTECTED */
#endif /* CONFIG_LIB_SYSCALL */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV6_M_SVCALL_H */
diff --git a/arch/arm/src/armv6-m/vfork.S b/arch/arm/src/armv6-m/vfork.S
index e67b350..00cddf5 100644
--- a/arch/arm/src/armv6-m/vfork.S
+++ b/arch/arm/src/armv6-m/vfork.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv6-m/vfork.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,33 +16,33 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "arm_vfork.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.cpu cortex-m0
.file "vfork.S"
.globl up_vfork
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: vfork
*
* Description:
@@ -81,7 +81,7 @@
* returned to the parent, no child process is created, and errno is set to
* indicate the error.
*
- ************************************************************************************/
+ ****************************************************************************/
.align 2
.code 16
[incubator-nuttx] 05/09: arch: arm: armv7-a: Author Gregory Nutt:
update licenses to Apache
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 1d1da330da7db08d364933cf54d3d5d84e105383
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:12:29 2021 +0100
arch: arm: armv7-a: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/armv7-a/addrenv.h | 39 ++++++-------------
arch/arm/src/armv7-a/arm.h | 50 ++++++++----------------
arch/arm/src/armv7-a/arm_addrenv.c | 43 +++++++-------------
arch/arm/src/armv7-a/arm_addrenv_kstack.c | 43 +++++++-------------
arch/arm/src/armv7-a/arm_addrenv_ustack.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_addrenv_utils.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_allocpage.c | 40 ++++++-------------
arch/arm/src/armv7-a/arm_blocktask.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_cache.c | 43 +++++++-------------
arch/arm/src/armv7-a/arm_checkmapping.c | 41 ++++++--------------
arch/arm/src/armv7-a/arm_copyarmstate.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_copyfullstate.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_cpuhead.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_cpuidlestack.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_cpuindex.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_cpupause.c | 43 +++++++-------------
arch/arm/src/armv7-a/arm_cpustart.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_dataabort.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_doirq.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_fetchadd.S | 43 +++++++-------------
arch/arm/src/armv7-a/arm_fpuconfig.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_fullcontextrestore.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_gicv2.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_gicv2_dump.c | 43 +++++++-------------
arch/arm/src/armv7-a/arm_head.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_initialstate.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_l2cc_pl310.c | 50 +++++++++---------------
arch/arm/src/armv7-a/arm_mmu.c | 43 +++++++-------------
arch/arm/src/armv7-a/arm_pghead.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_pginitialize.c | 40 ++++++-------------
arch/arm/src/armv7-a/arm_physpgaddr.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_prefetchabort.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_restorefpu.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_savefpu.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_saveusercontext.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_scu.c | 43 +++++++-------------
arch/arm/src/armv7-a/arm_signal_dispatch.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_testset.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_undefinedinsn.c | 39 ++++++-------------
arch/arm/src/armv7-a/arm_va2pte.c | 40 ++++++-------------
arch/arm/src/armv7-a/arm_vectoraddrexcptn.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_vectors.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_vectortab.S | 39 ++++++-------------
arch/arm/src/armv7-a/arm_virtpgaddr.c | 39 ++++++-------------
arch/arm/src/armv7-a/barriers.h | 39 ++++++-------------
arch/arm/src/armv7-a/cp15.h | 56 ++++++++++-----------------
arch/arm/src/armv7-a/crt0.c | 39 ++++++-------------
arch/arm/src/armv7-a/fpu.h | 40 ++++++-------------
arch/arm/src/armv7-a/gic.h | 51 +++++++++---------------
arch/arm/src/armv7-a/gtm.h | 49 ++++++++---------------
arch/arm/src/armv7-a/l2cc.h | 43 +++++++-------------
arch/arm/src/armv7-a/l2cc_pl310.h | 49 ++++++++---------------
arch/arm/src/armv7-a/mmu.h | 50 ++++++++----------------
arch/arm/src/armv7-a/mpcore.h | 49 ++++++++---------------
arch/arm/src/armv7-a/pgalloc.h | 43 +++++++-------------
arch/arm/src/armv7-a/sctlr.h | 50 ++++++++----------------
arch/arm/src/armv7-a/scu.h | 49 ++++++++---------------
arch/arm/src/armv7-a/smp.h | 40 ++++++-------------
58 files changed, 771 insertions(+), 1651 deletions(-)
diff --git a/arch/arm/src/armv7-a/addrenv.h b/arch/arm/src/armv7-a/addrenv.h
index 0dd119b..c724c9b 100644
--- a/arch/arm/src/armv7-a/addrenv.h
+++ b/arch/arm/src/armv7-a/addrenv.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/addrenv.h
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm.h b/arch/arm/src/armv7-a/arm.h
index 47e9254..f351124 100644
--- a/arch/arm/src/armv7-a/arm.h
+++ b/arch/arm/src/armv7-a/arm.h
@@ -1,46 +1,30 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm.h
- * Non-CP15 Registers
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * References:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* References:
* "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1,
* Copyright � 2010 ARM. All rights reserved. ARM DDI 0434B (ID101810)
* "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
* Copyright � 1996-1998, 2000, 2004-2012 ARM. All rights reserved.
* ARM DDI 0406C.b (ID072512)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
+ */
#ifndef __ARCH_ARM_SRC_ARMV7_A_ARM_H
#define __ARCH_ARM_SRC_ARMV7_A_ARM_H
diff --git a/arch/arm/src/armv7-a/arm_addrenv.c b/arch/arm/src/armv7-a/arm_addrenv.c
index 130aca8..edaca12 100644
--- a/arch/arm/src/armv7-a/arm_addrenv.c
+++ b/arch/arm/src/armv7-a/arm_addrenv.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_addrenv.c
*
- * Copyright (C) 2014, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_addrenv_kstack.c b/arch/arm/src/armv7-a/arm_addrenv_kstack.c
index b7fc302..2146837 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_kstack.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_kstack.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_addrenv_kstack.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_addrenv_ustack.c b/arch/arm/src/armv7-a/arm_addrenv_ustack.c
index 6f0fca5..37bf397 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_ustack.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_ustack.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_addrenv_ustack.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_addrenv_utils.c b/arch/arm/src/armv7-a/arm_addrenv_utils.c
index 1244bc2..a713198 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_utils.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_utils.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_addrenv_utils.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_allocpage.c b/arch/arm/src/armv7-a/arm_allocpage.c
index da537e6..211e7e5 100644
--- a/arch/arm/src/armv7-a/arm_allocpage.c
+++ b/arch/arm/src/armv7-a/arm_allocpage.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_allocpage.c
- * Allocate a new page and map it to the fault address of a task.
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_blocktask.c b/arch/arm/src/armv7-a/arm_blocktask.c
index 4f554ff..26a5aad 100644
--- a/arch/arm/src/armv7-a/arm_blocktask.c
+++ b/arch/arm/src/armv7-a/arm_blocktask.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_blocktask.c
*
- * Copyright (C) 2013-2015, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_cache.c b/arch/arm/src/armv7-a/arm_cache.c
index b264be4..860275c 100644
--- a/arch/arm/src/armv7-a/arm_cache.c
+++ b/arch/arm/src/armv7-a/arm_cache.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_cache.c
*
- * Copyright (C) 2014, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_checkmapping.c b/arch/arm/src/armv7-a/arm_checkmapping.c
index 7dc42af..6341940 100644
--- a/arch/arm/src/armv7-a/arm_checkmapping.c
+++ b/arch/arm/src/armv7-a/arm_checkmapping.c
@@ -1,37 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_checkmapping.c
- * Check if the current task's fault address has been mapped into the virtual
- * address space.
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_copyarmstate.c b/arch/arm/src/armv7-a/arm_copyarmstate.c
index a8265e2..2f1aded 100644
--- a/arch/arm/src/armv7-a/arm_copyarmstate.c
+++ b/arch/arm/src/armv7-a/arm_copyarmstate.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_copyarmstate.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_copyfullstate.c b/arch/arm/src/armv7-a/arm_copyfullstate.c
index 1646f6d..e0ef69e 100644
--- a/arch/arm/src/armv7-a/arm_copyfullstate.c
+++ b/arch/arm/src/armv7-a/arm_copyfullstate.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_copyfullstate.c
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_cpuhead.S b/arch/arm/src/armv7-a/arm_cpuhead.S
index eb19627..2d8e7b9 100644
--- a/arch/arm/src/armv7-a/arm_cpuhead.S
+++ b/arch/arm/src/armv7-a/arm_cpuhead.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_cpuhead.S
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_cpuidlestack.c b/arch/arm/src/armv7-a/arm_cpuidlestack.c
index 1acdeae..0dd2885 100644
--- a/arch/arm/src/armv7-a/arm_cpuidlestack.c
+++ b/arch/arm/src/armv7-a/arm_cpuidlestack.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_cpuidlestack.c
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_cpuindex.c b/arch/arm/src/armv7-a/arm_cpuindex.c
index 662b8fe..ddf29b9 100644
--- a/arch/arm/src/armv7-a/arm_cpuindex.c
+++ b/arch/arm/src/armv7-a/arm_cpuindex.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_cpuindex.c
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_cpupause.c b/arch/arm/src/armv7-a/arm_cpupause.c
index 8b2c56f..f813465 100644
--- a/arch/arm/src/armv7-a/arm_cpupause.c
+++ b/arch/arm/src/armv7-a/arm_cpupause.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_cpupause.c
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c
index de6b037..7e86312 100644
--- a/arch/arm/src/armv7-a/arm_cpustart.c
+++ b/arch/arm/src/armv7-a/arm_cpustart.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_cpustart.c
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_dataabort.c b/arch/arm/src/armv7-a/arm_dataabort.c
index 85066b5..1917833 100644
--- a/arch/arm/src/armv7-a/arm_dataabort.c
+++ b/arch/arm/src/armv7-a/arm_dataabort.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_dataabort.c
*
- * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_doirq.c b/arch/arm/src/armv7-a/arm_doirq.c
index dc9c0ead..9edfc71 100644
--- a/arch/arm/src/armv7-a/arm_doirq.c
+++ b/arch/arm/src/armv7-a/arm_doirq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_doirq.c
*
- * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_fetchadd.S b/arch/arm/src/armv7-a/arm_fetchadd.S
index 84b0b7d..1991a6e 100644
--- a/arch/arm/src/armv7-a/arm_fetchadd.S
+++ b/arch/arm/src/armv7-a/arm_fetchadd.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_fetchadd.S
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_fpuconfig.S b/arch/arm/src/armv7-a/arm_fpuconfig.S
index 83db825..3c16a41 100644
--- a/arch/arm/src/armv7-a/arm_fpuconfig.S
+++ b/arch/arm/src/armv7-a/arm_fpuconfig.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_fpuconfig.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_fullcontextrestore.S b/arch/arm/src/armv7-a/arm_fullcontextrestore.S
index 6933183..25c6ece 100644
--- a/arch/arm/src/armv7-a/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv7-a/arm_fullcontextrestore.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_fullcontextrestore.S
*
- * Copyright (C) 2013, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index 7164900..34938c7 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_gicv2.c
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_gicv2_dump.c b/arch/arm/src/armv7-a/arm_gicv2_dump.c
index 92e572c..8fc476f 100644
--- a/arch/arm/src/armv7-a/arm_gicv2_dump.c
+++ b/arch/arm/src/armv7-a/arm_gicv2_dump.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_gicv2_dump.c
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S
index 6025f6d..e1e20f8 100644
--- a/arch/arm/src/armv7-a/arm_head.S
+++ b/arch/arm/src/armv7-a/arm_head.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_head.S
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_initialstate.c b/arch/arm/src/armv7-a/arm_initialstate.c
index cefa8a0..5ce1d28 100644
--- a/arch/arm/src/armv7-a/arm_initialstate.c
+++ b/arch/arm/src/armv7-a/arm_initialstate.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_initialstate.c
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_l2cc_pl310.c b/arch/arm/src/armv7-a/arm_l2cc_pl310.c
index 1a1622f..819a024 100644
--- a/arch/arm/src/armv7-a/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-a/arm_l2cc_pl310.c
@@ -1,43 +1,29 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_l2cc_pl310.c
*
- * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
- * Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
- *
- * NOTE: This logic is incompatible with older versions of the PL310!
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
+/* Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
+ * Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
+ *
+ * NOTE: This logic is incompatible with older versions of the PL310!
+ */
+
/****************************************************************************
* Included Files
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_mmu.c b/arch/arm/src/armv7-a/arm_mmu.c
index 604896a..a3eb80a 100644
--- a/arch/arm/src/armv7-a/arm_mmu.c
+++ b/arch/arm/src/armv7-a/arm_mmu.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_mmu.c
*
- * Copyright (C) 2013, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_pghead.S b/arch/arm/src/armv7-a/arm_pghead.S
index e585047..305e6f8 100644
--- a/arch/arm/src/armv7-a/arm_pghead.S
+++ b/arch/arm/src/armv7-a/arm_pghead.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_pghead.S
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_pginitialize.c b/arch/arm/src/armv7-a/arm_pginitialize.c
index 48c3f00..7ab6494 100644
--- a/arch/arm/src/armv7-a/arm_pginitialize.c
+++ b/arch/arm/src/armv7-a/arm_pginitialize.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_pginitialize.c
- * Initialize the MMU for on-demand paging support.
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_physpgaddr.c b/arch/arm/src/armv7-a/arm_physpgaddr.c
index d00a210..b802cd9 100644
--- a/arch/arm/src/armv7-a/arm_physpgaddr.c
+++ b/arch/arm/src/armv7-a/arm_physpgaddr.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_physpgaddr.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_prefetchabort.c b/arch/arm/src/armv7-a/arm_prefetchabort.c
index 310a1d3..ff9d4fa 100644
--- a/arch/arm/src/armv7-a/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-a/arm_prefetchabort.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_prefetchabort.c
*
- * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_restorefpu.S b/arch/arm/src/armv7-a/arm_restorefpu.S
index aad80ab..8e53120 100644
--- a/arch/arm/src/armv7-a/arm_restorefpu.S
+++ b/arch/arm/src/armv7-a/arm_restorefpu.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv7-a/arm_restorefpu.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_savefpu.S b/arch/arm/src/armv7-a/arm_savefpu.S
index 1967b1c..69bd286 100644
--- a/arch/arm/src/armv7-a/arm_savefpu.S
+++ b/arch/arm/src/armv7-a/arm_savefpu.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv7-a/arm_savefpu.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_saveusercontext.S b/arch/arm/src/armv7-a/arm_saveusercontext.S
index d1cb64b..d7362b2 100644
--- a/arch/arm/src/armv7-a/arm_saveusercontext.S
+++ b/arch/arm/src/armv7-a/arm_saveusercontext.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_saveusercontext.S
*
- * Copyright (C) 2013, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_scu.c b/arch/arm/src/armv7-a/arm_scu.c
index 86955a1..8fb1483 100644
--- a/arch/arm/src/armv7-a/arm_scu.c
+++ b/arch/arm/src/armv7-a/arm_scu.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_scu.c
*
- * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_signal_dispatch.c b/arch/arm/src/armv7-a/arm_signal_dispatch.c
index 7737292..ba7f270 100644
--- a/arch/arm/src/armv7-a/arm_signal_dispatch.c
+++ b/arch/arm/src/armv7-a/arm_signal_dispatch.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_signal_dispatch.c
*
- * Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_testset.S b/arch/arm/src/armv7-a/arm_testset.S
index feb3ea3..aa9df7c 100644
--- a/arch/arm/src/armv7-a/arm_testset.S
+++ b/arch/arm/src/armv7-a/arm_testset.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_testset.S
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_undefinedinsn.c b/arch/arm/src/armv7-a/arm_undefinedinsn.c
index b5c71c1..79b6ec9 100644
--- a/arch/arm/src/armv7-a/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-a/arm_undefinedinsn.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_undefinedinsn.c
*
- * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_va2pte.c b/arch/arm/src/armv7-a/arm_va2pte.c
index f72dc2f..301e420 100644
--- a/arch/arm/src/armv7-a/arm_va2pte.c
+++ b/arch/arm/src/armv7-a/arm_va2pte.c
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_va2pte.c
- * Utility to map a virtual address to a L2 page table entry.
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_vectoraddrexcptn.S b/arch/arm/src/armv7-a/arm_vectoraddrexcptn.S
index 856aabe..0d7806b 100644
--- a/arch/arm/src/armv7-a/arm_vectoraddrexcptn.S
+++ b/arch/arm/src/armv7-a/arm_vectoraddrexcptn.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_vectoraddrexceptn.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_vectors.S b/arch/arm/src/armv7-a/arm_vectors.S
index e055904..8218fbd 100644
--- a/arch/arm/src/armv7-a/arm_vectors.S
+++ b/arch/arm/src/armv7-a/arm_vectors.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv7-a/arm_vectors.S
*
- * Copyright (C) 2013-2014, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_vectortab.S b/arch/arm/src/armv7-a/arm_vectortab.S
index 5f3c547..869d6a4 100644
--- a/arch/arm/src/armv7-a/arm_vectortab.S
+++ b/arch/arm/src/armv7-a/arm_vectortab.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm7-a/arm_vectortab.S
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_virtpgaddr.c b/arch/arm/src/armv7-a/arm_virtpgaddr.c
index 26dc9cc..3fe4950 100644
--- a/arch/arm/src/armv7-a/arm_virtpgaddr.c
+++ b/arch/arm/src/armv7-a/arm_virtpgaddr.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_virtpgaddr.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/barriers.h b/arch/arm/src/armv7-a/barriers.h
index 9823894..874fc56 100644
--- a/arch/arm/src/armv7-a/barriers.h
+++ b/arch/arm/src/armv7-a/barriers.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv7-a/barriers.h
*
- * Copyright (C) 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv7-a/cp15.h b/arch/arm/src/armv7-a/cp15.h
index 8da017b..5e80c78 100644
--- a/arch/arm/src/armv7-a/cp15.h
+++ b/arch/arm/src/armv7-a/cp15.h
@@ -1,46 +1,32 @@
/************************************************************************************
* arch/arm/src/armv7-a/cp15.h
- * CP15 register access
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Authors: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * References:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1, Copyright � 2010
- * ARM. All rights reserved. ARM DDI 0434B (ID101810)
- * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright �
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.b (ID072512)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
+/* References:
+ *
+ * "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1,
+ * Copyright � 2010 ARM. All rights reserved. ARM DDI 0434B (ID101810)
+ * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
+ * Copyright � 1996-1998, 2000, 2004-2012 ARM. All rights reserved.
+ * ARM DDI 0406C.b (ID072512)
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_A_CP15_H
#define __ARCH_ARM_SRC_ARMV7_A_CP15_H
diff --git a/arch/arm/src/armv7-a/crt0.c b/arch/arm/src/armv7-a/crt0.c
index 399ff8e..b842d12 100644
--- a/arch/arm/src/armv7-a/crt0.c
+++ b/arch/arm/src/armv7-a/crt0.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/crt0.c
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/fpu.h b/arch/arm/src/armv7-a/fpu.h
index 9c68c36..134cce9 100644
--- a/arch/arm/src/armv7-a/fpu.h
+++ b/arch/arm/src/armv7-a/fpu.h
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/fpu.h
- * Non-CP15 Registers
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/gic.h b/arch/arm/src/armv7-a/gic.h
index 1bd55c5..6e03ccc 100644
--- a/arch/arm/src/armv7-a/gic.h
+++ b/arch/arm/src/armv7-a/gic.h
@@ -1,45 +1,30 @@
/****************************************************************************
* arch/arm/src/armv7-a/gic.h
- * Generic Interrupt Controller Version 2 Definitions
*
- * Copyright (C) 2016, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Reference:
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* Reference:
* Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
* 0407I (ID091612).
*
* Includes some removed registers from the r2p2 version as well. ARM DDI
* 0407F (ID050110)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
+ */
#ifndef __ARCH_ARM_SRC_ARMV7_A_GIC_H
#define __ARCH_ARM_SRC_ARMV7_A_GIC_H
diff --git a/arch/arm/src/armv7-a/gtm.h b/arch/arm/src/armv7-a/gtm.h
index 4fa10f3..f849026 100644
--- a/arch/arm/src/armv7-a/gtm.h
+++ b/arch/arm/src/armv7-a/gtm.h
@@ -1,43 +1,28 @@
/****************************************************************************
* arch/arm/src/armv7-a/gtm.h
- * Global Timer Definitions
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Reference:
- * Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
- * 0407I (ID091612).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
+/* Reference:
+ * Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
+ * 0407I (ID091612).
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_A_GTM_H
#define __ARCH_ARM_SRC_ARMV7_A_GTM_H
diff --git a/arch/arm/src/armv7-a/l2cc.h b/arch/arm/src/armv7-a/l2cc.h
index 53ad2c4..ad820c3 100644
--- a/arch/arm/src/armv7-a/l2cc.h
+++ b/arch/arm/src/armv7-a/l2cc.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/l2cc.h
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/l2cc_pl310.h b/arch/arm/src/armv7-a/l2cc_pl310.h
index 9e5c5fa..2b0f840 100644
--- a/arch/arm/src/armv7-a/l2cc_pl310.h
+++ b/arch/arm/src/armv7-a/l2cc_pl310.h
@@ -1,44 +1,27 @@
/************************************************************************************
* arch/arm/src/armv7-a/l2cc_pl310.h
*
- * Register definitions for the L2 Cache Controller (L2CC) is based on the
- * L2CC-PL310 ARM multi-way cache macrocell, version r3p2.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
- * Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
+/* Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
+ * Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_A_L2CC_PL310_H
#define __ARCH_ARM_SRC_ARMV7_A_L2CC_PL310_H
diff --git a/arch/arm/src/armv7-a/mmu.h b/arch/arm/src/armv7-a/mmu.h
index 83eb360..ceefef2 100644
--- a/arch/arm/src/armv7-a/mmu.h
+++ b/arch/arm/src/armv7-a/mmu.h
@@ -1,46 +1,30 @@
/************************************************************************************************************
* arch/arm/src/armv7-a/mmu.h
- * CP15 MMU register definitions
*
- * Copyright (C) 2013-2014, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * References:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ************************************************************************************************************/
+
+/* References:
* "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1, Copyright �
* 2010 ARM. All rights reserved. ARM DDI 0434B (ID101810)
* "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright �
* 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM
* DDI 0406C.b (ID072512)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************************************/
+ */
#ifndef __ARCH_ARM_SRC_ARMV7_A_MMU_H
#define __ARCH_ARM_SRC_ARMV7_A_MMU_H
diff --git a/arch/arm/src/armv7-a/mpcore.h b/arch/arm/src/armv7-a/mpcore.h
index 2c1875a..7a3fb7c 100644
--- a/arch/arm/src/armv7-a/mpcore.h
+++ b/arch/arm/src/armv7-a/mpcore.h
@@ -1,43 +1,28 @@
/****************************************************************************
* arch/arm/src/armv7-a/mpcore.h
- * Generic Interrupt Controller Definitions
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Reference:
- * Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
- * 0407I (ID091612).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
+/* Reference:
+ * Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
+ * 0407I (ID091612).
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_A_MPCORE_H
#define __ARCH_ARM_SRC_ARMV7_A_MPCORE_H
diff --git a/arch/arm/src/armv7-a/pgalloc.h b/arch/arm/src/armv7-a/pgalloc.h
index 485cc66..40a98dd 100644
--- a/arch/arm/src/armv7-a/pgalloc.h
+++ b/arch/arm/src/armv7-a/pgalloc.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/pgalloc.h
*
- * Copyright (C) 2014 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/sctlr.h b/arch/arm/src/armv7-a/sctlr.h
index 922c713..7c219fd 100644
--- a/arch/arm/src/armv7-a/sctlr.h
+++ b/arch/arm/src/armv7-a/sctlr.h
@@ -1,45 +1,29 @@
/************************************************************************************
* arch/arm/src/armv7-a/sctlr.h
- * CP15 System Control Registers
*
- * Copyright (C) 2013 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * References:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ************************************************************************************/
+
+/* References:
* "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1, Copyright � 2010
* ARM. All rights reserved. ARM DDI 0434B (ID101810)
* "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright �
* 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.b (ID072512)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ************************************************************************************/
+ */
#ifndef __ARCH_ARM_SRC_ARMV7_A_SCTLR_H
#define __ARCH_ARM_SRC_ARMV7_A_SCTLR_H
diff --git a/arch/arm/src/armv7-a/scu.h b/arch/arm/src/armv7-a/scu.h
index a84fb0c..fd76968 100644
--- a/arch/arm/src/armv7-a/scu.h
+++ b/arch/arm/src/armv7-a/scu.h
@@ -1,43 +1,28 @@
/****************************************************************************
* arch/arm/src/armv7-a/scu.h
- * Generic Interrupt Controller Definitions
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Reference:
- * Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
- * 0407I (ID091612).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
+/* Reference:
+ * Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
+ * 0407I (ID091612).
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_A_SCU_H
#define __ARCH_ARM_SRC_ARMV7_A_SCU_H
diff --git a/arch/arm/src/armv7-a/smp.h b/arch/arm/src/armv7-a/smp.h
index e168ce6..c4e86b2 100644
--- a/arch/arm/src/armv7-a/smp.h
+++ b/arch/arm/src/armv7-a/smp.h
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-a/smp.h
- * Common ARM support for SMP on multi-core CPUs.
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
[incubator-nuttx] 08/09: arch: arm: armv7-r: fix nxstyle errors
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit df7bffe8fdc907b427b41c37c62f11382b0bd1f8
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:14:10 2021 +0100
arch: arm: armv7-r: fix nxstyle errors
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/armv7-r/arm.h | 8 +-
arch/arm/src/armv7-r/arm_dataabort.c | 4 +-
arch/arm/src/armv7-r/arm_gicv2.c | 21 +--
arch/arm/src/armv7-r/arm_head.S | 4 +-
arch/arm/src/armv7-r/arm_l2cc_pl310.c | 35 ++--
arch/arm/src/armv7-r/arm_mpu.c | 7 +-
arch/arm/src/armv7-r/arm_prefetchabort.c | 4 +-
arch/arm/src/armv7-r/arm_restorefpu.S | 20 +--
arch/arm/src/armv7-r/arm_savefpu.S | 24 +--
arch/arm/src/armv7-r/arm_vectors.S | 56 +++----
arch/arm/src/armv7-r/barriers.h | 12 +-
arch/arm/src/armv7-r/cp15.h | 56 ++++---
arch/arm/src/armv7-r/cp15_cacheops.h | 201 ++++++++++++-----------
arch/arm/src/armv7-r/gic.h | 271 ++++++++++++++++---------------
arch/arm/src/armv7-r/l2cc_pl310.h | 38 +++--
arch/arm/src/armv7-r/mpcore.h | 16 +-
arch/arm/src/armv7-r/mpu.h | 9 +-
arch/arm/src/armv7-r/sctlr.h | 185 +++++++++++++--------
arch/arm/src/armv7-r/svcall.h | 28 ++--
19 files changed, 544 insertions(+), 455 deletions(-)
diff --git a/arch/arm/src/armv7-r/arm.h b/arch/arm/src/armv7-r/arm.h
index f609506..530dba4 100644
--- a/arch/arm/src/armv7-r/arm.h
+++ b/arch/arm/src/armv7-r/arm.h
@@ -20,8 +20,9 @@
/* References:
*
- * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.c (ID051414)
+ * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
+ * Copyright 1996-1998, 2000, 2004-2012 ARM.
+ * All rights reserved. ARM DDI 0406C.c (ID051414)
*/
#ifndef __ARCH_ARM_SRC_ARMV7_R_CPSR_H
@@ -52,6 +53,7 @@
# define PSR_MODE_ABT (23 << PSR_MODE_SHIFT) /* Abort mode */
# define PSR_MODE_UND (27 << PSR_MODE_SHIFT) /* Undefined mode */
# define PSR_MODE_SYS (31 << PSR_MODE_SHIFT) /* System mode */
+
#define PSR_T_BIT (1 << 5) /* Bit 5: Thumb execution state bit */
#define PSR_MASK_SHIFT (6) /* Bits 6-8: Mask Bits */
#define PSR_MASK_MASK (7 << PSR_GE_SHIFT)
@@ -116,7 +118,7 @@ extern "C"
* memory resources! We need to be very careful in this case. This
* function will perform MCU- and board-specific initialization which,
* among other things, must initialize memories. After initializatino
- ( of the memories, this function will call arm_data_initialize() to
+ * of the memories, this function will call arm_data_initialize() to
* initialize the memory resources
* 4. This function will then branch to nx_start() to start the operating
* system.
diff --git a/arch/arm/src/armv7-r/arm_dataabort.c b/arch/arm/src/armv7-r/arm_dataabort.c
index cb9a801..51e6cbf 100644
--- a/arch/arm/src/armv7-r/arm_dataabort.c
+++ b/arch/arm/src/armv7-r/arm_dataabort.c
@@ -52,8 +52,8 @@
uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
{
- /* Save the saved processor context in CURRENT_REGS where it can be accessed
- * for register dumps and possibly context switching.
+ /* Save the saved processor context in CURRENT_REGS where it can be
+ * accessed for register dumps and possibly context switching.
*/
CURRENT_REGS = regs;
diff --git a/arch/arm/src/armv7-r/arm_gicv2.c b/arch/arm/src/armv7-r/arm_gicv2.c
index a2ff4d9..f125078 100644
--- a/arch/arm/src/armv7-r/arm_gicv2.c
+++ b/arch/arm/src/armv7-r/arm_gicv2.c
@@ -175,11 +175,11 @@ void arm_gic_initialize(void)
/* Registers with 8-bits per interrupt */
putreg32(0x80808080, GIC_ICDIPR(0)); /* SGI[3:0] priority */
- putreg32(0x80808080, GIC_ICDIPR(4)); /* SGI[4:7] priority */
- putreg32(0x80808080, GIC_ICDIPR(8)); /* SGI[8:11] priority */
- putreg32(0x80808080, GIC_ICDIPR(12)); /* SGI[12:15] priority */
- putreg32(0x80000000, GIC_ICDIPR(24)); /* PPI[0] priority */
- putreg32(0x80808080, GIC_ICDIPR(28)); /* PPI[1:4] priority */
+ putreg32(0x80808080, GIC_ICDIPR(4)); /* SGI[4:7] priority */
+ putreg32(0x80808080, GIC_ICDIPR(8)); /* SGI[8:11] priority */
+ putreg32(0x80808080, GIC_ICDIPR(12)); /* SGI[12:15] priority */
+ putreg32(0x80000000, GIC_ICDIPR(24)); /* PPI[0] priority */
+ putreg32(0x80808080, GIC_ICDIPR(28)); /* PPI[1:4] priority */
/* Set the binary point register.
*
@@ -187,9 +187,10 @@ void arm_gic_initialize(void)
* field; the value n (n=0-6) specifies that bits (n+1) through bit 7 are
* used in the comparison for interrupt pre-emption. A GIC supports a
* minimum of 16 and a maximum of 256 priority levels so not all binary
- * point settings may be meaningul. The special value n=7 (GIC_ICCBPR_NOPREMPT)
- * disables pre-emption. We disable all pre-emption here to prevent nesting
- * of interrupt handling.
+ * point settings may be meaningul.
+ * The special value n=7 (GIC_ICCBPR_NOPREMPT) disables pre-emption.
+ * We disable all pre-emption here to prevent nesting of interrupt
+ * handling.
*/
putreg32(GIC_ICCBPR_NOPREMPT, GIC_ICCBPR);
@@ -403,8 +404,8 @@ uint32_t *arm_decodeirq(uint32_t *regs)
*
* This function implements enabling of the device specified by 'irq'
* at the interrupt controller level if supported by the architecture
- * (up_irq_restore() supports the global level, the device level is hardware
- * specific).
+ * (up_irq_restore() supports the global level, the device level is
+ * hardware specific).
*
* Since this API is not supported on all architectures, it should be
* avoided in common implementations where possible.
diff --git a/arch/arm/src/armv7-r/arm_head.S b/arch/arm/src/armv7-r/arm_head.S
index f42c77d..a1deebc 100644
--- a/arch/arm/src/armv7-r/arm_head.S
+++ b/arch/arm/src/armv7-r/arm_head.S
@@ -33,9 +33,9 @@
#include <arch/board/board.h>
-/**********************************************************************************
+/****************************************************************************
* Configuration
- **********************************************************************************/
+ ****************************************************************************/
/* Hard-coded options */
diff --git a/arch/arm/src/armv7-r/arm_l2cc_pl310.c b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
index 358a70d..de3bfa8 100644
--- a/arch/arm/src/armv7-r/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/arm_l2cc_pl310.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,7 +16,7 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/* Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
* Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
@@ -45,7 +45,9 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
-/* Configuration ***********************************************************/
+
+/* Configuration ************************************************************/
+
/* Number of ways depends on ARM configuration */
#if defined(CONFIG_ARMV7R_ASSOCIATIVITY_8WAY)
@@ -302,17 +304,18 @@ void arm_l2ccinitialize(void)
/* Make sure that this is a PL310 cache, version r3p2.
*
* REVISIT: The SAMA5D4 is supposed to report its ID as 0x410000C8 which is
- * r3p2, but the chip that I have actually* reports 0x410000C9 which is some
- * later revision.
+ * r3p2, but the chip that I have actually* reports 0x410000C9 which is
+ * some later revision.
*/
- //DEBUGASSERT((getreg32(L2CC_IDR) & L2CC_IDR_REV_MASK) == L2CC_IDR_REV_R3P2);
+ /* DEBUGASSERT((getreg32(L2CC_IDR) &
+ * L2CC_IDR_REV_MASK) == L2CC_IDR_REV_R3P2);
+ */
/* Make sure that actual cache configuration agrees with the configured
* cache configuration.
*/
-
#if defined(CONFIG_ARMV7R_ASSOCIATIVITY_8WAY)
DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_ASS) == 0);
#elif defined(CONFIG_ARMV7R_ASSOCIATIVITY_16WAY)
@@ -322,17 +325,23 @@ void arm_l2ccinitialize(void)
#endif
#if defined(CONFIG_ARMV7R_WAYSIZE_16KB)
- DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_16KB);
+ DEBUGASSERT((getreg32(L2CC_ACR) &
+ L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_16KB);
#elif defined(CONFIG_ARMV7R_WAYSIZE_32KB)
- DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_32KB);
+ DEBUGASSERT((getreg32(L2CC_ACR) &
+ L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_32KB);
#elif defined(CONFIG_ARMV7R_WAYSIZE_64KB)
- DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_64KB);
+ DEBUGASSERT((getreg32(L2CC_ACR) &
+ L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_64KB);
#elif defined(CONFIG_ARMV7R_WAYSIZE_128KB)
- DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_128KB);
+ DEBUGASSERT((getreg32(L2CC_ACR) &
+ L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_128KB);
#elif defined(CONFIG_ARMV7R_WAYSIZE_256KB)
- DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_256KB);
+ DEBUGASSERT((getreg32(L2CC_ACR) &
+ L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_256KB);
#elif defined(CONFIG_ARMV7R_WAYSIZE_512KB)
- DEBUGASSERT((getreg32(L2CC_ACR) & L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_512KB);
+ DEBUGASSERT((getreg32(L2CC_ACR) &
+ L2CC_ACR_WAYSIZE_MASK) == L2CC_ACR_WAYSIZE_512KB);
#else
# error No way size selected
#endif
diff --git a/arch/arm/src/armv7-r/arm_mpu.c b/arch/arm/src/armv7-r/arm_mpu.c
index d17bede..5fd3723 100644
--- a/arch/arm/src/armv7-r/arm_mpu.c
+++ b/arch/arm/src/armv7-r/arm_mpu.c
@@ -33,6 +33,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
+
/* Configuration ************************************************************/
#ifndef CONFIG_ARM_MPU_NREGIONS
@@ -121,7 +122,7 @@ static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
}
asize = (size + mask) & ~mask; /* Adjusted size */
- nsrs = asize >> (l2size-3); /* Number of subregions */
+ nsrs = asize >> (l2size - 3); /* Number of subregions */
return g_ms_regionmask[nsrs];
}
@@ -171,8 +172,8 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
mask = 0x1fffffff; /* Shifted mask */
}
- aoffset = offset & ~mask; /* Adjusted offset */
- nsrs = aoffset >> (l2size-3); /* Number of subregions */
+ aoffset = offset & ~mask; /* Adjusted offset */
+ nsrs = aoffset >> (l2size - 3); /* Number of subregions */
return g_ls_regionmask[nsrs];
}
diff --git a/arch/arm/src/armv7-r/arm_prefetchabort.c b/arch/arm/src/armv7-r/arm_prefetchabort.c
index 05b263a..4ae10c6 100644
--- a/arch/arm/src/armv7-r/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-r/arm_prefetchabort.c
@@ -48,8 +48,8 @@
uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
{
- /* Save the saved processor context in CURRENT_REGS where it can be accessed
- * for register dumps and possibly context switching.
+ /* Save the saved processor context in CURRENT_REGS where it can be
+ * accessed for register dumps and possibly context switching.
*/
CURRENT_REGS = regs;
diff --git a/arch/arm/src/armv7-r/arm_restorefpu.S b/arch/arm/src/armv7-r/arm_restorefpu.S
index a4a0ef2..4ffd987 100644
--- a/arch/arm/src/armv7-r/arm_restorefpu.S
+++ b/arch/arm/src/armv7-r/arm_restorefpu.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/arm_restorefpu.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -28,9 +28,9 @@
#ifdef CONFIG_ARCH_FPU
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_restorefpu
@@ -42,13 +42,13 @@
.syntax unified
.file "arm_restorefpu.S"
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
.text
-/************************************************************************************
+/****************************************************************************
* Name: arm_restorefpu
*
* Description:
@@ -66,7 +66,7 @@
* This function does not return anything explicitly. However, it is called from
* interrupt level assembly logic that assumes that r0 is preserved.
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_restorefpu
.type arm_restorefpu, function
diff --git a/arch/arm/src/armv7-r/arm_savefpu.S b/arch/arm/src/armv7-r/arm_savefpu.S
index dc3b102..93bc440 100644
--- a/arch/arm/src/armv7-r/arm_savefpu.S
+++ b/arch/arm/src/armv7-r/arm_savefpu.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/arm_savefpu.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -30,23 +30,23 @@
.file "arm_savefpu.S"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_savefpu
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
.text
-/************************************************************************************
+/****************************************************************************
* Name: arm_savefpu
*
* Description:
@@ -63,7 +63,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_savefpu
.type arm_savefpu, function
diff --git a/arch/arm/src/armv7-r/arm_vectors.S b/arch/arm/src/armv7-r/arm_vectors.S
index fbc7891..a343bed 100644
--- a/arch/arm/src/armv7-r/arm_vectors.S
+++ b/arch/arm/src/armv7-r/arm_vectors.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/arm_vectors.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
@@ -30,13 +30,13 @@
.file "arm_vectors.S"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Private Data
- ************************************************************************************/
+ ****************************************************************************/
.data
g_irqtmp:
@@ -54,27 +54,27 @@ g_fiqtmp:
.word 0 /* Saved spsr */
#endif
-/************************************************************************************
+/****************************************************************************
* Assembly Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Private Functions
- ************************************************************************************/
+ ****************************************************************************/
.text
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectorirq
*
* Description:
* Interrupt exception. Entered in IRQ mode with spsr = SVC CPSR, lr = SVC PC
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_decodeirq
.globl arm_vectorirq
@@ -224,13 +224,13 @@ arm_vectorirq:
.size arm_vectorirq, . - arm_vectorirq
.align 5
-/************************************************************************************
+/****************************************************************************
* Function: arm_vectorsvc
*
* Description:
* SVC interrupt. We enter the SVC in SVC mode.
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_syscall
.globl arm_vectorsvc
@@ -348,7 +348,7 @@ arm_vectorsvc:
.align 5
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectordata
*
* Description:
@@ -357,7 +357,7 @@ arm_vectorsvc:
* current processor state and gives control to data abort handler. This function
* is entered in ABORT mode with spsr = SVC CPSR, lr = SVC PC
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_dataabort
.globl arm_vectordata
@@ -494,7 +494,7 @@ arm_vectordata:
.align 5
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectorprefetch
*
* Description:
@@ -503,7 +503,7 @@ arm_vectordata:
* handler saves the current processor state and gives control to prefetch abort
* handler. This function is entered in ABT mode with spsr = SVC CPSR, lr = SVC PC.
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_prefetchabort
.globl arm_vectorprefetch
@@ -640,14 +640,14 @@ arm_vectorprefetch:
.align 5
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectorundefinsn
*
* Description:
* Undefined instruction entry exception. Entered in UND mode, spsr = SVC CPSR,
* lr = SVC PC
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_undefinedinsn
.globl arm_vectorundefinsn
@@ -781,14 +781,14 @@ arm_vectorundefinsn:
.align 5
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectorfiq
*
* Description:
* Shouldn't happen unless a arm_decodefiq() is provided. FIQ is primarily used
* with the TrustZone feature in order to handle secure interrupts.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_ARMV7R_DECODEFIQ
.globl arm_decodefiq
@@ -938,9 +938,9 @@ arm_vectorfiq:
#endif
.size arm_vectorfiq, . - arm_vectorfiq
-/************************************************************************************
+/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
- ************************************************************************************/
+ ****************************************************************************/
#if CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
diff --git a/arch/arm/src/armv7-r/barriers.h b/arch/arm/src/armv7-r/barriers.h
index d1ff204..7e32a76 100644
--- a/arch/arm/src/armv7-r/barriers.h
+++ b/arch/arm/src/armv7-r/barriers.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/barriers.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* ARMv7-R memory barriers */
diff --git a/arch/arm/src/armv7-r/cp15.h b/arch/arm/src/armv7-r/cp15.h
index 883ac09..8f2d2bd 100644
--- a/arch/arm/src/armv7-r/cp15.h
+++ b/arch/arm/src/armv7-r/cp15.h
@@ -1,15 +1,10 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/cp15.h
* CP15 register access
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gn...@nuttx.org>
*
- * References:
- *
- * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.c (ID051414)
- *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -37,20 +32,27 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
+
+/* References:
+ * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
+ * Copyright 1996-1998, 2000, 2004-2012 ARM.
+ * All rights reserved. ARM DDI 0406C.c (ID051414)
+ */
#ifndef __ARCH_ARM_SRC_ARMV7_R_CP15_H
#define __ARCH_ARM_SRC_ARMV7_R_CP15_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
+
/* System control register descriptions.
*
* CP15 registers are accessed with MRC and MCR instructions as follows:
@@ -107,15 +109,15 @@
#define CP15_DFAR(r) _CP15(0, r, c6, c0, 0) /* Data Fault Address Register */
#define CP15_IFAR(r) _CP15(0, r, c6, c0, 2) /* Instruction Fault Address Register */
-#define CP15_DRBAR(r) _CP15(0, r, c6, c1, 0) /* Data Region Base Address Register */
-#define CP15_DRSR(r) _CP15(0, r, c6, c1, 2) /* Data Region Size and Enable Register */
-#define CP15_DRACR(r) _CP15(0, r, c6, c1, 4) /* Data Region Access Control Register */
+#define CP15_DRBAR(r) _CP15(0, r, c6, c1, 0) /* Data Region Base Address Register */
+#define CP15_DRSR(r) _CP15(0, r, c6, c1, 2) /* Data Region Size and Enable Register */
+#define CP15_DRACR(r) _CP15(0, r, c6, c1, 4) /* Data Region Access Control Register */
#ifndef CONFIG_ARM_HAVE_MPU_UNIFIED
-# define CP15_IRBAR(r) _CP15(0, r, c6, c1, 1) /* Instruction Region Base Address Register */
-# define CP15_IRSR(r) _CP15(0, r, c6, c1, 3) /* Instruction Region Size and Enable Register */
-# define CP15_IRACR(r) _CP15(0, r, c6, c1, 5) /* Instruction Region Access Control Register */
+# define CP15_IRBAR(r) _CP15(0, r, c6, c1, 1) /* Instruction Region Base Address Register */
+# define CP15_IRSR(r) _CP15(0, r, c6, c1, 3) /* Instruction Region Size and Enable Register */
+# define CP15_IRACR(r) _CP15(0, r, c6, c1, 5) /* Instruction Region Access Control Register */
#endif
-#define CP15_RGNR(r) _CP15(0, r, c6, c2, 0) /* MPU Region Number Register */
+#define CP15_RGNR(r) _CP15(0, r, c6, c2, 0) /* MPU Region Number Register */
#define CP15_ICIALLUIS(r) _CP15(0, r, c7, c1, 0) /* Cache Operations Registers */
#define CP15_BPIALLIS(r) _CP15(0, r, c7, c1, 6)
@@ -155,16 +157,16 @@
#define CP15_TPIDRURO(r) _CP15(0, r, c13, c0, 3)
#define CP15_TPIDRPRW(r) _CP15(0, r, c13, c0, 4)
-#define CP15_CNTFRQ(r) _CP15(0, r, c14, c0, 0) /* Counter Frequency register */
-#define CP15_CNTKCTL(r) _CP15(0, r, c14, c1, 0) /* Timer PL1 Control register */
-#define CP15_CNTP_TVAL(r) _CP15(0, r, c14, c2, 0) /* PL1 Physical TimerValue register */
-#define CP15_CNTP_CTL(r) _CP15(0, r, c14, c2, 0) /* PL1 Physical Timer Control register */
-#define CP15_CNTV_TVAL(r) _CP15(0, r, c14, c3, 0) /* Virtual TimerValue register */
-#define CP15_CNTV_CTL(r) _CP15(0, r, c14, c3, 0) /* Virtual Timer Control register */
-#define CP15_CNTPCT(r,n) _CP15(0, r, c14, c14, n) /* 64-bit Physical Count register */
-#define CP15_CNTVCT(r,n) _CP15(1, r, c14, c14, n) /* Virtual Count register */
+#define CP15_CNTFRQ(r) _CP15(0, r, c14, c0, 0) /* Counter Frequency register */
+#define CP15_CNTKCTL(r) _CP15(0, r, c14, c1, 0) /* Timer PL1 Control register */
+#define CP15_CNTP_TVAL(r) _CP15(0, r, c14, c2, 0) /* PL1 Physical TimerValue register */
+#define CP15_CNTP_CTL(r) _CP15(0, r, c14, c2, 0) /* PL1 Physical Timer Control register */
+#define CP15_CNTV_TVAL(r) _CP15(0, r, c14, c3, 0) /* Virtual TimerValue register */
+#define CP15_CNTV_CTL(r) _CP15(0, r, c14, c3, 0) /* Virtual Timer Control register */
+#define CP15_CNTPCT(r,n) _CP15(0, r, c14, c14, n) /* 64-bit Physical Count register */
+#define CP15_CNTVCT(r,n) _CP15(1, r, c14, c14, n) /* Virtual Count register */
#define CP15_CNTP_CVAL(r,n) _CP15(2, r, c14, c14, n) /* PL1 Physical Timer CompareValue register */
#define CP15_CNTV_CVAL(r,n) _CP15(3, r, c14, c14, n) /* Virtual Timer CompareValue register */
-#define CP15_DCIALLU(r) _CP15(0, r, c15, c5, 0) /* Invalidate data cache */
+#define CP15_DCIALLU(r) _CP15(0, r, c15, c5, 0) /* Invalidate data cache */
#endif /* __ARCH_ARM_SRC_ARMV7_R_CP15_H */
diff --git a/arch/arm/src/armv7-r/cp15_cacheops.h b/arch/arm/src/armv7-r/cp15_cacheops.h
index 1713e2e..5b439cf 100644
--- a/arch/arm/src/armv7-r/cp15_cacheops.h
+++ b/arch/arm/src/armv7-r/cp15_cacheops.h
@@ -1,16 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/cp15_cacheops.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * References:
- *
- * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright �
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.c (ID051414)
- *
- * Portions of this file derive from Atmel sample code for the SAMA5D3 Cortex-A5
- * which also has a modified BSD-style license:
+ * Portions of this file derive from Atmel sample code for the SAMA5D3
+ * Cortex-A5 which also has a modified BSD-style license:
*
* Copyright (c) 2012, Atmel Corporation
* All rights reserved.
@@ -42,32 +37,42 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
+
+/* References:
+ *
+ * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
+ * Copyright � 1996-1998, 2000, 2004-2012 ARM. All rights reserved.
+ * ARM DDI 0406C.c (ID051414)
+ */
#ifndef __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H
#define __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
-/* Cache definitions ****************************************************************/
+ ****************************************************************************/
+
+/* Cache definitions ********************************************************/
+
/* L1 Memory */
#define CP15_L1_LINESIZE 32
-/* CP15 Registers *******************************************************************/
+/* CP15 Registers ***********************************************************/
+
/* Terms:
* 1) Point of coherency (PoC)
- * The PoC is the point at which all agents that can access memory are guaranteed
- * to see the same copy of a memory location
+ * The PoC is the point at which all agents that can access memory are
+ * guaranteed to see the same copy of a memory location
* 2) Point of unification (PoU)
* The PoU is the point by which the instruction and data caches and the
- * translation table walks of the processor are guaranteed to see the same copy
- * of a memory location.
+ * translation table walks of the processor are guaranteed to see the same
+ * copy of a memory location.
*
* Cache Operations:
*
@@ -76,12 +81,13 @@
* Register Format: Should be zero (SBZ)
* Instruction: MCR p15, 0, <Rd>, c7, c1, 0
* CP15 Register: BPIALLIS
- * Description: Invalidate entire branch predictor array Inner Shareable.
+ * Description: Invalidate entire branch predictor array Inner
+ * Shareable.
* Register Format: Should be zero (SBZ)
* Instruction: MCR p15, 0, <Rd>, c7, c1, 6
* CP15 Register: ICIALLU
- * Description: Invalidate all instruction caches to PoU. Also flushes branch
- * target cache.
+ * Description: Invalidate all instruction caches to PoU. Also flushes
+ * branch target cache.
* Register Format: Should be zero (SBZ)
* Instruction: MCR p15, 0, <Rd>, c7, c5, 0
* CP15 Register: ICIMVAU
@@ -165,9 +171,10 @@
#define CACHE_SBZ_MASK (31 << TLB_SBZ_SHIFT)
#define CACHE_VA_MASK (0xfffffffe0) /* Bits 5-31: Virtual address */
-/************************************************************************************
+/****************************************************************************
* Assembly Macros
- ************************************************************************************/
+ ****************************************************************************/
+
/* cp15_cache Cache Operations
*
* Usage
@@ -201,7 +208,7 @@
#ifdef __ASSEMBLY__
-/************************************************************************************
+/****************************************************************************
* Name: cp15_enable_dcache
*
* Description:
@@ -213,7 +220,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_enable_dcache, tmp
mrc p15, 0, \tmp, c1, c0, 0 /* Read SCTLR */
@@ -221,7 +228,7 @@
mcr p15, 0, \tmp, c1, c0, 0 /* Update the SCTLR */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_disable_dcache
*
* Description:
@@ -233,7 +240,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_disable_dcache, tmp
mrc p15, 0, \tmp, c1, c0, 0 /* Read SCTLR */
@@ -241,7 +248,7 @@
mcr p15, 0, \tmp, c1, c0, 0 /* Update the SCTLR */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_enable_icache
*
* Description:
@@ -253,7 +260,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_enable_icache, tmp
mrc p15, 0, \tmp, c1, c0, 0 /* Read SCTLR */
@@ -261,7 +268,7 @@
mcr p15, 0, \tmp, c1, c0, 0 /* Update the SCTLR */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_disable_icache
*
* Description:
@@ -273,7 +280,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_disable_icache, tmp
mrc p15, 0, \tmp, c1, c0, 0 /* Read SCTLR */
@@ -281,7 +288,7 @@
mcr p15, 0, \tmp, c1, c0, 0 /* Update the SCTLR */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache_inner_sharable
*
* Description:
@@ -293,14 +300,14 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_icache_inner_sharable, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c1, 0 /* ICIALLUIS */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_btb_inner_sharable
*
* Description:
@@ -312,18 +319,19 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_btb_inner_sharable, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c1, 6 /* BPIALLIS */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache
*
* Description:
- * Invalidate all instruction caches to PoU, also flushes branch target cache
+ * Invalidate all instruction caches to PoU, also flushes branch target
+ * cache
*
* Input Parameters:
* None
@@ -331,14 +339,14 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_icache, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c5, 0 /* ICIALLU */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache_bymva
*
* Description:
@@ -350,13 +358,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_icache_bymva, va
mrc p15, 0, \va, c7, c5, 1 /* ICIMVAU */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_flush_btb
*
* Description:
@@ -368,14 +376,14 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_flush_btb, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c5, 6 /* BPIALL */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_flush_btb_bymva
*
* Description:
@@ -387,14 +395,14 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_flush_btb_bymva, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c5, 7 /* BPIMVA */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_dcacheline_bymva
*
* Description:
@@ -406,13 +414,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_dcacheline_bymva, va
mrc p15, 0, \va, c7, c6, 1 /* DCIMVAC */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_dcacheline_bysetway
*
* Description:
@@ -424,13 +432,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_dcacheline_bysetway, setway
mrc p15, 0, \setway, c7, c6, 2 /* DCISW */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_dcache_bymva
*
* Description:
@@ -442,13 +450,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_clean_dcache_bymva, va
mrc p15, 0, \va, c7, c10, 1 /* DCCMVAC */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_dcache_bysetway
*
* Description:
@@ -460,13 +468,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_clean_dcache_bysetway, setway
mrc p15, 0, \setway, c7, c10, 2 /* DCCSW */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_ucache_bymva
*
* Description:
@@ -478,13 +486,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_clean_ucache_bymva, setway
mrc p15, 0, \setway, c7, c11, 1 /* DCCMVAU */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_cleaninvalidate_dcacheline_bymva
*
* Description:
@@ -496,13 +504,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_cleaninvalidate_dcacheline_bymva, va
mrc p15, 0, \va, c7, c14, 1 /* DCCIMVAC */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_cleaninvalidate_dcacheline
*
* Description:
@@ -514,7 +522,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_cleaninvalidate_dcacheline, setway
mrc p15, 0, \setway, c7, c14, 2 /* DCCISW */
@@ -522,13 +530,13 @@
#endif /* __ASSEMBLY__ */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
-/************************************************************************************
+/****************************************************************************
* Name: cp15_enable_dcache
*
* Description:
@@ -540,7 +548,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_enable_dcache(void)
{
@@ -555,7 +563,7 @@ static inline void cp15_enable_dcache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_disable_dcache
*
* Description:
@@ -567,7 +575,7 @@ static inline void cp15_enable_dcache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_disable_dcache(void)
{
@@ -582,7 +590,7 @@ static inline void cp15_disable_dcache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_enable_icache
*
* Description:
@@ -594,7 +602,7 @@ static inline void cp15_disable_dcache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_enable_icache(void)
{
@@ -609,7 +617,7 @@ static inline void cp15_enable_icache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_disable_icache
*
* Description:
@@ -621,7 +629,7 @@ static inline void cp15_enable_icache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_disable_icache(void)
{
@@ -636,7 +644,7 @@ static inline void cp15_disable_icache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache_inner_sharable
*
* Description:
@@ -648,7 +656,7 @@ static inline void cp15_disable_icache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_icache_inner_sharable(void)
{
@@ -662,7 +670,7 @@ static inline void cp15_invalidate_icache_inner_sharable(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_btb_inner_sharable
*
* Description:
@@ -674,7 +682,7 @@ static inline void cp15_invalidate_icache_inner_sharable(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_btb_inner_sharable(void)
{
@@ -688,11 +696,12 @@ static inline void cp15_invalidate_btb_inner_sharable(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache
*
* Description:
- * Invalidate all instruction caches to PoU, also flushes branch target cache
+ * Invalidate all instruction caches to PoU, also flushes branch target
+ * cache
*
* Input Parameters:
* None
@@ -700,7 +709,7 @@ static inline void cp15_invalidate_btb_inner_sharable(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_icache(void)
{
@@ -714,7 +723,7 @@ static inline void cp15_invalidate_icache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache_bymva
*
* Description:
@@ -726,7 +735,7 @@ static inline void cp15_invalidate_icache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_icache_bymva(unsigned int va)
{
@@ -739,7 +748,7 @@ static inline void cp15_invalidate_icache_bymva(unsigned int va)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_flush_btb
*
* Description:
@@ -751,7 +760,7 @@ static inline void cp15_invalidate_icache_bymva(unsigned int va)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_flush_btb(void)
{
@@ -765,7 +774,7 @@ static inline void cp15_flush_btb(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_flush_btb_bymva
*
* Description:
@@ -777,7 +786,7 @@ static inline void cp15_flush_btb(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_flush_btb_bymva(void)
{
@@ -791,7 +800,7 @@ static inline void cp15_flush_btb_bymva(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_dcacheline_bymva
*
* Description:
@@ -803,7 +812,7 @@ static inline void cp15_flush_btb_bymva(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
/* Invalidate data cache line by VA to PoC */
@@ -818,7 +827,7 @@ static inline void cp15_invalidate_dcacheline_bymva(unsigned int va)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_dcacheline_bysetway
*
* Description:
@@ -830,7 +839,7 @@ static inline void cp15_invalidate_dcacheline_bymva(unsigned int va)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
/* Invalidate data cache line by set/way */
@@ -845,7 +854,7 @@ static inline void cp15_invalidate_dcacheline_bysetway(unsigned int setway)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_dcache_bymva
*
* Description:
@@ -857,7 +866,7 @@ static inline void cp15_invalidate_dcacheline_bysetway(unsigned int setway)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
/* Clean data cache line by MVA */
@@ -872,7 +881,7 @@ static inline void cp15_clean_dcache_bymva(unsigned int va)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_dcache_bysetway
*
* Description:
@@ -884,7 +893,7 @@ static inline void cp15_clean_dcache_bymva(unsigned int va)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_clean_dcache_bysetway(unsigned int setway)
{
@@ -897,7 +906,7 @@ static inline void cp15_clean_dcache_bysetway(unsigned int setway)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_ucache_bymva
*
* Description:
@@ -909,7 +918,7 @@ static inline void cp15_clean_dcache_bysetway(unsigned int setway)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_clean_ucache_bymva(unsigned int setway)
{
@@ -922,7 +931,7 @@ static inline void cp15_clean_ucache_bymva(unsigned int setway)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_cleaninvalidate_dcacheline_bymva
*
* Description:
@@ -934,7 +943,7 @@ static inline void cp15_clean_ucache_bymva(unsigned int setway)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_cleaninvalidate_dcacheline_bymva(unsigned int va)
{
@@ -947,7 +956,7 @@ static inline void cp15_cleaninvalidate_dcacheline_bymva(unsigned int va)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_cleaninvalidate_dcacheline
*
* Description:
@@ -959,7 +968,7 @@ static inline void cp15_cleaninvalidate_dcacheline_bymva(unsigned int va)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_cleaninvalidate_dcacheline(unsigned int setway)
{
diff --git a/arch/arm/src/armv7-r/gic.h b/arch/arm/src/armv7-r/gic.h
index 6b9ddef..17c0fd0 100644
--- a/arch/arm/src/armv7-r/gic.h
+++ b/arch/arm/src/armv7-r/gic.h
@@ -47,65 +47,65 @@
/* 1x32 bit field per register */
-#define GIC_INDEX1(n) (n) /* 1 field per word */
-#define GIC_OFFSET1(n) (GIC_INDEX1(n) << 2) /* 32-bit word offset */
-#define GIC_SHIFT1(n) (0) /* No shift */
-#define GIC_MASK1(n) (0xffffffff) /* Whole word */
+#define GIC_INDEX1(n) (n) /* 1 field per word */
+#define GIC_OFFSET1(n) (GIC_INDEX1(n) << 2) /* 32-bit word offset */
+#define GIC_SHIFT1(n) (0) /* No shift */
+#define GIC_MASK1(n) (0xffffffff) /* Whole word */
/* 2x16 bit field per register */
-#define GIC_INDEX2(n) (n >> 1) /* 2 fields per word */
-#define GIC_OFFSET2(n) (GIC_INDEX2(n) << 2) /* 32-bit word offset */
-#define GIC_SHIFT2(n) (((n) & 1) << 4) /* Shift 16-bits per field */
-#define GIC_MASK2(n) (0xffff << GIC_SHIFT2(n)) /* 16-bit mask */
+#define GIC_INDEX2(n) (n >> 1) /* 2 fields per word */
+#define GIC_OFFSET2(n) (GIC_INDEX2(n) << 2) /* 32-bit word offset */
+#define GIC_SHIFT2(n) (((n) & 1) << 4) /* Shift 16-bits per field */
+#define GIC_MASK2(n) (0xffff << GIC_SHIFT2(n)) /* 16-bit mask */
/* 4x8 bit field per register */
-#define GIC_INDEX4(n) (n >> 2) /* 4 fields per word */
-#define GIC_OFFSET4(n) (GIC_INDEX4(n) << 2) /* 32-bit word offset */
-#define GIC_SHIFT4(n) (((n) & 3) << 3) /* Shift 8-bits per field */
-#define GIC_MASK4(n) (0xff << GIC_SHIFT4(n)) /* 8-bit mask */
+#define GIC_INDEX4(n) (n >> 2) /* 4 fields per word */
+#define GIC_OFFSET4(n) (GIC_INDEX4(n) << 2) /* 32-bit word offset */
+#define GIC_SHIFT4(n) (((n) & 3) << 3) /* Shift 8-bits per field */
+#define GIC_MASK4(n) (0xff << GIC_SHIFT4(n)) /* 8-bit mask */
/* 8x4 bit field per register */
-#define GIC_INDEX8(n) (n >> 3) /* 8 fields per word */
-#define GIC_OFFSET8(n) (GIC_INDEX8(n) << 2) /* 32-bit word offset */
-#define GIC_SHIFT8(n) (((n) & 7) << 2) /* Shift 4-bits per field */
-#define GIC_MASK8(n) (15 << GIC_SHIFT8(n)) /* 4-bit mask */
+#define GIC_INDEX8(n) (n >> 3) /* 8 fields per word */
+#define GIC_OFFSET8(n) (GIC_INDEX8(n) << 2) /* 32-bit word offset */
+#define GIC_SHIFT8(n) (((n) & 7) << 2) /* Shift 4-bits per field */
+#define GIC_MASK8(n) (15 << GIC_SHIFT8(n)) /* 4-bit mask */
/* 16x2 bit field per register */
-#define GIC_INDEX16(n) (n >> 4) /* 16 fields per word */
-#define GIC_OFFSET16(n) (GIC_INDEX16(n) << 2) /* 32-bit word offset */
-#define GIC_SHIFT16(n) (((n) & 15) << 1) /* Shift 2-bits per field */
-#define GIC_MASK16(n) (3 << GIC_SHIFT16(n)) /* 2-bit mask */
+#define GIC_INDEX16(n) (n >> 4) /* 16 fields per word */
+#define GIC_OFFSET16(n) (GIC_INDEX16(n) << 2) /* 32-bit word offset */
+#define GIC_SHIFT16(n) (((n) & 15) << 1) /* Shift 2-bits per field */
+#define GIC_MASK16(n) (3 << GIC_SHIFT16(n)) /* 2-bit mask */
/* 32x1 bit field per register */
-#define GIC_INDEX32(n) (n >> 5) /* 32 fields per word */
-#define GIC_OFFSET32(n) (GIC_INDEX32(n) << 2) /* 32-bit word offset */
-#define GIC_SHIFT32(n) ((n) & 31) /* Shift 1-bit per field */
-#define GIC_MASK32(n) (1U << GIC_SHIFT32(n)) /* 1-bit mask */
+#define GIC_INDEX32(n) (n >> 5) /* 32 fields per word */
+#define GIC_OFFSET32(n) (GIC_INDEX32(n) << 2) /* 32-bit word offset */
+#define GIC_SHIFT32(n) ((n) & 31) /* Shift 1-bit per field */
+#define GIC_MASK32(n) (1U << GIC_SHIFT32(n)) /* 1-bit mask */
/* GIC Register Offsets *****************************************************/
/* Interrupt Interface registers */
-#define GIC_ICCICR_OFFSET 0x0000 /* CPU Interface Control Register */
-#define GIC_ICCPMR_OFFSET 0x0004 /* Interrupt Priority Mask Register */
-#define GIC_ICCBPR_OFFSET 0x0008 /* Binary point Register */
-#define GIC_ICCIAR_OFFSET 0x000c /* Interrupt Acknowledge */
-#define GIC_ICCEOIR_OFFSET 0x0010 /* End of interrupt */
-#define GIC_ICCRPR_OFFSET 0x0014 /* Running interrupt */
-#define GIC_ICCHPIR_OFFSET 0x0018 /* Highest pending interrupt */
-#define GIC_ICCABPR_OFFSET 0x001c /* Aliased Non-secure Binary Point Register */
-#define GIC_ICCIDR_OFFSET 0x00fc /* CPU Interface Implementer ID Register */
+#define GIC_ICCICR_OFFSET 0x0000 /* CPU Interface Control Register */
+#define GIC_ICCPMR_OFFSET 0x0004 /* Interrupt Priority Mask Register */
+#define GIC_ICCBPR_OFFSET 0x0008 /* Binary point Register */
+#define GIC_ICCIAR_OFFSET 0x000c /* Interrupt Acknowledge */
+#define GIC_ICCEOIR_OFFSET 0x0010 /* End of interrupt */
+#define GIC_ICCRPR_OFFSET 0x0014 /* Running interrupt */
+#define GIC_ICCHPIR_OFFSET 0x0018 /* Highest pending interrupt */
+#define GIC_ICCABPR_OFFSET 0x001c /* Aliased Non-secure Binary Point Register */
+#define GIC_ICCIDR_OFFSET 0x00fc /* CPU Interface Implementer ID Register */
/* Distributor Registers */
-#define GIC_ICDDCR_OFFSET 0x0000 /* Distributor Control Register */
-#define GIC_ICDICTR_OFFSET 0x0004 /* Interrupt Controller Type Register */
-#define GIC_ICDIIDR_OFFSET 0x0008 /* Distributor Implementer ID Register */
+#define GIC_ICDDCR_OFFSET 0x0000 /* Distributor Control Register */
+#define GIC_ICDICTR_OFFSET 0x0004 /* Interrupt Controller Type Register */
+#define GIC_ICDIIDR_OFFSET 0x0008 /* Distributor Implementer ID Register */
/* 0x000c-0x007c: Reserved */
@@ -153,7 +153,7 @@
/* PPI Status Register: 0x0d00 */
-#define GIC_ICDPPISR_OFFSET 0x0d00 /* PPI Status Register */
+#define GIC_ICDPPISR_OFFSET 0x0d00 /* PPI Status Register */
/* SPI Status Registers: 0x0d04-0x0d1c */
@@ -163,7 +163,7 @@
/* Software Generated Interrupt Register: 0x0f00 */
-#define GIC_ICDSGIR_OFFSET 0x0f00 /* Software Generated Interrupt Register */
+#define GIC_ICDSGIR_OFFSET 0x0f00 /* Software Generated Interrupt Register */
/* 0x0f0c-0x0fcc: Reserved */
@@ -178,6 +178,7 @@
/* 0x0f04-0x0ffc: Reserved */
/* GIC Register Addresses ***************************************************/
+
/* The Interrupt Controller is a single functional unit that is located in a
* Cortex-A9 MPCore design. There is one interrupt interface per Cortex-A9
* processor. Registers are memory mapped and accessed through a chip-
@@ -222,38 +223,42 @@
/* CPU Interface Control Register -- without security extensions */
-#define GIC_ICCICR_ENABLE (1 << 0) /* Bit 0: Enable the CPU interface for this GIC */
+#define GIC_ICCICR_ENABLE (1 << 0) /* Bit 0: Enable the CPU interface for this GIC */
/* Bits 1-31: Reserved */
-/* CPU Interface Control Register -- with security extensions, non-secure copy */
+/* CPU Interface Control Register -- with security extensions,
+ * non-secure copy
+ */
-#define GIC_ICCICRU_ENABLEGRP1 (1 << 0) /* Bit 0: Enable Group 1 interrupts for the CPU */
+#define GIC_ICCICRU_ENABLEGRP1 (1 << 0) /* Bit 0: Enable Group 1 interrupts for the CPU */
/* Bits 1-4: Reserved */
-#define GIC_ICCICRU_FIQBYPDISGRP1 (1 << 5) /* Bit 5: FIQ disabled for CPU Group 1 */
-#define GIC_ICCICRU_IRQBYPDISGRP1 (1 << 6) /* Bit 6: IRQ disabled for CPU Group 1 */
+#define GIC_ICCICRU_FIQBYPDISGRP1 (1 << 5) /* Bit 5: FIQ disabled for CPU Group 1 */
+#define GIC_ICCICRU_IRQBYPDISGRP1 (1 << 6) /* Bit 6: IRQ disabled for CPU Group 1 */
/* Bits 7-8: Reserved */
-#define GIC_ICCICRU_EOIMODENS (1 << 9) /* Bit 9: Control EIOIR access (non-secure) */
+#define GIC_ICCICRU_EOIMODENS (1 << 9) /* Bit 9: Control EIOIR access (non-secure) */
/* Bits 10-31: Reserved */
-/* CPU Interface Control Register -- with security extensions, secure copy */
+/* CPU Interface Control Register -- with security extensions,
+ * secure copy
+ */
-#define GIC_ICCICRS_ENABLEGRP0 (1 << 0) /* Bit 0: Enable Group 0 interrupts for the CPU */
-#define GIC_ICCICRS_ENABLEGRP1 (1 << 1) /* Bit 1: Enable Group 1 interrupts for the CPU */
-#define GIC_ICCICRS_ACKTCTL (1 << 2) /* Bit 2: Group 1 interrupt activation control */
-#define GIC_ICCICRS_FIQEN (1 << 3) /* Bit 3: Signal Group 0 via FIQ */
-#define GIC_ICCICRS_CBPR (1 << 4) /* Bit 4: Control Group 0/1 Pre-emption */
-#define GIC_ICCICRS_FIQBYPDISGRP0 (1 << 5) /* Bit 5: FIQ disabled for CPU Group 0 */
-#define GIC_ICCICRS_IRQBYPDISGRP0 (1 << 6) /* Bit 6: IRQ disabled for CPU Group 0 */
-#define GIC_ICCICRS_FIQBYPDISGRP1 (1 << 7) /* Bit 5: FIQ disabled for CPU Group 1 */
-#define GIC_ICCICRS_IRQBYPDISGRP1 (1 << 8) /* Bit 6: IRQ disabled for CPU Group 1 */
-#define GIC_ICCICRS_EOIMODES (1 << 9) /* Bit 6: Control EIOIR access (secure) */
-#define GIC_ICCICRS_EOIMODENS (1 << 10) /* Bit 10: Control EIOIR access (non-secure) */
+#define GIC_ICCICRS_ENABLEGRP0 (1 << 0) /* Bit 0: Enable Group 0 interrupts for the CPU */
+#define GIC_ICCICRS_ENABLEGRP1 (1 << 1) /* Bit 1: Enable Group 1 interrupts for the CPU */
+#define GIC_ICCICRS_ACKTCTL (1 << 2) /* Bit 2: Group 1 interrupt activation control */
+#define GIC_ICCICRS_FIQEN (1 << 3) /* Bit 3: Signal Group 0 via FIQ */
+#define GIC_ICCICRS_CBPR (1 << 4) /* Bit 4: Control Group 0/1 Pre-emption */
+#define GIC_ICCICRS_FIQBYPDISGRP0 (1 << 5) /* Bit 5: FIQ disabled for CPU Group 0 */
+#define GIC_ICCICRS_IRQBYPDISGRP0 (1 << 6) /* Bit 6: IRQ disabled for CPU Group 0 */
+#define GIC_ICCICRS_FIQBYPDISGRP1 (1 << 7) /* Bit 5: FIQ disabled for CPU Group 1 */
+#define GIC_ICCICRS_IRQBYPDISGRP1 (1 << 8) /* Bit 6: IRQ disabled for CPU Group 1 */
+#define GIC_ICCICRS_EOIMODES (1 << 9) /* Bit 6: Control EIOIR access (secure) */
+#define GIC_ICCICRS_EOIMODENS (1 << 10) /* Bit 10: Control EIOIR access (non-secure) */
/* Bits 11-31: Reserved */
@@ -274,25 +279,25 @@
* point settings make sense.
*/
-#define GIC_ICCBPR_SHIFT (0) /* Bits 0-2: Binary point */
-#define GIC_ICCBPR_MASK (7 << GIC_ICCBPR_SHIFT)
-#define GIC_ICCBPR_1_7 (0 << GIC_ICCBPR_SHIFT) /* Priority bits [7:1] compared for pre-emption */
-#define GIC_ICCBPR_2_7 (1 << GIC_ICCBPR_SHIFT) /* Priority bits [7:2] compared for pre-emption */
-#define GIC_ICCBPR_3_7 (2 << GIC_ICCBPR_SHIFT) /* Priority bits [7:2] compared for pre-emption */
-#define GIC_ICCBPR_4_7 (3 << GIC_ICCBPR_SHIFT) /* Priority bits [7:2] compared for pre-emption */
-#define GIC_ICCBPR_5_7 (4 << GIC_ICCBPR_SHIFT) /* Priority bits [7:5] compared for pre-emption */
-#define GIC_ICCBPR_6_7 (5 << GIC_ICCBPR_SHIFT) /* Priority bits [7:6] compared for pre-emption */
-#define GIC_ICCBPR_7_7 (6 << GIC_ICCBPR_SHIFT) /* Priority bit [7] compared for pre-emption */
-#define GIC_ICCBPR_NOPREMPT (7 << GIC_ICCBPR_SHIFT) /* No pre-emption is performed */
+#define GIC_ICCBPR_SHIFT (0) /* Bits 0-2: Binary point */
+#define GIC_ICCBPR_MASK (7 << GIC_ICCBPR_SHIFT)
+#define GIC_ICCBPR_1_7 (0 << GIC_ICCBPR_SHIFT) /* Priority bits [7:1] compared for pre-emption */
+#define GIC_ICCBPR_2_7 (1 << GIC_ICCBPR_SHIFT) /* Priority bits [7:2] compared for pre-emption */
+#define GIC_ICCBPR_3_7 (2 << GIC_ICCBPR_SHIFT) /* Priority bits [7:2] compared for pre-emption */
+#define GIC_ICCBPR_4_7 (3 << GIC_ICCBPR_SHIFT) /* Priority bits [7:2] compared for pre-emption */
+#define GIC_ICCBPR_5_7 (4 << GIC_ICCBPR_SHIFT) /* Priority bits [7:5] compared for pre-emption */
+#define GIC_ICCBPR_6_7 (5 << GIC_ICCBPR_SHIFT) /* Priority bits [7:6] compared for pre-emption */
+#define GIC_ICCBPR_7_7 (6 << GIC_ICCBPR_SHIFT) /* Priority bit [7] compared for pre-emption */
+#define GIC_ICCBPR_NOPREMPT (7 << GIC_ICCBPR_SHIFT) /* No pre-emption is performed */
/* Bits 3-31: Reserved */
/* Interrupt Acknowledge Register */
-#define GIC_ICCIAR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
+#define GIC_ICCIAR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
#define GIC_ICCIAR_INTID_MASK (0x3ff << GIC_ICCIAR_INTID_SHIFT)
#define GIC_ICCIAR_INTID(n) ((uint32_t)(n) << GIC_ICCIAR_INTID_SHIFT)
-#define GIC_ICCIAR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
+#define GIC_ICCIAR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCIAR_CPUSRC_MASK (7 << GIC_ICCIAR_CPUSRC_SHIFT)
#define GIC_ICCIAR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCIAR_CPUSRC_SHIFT)
@@ -302,10 +307,10 @@
#define GIC_ICCEOIR_SPURIOUS (0x3ff)
-#define GIC_ICCEOIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
+#define GIC_ICCEOIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
#define GIC_ICCEOIR_INTID_MASK (0x3ff << GIC_ICCEOIR_INTID_SHIFT)
#define GIC_ICCEOIR_INTID(n) ((uint32_t)(n) << GIC_ICCEOIR_INTID_SHIFT)
-#define GIC_ICCEOIR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
+#define GIC_ICCEOIR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCEOIR_CPUSRC_MASK (7 << GIC_ICCEOIR_CPUSRC_SHIFT)
#define GIC_ICCEOIR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCEOIR_CPUSRC_SHIFT)
@@ -315,7 +320,7 @@
/* Bits 0-3: Reserved */
-#define GIC_ICCRPR_PRIO_SHIFT (4) /* Bits 4-7: Priority mask */
+#define GIC_ICCRPR_PRIO_SHIFT (4) /* Bits 4-7: Priority mask */
#define GIC_ICCRPR_PRIO_MASK (15 << GIC_ICCRPR_PRIO_SHIFT)
#define GIC_ICCRPR_PRIO_VALUE(n) ((uint32_t)(n) << GIC_ICCRPR_PRIO_SHIFT)
@@ -323,10 +328,10 @@
/* Highest Pending Interrupt Register */
-#define GIC_ICCHPIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
+#define GIC_ICCHPIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
#define GIC_ICCHPIR_INTID_MASK (0x3ff << GIC_ICCHPIR_INTID_SHIFT)
#define GIC_ICCHPIR_INTID(n) ((uint32_t)(n) << GIC_ICCHPIR_INTID_SHIFT)
-#define GIC_ICCHPIR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
+#define GIC_ICCHPIR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCHPIR_CPUSRC_MASK (7 << GIC_ICCHPIR_CPUSRC_SHIFT)
#define GIC_ICCHPIR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCHPIR_CPUSRC_SHIFT)
@@ -334,46 +339,46 @@
/* CPU Interface Implementer ID Register */
-#define GIC_ICCIDR_IMPL_SHIFT (0) /* Bits 0-11: Implementer */
+#define GIC_ICCIDR_IMPL_SHIFT (0) /* Bits 0-11: Implementer */
#define GIC_ICCIDR_IMPL_MASK (0xfff << GIC_ICCIDR_IMPL_SHIFT)
-#define GIC_ICCIDR_REVISION_SHIFT (12) /* Bits 12-15: Revision number */
+#define GIC_ICCIDR_REVISION_SHIFT (12) /* Bits 12-15: Revision number */
#define GIC_ICCIDR_REVISION_MASK (15 << GIC_ICCIDR_REVISION_SHIFT)
-#define GIC_ICCIDR_ARCHNO_SHIFT (16) /* Bits 16-19: Architecture number */
+#define GIC_ICCIDR_ARCHNO_SHIFT (16) /* Bits 16-19: Architecture number */
#define GIC_ICCIDR_ARCHNO_MASK (15 << GIC_ICCIDR_ARCHNO_SHIFT)
-#define GIC_ICCIDR_PARTNO_SHIFT (20) /* Bits 20-31: Part number */
+#define GIC_ICCIDR_PARTNO_SHIFT (20) /* Bits 20-31: Part number */
#define GIC_ICCIDR_PARTNO_MASK (0xfff << GIC_ICCIDR_PARTNO_SHIFT)
/* Distributor Registers */
/* Distributor Control Register */
-#define GIC_ICDDCR_NONSECENAB (1 << 0) /* Bit 0: Enable distributor for Non-secure interrupts */
-#define GIC_ICDDCR_SECENABLE (1 << 1) /* Bit 1: Enable distributor for Secure interrupts */
+#define GIC_ICDDCR_NONSECENAB (1 << 0) /* Bit 0: Enable distributor for Non-secure interrupts */
+#define GIC_ICDDCR_SECENABLE (1 << 1) /* Bit 1: Enable distributor for Secure interrupts */
/* Bits 2-31: Reserved */
/* Interrupt Controller Type Register */
-#define GIC_ICDICTR_ITLINES_SHIFT (0) /* Bits 0-4: It lines number */
+#define GIC_ICDICTR_ITLINES_SHIFT (0) /* Bits 0-4: It lines number */
#define GIC_ICDICTR_ITLINES_MASK (0x1f << GIC_ICDICTR_ITLINES_SHIFT)
-#define GIC_ICDICTR_CPUNO_SHIFT (5) /* Bits 5-7: CPU number */
+#define GIC_ICDICTR_CPUNO_SHIFT (5) /* Bits 5-7: CPU number */
#define GIC_ICDICTR_CPUNO_MASK (7 << GIC_ICDICTR_CPUNO_SHIFT)
/* Bits 8-9: Reserved */
-#define GIC_ICDICTR_SECEXTNS (1 << 10) /* Bit 10: Number of security domains */
-#define GIC_ICDICTR_LSPI_SHIFT (11) /* Bits 11-15: Number of Lockable Shared Peripheral Interrupts */
+#define GIC_ICDICTR_SECEXTNS (1 << 10) /* Bit 10: Number of security domains */
+#define GIC_ICDICTR_LSPI_SHIFT (11) /* Bits 11-15: Number of Lockable Shared Peripheral Interrupts */
#define GIC_ICDICTR_LSPI_MASK (0x1f << GIC_ICDICTR_LSPI_SHIFT)
/* Bits 16-31: Reserved */
/* Distributor Implementer ID Register */
-#define GIC_ICDIIDR_IMPL_SHIFT (0) /* Bits 0-11: Implementer */
+#define GIC_ICDIIDR_IMPL_SHIFT (0) /* Bits 0-11: Implementer */
#define GIC_ICDIIDR_IMPL_MASK (0xfff << GIC_ICDIIDR_IMPL_SHIFT)
-#define GIC_ICDIIDR_REVISION_SHIFT (12) /* Bits 12-23: Revision number */
+#define GIC_ICDIIDR_REVISION_SHIFT (12) /* Bits 12-23: Revision number */
#define GIC_ICDIIDR_REVISION_MASK (0xfff << GIC_ICDIIDR_REVISION_SHIFT)
-#define GIC_ICDIIDR_VERSION_SHIFT (24) /* Bits 24-31: Iimplementer version */
+#define GIC_ICDIIDR_VERSION_SHIFT (24) /* Bits 24-31: Iimplementer version */
#define GIC_ICDIIDR_VERSION_MASK (0xff << GIC_ICDIIDR_VERSION_SHIFT)
/* Interrupt Security Registers: 0x0080-0x009c */
@@ -382,16 +387,16 @@
/* Interrupt Set-Enable.
*
- * NOTE: In the Cortex-A9 MPCore, SGIs are always enabled. The corresponding bits
- * in the ICDISERn are read as one, write ignored
+ * NOTE: In the Cortex-A9 MPCore, SGIs are always enabled.
+ * The corresponding bits in the ICDISERn are read as one, write ignored
*/
#define GIC_ICDISER_INT(n) GIC_MASK32(n)
/* Interrupt Clear-Enable.
*
- * NOTE: In the Cortex-A9 MPCore, SGIs are always enabled. The corresponding bits
- * in the ICDICERn are read as one, write ignored
+ * NOTE: In the Cortex-A9 MPCore, SGIs are always enabled.
+ * The corresponding bits in the ICDICERn are read as one, write ignored
*/
#define GIC_ICDICER_INT(n) GIC_MASK32(n)
@@ -427,10 +432,10 @@
/* Interrupt Configuration Register */
-#define INT_ICDICFR_NN 0 /* Bit n: 0= N-N Model */
-#define INT_ICDICFR_1N 1 /* Bit n: 1= 1-N Model */
-#define INT_ICDICFR_LEVEL 0 /* Bit n+1: 0=Level sensitive */
-#define INT_ICDICFR_EDGE 2 /* Bit n+2: 1=Edge sensitive */
+#define INT_ICDICFR_NN 0 /* Bit n: 0= N-N Model */
+#define INT_ICDICFR_1N 1 /* Bit n: 1= 1-N Model */
+#define INT_ICDICFR_LEVEL 0 /* Bit n+1: 0=Level sensitive */
+#define INT_ICDICFR_EDGE 2 /* Bit n+2: 1=Edge sensitive */
#define GIC_ICDICFR_ID_SHIFT(n) GIC_SHIFT16(n)
#define GIC_ICDICFR_ID_MASK(n) GIC_MASK16(n)
@@ -438,12 +443,12 @@
/* PPI Status Register */
-#define GIC_ICDPPISR_PPI(n) (1 << ((n) + 11)) /* Bits 11-15: PPI(n) status, n=0-4 */
-#define GIC_ICDPPISR_GTM (1 << 11) /* Bit 11: PPI[0], Global Timer */
-#define GIC_ICDPPISR_NFIQ (1 << 12) /* Bit 12: PPI[1], FIQ, active low */
-#define GIC_ICDPPISR_PTM (1 << 13) /* Bit 13: PPI[2], Private Timer */
-#define GIC_ICDPPISR_PWDT (1 << 14) /* Bit 14: PPI[3], Private Watchdog */
-#define GIC_ICDPPISR_NIRQ (1 << 15) /* Bit 15: PPI[3], IRQ, active low */
+#define GIC_ICDPPISR_PPI(n) (1 << ((n) + 11)) /* Bits 11-15: PPI(n) status, n=0-4 */
+#define GIC_ICDPPISR_GTM (1 << 11) /* Bit 11: PPI[0], Global Timer */
+#define GIC_ICDPPISR_NFIQ (1 << 12) /* Bit 12: PPI[1], FIQ, active low */
+#define GIC_ICDPPISR_PTM (1 << 13) /* Bit 13: PPI[2], Private Timer */
+#define GIC_ICDPPISR_PWDT (1 << 14) /* Bit 14: PPI[3], Private Watchdog */
+#define GIC_ICDPPISR_NIRQ (1 << 15) /* Bit 15: PPI[3], IRQ, active low */
/* SPI Status Registers */
@@ -451,23 +456,23 @@
/* Software Generated Interrupt Register */
-#define GIC_ICDSGIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
+#define GIC_ICDSGIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
#define GIC_ICDSGIR_INTID_MASK (0x3ff << GIC_ICDSGIR_INTID_SHIFT)
#define GIC_ICDSGIR_INTID(n) ((uint32_t)(n) << GIC_ICDSGIR_INTID_SHIFT)
/* Bits 10-15: Reserved */
-#define GIC_ICDSGIR_CPUTARGET_SHIFT (16) /* Bits 16-23: CPU target */
+#define GIC_ICDSGIR_CPUTARGET_SHIFT (16) /* Bits 16-23: CPU target */
#define GIC_ICDSGIR_CPUTARGET_MASK (0xff << GIC_ICDSGIR_CPUTARGET_SHIFT)
#define GIC_ICDSGIR_CPUTARGET(n) ((uint32_t)(n) << GIC_ICDSGIR_CPUTARGET_SHIFT)
/* Bits 26-31: Reserved */
-#define GIC_ICDSGIR_TGTFILTER_SHIFT (24) /* Bits 24-25: Target filter */
-#define GIC_ICDSGIR_TGTFILTER_MASK (3 << GIC_ICDSGIR_TGTFILTER_SHIFT)
-#define GIC_ICDSGIR_TGTFILTER_LIST (0 << GIC_ICDSGIR_TGTFILTER_SHIFT) /* Interrupt sent to CPUs CPU target list */
-#define GIC_ICDSGIR_TGTFILTER_OTHER (1 << GIC_ICDSGIR_TGTFILTER_SHIFT) /* Interrupt is sent to all but requesting CPU */
-#define GIC_ICDSGIR_TGTFILTER_THIS (2 << GIC_ICDSGIR_TGTFILTER_SHIFT) /* Interrupt is sent to requesting CPU only */
+#define GIC_ICDSGIR_TGTFILTER_SHIFT (24) /* Bits 24-25: Target filter */
+#define GIC_ICDSGIR_TGTFILTER_MASK (3 << GIC_ICDSGIR_TGTFILTER_SHIFT)
+#define GIC_ICDSGIR_TGTFILTER_LIST (0 << GIC_ICDSGIR_TGTFILTER_SHIFT) /* Interrupt sent to CPUs CPU target list */
+#define GIC_ICDSGIR_TGTFILTER_OTHER (1 << GIC_ICDSGIR_TGTFILTER_SHIFT) /* Interrupt is sent to all but requesting CPU */
+#define GIC_ICDSGIR_TGTFILTER_THIS (2 << GIC_ICDSGIR_TGTFILTER_SHIFT) /* Interrupt is sent to requesting CPU only */
/* Interrupt IDs ************************************************************/
@@ -498,32 +503,32 @@
* task management.
*/
-#define GIC_IRQ_SGI0 0 /* Software Generated Interrupt (SGI) 0 */
-#define GIC_IRQ_SGI1 1 /* Software Generated Interrupt (SGI) 1 */
-#define GIC_IRQ_SGI2 2 /* Software Generated Interrupt (SGI) 2 */
-#define GIC_IRQ_SGI3 3 /* Software Generated Interrupt (SGI) 3 */
-#define GIC_IRQ_SGI4 4 /* Software Generated Interrupt (SGI) 4 */
-#define GIC_IRQ_SGI5 5 /* Software Generated Interrupt (SGI) 5 */
-#define GIC_IRQ_SGI6 6 /* Software Generated Interrupt (SGI) 6 */
-#define GIC_IRQ_SGI7 7 /* Software Generated Interrupt (SGI) 7 */
-#define GIC_IRQ_SGI8 8 /* Software Generated Interrupt (SGI) 8 */
-#define GIC_IRQ_SGI9 9 /* Software Generated Interrupt (SGI) 9 */
-#define GIC_IRQ_SGI10 10 /* Software Generated Interrupt (SGI) 10 */
-#define GIC_IRQ_SGI11 11 /* Software Generated Interrupt (SGI) 11 */
-#define GIC_IRQ_SGI12 12 /* Software Generated Interrupt (SGI) 12 */
-#define GIC_IRQ_SGI13 13 /* Software Generated Interrupt (SGI) 13 */
-#define GIC_IRQ_SGI14 14 /* Software Generated Interrupt (SGI) 14 */
-#define GIC_IRQ_SGI15 15 /* Software Generated Interrupt (SGI) 15 */
-
-#define GIC_IRQ_GTM 27 /* Global Timer (GTM) PPI(0) */
-#define GIC_IRQ_FIQ 28 /* Fast Interrupt Request (nFIQ) PPI(1) */
-#define GIC_IRQ_PTM 29 /* Private Timer (PTM) PPI(2) */
-#define GIC_IRQ_WDT 30 /* Watchdog Timer (WDT) PPI(3) */
-#define GIC_IRQ_IRQ 31 /* Interrupt Request (nIRQ) PPI(4) */
+#define GIC_IRQ_SGI0 0 /* Software Generated Interrupt (SGI) 0 */
+#define GIC_IRQ_SGI1 1 /* Software Generated Interrupt (SGI) 1 */
+#define GIC_IRQ_SGI2 2 /* Software Generated Interrupt (SGI) 2 */
+#define GIC_IRQ_SGI3 3 /* Software Generated Interrupt (SGI) 3 */
+#define GIC_IRQ_SGI4 4 /* Software Generated Interrupt (SGI) 4 */
+#define GIC_IRQ_SGI5 5 /* Software Generated Interrupt (SGI) 5 */
+#define GIC_IRQ_SGI6 6 /* Software Generated Interrupt (SGI) 6 */
+#define GIC_IRQ_SGI7 7 /* Software Generated Interrupt (SGI) 7 */
+#define GIC_IRQ_SGI8 8 /* Software Generated Interrupt (SGI) 8 */
+#define GIC_IRQ_SGI9 9 /* Software Generated Interrupt (SGI) 9 */
+#define GIC_IRQ_SGI10 10 /* Software Generated Interrupt (SGI) 10 */
+#define GIC_IRQ_SGI11 11 /* Software Generated Interrupt (SGI) 11 */
+#define GIC_IRQ_SGI12 12 /* Software Generated Interrupt (SGI) 12 */
+#define GIC_IRQ_SGI13 13 /* Software Generated Interrupt (SGI) 13 */
+#define GIC_IRQ_SGI14 14 /* Software Generated Interrupt (SGI) 14 */
+#define GIC_IRQ_SGI15 15 /* Software Generated Interrupt (SGI) 15 */
+
+#define GIC_IRQ_GTM 27 /* Global Timer (GTM) PPI(0) */
+#define GIC_IRQ_FIQ 28 /* Fast Interrupt Request (nFIQ) PPI(1) */
+#define GIC_IRQ_PTM 29 /* Private Timer (PTM) PPI(2) */
+#define GIC_IRQ_WDT 30 /* Watchdog Timer (WDT) PPI(3) */
+#define GIC_IRQ_IRQ 31 /* Interrupt Request (nIRQ) PPI(4) */
/* Shared Peripheral Interrupts (SPI) follow */
-#define GIC_IRQ_SPI 32 /* First SPI interrupt ID */
+#define GIC_IRQ_SPI 32 /* First SPI interrupt ID */
/****************************************************************************
* Public Function Prototypes
@@ -659,7 +664,7 @@ int arm_pause_handler(int irq, FAR void *context, FAR void *arg);
#ifdef __cplusplus
}
#endif
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLY__ */
-#endif /* CONFIG_ARMV7R_HAVE_GICv2 */
-#endif /* __ARCH_ARM_SRC_ARMV7_R_GIC_H */
+#endif /* CONFIG_ARMV7R_HAVE_GICv2 */
+#endif /* __ARCH_ARM_SRC_ARMV7_R_GIC_H */
diff --git a/arch/arm/src/armv7-r/l2cc_pl310.h b/arch/arm/src/armv7-r/l2cc_pl310.h
index 5fc6d9c..00c3e22 100644
--- a/arch/arm/src/armv7-r/l2cc_pl310.h
+++ b/arch/arm/src/armv7-r/l2cc_pl310.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/l2cc_pl310.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,7 +16,7 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/* Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
* Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
@@ -25,9 +25,9 @@
#ifndef __ARCH_ARM_SRC_ARMV7_R_L2CC_PL310_H
#define __ARCH_ARM_SRC_ARMV7_R_L2CC_PL310_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -37,10 +37,11 @@
#include "chip/chip.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
-/* General Definitions **************************************************************/
+ ****************************************************************************/
+
+/* General Definitions ******************************************************/
#define PL310_CACHE_LINE_SIZE 32
@@ -50,7 +51,7 @@
# define PL310_NLOCKREGS 1
#endif
-/* L2CC Register Offsets ************************************************************/
+/* L2CC Register Offsets ****************************************************/
#define L2CC_IDR_OFFSET 0x0000 /* Cache ID Register */
#define L2CC_TYPR_OFFSET 0x0004 /* Cache Type Register */
@@ -86,13 +87,15 @@
#define L2CC_CIWR_OFFSET 0x07fc /* Clean Invalidate Way Register */
/* 0x0800-0x08fc Reserved */
-/* Data and Instruction Lockdown registers where n=0-7. The registers for n > 0 are
- * implemented if the option pl310_LOCKDOWN_BY_MASTER is enabled. Otherwise, they are
- * unused
+/* Data and Instruction Lockdown registers where n=0-7.
+ * The registers for n > 0 are implemented if the option
+ * pl310_LOCKDOWN_BY_MASTER is enabled.
+ * Otherwise, they are unused
*/
#define L2CC_DLKR_OFFSET(n) (0x0900 + ((n) << 3)) /* Data Lockdown Register */
#define L2CC_ILKR_OFFSET(n) (0x0904 + ((n) << 3)) /* Instruction Lockdown Register */
+
/* 0x0940-0x0f4c Reserved */
#ifdef CONFIG_PL310_LOCKDOWN_BY_LINE
# define L2CC_LKLN_OFFSET 0x0950 /* Lock Line Enable Register */
@@ -108,7 +111,7 @@
/* 0x0f64-0x0f7c Reserved */
#define L2CC_POWCR_OFFSET 0x0f80 /* Power Control Register */
-/* L2CC Register Addresses **********************************************************/
+/* L2CC Register Addresses **************************************************/
#define L2CC_IDR (L2CC_BASE+L2CC_IDR_OFFSET)
#define L2CC_TYPR (L2CC_BASE+L2CC_TYPR_OFFSET)
@@ -148,7 +151,7 @@
#define L2CC_PCR (L2CC_BASE+L2CC_PCR_OFFSET)
#define L2CC_POWCR (L2CC_BASE+L2CC_POWCR_OFFSET)
-/* L2CC Register Bit Definitions ****************************************************/
+/* L2CC Register Bit Definitions ********************************************/
/* Cache ID Register (32-bit ID) */
@@ -200,6 +203,7 @@
# define L2CC_ACR_FWA_NOALLOC (1 << L2CC_ACR_FWA_SHIFT) /* No allocate */
# define L2CC_ACR_FWA_OVERRIDE (2 << L2CC_ACR_FWA_SHIFT) /* Override AWCACHE attributes */
# define L2CC_ACR_FWA_MAPPED (3 << L2CC_ACR_FWA_SHIFT) /* Internally mapped to 00 */
+
#define L2CC_ACR_CRPOL (1 << 25) /* Bit 25: Cache Replacement Policy */
#define L2CC_ACR_NSLEN (1 << 26) /* Bit 26: Non-Secure Lockdown Enable */
#define L2CC_ACR_NSIAC (1 << 27) /* Bit 27: Non-Secure Interrupt Access Control */
@@ -241,13 +245,13 @@
/* Event Counter 1 Configuration Register */
-
#define L2CC_ECFGR1_EIGEN_SHIFT (0) /* Bits 0-1: Event Counter Interrupt Generation */
#define L2CC_ECFGR1_EIGEN_MASK (3 << L2CC_ECFGR1_EIGEN_SHIFT)
# define L2CC_ECFGR1_EIGEN_INTDIS (0 << L2CC_ECFGR1_EIGEN_SHIFT) /* Disables (default) */
# define L2CC_ECFGR1_EIGEN_INTENINCR (1 << L2CC_ECFGR1_EIGEN_SHIFT) /* Enables with Increment condition */
# define L2CC_ECFGR1_EIGEN_INTENOVER (2 << L2CC_ECFGR1_EIGEN_SHIFT) /* Enables with Overflow condition */
# define L2CC_ECFGR1_EIGEN_INTGENDIS (3 << L2CC_ECFGR1_EIGEN_SHIFT) /* Disables Interrupt generation */
+
#define L2CC_ECFGR1_ESRC_SHIFT (2) /* Bits 2-5: Event Counter Source */
#define L2CC_ECFGR1_ESRC_MASK (15 << L2CC_ECFGR1_ESRC_SHIFT)
# define L2CC_ECFGR1_ESRC_CNTDIS (0 << L2CC_ECFGR1_ESRC_SHIFT) /* Counter Disabled */
@@ -275,6 +279,7 @@
# define L2CC_ECFGR0_EIGEN_INTENINCR (1 << L2CC_ECFGR0_EIGEN_SHIFT) /* Enables with Increment condition */
# define L2CC_ECFGR0_EIGEN_INTENOVER (2 << L2CC_ECFGR0_EIGEN_SHIFT) /* Enables with Overflow condition */
# define L2CC_ECFGR0_EIGEN_INTGENDIS (3 << L2CC_ECFGR0_EIGEN_SHIFT) /* Disables Interrupt generation */
+
#define L2CC_ECFGR0_ESRC_SHIFT (2) /* Bits 2-5: Event Counter Source */
#define L2CC_ECFGR0_ESRC_MASK (15 << L2CC_ECFGR0_ESRC_SHIFT)
# define L2CC_ECFGR0_ESRC_CNTDIS (0 << L2CC_ECFGR0_ESRC_SHIFT) /* Counter Disabled */
@@ -295,10 +300,11 @@
# define L2CC_ECFGR0_ESRC_EPFRCVD (15 << L2CC_ECFGR0_ESRC_SHIFT) /* Source is EPFRCVD */
/* Event Counter 1 Value Register (32-bit value) */
+
/* Event Counter 0 Value Register (32-bit value) */
-/* Interrupt Mask Register, Masked Interrupt Status Register, Raw Interrupt Status
- * Register, and Interrupt Clear Register.
+/* Interrupt Mask Register, Masked Interrupt Status Register,
+ * Raw Interrupt Status Register, and Interrupt Clear Register.
*/
#define L2CC_INT_ECNTR (1 << 0) /* Bit 0: Event Counter 1/0 Overflow Increment */
diff --git a/arch/arm/src/armv7-r/mpcore.h b/arch/arm/src/armv7-r/mpcore.h
index 18e02d4..85f8f79 100644
--- a/arch/arm/src/armv7-r/mpcore.h
+++ b/arch/arm/src/armv7-r/mpcore.h
@@ -30,7 +30,7 @@
* Included Files
****************************************************************************/
-#include "chip.h" /* For CHIP_MPCORE_VBASE */
+#include "chip.h" /* For CHIP_MPCORE_VBASE */
/****************************************************************************
* Pre-processor Definitions
@@ -44,13 +44,15 @@
/* Peripheral Base Offsets **************************************************/
-#define MPCORE_SCU_OFFSET 0x0000 /* 0x0000-0x00fc SCU registers */
-#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt controller interface */
-#define MPCORE_GTM_OFFSET 0x0200 /* 0x0200-0x02ff Global timer */
+#define MPCORE_SCU_OFFSET 0x0000 /* 0x0000-0x00fc SCU registers */
+#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt controller interface */
+#define MPCORE_GTM_OFFSET 0x0200 /* 0x0200-0x02ff Global timer */
+
/* 0x0300-0x05ff Reserved */
-#define MPCORE_PTM_OFFSET 0x0600 /* 0x0600-0x06ff Private timers and watchdogs */
+#define MPCORE_PTM_OFFSET 0x0600 /* 0x0600-0x06ff Private timers and watchdogs */
+
/* 0x0700-0x07ff Reserved */
-#define MPCORE_ICD_OFFSET 0x1000 /* 0x1000-0x1fff Interrupt Distributor */
+#define MPCORE_ICD_OFFSET 0x1000 /* 0x1000-0x1fff Interrupt Distributor */
/* Peripheral Base Addresses ************************************************/
@@ -60,4 +62,4 @@
#define MPCORE_PTM_VBASE (CHIP_MPCORE_VBASE+MPCORE_PTM_OFFSET)
#define MPCORE_ICD_VBASE (CHIP_MPCORE_VBASE+MPCORE_ICD_OFFSET)
-#endif /* __ARCH_ARM_SRC_ARMV7_R_MPCORE_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_R_MPCORE_H */
diff --git a/arch/arm/src/armv7-r/mpu.h b/arch/arm/src/armv7-r/mpu.h
index 00ca72b..e4ccc98 100644
--- a/arch/arm/src/armv7-r/mpu.h
+++ b/arch/arm/src/armv7-r/mpu.h
@@ -89,6 +89,7 @@
# define MPU_RACR_AP_RWRW (3 << MPU_RACR_AP_SHIFT) /* PL0:RW PL1:RW */
# define MPU_RACR_AP_RONO (5 << MPU_RACR_AP_SHIFT) /* PL0:RO PL1:None */
# define MPU_RACR_AP_RORO (6 << MPU_RACR_AP_SHIFT) /* PL0:RO PL1:RO */
+
#define MPU_RACR_XN (1 << 12) /* Bit 12: Instruction access disable */
/* MPU Region Number Register */
@@ -160,8 +161,8 @@ uint8_t mpu_log2regionfloor(size_t size);
*
* Description:
* Given (1) the offset to the beginning of valid data, (2) the size of the
- * memory to be mapped and (2) the log2 size of the mapping to use, determine
- * the minimal sub-region set to span that memory region.
+ * memory to be mapped and (2) the log2 size of the mapping to use,
+ * determine the minimal sub-region set to span that memory region.
*
* Assumption:
* l2size has the same properties as the return value from
@@ -509,8 +510,8 @@ static inline void mpu_priv_noncache(uintptr_t base, size_t size)
MPU_RACR_XN; /* Instruction access disable */
mpu_set_dracr(regval);
- regval = MPU_RASR_ENABLE | /* Enable region */
- MPU_RASR_RSIZE_LOG2((uint32_t)l2size) | /* Region size */
+ regval = MPU_RASR_ENABLE | /* Enable region */
+ MPU_RASR_RSIZE_LOG2((uint32_t)l2size) | /* Region size */
((uint32_t)subregions << MPU_RASR_SRD_SHIFT); /* Sub-regions */
mpu_set_drsr(regval);
}
diff --git a/arch/arm/src/armv7-r/sctlr.h b/arch/arm/src/armv7-r/sctlr.h
index a458852..d5b6039 100644
--- a/arch/arm/src/armv7-r/sctlr.h
+++ b/arch/arm/src/armv7-r/sctlr.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/sctlr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,25 +16,27 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/* References:
*
- * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.c (ID051414)
+ * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
+ * Copyright 1996-1998, 2000, 2004-2012 ARM.
+ * All rights reserved. ARM DDI 0406C.c (ID051414)
*/
#ifndef __ARCH_ARM_SRC_ARMV7_R_SCTLR_H
#define __ARCH_ARM_SRC_ARMV7_R_SCTLR_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
-/* CP15 c0 Registers ****************************************************************/
+ ****************************************************************************/
+
+/* CP15 c0 Registers ********************************************************/
/* Main ID Register (MIDR): CRn=c0, opc1=0, CRm=c0, opc2=0
* TODO: To be provided
@@ -77,26 +79,38 @@
* TODO: To be provided
*/
-/* Memory Model Features Register 0 (ID_MMFR0): CRn=c0, opc1=0, CRm=c1, opc2=4
- * Memory Model Features Register 1 (ID_MMFR1): CRn=c0, opc1=0, CRm=c1, opc2=5
- * Memory Model Features Register 2 (ID_MMFR2): CRn=c0, opc1=0, CRm=c1, opc2=6
- * Memory Model Features Register 3 (ID_MMFR3): CRn=c0, opc1=0, CRm=c1, opc2=7
- * TODO: To be provided
- */
-
-/* Instruction Set Attributes Register 0 (ID_ISAR0): CRn=c0, opc1=0, CRm=c2, opc2=0
- * Instruction Set Attributes Register 1 (ID_ISAR1): CRn=c0, opc1=0, CRm=c2, opc2=1
- * Instruction Set Attributes Register 2 (ID_ISAR2): CRn=c0, opc1=0, CRm=c2, opc2=2
- * Instruction Set Attributes Register 3 (ID_ISAR3): CRn=c0, opc1=0, CRm=c2, opc2=3
- * Instruction Set Attributes Register 4 (ID_ISAR4): CRn=c0, opc1=0, CRm=c2, opc2=4
- * Instruction Set Attributes Register 5 (ID_ISAR5): CRn=c0, opc1=0, CRm=c2, opc2=5
- * Instruction Set Attributes Register 6-7 (ID_ISAR6-7). Reserved.
+/* Memory Model Features Register 0 (ID_MMFR0):
+ * CRn=c0, opc1=0, CRm=c1, opc2=4
+ * Memory Model Features Register 1 (ID_MMFR1):
+ * CRn=c0, opc1=0, CRm=c1, opc2=5
+ * Memory Model Features Register 2 (ID_MMFR2):
+ * CRn=c0, opc1=0, CRm=c1, opc2=6
+ * Memory Model Features Register 3 (ID_MMFR3):
+ * CRn=c0, opc1=0, CRm=c1, opc2=7
+ * TODO: To be provided
+ */
+
+/* Instruction Set Attributes Register 0 (ID_ISAR0):
+ * CRn=c0, opc1=0, CRm=c2, opc2=0
+ * Instruction Set Attributes Register 1 (ID_ISAR1):
+ * CRn=c0, opc1=0, CRm=c2, opc2=1
+ * Instruction Set Attributes Register 2 (ID_ISAR2):
+ * CRn=c0, opc1=0, CRm=c2, opc2=2
+ * Instruction Set Attributes Register 3 (ID_ISAR3):
+ * CRn=c0, opc1=0, CRm=c2, opc2=3
+ * Instruction Set Attributes Register 4 (ID_ISAR4):
+ * CRn=c0, opc1=0, CRm=c2, opc2=4
+ * Instruction Set Attributes Register 5 (ID_ISAR5):
+ * CRn=c0, opc1=0, CRm=c2, opc2=5
+ * Instruction Set Attributes Register 6-7 (ID_ISAR6-7).
+ * Reserved.
* TODO: Others to be provided
*/
/* Reserved: CRn=c0, opc1=0, CRm=c3-c7, opc2=* */
-/* Cache Size Identification Register (CCSIDR): CRn=c0, opc1=1, CRm=c0, opc2=0
+/* Cache Size Identification Register (CCSIDR):
+ * CRn=c0, opc1=1, CRm=c0, opc2=0
* TODO: To be provided
*/
@@ -112,7 +126,8 @@
* TODO: To be provided
*/
-/* CP15 c1 Registers ****************************************************************/
+/* CP15 c1 Registers ********************************************************/
+
/* System Control Register (SCTLR): CRn=c1, opc1=0, CRm=c0, opc2=0
*/
@@ -147,14 +162,17 @@
* Implementation defined
*/
-/* Coprocessor Access Control Register (CPACR): CRn=c1, opc1=0, CRm=c0, opc2=2
+/* Coprocessor Access Control Register (CPACR):
+ * CRn=c1, opc1=0, CRm=c0, opc2=2
* TODO: To be provided
*/
-/* CP15 c2-c4 Registers *************************************************************/
+/* CP15 c2-c4 Registers *****************************************************/
+
/* Not used on ARMv7-R */
-/* CP15 c5 Registers ****************************************************************/
+/* CP15 c5 Registers ********************************************************/
+
/* Data Fault Status Register (DFSR): CRn=c5, opc1=0, CRm=c0, opc2=0
* TODO: To be provided
*/
@@ -171,7 +189,7 @@
* TODO: To be provided
*/
-/* CP15 c6 Registers ****************************************************************/
+/* CP15 c6 Registers ********************************************************/
/* Data Fault Address Register(DFAR): CRn=c6, opc1=0, CRm=c0, opc2=0
*
@@ -180,46 +198,56 @@
/* Instruction Fault Address Register(IFAR): CRn=c6, opc1=0, CRm=c0, opc2=1
*
- * Holds the MVA of the faulting address of the instruction that caused a prefetch
- * abort.
+ * Holds the MVA of the faulting address of the instruction that caused a
+ * prefetch abort.
*/
/* Data Region Base Address Register (DRBAR): CRn=c6, opc1=0, CRm=c1, opc2=0
* TODO: To be provided
*/
-/* Instruction Region Base Address Register (IRBAR): CRn=c6, opc1=0, CRm=c1, opc2=1
+/* Instruction Region Base Address Register (IRBAR):
+ * CRn=c6, opc1=0, CRm=c1, opc2=1
* TODO: To be provided
*/
-/* Data Region Size and Enable Register (DRSR): CRn=c6, opc1=0, CRm=c1, opc2=2
+/* Data Region Size and Enable Register (DRSR):
+ * CRn=c6, opc1=0, CRm=c1, opc2=2
* TODO: To be provided
*/
-/* Instruction Region Size and Enable Register (IRSR): CRn=c6, opc1=0, CRm=c1, opc2=3
+/* Instruction Region Size and Enable Register (IRSR):
+ * CRn=c6, opc1=0, CRm=c1, opc2=3
* TODO: To be provided
*/
-/* Data Region Access Control Register (DRACR): CRn=c6, opc1=0, CRm=c1, opc2=4
+/* Data Region Access Control Register (DRACR):
+ * CRn=c6, opc1=0, CRm=c1, opc2=4
* TODO: To be provided
*/
-/* Instruction Region Access Control Register (IRACR): CRn=c6, opc1=0, CRm=c1, opc2=5
+/* Instruction Region Access Control Register (IRACR):
+ * CRn=c6, opc1=0, CRm=c1, opc2=5
* TODO: To be provided
*/
-/* MPU Region Number Register (RGNR): CRn=c6, opc1=0, CRm=c2, opc2=0
+/* MPU Region Number Register (RGNR):
+ * CRn=c6, opc1=0, CRm=c2, opc2=0
* TODO: To be provided
*/
-/* CP15 c7 Registers ****************************************************************/
+/* CP15 c7 Registers ********************************************************/
+
/* See cp15_cacheops.h */
-/* CP15 c8 Registers ****************************************************************/
+/* CP15 c8 Registers ********************************************************/
+
/* Not used on ARMv7-R */
-/* CP15 c9 Registers ****************************************************************/
-/* 32-bit Performance Monitors Control Register (PMCR): CRn=c9, opc1=0, CRm=c12, opc2=0
+/* CP15 c9 Registers ********************************************************/
+
+/* 32-bit Performance Monitors Control Register (PMCR):
+ * CRn=c9, opc1=0, CRm=c12, opc2=0
* TODO: To be provided
*/
@@ -236,68 +264,84 @@
#define PCMR_IMP_SHIFT (24) /* Bits 24-31: Implementer code */
#define PCMR_IMP_MASK (0xff << PCMR_IMP_SHIFT)
-/* 32-bit Performance Monitors Count Enable Set register (PMCNTENSET): CRn=c9, opc1=0, CRm=c12, opc2=1
+/* 32-bit Performance Monitors Count Enable Set register (PMCNTENSET):
+ * CRn=c9, opc1=0, CRm=c12, opc2=1
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Count Enable Clear register (PMCNTENCLR): CRn=c9, opc1=0, CRm=c12, opc2=2
+/* 32-bit Performance Monitors Count Enable Clear register (PMCNTENCLR):
+ * CRn=c9, opc1=0, CRm=c12, opc2=2
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Overflow Flag Status Register (PMOVSR): CRn=c9, opc1=0, CRm=c12, opc2=3
+/* 32-bit Performance Monitors Overflow Flag Status Register (PMOVSR):
+ * CRn=c9, opc1=0, CRm=c12, opc2=3
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Software Increment register (PMSWINC): CRn=c9, opc1=0, CRm=c12, opc2=4
+/* 32-bit Performance Monitors Software Increment register (PMSWINC):
+ * CRn=c9, opc1=0, CRm=c12, opc2=4
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Event Counter Selection Register (PMSELR): CRn=c9, opc1=0, CRm=c12, opc2=5
+/* 32-bit Performance Monitors Event Counter Selection Register (PMSELR):
+ * CRn=c9, opc1=0, CRm=c12, opc2=5
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Common Event Identification (PMCEID0): CRn=c9, opc1=0, CRm=c12, opc2=6
+/* 32-bit Performance Monitors Common Event Identification (PMCEID0):
+ * CRn=c9, opc1=0, CRm=c12, opc2=6
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Common Event Identification (PMCEID1): CRn=c9, opc1=0, CRm=c12, opc2=7
+/* 32-bit Performance Monitors Common Event Identification (PMCEID1):
+ * CRn=c9, opc1=0, CRm=c12, opc2=7
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Cycle Count Register (PMCCNTR): CRn=c9, opc1=0, CRm=c13, opc2=0
+/* 32-bit Performance Monitors Cycle Count Register (PMCCNTR):
+ * CRn=c9, opc1=0, CRm=c13, opc2=0
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Event Type Select Register (PMXEVTYPER): CRn=c9, opc1=0, CRm=c13, opc2=1
+/* 32-bit Performance Monitors Event Type Select Register (PMXEVTYPER):
+ * CRn=c9, opc1=0, CRm=c13, opc2=1
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Event Count Register (PMXEVCNTR): CRn=c9, opc1=0, CRm=c13, opc2=2
+/* 32-bit Performance Monitors Event Count Register (PMXEVCNTR):
+ * CRn=c9, opc1=0, CRm=c13, opc2=2
* TODO: To be provided
*/
-/* 32-bit Performance Monitors User Enable Register (PMUSERENR): CRn=c9, opc1=0, CRm=c14, opc2=0
+/* 32-bit Performance Monitors User Enable Register (PMUSERENR):
+ * CRn=c9, opc1=0, CRm=c14, opc2=0
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Interrupt Enable Set register (PMINTENSET): CRn=c9, opc1=0, CRm=c14, opc2=1
+/* 32-bit Performance Monitors Interrupt Enable Set register (PMINTENSET):
+ * CRn=c9, opc1=0, CRm=c14, opc2=1
* TODO: To be provided
*/
-/* 32-bit Performance Monitors Interrupt Enable Clear register (PMINTENCLR): CRn=c9, opc1=0, CRm=c14, opc2=2
+/* 32-bit Performance Monitors Interrupt Enable Clear register (PMINTENCLR):
+ * CRn=c9, opc1=0, CRm=c14, opc2=2
* TODO: To be provided
*/
-/* CP15 c10 Registers ***************************************************************/
+/* CP15 c10 Registers *******************************************************/
+
/* Not used on ARMv7-R */
-/* CP15 c11 Registers ***************************************************************/
+/* CP15 c11 Registers *******************************************************/
+
/* Reserved for implementation defined DMA functions */
-/* CP15 c12 Registers ***************************************************************/
+/* CP15 c12 Registers *******************************************************/
+
/* Not used on ARMv7-R */
-/* CP15 c13 Registers ***************************************************************/
+/* CP15 c13 Registers *******************************************************/
/* Context ID Register (CONTEXTIDR): CRn=c13, opc1=0, CRm=c0, opc2=1
* 32-Bit ContextID value.
@@ -315,7 +359,7 @@
* TODO: To be provided
*/
-/* CP15 c14 Registers ***************************************************************/
+/* CP15 c14 Registers *******************************************************/
/* Counter Frequency register (CNTFRQ): CRn=c14, opc1=0, CRm=c0, opc2=0
* TODO: To be provided
@@ -325,11 +369,13 @@
* TODO: To be provided
*/
-/* PL1 Physical TimerValue register (CNTP_TVAL): CRn=c14, opc1=0, CRm=c2, opc2=0
+/* PL1 Physical TimerValue register (CNTP_TVAL):
+ * CRn=c14, opc1=0, CRm=c2, opc2=0
* TODO: To be provided
*/
-/* PL1 Physical Timer Control register (CNTP_CTL): CRn=c14, opc1=0, CRm=c2, opc2=0
+/* PL1 Physical Timer Control register (CNTP_CTL):
+ * CRn=c14, opc1=0, CRm=c2, opc2=0
* TODO: To be provided
*/
@@ -349,20 +395,23 @@
* TODO: To be provided
*/
-/* PL1 Physical Timer CompareValue register (CNTP_CVAL): CRn=c14, opc1=2, CRm=c14, opc2=n
+/* PL1 Physical Timer CompareValue register (CNTP_CVAL):
+ * CRn=c14, opc1=2, CRm=c14, opc2=n
* TODO: To be provided
*/
-/* Virtual Timer CompareValue register (CNTV_CVAL): CRn=c14, opc1=3, CRm=c14, opc2=n
+/* Virtual Timer CompareValue register (CNTV_CVAL):
+ * CRn=c14, opc1=3, CRm=c14, opc2=n
* TODO: To be provided
*/
-/* CP15 c15 Registers ***************************************************************/
+/* CP15 c15 Registers *******************************************************/
+
/* Implementation defined */
-/************************************************************************************
+/****************************************************************************
* Assembly Macros
- ************************************************************************************/
+ ****************************************************************************/
#ifdef __ASSEMBLY__
@@ -391,9 +440,9 @@
.endm
#endif /* __ASSEMBLY__ */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
diff --git a/arch/arm/src/armv7-r/svcall.h b/arch/arm/src/armv7-r/svcall.h
index 51a5d26..0b9a049 100644
--- a/arch/arm/src/armv7-r/svcall.h
+++ b/arch/arm/src/armv7-r/svcall.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-r/svcall.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7_R_SVCALL_H
#define __ARCH_ARM_SRC_ARMV7_R_SVCALL_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -33,14 +33,15 @@
#ifdef CONFIG_LIB_SYSCALL
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************/
+/* Configuration ************************************************************/
-/* This logic uses one system call for the syscall return. So a minimum of one
- * syscall values must be reserved. If CONFIG_BUILD_PROTECTED is defined, then four
+/* This logic uses one system call for the syscall return.
+ * So a minimum of one syscall values must be reserved.
+ * If CONFIG_BUILD_PROTECTED is defined, then four
* more syscall values must be reserved.
*/
@@ -58,7 +59,7 @@
# endif
#endif
-/* Cortex-R system calls ************************************************************/
+/* Cortex-R system calls ****************************************************/
/* SYS call 0:
*
@@ -93,7 +94,8 @@
/* SYS call 4:
*
- * void signal_handler(_sa_sigaction_t sighand, int signo, FAR siginfo_t *info,
+ * void signal_handler(_sa_sigaction_t sighand, int signo,
+ * FAR siginfo_t *info,
* FAR void *ucontext);
*/
@@ -108,9 +110,9 @@
#endif /* CONFIG_BUILD_PROTECTED */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* CONFIG_LIB_SYSCALL */
#endif /* __ARCH_ARM_SRC_ARMV7_R_SVCALL_H */
[incubator-nuttx] 06/09: arch: arm: armv7-a: fix nxstyle errors
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 3ea545e7f32067b06987aae042802c3faa098e20
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:12:51 2021 +0100
arch: arm: armv7-a: fix nxstyle errors
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/armv7-a/arm.h | 1 +
arch/arm/src/armv7-a/arm_addrenv.c | 4 +-
arch/arm/src/armv7-a/arm_addrenv_utils.c | 4 +-
arch/arm/src/armv7-a/arm_allocpage.c | 31 ++--
arch/arm/src/armv7-a/arm_checkmapping.c | 6 +-
arch/arm/src/armv7-a/arm_cpuhead.S | 4 +-
arch/arm/src/armv7-a/arm_cpuindex.c | 2 +-
arch/arm/src/armv7-a/arm_dataabort.c | 12 +-
arch/arm/src/armv7-a/arm_doirq.c | 2 +-
arch/arm/src/armv7-a/arm_head.S | 4 +-
arch/arm/src/armv7-a/arm_pghead.S | 5 +-
arch/arm/src/armv7-a/arm_pginitialize.c | 4 +-
arch/arm/src/armv7-a/arm_physpgaddr.c | 19 +-
arch/arm/src/armv7-a/arm_prefetchabort.c | 32 ++--
arch/arm/src/armv7-a/arm_restorefpu.S | 20 +--
arch/arm/src/armv7-a/arm_savefpu.S | 24 +--
arch/arm/src/armv7-a/arm_vectors.S | 68 +++----
arch/arm/src/armv7-a/barriers.h | 12 +-
arch/arm/src/armv7-a/cp15.h | 13 +-
arch/arm/src/armv7-a/cp15_cacheops.h | 208 +++++++++++-----------
arch/arm/src/armv7-a/crt0.c | 2 +
arch/arm/src/armv7-a/gic.h | 59 ++++++-
arch/arm/src/armv7-a/gtm.h | 2 +
arch/arm/src/armv7-a/l2cc_pl310.h | 31 ++--
arch/arm/src/armv7-a/mmu.h | 292 +++++++++++++++++--------------
arch/arm/src/armv7-a/pgalloc.h | 2 +-
arch/arm/src/armv7-a/sctlr.h | 97 +++++++---
arch/arm/src/armv7-a/scu.h | 2 +-
arch/arm/src/armv7-a/svcall.h | 29 +--
29 files changed, 565 insertions(+), 426 deletions(-)
diff --git a/arch/arm/src/armv7-a/arm.h b/arch/arm/src/armv7-a/arm.h
index f351124..7ef21e1 100644
--- a/arch/arm/src/armv7-a/arm.h
+++ b/arch/arm/src/armv7-a/arm.h
@@ -48,6 +48,7 @@
# define PSR_MODE_HYP (26 << PSR_MODE_SHIFT) /* Hyp mode */
# define PSR_MODE_UND (27 << PSR_MODE_SHIFT) /* Undefined mode */
# define PSR_MODE_SYS (31 << PSR_MODE_SHIFT) /* System mode */
+
#define PSR_T_BIT (1 << 5) /* Bit 5: Thumb execution state bit */
#define PSR_MASK_SHIFT (6) /* Bits 6-8: Mask Bits */
#define PSR_MASK_MASK (7 << PSR_GE_SHIFT)
diff --git a/arch/arm/src/armv7-a/arm_addrenv.c b/arch/arm/src/armv7-a/arm_addrenv.c
index edaca12..a586425 100644
--- a/arch/arm/src/armv7-a/arm_addrenv.c
+++ b/arch/arm/src/armv7-a/arm_addrenv.c
@@ -157,7 +157,9 @@ static int up_addrenv_initdata(uintptr_t l2table)
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
- /* Get the virtual address corresponding to the physical page table address */
+ /* Get the virtual address corresponding to the physical page table
+ * address
+ */
virtptr = (FAR uint32_t *)arm_pgvaddr(l2table);
#else
diff --git a/arch/arm/src/armv7-a/arm_addrenv_utils.c b/arch/arm/src/armv7-a/arm_addrenv_utils.c
index a713198..bd81199 100644
--- a/arch/arm/src/armv7-a/arm_addrenv_utils.c
+++ b/arch/arm/src/armv7-a/arm_addrenv_utils.c
@@ -204,7 +204,9 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
- /* Get the virtual address corresponding to the physical page address */
+ /* Get the virtual address corresponding to the physical page
+ * address
+ */
l2table = (FAR uint32_t *)arm_pgvaddr(paddr);
#else
diff --git a/arch/arm/src/armv7-a/arm_allocpage.c b/arch/arm/src/armv7-a/arm_allocpage.c
index 211e7e5..b5c2a7e 100644
--- a/arch/arm/src/armv7-a/arm_allocpage.c
+++ b/arch/arm/src/armv7-a/arm_allocpage.c
@@ -72,11 +72,11 @@ typedef uint32_t L1ndx_t;
static pgndx_t g_pgndx;
/* After CONFIG_PAGING_NPAGED have been allocated, the pages will be re-used.
- * In order to re-used the page, we will have un-map the page from its previous
- * mapping. In order to that, we need to be able to map a physical address to
- * to an index into the PTE where it was mapped. The following table supports
- * this backward lookup - it is indexed by the page number index, and holds
- * another index to the mapped virtual page.
+ * In order to re-used the page, we will have un-map the page from its
+ * previous mapping. In order to that, we need to be able to map a physical
+ * address to to an index into the PTE where it was mapped. The following
+ * table supports this backward lookup - it is indexed by the page number
+ * index, and holds another index to the mapped virtual page.
*/
static L1ndx_t g_ptemap[CONFIG_PAGING_NPPAGED];
@@ -111,11 +111,12 @@ static bool g_pgwrap;
* NOTE 2: If an in-use page is un-mapped, it may be necessary to flush the
* instruction cache in some architectures.
*
- * NOTE 3: Allocating and filling a page is a two step process. arm_allocpage()
- * allocates the page, and up_fillpage() fills it with data from some non-
- * volatile storage device. This distinction is made because arm_allocpage()
- * can probably be implemented in board-independent logic whereas up_fillpage()
- * probably must be implemented as board-specific logic.
+ * NOTE 3: Allocating and filling a page is a two step process.
+ * arm_allocpage() allocates the page, and up_fillpage() fills it with data
+ * from some non- volatile storage device. This distinction is made because
+ * arm_allocpage() can probably be implemented in board-independent logic
+ * whereas up_fillpage() probably must be implemented as board-specific
+ * logic.
*
* NOTE 4: The initial mapping of vpage should be read-able and write-
* able (but not cached). No special actions will be required of
@@ -181,14 +182,16 @@ int arm_allocpage(FAR struct tcb_s *tcb, FAR void **vpage)
pte = arm_va2pte(oldvaddr);
*pte = 0;
- /* Invalidate the instruction TLB corresponding to the virtual address */
+ /* Invalidate the instruction TLB corresponding to the virtual
+ * address
+ */
tlb_inst_invalidate_single(oldvaddr);
/* I do not believe that it is necessary to flush the I-Cache in this
- * case: The I-Cache uses a virtual address index and, hence, since the
- * NuttX address space is flat, the cached instruction value should be
- * correct even if the page mapping is no longer in place.
+ * case: The I-Cache uses a virtual address index and, hence, since
+ * the NuttX address space is flat, the cached instruction value should
+ * be correct even if the page mapping is no longer in place.
*/
}
diff --git a/arch/arm/src/armv7-a/arm_checkmapping.c b/arch/arm/src/armv7-a/arm_checkmapping.c
index 6341940..f29e40e 100644
--- a/arch/arm/src/armv7-a/arm_checkmapping.c
+++ b/arch/arm/src/armv7-a/arm_checkmapping.c
@@ -51,9 +51,9 @@
* tcb - A reference to the task control block of the task that we believe
* needs to have a page fill. Architecture-specific logic can
* retrieve page fault information from the architecture-specific
- * context information in this TCB and can consult processor resources
- * (page tables or TLBs or ???) to determine if the fill still needs
- * to be performed or not.
+ * context information in this TCB and can consult processor
+ * resources (page tables or TLBs or ???) to determine if the fill
+ * still needs to be performed or not.
*
* Returned Value:
* This function will return true if the mapping is in place and false
diff --git a/arch/arm/src/armv7-a/arm_cpuhead.S b/arch/arm/src/armv7-a/arm_cpuhead.S
index 2d8e7b9..c242b6d 100644
--- a/arch/arm/src/armv7-a/arm_cpuhead.S
+++ b/arch/arm/src/armv7-a/arm_cpuhead.S
@@ -39,9 +39,9 @@
.file "arm_cpuhead.S"
-/**********************************************************************************
+/****************************************************************************
* Configuration
- **********************************************************************************/
+ ****************************************************************************/
/* Hard-coded options */
diff --git a/arch/arm/src/armv7-a/arm_cpuindex.c b/arch/arm/src/armv7-a/arm_cpuindex.c
index ddf29b9..d94f3f9 100644
--- a/arch/arm/src/armv7-a/arm_cpuindex.c
+++ b/arch/arm/src/armv7-a/arm_cpuindex.c
@@ -59,7 +59,7 @@
int up_cpu_index(void)
{
- /* Read the Multiprocessor Affinity Register (MPIDR) */
+ /* Read the Multiprocessor Affinity Register (MPIDR) */
uint32_t mpidr = cp15_rdmpidr();
diff --git a/arch/arm/src/armv7-a/arm_dataabort.c b/arch/arm/src/armv7-a/arm_dataabort.c
index 1917833..4603974 100644
--- a/arch/arm/src/armv7-a/arm_dataabort.c
+++ b/arch/arm/src/armv7-a/arm_dataabort.c
@@ -51,8 +51,8 @@
* additional input values are expected:
*
* dfar - Fault address register. On a data abort, the ARM MMU places the
- * miss virtual address (MVA) into the DFAR register. This is the address
- * of the data which, when accessed, caused the fault.
+ * miss virtual address (MVA) into the DFAR register. This is the
+ * address of the data which, when accessed, caused the fault.
* dfsr - Fault status register. On a data a abort, the ARM MMU places an
* encoded four-bit value, the fault status, along with the four-bit
* encoded domain number, in the data DFSR
@@ -69,8 +69,8 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
struct tcb_s *tcb = this_task();
uint32_t *savestate;
- /* Save the saved processor context in CURRENT_REGS where it can be accessed
- * for register dumps and possibly context switching.
+ /* Save the saved processor context in CURRENT_REGS where it can be
+ * accessed for register dumps and possibly context switching.
*/
savestate = (uint32_t *)CURRENT_REGS;
@@ -147,8 +147,8 @@ segfault:
uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
{
- /* Save the saved processor context in CURRENT_REGS where it can be accessed
- * for register dumps and possibly context switching.
+ /* Save the saved processor context in CURRENT_REGS where it can be
+ * accessed for register dumps and possibly context switching.
*/
CURRENT_REGS = regs;
diff --git a/arch/arm/src/armv7-a/arm_doirq.c b/arch/arm/src/armv7-a/arm_doirq.c
index 9edfc71..6bb476d 100644
--- a/arch/arm/src/armv7-a/arm_doirq.c
+++ b/arch/arm/src/armv7-a/arm_doirq.c
@@ -213,7 +213,7 @@ uint32_t *arm_doirq(int irq, uint32_t *regs)
/* Dispatch the interrupt to its attached handler */
- regs = _arm_doirq(irq, regs);
+ regs = _arm_doirq(irq, regs);
/* Then loop dispatching any pending SGI interrupts that occcurred during
* processing of the interrupts.
diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S
index e1e20f8..4b33bac 100644
--- a/arch/arm/src/armv7-a/arm_head.S
+++ b/arch/arm/src/armv7-a/arm_head.S
@@ -37,9 +37,9 @@
.file "arm_head.S"
-/**********************************************************************************
+/****************************************************************************
* Configuration
- **********************************************************************************/
+ ****************************************************************************/
/* Hard-coded options */
diff --git a/arch/arm/src/armv7-a/arm_pghead.S b/arch/arm/src/armv7-a/arm_pghead.S
index 305e6f8..e039abd 100644
--- a/arch/arm/src/armv7-a/arm_pghead.S
+++ b/arch/arm/src/armv7-a/arm_pghead.S
@@ -39,9 +39,10 @@
.file "arm_pghead.S"
-/**********************************************************************************
+/****************************************************************************
* Configuration
- **********************************************************************************/
+ ****************************************************************************/
+
/* Assume these are not needed */
#undef ALIGNMENT_TRAP
diff --git a/arch/arm/src/armv7-a/arm_pginitialize.c b/arch/arm/src/armv7-a/arm_pginitialize.c
index 7ab6494..787804f 100644
--- a/arch/arm/src/armv7-a/arm_pginitialize.c
+++ b/arch/arm/src/armv7-a/arm_pginitialize.c
@@ -51,8 +51,8 @@
* initialization
*
* Assumptions:
- * - Called early in the platform initialization sequence so that no special
- * concurrency protection is required.
+ * - Called early in the platform initialization sequence so that no
+ * special concurrency protection is required.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-a/arm_physpgaddr.c b/arch/arm/src/armv7-a/arm_physpgaddr.c
index b802cd9..d5ccf73 100644
--- a/arch/arm/src/armv7-a/arm_physpgaddr.c
+++ b/arch/arm/src/armv7-a/arm_physpgaddr.c
@@ -89,22 +89,25 @@ uintptr_t arm_physpgaddr(uintptr_t vaddr)
/* Temporarily map the page into the virtual address space */
l1save = mmu_l1_getentry(ARCH_SCRATCH_VBASE);
- mmu_l1_setentry(paddr & ~SECTION_MASK, ARCH_SCRATCH_VBASE, MMU_MEMFLAGS);
- l2table = (FAR uint32_t *)(ARCH_SCRATCH_VBASE | (paddr & SECTION_MASK));
+ mmu_l1_setentry(paddr & ~SECTION_MASK,
+ ARCH_SCRATCH_VBASE, MMU_MEMFLAGS);
+ l2table = (FAR uint32_t *)(ARCH_SCRATCH_VBASE |
+ (paddr & SECTION_MASK));
#endif
if (l2table)
{
- /* Invalidate D-Cache line containing this virtual address so that
- * we re-read from physical memory
+ /* Invalidate D-Cache line containing this virtual address so
+ * that we re-read from physical memory
*/
index = (vaddr & SECTION_MASK) >> MM_PGSHIFT;
up_invalidate_dcache((uintptr_t)&l2table[index],
- (uintptr_t)&l2table[index] + sizeof(uint32_t));
+ (uintptr_t)&l2table[index] +
+ sizeof(uint32_t));
- /* Get the Level 2 page table entry corresponding to this virtual
- * address. Extract the physical address of the page containing
- * the mapping of the virtual address.
+ /* Get the Level 2 page table entry corresponding to this
+ * virtual address. Extract the physical address of the page
+ * containing the mapping of the virtual address.
*/
paddr = ((uintptr_t)l2table[index] & PTE_SMALL_PADDR_MASK);
diff --git a/arch/arm/src/armv7-a/arm_prefetchabort.c b/arch/arm/src/armv7-a/arm_prefetchabort.c
index ff9d4fa..85bac7c 100644
--- a/arch/arm/src/armv7-a/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-a/arm_prefetchabort.c
@@ -53,19 +53,19 @@
uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
{
- uint32_t *savestate;
+ uint32_t *savestate;
- /* Save the saved processor context in CURRENT_REGS where it can be accessed
- * for register dumps and possibly context switching.
+ /* Save the saved processor context in CURRENT_REGS where it can be
+ * accessed for register dumps and possibly context switching.
*/
savestate = (uint32_t *)CURRENT_REGS;
CURRENT_REGS = regs;
- /* Get the (virtual) address of instruction that caused the prefetch abort.
- * When the exception occurred, this address was provided in the lr register
- * and this value was saved in the context save area as the PC at the
- * REG_R15 index.
+ /* Get the (virtual) address of instruction that caused the prefetch
+ * abort. When the exception occurred, this address was provided in the
+ * lr register and this value was saved in the context save area as the
+ * PC at the REG_R15 index.
*
* Check to see if this miss address is within the configured range of
* virtual addresses.
@@ -76,10 +76,10 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
{
- /* Save the offending PC as the fault address in the TCB of the currently
- * executing task. This value is, of course, already known in regs[REG_R15],
- * but saving it in this location will allow common paging logic for both
- * prefetch and data aborts.
+ /* Save the offending PC as the fault address in the TCB of the
+ * currently executing task. This value is, of course, already known
+ * in regs[REG_R15], but saving it in this location will allow common
+ * paging logic for both prefetch and data aborts.
*/
struct tcb_s *tcb = this_task();
@@ -99,9 +99,9 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
pg_miss();
- /* Restore the previous value of CURRENT_REGS. NULL would indicate that
- * we are no longer in an interrupt handler. It will be non-NULL if we
- * are returning from a nested interrupt.
+ /* Restore the previous value of CURRENT_REGS.
+ * NULL would indicate thatwe are no longer in an interrupt handler.
+ * It will be non-NULL if we are returning from a nested interrupt.
*/
CURRENT_REGS = savestate;
@@ -120,8 +120,8 @@ uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
uint32_t *arm_prefetchabort(uint32_t *regs, uint32_t ifar, uint32_t ifsr)
{
- /* Save the saved processor context in CURRENT_REGS where it can be accessed
- * for register dumps and possibly context switching.
+ /* Save the saved processor context in CURRENT_REGS where it can be
+ * accessed for register dumps and possibly context switching.
*/
CURRENT_REGS = regs;
diff --git a/arch/arm/src/armv7-a/arm_restorefpu.S b/arch/arm/src/armv7-a/arm_restorefpu.S
index 8e53120..10dfb45 100644
--- a/arch/arm/src/armv7-a/arm_restorefpu.S
+++ b/arch/arm/src/armv7-a/arm_restorefpu.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/arm_restorefpu.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -30,19 +30,19 @@
.file "arm_restorefpu.S"
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_restorefpu
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
.text
-/************************************************************************************
+/****************************************************************************
* Name: arm_restorefpu
*
* Description:
@@ -60,7 +60,7 @@
* This function does not return anything explicitly. However, it is called from
* interrupt level assembly logic that assumes that r0 is preserved.
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_restorefpu
.type arm_restorefpu, function
diff --git a/arch/arm/src/armv7-a/arm_savefpu.S b/arch/arm/src/armv7-a/arm_savefpu.S
index 69bd286..254b8e3 100644
--- a/arch/arm/src/armv7-a/arm_savefpu.S
+++ b/arch/arm/src/armv7-a/arm_savefpu.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/arm_savefpu.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -30,23 +30,23 @@
.file "arm_savefpu.S"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_savefpu
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
.text
-/************************************************************************************
+/****************************************************************************
* Name: arm_savefpu
*
* Description:
@@ -63,7 +63,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_savefpu
.type arm_savefpu, function
diff --git a/arch/arm/src/armv7-a/arm_vectors.S b/arch/arm/src/armv7-a/arm_vectors.S
index 8218fbd..599621f 100644
--- a/arch/arm/src/armv7-a/arm_vectors.S
+++ b/arch/arm/src/armv7-a/arm_vectors.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/arm_vectors.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
@@ -31,9 +31,9 @@
.file "arm_vectors.S"
-/************************************************************************************
+/****************************************************************************
* Private Data
- ************************************************************************************/
+ ****************************************************************************/
.data
g_irqtmp:
@@ -67,18 +67,18 @@ g_nestlevel:
#endif /* CONFIG_ARCH_INTERRUPTSTACK > 7 && CONFIG_ARMV7A_HAVE_GICv2 */
-/************************************************************************************
+/****************************************************************************
* Macro Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: cpuindex
*
* Description:
* Return an index idenifying the current CPU. Single CPU case. Must be
* provided by MCU-specific logic in chip.h for the SMP case.
*
- ************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro cpuindex, index
@@ -86,14 +86,14 @@ g_nestlevel:
.endm
#endif
-/************************************************************************************
+/****************************************************************************
* Name: setirqstack
*
* Description:
* Set the current stack pointer to the "top" of the IRQ interrupt stack. Single
* CPU case. Must be provided by MCU-specific logic in chip.h for the SMP case.
*
- ************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro setirqstack, tmp1, tmp2
@@ -101,14 +101,14 @@ g_nestlevel:
.endm
#endif
-/************************************************************************************
+/****************************************************************************
* Name: setfiqstack
*
* Description:
* Set the current stack pointer to the "top" of the FIQ interrupt stack. Single
* CPU case. Must be provided by MCU-specific logic in chip.h for the SMP case.
*
- ************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro setfiqstack, tmp1, tmp2
@@ -116,23 +116,23 @@ g_nestlevel:
.endm
#endif
-/************************************************************************************
+/****************************************************************************
* Private Functions
- ************************************************************************************/
+ ****************************************************************************/
.text
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectorirq
*
* Description:
* Interrupt exception. Entered in IRQ mode with spsr = SVC CPSR, lr = SVC PC
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_decodeirq
.globl arm_vectorirq
@@ -336,13 +336,13 @@ arm_vectorirq:
.size arm_vectorirq, . - arm_vectorirq
.align 5
-/************************************************************************************
+/****************************************************************************
* Function: arm_vectorsvc
*
* Description:
* SVC interrupt. We enter the SVC in SVC mode.
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_syscall
.globl arm_vectorsvc
@@ -460,7 +460,7 @@ arm_vectorsvc:
.align 5
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectordata
*
* Description:
@@ -469,7 +469,7 @@ arm_vectorsvc:
* current processor state and gives control to data abort handler. This function
* is entered in ABORT mode with spsr = SVC CPSR, lr = SVC PC
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_dataabort
.globl arm_vectordata
@@ -606,7 +606,7 @@ arm_vectordata:
.align 5
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectorprefetch
*
* Description:
@@ -615,7 +615,7 @@ arm_vectordata:
* handler saves the current processor state and gives control to prefetch abort
* handler. This function is entered in ABT mode with spsr = SVC CPSR, lr = SVC PC.
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_prefetchabort
.globl arm_vectorprefetch
@@ -752,14 +752,14 @@ arm_vectorprefetch:
.align 5
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectorundefinsn
*
* Description:
* Undefined instruction entry exception. Entered in UND mode, spsr = SVC CPSR,
* lr = SVC PC
*
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_undefinedinsn
.globl arm_vectorundefinsn
@@ -893,14 +893,14 @@ arm_vectorundefinsn:
.align 5
-/************************************************************************************
+/****************************************************************************
* Name: arm_vectorfiq
*
* Description:
* Shouldn't happen unless a arm_decodefiq() is provided. FIQ is primarily used
* with the TrustZone feature in order to handle secure interrupts.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_ARMV7A_DECODEFIQ
.globl arm_decodefiq
@@ -1051,9 +1051,9 @@ arm_vectorfiq:
#endif
.size arm_vectorfiq, . - arm_vectorfiq
-/************************************************************************************
+/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
- ************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
@@ -1071,9 +1071,9 @@ g_intstackbase:
.size g_intstackbase, 4
.size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~7)
-/************************************************************************************
+/****************************************************************************
* Name: g_fiqstackalloc/g_fiqstackbase
- ************************************************************************************/
+ ****************************************************************************/
.globl g_fiqstackalloc
.type g_fiqstackalloc, object
diff --git a/arch/arm/src/armv7-a/barriers.h b/arch/arm/src/armv7-a/barriers.h
index 874fc56..3d95a09 100644
--- a/arch/arm/src/armv7-a/barriers.h
+++ b/arch/arm/src/armv7-a/barriers.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/barriers.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* ARMv7-A memory barriers */
diff --git a/arch/arm/src/armv7-a/cp15.h b/arch/arm/src/armv7-a/cp15.h
index 5e80c78..47da92d 100644
--- a/arch/arm/src/armv7-a/cp15.h
+++ b/arch/arm/src/armv7-a/cp15.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/cp15.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,7 +16,7 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/* References:
*
@@ -30,15 +30,16 @@
#ifndef __ARCH_ARM_SRC_ARMV7_A_CP15_H
#define __ARCH_ARM_SRC_ARMV7_A_CP15_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
+
/* System control register descriptions.
*
* CP15 registers are accessed with MRC and MCR instructions as follows:
diff --git a/arch/arm/src/armv7-a/cp15_cacheops.h b/arch/arm/src/armv7-a/cp15_cacheops.h
index a87abdd..855588c 100644
--- a/arch/arm/src/armv7-a/cp15_cacheops.h
+++ b/arch/arm/src/armv7-a/cp15_cacheops.h
@@ -1,18 +1,11 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/cp15_cacheops.h
*
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
- * References:
- *
- * "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1, Copyright � 2010
- * ARM. All rights reserved. ARM DDI 0434B (ID101810)
- * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright �
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.b (ID072512)
- *
- * Portions of this file derive from Atmel sample code for the SAMA5D3 Cortex-A5
- * which also has a modified BSD-style license:
+ * Portions of this file derive from Atmel sample code for the SAMA5D3
+ * Cortex-A5 which also has a modified BSD-style license:
*
* Copyright (c) 2012, Atmel Corporation
* All rights reserved.
@@ -44,34 +37,47 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
+
+/* References:
+ *
+ * "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1,
+ * Copyright � 2010 ARM. All rights reserved. ARM DDI 0434B (ID101810)
+ * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
+ * Copyright � 1996-1998, 2000, 2004-2012 ARM.
+ * All rights reserved. ARM DDI 0406C.b (ID072512)
+ */
#ifndef __ARCH_ARM_SRC_ARMV7_A_CP15_CACHEOPS_H
#define __ARCH_ARM_SRC_ARMV7_A_CP15_CACHEOPS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
-/* Cache definitions ****************************************************************/
+ ****************************************************************************/
+
+/* Cache definitions ********************************************************/
+
/* L1 Memory */
#define CP15_L1_LINESIZE 32
-/* CP15 Registers *******************************************************************/
-/* Reference: Cortex-A5� MPCore Paragraph 4.1.5, "Cache Operations Registers."
+/* CP15 Registers ***********************************************************/
+
+/* Reference: Cortex-A5� MPCore
+ * Paragraph 4.1.5, "Cache Operations Registers."
*
* Terms:
* 1) Point of coherency (PoC)
- * The PoC is the point at which all agents that can access memory are guaranteed
- * to see the same copy of a memory location
+ * The PoC is the point at which all agents that can access memory are
+ * guaranteed to see the same copy of a memory location
* 2) Point of unification (PoU)
* The PoU is the point by which the instruction and data caches and the
- * translation table walks of the processor are guaranteed to see the same copy
- * of a memory location.
+ * translation table walks of the processor are guaranteed to see the same
+ * copy of a memory location.
*
* Cache Operations:
*
@@ -80,12 +86,13 @@
* Register Format: Should be zero (SBZ)
* Instruction: MCR p15, 0, <Rd>, c7, c1, 0
* CP15 Register: BPIALLIS
- * Description: Invalidate entire branch predictor array Inner Shareable.
+ * Description: Invalidate entire branch predictor array Inner
+ * Shareable.
* Register Format: Should be zero (SBZ)
* Instruction: MCR p15, 0, <Rd>, c7, c1, 6
* CP15 Register: ICIALLU
- * Description: Invalidate all instruction caches to PoU. Also flushes branch
- * target cache.
+ * Description: Invalidate all instruction caches to PoU. Also flushes
+ * branch target cache.
* Register Format: Should be zero (SBZ)
* Instruction: MCR p15, 0, <Rd>, c7, c5, 0
* CP15 Register: ICIMVAU
@@ -157,9 +164,10 @@
#define CACHE_SBZ_MASK (31 << TLB_SBZ_SHIFT)
#define CACHE_VA_MASK (0xfffffffe0) /* Bits 5-31: Virtual address */
-/************************************************************************************
+/****************************************************************************
* Assembly Macros
- ************************************************************************************/
+ ****************************************************************************/
+
/* cp15_cache Cache Operations
*
* Usage
@@ -193,7 +201,7 @@
#ifdef __ASSEMBLY__
-/************************************************************************************
+/****************************************************************************
* Name: cp15_enable_dcache
*
* Description:
@@ -205,7 +213,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_enable_dcache, tmp
mrc p15, 0, \tmp, c1, c0, 0 /* Read SCTLR */
@@ -213,7 +221,7 @@
mcr p15, 0, \tmp, c1, c0, 0 /* Update the SCTLR */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_disable_dcache
*
* Description:
@@ -225,7 +233,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_disable_dcache, tmp
mrc p15, 0, \tmp, c1, c0, 0 /* Read SCTLR */
@@ -233,7 +241,7 @@
mcr p15, 0, \tmp, c1, c0, 0 /* Update the SCTLR */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_enable_icache
*
* Description:
@@ -245,7 +253,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_enable_icache, tmp
mrc p15, 0, \tmp, c1, c0, 0 /* Read SCTLR */
@@ -253,7 +261,7 @@
mcr p15, 0, \tmp, c1, c0, 0 /* Update the SCTLR */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_disable_icache
*
* Description:
@@ -265,7 +273,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_disable_icache, tmp
mrc p15, 0, \tmp, c1, c0, 0 /* Read SCTLR */
@@ -273,7 +281,7 @@
mcr p15, 0, \tmp, c1, c0, 0 /* Update the SCTLR */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache_inner_sharable
*
* Description:
@@ -285,14 +293,14 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_icache_inner_sharable, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c1, 0 /* ICIALLUIS */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_btb_inner_sharable
*
* Description:
@@ -304,18 +312,19 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_btb_inner_sharable, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c1, 6 /* BPIALLIS */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache
*
* Description:
- * Invalidate all instruction caches to PoU, also flushes branch target cache
+ * Invalidate all instruction caches to PoU, also flushes branch target
+ * cache
*
* Input Parameters:
* None
@@ -323,14 +332,14 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_icache, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c5, 0 /* ICIALLU */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache_bymva
*
* Description:
@@ -342,13 +351,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_icache_bymva, va
mrc p15, 0, \va, c7, c5, 1 /* ICIMVAU */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_flush_btb
*
* Description:
@@ -360,14 +369,14 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_flush_btb, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c5, 6 /* BPIALL */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_flush_btb_bymva
*
* Description:
@@ -379,14 +388,14 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_flush_btb_bymva, tmp
mov \tmp, #0
mrc p15, 0, \tmp, c7, c5, 7 /* BPIMVA */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_dcacheline_bymva
*
* Description:
@@ -398,13 +407,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_dcacheline_bymva, va
mrc p15, 0, \va, c7, c6, 1 /* DCIMVAC */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_dcacheline_bysetway
*
* Description:
@@ -416,13 +425,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_dcacheline_bysetway, setway
mrc p15, 0, \setway, c7, c6, 2 /* DCISW */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_dcache_bymva
*
* Description:
@@ -434,13 +443,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_clean_dcache_bymva, va
mrc p15, 0, \va, c7, c10, 1 /* DCCMVAC */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_dcache_bysetway
*
* Description:
@@ -452,13 +461,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_clean_dcache_bysetway, setway
mrc p15, 0, \setway, c7, c10, 2 /* DCCSW */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_ucache_bymva
*
* Description:
@@ -470,13 +479,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_clean_ucache_bymva, setway
mrc p15, 0, \setway, c7, c11, 1 /* DCCMVAU */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_cleaninvalidate_dcacheline_bymva
*
* Description:
@@ -488,13 +497,13 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_cleaninvalidate_dcacheline_bymva, va
mrc p15, 0, \va, c7, c14, 1 /* DCCIMVAC */
.endm
-/************************************************************************************
+/****************************************************************************
* Name: cp15_cleaninvalidate_dcacheline
*
* Description:
@@ -506,7 +515,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.macro cp15_cleaninvalidate_dcacheline, setway
mrc p15, 0, \setway, c7, c14, 2 /* DCCISW */
@@ -514,13 +523,13 @@
#endif /* __ASSEMBLY__ */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
-/************************************************************************************
+/****************************************************************************
* Name: cp15_enable_dcache
*
* Description:
@@ -532,7 +541,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_enable_dcache(void)
{
@@ -547,7 +556,7 @@ static inline void cp15_enable_dcache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_disable_dcache
*
* Description:
@@ -559,7 +568,7 @@ static inline void cp15_enable_dcache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_disable_dcache(void)
{
@@ -574,7 +583,7 @@ static inline void cp15_disable_dcache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_enable_icache
*
* Description:
@@ -586,7 +595,7 @@ static inline void cp15_disable_dcache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_enable_icache(void)
{
@@ -601,7 +610,7 @@ static inline void cp15_enable_icache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_disable_icache
*
* Description:
@@ -613,7 +622,7 @@ static inline void cp15_enable_icache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_disable_icache(void)
{
@@ -628,7 +637,7 @@ static inline void cp15_disable_icache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache_inner_sharable
*
* Description:
@@ -640,7 +649,7 @@ static inline void cp15_disable_icache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_icache_inner_sharable(void)
{
@@ -654,7 +663,7 @@ static inline void cp15_invalidate_icache_inner_sharable(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_btb_inner_sharable
*
* Description:
@@ -666,7 +675,7 @@ static inline void cp15_invalidate_icache_inner_sharable(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_btb_inner_sharable(void)
{
@@ -680,11 +689,12 @@ static inline void cp15_invalidate_btb_inner_sharable(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache
*
* Description:
- * Invalidate all instruction caches to PoU, also flushes branch target cache
+ * Invalidate all instruction caches to PoU, also flushes branch target
+ * cache
*
* Input Parameters:
* None
@@ -692,7 +702,7 @@ static inline void cp15_invalidate_btb_inner_sharable(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_icache(void)
{
@@ -706,7 +716,7 @@ static inline void cp15_invalidate_icache(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_icache_bymva
*
* Description:
@@ -718,7 +728,7 @@ static inline void cp15_invalidate_icache(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_icache_bymva(unsigned int va)
{
@@ -731,7 +741,7 @@ static inline void cp15_invalidate_icache_bymva(unsigned int va)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_flush_btb
*
* Description:
@@ -743,7 +753,7 @@ static inline void cp15_invalidate_icache_bymva(unsigned int va)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_flush_btb(void)
{
@@ -757,7 +767,7 @@ static inline void cp15_flush_btb(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_flush_btb_bymva
*
* Description:
@@ -769,7 +779,7 @@ static inline void cp15_flush_btb(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_flush_btb_bymva(void)
{
@@ -783,7 +793,7 @@ static inline void cp15_flush_btb_bymva(void)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_dcacheline_bymva
*
* Description:
@@ -795,7 +805,7 @@ static inline void cp15_flush_btb_bymva(void)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
/* Invalidate data cache line by VA to PoC */
@@ -810,7 +820,7 @@ static inline void cp15_invalidate_dcacheline_bymva(unsigned int va)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_dcacheline_bysetway
*
* Description:
@@ -822,7 +832,7 @@ static inline void cp15_invalidate_dcacheline_bymva(unsigned int va)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
/* Invalidate data cache line by set/way */
@@ -837,7 +847,7 @@ static inline void cp15_invalidate_dcacheline_bysetway(unsigned int setway)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_dcache_bymva
*
* Description:
@@ -849,7 +859,7 @@ static inline void cp15_invalidate_dcacheline_bysetway(unsigned int setway)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
/* Clean data cache line by MVA */
@@ -864,7 +874,7 @@ static inline void cp15_clean_dcache_bymva(unsigned int va)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_dcache_bysetway
*
* Description:
@@ -876,7 +886,7 @@ static inline void cp15_clean_dcache_bymva(unsigned int va)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_clean_dcache_bysetway(unsigned int setway)
{
@@ -889,7 +899,7 @@ static inline void cp15_clean_dcache_bysetway(unsigned int setway)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_clean_ucache_bymva
*
* Description:
@@ -901,7 +911,7 @@ static inline void cp15_clean_dcache_bysetway(unsigned int setway)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_clean_ucache_bymva(unsigned int setway)
{
@@ -914,7 +924,7 @@ static inline void cp15_clean_ucache_bymva(unsigned int setway)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_cleaninvalidate_dcacheline_bymva
*
* Description:
@@ -926,7 +936,7 @@ static inline void cp15_clean_ucache_bymva(unsigned int setway)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_cleaninvalidate_dcacheline_bymva(unsigned int va)
{
@@ -939,7 +949,7 @@ static inline void cp15_cleaninvalidate_dcacheline_bymva(unsigned int va)
);
}
-/************************************************************************************
+/****************************************************************************
* Name: cp15_cleaninvalidate_dcacheline
*
* Description:
@@ -951,7 +961,7 @@ static inline void cp15_cleaninvalidate_dcacheline_bymva(unsigned int va)
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
static inline void cp15_cleaninvalidate_dcacheline(unsigned int setway)
{
diff --git a/arch/arm/src/armv7-a/crt0.c b/arch/arm/src/armv7-a/crt0.c
index b842d12..d854841 100644
--- a/arch/arm/src/armv7-a/crt0.c
+++ b/arch/arm/src/armv7-a/crt0.c
@@ -117,7 +117,9 @@ void _start(int argc, FAR char *argv[])
ARCH_DATA_RESERVE->ar_sigtramp = (addrenv_sigtramp_t)sig_trampoline;
/* Call C++ constructors */
+
/* Setup so that C++ destructors called on task exit */
+
/* REVISIT: Missing logic */
/* Call the main() entry point passing argc and argv. */
diff --git a/arch/arm/src/armv7-a/gic.h b/arch/arm/src/armv7-a/gic.h
index 6e03ccc..761f320 100644
--- a/arch/arm/src/armv7-a/gic.h
+++ b/arch/arm/src/armv7-a/gic.h
@@ -48,7 +48,9 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
+
/* Generic indexing helpers *************************************************/
+
/* 1x32 bit field per register */
#define GIC_INDEX1(n) (n) /* 1 field per word */
@@ -92,6 +94,7 @@
#define GIC_MASK32(n) (1 << GIC_SHIFT32(n)) /* 1-bit mask */
/* GIC Register Offsets *****************************************************/
+
/* CPU Interface registers */
#define GIC_ICCICR_OFFSET 0x0000 /* CPU Interface Control Register */
@@ -127,6 +130,7 @@
/* 0x000c-0x001c: Reserved */
/* 0x0020-0x003c: Implementation defined */
/* 0x0040-0x007c: Reserved */
+
/* Interrupt Security Registers: 0x0080-0x009c */
#define GIC_ICDISR_OFFSET(n) (0x0080 + GIC_OFFSET32(n))
@@ -160,23 +164,28 @@
#define GIC_ICDIPR_OFFSET(n) (0x0400 + GIC_OFFSET4(n))
/* 0x0500-0x07fc: Reserved */
+
/* Interrupt Processor Target Registers: 0x0800-0x08fc */
#define GIC_ICDIPTR_OFFSET(n) (0x0800 + GIC_OFFSET4(n))
/* 0x0900-0x0bfc: Reserved */
+
/* Interrupt Configuration Registers: 0x0c00-0x0c3c */
#define GIC_ICDICFR_OFFSET(n) (0x0c00 + GIC_OFFSET16(n))
/* 0x0d00-0x0dfc: Implementation defined */
+
/* PPI Status Register: 0x0d00 */
+
/* SPI Status Registers: 0x0d04-0x0d1c */
#define GIC_ICDPPISR_OFFSET 0x0d00 /* PPI Status Register */
#define GIC_ICDSPISR_OFFSET(n) (0x0d00 + GIC_OFFSET32(n))
/* 0x0d80-0x0dfc: Reserved */
+
/* Non-secure Access Control Registers, optional: 00xe00-0x0efc */
#define GIC_ICDNSACR_OFFSET(n) (0x0e00 + GIC_OFFSET32(n))
@@ -186,6 +195,7 @@
#define GIC_ICDSGIR_OFFSET 0x0f00 /* Software Generated Interrupt Register */
/* 0x0f0c-0x0f0c: Reserved */
+
/* Peripheral Identification Registers: 0x0fd0-0xfe8 */
#define GIC_ICDPIDR_OFFSET(n) (0x0fd0 + ((n) << 2))
@@ -199,7 +209,9 @@
#define GIC_ICDSSPR_OFFSET(n) (0x0f20 + GIC_OFFSET8(n))
/* 0x0f30-0x0fcc: Reserved */
+
/* 0x0fd0-0x0ffc: Implementation defined */
+
/* Component Identification Registers: 0x0ff0-0x0ffc */
#define GIC_ICDCIDR_OFFSET(n) (0x0ff0 + ((n) << 2))
@@ -207,6 +219,7 @@
/* 0x0f04-0x0ffc: Reserved */
/* GIC Register Addresses ***************************************************/
+
/* The Interrupt Controller is a single functional unit that is located in a
* Cortex-A9 MPCore design. There is one interrupt interface per Cortex-A9
* processor. Registers are memory mapped and accessed through a chip-
@@ -264,11 +277,15 @@
/* GIC Register Bit Definitions *********************************************/
/* CPU Interface registers */
+
/* CPU Interface Control Register -- without security extensions */
#define GIC_ICCICR_ENABLE (1 << 0) /* Bit 0: Enable the CPU interface for this GIC */
/* Bits 1-31: Reserved */
-/* CPU Interface Control Register -- with security extensions, non-secure copy */
+
+/* CPU Interface Control Register -- with security extensions,
+ * non-secure copy
+ */
#define GIC_ICCICRU_ENABLEGRP1 (1 << 0) /* Bit 0: Enable Group 1 interrupts for the CPU */
/* Bits 1-4: Reserved */
@@ -277,7 +294,10 @@
/* Bits 7-8: Reserved */
#define GIC_ICCICRU_EOIMODENS (1 << 9) /* Bit 9: Control EIOIR access (non-secure) */
/* Bits 10-31: Reserved */
-/* CPU Interface Control Register -- with security extensions, secure copy */
+
+/* CPU Interface Control Register -- with security extensions,
+ * secure copy
+ */
#define GIC_ICCICRS_ENABLEGRP0 (1 << 0) /* Bit 0: Enable Group 0 interrupts for the CPU */
#define GIC_ICCICRS_ENABLEGRP1 (1 << 1) /* Bit 1: Enable Group 1 interrupts for the CPU */
@@ -291,6 +311,7 @@
#define GIC_ICCICRS_EOIMODES (1 << 9) /* Bit 6: Control EIOIR access (secure) */
#define GIC_ICCICRS_EOIMODENS (1 << 10) /* Bit 10: Control EIOIR access (non-secure) */
/* Bits 11-31: Reserved */
+
/* Interrupt Priority Mask Register. Priority values are 8-bit unsigned
* binary. A GIC supports a minimum of 16 and a maximum of 256 priority
* levels. As a result, PMR settings make sense.
@@ -300,6 +321,7 @@
#define GIC_ICCPMR_MASK (0xff << GIC_ICCPMR_SHIFT)
# define GIC_ICCPMR_VALUE(n) ((uint32_t)(n) << GIC_ICCPMR_SHIFT)
/* Bits 8-31: Reserved */
+
/* Binary point Register and Aliased Non-secure Binary Point Register.
* Priority values are 8-bit unsigned binary. A GIC supports a minimum of
* 16 and a maximum of 256 priority levels. As a result, not all binary
@@ -316,7 +338,9 @@
# define GIC_ICCBPR_6_7 (5 << GIC_ICCBPR_SHIFT) /* Priority bits [7:6] compared for pre-emption */
# define GIC_ICCBPR_7_7 (6 << GIC_ICCBPR_SHIFT) /* Priority bit [7] compared for pre-emption */
# define GIC_ICCBPR_NOPREMPT (7 << GIC_ICCBPR_SHIFT) /* No pre-emption is performed */
+
/* Bits 3-31: Reserved */
+
/* Interrupt Acknowledge Register */
#define GIC_ICCIAR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
@@ -325,7 +349,9 @@
#define GIC_ICCIAR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCIAR_CPUSRC_MASK (7 << GIC_ICCIAR_CPUSRC_SHIFT)
# define GIC_ICCIAR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCIAR_CPUSRC_SHIFT)
+
/* Bits 13-31: Reserved */
+
/* End of Interrupt Register */
#define GIC_ICCEOIR_SPURIOUS (0x3ff)
@@ -336,14 +362,18 @@
#define GIC_ICCEOIR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCEOIR_CPUSRC_MASK (7 << GIC_ICCEOIR_CPUSRC_SHIFT)
# define GIC_ICCEOIR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCEOIR_CPUSRC_SHIFT)
+
/* Bits 13-31: Reserved */
+
/* Running Interrupt Register */
/* Bits 0-3: Reserved */
#define GIC_ICCRPR_PRIO_SHIFT (4) /* Bits 4-7: Priority mask */
#define GIC_ICCRPR_PRIO_MASK (15 << GIC_ICCRPR_PRIO_SHIFT)
# define GIC_ICCRPR_PRIO_VALUE(n) ((uint32_t)(n) << GIC_ICCRPR_PRIO_SHIFT)
+
/* Bits 8-31: Reserved */
+
/* Highest Pending Interrupt Register */
#define GIC_ICCHPIR_INTID_SHIFT (0) /* Bits 0-9: Interrupt ID */
@@ -352,28 +382,39 @@
#define GIC_ICCHPIR_CPUSRC_SHIFT (10) /* Bits 10-12: CPU source ID */
#define GIC_ICCHPIR_CPUSRC_MASK (7 << GIC_ICCHPIR_CPUSRC_SHIFT)
# define GIC_ICCHPIR_CPUSRC(n) ((uint32_t)(n) << GIC_ICCHPIR_CPUSRC_SHIFT)
+
/* Bits 13-31: Reserved */
/* Aliased Interrupt Acknowledge Register */
#define GIC_ICCAIAR_
+
/* Aliased End of Interrupt Register */
#define GIC_ICCAEOIR_
+
/* Aliased Highest Priority Pending Interrupt Register */
#define GIC_ICCAHPIR_
+
/* Active Priorities Register 1 */
#define GIC_ICCAPR1_
+
/* Active Priorities Register 2 */
#define GIC_ICCAPR2_
+
/* Active Priorities Register 3 */
#define GIC_ICCAPR3_
+
/* Active Priorities Register 4 */
#define GIC_ICCAPR4_
+
/* Non-secure Active Priorities Register 1 */
#define GIC_ICCNSAPR1_
+
/* Non-secure Active Priorities Register 2 */
#define GIC_ICCNSAPR2_
+
/* Non-secure Active Priorities Register 3 */
#define GIC_ICCNSAPR3_
+
/* Non-secure Active Priorities Register 4 */
#define GIC_ICCNSAPR4_
@@ -392,15 +433,18 @@
#define GIC_ICCDIR_
/* Distributor Registers */
+
/* Distributor Control Register -- without security extensions */
#define GIC_ICDDCR_ENABLE (1 << 0) /* Bit 0: Enable forwarding of interrupts */
/* Bits 1-31: Reserved */
+
/* Distributor Control Register -- with security extensions */
#define GIC_ICDDCR_ENABLEGRP0 (1 << 0) /* Bit 0: Enable forwarding of Group 0 interrupts */
#define GIC_ICDDCR_ENABLEGRP1 (1 << 1) /* Bit 1: Enable forwarding of Group 1 interrupts */
/* Bits 2-31: Reserved */
+
/* Interrupt Controller Type Register */
#define GIC_ICDICTR_ITLINES_SHIFT (0) /* Bits 0-4: It lines number */
@@ -412,6 +456,7 @@
#define GIC_ICDICTR_LSPI_SHIFT (11) /* Bits 11-15: Number of Lockable Shared Peripheral Interrupts */
#define GIC_ICDICTR_LSPI_MASK (0x1f << GIC_ICDICTR_LSPI_SHIFT)
/* Bits 16-31: Reserved */
+
/* Distributor Implementer ID Register */
#define GIC_ICDIIDR_IMPL_SHIFT (0) /* Bits 0-11: Implementer */
@@ -427,7 +472,8 @@
/* Interrupt Set-Enable.
*
- * NOTE: In the Cortex-A9 MPCore, SGIs are always enabled. The corresponding bits
+ * NOTE:
+ * In the Cortex-A9 MPCore, SGIs are always enabled. The corresponding bits
* in the ICDISERn are read as one, write ignored
*/
@@ -435,7 +481,8 @@
/* Interrupt Clear-Enable.
*
- * NOTE: In the Cortex-A9 MPCore, SGIs are always enabled. The corresponding bits
+ * NOTE:
+ * In the Cortex-A9 MPCore, SGIs are always enabled. The corresponding bits
* in the ICDICERn are read as one, write ignored
*/
@@ -488,6 +535,7 @@
/* PPI Status Register */
#define GIC_ICDPPISR_PPI(n) (1 << ((n) + 11)) /* Bits 11-15: PPI(n) status, n=0-4 */
+
# define GIC_ICDPPISR_GTM (1 << 11) /* Bit 11: PPI[0], Global Timer */
# define GIC_ICDPPISR_NFIQ (1 << 12) /* Bit 12: PPI[1], FIQ, active low */
# define GIC_ICDPPISR_PTM (1 << 13) /* Bit 13: PPI[2], Private Timer */
@@ -520,10 +568,12 @@
/* SGI Clear-Pending Registers */
#define GIC_ICDSCPR_
+
/* SGI Set-Pending Registers */
#define GIC_ICDSSPR_
/* Interrupt IDs ************************************************************/
+
/* The Global Interrupt Controller (GIC) collects up to 224 interrupt
* requests and provides a memory mapped interface to each of the CPU core.
*
@@ -539,6 +589,7 @@
*/
/* Private Peripheral Interrupts (PPI) **************************************/
+
/* Each Cortex-A9 processor has private interrupts, ID0-ID15, that can only
* be triggered by software. These interrupts are aliased so that there is
* no requirement for a requesting Cortex-A9 processor to determine its own
diff --git a/arch/arm/src/armv7-a/gtm.h b/arch/arm/src/armv7-a/gtm.h
index f849026..1bd187a 100644
--- a/arch/arm/src/armv7-a/gtm.h
+++ b/arch/arm/src/armv7-a/gtm.h
@@ -39,6 +39,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
+
/* GTM Register Offsets *****************************************************/
#define GTM_COUNT0_OFFSET 0x0000 /* Global Timer Counter Register 0 */
@@ -81,6 +82,7 @@
/* Bits 1-31: Reserved */
/* Comparator Value Register 0/1 -- 64-bit timer compare value */
+
/* Auto-increment Register -- 32-bit auto-increment value */
/****************************************************************************
diff --git a/arch/arm/src/armv7-a/l2cc_pl310.h b/arch/arm/src/armv7-a/l2cc_pl310.h
index 2b0f840..26e1403 100644
--- a/arch/arm/src/armv7-a/l2cc_pl310.h
+++ b/arch/arm/src/armv7-a/l2cc_pl310.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/l2cc_pl310.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,7 +16,7 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/* Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
* Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
@@ -25,9 +25,9 @@
#ifndef __ARCH_ARM_SRC_ARMV7_A_L2CC_PL310_H
#define __ARCH_ARM_SRC_ARMV7_A_L2CC_PL310_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -37,11 +37,11 @@
#include "chip.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* General Definitions **************************************************************/
+/* General Definitions ******************************************************/
#define PL310_CACHE_LINE_SIZE 32
@@ -51,7 +51,7 @@
# define PL310_NLOCKREGS 1
#endif
-/* L2CC Register Offsets ************************************************************/
+/* L2CC Register Offsets ****************************************************/
#define L2CC_IDR_OFFSET 0x0000 /* Cache ID Register */
#define L2CC_TYPR_OFFSET 0x0004 /* Cache Type Register */
@@ -87,9 +87,10 @@
#define L2CC_CIWR_OFFSET 0x07fc /* Clean Invalidate Way Register */
/* 0x0800-0x08fc Reserved */
-/* Data and Instruction Lockdown registers where n=0-7. The registers for n > 0 are
- * implemented if the option pl310_LOCKDOWN_BY_MASTER is enabled. Otherwise, they are
- * unused
+/* Data and Instruction Lockdown registers where n=0-7.
+ * The registers for n > 0 are implemented if the option
+ * pl310_LOCKDOWN_BY_MASTER is enabled.
+ * Otherwise, they are unused
*/
#define L2CC_DLKR_OFFSET(n) (0x0900 + ((n) << 3)) /* Data Lockdown Register */
@@ -109,7 +110,7 @@
/* 0x0f64-0x0f7c Reserved */
#define L2CC_POWCR_OFFSET 0x0f80 /* Power Control Register */
-/* L2CC Register Addresses **********************************************************/
+/* L2CC Register Addresses **************************************************/
#define L2CC_IDR (L2CC_VBASE+L2CC_IDR_OFFSET)
#define L2CC_TYPR (L2CC_VBASE+L2CC_TYPR_OFFSET)
@@ -149,7 +150,7 @@
#define L2CC_PCR (L2CC_VBASE+L2CC_PCR_OFFSET)
#define L2CC_POWCR (L2CC_VBASE+L2CC_POWCR_OFFSET)
-/* L2CC Register Bit Definitions ****************************************************/
+/* L2CC Register Bit Definitions ********************************************/
/* Cache ID Register (32-bit ID) */
@@ -299,8 +300,8 @@
/* Event Counter 0 Value Register (32-bit value) */
-/* Interrupt Mask Register, Masked Interrupt Status Register, Raw Interrupt Status
- * Register, and Interrupt Clear Register.
+/* Interrupt Mask Register, Masked Interrupt Status Register,
+ * Raw Interrupt Status Register, and Interrupt Clear Register.
*/
#define L2CC_INT_ECNTR (1 << 0) /* Bit 0: Event Counter 1/0 Overflow Increment */
diff --git a/arch/arm/src/armv7-a/mmu.h b/arch/arm/src/armv7-a/mmu.h
index ceefef2..6203446 100644
--- a/arch/arm/src/armv7-a/mmu.h
+++ b/arch/arm/src/armv7-a/mmu.h
@@ -1,4 +1,4 @@
-/************************************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/mmu.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,22 +16,22 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************************************/
+ ****************************************************************************/
/* References:
- * "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1, Copyright �
- * 2010 ARM. All rights reserved. ARM DDI 0434B (ID101810)
- * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright �
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM
- * DDI 0406C.b (ID072512)
+ * "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1,
+ * Copyright � 2010 ARM. All rights reserved. ARM DDI 0434B (ID101810)
+ * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
+ * Copyright � 1996-1998, 2000, 2004-2012 ARM.
+ * All rights reserved. ARM DDI 0406C.b (ID072512)
*/
#ifndef __ARCH_ARM_SRC_ARMV7_A_MMU_H
#define __ARCH_ARM_SRC_ARMV7_A_MMU_H
-/************************************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -41,11 +41,11 @@
# include "chip.h"
#endif /* __ASSEMBLY__ */
-/************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************************************/
+/* Configuration ************************************************************/
#if defined(CONFIG_PAGING) || defined(CONFIG_ARCH_ADDRENV)
@@ -58,15 +58,17 @@
#endif
#endif /* CONFIG_PAGING */
-/* MMU CP15 Register Bit Definitions ************************************************************************/
+/* MMU CP15 Register Bit Definitions ****************************************/
-/* Reference: Cortex-A5� MPCore Paragraph 6.7, "MMU software accessible registers." */
+/* Reference: Cortex-A5� MPCore
+ * Paragraph 6.7, "MMU software accessible registers."
+ */
/* TLB Type Register TLB Type Register
*
- * The Translation Lookaside Buffer (TLB) Type Register, TLBTR, returns the number of
- * lockable entries for the TLB. The Cortex-A5 MPCore processor does not implement
- * this feature, so this register always RAZ.
+ * The Translation Lookaside Buffer (TLB) Type Register, TLBTR, returns the
+ * number of lockable entries for the TLB. The Cortex-A5 MPCore processor
+ * does not implement this feature, so this register always RAZ.
*/
/* System Control Register (SCTLR). see cstlr.h */
@@ -90,7 +92,10 @@
/* Bits 7-n: Reserved, n=7-13 */
#define _TTBR0_LOWER(n) (0xffffffff << (n))
- /* Bits (n+1)-31: Translation table base 0 */
+
+/* Bits (n+1)-31:
+ * Translation table base 0
+ */
#define TTBR0_BASE_MASK(n) (~_TTBR0_LOWER(n))
@@ -160,11 +165,11 @@
#define IFSR_EXT (1 << 12) /* Bit 12: External Abort Qualifier */
/* Bits 13-31: Reserved */
-/* Data Fault Address Register(DFAR). Holds the MVA of the faulting address when a
- * synchronous fault occurs
+/* Data Fault Address Register(DFAR). Holds the MVA of the faulting address
+ * when a synchronous fault occurs
*
- * Instruction Fault Address Register(IFAR). Holds the MVA of the faulting address
- * of the instruction that caused a prefetch abort.
+ * Instruction Fault Address Register(IFAR). Holds the MVA of the faulting
+ * address of the instruction that caused a prefetch abort.
*/
/* TLB operations.
@@ -225,10 +230,10 @@
/* Context ID Register (CONTEXTIDR). See cstlr.h */
-/* Translation Table Definitions ****************************************************************************/
+/* Translation Table Definitions ********************************************/
-/* Hardware translation table definitions. Only the "short descriptor format" is
- * supported.
+/* Hardware translation table definitions.
+ * Only the "short descriptor format" is supported.
*
* Level 1 Descriptor (PMD)
*
@@ -245,15 +250,16 @@
/* Level 1 Fault Translation Table Format.
*
- * Invalid or fault entry. "The associated VA is unmapped, and any attempt to
- * access it generates a Translation fault. Software can use bits[31:2] of the
- * descriptor for its own purposes, because the hardware ignores
+ * Invalid or fault entry. "The associated VA is unmapped, and any attempt
+ * to access it generates a Translation fault. Software can use bits[31:2]
+ * of the descriptor for its own purposes, because the hardware ignores
* these bits."
*/
/* Level 1 Page Table Translation Table Format.
*
- * Page table. "The descriptor gives the address of a second-level translation
+ * Page table.
+ * "The descriptor gives the address of a second-level translation
* table, that specifies the mapping of the associated 1MByte VA range."
*/
@@ -269,18 +275,21 @@
/* Level 1 Section/Supersection Descriptor.
*
- * Section or Supersection. "The descriptor gives the base address of the
- * Section or Supersection. Bit[18] determines whether the entry describes a
- * Section or a Supersection. If the implementation supports the PXN
- * attribute, this encoding also defines the PXN bit as 0. Section descriptors
- * allow fast, single level mapping between 1Mb address regions."
-
- * PXN Section or Supersection. "If an implementation supports the PXN attribute,
- * this encoding is identical..., except that it defines the PXN bit as 1.
- *
- * "If the implementation does not support the PXN attribute, an attempt to access
- * the associated VA generates a Translation fault. On an implementation that
- * does not support the PXN attribute, this encoding must not be used."
+ * Section or Supersection.
+ * "The descriptor gives the base address of the Section or Supersection.
+ * Bit[18] determines whether the entry describes a Section or a
+ * Supersection. If the implementation supports the PXN attribute, this
+ * encoding also defines the PXN bit as 0. Section descriptors allow fast,
+ * single level mapping between 1Mb address regions."
+
+ * PXN Section or Supersection.
+ * "If an implementation supports the PXN attribute, this encoding is
+ * identical..., except that it defines the PXN bit as 1.
+ *
+ * "If the implementation does not support the PXN attribute, an attempt to
+ * access the associated VA generates a Translation fault. On an
+ * implementation that does not support the PXN attribute, this encoding
+ * must not be used."
*/
/* Section */
@@ -300,6 +309,7 @@
#define PMD_SECT_AP1 (2 << PMD_SECT_AP_SHIFT) /* AP[1]: Access permission bit 1 */
#define PMD_SECT_TEX_SHIFT (12) /* Bits 12-14: Memory region attribute bits */
#define PMD_SECT_TEX_MASK (7 << PMD_SECT_TEX_SHIFT)
+
#define PMD_SECT_AP2 (1 << 15) /* Bit 15: AP[2]: Access permission bit 2 */
#define PMD_SECT_S (1 << 16) /* Bit 16: Shareable bit */
#define PMD_SECT_NG (1 << 17) /* Bit 17: Not global bit. */
@@ -351,6 +361,7 @@
# define PMD_SECT_AP_R01 (PMD_SECT_AP1 | PMD_SECT_AP2)
#else
+
/* AP[2:0] access permissions control, Short-descriptor format only:
*
* AP[2] AP[1] AP[0] PL1/2 PL0 Description
@@ -383,8 +394,9 @@
/* Short-descriptor translation table second-level descriptor formats
*
- * A PMD_TYPE_PTE level-one table entry provides the base address of the beginning
- * of a second-level page table. There are two types of page table entries:
+ * A PMD_TYPE_PTE level-one table entry provides the base address of the
+ * beginning of a second-level page table. There are two types of page
+ * table entries:
*
* - Large page table entries support mapping of 64KB memory regions.
* - Small page table entries support mapping of 4KB memory regions.
@@ -446,6 +458,7 @@
*/
#ifdef CONFIG_AFE_ENABLE
+
/* AP[2:1] access permissions model. AP[0] is used as an access flag:
*
* AP[2] AP[1] PL1 PL0 Description
@@ -630,7 +643,7 @@
#define PGTABLE_SIZE 0x00004000
-/* Virtual Page Table Location ******************************************************************************/
+/* Virtual Page Table Location **********************************************/
#ifdef CONFIG_PAGING
/* Check if the virtual address of the page table has been defined. It
@@ -652,7 +665,7 @@
#endif /* PGTABLE_BASE_VADDR */
-/* MMU flags ************************************************************************************************/
+/* MMU flags ****************************************************************/
/* Create some friendly definitions to handle page table entries */
@@ -674,7 +687,7 @@
#define PG_L1_PADDRMASK PMD_SECT_PADDR_MASK
-/* Addresses of Memory Regions ******************************************************************************/
+/* Addresses of Memory Regions **********************************************/
/* We position the locked region PTEs at an offset into the first
* L2 page table. The L1 entry points to an 1Mb aligned virtual
@@ -724,10 +737,10 @@
#define PG_L2_DATA_VADDR (PG_L2_LOCKED_VADDR + PG_L2_TEXT_SIZE)
#define PG_L2_DATA_SIZE (4*PG_DATA_NPAGES)
-/* Page Table Info ******************************************************************************************/
+/* Page Table Info **********************************************************/
-/* The number of pages in the in the page table (PG_PGTABLE_NPAGES). We
- * position the page table PTEs just after the data section PTEs.
+/* The number of pages in the in the page table (PG_PGTABLE_NPAGES).
+ * We position the page table PTEs just after the data section PTEs.
*/
#define PG_PGTABLE_NPAGES (PGTABLE_SIZE >> PAGESHIFT)
@@ -738,12 +751,12 @@
#define PG_L2_PGTABLE_VADDR (PG_L2_DATA_VADDR + PG_L2_DATA_SIZE)
#define PG_L2_PGTABLE_SIZE (4*PG_DATA_NPAGES)
-/* Vector Mapping *******************************************************************************************/
+/* Vector Mapping ***********************************************************/
/* One page is required to map the vector table. The vector table could lie
- * at virtual address zero (or at the start of RAM which is aliased to address
- * zero on the ea3131) or at virtual address 0xfff00000. We only have logic
- * here to support the former case.
+ * at virtual address zero (or at the start of RAM which is aliased to
+ * address zero on the ea3131) or at virtual address 0xfff00000. We only
+ * have logic here to support the former case.
*
* NOTE: If the vectors are at address zero, the page table will be
* forced to the highest RAM addresses. If the vectors are at 0xfff0000,
@@ -786,13 +799,15 @@
# define PG_L2_VECT_PADDR (PGTABLE_L2_BASE_PADDR + PG_L2_VECT_OFFSET)
# define PG_L2_VECT_VADDR (PGTABLE_L2_BASE_VADDR + PG_L2_VECT_OFFSET)
-/* Case 3: High vectors or the locked region is not at the beginning or SRAM */
+/* Case 3:
+ * High vectors or the locked region is not at the beginning or SRAM
+ */
#else
# error "Logic missing for high vectors in this case"
#endif
-/* Page Usage ***********************************************************************************************/
+/* Page Usage ***************************************************************/
/* This is the total number of pages used in the text/data mapping: */
@@ -807,7 +822,7 @@
# error "Total pages required exceeds RAM size"
#endif
-/* Page Management ******************************************************************************************/
+/* Page Management **********************************************************/
/* For page management purposes, the following summarize the "heap" of
* free pages, operations on free pages and the L2 page table.
@@ -849,10 +864,10 @@
* (virtual)address of the backing page memory.
*
* These are used as follows: If a miss occurs at some virtual address, va,
- * A new page index, ndx, is allocated. PG_POOL_PGPADDR(i) converts the index
- * into the physical address of the page memory; PG_POOL_L2VADDR(va) converts
- * the virtual address in the L2 page table there the new mapping will be
- * written.
+ * A new page index, ndx, is allocated. PG_POOL_PGPADDR(i) converts the
+ * index into the physical address of the page memory; PG_POOL_L2VADDR(va)
+ * converts the virtual address in the L2 page table there the new mapping
+ * will be written.
*/
#define PG_POOL_VA2L1OFFSET(va) (((va) >> 20) << 2)
@@ -872,13 +887,13 @@
#endif /* CONFIG_PAGING */
-/************************************************************************************************************
+/****************************************************************************
* Public Types
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
-/* struct section_mapping_s describes the L1 mapping of a large region of memory
- * consisting of one or more 1MB sections (nsections).
+/* struct section_mapping_s describes the L1 mapping of a large region of
+ * memory consisting of one or more 1MB sections (nsections).
*
* All addresses must be aligned to 1MB address boundaries.
*/
@@ -892,13 +907,13 @@ struct section_mapping_s
};
#endif
-/************************************************************************************************************
+/****************************************************************************
* Assembly Macros
- ************************************************************************************************************/
+ ****************************************************************************/
#ifdef __ASSEMBLY__
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_disable_mmu
*
* Description:
@@ -907,7 +922,7 @@ struct section_mapping_s
* Input Parameters:
* None
*
- ************************************************************************************************************/
+ ****************************************************************************/
.macro cp15_disable_mmu, scratch
mrc p15, 0, \scratch, c1, c0, 0
@@ -915,27 +930,27 @@ struct section_mapping_s
mcr p15, 0, \scratch, c1, c0, 0
.endm
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_tlbs
*
* Description:
* Invalidate entire unified TLB
*
- * The Invalidate entire TLB operations invalidate all unlocked entries in the
- * TLB. The operation ignores the value in the register Rt specified by the MCR
- * instruction that performs the operation. Software does not have to write a
- * value to the register before issuing the MCR instruction.
+ * The Invalidate entire TLB operations invalidate all unlocked entries in
+ * the TLB. The operation ignores the value in the register Rt specified by
+ * the MCR instruction that performs the operation. Software does not have
+ * to write a value to the register before issuing the MCR instruction.
*
* Input Parameters:
* None
*
- ************************************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_tlbs, scratch
mcr p15, 0, \scratch, c8, c7, 0 /* TLBIALL */
.endm
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_tlb_bymva
*
* Description:
@@ -944,7 +959,7 @@ struct section_mapping_s
* Input Parameters:
* vaddr - The virtual address to be invalidated
*
- ************************************************************************************************************/
+ ****************************************************************************/
.macro cp15_invalidate_tlb_bymva, vaddr
dsb
@@ -957,7 +972,7 @@ struct section_mapping_s
isb
.endm
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_wrdacr
*
* Description:
@@ -966,7 +981,7 @@ struct section_mapping_s
* Input Parameters:
* dacr - The new value of the DACR
*
- ************************************************************************************************************/
+ ****************************************************************************/
.macro cp15_wrdacr, dacr
mcr p15, 0, \dacr, c3, c0, 0
@@ -980,7 +995,7 @@ struct section_mapping_s
nop
.endm
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_wrttb
*
* Description:
@@ -993,7 +1008,7 @@ struct section_mapping_s
* Input Parameters:
* ttb - The new value of the TTBR0 register
*
- ************************************************************************************************************/
+ ****************************************************************************/
.macro cp15_wrttb, ttb, scratch
mcr p15, 0, \ttb, c2, c0, 0
@@ -1009,7 +1024,7 @@ struct section_mapping_s
mcr p15, 0, \scratch, c2, c0, 2
.endm
-/************************************************************************************************************
+/****************************************************************************
* Name: pg_l2map
*
* Description:
@@ -1042,7 +1057,7 @@ struct section_mapping_s
* - The L2 page tables have been zeroed prior to calling this function
* - pg_l1span has been called to initialize the L1 table.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_PAGING
.macro pg_l2map, l2, ppage, npages, mmuflags, tmp
@@ -1079,13 +1094,14 @@ struct section_mapping_s
.endm
#endif /* CONFIG_PAGING */
-/************************************************************************************************************
+/****************************************************************************
* Name: pg_l1span
*
* Description:
- * Write several, contiguous, unmapped, small L1 page table entries. As many
- * entries will be written as many as needed to span npages. This macro is
- * used when CONFIG_PAGING is enable. In this case, it is used as follows:
+ * Write several, contiguous, unmapped, small L1 page table entries.
+ * As many entries will be written as many as needed to span npages.
+ * This macro is used when CONFIG_PAGING is enable. In this case,
+ * it is used as follows:
*
* ldr r0, =PG_L1_PGTABLE_PADDR <-- Address in the L1 table
* ldr r1, =PG_L2_PGTABLE_PADDR <-- Physical address of L2 page table
@@ -1095,9 +1111,11 @@ struct section_mapping_s
* pg_l1span r0, r1, r2, r3, r4, r4
*
* Input Parameters (unmodified unless noted):
- * l1 - Physical or virtual address in the L1 table to begin writing (modified)
+ * l1 - Physical or virtual address in the L1 table to begin writing
+ * (modified)
* l2 - Physical start address in the L2 page table (modified)
- * npages - Number of pages to required to span that memory region (modified)
+ * npages - Number of pages to required to span that memory region
+ * (modified)
* ppage - The number of pages in page 1 (modified)
* mmuflags - L1 MMU flags to use
*
@@ -1115,7 +1133,7 @@ struct section_mapping_s
* - The MMU is not yet enabled
* - The L2 page tables have been zeroed prior to calling this function
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_PAGING
.macro pg_l1span, l1, l2, npages, ppage, mmuflags, tmp
@@ -1158,13 +1176,13 @@ struct section_mapping_s
#endif /* CONFIG_PAGING */
#endif /* __ASSEMBLY__ */
-/************************************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_disable_mmu
*
* Description:
@@ -1173,7 +1191,7 @@ struct section_mapping_s
* Input Parameters:
* None
*
- ************************************************************************************************************/
+ ****************************************************************************/
static inline void cp15_disable_mmu(void)
{
@@ -1188,21 +1206,22 @@ static inline void cp15_disable_mmu(void)
);
}
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_tlbs
*
* Description:
* Invalidate entire unified TLB
*
- * The Invalidate entire TLB operations invalidate all unlocked entries in the
- * TLB. The operation ignores the value in the register Rt specified by the MCR
- * instruction that performs the operation. Software does not have to write a
- * value to the register before issuing the MCR instruction.
+ * The Invalidate entire TLB operations invalidate all unlocked entries
+ * in the TLB. The operation ignores the value in the register Rt specified
+ * by the MCR instruction that performs the operation. Software does not
+ * have to write a value to the register before issuing the MCR
+ * instruction.
*
* Input Parameters:
* None
*
- ************************************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_tlbs(void)
{
@@ -1215,7 +1234,7 @@ static inline void cp15_invalidate_tlbs(void)
);
}
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_invalidate_tlb_bymva
*
* Description:
@@ -1224,7 +1243,7 @@ static inline void cp15_invalidate_tlbs(void)
* Input Parameters:
* vaddr - The virtual address to be invalidated
*
- ************************************************************************************************************/
+ ****************************************************************************/
static inline void cp15_invalidate_tlb_bymva(uint32_t vaddr)
{
@@ -1244,7 +1263,7 @@ static inline void cp15_invalidate_tlb_bymva(uint32_t vaddr)
);
}
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_wrdacr
*
* Description:
@@ -1253,7 +1272,7 @@ static inline void cp15_invalidate_tlb_bymva(uint32_t vaddr)
* Input Parameters:
* dacr - The new value of the DACR
*
- ************************************************************************************************************/
+ ****************************************************************************/
static inline void cp15_wrdacr(unsigned int dacr)
{
@@ -1274,7 +1293,7 @@ static inline void cp15_wrdacr(unsigned int dacr)
);
}
-/************************************************************************************************************
+/****************************************************************************
* Name: cp15_wrttb
*
* Description:
@@ -1287,7 +1306,7 @@ static inline void cp15_wrdacr(unsigned int dacr)
* Input Parameters:
* ttb - The new value of the TTBR0 register
*
- ************************************************************************************************************/
+ ****************************************************************************/
static inline void cp15_wrttb(unsigned int ttb)
{
@@ -1310,16 +1329,17 @@ static inline void cp15_wrttb(unsigned int ttb)
);
}
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_l1_getentry
*
* Description:
- * Given a virtual address, return the value of the corresponding L1 table entry.
+ * Given a virtual address, return the value of the corresponding L1 table
+ * entry.
*
* Input Parameters:
* vaddr - The virtual address to be mapped.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_ARCH_ROMPGTABLE
static inline uint32_t mmu_l1_getentry(uint32_t vaddr)
@@ -1333,18 +1353,18 @@ static inline uint32_t mmu_l1_getentry(uint32_t vaddr)
}
#endif
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_l2_getentry
*
* Description:
- * Given a address of the beginning of an L2 page table and a virtual address,
- * return the value of the corresponding L2 page table entry.
+ * Given a address of the beginning of an L2 page table and a virtual
+ * address, return the value of the corresponding L2 page table entry.
*
* Input Parameters:
* l2vaddr - The virtual address of the beginning of the L2 page table
* vaddr - The virtual address to be mapped.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_ARCH_ROMPGTABLE
static inline uint32_t mmu_l2_getentry(uint32_t l2vaddr, uint32_t vaddr)
@@ -1367,13 +1387,13 @@ static inline uint32_t mmu_l2_getentry(uint32_t l2vaddr, uint32_t vaddr)
#endif /* __ASSEMBLY__ */
-/************************************************************************************************************
+/****************************************************************************
* Public Data
- ************************************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
@@ -1384,27 +1404,27 @@ extern "C"
#define EXTERN extern
#endif
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_l1_setentry
*
* Description:
- * Set a one level 1 translation table entry. Only a single L1 page table is
- * supported.
+ * Set a one level 1 translation table entry. Only a single L1 page table
+ * is supported.
*
* Input Parameters:
- * paddr - The physical address to be mapped. Must be aligned to a 1MB address
- * boundary
- * vaddr - The virtual address to be mapped. Must be aligned to a 1MB address
- * boundary
+ * paddr - The physical address to be mapped. Must be aligned to a 1MB
+ * address boundary
+ * vaddr - The virtual address to be mapped. Must be aligned to a 1MB
+ * address boundary
* mmuflags - The MMU flags to use in the mapping.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_ARCH_ROMPGTABLE
void mmu_l1_setentry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags);
#endif
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_l1_restore
*
* Description:
@@ -1415,13 +1435,13 @@ void mmu_l1_setentry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags);
* vaddr - A virtual address to be mapped
* l1entry - The value to write into the page table entry
*
- ************************************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_ADDRENV)
void mmu_l1_restore(uintptr_t vaddr, uint32_t l1entry);
#endif
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_l1_clrentry
*
* Description:
@@ -1431,13 +1451,13 @@ void mmu_l1_restore(uintptr_t vaddr, uint32_t l1entry);
* Input Parameters:
* vaddr - A virtual address within the L1 address region to be unmapped.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#if !defined (CONFIG_ARCH_ROMPGTABLE) && defined(CONFIG_ARCH_ADDRENV)
# define mmu_l1_clrentry(v) mmu_l1_restore(v,0)
#endif
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_l2_setentry
*
* Description:
@@ -1452,14 +1472,14 @@ void mmu_l1_restore(uintptr_t vaddr, uint32_t l1entry);
* address boundary
* mmuflags - The MMU flags to use in the mapping.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_ARCH_ROMPGTABLE
void mmu_l2_setentry(uint32_t l2vaddr, uint32_t paddr, uint32_t vaddr,
uint32_t mmuflags);
#endif
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_l1_map_region
*
* Description:
@@ -1469,13 +1489,13 @@ void mmu_l2_setentry(uint32_t l2vaddr, uint32_t paddr, uint32_t vaddr,
* Input Parameters:
* mapping - Describes the mapping to be performed.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_ARCH_ROMPGTABLE
void mmu_l1_map_region(const struct section_mapping_s *mapping);
#endif
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_l1_map_regions
*
* Description:
@@ -1486,14 +1506,14 @@ void mmu_l1_map_region(const struct section_mapping_s *mapping);
* mappings - Describes the array of mappings to be performed.
* count - The number of mappings to be performed.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_ARCH_ROMPGTABLE
void mmu_l1_map_regions(const struct section_mapping_s *mappings,
size_t count);
#endif
-/************************************************************************************************************
+/****************************************************************************
* Name: mmu_invalidate_region
*
* Description:
@@ -1503,7 +1523,7 @@ void mmu_l1_map_regions(const struct section_mapping_s *mappings,
* vaddr - The beginning of the region to invalidate.
* size - The size of the region in bytes to be invalidated.
*
- ************************************************************************************************************/
+ ****************************************************************************/
#ifndef CONFIG_ARCH_ROMPGTABLE
void mmu_invalidate_region(uint32_t vstart, size_t size);
diff --git a/arch/arm/src/armv7-a/pgalloc.h b/arch/arm/src/armv7-a/pgalloc.h
index 40a98dd..aade42d 100644
--- a/arch/arm/src/armv7-a/pgalloc.h
+++ b/arch/arm/src/armv7-a/pgalloc.h
@@ -205,7 +205,7 @@ static inline uintptr_t get_l2_entry(FAR uint32_t *l2table, uintptr_t vaddr)
}
/****************************************************************************
- * Public Functions
+ * Public Functions Prototypes
****************************************************************************/
/****************************************************************************
diff --git a/arch/arm/src/armv7-a/sctlr.h b/arch/arm/src/armv7-a/sctlr.h
index 7c219fd..83dcd73 100644
--- a/arch/arm/src/armv7-a/sctlr.h
+++ b/arch/arm/src/armv7-a/sctlr.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/sctlr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,42 +16,47 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/* References:
- * "Cortex-A5� MPCore, Technical Reference Manual", Revision: r0p1, Copyright � 2010
- * ARM. All rights reserved. ARM DDI 0434B (ID101810)
- * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright �
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.b (ID072512)
+ * "Cortex-A5� MPCore, Technical Reference Manual",
+ * Revision: r0p1, Copyright � 2010 ARM.
+ * All rights reserved. ARM DDI 0434B (ID101810)
+ * "ARM� Architecture Reference Manual, ARMv7-A and ARMv7-R edition",
+ * Copyright � 1996-1998, 2000, 2004-2012 ARM.
+ * All rights reserved. ARM DDI 0406C.b (ID072512)
*/
#ifndef __ARCH_ARM_SRC_ARMV7_A_SCTLR_H
#define __ARCH_ARM_SRC_ARMV7_A_SCTLR_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
+
/* Reference: Cortex-A5� MPCore Paragraph 4.2, "Register summary." */
/* Main ID Register (MIDR) */
+
/* TODO: To be provided */
/* Cache Type Register (CTR) */
+
/* TODO: To be provided */
/* TCM Type Register
*
- * The Cortex-A5 MPCore processor does not implement instruction or data Tightly
- * Coupled Memory (TCM), so this register always Reads-As-Zero (RAZ).
+ * The Cortex-A5 MPCore processor does not implement instruction or data
+ * Tightly Coupled Memory (TCM), so this register always Reads-As-Zero (RAZ).
*
* TLB Type Register
*
- * The Cortex-A5 MPCore processor does not implement instruction or data Tightly
- * CoupledMemory (TCM), so this register always Reads-As-Zero (RAZ).
+ * The Cortex-A5 MPCore processor does not implement instruction or data
+ * Tightly CoupledMemory (TCM), so this register always Reads-As-Zero (RAZ).
*/
/* Multiprocessor Affinity Register (MPIDR) */
@@ -69,42 +74,61 @@
#define MPIDR_U (1 << 30) /* Bit 30: Multiprocessing Extensions. */
/* Processor Feature Register 0 (ID_PFR0) */
+
/* TODO: To be provided */
/* Processor Feature Register 1 (ID_PFR1) */
+
/* TODO: To be provided */
/* Debug Feature Register 0 (ID_DFR0) */
+
/* TODO: To be provided */
/* Auxiliary Feature Register 0 (ID_AFR0) */
+
/* TODO: To be provided */
/* Memory Model Features Register 0 (ID_MMFR0) */
+
/* Memory Model Features Register 1 (ID_MMFR1) */
+
/* Memory Model Features Register 2 (ID_MMFR2) */
+
/* Memory Model Features Register 3 (ID_MMFR3) */
+
/* TODO: To be provided */
/* Instruction Set Attributes Register 0 (ID_ISAR0) */
+
/* Instruction Set Attributes Register 1 (ID_ISAR1) */
+
/* Instruction Set Attributes Register 2 (ID_ISAR2) */
+
/* Instruction Set Attributes Register 3 (ID_ISAR3) */
+
/* Instruction Set Attributes Register 4 (ID_ISAR4) */
+
/* Instruction Set Attributes Register 5 (ID_ISAR5) */
+
/* Instruction Set Attributes Register 6-7 (ID_ISAR6-7). Reserved. */
+
/* TODO: Others to be provided */
/* Cache Size Identification Register (CCSIDR) */
+
/* TODO: To be provided */
/* Cache Level ID Register (CLIDR) */
+
/* TODO: To be provided */
/* Auxiliary ID Register (AIDR) */
+
/* TODO: To be provided */
/* Cache Size Selection Register (CSSELR) */
+
/* TODO: To be provided */
/* System Control Register (SCTLR)
@@ -148,6 +172,7 @@
/* Bits 10-31: Reserved */
/* Coprocessor Access Control Register (CPACR) */
+
/* TODO: To be provided */
/* Secure Configuration Register (SCR) */
@@ -166,6 +191,7 @@
/* Bits 10-31: Reserved */
/* Secure Debug Enable Register (SDER) */
+
/* TODO: To be provided */
/* Non-secure Access Control Register (NSACR) */
@@ -181,16 +207,24 @@
/* Bits 19-31: Reserved */
/* Virtualization Control Register (VCR) */
+
/* TODO: To be provided */
/* Translation Table Base Register 0 (TTBR0). See mmu.h */
+
/* Translation Table Base Register 1 (TTBR1). See mmu.h */
+
/* Translation Table Base Control Register (TTBCR). See mmu.h */
+
/* Domain Access Control Register (DACR). See mmu.h */
+
/* Data Fault Status Register (DFSR). See mmu.h */
+
/* Instruction Fault Status Register (IFSR). See mmu.h */
-/* Auxiliary Data Fault Status Register (ADFSR). Not used in this implementation. */
+/* Auxiliary Data Fault Status Register (ADFSR).
+ * Not used in this implementation.
+ */
/* Data Fault Address Register(DFAR)
*
@@ -198,13 +232,13 @@
*
* Instruction Fault Address Register(IFAR)
*
- * Holds the MVA of the faulting address of the instruction that caused a prefetch
- * abort.
+ * Holds the MVA of the faulting address of the instruction that caused a
+ * prefetch abort.
*
* NOP Register
*
- * The use of this register is optional and deprecated. Use the NOP instruction
- * instead.
+ * The use of this register is optional and deprecated.
+ * Use the NOP instruction instead.
*
* Physical Address Register (PAR)
*
@@ -214,11 +248,12 @@
*
* Instruction Synchronization Barrier
*
- * The use of ISB is optional and deprecated. Use the instruction ISB instead.
+ * The use of ISB is optional and deprecated.
+ * Use the instruction ISB instead.
*
* Data Memory Barrier
- * The use of DMB is deprecated and, on Cortex-A5 MPCore, behaves as NOP. Use the
- * instruction DMB instead.
+ * The use of DMB is deprecated and, on Cortex-A5 MPCore, behaves as NOP.
+ * Use the instruction DMB instead.
*/
/* Vector Base Address Register (VBAR) */
@@ -226,12 +261,15 @@
#define VBAR_MASK (0xffffffe0)
/* Monitor Vector Base Address Register (MVBAR) */
+
/* TODO: To be provided */
/* Interrupt Status Register (ISR) */
+
/* TODO: To be provided */
/* Virtualization Interrupt Register (VIR) */
+
/* TODO: To be provided */
/* Context ID Register (CONTEXTIDR) */
@@ -242,28 +280,29 @@
#define CONTEXTIDR_PROCID_MASK (0x00ffffff << CONTEXTIDR_PROCID_SHIFT)
/* Configuration Base Address Register (CBAR) */
+
/* TODO: To be provided */
-/************************************************************************************
+/****************************************************************************
* Assembly Macros
- ************************************************************************************/
+ ****************************************************************************/
#ifdef __ASSEMBLY__
/* Get the device ID */
.macro cp15_rdid, id
- mrc p15, 0, \id, c0, c0, 0
+ mrc p15, 0, \id, c0, c0, 0
.endm
/* Read/write the system control register (SCTLR) */
.macro cp15_rdsctlr, sctlr
- mrc p15, 0, \sctlr, c1, c0, 0
+ mrc p15, 0, \sctlr, c1, c0, 0
.endm
.macro cp15_wrsctlr, sctlr
- mcr p15, 0, \sctlr, c1, c0, 0
+ mcr p15, 0, \sctlr, c1, c0, 0
nop
nop
nop
@@ -275,9 +314,9 @@
.endm
#endif /* __ASSEMBLY__ */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
diff --git a/arch/arm/src/armv7-a/scu.h b/arch/arm/src/armv7-a/scu.h
index fd76968..3e1be13 100644
--- a/arch/arm/src/armv7-a/scu.h
+++ b/arch/arm/src/armv7-a/scu.h
@@ -144,7 +144,7 @@
#define SCU_SNSAC_GTIM_CPU(n) (1 << ((n)+8)) /* CPUn has non-secure access to global timer */
/****************************************************************************
- * Public Functions
+ * Public Functions Prototypes
****************************************************************************/
/****************************************************************************
diff --git a/arch/arm/src/armv7-a/svcall.h b/arch/arm/src/armv7-a/svcall.h
index 8e45835..f0b2017 100644
--- a/arch/arm/src/armv7-a/svcall.h
+++ b/arch/arm/src/armv7-a/svcall.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv7-a/svcall.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV7_A_SVCALL_H
#define __ARCH_ARM_SRC_ARMV7_A_SVCALL_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -33,15 +33,15 @@
#ifdef CONFIG_LIB_SYSCALL
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************/
+/* Configuration ************************************************************/
-/* This logic uses one system call for the syscall return. So a minimum of one
- * syscall values must be reserved. If CONFIG_BUILD_KERNEL is defined, then four
- * more syscall values must be reserved.
+/* This logic uses one system call for the syscall return. So a minimum of
+ * one syscall values must be reserved. If CONFIG_BUILD_KERNEL is defined,
+ * then four more syscall values must be reserved.
*/
#ifdef CONFIG_BUILD_KERNEL
@@ -58,7 +58,7 @@
# endif
#endif
-/* Cortex-A system calls ************************************************************/
+/* Cortex-A system calls ****************************************************/
/* SYS call 0:
*
@@ -93,7 +93,8 @@
/* SYS call 4:
*
- * void signal_handler(_sa_sigaction_t sighand, int signo, FAR siginfo_t *info,
+ * void signal_handler(_sa_sigaction_t sighand,
+ * int signo, FAR siginfo_t *info,
* FAR void *ucontext);
*/
@@ -108,9 +109,9 @@
#endif /* CONFIG_BUILD_KERNEL */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* CONFIG_LIB_SYSCALL */
#endif /* __ARCH_ARM_SRC_ARMV7_A_SVCALL_H */
[incubator-nuttx] 09/09: arch: arm: armv8-m: fix nxstyle errors
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit da65128b8c1c01e335dbb751eaa18b723d87c988
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:14:53 2021 +0100
arch: arm: armv8-m: fix nxstyle errors
Fix nxstyle errors to pass CI
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/armv8-m/arm_exception.S | 38 ++++++------
arch/arm/src/armv8-m/arm_fpu.S | 28 ++++-----
arch/arm/src/armv8-m/arm_fullcontextrestore.S | 28 ++++-----
arch/arm/src/armv8-m/arm_lazyexception.S | 34 +++++------
arch/arm/src/armv8-m/arm_mpu.c | 61 +++++++++----------
arch/arm/src/armv8-m/arm_saveusercontext.S | 28 ++++-----
arch/arm/src/armv8-m/arm_setjmp.S | 30 +++++-----
arch/arm/src/armv8-m/arm_switchcontext.S | 28 ++++-----
arch/arm/src/armv8-m/barriers.h | 12 ++--
arch/arm/src/armv8-m/dwt.h | 41 ++++++-------
arch/arm/src/armv8-m/etm.h | 20 +++----
arch/arm/src/armv8-m/exc_return.h | 69 +++++++++++-----------
arch/arm/src/armv8-m/itm.h | 53 ++++++++---------
arch/arm/src/armv8-m/mpu.h | 84 +++++++++++++--------------
arch/arm/src/armv8-m/nvic.h | 42 ++++++++------
arch/arm/src/armv8-m/psr.h | 16 ++---
arch/arm/src/armv8-m/svcall.h | 30 +++++-----
arch/arm/src/armv8-m/tpi.h | 41 ++++++-------
arch/arm/src/armv8-m/vfork.S | 24 ++++----
19 files changed, 360 insertions(+), 347 deletions(-)
diff --git a/arch/arm/src/armv8-m/arm_exception.S b/arch/arm/src/armv8-m/arm_exception.S
index 9a3c434..38ba614 100644
--- a/arch/arm/src/armv8-m/arm_exception.S
+++ b/arch/arm/src/armv8-m/arm_exception.S
@@ -1,7 +1,8 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_exception.S
*
- * Copyright (C) 2009-2013, 2015-2016, 2018 Gregory Nutt. All rights reserved.
+ * Copyright (C) 2009-2013, 2015-2016, 2018 Gregory Nutt.
+ * All rights reserved.
* Copyright (C) 2012 Michael Smith. All rights reserved.
* Author: Gregory Nutt <gn...@nuttx.org>
*
@@ -32,11 +33,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -46,10 +47,11 @@
#include "chip.h"
#include "exc_return.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
-/* Configuration ********************************************************************/
+ ****************************************************************************/
+
+/* Configuration ************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the
@@ -80,9 +82,9 @@
# endif
#endif
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl exception_common
@@ -90,18 +92,18 @@
.thumb
.file "arm_exception.S"
-/************************************************************************************
+/****************************************************************************
* Macro Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: setintstack
*
* Description:
* Set the current stack pointer to the "top" the interrupt stack. Single CPU
* case. Must be provided by MCU-specific logic in the SMP case.
*
- ************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro setintstack, tmp1, tmp2
@@ -113,9 +115,9 @@
.endm
#endif
-/************************************************************************************
+/****************************************************************************
* .text
- ************************************************************************************/
+ ****************************************************************************/
/* Common exception handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
@@ -343,13 +345,13 @@ exception_common:
.size exception_common, .-exception_common
-/************************************************************************************
+/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
- ************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
diff --git a/arch/arm/src/armv8-m/arm_fpu.S b/arch/arm/src/armv8-m/arm_fpu.S
index 48e301f..b6317f6 100644
--- a/arch/arm/src/armv8-m/arm_fpu.S
+++ b/arch/arm/src/armv8-m/arm_fpu.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_fpu.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,16 +16,16 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/*
* When this file is assembled, it will require the following GCC options:
*
* -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=vfp -meabi=5 -mthumb
*/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -33,13 +33,13 @@
#ifdef CONFIG_ARCH_FPU
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl arm_savefpu
.globl arm_restorefpu
@@ -48,11 +48,11 @@
.thumb
.file "arm_fpu.S"
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_savefpu
*
* Description:
@@ -69,7 +69,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.type arm_savefpu, function
@@ -157,7 +157,7 @@ arm_savefpu:
.size arm_savefpu, .-arm_savefpu
-/************************************************************************************
+/****************************************************************************
* Name: arm_restorefpu
*
* Description:
@@ -175,7 +175,7 @@ arm_savefpu:
* This function does not return anything explicitly. However, it is called from
* interrupt level assembly logic that assumes that r0 is preserved.
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.type arm_restorefpu, function
diff --git a/arch/arm/src/armv8-m/arm_fullcontextrestore.S b/arch/arm/src/armv8-m/arm_fullcontextrestore.S
index 9b08e6b..d8f40cd 100644
--- a/arch/arm/src/armv8-m/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv8-m/arm_fullcontextrestore.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_fullcontextrestore.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.syntax unified
.thumb
.file "arm_fullcontextrestore.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_fullcontextrestore
*
* Description:
@@ -59,7 +59,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.globl arm_fullcontextrestore
diff --git a/arch/arm/src/armv8-m/arm_lazyexception.S b/arch/arm/src/armv8-m/arm_lazyexception.S
index fe89b32..d88539e 100644
--- a/arch/arm/src/armv8-m/arm_lazyexception.S
+++ b/arch/arm/src/armv8-m/arm_lazyexception.S
@@ -1,4 +1,4 @@
-/************************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/gnu/up_lazyexcption.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -30,11 +30,11 @@
#include "chip.h"
#include "exc_return.h"
-/************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************************/
+/* Configuration ************************************************************/
#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
/* In kernel mode without an interrupt stack, this interrupt handler will set the MSP to the
@@ -63,9 +63,9 @@
# endif
#endif
-/************************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************************/
+ ****************************************************************************/
.globl exception_common
@@ -73,18 +73,18 @@
.thumb
.file "arm_lazyexception.S"
-/************************************************************************************************
+/****************************************************************************
* Macro Definitions
- ************************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************************
+/****************************************************************************
* Name: setintstack
*
* Description:
* Set the current stack pointer to the "top" the interrupt stack. Single CPU case. Must be
* provided by MCU-specific logic in chip.h for the SMP case.
*
- ************************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.macro setintstack, tmp1, tmp2
@@ -96,9 +96,9 @@
.endm
#endif
-/************************************************************************************************
+/****************************************************************************
* .text
- ************************************************************************************************/
+ ****************************************************************************/
/* Common IRQ handling logic. On entry here, the return stack is on either
* the PSP or the MSP and looks like the following:
@@ -361,13 +361,13 @@ exception_common:
bx r14 /* And return */
.size exception_common, .-exception_common
-/************************************************************************************************
+/****************************************************************************
* Name: g_intstackalloc/g_intstackbase
*
* Description:
* Shouldn't happen
*
- ************************************************************************************************/
+ ****************************************************************************/
#if !defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
diff --git a/arch/arm/src/armv8-m/arm_mpu.c b/arch/arm/src/armv8-m/arm_mpu.c
index 9a1ed64..9aa5c77 100644
--- a/arch/arm/src/armv8-m/arm_mpu.c
+++ b/arch/arm/src/armv8-m/arm_mpu.c
@@ -1,4 +1,4 @@
-/*****************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/arm_mpu.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- *****************************************************************************/
+ ****************************************************************************/
-/*****************************************************************************
+/****************************************************************************
* Included Files
- *****************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -30,19 +30,19 @@
#include "mpu.h"
#include "arm_internal.h"
-/*****************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- *****************************************************************************/
+ ****************************************************************************/
-/* Configuration *************************************************************/
+/* Configuration ************************************************************/
#ifndef CONFIG_ARM_MPU_NREGIONS
# define CONFIG_ARM_MPU_NREGIONS 8
#endif
-/*****************************************************************************
+/****************************************************************************
* Private Data
- *****************************************************************************/
+ ****************************************************************************/
/* These sets represent the set of disabled memory sub-regions. A bit set
* corresponds to a disabled sub-region; the LS bit corresponds to the first
@@ -72,11 +72,11 @@ static const uint8_t g_ls_regionmask[9] =
static uint8_t g_region;
-/*****************************************************************************
+/****************************************************************************
* Private Functions
- *****************************************************************************/
+ ****************************************************************************/
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_subregion_ms
*
* Description:
@@ -88,7 +88,7 @@ static uint8_t g_region;
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
- *****************************************************************************/
+ ****************************************************************************/
static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
{
@@ -126,7 +126,7 @@ static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
return g_ms_regionmask[nsrs];
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_subregion_ls
*
* Description:
@@ -139,7 +139,7 @@ static inline uint32_t mpu_subregion_ms(size_t size, uint8_t l2size)
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
- *****************************************************************************/
+ ****************************************************************************/
static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
{
@@ -177,11 +177,11 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
return g_ls_regionmask[nsrs];
}
-/*****************************************************************************
+/****************************************************************************
* Public Functions
- *****************************************************************************/
+ ****************************************************************************/
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_allocregion
*
* Description:
@@ -192,7 +192,7 @@ static inline uint32_t mpu_subregion_ls(size_t offset, uint8_t l2size)
* - Regions are only allocated early in initialization, so no special
* protection against re-entrancy is required;
*
- *****************************************************************************/
+ ****************************************************************************/
unsigned int mpu_allocregion(void)
{
@@ -200,7 +200,7 @@ unsigned int mpu_allocregion(void)
return (unsigned int)g_region++;
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_log2regionceil
*
* Description:
@@ -209,7 +209,7 @@ unsigned int mpu_allocregion(void)
*
* size <= (1 << l2size)
*
- *****************************************************************************/
+ ****************************************************************************/
uint8_t mpu_log2regionceil(size_t size)
{
@@ -221,7 +221,7 @@ uint8_t mpu_log2regionceil(size_t size)
return l2size;
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_log2regionfloor
*
* Description:
@@ -230,7 +230,7 @@ uint8_t mpu_log2regionceil(size_t size)
*
* size >= (1 << l2size)
*
- *****************************************************************************/
+ ****************************************************************************/
uint8_t mpu_log2regionfloor(size_t size)
{
@@ -244,7 +244,7 @@ uint8_t mpu_log2regionfloor(size_t size)
return l2size;
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_subregion
*
* Description:
@@ -256,7 +256,7 @@ uint8_t mpu_log2regionfloor(size_t size)
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
- *****************************************************************************/
+ ****************************************************************************/
uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size)
{
@@ -301,13 +301,13 @@ uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size)
return ret;
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_control
*
* Description:
* Configure and enable (or disable) the MPU
*
- *****************************************************************************/
+ ****************************************************************************/
void mpu_control(bool enable, bool hfnmiena, bool privdefena)
{
@@ -331,13 +331,13 @@ void mpu_control(bool enable, bool hfnmiena, bool privdefena)
putreg32(regval, MPU_CTRL);
}
-/*****************************************************************************
+/****************************************************************************
* Name: mpu_configure_region
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
- *****************************************************************************/
+ ****************************************************************************/
void mpu_configure_region(uintptr_t base, size_t size,
uint32_t flags)
@@ -362,7 +362,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
l2size = mpu_log2regionceil(size + base - alignedbase);
DEBUGASSERT(alignedbase + (1 << l2size) >= base + size);
- DEBUGASSERT(l2size == 5 || alignedbase + (1 << (l2size - 1)) < base + size);
+ DEBUGASSERT(l2size == 5 ||
+ alignedbase + (1 << (l2size - 1)) < base + size);
DEBUGASSERT((alignedbase & MPU_RBAR_ADDR_MASK) == alignedbase);
DEBUGASSERT((alignedbase & ((1 << l2size) - 1)) == 0);
diff --git a/arch/arm/src/armv8-m/arm_saveusercontext.S b/arch/arm/src/armv8-m/arm_saveusercontext.S
index 124c7cf..079fdf0 100644
--- a/arch/arm/src/armv8-m/arm_saveusercontext.S
+++ b/arch/arm/src/armv8-m/arm_saveusercontext.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_saveusercontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.syntax unified
.thumb
.file "arm_saveusercontext.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_saveusercontext
*
* Description:
@@ -60,7 +60,7 @@
* 0: Normal return
* 1: Context switch return
*
- ************************************************************************************/
+ ****************************************************************************/
.text
.thumb_func
diff --git a/arch/arm/src/armv8-m/arm_setjmp.S b/arch/arm/src/armv8-m/arm_setjmp.S
index 1ff2bea..400405e 100644
--- a/arch/arm/src/armv8-m/arm_setjmp.S
+++ b/arch/arm/src/armv8-m/arm_setjmp.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_setjmp.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,26 +16,26 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
/* When this file is assembled, it will require the following GCC options:
*
* -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -meabi=5 -mthumb
*/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.globl setjmp
.globl longjmp
@@ -44,11 +44,11 @@
.thumb
.file "setjmp.S"
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: setjmp
*
* Description:
@@ -67,7 +67,7 @@
* 0 setjmp called directly
* non-0 we justed returned from a longjmp()
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.type setjmp, function
@@ -87,7 +87,7 @@ setjmp:
vmrs r1, fpscr /* Fetch the FPCSR */
str r1, [r0], #4 /* Save the floating point control and status register */
- // DSA: don't need to inc r0
+ /* DSA: don't need to inc r0 */
#endif /* CONFIG_ARCH_FPU */
/* we're done, we're out of here */
@@ -97,7 +97,7 @@ setjmp:
.size setjmp, .-setjmp
-/************************************************************************************
+/****************************************************************************
* Name: longjmp
*
* Description:
@@ -117,7 +117,7 @@ setjmp:
* Returned Value:
* This function does not return anything explicitly.
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.type longjmp, function
diff --git a/arch/arm/src/armv8-m/arm_switchcontext.S b/arch/arm/src/armv8-m/arm_switchcontext.S
index da04d22..75d2a1b 100644
--- a/arch/arm/src/armv8-m/arm_switchcontext.S
+++ b/arch/arm/src/armv8-m/arm_switchcontext.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/gnu/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
@@ -28,27 +28,27 @@
#include "nvic.h"
#include "svcall.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.syntax unified
.thumb
.file "arm_switchcontext.S"
-/************************************************************************************
+/****************************************************************************
* Macros
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: arm_switchcontext
*
* Description:
@@ -60,7 +60,7 @@
* Returned Value:
* None
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.globl arm_switchcontext
diff --git a/arch/arm/src/armv8-m/barriers.h b/arch/arm/src/armv8-m/barriers.h
index 10ffba2..1e3da82 100644
--- a/arch/arm/src/armv8-m/barriers.h
+++ b/arch/arm/src/armv8-m/barriers.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/barriers.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_BARRIERS_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_BARRIERS_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* ARMv8-M memory barriers */
diff --git a/arch/arm/src/armv8-m/dwt.h b/arch/arm/src/armv8-m/dwt.h
index a083ece..7804eab 100644
--- a/arch/arm/src/armv8-m/dwt.h
+++ b/arch/arm/src/armv8-m/dwt.h
@@ -1,11 +1,12 @@
-/***********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/dwt.h
*
* Copyright (c) 2009 - 2013 ARM LIMITED
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * modification, are permitted provided that the following conditions
+ * are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
@@ -16,17 +17,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
+ * AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville <pn...@gmail.com>
@@ -58,22 +59,22 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ***********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_DWT_H
#define __ARCH_ARM_SRC_ARMV8_M_DWT_H
-/***********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ***********************************************************************************************/
+ ****************************************************************************/
-/* Data Watchpoint and Trace Register (DWT) Definitions ****************************************/
+/* Data Watchpoint and Trace Register (DWT) Definitions *********************/
-/* DWT Register Base Address *******************************************************************/
+/* DWT Register Base Address ************************************************/
#define DWT_BASE (0xe0001000ul)
-/* DWT Register Addresses **********************************************************************/
+/* DWT Register Addresses ***************************************************/
#define DWT_CTRL (DWT_BASE + 0x0000) /* Control Register */
#define DWT_CYCCNT (DWT_BASE + 0x0004) /* Cycle Count Register */
@@ -96,7 +97,7 @@
#define DWT_MASK3 (DWT_BASE + 0x0054) /* Mask Register 3 */
#define DWT_FUNCTION3 (DWT_BASE + 0x0058) /* Function Register 3 */
-/* DWT Register Bit Field Definitions **********************************************************/
+/* DWT Register Bit Field Definitions ***************************************/
/* DWT CTRL */
diff --git a/arch/arm/src/armv8-m/etm.h b/arch/arm/src/armv8-m/etm.h
index 4882c51..9afc559 100644
--- a/arch/arm/src/armv8-m/etm.h
+++ b/arch/arm/src/armv8-m/etm.h
@@ -1,4 +1,4 @@
-/*******************************************************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/etm.h
*
* Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
@@ -56,24 +56,24 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- *******************************************************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_ETM_H
#define __ARCH_ARM_SRC_ARMV8_M_ETM_H
-/*******************************************************************************************************************************
+/****************************************************************************
* Included Files
- *******************************************************************************************************************************/
+ ****************************************************************************/
-/*******************************************************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- *******************************************************************************************************************************/
+ ****************************************************************************/
-/* ETM Register Base Address ***************************************************************************************************/
+/* ETM Register Base Address ************************************************/
#define ETM_BASE (0xe0041000ul)
-/* ETM Register Offsets ********************************************************************************************************/
+/* ETM Register Offsets *****************************************************/
#define ETM_ETMCR_OFFSET 0x0000 /* Main Control Register */
#define ETM_ETMCCR_OFFSET 0x0004 /* Configuration Code Register */
@@ -116,7 +116,7 @@
#define ETM_ETMCIDR2_OFFSET 0x0ff8 /* Component ID2 Register */
#define ETM_ETMCIDR3_OFFSET 0x0ffc /* Component ID3 Register */
-/* ETM Register Addresses ******************************************************************************************************/
+/* ETM Register Addresses ***************************************************/
#define ETM_ETMCR (ETM_BASE+ETM_ETMCR_OFFSET)
#define ETM_ETMCCR (ETM_BASE+ETM_ETMCCR_OFFSET)
@@ -159,7 +159,7 @@
#define ETM_ETMCIDR2 (ETM_BASE+ETM_ETMCIDR2_OFFSET)
#define ETM_ETMCIDR3 (ETM_BASE+ETM_ETMCIDR3_OFFSET)
-/* ETM Register Bit Field Definitions ******************************************************************************************/
+/* ETM Register Bit Field Definitions ***************************************/
/* Bit fields for ETM ETMCR */
diff --git a/arch/arm/src/armv8-m/exc_return.h b/arch/arm/src/armv8-m/exc_return.h
index a0c3a2c..3cfac7f 100644
--- a/arch/arm/src/armv8-m/exc_return.h
+++ b/arch/arm/src/armv8-m/exc_return.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/exc_return.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,69 +16,70 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_EXC_RETURN_H
#define __ARCH_ARM_SRC_ARMV8_M_EXC_RETURN_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* The processor saves an EXC_RETURN value to the LR on exception entry. The
* exception mechanism relies on this value to detect when the processor has
* completed an exception handler.
*
- * Bits [31:28] of an EXC_RETURN value are always 1. When the processor loads a
- * value matching this pattern to the PC it detects that the operation is a not
- * a normal branch operation and instead, that the exception is complete.
- * Therefore, it starts the exception return sequence.
+ * Bits [31:28] of an EXC_RETURN value are always 1. When the processor
+ * loads a value matching this pattern to the PC it detects that the
+ * operation is a not a normal branch operation and instead, that the
+ * exception is complete. Therefore, it starts the exception return sequence.
*
- * Bits[6:0] of the EXC_RETURN value indicate the required return stack and eventual
- * processor mode. The remaining bits of the EXC_RETURN value should be set to 1.
+ * Bits[6:0] of the EXC_RETURN value indicate the required return stack and
+ * eventual processor mode.
+ * The remaining bits of the EXC_RETURN value should be set to 1.
*/
/* EXC_RETURN_BASE: Bits that are always set in an EXC_RETURN value. */
#define EXC_RETURN_BASE 0xffffff80
-/* EXC_RETURN_EXC_SECURE: Exception Secure. The security domain the exception
- * was taken to. If this bit is clear non-secure, else secure.
+/* EXC_RETURN_EXC_SECURE: Exception Secure. The security domain the
+ * exception was taken to. If this bit is clear non-secure, else secure.
*/
#define EXC_RETURN_EXC_SECURE (1 << 0)
-/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the hardware
- * context using the process stack pointer (if not set, the context was saved
- * using the main stack pointer)
+/* EXC_RETURN_PROCESS_STACK: The exception saved (and will restore) the
+ * hardware context using the process stack pointer (if not set, the context
+ * was saved using the main stack pointer)
*/
#define EXC_RETURN_PROCESS_STACK (1 << 2)
-/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not set,
- * return stays in handler mode)
+/* EXC_RETURN_THREAD_MODE: The exception will return to thread mode (if not
+ * set, return stays in handler mode)
*/
#define EXC_RETURN_THREAD_MODE (1 << 3)
/* EXC_RETURN_STD_CONTEXT: The state saved on the stack does not include the
- * volatile FP registers and FPSCR. If this bit is clear, the state does include
- * these registers.
+ * volatile FP registers and FPSCR. If this bit is clear, the state does
+ * include these registers.
*/
#define EXC_RETURN_STD_CONTEXT (1 << 4)
-/* EXC_RETURN_DEF_STACKING: Default callee register stacking (DCRS). Indicates
- * whether the default stacking rules apply, or whether the callee registers are
- * already on the stack. The possible values of this bit are: 0 - Stacking of
- * the callee saved registers skipped. 1 - Default rules for stacking the
- * callee registers followed.
+/* EXC_RETURN_DEF_STACKING: Default callee register stacking (DCRS).
+ * Indicates whether the default stacking rules apply, or whether the callee
+ * registers are already on the stack. The possible values of this bit are:
+ * 0 - Stacking of the callee saved registers skipped. 1 - Default rules for
+ * stacking the callee registers followed.
*/
#define EXC_RETURN_DEF_STACKING (1 << 5)
@@ -91,15 +92,15 @@
#define EXC_RETURN_SECURE_STACK (1 << 6)
-/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state from
- * the main stack. Execution uses MSP after return.
+/* EXC_RETURN_HANDLER: Return to handler mode. Exception return gets state
+ * from the main stack. Execution uses MSP after return.
*/
#define EXC_RETURN_HANDLER (EXC_RETURN_BASE | EXC_RETURN_DEF_STACKING | \
EXC_RETURN_STD_CONTEXT)
-/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return gets
- * state from the main stack. Execution uses MSP after return.
+/* EXC_RETURN_PRIVTHR: Return to privileged thread mode. Exception return
+ * gets state from the main stack. Execution uses MSP after return.
*/
#if !defined(CONFIG_ARMV8M_LAZYFPU) && defined(CONFIG_ARCH_FPU)
@@ -110,8 +111,8 @@
EXC_RETURN_THREAD_MODE | EXC_RETURN_DEF_STACKING)
#endif
-/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets
- * state from the process stack. Execution uses PSP after return.
+/* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return
+ * gets state from the process stack. Execution uses PSP after return.
*/
#if !defined(CONFIG_ARMV8M_LAZYFPU) && defined(CONFIG_ARCH_FPU)
@@ -123,8 +124,8 @@
EXC_RETURN_DEF_STACKING)
#endif
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV8_M_EXC_RETURN_H */
diff --git a/arch/arm/src/armv8-m/itm.h b/arch/arm/src/armv8-m/itm.h
index e0d6bdb..0a3f35e 100644
--- a/arch/arm/src/armv8-m/itm.h
+++ b/arch/arm/src/armv8-m/itm.h
@@ -1,11 +1,12 @@
-/***********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/itm.h
*
* Copyright (c) 2009 - 2013 ARM LIMITED
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * modification, are permitted provided that the following conditions
+ * are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
@@ -16,17 +17,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
+ * AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville <pn...@gmail.com>
@@ -58,28 +59,28 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ***********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_ITM_H
#define __ARCH_ARM_SRC_ARMV8_M_ITM_H
-/***********************************************************************************************
+/****************************************************************************
* Included Files
- ***********************************************************************************************/
+ ****************************************************************************/
#include <stdint.h>
-/***********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ***********************************************************************************************/
+ ****************************************************************************/
-/* Instrumentation Trace Macrocell Register (ITM) Definitions **********************************/
+/* Instrumentation Trace Macrocell Register (ITM) Definitions ***************/
-/* ITM Register Base Address *******************************************************************/
+/* ITM Register Base Address ************************************************/
#define ITM_BASE (0xe0000000ul)
-/* ITM Register Addresses **********************************************************************/
+/* ITM Register Addresses ***************************************************/
#define ITM_PORT(i) (ITM_BASE + (i * 4)) /* Stimulus Port 32-bit */
#define ITM_TER (ITM_BASE + 0x0e00) /* Trace Enable Register */
@@ -103,7 +104,7 @@
#define ITM_CID2 (ITM_BASE + 0x0ff8) /* Component Identification Register #2 */
#define ITM_CID3 (ITM_BASE + 0x0ffc) /* Component Identification Register #3 */
-/* ITM Register Bit Field Definitions **********************************************************/
+/* ITM Register Bit Field Definitions ***************************************/
/* ITM TPR */
@@ -159,9 +160,9 @@
#define ITM_RXBUFFER_EMPTY 0x5aa55aa5
-/***********************************************************************************************
+/****************************************************************************
* Public Data
- ***********************************************************************************************/
+ ****************************************************************************/
#ifdef __cplusplus
extern "C"
@@ -170,9 +171,9 @@ extern "C"
extern volatile int32_t g_itm_rxbuffer; /* External variable to receive characters. */
-/***********************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ***********************************************************************************************/
+ ****************************************************************************/
uint32_t itm_sendchar(uint32_t ch);
int32_t itm_receivechar(void);
diff --git a/arch/arm/src/armv8-m/mpu.h b/arch/arm/src/armv8-m/mpu.h
index f17b62e..e5bda5f 100644
--- a/arch/arm/src/armv8-m/mpu.h
+++ b/arch/arm/src/armv8-m/mpu.h
@@ -1,4 +1,4 @@
-/*********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/mpu.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- *********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8M_MPU_H
#define __ARCH_ARM_SRC_ARMV8M_MPU_H
-/*********************************************************************************************
+/****************************************************************************
* Included Files
- *********************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -37,9 +37,9 @@
# include "arm_arch.h"
#endif
-/*********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- *********************************************************************************************/
+ ****************************************************************************/
/* MPU Register Addresses */
@@ -134,9 +134,9 @@
#ifdef CONFIG_ARM_MPU
-/*********************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- *********************************************************************************************/
+ ****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
@@ -148,17 +148,17 @@ extern "C"
#define EXTERN extern
#endif
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_allocregion
*
* Description:
* Allocate the next region
*
- *********************************************************************************************/
+ ****************************************************************************/
unsigned int mpu_allocregion(void);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_log2regionceil
*
* Description:
@@ -167,11 +167,11 @@ unsigned int mpu_allocregion(void);
*
* size <= (1 << l2size)
*
- *********************************************************************************************/
+ ****************************************************************************/
uint8_t mpu_log2regionceil(size_t size);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_log2regionfloor
*
* Description:
@@ -180,11 +180,11 @@ uint8_t mpu_log2regionceil(size_t size);
*
* size >= (1 << l2size)
*
- *********************************************************************************************/
+ ****************************************************************************/
uint8_t mpu_log2regionfloor(size_t size);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_subregion
*
* Description:
@@ -196,42 +196,42 @@ uint8_t mpu_log2regionfloor(size_t size);
* l2size has the same properties as the return value from
* mpu_log2regionceil()
*
- *********************************************************************************************/
+ ****************************************************************************/
uint32_t mpu_subregion(uintptr_t base, size_t size, uint8_t l2size);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_control
*
* Description:
* Configure and enable (or disable) the MPU
*
- *********************************************************************************************/
+ ****************************************************************************/
void mpu_control(bool enable, bool hfnmiena, bool privdefena);
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_configure_region
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
- *********************************************************************************************/
+ ****************************************************************************/
void mpu_configure_region(uintptr_t base, size_t size,
uint32_t flags);
-/*********************************************************************************************
+/****************************************************************************
* Inline Functions
- *********************************************************************************************/
+ ****************************************************************************/
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_showtype
*
* Description:
* Show the characteristics of the MPU
*
- *********************************************************************************************/
+ ****************************************************************************/
#ifdef CONFIG_DEBUG_SCHED_INFO
# define mpu_showtype() \
@@ -247,13 +247,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
# define mpu_showtype() do { } while (0)
#endif
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_priv_stronglyordered
*
* Description:
* Configure a region for privileged, strongly ordered memory
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_priv_stronglyordered(base, size) \
do \
@@ -268,13 +268,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_user_flash
*
* Description:
* Configure a region for user program flash
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_user_flash(base, size) \
do \
@@ -289,13 +289,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_priv_flash
*
* Description:
* Configure a region for privileged program flash
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_priv_flash(base, size) \
do \
@@ -310,13 +310,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_user_intsram
*
* Description:
* Configure a region as user internal SRAM
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_user_intsram(base, size) \
do \
@@ -331,13 +331,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_priv_intsram
*
* Description:
* Configure a region as privileged internal SRAM
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_priv_intsram(base, size) \
do \
@@ -352,13 +352,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_user_extsram
*
* Description:
* Configure a region as user external SRAM
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_user_extsram(base, size) \
do \
@@ -373,13 +373,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_priv_extsram
*
* Description:
* Configure a region as privileged external SRAM
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_priv_extsram(base, size) \
do \
@@ -394,13 +394,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_peripheral
*
* Description:
* Configure a region as privileged peripheral address space
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_peripheral(base, size) \
do \
@@ -415,13 +415,13 @@ void mpu_configure_region(uintptr_t base, size_t size,
MPU_RASR_XN /* No Instruction access */); \
} while (0)
-/*********************************************************************************************
+/****************************************************************************
* Name: mpu_user_peripheral
*
* Description:
* Configure a region as user peripheral address space
*
- *********************************************************************************************/
+ ****************************************************************************/
#define mpu_user_peripheral(base, size) \
do \
diff --git a/arch/arm/src/armv8-m/nvic.h b/arch/arm/src/armv8-m/nvic.h
index b4b71ce..98e5957 100644
--- a/arch/arm/src/armv8-m/nvic.h
+++ b/arch/arm/src/armv8-m/nvic.h
@@ -1,4 +1,4 @@
-/********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/nvic.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,24 +16,26 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H
-/********************************************************************************************
+/****************************************************************************
* Included Files
- ********************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
-/********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ********************************************************************************************/
+ ****************************************************************************/
-/* Exception/interrupt vector numbers *******************************************************/
+/* Exception/interrupt vector numbers ***************************************/
- /* Vector 0: Reset stack pointer value */
+ /* Vector 0:
+ * Reset stack pointer value
+ */
/* Vector 1: Reset */
#define NVIC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
@@ -48,15 +50,17 @@
#define NVIC_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
#define NVIC_IRQ_SYSTICK (15) /* Vector 15: System tick */
-/* External interrupts (vectors >= 16). These definitions are chip-specific */
+/* External interrupts (vectors >= 16).
+ * These definitions are chip-specific
+ */
#define NVIC_IRQ_FIRST (16) /* Vector number of the first interrupt */
-/* NVIC base address ************************************************************************/
+/* NVIC base address ********************************************************/
#define ARMV8M_NVIC_BASE 0xe000e000
-/* NVIC register offsets ********************************************************************/
+/* NVIC register offsets ****************************************************/
#define NVIC_ICTR_OFFSET 0x0004 /* Interrupt controller type register */
#define NVIC_SYSTICK_CTRL_OFFSET 0x0010 /* SysTick control and status register */
@@ -253,7 +257,7 @@
#define NVIC_CID2_OFFSET 0x0ff8 /* Component identification register bits 23:16 (CID0) */
#define NVIC_CID3_OFFSET 0x0ffc /* Component identification register bits 23:16 (CID0) */
-/* NVIC register addresses ******************************************************************/
+/* NVIC register addresses **************************************************/
#define NVIC_ICTR (ARMV8M_NVIC_BASE + NVIC_ICTR_OFFSET)
#define NVIC_SYSTICK_CTRL (ARMV8M_NVIC_BASE + NVIC_SYSTICK_CTRL_OFFSET)
@@ -442,7 +446,7 @@
#define NVIC_CID2 (ARMV8M_NVIC_BASE + NVIC_CID2_OFFSET)
#define NVIC_CID3 (ARMV8M_NVIC_BASE + NVIC_CID3_OFFSET)
-/* NVIC register bit definitions ************************************************************/
+/* NVIC register bit definitions ********************************************/
/* Interrupt controller type (INCTCTL_TYPE) */
@@ -682,16 +686,16 @@
#define NVIC_CACR_ECCDIS (1 << 1) /* Bit 1: Enables ECC in the instruction and data cache */
#define NVIC_CACR_FORCEWT (1 << 2) /* Bit 2: Enables Force Write-Through in the data cache */
-/********************************************************************************************
+/****************************************************************************
* Public Types
- ********************************************************************************************/
+ ****************************************************************************/
-/********************************************************************************************
+/****************************************************************************
* Public Data
- ********************************************************************************************/
+ ****************************************************************************/
-/********************************************************************************************
+/****************************************************************************
* Public Function Prototypes
- ********************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_NVIC_H */
diff --git a/arch/arm/src/armv8-m/psr.h b/arch/arm/src/armv8-m/psr.h
index bdefe9f..260011e 100644
--- a/arch/arm/src/armv8-m/psr.h
+++ b/arch/arm/src/armv8-m/psr.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/psr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H
#define __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
/* Application Program Status Register (APSR) */
@@ -65,8 +65,8 @@
#define ARMV8M_XPSR_Z ARMV8M_APSR_Z
#define ARMV8M_XPSR_N ARMV8M_APSR_N
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_COMMON_ARMV8_M_PSR_H */
diff --git a/arch/arm/src/armv8-m/svcall.h b/arch/arm/src/armv8-m/svcall.h
index 327412b..fe28edb 100644
--- a/arch/arm/src/armv8-m/svcall.h
+++ b/arch/arm/src/armv8-m/svcall.h
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/svcall.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_SVCALL_H
#define __ARCH_ARM_SRC_ARMV8_M_SVCALL_H
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
@@ -31,15 +31,16 @@
# include <syscall.h>
#endif
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/* Configuration ********************************************************************/
+/* Configuration ************************************************************/
-/* This logic uses three system calls {0,1,2} for context switching and one for the
- * syscall return. So a minimum of four syscall values must be reserved. If
- * CONFIG_BUILD_PROTECTED is defined, then four more syscall values must be reserved.
+/* This logic uses three system calls {0,1,2} for context switching and one
+ * for the syscall return. So a minimum of four syscall values must be
+ *reserved. If CONFIG_BUILD_PROTECTED is defined, then four more syscall
+ * values must be reserved.
*/
#ifdef CONFIG_LIB_SYSCALL
@@ -58,7 +59,7 @@
# endif
#endif
-/* Cortex-M system calls ************************************************************/
+/* Cortex-M system calls ****************************************************/
/* SYS call 0:
*
@@ -108,7 +109,8 @@
/* SYS call 6:
*
- * void signal_handler(_sa_sigaction_t sighand, int signo, FAR siginfo_t *info,
+ * void signal_handler(_sa_sigaction_t sighand,
+ * int signo, FAR siginfo_t *info,
* FAR void *ucontext);
*/
@@ -124,8 +126,8 @@
#endif /* CONFIG_BUILD_PROTECTED */
#endif /* CONFIG_LIB_SYSCALL */
-/************************************************************************************
+/****************************************************************************
* Inline Functions
- ************************************************************************************/
+ ****************************************************************************/
#endif /* __ARCH_ARM_SRC_ARMV8_M_SVCALL_H */
diff --git a/arch/arm/src/armv8-m/tpi.h b/arch/arm/src/armv8-m/tpi.h
index 816c583..b2eeecd 100644
--- a/arch/arm/src/armv8-m/tpi.h
+++ b/arch/arm/src/armv8-m/tpi.h
@@ -1,11 +1,12 @@
-/***********************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/tpi.h
*
* Copyright (c) 2009 - 2013 ARM LIMITED
*
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * modification, are permitted provided that the following conditions
+ * are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
@@ -16,17 +17,17 @@
* to endorse or promote products derived from this software without
* specific prior written permission.
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
- * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
+ * AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Author: Pierre-noel Bouteville <pn...@gmail.com>
@@ -58,22 +59,22 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
- ***********************************************************************************************/
+ ****************************************************************************/
#ifndef __ARCH_ARM_SRC_ARMV8_M_TPI_H
#define __ARCH_ARM_SRC_ARMV8_M_TPI_H
-/***********************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ***********************************************************************************************/
+ ****************************************************************************/
-/* Trace Port Interface Register (TPI) Definitions *********************************************/
+/* Trace Port Interface Register (TPI) Definitions **************************/
-/* TPI Register Base Address *******************************************************************/
+/* TPI Register Base Address ************************************************/
#define TPI_BASE (0xe0040000ul)
-/* TPI Register Addresses **********************************************************************/
+/* TPI Register Addresses ***************************************************/
#define TPI_SSPSR (TPI_BASE + 0x0000) /* Supported Parallel Port Size Register */
#define TPI_CSPSR (TPI_BASE + 0x0004) /* Current Parallel Port Size Register */
@@ -93,7 +94,7 @@
#define TPI_DEVID (TPI_BASE + 0x0fc8) /* TPIU_DEVID */
#define TPI_DEVTYPE (TPI_BASE + 0x0fcc) /* TPIU_DEVTYPE */
-/* TPI Register Bit Field Definitions **********************************************************/
+/* TPI Register Bit Field Definitions ***************************************/
/* TPI ACPR */
diff --git a/arch/arm/src/armv8-m/vfork.S b/arch/arm/src/armv8-m/vfork.S
index 3276cf8..9d8e201 100644
--- a/arch/arm/src/armv8-m/vfork.S
+++ b/arch/arm/src/armv8-m/vfork.S
@@ -1,4 +1,4 @@
-/************************************************************************************
+/****************************************************************************
* arch/arm/src/armv8-m/gnu/vfork.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,34 +16,34 @@
* License for the specific language governing permissions and limitations
* under the License.
*
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Included Files
- ************************************************************************************/
+ ****************************************************************************/
#include <nuttx/config.h>
#include "arm_vfork.h"
-/************************************************************************************
+/****************************************************************************
* Pre-processor Definitions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Public Symbols
- ************************************************************************************/
+ ****************************************************************************/
.syntax unified
.thumb
.file "vfork.S"
.globl up_vfork
-/************************************************************************************
+/****************************************************************************
* Public Functions
- ************************************************************************************/
+ ****************************************************************************/
-/************************************************************************************
+/****************************************************************************
* Name: vfork
*
* Description:
@@ -82,7 +82,7 @@
* returned to the parent, no child process is created, and errno is set to
* indicate the error.
*
- ************************************************************************************/
+ ****************************************************************************/
.thumb_func
.globl vfork
[incubator-nuttx] 07/09: arch: arm: armv7-r: Author Gregory Nutt:
update licenses to Apache
Posted by xi...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 2a9e424f9a6aaca7e68384087d7be878eb9a1cb5
Author: Alin Jerpelea <al...@sony.com>
AuthorDate: Wed Mar 24 09:13:54 2021 +0100
arch: arm: armv7-r: Author Gregory Nutt: update licenses to Apache
Gregory Nutt has submitted the SGA and we can migrate the licenses
to Apache.
Signed-off-by: Alin Jerpelea <al...@sony.com>
---
arch/arm/src/armv7-r/arm.h | 51 ++++++++++-----------------
arch/arm/src/armv7-r/arm_blocktask.c | 39 +++++++-------------
arch/arm/src/armv7-r/arm_cache.c | 43 ++++++++--------------
arch/arm/src/armv7-r/arm_dataabort.c | 39 +++++++-------------
arch/arm/src/armv7-r/arm_doirq.c | 39 +++++++-------------
arch/arm/src/armv7-r/arm_fetchadd.S | 43 ++++++++--------------
arch/arm/src/armv7-r/arm_fpuconfig.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_fullcontextrestore.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_gicv2.c | 43 ++++++++--------------
arch/arm/src/armv7-r/arm_head.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_initialstate.c | 39 +++++++-------------
arch/arm/src/armv7-r/arm_l2cc_pl310.c | 50 ++++++++++----------------
arch/arm/src/armv7-r/arm_mpu.c | 39 +++++++-------------
arch/arm/src/armv7-r/arm_prefetchabort.c | 39 +++++++-------------
arch/arm/src/armv7-r/arm_restorefpu.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_savefpu.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_saveusercontext.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_signal_dispatch.c | 39 +++++++-------------
arch/arm/src/armv7-r/arm_signal_handler.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_testset.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_undefinedinsn.c | 39 +++++++-------------
arch/arm/src/armv7-r/arm_vectoraddrexcptn.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_vectors.S | 39 +++++++-------------
arch/arm/src/armv7-r/arm_vectortab.S | 39 +++++++-------------
arch/arm/src/armv7-r/barriers.h | 39 +++++++-------------
arch/arm/src/armv7-r/fpu.h | 40 +++++++--------------
arch/arm/src/armv7-r/gic.h | 51 ++++++++++-----------------
arch/arm/src/armv7-r/l2cc.h | 43 ++++++++--------------
arch/arm/src/armv7-r/l2cc_pl310.h | 49 +++++++++----------------
arch/arm/src/armv7-r/mpcore.h | 49 +++++++++----------------
arch/arm/src/armv7-r/mpu.h | 43 ++++++++--------------
arch/arm/src/armv7-r/sctlr.h | 51 ++++++++++-----------------
32 files changed, 427 insertions(+), 909 deletions(-)
diff --git a/arch/arm/src/armv7-r/arm.h b/arch/arm/src/armv7-r/arm.h
index 4168da4..f609506 100644
--- a/arch/arm/src/armv7-r/arm.h
+++ b/arch/arm/src/armv7-r/arm.h
@@ -1,44 +1,29 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm.h
- * Non-CP15 Registers
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * References:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.c (ID051414)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
+/* References:
+ *
+ * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright
+ * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.c (ID051414)
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_R_CPSR_H
#define __ARCH_ARM_SRC_ARMV7_R_CPSR_H
diff --git a/arch/arm/src/armv7-r/arm_blocktask.c b/arch/arm/src/armv7-r/arm_blocktask.c
index d6a2e8d..71c8da6 100644
--- a/arch/arm/src/armv7-r/arm_blocktask.c
+++ b/arch/arm/src/armv7-r/arm_blocktask.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_blocktask.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_cache.c b/arch/arm/src/armv7-r/arm_cache.c
index c6c9dc6..b2a07e6 100644
--- a/arch/arm/src/armv7-r/arm_cache.c
+++ b/arch/arm/src/armv7-r/arm_cache.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_cache.c
*
- * Copyright (C) 2015, 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_dataabort.c b/arch/arm/src/armv7-r/arm_dataabort.c
index e08f6c8..cb9a801 100644
--- a/arch/arm/src/armv7-r/arm_dataabort.c
+++ b/arch/arm/src/armv7-r/arm_dataabort.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_dataabort.c
*
- * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_doirq.c b/arch/arm/src/armv7-r/arm_doirq.c
index 4ba440b..659b748 100644
--- a/arch/arm/src/armv7-r/arm_doirq.c
+++ b/arch/arm/src/armv7-r/arm_doirq.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_doirq.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_fetchadd.S b/arch/arm/src/armv7-r/arm_fetchadd.S
index 5e25e82..8975f47 100644
--- a/arch/arm/src/armv7-r/arm_fetchadd.S
+++ b/arch/arm/src/armv7-r/arm_fetchadd.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_fetchadd.S
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_fpuconfig.S b/arch/arm/src/armv7-r/arm_fpuconfig.S
index a7837fd..86e3f80 100644
--- a/arch/arm/src/armv7-r/arm_fpuconfig.S
+++ b/arch/arm/src/armv7-r/arm_fpuconfig.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_fpuconfig.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_fullcontextrestore.S b/arch/arm/src/armv7-r/arm_fullcontextrestore.S
index 008270b..ee8e3ac 100644
--- a/arch/arm/src/armv7-r/arm_fullcontextrestore.S
+++ b/arch/arm/src/armv7-r/arm_fullcontextrestore.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_fullcontextrestore.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_gicv2.c b/arch/arm/src/armv7-r/arm_gicv2.c
index 39f7c89..a2ff4d9 100644
--- a/arch/arm/src/armv7-r/arm_gicv2.c
+++ b/arch/arm/src/armv7-r/arm_gicv2.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_gicv2.c
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_head.S b/arch/arm/src/armv7-r/arm_head.S
index 3bfd4b5..f42c77d 100644
--- a/arch/arm/src/armv7-r/arm_head.S
+++ b/arch/arm/src/armv7-r/arm_head.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_head.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_initialstate.c b/arch/arm/src/armv7-r/arm_initialstate.c
index 2bce8ba..79be124 100644
--- a/arch/arm/src/armv7-r/arm_initialstate.c
+++ b/arch/arm/src/armv7-r/arm_initialstate.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_initialstate.c
*
- * Copyright (C) 2015, 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_l2cc_pl310.c b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
index 3afedf3..358a70d 100644
--- a/arch/arm/src/armv7-r/arm_l2cc_pl310.c
+++ b/arch/arm/src/armv7-r/arm_l2cc_pl310.c
@@ -1,43 +1,29 @@
/************************************************************************************
* arch/arm/src/armv7-r/arm_l2cc_pl310.c
*
- * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
- * Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
- *
- * NOTE: This logic is incompatible with older versions of the PL310!
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
+/* Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
+ * Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
+ *
+ * NOTE: This logic is incompatible with older versions of the PL310!
+ */
+
/****************************************************************************
* Included Files
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_mpu.c b/arch/arm/src/armv7-r/arm_mpu.c
index 29a70dd..d17bede 100644
--- a/arch/arm/src/armv7-r/arm_mpu.c
+++ b/arch/arm/src/armv7-r/arm_mpu.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_mpu.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_prefetchabort.c b/arch/arm/src/armv7-r/arm_prefetchabort.c
index fee2988..05b263a 100644
--- a/arch/arm/src/armv7-r/arm_prefetchabort.c
+++ b/arch/arm/src/armv7-r/arm_prefetchabort.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_prefetchabort.c
*
- * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_restorefpu.S b/arch/arm/src/armv7-r/arm_restorefpu.S
index 04a25c4..a4a0ef2 100644
--- a/arch/arm/src/armv7-r/arm_restorefpu.S
+++ b/arch/arm/src/armv7-r/arm_restorefpu.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv7-r/arm_restorefpu.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_savefpu.S b/arch/arm/src/armv7-r/arm_savefpu.S
index 368f312..dc3b102 100644
--- a/arch/arm/src/armv7-r/arm_savefpu.S
+++ b/arch/arm/src/armv7-r/arm_savefpu.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv7-r/arm_savefpu.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_saveusercontext.S b/arch/arm/src/armv7-r/arm_saveusercontext.S
index b837059..24fd787 100644
--- a/arch/arm/src/armv7-r/arm_saveusercontext.S
+++ b/arch/arm/src/armv7-r/arm_saveusercontext.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_saveusercontext.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_signal_dispatch.c b/arch/arm/src/armv7-r/arm_signal_dispatch.c
index f6a0d37..0739b07 100644
--- a/arch/arm/src/armv7-r/arm_signal_dispatch.c
+++ b/arch/arm/src/armv7-r/arm_signal_dispatch.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_signal_dispatch.c
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_signal_handler.S b/arch/arm/src/armv7-r/arm_signal_handler.S
index fb71524..d107828 100644
--- a/arch/arm/src/armv7-r/arm_signal_handler.S
+++ b/arch/arm/src/armv7-r/arm_signal_handler.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_signal_handler.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_testset.S b/arch/arm/src/armv7-r/arm_testset.S
index 703f466..cb99e68 100644
--- a/arch/arm/src/armv7-r/arm_testset.S
+++ b/arch/arm/src/armv7-r/arm_testset.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_testset.S
*
- * Copyright (C) 2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_undefinedinsn.c b/arch/arm/src/armv7-r/arm_undefinedinsn.c
index 41ac2ac..a1dc92d 100644
--- a/arch/arm/src/armv7-r/arm_undefinedinsn.c
+++ b/arch/arm/src/armv7-r/arm_undefinedinsn.c
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_undefinedinsn.c
*
- * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_vectoraddrexcptn.S b/arch/arm/src/armv7-r/arm_vectoraddrexcptn.S
index 96c08cf..2bab792 100644
--- a/arch/arm/src/armv7-r/arm_vectoraddrexcptn.S
+++ b/arch/arm/src/armv7-r/arm_vectoraddrexcptn.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_vectoraddrexceptn.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_vectors.S b/arch/arm/src/armv7-r/arm_vectors.S
index f3064ad..fbc7891 100644
--- a/arch/arm/src/armv7-r/arm_vectors.S
+++ b/arch/arm/src/armv7-r/arm_vectors.S
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv7-r/arm_vectors.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv7-r/arm_vectortab.S b/arch/arm/src/armv7-r/arm_vectortab.S
index 6c8f994..b81c520 100644
--- a/arch/arm/src/armv7-r/arm_vectortab.S
+++ b/arch/arm/src/armv7-r/arm_vectortab.S
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/arm7-r/arm_vectortab.S
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/barriers.h b/arch/arm/src/armv7-r/barriers.h
index d2a5b67..d1ff204 100644
--- a/arch/arm/src/armv7-r/barriers.h
+++ b/arch/arm/src/armv7-r/barriers.h
@@ -1,35 +1,20 @@
/************************************************************************************
* arch/arm/src/armv7-r/barriers.h
*
- * Copyright (C) 2019 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
diff --git a/arch/arm/src/armv7-r/fpu.h b/arch/arm/src/armv7-r/fpu.h
index f7e4408..a89380a 100644
--- a/arch/arm/src/armv7-r/fpu.h
+++ b/arch/arm/src/armv7-r/fpu.h
@@ -1,36 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/fpu.h
- * Non-CP15 Registers
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/gic.h b/arch/arm/src/armv7-r/gic.h
index f4c8868..6b9ddef 100644
--- a/arch/arm/src/armv7-r/gic.h
+++ b/arch/arm/src/armv7-r/gic.h
@@ -1,45 +1,30 @@
/****************************************************************************
* arch/arm/src/armv7-r/gic.h
- * Generic Interrupt Controller Version 2 Definitions
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Reference:
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* Reference:
* Cortex??A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
* 0407I (ID091612).
*
* Includes some removed registers from the r2p2 version as well. ARM DDI
* 0407F (ID050110)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- *
- ****************************************************************************/
+ */
#ifndef __ARCH_ARM_SRC_ARMV7_R_GIC_H
#define __ARCH_ARM_SRC_ARMV7_R_GIC_H
diff --git a/arch/arm/src/armv7-r/l2cc.h b/arch/arm/src/armv7-r/l2cc.h
index f841b96..722ec6f 100644
--- a/arch/arm/src/armv7-r/l2cc.h
+++ b/arch/arm/src/armv7-r/l2cc.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/l2cc.h
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/l2cc_pl310.h b/arch/arm/src/armv7-r/l2cc_pl310.h
index 80e4515..5fc6d9c 100644
--- a/arch/arm/src/armv7-r/l2cc_pl310.h
+++ b/arch/arm/src/armv7-r/l2cc_pl310.h
@@ -1,44 +1,27 @@
/************************************************************************************
* arch/arm/src/armv7-r/l2cc_pl310.h
*
- * Register definitions for the L2 Cache Controller (L2CC) is based on the
- * L2CC-PL310 ARM multi-way cache macrocell, version r3p2.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
- * Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
+/* Reference: "CoreLink� Level 2 Cache Controller L2C-310", Revision r3p2,
+ * Technical Reference Manual, ARM DDI 0246F (ID011711), ARM
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_R_L2CC_PL310_H
#define __ARCH_ARM_SRC_ARMV7_R_L2CC_PL310_H
diff --git a/arch/arm/src/armv7-r/mpcore.h b/arch/arm/src/armv7-r/mpcore.h
index 2196774..18e02d4 100644
--- a/arch/arm/src/armv7-r/mpcore.h
+++ b/arch/arm/src/armv7-r/mpcore.h
@@ -1,43 +1,28 @@
/****************************************************************************
* arch/arm/src/armv7-r/mpcore.h
- * Generic Interrupt Controller Definitions
*
- * Copyright (C) 2018 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * Reference:
- * Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
- * 0407I (ID091612).
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
+/* Reference:
+ * Cortex™-A9 MPCore, Revision: r4p1, Technical Reference Manual, ARM DDI
+ * 0407I (ID091612).
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_R_MPCORE_H
#define __ARCH_ARM_SRC_ARMV7_R_MPCORE_H
diff --git a/arch/arm/src/armv7-r/mpu.h b/arch/arm/src/armv7-r/mpu.h
index 243f1d9..00ca72b 100644
--- a/arch/arm/src/armv7-r/mpu.h
+++ b/arch/arm/src/armv7-r/mpu.h
@@ -1,35 +1,20 @@
/****************************************************************************
* arch/arm/src/armv7-r/mpu.h
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
****************************************************************************/
diff --git a/arch/arm/src/armv7-r/sctlr.h b/arch/arm/src/armv7-r/sctlr.h
index aa3b979..a458852 100644
--- a/arch/arm/src/armv7-r/sctlr.h
+++ b/arch/arm/src/armv7-r/sctlr.h
@@ -1,44 +1,29 @@
/************************************************************************************
* arch/arm/src/armv7-r/sctlr.h
- * CP15 System Control Registers
*
- * Copyright (C) 2015 Gregory Nutt. All rights reserved.
- * Author: Gregory Nutt <gn...@nuttx.org>
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements. See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership. The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at
*
- * References:
+ * http://www.apache.org/licenses/LICENSE-2.0
*
- * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright
- * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.c (ID051414)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * 3. Neither the name NuttX nor the names of its contributors may be
- * used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
*
************************************************************************************/
+/* References:
+ *
+ * "ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition", Copyright
+ * 1996-1998, 2000, 2004-2012 ARM. All rights reserved. ARM DDI 0406C.c (ID051414)
+ */
+
#ifndef __ARCH_ARM_SRC_ARMV7_R_SCTLR_H
#define __ARCH_ARM_SRC_ARMV7_R_SCTLR_H