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Posted to commits@mynewt.apache.org by je...@apache.org on 2020/04/14 08:01:02 UTC
[mynewt-core] branch master updated: stm32f4: Add I2SPLL
configuration
This is an automated email from the ASF dual-hosted git repository.
jerzy pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new 40fb2d6 stm32f4: Add I2SPLL configuration
40fb2d6 is described below
commit 40fb2d65dc5ce38f1d8da9e06aab8a58c1e54b43
Author: Jerzy Kasenberg <je...@codecoup.pl>
AuthorDate: Fri Apr 10 15:36:03 2020 +0200
stm32f4: Add I2SPLL configuration
I2SPLL clock configuration was missing so I2S peripheral
would not work without user code initialization.
Now I2SPLL configuration is added to syscfg, and PLL will be
configured when those values are set in BSP.
---
hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c | 21 +++++++++++++++++++++
hw/mcu/stm/stm32f4xx/syscfg.yml | 12 ++++++++++++
2 files changed, 33 insertions(+)
diff --git a/hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c b/hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c
index 7efc507..e3602cf 100644
--- a/hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c
+++ b/hw/mcu/stm/stm32f4xx/src/clock_stm32f4xx.c
@@ -42,6 +42,23 @@
#error "At least one of HSE or HSI clock source must be enabled"
#endif
+#if MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLM) && MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLN) && MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLR)
+static void
+config_i2s_pll(void)
+{
+ RCC_PeriphCLKInitTypeDef i2s_clock_init;
+
+ i2s_clock_init.PeriphClockSelection = RCC_PERIPHCLK_PLLI2S;
+ i2s_clock_init.PLLI2S.PLLI2SM = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLM);
+ i2s_clock_init.PLLI2S.PLLI2SN = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLN);
+ i2s_clock_init.PLLI2S.PLLI2SR = MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLR);
+ i2s_clock_init.TIMPresSelection = 0;
+ i2s_clock_init.RTCClockSelection = 0;
+
+ HAL_RCCEx_PeriphCLKConfig(&i2s_clock_init);
+}
+#endif
+
void
SystemClock_Config(void)
{
@@ -251,6 +268,10 @@ SystemClock_Config(void)
}
#endif
+#if MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLM) && MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLN) && MYNEWT_VAL(STM32_CLOCK_PLLI2S_PLLR)
+ config_i2s_pll();
+#endif
+
#if PREFETCH_ENABLE
#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || \
defined(STM32F417xx)
diff --git a/hw/mcu/stm/stm32f4xx/syscfg.yml b/hw/mcu/stm/stm32f4xx/syscfg.yml
index 48ab9a3..e6d1367 100644
--- a/hw/mcu/stm/stm32f4xx/syscfg.yml
+++ b/hw/mcu/stm/stm32f4xx/syscfg.yml
@@ -79,6 +79,18 @@ syscfg.defs:
description: PLL config R parameter
value: 0
+ STM32_CLOCK_PLLI2S_PLLM:
+ description: I2SPLL config M parameter
+ value: 0
+
+ STM32_CLOCK_PLLI2S_PLLN:
+ description: I2SPLL config N parameter
+ value: 0
+
+ STM32_CLOCK_PLLI2S_PLLR:
+ description: I2SPLL config R parameter
+ value: 0
+
STM32_CLOCK_ENABLE_OVERDRIVE:
description: Turn on over-drive mode (reach higher clock rates)
value: 0