You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by xi...@apache.org on 2026/01/15 03:37:20 UTC
(nuttx) 01/06: arch/tricore: Regs for context switching save the memory address of the CSA.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git
commit 8da6b45939d18bebd556f7d6d1dff7b67b2909ac
Author: liwenxiang1 <li...@xiaomi.com>
AuthorDate: Fri Nov 22 14:53:43 2024 +0800
arch/tricore: Regs for context switching save the memory address of the CSA.
In the exception panic process, regs needs to use a memory address, which defaults to PCXI. Here, it is uniformly saved as the actual memory address.
Signed-off-by: liwenxiang1 <li...@xiaomi.com>
---
arch/tricore/include/irq.h | 9 +++++----
arch/tricore/src/common/tricore_csa.c | 2 +-
arch/tricore/src/common/tricore_doirq.c | 4 ++--
arch/tricore/src/common/tricore_svcall.c | 4 ++--
4 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/tricore/include/irq.h b/arch/tricore/include/irq.h
index cedddc410be..ae3e09c5312 100644
--- a/arch/tricore/include/irq.h
+++ b/arch/tricore/include/irq.h
@@ -205,14 +205,15 @@ static inline_function bool up_interrupt_context(void)
static inline_function uintptr_t up_getusrsp(void *regs)
{
uintptr_t *csa = regs;
+ uintptr_t pcxi = tricore_addr2csa(csa);
- while (((uintptr_t)csa & PCXI_UL) == 0)
+ while ((pcxi & PCXI_UL) == 0)
{
- csa = tricore_csa2addr((uintptr_t)csa);
- csa = (uintptr_t *)csa[0];
+ csa = tricore_csa2addr(csa[REG_UPCXI]);
+ pcxi = csa[REG_UPCXI];
}
- csa = tricore_csa2addr((uintptr_t)csa);
+ csa = tricore_csa2addr(pcxi);
return csa[REG_SP];
}
diff --git a/arch/tricore/src/common/tricore_csa.c b/arch/tricore/src/common/tricore_csa.c
index 74dd8931ac8..d1c782ec2ed 100644
--- a/arch/tricore/src/common/tricore_csa.c
+++ b/arch/tricore/src/common/tricore_csa.c
@@ -82,7 +82,7 @@ uintptr_t *tricore_alloc_csa(uintptr_t pc, uintptr_t sp,
plcsa[REG_LPCXI] |= PCXI_PIE;
}
- return (uintptr_t *)tricore_addr2csa(plcsa);
+ return plcsa;
}
/****************************************************************************
diff --git a/arch/tricore/src/common/tricore_doirq.c b/arch/tricore/src/common/tricore_doirq.c
index f5d686c3532..614b697a4f0 100644
--- a/arch/tricore/src/common/tricore_doirq.c
+++ b/arch/tricore/src/common/tricore_doirq.c
@@ -56,7 +56,7 @@ IFX_INTERRUPT_INTERNAL(tricore_doirq, 0, 255)
uintptr_t *regs;
icr.U = __mfcr(CPU_ICR);
- regs = (uintptr_t *)__mfcr(CPU_PCXI);
+ regs = tricore_csa2addr(__mfcr(CPU_PCXI));
if (running_task != NULL)
{
@@ -112,7 +112,7 @@ IFX_INTERRUPT_INTERNAL(tricore_doirq, 0, 255)
running_task = tcb;
g_running_tasks[this_cpu()] = running_task;
- __mtcr(CPU_PCXI, (uintptr_t)up_current_regs());
+ __mtcr(CPU_PCXI, tricore_addr2csa(up_current_regs()));
__isync();
}
diff --git a/arch/tricore/src/common/tricore_svcall.c b/arch/tricore/src/common/tricore_svcall.c
index 575a43eebf5..4e89f8475c1 100644
--- a/arch/tricore/src/common/tricore_svcall.c
+++ b/arch/tricore/src/common/tricore_svcall.c
@@ -108,7 +108,7 @@ void tricore_svcall(volatile void *trap)
case SYS_switch_context:
{
- *(uintptr_t **)regs[REG_D9] = (uintptr_t *)regs[REG_UPCXI];
+ *(uintptr_t **)regs[REG_D9] = tricore_csa2addr(regs[REG_UPCXI]);
up_set_current_regs((uintptr_t *)regs[REG_D10]);
}
break;
@@ -133,7 +133,7 @@ void tricore_svcall(volatile void *trap)
g_running_tasks[cpu] = this_task();
- regs[REG_UPCXI] = (uintptr_t)up_current_regs();
+ regs[REG_UPCXI] = tricore_addr2csa(up_current_regs());
__isync();
}