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Posted to commits@mynewt.apache.org by ma...@apache.org on 2016/10/22 00:24:17 UTC
incubator-mynewt-core git commit: stm32f4discovery; revive this BSP.
Repository: incubator-mynewt-core
Updated Branches:
refs/heads/develop 53095cef6 -> 20851c975
stm32f4discovery; revive this BSP.
Project: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/repo
Commit: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/commit/20851c97
Tree: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/tree/20851c97
Diff: http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/diff/20851c97
Branch: refs/heads/develop
Commit: 20851c975d99e0c2f8373a9d8f0e5e9beba414b8
Parents: 53095ce
Author: Marko Kiiskila <ma...@runtime.io>
Authored: Fri Oct 21 17:23:58 2016 -0700
Committer: Marko Kiiskila <ma...@runtime.io>
Committed: Fri Oct 21 17:23:58 2016 -0700
----------------------------------------------------------------------
hw/bsp/stm32f4discovery/bsp.yml | 2 +-
hw/bsp/stm32f4discovery/f4discovery.cfg | 22 ++++
hw/bsp/stm32f4discovery/include/bsp/bsp.h | 5 +-
.../stm32f4discovery/include/bsp/cmsis_nvic.h | 2 +-
.../include/bsp/stm32f4xx_hal_conf.h | 108 +++++++++-------
hw/bsp/stm32f4discovery/pkg.yml | 5 +-
hw/bsp/stm32f4discovery/src/hal_bsp.c | 57 ++++++---
hw/bsp/stm32f4discovery/src/os_bsp.c | 32 -----
hw/bsp/stm32f4discovery/src/system_stm32f4xx.c | 122 ++++---------------
.../stm32f4discovery/stm32f4discovery_debug.sh | 2 +-
.../stm32f4discovery_download.sh | 6 +-
hw/bsp/stm32f4discovery/syscfg.yml | 29 +++++
12 files changed, 187 insertions(+), 205 deletions(-)
----------------------------------------------------------------------
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/bsp.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/bsp.yml b/hw/bsp/stm32f4discovery/bsp.yml
index b041fc9..f3962e0 100644
--- a/hw/bsp/stm32f4discovery/bsp.yml
+++ b/hw/bsp/stm32f4discovery/bsp.yml
@@ -20,7 +20,7 @@
bsp.arch: cortex_m4
bsp.compiler: compiler/arm-none-eabi-m4
bsp.linkerscript: "stm32f4discovery.ld"
-bsp.linkerscript.bootloader.OVERWRITE: "boot-stm32f4discovery.ld"
+bsp.linkerscript.BOOT_LOADER.OVERWRITE: "boot-stm32f4discovery.ld"
bsp.downloadscript: "stm32f4discovery_download.sh"
bsp.debugscript: "stm32f4discovery_debug.sh"
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/f4discovery.cfg
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/f4discovery.cfg b/hw/bsp/stm32f4discovery/f4discovery.cfg
new file mode 100644
index 0000000..694ab8d
--- /dev/null
+++ b/hw/bsp/stm32f4discovery/f4discovery.cfg
@@ -0,0 +1,22 @@
+#!/bin/sh
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+
+# New version of St-link
+source [find interface/stlink-v2-1.cfg]
+transport select hla_swd
+source [find target/stm32f4x.cfg]
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/include/bsp/bsp.h
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/include/bsp/bsp.h b/hw/bsp/stm32f4discovery/include/bsp/bsp.h
index 7ab3e6e..f3f0ae6 100644
--- a/hw/bsp/stm32f4discovery/include/bsp/bsp.h
+++ b/hw/bsp/stm32f4discovery/include/bsp/bsp.h
@@ -20,6 +20,7 @@
#define H_BSP_H
#include <inttypes.h>
+#include <mcu/mcu.h>
#ifdef __cplusplus
extern "C" {
@@ -40,11 +41,11 @@ extern uint8_t _ccram_start;
#define CCRAM_SIZE (64 * 1024)
/* LED pins */
-#define LED_BLINK_PIN (60)
+#define LED_BLINK_PIN MCU_GPIO_PORTD(12)
/* UART */
#define UART_CNT 1
-#define CONSOLE_UART 0
+#define CONSOLE_UART "uart0"
#define NFFS_AREA_MAX (8)
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/include/bsp/cmsis_nvic.h
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/include/bsp/cmsis_nvic.h b/hw/bsp/stm32f4discovery/include/bsp/cmsis_nvic.h
index 008b247..d0c8b44 100644
--- a/hw/bsp/stm32f4discovery/include/bsp/cmsis_nvic.h
+++ b/hw/bsp/stm32f4discovery/include/bsp/cmsis_nvic.h
@@ -12,7 +12,7 @@
#define NVIC_NUM_VECTORS (16 + 81) // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET 16
-#include "mcu/stm32f4xx.h"
+#include "stm32f4xx.h"
#ifdef __cplusplus
extern "C" {
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h
index 8e4216c..d459b12 100644
--- a/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h
+++ b/hw/bsp/stm32f4discovery/include/bsp/stm32f4xx_hal_conf.h
@@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_hal_conf.h
* @author MCD Application Team
- * @version V1.2.1
- * @date 13-March-2015
+ * @version V1.2.4
+ * @date 06-May-2016
* @brief HAL configuration file
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -90,10 +90,15 @@
#define HAL_PCD_MODULE_ENABLED
#define HAL_HCD_MODULE_ENABLED
#else
-#define HAL_PWR_MODULE_ENABLED
+#define HAL_ADC_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_IWDG_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED
+#define HAL_SPI_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
#endif
/* ########################## HSE/HSI Values adaptation ##################### */
@@ -103,11 +108,11 @@
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
- #define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */
+ #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
- #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */
+ #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
@@ -134,6 +139,10 @@
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
#endif /* LSE_VALUE */
+#if !defined (LSE_STARTUP_TIMEOUT)
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
/**
* @brief External clock source for I2S peripheral
* This value is used by the I2S HAL module to compute the I2S clock source
@@ -228,8 +237,17 @@
#define PHY_MICR_INT_EN ((uint16_t)0x0002) /*!< PHY Enable interrupts */
#define PHY_MICR_INT_OE ((uint16_t)0x0001) /*!< PHY Enable output interrupt events */
-#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /*!< Enable Interrupt on change of link status */
-#define PHY_LINK_INTERRUPT ((uint16_t)0x2000) /*!< PHY link status interrupt mask */
+#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020U) /*!< Enable Interrupt on change of link status */
+#define PHY_LINK_INTERRUPT ((uint16_t)0x2000U) /*!< PHY link status interrupt mask */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC 1U
/* Includes ------------------------------------------------------------------*/
/**
@@ -237,151 +255,151 @@
*/
#ifdef HAL_RCC_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_rcc.h"
+ #include "stm32f4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_gpio.h"
+ #include "stm32f4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_dma.h"
+ #include "stm32f4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_cortex.h"
+ #include "stm32f4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_adc.h"
+ #include "stm32f4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_can.h"
+ #include "stm32f4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_crc.h"
+ #include "stm32f4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_cryp.h"
+ #include "stm32f4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_dma2d.h"
+ #include "stm32f4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_dac.h"
+ #include "stm32f4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_DCMI_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_dcmi.h"
+ #include "stm32f4xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_ETH_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_eth.h"
+ #include "stm32f4xx_hal_eth.h"
#endif /* HAL_ETH_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_flash.h"
+ #include "stm32f4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_sram.h"
+ #include "stm32f4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_nor.h"
+ #include "stm32f4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_nand.h"
+ #include "stm32f4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_PCCARD_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_pccard.h"
+ #include "stm32f4xx_hal_pccard.h"
#endif /* HAL_PCCARD_MODULE_ENABLED */
#ifdef HAL_SDRAM_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_sdram.h"
+ #include "stm32f4xx_hal_sdram.h"
#endif /* HAL_SDRAM_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_hash.h"
+ #include "stm32f4xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_i2c.h"
+ #include "stm32f4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_I2S_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_i2s.h"
+ #include "stm32f4xx_hal_i2s.h"
#endif /* HAL_I2S_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_iwdg.h"
+ #include "stm32f4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_ltdc.h"
+ #include "stm32f4xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_pwr.h"
+ #include "stm32f4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_rng.h"
+ #include "stm32f4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_rtc.h"
+ #include "stm32f4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_sai.h"
+ #include "stm32f4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_sd.h"
+ #include "stm32f4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_spi.h"
+ #include "stm32f4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_tim.h"
+ #include "stm32f4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_uart.h"
+ #include "stm32f4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_usart.h"
+ #include "stm32f4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_irda.h"
+ #include "stm32f4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_smartcard.h"
+ #include "stm32f4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_wwdg.h"
+ #include "stm32f4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_pcd.h"
+ #include "stm32f4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
- #include "mcu/stm32f4xx_hal_hcd.h"
+ #include "stm32f4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/pkg.yml
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/pkg.yml b/hw/bsp/stm32f4discovery/pkg.yml
index c443d5b..77178f7 100644
--- a/hw/bsp/stm32f4discovery/pkg.yml
+++ b/hw/bsp/stm32f4discovery/pkg.yml
@@ -30,7 +30,8 @@ pkg.keywords:
pkg.cflags: -DSTM32F407xx
pkg.deps:
- - boot/bootutil
- hw/mcu/stm/stm32f4xx
- libc/baselibc
- - sys/flash_map
+
+pkg.deps.UART_0:
+ - hw/drivers/uart/uart_hal
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/src/hal_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/src/hal_bsp.c b/hw/bsp/stm32f4discovery/src/hal_bsp.c
index 99be34a..b63f608 100644
--- a/hw/bsp/stm32f4discovery/src/hal_bsp.c
+++ b/hw/bsp/stm32f4discovery/src/hal_bsp.c
@@ -6,7 +6,7 @@
* to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance
* with the License. You may obtain a copy of the License at
- *
+ *
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing,
@@ -16,28 +16,41 @@
* specific language governing permissions and limitations
* under the License.
*/
-#include "hal/hal_bsp.h"
-#include "hal/hal_gpio.h"
-#include "hal/hal_flash_int.h"
-#include "mcu/stm32f407xx.h"
-#include "mcu/stm32f4xx_hal_gpio_ex.h"
-#include "mcu/stm32f4_bsp.h"
-#include "bsp/bsp.h"
#include <assert.h>
+#include <syscfg/syscfg.h>
+
+#include <os/os_dev.h>
+#include <uart/uart.h>
+#include <uart_hal/uart_hal.h>
+
+#include <hal/hal_bsp.h>
+#include <hal/hal_gpio.h>
+#include <hal/hal_flash_int.h>
+
+#include <stm32f407xx.h>
+#include <stm32f4xx_hal_gpio_ex.h>
+#include <mcu/stm32f4_bsp.h>
+
+#include "bsp/bsp.h"
+
+#if MYNEWT_VAL(UART_0)
+static struct uart_dev hal_uart0;
+
static const struct stm32f4_uart_cfg uart_cfg[UART_CNT] = {
[0] = {
.suc_uart = USART6,
.suc_rcc_reg = &RCC->APB2ENR,
.suc_rcc_dev = RCC_APB2ENR_USART6EN,
- .suc_pin_tx = 38,
- .suc_pin_rx = 39,
- .suc_pin_rts = 34,
- .suc_pin_cts = 35,
+ .suc_pin_tx = MCU_GPIO_PORTC(6), /* PC6 */
+ .suc_pin_rx = MCU_GPIO_PORTC(7), /* PC7 */
+ .suc_pin_rts = -1,
+ .suc_pin_cts = -1,
.suc_pin_af = GPIO_AF8_USART6,
.suc_irqn = USART6_IRQn
}
};
+#endif
static const struct hal_bsp_mem_dump dump_cfg[] = {
[0] = {
@@ -50,13 +63,6 @@ static const struct hal_bsp_mem_dump dump_cfg[] = {
}
};
-const struct stm32f4_uart_cfg *
-bsp_uart_config(int port)
-{
- assert(port < UART_CNT);
- return &uart_cfg[port];
-}
-
const struct hal_flash *
hal_bsp_flash_dev(uint8_t id)
{
@@ -75,3 +81,16 @@ hal_bsp_core_dump(int *area_cnt)
*area_cnt = sizeof(dump_cfg) / sizeof(dump_cfg[0]);
return dump_cfg;
}
+
+void
+hal_bsp_init(void)
+{
+ int rc;
+
+#if MYNEWT_VAL(UART_0)
+ rc = os_dev_create((struct os_dev *) &hal_uart0, CONSOLE_UART,
+ OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
+ assert(rc == 0);
+#endif
+
+}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/src/os_bsp.c
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/src/os_bsp.c b/hw/bsp/stm32f4discovery/src/os_bsp.c
deleted file mode 100644
index 2d60a6c..0000000
--- a/hw/bsp/stm32f4discovery/src/os_bsp.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/**
- * Licensed to the Apache Software Foundation (ASF) under one
- * or more contributor license agreements. See the NOTICE file
- * distributed with this work for additional information
- * regarding copyright ownership. The ASF licenses this file
- * to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance
- * with the License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing,
- * software distributed under the License is distributed on an
- * "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
- * KIND, either express or implied. See the License for the
- * specific language governing permissions and limitations
- * under the License.
- */
-
-/*
- * XXXX for now have this here.
- */
-#include <flash_map/flash_map.h>
-#include <hal/hal_bsp.h>
-
-
-void _close(int fd);
-
-void
-hal_bsp_init(void)
-{
-}
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/src/system_stm32f4xx.c
----------------------------------------------------------------------
diff --git a/hw/bsp/stm32f4discovery/src/system_stm32f4xx.c b/hw/bsp/stm32f4discovery/src/system_stm32f4xx.c
index 34036ca..8d39d6e 100644
--- a/hw/bsp/stm32f4discovery/src/system_stm32f4xx.c
+++ b/hw/bsp/stm32f4discovery/src/system_stm32f4xx.c
@@ -2,8 +2,8 @@
******************************************************************************
* @file system_stm32f4xx.c
* @author MCD Application Team
- * @version V1.3.0
- * @date 01-July-2015
+ * @version V1.2.4
+ * @date 06-May-2016
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
*
* This file provides two functions and one global variable to be called from
@@ -24,7 +24,7 @@
******************************************************************************
* @attention
*
- * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2>
+ * <h2><center>© COPYRIGHT 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -63,9 +63,17 @@
* @{
*/
-#include "mcu/stm32f4xx.h"
+#include "stm32f4xx.h"
#include "bsp/cmsis_nvic.h"
+#if !defined (HSE_VALUE)
+ #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined (HSI_VALUE)
+ #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
+
/**
* @}
*/
@@ -82,6 +90,15 @@
* @{
*/
+/************************* Miscellaneous Configuration ************************/
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+ Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
+ This value must be a multiple of 0x200. */
+/******************************************************************************/
+
/**
* @}
*/
@@ -105,9 +122,8 @@
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
-uint32_t SystemCoreClock = 168000000;
-
-const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+ uint32_t SystemCoreClock = 16000000;
+ __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
/**
* @}
@@ -117,8 +133,6 @@ const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8,
* @{
*/
-static void SystemClock_Config(void);
-
/**
* @}
*/
@@ -159,9 +173,6 @@ void SystemInit(void)
/* Disable all interrupts */
RCC->CIR = 0x00000000;
- /* Configure System Clock */
- SystemClock_Config();
-
/* Relocate the vector table */
NVIC_Relocate();
}
@@ -251,93 +262,6 @@ void SystemCoreClockUpdate(void)
}
/**
- * @brief System Clock Configuration
- * The system Clock is configured as follow :
- * System Clock source = PLL (HSE)
- * SYSCLK(Hz) = 168000000
- * HCLK(Hz) = 168000000
- * AHB Prescaler = 1
- * APB1 Prescaler = 4
- * APB2 Prescaler = 2
- * HSE Frequency(Hz) = 12000000
- * PLL_M = 12
- * PLL_N = 336
- * PLL_P = 2
- * PLL_Q = 7
- * VDD(V) = 3.3
- * Main regulator output voltage = Scale1 mode
- * Flash Latency(WS) = 5
- * @param None
- * @retval None
- */
-static void SystemClock_Config(void)
-{
- /* Configure Flash prefetch, Instruction cache, Data cache */
-#if (INSTRUCTION_CACHE_ENABLE != 0)
- __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
-#endif /* INSTRUCTION_CACHE_ENABLE */
-
-#if (DATA_CACHE_ENABLE != 0)
- __HAL_FLASH_DATA_CACHE_ENABLE();
-#endif /* DATA_CACHE_ENABLE */
-
-#if (PREFETCH_ENABLE != 0)
- __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-#endif /* PREFETCH_ENABLE */
-
- /* Enable Power Control clock */
- __HAL_RCC_PWR_CLK_ENABLE();
-
- /* The voltage scaling allows optimizing the power consumption when the device is
- clocked below the maximum system frequency, to update the voltage scaling value
- regarding system frequency refer to product datasheet. */
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
- /* Enable HSE and wait till HSE is ready */
- RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) {
- /* XXX: some error should occur here */
- }
-
- /* HCLK Configuration */
- MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_SYSCLK_DIV1);
-
- /* PCLK1 Configuration */
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV4);
-
- /* PCLK2 Configuration */
- MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV2 << 3));
-
- /* Configure the main PLL clock source, multiplication and division factors. */
- WRITE_REG(RCC->PLLCFGR, (RCC_PLLSOURCE_HSE | \
- 12 | \
- (336 << POSITION_VAL(RCC_PLLCFGR_PLLN)) | \
- (((RCC_PLLP_DIV2 >> 1) -1) << POSITION_VAL(RCC_PLLCFGR_PLLP)) | \
- (7 << POSITION_VAL(RCC_PLLCFGR_PLLQ))));
-
- /* Enable the main PLL. */
- __HAL_RCC_PLL_ENABLE();
-
- /* Wait till PLL is ready */
- while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) {
- /* XXX: handle this */
- }
-
- /* Enable the Flash prefetch */
- __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
-
- /* Set flash wait states */
- __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_5);
-
- /* Start PLL */
- __HAL_RCC_SYSCLK_CONFIG(RCC_SYSCLKSOURCE_PLLCLK);
-
- while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) {
- /* XXX: deal with this*/
- }
-}
-
-/**
* @}
*/
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/stm32f4discovery_debug.sh
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diff --git a/hw/bsp/stm32f4discovery/stm32f4discovery_debug.sh b/hw/bsp/stm32f4discovery/stm32f4discovery_debug.sh
index 3775b06..20a5a3b 100755
--- a/hw/bsp/stm32f4discovery/stm32f4discovery_debug.sh
+++ b/hw/bsp/stm32f4discovery/stm32f4discovery_debug.sh
@@ -45,7 +45,7 @@ echo "Debugging" $FILE_NAME
# Exit openocd when gdb detaches.
#
set -m
-openocd -f board/stm32f4discovery.cfg -c "gdb_port 3333; telnet_port 4444; stm32f4x.cpu configure -event gdb-detach {resume;shutdown}" -c "$EXTRA_JTAG_CMD" -c init -c halt &
+openocd -s $BSP_PATH -f f4discovery.cfg -c "gdb_port 3333; telnet_port 4444; stm32f4x.cpu configure -event gdb-detach {resume;shutdown}" -c "$EXTRA_JTAG_CMD" -c init -c halt &
set +m
echo "target remote localhost:3333" > $GDB_CMD_FILE
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/stm32f4discovery_download.sh
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diff --git a/hw/bsp/stm32f4discovery/stm32f4discovery_download.sh b/hw/bsp/stm32f4discovery/stm32f4discovery_download.sh
index 133f637..42ee39d 100755
--- a/hw/bsp/stm32f4discovery/stm32f4discovery_download.sh
+++ b/hw/bsp/stm32f4discovery/stm32f4discovery_download.sh
@@ -33,9 +33,9 @@ fi
IS_BOOTLOADER=0
-# Look for 'bootloader' in FEATURES
+# Look for 'BOOT_LOADER' in FEATURES
for feature in $FEATURES; do
- if [ $feature == "bootloader" ]; then
+ if [ $feature == "BOOT_LOADER" ]; then
IS_BOOTLOADER=1
fi
done
@@ -50,5 +50,5 @@ fi
echo "Downloading" $FILE_NAME "to" $FLASH_OFFSET
-openocd -f board/stm32f4discovery.cfg -c "$EXTRA_JTAG_CMD" -c init -c "reset halt" -c "flash write_image erase $FILE_NAME $FLASH_OFFSET" -c "reset run" -c shutdown
+openocd openocd -s $BSP_PATH -f f4discovery.cfg -c "$EXTRA_JTAG_CMD" -c init -c "reset halt" -c "flash write_image erase $FILE_NAME $FLASH_OFFSET" -c "reset run" -c shutdown
http://git-wip-us.apache.org/repos/asf/incubator-mynewt-core/blob/20851c97/hw/bsp/stm32f4discovery/syscfg.yml
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diff --git a/hw/bsp/stm32f4discovery/syscfg.yml b/hw/bsp/stm32f4discovery/syscfg.yml
new file mode 100644
index 0000000..8b3feba
--- /dev/null
+++ b/hw/bsp/stm32f4discovery/syscfg.yml
@@ -0,0 +1,29 @@
+#
+# Licensed to the Apache Software Foundation (ASF) under one
+# or more contributor license agreements. See the NOTICE file
+# distributed with this work for additional information
+# regarding copyright ownership. The ASF licenses this file
+# to you under the Apache License, Version 2.0 (the
+# "License"); you may not use this file except in compliance
+# with the License. You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing,
+# software distributed under the License is distributed on an
+# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
+# KIND, either express or implied. See the License for the
+# specific language governing permissions and limitations
+# under the License.
+#
+
+syscfg.defs:
+ UART_0:
+ description: 'TBD'
+ value: 1
+
+syscfg.vals:
+ REBOOT_LOG_FLASH_AREA: FLASH_AREA_REBOOT_LOG
+ CONFIG_FCB_FLASH_AREA: FLASH_AREA_NFFS
+ NFFS_FLASH_AREA: FLASH_AREA_NFFS
+ COREDUMP_FLASH_AREA: FLASH_AREA_IMAGE_1