You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by pk...@apache.org on 2022/02/09 17:16:58 UTC

[incubator-nuttx] 01/02: armv7-a/r:cache: add cp15_cache_size function

This is an automated email from the ASF dual-hosted git repository.

pkarashchenko pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit 4eba2f35271612c735fd36438e02602230879e9b
Author: zhuyanlin <zh...@xiaomi.com>
AuthorDate: Tue Feb 8 16:45:09 2022 +0800

    armv7-a/r:cache: add cp15_cache_size function
    
    Add cp15_cache_size function for armv7-a/r
    
    Signed-off-by: zhuyanlin <zh...@xiaomi.com>
---
 arch/arm/src/armv7-a/cp15_cache_size.S | 85 ++++++++++++++++++++++++++++++++++
 arch/arm/src/armv7-a/cp15_cacheops.h   | 16 +++++++
 arch/arm/src/armv7-r/cp15_cache_size.S | 84 +++++++++++++++++++++++++++++++++
 arch/arm/src/armv7-r/cp15_cacheops.h   | 16 +++++++
 4 files changed, 201 insertions(+)

diff --git a/arch/arm/src/armv7-a/cp15_cache_size.S b/arch/arm/src/armv7-a/cp15_cache_size.S
new file mode 100644
index 0000000..e53aac1
--- /dev/null
+++ b/arch/arm/src/armv7-a/cp15_cache_size.S
@@ -0,0 +1,85 @@
+/****************************************************************************
+ * arch/arm/src/armv7-a/cp15_cache_size.S
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "cp15.h"
+
+	.file	"cp15_cache_size.S"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Symbols
+ ****************************************************************************/
+
+	.globl	cp15_cache_size
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+	.text
+
+/****************************************************************************
+ * Name: cp15_cache_size
+ *
+ * Description:
+ *   Get cp15 cache size in byte
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Cache size in byte
+ *
+ ****************************************************************************/
+
+	.globl	cp15_cache_size
+	.type	cp15_cache_size, function
+
+cp15_cache_size:
+
+	mrc		CP15_CCSIDR(r0)			/* Read the Cache Size Identification Register */
+
+	ldr		r3, =0x7fff			/* Isolate the NumSets field (bits 13-27) */
+	and		r2, r3, r0, lsr #13		/* r2=NumSets (number of sets - 1) */
+	add		r2, #1
+
+	ldr		r3, =0x3ff			/* Isolate the way field (bits 3-12) */
+	and		r1, r3, r0, lsr #3		/* r1=(number of ways - 1) */
+	add		r1, #1
+
+	ldr		r3,=0x7				/* Isolate the LineSize field (bits 0-2) */
+	and		r0, r3				/* r0=(Log2LineSize - 2) in word */
+	add		r0, #4				/* r0=Log2lineSize in byte */
+
+	mul		r2, r1, r2			/* r2=Sets*Ways */
+	lsl		r0, r2, r0			/* r0=Sets*Ways*LineSize */
+
+	bx		lr
+
+	.size cp15_cache_size, . - cp15_cache_size
+	.end
diff --git a/arch/arm/src/armv7-a/cp15_cacheops.h b/arch/arm/src/armv7-a/cp15_cacheops.h
index b55f6f6..18fad4d 100644
--- a/arch/arm/src/armv7-a/cp15_cacheops.h
+++ b/arch/arm/src/armv7-a/cp15_cacheops.h
@@ -1116,6 +1116,22 @@ void cp15_flush_dcache(uintptr_t start, uintptr_t end);
 
 void cp15_flush_dcache_all(void);
 
+/****************************************************************************
+ * Name: cp15_cache_size
+ *
+ * Description:
+ *   Get cp15 cache size in byte
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Cache size in byte
+ *
+ ****************************************************************************/
+
+uint32_t cp15_cache_size(void);
+
 #undef EXTERN
 #ifdef __cplusplus
 }
diff --git a/arch/arm/src/armv7-r/cp15_cache_size.S b/arch/arm/src/armv7-r/cp15_cache_size.S
new file mode 100644
index 0000000..a1e6a32
--- /dev/null
+++ b/arch/arm/src/armv7-r/cp15_cache_size.S
@@ -0,0 +1,84 @@
+/****************************************************************************
+ * arch/arm/src/armv7-r/cp15_cache_size.S
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include "cp15.h"
+
+	.file	"cp15_cache_size.S"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Symbols
+ ****************************************************************************/
+
+	.globl	cp15_cache_size
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+	.text
+
+/****************************************************************************
+ * Name: cp15_cache_size
+ *
+ * Description:
+ *   Get cp15 cache size in byte
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Cache size in byte
+ *
+ ****************************************************************************/
+
+	.globl	cp15_cache_size
+	.type	cp15_cache_size, function
+
+cp15_cache_size:
+
+	mrc		CP15_CCSIDR(r0)			/* Read the Cache Size Identification Register */
+
+	ldr		r3, =0x7fff			/* Isolate the NumSets field (bits 13-27) */
+	and		r2, r3, r0, lsr #13		/* r2=NumSets (number of sets - 1) */
+	add		r2, #1
+
+	ldr		r3, =0x3ff			/* Isolate the way field (bits 3-12) */
+	and		r1, r3, r0, lsr #3		/* r1=(number of ways - 1) */
+	add		r1, #1
+
+	ldr		r3,=0x7				/* Isolate the LineSize field (bits 0-2) */
+	and		r0, r3				/* r0=(Log2LineSize - 2) in word */
+	add		r0, #4				/* r0=Log2lineSize in byte */
+
+	mul		r2, r1, r2			/* r2=Sets*Ways */
+	lsl		r0, r2, r0			/* r0=Sets*Ways*LineSize */
+
+	bx		lr
+
+	.size cp15_cache_size, . - cp15_cache_size
+	.end
diff --git a/arch/arm/src/armv7-r/cp15_cacheops.h b/arch/arm/src/armv7-r/cp15_cacheops.h
index 2e8b23d..7d0bfdc 100644
--- a/arch/arm/src/armv7-r/cp15_cacheops.h
+++ b/arch/arm/src/armv7-r/cp15_cacheops.h
@@ -1123,6 +1123,22 @@ void cp15_flush_dcache(uintptr_t start, uintptr_t end);
 
 void cp15_flush_dcache_all(void);
 
+/****************************************************************************
+ * Name: cp15_cache_size
+ *
+ * Description:
+ *   Get cp15 cache size in byte
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Cache size in byte
+ *
+ ****************************************************************************/
+
+uint32_t cp15_cache_size(void);
+
 #undef EXTERN
 #ifdef __cplusplus
 }