[GitHub] [incubator-nuttx] sonicyang edited a comment on pull request #979: PCI-E support with x86_64/qemu example

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sonicyang edited a comment on pull request #979:
URL: https://github.com/apache/incubator-nuttx/pull/979#issuecomment-625793332


   @btashton I have checked your modifications.
   I didn't make it work with my serial card because of lacking find_cap and msi/msix routines.
   
   This is to be expected. I am reworking those right now, but should have that done this weekend.
   
   But I did confirmed that it did scan the bus without crashing my Intel Xeon machine.
   
   Great!  I have only been messing with this via QEMU partially because it lets be create custom bus hierarchies.
   
   I did noticed this "smart" way of scanning bus didn't work with Jailhouse, because Jailhouse didn't have a full PCI hierarchy, e.g. root device, etc. Devices are passed to the cells via VT-d separately.
   
   This should not be a problem, but I did see that Jailhouse breaks the PCI spec in a way I did not check for.  They let you pass individual device functions which means that when I check func 0 I will stop looking. I bet this is where things went wrong.  I added a patch to work around this to my branch.  I it would be great if you could see if it finds your devices.
   
   I am currently working on ivshmem device driver for Jailhouse, I hope we can take this problem into account.
   
   We certainly should handle this case.  I made a note in my patch about how to detect Jailhouse to work around this issue (for now I hard coded it on)
   
   I purpose that we should open a PCI feature branch, cooperate there with PR.
   Of course, we need some one with permission to do this.
   
   I created the branch off of what was in this PR called pci. https://github.com/apache/incubator-nuttx/tree/pci
   I think this is a great starting point and we can review it more as a whole once we have it more mature.  I also don't want to block you while I am working on some more of the low level primitives without the jailroot code. I also have a PCIe FPGA board that should be here in a few weeks that will allow me to test some of this against a RISC-V softcore.
   
   


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