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Posted to commits@mynewt.apache.org by an...@apache.org on 2020/11/25 12:08:01 UTC
[mynewt-core] 04/05: kernel/os/arch: Stop M33-MTB on exception
This is an automated email from the ASF dual-hosted git repository.
andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
commit d2109a94881c93186732c39672b2659bd9bf930b
Author: Andrzej Kaczmarek <an...@codecoup.pl>
AuthorDate: Sat Nov 21 01:40:52 2020 +0100
kernel/os/arch: Stop M33-MTB on exception
If MTB is enabled, we should better stop it in exception handler so
we do not overwrite potentially interesting trace data with not so
interesting trace data for exception handler.
We also need to check if MTB is available on given MCU since this is
optional feature for Cortex-M33.
---
kernel/os/src/arch/cortex_m33/os_fault.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/kernel/os/src/arch/cortex_m33/os_fault.c b/kernel/os/src/arch/cortex_m33/os_fault.c
index 5c45da9..c4d7cbc 100644
--- a/kernel/os/src/arch/cortex_m33/os_fault.c
+++ b/kernel/os/src/arch/cortex_m33/os_fault.c
@@ -163,6 +163,23 @@ os_default_irq(struct trap_frame *tf)
uint32_t orig_sp;
#endif
+ /* Stop MTB if implemented so interrupt handler execution is not recorded */
+ asm volatile (".syntax unified \n"
+ " ldr r1, =0xe00ff000 \n"
+ " ldr r2, [r1, #0x1c] \n"
+ " tst r2, #1 \n"
+ " beq 1f \n"
+ " bic r2, #0x00ff \n"
+ " bic r2, #0x0f00 \n"
+ " add r1, r2 \n"
+ " ldr r2, [r1, #4] \n"
+ " bic r2, #0x80000000 \n"
+ " str r2, [r1, #4] \n"
+ " 1: \n"
+ :
+ :
+ : "r1", "r2");
+
console_blocking_mode();
console_printf("Unhandled interrupt (%ld), exception sp 0x%08lx\n",
SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk, (uint32_t)tf->ef);