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Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/10/16 07:01:36 UTC

[incubator-nuttx] 03/16: esp32/esp32_freerun.c: Use device specific locks.

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git

commit 698af43d78735b97b161befec05fb7ffa8496ec7
Author: Abdelatif Guettouche <ab...@espressif.com>
AuthorDate: Mon Aug 30 11:36:24 2021 +0200

    esp32/esp32_freerun.c: Use device specific locks.
    
    Signed-off-by: Abdelatif Guettouche <ab...@espressif.com>
---
 arch/xtensa/src/esp32/esp32_freerun.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/arch/xtensa/src/esp32/esp32_freerun.c b/arch/xtensa/src/esp32/esp32_freerun.c
index f1489da..951893e 100644
--- a/arch/xtensa/src/esp32/esp32_freerun.c
+++ b/arch/xtensa/src/esp32/esp32_freerun.c
@@ -34,9 +34,10 @@
 
 #include <nuttx/irq.h>
 #include <nuttx/clock.h>
+#include <nuttx/spinlock.h>
 
-#include "esp32_freerun.h"
 #include "esp32_clockconfig.h"
+#include "esp32_freerun.h"
 
 #ifdef CONFIG_ESP32_FREERUN
 
@@ -49,6 +50,12 @@
 #define ESP32_TIMER_WIDTH 64
 
 /****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static spinlock_t g_lock;      /* Device specific lock */
+
+/****************************************************************************
  * Private Functions
  ****************************************************************************/
 
@@ -189,9 +196,9 @@ int esp32_freerun_initialize(struct esp32_freerun_s *freerun, int chan,
 
       /* Register the handler */
 
-      flags = enter_critical_section();
+      flags = spin_lock_irqsave(&g_lock);
       ret = ESP32_TIM_SETISR(freerun->tch, esp32_freerun_handler, freerun);
-      leave_critical_section(flags);
+      spin_unlock_irqrestore(&g_lock, flags);
       if (ret == OK)
         {
           ESP32_TIM_ENABLEINT(freerun->tch);
@@ -244,7 +251,7 @@ int esp32_freerun_counter(struct esp32_freerun_s *freerun,
 
   /* Temporarily disable the overflow counter. */
 
-  flags    = enter_critical_section();
+  flags    = spin_lock_irqsave(&g_lock);
 
   overflow = freerun->overflow;
   ESP32_TIM_GETCTR(freerun->tch, &counter);
@@ -271,7 +278,7 @@ int esp32_freerun_counter(struct esp32_freerun_s *freerun,
       freerun->overflow = overflow;
     }
 
-  leave_critical_section(flags);
+  spin_unlock_irqrestore(&g_lock, flags);
 
   tmrinfo("counter=%" PRIu64 " (%" PRIu64 ") overflow=%" PRIu32
           ", pending=%i\n",