You are viewing a plain text version of this content. The canonical link for it is here.
Posted to commits@nuttx.apache.org by xi...@apache.org on 2021/02/25 19:26:34 UTC

[incubator-nuttx] branch master updated: arch:rv64:add API up_copyfullstate for later FPU support.

This is an automated email from the ASF dual-hosted git repository.

xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git


The following commit(s) were added to refs/heads/master by this push:
     new 651b905  arch:rv64:add API up_copyfullstate for later FPU support.
651b905 is described below

commit 651b905b994e27597ad7f1d9fc95370013d0d911
Author: hotislandn <ho...@hotmail.com>
AuthorDate: Thu Feb 25 22:38:29 2021 +0800

    arch:rv64:add API up_copyfullstate for later FPU support.
    
    Signed-off-by: hotislandn <ho...@hotmail.com>
---
 arch/risc-v/src/common/riscv_internal.h      |  1 +
 arch/risc-v/src/k210/Make.defs               |  2 +-
 arch/risc-v/src/rv64gc/riscv_copyfullstate.c | 62 ++++++++++++++++++++++++++++
 arch/risc-v/src/rv64gc/riscv_sigdeliver.c    |  2 +-
 4 files changed, 65 insertions(+), 2 deletions(-)

diff --git a/arch/risc-v/src/common/riscv_internal.h b/arch/risc-v/src/common/riscv_internal.h
index 2ae318c..ed583cd 100644
--- a/arch/risc-v/src/common/riscv_internal.h
+++ b/arch/risc-v/src/common/riscv_internal.h
@@ -186,6 +186,7 @@ void up_ack_irq(int irq);
 
 #ifdef CONFIG_ARCH_RV64GC
 void up_copystate(uint64_t *dest, uint64_t *src);
+void up_copyfullstate(uint64_t *dest, uint64_t *src);
 #else
 void up_copystate(uint32_t *dest, uint32_t *src);
 void up_copyfullstate(uint32_t *dest, uint32_t *src);
diff --git a/arch/risc-v/src/k210/Make.defs b/arch/risc-v/src/k210/Make.defs
index 606c2c7..a34e1f8 100644
--- a/arch/risc-v/src/k210/Make.defs
+++ b/arch/risc-v/src/k210/Make.defs
@@ -51,7 +51,7 @@ CMN_CSRCS  += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
 CMN_CSRCS  += riscv_releasepending.c riscv_reprioritizertr.c
 CMN_CSRCS  += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
 CMN_CSRCS  += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
-CMN_CSRCS  += riscv_mdelay.c
+CMN_CSRCS  += riscv_mdelay.c riscv_copyfullstate.c
 
 ifeq ($(CONFIG_STACK_COLORATION),y)
 CMN_CSRCS += riscv_checkstack.c
diff --git a/arch/risc-v/src/rv64gc/riscv_copyfullstate.c b/arch/risc-v/src/rv64gc/riscv_copyfullstate.c
new file mode 100644
index 0000000..5b7af44
--- /dev/null
+++ b/arch/risc-v/src/rv64gc/riscv_copyfullstate.c
@@ -0,0 +1,62 @@
+/****************************************************************************
+ * arch/risc-v/src/rv64gc/riscv_copyfullstate.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <arch/irq.h>
+
+#include "riscv_internal.h"
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_copyfullstate
+ *
+ * Description:
+ *    Copy the entire register save area (including the floating point
+ *    registers if applicable).  This is a little faster than most memcpy's
+ *    since it does 64-bit transfers.
+ *
+ ****************************************************************************/
+
+void up_copyfullstate(uint64_t *dest, uint64_t *src)
+{
+  int i;
+
+  /* In the RISC-V model, the state is copied from the stack to the TCB,
+   * but only a reference is passed to get the state from the TCB.  So the
+   * following check avoids copying the TCB save area onto itself:
+   */
+
+  if (src != dest)
+    {
+      for (i = 0; i < XCPTCONTEXT_REGS; i++)
+        {
+          *dest++ = *src++;
+        }
+    }
+}
diff --git a/arch/risc-v/src/rv64gc/riscv_sigdeliver.c b/arch/risc-v/src/rv64gc/riscv_sigdeliver.c
index f773bee..dc0cc43 100644
--- a/arch/risc-v/src/rv64gc/riscv_sigdeliver.c
+++ b/arch/risc-v/src/rv64gc/riscv_sigdeliver.c
@@ -102,7 +102,7 @@ void up_sigdeliver(void)
 
   /* Save the return state on the stack. */
 
-  up_copystate(regs, rtcb->xcp.regs);
+  up_copyfullstate(regs, rtcb->xcp.regs);
 
 #ifdef CONFIG_SMP
   /* In the SMP case, up_schedule_sigaction(0) will have incremented