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Posted to commits@nuttx.apache.org by ma...@apache.org on 2022/09/20 07:20:26 UTC
[incubator-nuttx] branch master updated (a2deaa73c3 -> 079a6fa6cc)
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
from a2deaa73c3 arch: risc-v: Remove FPU support from qemu-rv
new 493152a45f fs/eventfd: Remove the extra space
new e44ff7d49f arm/rtl8720c: Remove up_trigger_irq since it is implemented in arm_trigger_irq.c
new ef43283c67 arch/arm: Unify arm_cpu_sgi to up_trigger_irq
new 17ac85eb0a arch/armv7[a|r]: Support non SGI in up_trigger_irq
new 079a6fa6cc arch/armv7[a|r]: Implement up_affinity_irq
The 5 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "add" were already present in the repository and have only
been added to this reference.
Summary of changes:
arch/arm/src/armv7-a/Kconfig | 1 +
arch/arm/src/armv7-a/arm_cpupause.c | 23 +++------
arch/arm/src/armv7-a/arm_cpustart.c | 3 +-
arch/arm/src/armv7-a/arm_gicv2.c | 63 +++++++++++++++++++++++
arch/arm/src/armv7-a/gic.h | 3 +-
arch/arm/src/armv7-m/arm_trigger_irq.c | 2 +-
arch/arm/src/armv7-r/Kconfig | 1 +
arch/arm/src/armv7-r/arm_gicv2.c | 63 ++++++++++++++++-------
arch/arm/src/armv7-r/gic.h | 91 +++++++++++++++++++++++++---------
arch/arm/src/armv8-m/arm_trigger_irq.c | 2 +-
arch/arm/src/rtl8720c/ameba_nvic.c | 39 ---------------
arch/ceva/src/xc5/up_intc.c | 2 +-
arch/ceva/src/xm6/up_intc.c | 2 +-
fs/vfs/fs_eventfd.c | 4 +-
include/nuttx/arch.h | 14 +++++-
15 files changed, 205 insertions(+), 108 deletions(-)
[incubator-nuttx] 02/05: arm/rtl8720c: Remove up_trigger_irq since it is implemented in arm_trigger_irq.c
Posted by ma...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit e44ff7d49febffc2853d7c70d94337c6f45f9295
Author: Xiang Xiao <xi...@xiaomi.com>
AuthorDate: Sun Sep 18 17:25:05 2022 +0800
arm/rtl8720c: Remove up_trigger_irq since it is implemented in arm_trigger_irq.c
Signed-off-by: Xiang Xiao <xi...@xiaomi.com>
---
arch/arm/src/rtl8720c/ameba_nvic.c | 39 --------------------------------------
1 file changed, 39 deletions(-)
diff --git a/arch/arm/src/rtl8720c/ameba_nvic.c b/arch/arm/src/rtl8720c/ameba_nvic.c
index 8c504495e8..88cf34b38b 100644
--- a/arch/arm/src/rtl8720c/ameba_nvic.c
+++ b/arch/arm/src/rtl8720c/ameba_nvic.c
@@ -259,45 +259,6 @@ void up_enable_irq(int irq)
}
}
-/****************************************************************************
- * Name: up_trigger_irq
- *
- * Description:
- * Trigger an IRQ by software.
- *
- ****************************************************************************/
-
-void up_trigger_irq(int irq)
-{
- uint32_t pend_bit = 0;
- DEBUGASSERT(irq >= NVIC_IRQ_NMI && irq < NR_IRQS);
- if (irq >= NVIC_IRQ_FIRST)
- {
- putreg32(irq - NVIC_IRQ_FIRST, NVIC_STIR);
- }
-
- else
- {
- switch (irq)
- {
- case NVIC_IRQ_PENDSV:
- pend_bit = NVIC_INTCTRL_PENDSVSET;
- break;
- case NVIC_IRQ_NMI:
- pend_bit = NVIC_INTCTRL_NMIPENDSET;
- break;
- case NVIC_IRQ_SYSTICK:
- pend_bit = NVIC_INTCTRL_PENDSTSET;
- break;
- }
-
- if (pend_bit)
- {
- modifyreg32(NVIC_INTCTRL, 0, pend_bit);
- }
- }
-}
-
/****************************************************************************
* Name: up_prioritize_irq
*
[incubator-nuttx] 04/05: arch/armv7[a|r]: Support non SGI in up_trigger_irq
Posted by ma...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 17ac85eb0a6dd43f9c185d7ffebae1661707969f
Author: Xiang Xiao <xi...@xiaomi.com>
AuthorDate: Sun Sep 18 18:13:11 2022 +0800
arch/armv7[a|r]: Support non SGI in up_trigger_irq
Signed-off-by: Xiang Xiao <xi...@xiaomi.com>
---
arch/arm/src/armv7-a/arm_gicv2.c | 16 +++++++++++++++-
arch/arm/src/armv7-r/arm_gicv2.c | 16 +++++++++++++++-
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index 2f2e44359d..3f7fc667ed 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -523,7 +523,21 @@ int up_prioritize_irq(int irq, int priority)
void up_trigger_irq(int irq, cpu_set_t cpuset)
{
- arm_cpu_sgi(irq, cpuset);
+ if (irq >= 0 && irq <= GIC_IRQ_SGI15)
+ {
+ arm_cpu_sgi(irq, cpuset);
+ }
+ else if (irq >= 0 && irq < NR_IRQS)
+ {
+ uintptr_t regaddr;
+
+ /* Write '1' to the corresponding bit in the distributor Interrupt
+ * Set-Pending (ICDISPR)
+ */
+
+ regaddr = GIC_ICDISPR(irq);
+ putreg32(GIC_ICDISPR_INT(irq), regaddr);
+ }
}
/****************************************************************************
diff --git a/arch/arm/src/armv7-r/arm_gicv2.c b/arch/arm/src/armv7-r/arm_gicv2.c
index 9de974bea5..bd5f0cf79f 100644
--- a/arch/arm/src/armv7-r/arm_gicv2.c
+++ b/arch/arm/src/armv7-r/arm_gicv2.c
@@ -522,7 +522,21 @@ int up_prioritize_irq(int irq, int priority)
void up_trigger_irq(int irq, cpu_set_t cpuset)
{
- arm_cpu_sgi(irq, cpuset);
+ if (irq >= 0 && irq <= GIC_IRQ_SGI15)
+ {
+ arm_cpu_sgi(irq, cpuset);
+ }
+ else if (irq >= 0 && irq < NR_IRQS)
+ {
+ uintptr_t regaddr;
+
+ /* Write '1' to the corresponding bit in the distributor Interrupt
+ * Set-Pending (ICDISPR)
+ */
+
+ regaddr = GIC_ICDISPR(irq);
+ putreg32(GIC_ICDISPR_INT(irq), regaddr);
+ }
}
#endif /* CONFIG_ARMV7R_HAVE_GICv2 */
[incubator-nuttx] 05/05: arch/armv7[a|r]: Implement up_affinity_irq
Posted by ma...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 079a6fa6cc1572be82e3048974db7c58dd80a425
Author: Xiang Xiao <xi...@xiaomi.com>
AuthorDate: Sun Sep 18 18:49:12 2022 +0800
arch/armv7[a|r]: Implement up_affinity_irq
Signed-off-by: Xiang Xiao <xi...@xiaomi.com>
---
arch/arm/src/armv7-a/arm_gicv2.c | 27 +++++++++++++++++++++++++++
arch/arm/src/armv7-r/arm_gicv2.c | 27 +++++++++++++++++++++++++++
include/nuttx/arch.h | 12 ++++++++++++
3 files changed, 66 insertions(+)
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index 3f7fc667ed..8f6f8ab34f 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -504,6 +504,33 @@ int up_prioritize_irq(int irq, int priority)
return -EINVAL;
}
+/****************************************************************************
+ * Name: up_affinity_irq
+ *
+ * Description:
+ * Set an IRQ affinity by software.
+ *
+ ****************************************************************************/
+
+void up_affinity_irq(int irq, cpu_set_t cpuset)
+{
+ if (irq >= GIC_IRQ_SPI && irq < NR_IRQS)
+ {
+ uintptr_t regaddr;
+ uint32_t regval;
+
+ /* Write the new cpuset to the corresponding field in the in the
+ * distributor Interrupt Processor Target Register (GIC_ICDIPTR).
+ */
+
+ regaddr = GIC_ICDIPTR(irq);
+ regval = getreg32(regaddr);
+ regval &= ~GIC_ICDIPTR_ID_MASK(irq);
+ regval |= GIC_ICDIPTR_ID(irq, cpuset);
+ putreg32(regval, regaddr);
+ }
+}
+
/****************************************************************************
* Name: up_trigger_irq
*
diff --git a/arch/arm/src/armv7-r/arm_gicv2.c b/arch/arm/src/armv7-r/arm_gicv2.c
index bd5f0cf79f..2da122198b 100644
--- a/arch/arm/src/armv7-r/arm_gicv2.c
+++ b/arch/arm/src/armv7-r/arm_gicv2.c
@@ -503,6 +503,33 @@ int up_prioritize_irq(int irq, int priority)
return -EINVAL;
}
+/****************************************************************************
+ * Name: up_affinity_irq
+ *
+ * Description:
+ * Set an IRQ affinity by software.
+ *
+ ****************************************************************************/
+
+void up_affinity_irq(int irq, cpu_set_t cpuset)
+{
+ if (irq >= GIC_IRQ_SPI && irq < NR_IRQS)
+ {
+ uintptr_t regaddr;
+ uint32_t regval;
+
+ /* Write the new cpuset to the corresponding field in the in the
+ * distributor Interrupt Processor Target Register (GIC_ICDIPTR).
+ */
+
+ regaddr = GIC_ICDIPTR(irq);
+ regval = getreg32(regaddr);
+ regval &= ~GIC_ICDIPTR_ID_MASK(irq);
+ regval |= GIC_ICDIPTR_ID(irq, cpuset);
+ putreg32(regval, regaddr);
+ }
+}
+
/****************************************************************************
* Name: up_trigger_irq
*
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index e4bdc9c19d..467942e4ea 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -1489,6 +1489,18 @@ void up_enable_irq(int irq);
void up_disable_irq(int irq);
#endif
+/****************************************************************************
+ * Name: up_affinity_irq
+ *
+ * Description:
+ * Set an IRQ affinity by software.
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+void up_affinity_irq(int irq, cpu_set_t cpuset);
+#endif
+
/****************************************************************************
* Name: up_trigger_irq
*
[incubator-nuttx] 03/05: arch/arm: Unify arm_cpu_sgi to up_trigger_irq
Posted by ma...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit ef43283c67d358e654948e97ce78a524ca1c221d
Author: Xiang Xiao <xi...@xiaomi.com>
AuthorDate: Sun Sep 18 17:42:16 2022 +0800
arch/arm: Unify arm_cpu_sgi to up_trigger_irq
Signed-off-by: Xiang Xiao <xi...@xiaomi.com>
---
arch/arm/src/armv7-a/Kconfig | 1 +
arch/arm/src/armv7-a/arm_cpupause.c | 23 +++------
arch/arm/src/armv7-a/arm_cpustart.c | 3 +-
arch/arm/src/armv7-a/arm_gicv2.c | 22 ++++++++
arch/arm/src/armv7-a/gic.h | 3 +-
arch/arm/src/armv7-m/arm_trigger_irq.c | 2 +-
arch/arm/src/armv7-r/Kconfig | 1 +
arch/arm/src/armv7-r/arm_gicv2.c | 26 ++--------
arch/arm/src/armv7-r/gic.h | 91 +++++++++++++++++++++++++---------
arch/arm/src/armv8-m/arm_trigger_irq.c | 2 +-
arch/ceva/src/xc5/up_intc.c | 2 +-
arch/ceva/src/xm6/up_intc.c | 2 +-
include/nuttx/arch.h | 2 +-
13 files changed, 111 insertions(+), 69 deletions(-)
diff --git a/arch/arm/src/armv7-a/Kconfig b/arch/arm/src/armv7-a/Kconfig
index 22fe1a45c9..489b90d16d 100644
--- a/arch/arm/src/armv7-a/Kconfig
+++ b/arch/arm/src/armv7-a/Kconfig
@@ -7,6 +7,7 @@ comment "ARMv7-A Configuration Options"
config ARMV7A_HAVE_GICv2
bool
+ select ARCH_HAVE_IRQTRIGGER
default n
---help---
Selected by the configuration tool if the architecture supports the
diff --git a/arch/arm/src/armv7-a/arm_cpupause.c b/arch/arm/src/armv7-a/arm_cpupause.c
index 261418a28c..6c5ba07d28 100644
--- a/arch/arm/src/armv7-a/arm_cpupause.c
+++ b/arch/arm/src/armv7-a/arm_cpupause.c
@@ -241,8 +241,6 @@ int arm_pause_handler(int irq, void *context, void *arg)
int up_cpu_pause(int cpu)
{
- int ret;
-
DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
#ifdef CONFIG_SCHED_INSTRUMENTATION
@@ -267,22 +265,13 @@ int up_cpu_pause(int cpu)
/* Execute SGI2 */
- ret = arm_cpu_sgi(GIC_IRQ_SGI2, (1 << cpu));
- if (ret < 0)
- {
- /* What happened? Unlock the g_cpu_wait spinlock */
-
- spin_unlock(&g_cpu_wait[cpu]);
- }
- else
- {
- /* Wait for the other CPU to unlock g_cpu_paused meaning that
- * it is fully paused and ready for up_cpu_resume();
- */
+ arm_cpu_sgi(GIC_IRQ_SGI2, (1 << cpu));
- spin_lock(&g_cpu_paused[cpu]);
- }
+ /* Wait for the other CPU to unlock g_cpu_paused meaning that
+ * it is fully paused and ready for up_cpu_resume();
+ */
+ spin_lock(&g_cpu_paused[cpu]);
spin_unlock(&g_cpu_paused[cpu]);
/* On successful return g_cpu_wait will be locked, the other CPU will be
@@ -290,7 +279,7 @@ int up_cpu_pause(int cpu)
* called. g_cpu_paused will be unlocked in any case.
*/
- return ret;
+ return OK;
}
/****************************************************************************
diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c
index 83681cecc9..27a9905fa8 100644
--- a/arch/arm/src/armv7-a/arm_cpustart.c
+++ b/arch/arm/src/armv7-a/arm_cpustart.c
@@ -160,7 +160,8 @@ int up_cpu_start(int cpu)
/* Execute SGI1 */
- return arm_cpu_sgi(GIC_IRQ_SGI1, (1 << cpu));
+ arm_cpu_sgi(GIC_IRQ_SGI1, (1 << cpu));
+ return OK;
}
#endif /* CONFIG_SMP */
diff --git a/arch/arm/src/armv7-a/arm_gicv2.c b/arch/arm/src/armv7-a/arm_gicv2.c
index acb12e5f20..2f2e44359d 100644
--- a/arch/arm/src/armv7-a/arm_gicv2.c
+++ b/arch/arm/src/armv7-a/arm_gicv2.c
@@ -504,6 +504,28 @@ int up_prioritize_irq(int irq, int priority)
return -EINVAL;
}
+/****************************************************************************
+ * Name: up_trigger_irq
+ *
+ * Description:
+ * Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is
+ * selected, then the SGI is sent to all CPUs specified in the CPU set.
+ * That set may include the current CPU.
+ *
+ * If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent
+ * only to the current CPU.
+ *
+ * Input Parameters
+ * irq - The SGI interrupt ID (0-15)
+ * cpuset - The set of CPUs to receive the SGI
+ *
+ ****************************************************************************/
+
+void up_trigger_irq(int irq, cpu_set_t cpuset)
+{
+ arm_cpu_sgi(irq, cpuset);
+}
+
/****************************************************************************
* Name: arm_gic_irq_trigger
*
diff --git a/arch/arm/src/armv7-a/gic.h b/arch/arm/src/armv7-a/gic.h
index 240b23874f..b4fd3d9c29 100644
--- a/arch/arm/src/armv7-a/gic.h
+++ b/arch/arm/src/armv7-a/gic.h
@@ -681,7 +681,7 @@ static inline unsigned int arm_gic_nlines(void)
*
****************************************************************************/
-static inline int arm_cpu_sgi(int sgi, unsigned int cpuset)
+static inline void arm_cpu_sgi(int sgi, unsigned int cpuset)
{
uint32_t regval;
@@ -694,7 +694,6 @@ static inline int arm_cpu_sgi(int sgi, unsigned int cpuset)
#endif
putreg32(regval, GIC_ICDSGIR);
- return OK;
}
/****************************************************************************
diff --git a/arch/arm/src/armv7-m/arm_trigger_irq.c b/arch/arm/src/armv7-m/arm_trigger_irq.c
index 048053339f..0b3af502a5 100644
--- a/arch/arm/src/armv7-m/arm_trigger_irq.c
+++ b/arch/arm/src/armv7-m/arm_trigger_irq.c
@@ -47,7 +47,7 @@
*
****************************************************************************/
-void up_trigger_irq(int irq)
+void up_trigger_irq(int irq, cpu_set_t cpuset)
{
uint32_t pend_bit = 0;
diff --git a/arch/arm/src/armv7-r/Kconfig b/arch/arm/src/armv7-r/Kconfig
index b0679a4f20..d0bb60f590 100644
--- a/arch/arm/src/armv7-r/Kconfig
+++ b/arch/arm/src/armv7-r/Kconfig
@@ -7,6 +7,7 @@ comment "ARMv7-R Configuration Options"
config ARMV7R_HAVE_GICv2
bool "ARMV7R_GICv2 support"
+ select ARCH_HAVE_IRQTRIGGER
default y
---help---
Selected by the configuration tool if the architecture supports the
diff --git a/arch/arm/src/armv7-r/arm_gicv2.c b/arch/arm/src/armv7-r/arm_gicv2.c
index f95f775ee5..9de974bea5 100644
--- a/arch/arm/src/armv7-r/arm_gicv2.c
+++ b/arch/arm/src/armv7-r/arm_gicv2.c
@@ -504,7 +504,7 @@ int up_prioritize_irq(int irq, int priority)
}
/****************************************************************************
- * Name: arm_cpu_sgi
+ * Name: up_trigger_irq
*
* Description:
* Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is
@@ -515,30 +515,14 @@ int up_prioritize_irq(int irq, int priority)
* only to the current CPU.
*
* Input Parameters
- * sgi - The SGI interrupt ID (0-15)
+ * irq - The SGI interrupt ID (0-15)
* cpuset - The set of CPUs to receive the SGI
*
- * Returned Value:
- * OK is always returned at present.
- *
****************************************************************************/
-int arm_cpu_sgi(int sgi, unsigned int cpuset)
+void up_trigger_irq(int irq, cpu_set_t cpuset)
{
- uint32_t regval;
-
-#ifdef CONFIG_SMP
- regval = GIC_ICDSGIR_INTID(sgi) |
- GIC_ICDSGIR_CPUTARGET(cpuset) |
- GIC_ICDSGIR_TGTFILTER_LIST;
-#else
- regval = GIC_ICDSGIR_INTID(sgi) |
- GIC_ICDSGIR_CPUTARGET(0) |
- GIC_ICDSGIR_TGTFILTER_THIS;
-#endif
-
- putreg32(regval, GIC_ICDSGIR);
- return OK;
+ arm_cpu_sgi(irq, cpuset);
}
-#endif /* CONFIG_ARMV7R_HAVE_GICv2 */
+#endif /* CONFIG_ARMV7R_HAVE_GICv2 */
diff --git a/arch/arm/src/armv7-r/gic.h b/arch/arm/src/armv7-r/gic.h
index 6ed485bf0f..da694bc089 100644
--- a/arch/arm/src/armv7-r/gic.h
+++ b/arch/arm/src/armv7-r/gic.h
@@ -531,10 +531,77 @@
#define GIC_IRQ_SPI 32 /* First SPI interrupt ID */
/****************************************************************************
- * Public Function Prototypes
+ * Inline Functions
****************************************************************************/
#ifndef __ASSEMBLY__
+
+/****************************************************************************
+ * Name: arm_gic_nlines
+ *
+ * Description:
+ * Return the number of interrupt lines supported by this GIC
+ * implementation (include both PPIs (32) and SPIs).
+ *
+ * Input Parameters:
+ * None
+ *
+ * Returned Value:
+ * The number of interrupt lines.
+ *
+ ****************************************************************************/
+
+static inline unsigned int arm_gic_nlines(void)
+{
+ uint32_t regval;
+ uint32_t field;
+
+ /* Get the number of interrupt lines. */
+
+ regval = getreg32(GIC_ICDICTR);
+ field = (regval & GIC_ICDICTR_ITLINES_MASK) >> GIC_ICDICTR_ITLINES_SHIFT;
+ return (field + 1) << 5;
+}
+
+/****************************************************************************
+ * Name: arm_cpu_sgi
+ *
+ * Description:
+ * Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is
+ * selected, then the SGI is sent to all CPUs specified in the CPU set.
+ * That set may include the current CPU.
+ *
+ * If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent
+ * only to the current CPU.
+ *
+ * Input Parameters:
+ * sgi - The SGI interrupt ID (0-15)
+ * cpuset - The set of CPUs to receive the SGI
+ *
+ * Returned Value:
+ * OK is always returned at present.
+ *
+ ****************************************************************************/
+
+static inline void arm_cpu_sgi(int sgi, unsigned int cpuset)
+{
+ uint32_t regval;
+
+#ifdef CONFIG_SMP
+ regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(cpuset) |
+ GIC_ICDSGIR_TGTFILTER_LIST;
+#else
+ regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(0) |
+ GIC_ICDSGIR_TGTFILTER_THIS;
+#endif
+
+ putreg32(regval, GIC_ICDSGIR);
+}
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
@@ -594,28 +661,6 @@ void arm_gic_initialize(void);
uint32_t *arm_decodeirq(uint32_t *regs);
-/****************************************************************************
- * Name: arm_cpu_sgi
- *
- * Description:
- * Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is
- * selected, then the SGI is sent to all CPUs specified in the CPU set.
- * That set may include the current CPU.
- *
- * If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent
- * only to the current CPU.
- *
- * Input Parameters
- * sgi - The SGI interrupt ID (0-15)
- * cpuset - The set of CPUs to receive the SGI
- *
- * Returned Value:
- * OK is always returned at present.
- *
- ****************************************************************************/
-
-int arm_cpu_sgi(int sgi, unsigned int cpuset);
-
/****************************************************************************
* Name: arm_start_handler
*
diff --git a/arch/arm/src/armv8-m/arm_trigger_irq.c b/arch/arm/src/armv8-m/arm_trigger_irq.c
index 9ffde567da..865267a512 100644
--- a/arch/arm/src/armv8-m/arm_trigger_irq.c
+++ b/arch/arm/src/armv8-m/arm_trigger_irq.c
@@ -47,7 +47,7 @@
*
****************************************************************************/
-void up_trigger_irq(int irq)
+void up_trigger_irq(int irq, cpu_set_t cpuset)
{
uint32_t pend_bit = 0;
diff --git a/arch/ceva/src/xc5/up_intc.c b/arch/ceva/src/xc5/up_intc.c
index dffe36ac78..65f093b985 100644
--- a/arch/ceva/src/xc5/up_intc.c
+++ b/arch/ceva/src/xc5/up_intc.c
@@ -162,7 +162,7 @@ int up_prioritize_irq(int irq, int priority)
****************************************************************************/
#ifdef CONFIG_ARCH_HAVE_IRQTRIGGER
-void up_trigger_irq(int irq)
+void up_trigger_irq(int irq, cpu_set_t cpuset)
{
if (irq >= IRQ_VINT_FIRST)
{
diff --git a/arch/ceva/src/xm6/up_intc.c b/arch/ceva/src/xm6/up_intc.c
index fb18382a07..0d29d2a06d 100644
--- a/arch/ceva/src/xm6/up_intc.c
+++ b/arch/ceva/src/xm6/up_intc.c
@@ -170,7 +170,7 @@ int up_prioritize_irq(int irq, int priority)
****************************************************************************/
#ifdef CONFIG_ARCH_HAVE_IRQTRIGGER
-void up_trigger_irq(int irq)
+void up_trigger_irq(int irq, cpu_set_t cpuset)
{
if (irq >= IRQ_VINT_FIRST)
{
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index 431d34122c..e4bdc9c19d 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -1498,7 +1498,7 @@ void up_disable_irq(int irq);
****************************************************************************/
#ifdef CONFIG_ARCH_HAVE_IRQTRIGGER
-void up_trigger_irq(int irq);
+void up_trigger_irq(int irq, cpu_set_t cpuset);
#endif
/****************************************************************************
[incubator-nuttx] 01/05: fs/eventfd: Remove the extra space
Posted by ma...@apache.org.
This is an automated email from the ASF dual-hosted git repository.
masayuki pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 493152a45f12ce66598eb4b4b99fb74138089a77
Author: Xiang Xiao <xi...@xiaomi.com>
AuthorDate: Sun Sep 18 16:46:53 2022 +0800
fs/eventfd: Remove the extra space
Signed-off-by: Xiang Xiao <xi...@xiaomi.com>
---
fs/vfs/fs_eventfd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/fs/vfs/fs_eventfd.c b/fs/vfs/fs_eventfd.c
index 4a69333efe..a34e55a648 100644
--- a/fs/vfs/fs_eventfd.c
+++ b/fs/vfs/fs_eventfd.c
@@ -491,8 +491,8 @@ static int eventfd_do_poll(FAR struct file *filep, FAR struct pollfd *fds,
/* Remove all memory of the poll setup */
- *slot = NULL;
- fds->priv = NULL;
+ *slot = NULL;
+ fds->priv = NULL;
goto out;
}