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Posted to commits@nuttx.apache.org by xi...@apache.org on 2022/04/16 11:21:16 UTC
[incubator-nuttx] branch master updated: Fixed a compile error, presumably caused by C&P error.
This is an automated email from the ASF dual-hosted git repository.
xiaoxiang pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 3a015d56b0 Fixed a compile error, presumably caused by C&P error.
3a015d56b0 is described below
commit 3a015d56b0b0806626a3e6e7c213560444a7e886
Author: okayserh <o....@gmail.com>
AuthorDate: Fri Apr 15 13:06:45 2022 +0200
Fixed a compile error, presumably caused by C&P error.
---
arch/arm/src/stm32f7/stm32_ltdc.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/src/stm32f7/stm32_ltdc.c b/arch/arm/src/stm32f7/stm32_ltdc.c
index 890318689d..16b6f4b530 100644
--- a/arch/arm/src/stm32f7/stm32_ltdc.c
+++ b/arch/arm/src/stm32f7/stm32_ltdc.c
@@ -1283,9 +1283,11 @@ static void stm32_ltdc_periphconfig(void)
reginfo("configured RCC_PLLSAI=%08x\n", getreg32(STM32_RCC_PLLSAICFGR));
- /* Configure dedicated clock external */
+ /* Configure dedicated clock external.
+ * Division factor for LCD_CLK in DCKCFGR1
+ */
- reginfo("configured RCC_DCKCFGR=%08x\n", getreg32(STM32_RCC_DCKCFGR));
+ reginfo("configured RCC_DCKCFGR1=%08x\n", getreg32(STM32_RCC_DCKCFGR1));
/* Configure LTDC_SSCR */