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Posted to commits@nuttx.apache.org by pk...@apache.org on 2022/09/21 20:23:19 UTC
[incubator-nuttx] 01/03: arch/misoc: Implement up_initialize in the common place
This is an automated email from the ASF dual-hosted git repository.
pkarashchenko pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
commit 47bd07034c540387806888c73940dbf49d5f7421
Author: Xiang Xiao <xi...@xiaomi.com>
AuthorDate: Tue Sep 20 14:24:29 2022 +0800
arch/misoc: Implement up_initialize in the common place
Signed-off-by: Xiang Xiao <xi...@xiaomi.com>
---
.../misoc_initialize.c} | 2 +-
arch/misoc/src/lm32/Make.defs | 18 ++++-----
arch/misoc/src/lm32/lm32_initialize.c | 44 ----------------------
arch/misoc/src/minerva/Make.defs | 16 ++++----
4 files changed, 18 insertions(+), 62 deletions(-)
diff --git a/arch/misoc/src/minerva/minerva_initialize.c b/arch/misoc/src/common/misoc_initialize.c
similarity index 97%
rename from arch/misoc/src/minerva/minerva_initialize.c
rename to arch/misoc/src/common/misoc_initialize.c
index 0dde267468..29daba3d02 100644
--- a/arch/misoc/src/minerva/minerva_initialize.c
+++ b/arch/misoc/src/common/misoc_initialize.c
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/misoc/src/minerva/minerva_initialize.c
+ * arch/misoc/src/common/misoc_initialize.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs
index 17ad93efad..0b797361d8 100644
--- a/arch/misoc/src/lm32/Make.defs
+++ b/arch/misoc/src/lm32/Make.defs
@@ -20,18 +20,18 @@
HEAD_ASRC = lm32_vectors.S
-CMN_CSRCS = misoc_lowputs.c misoc_serial.c misoc_mdelay.c
-CMN_CSRCS += misoc_modifyreg8.c misoc_modifyreg16.c misoc_modifyreg32.c
-CMN_CSRCS += misoc_puts.c misoc_udelay.c misoc_timerisr.c misoc_net.c
-CMN_CSRCS += misoc_flushcache.c
+CMN_CSRCS = misoc_initialize.c misoc_lowputs.c misoc_serial.c
+CMN_CSRCS += misoc_mdelay.c misoc_modifyreg8.c misoc_modifyreg16.c
+CMN_CSRCS += misoc_modifyreg32.c misoc_puts.c misoc_udelay.c
+CMN_CSRCS += misoc_timerisr.c misoc_net.c misoc_flushcache.c
CHIP_ASRCS = lm32_syscall.S
CHIP_CSRCS = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c
CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_decodeirq.c
CHIP_CSRCS += lm32_doirq.c lm32_dumpstate.c lm32_exit.c lm32_idle.c
-CHIP_CSRCS += lm32_initialize.c lm32_initialstate.c
-CHIP_CSRCS += lm32_irq.c lm32_releasepending.c lm32_releasestack.c
-CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c
-CHIP_CSRCS += lm32_reprioritizertr.c lm32_schedulesigaction.c lm32_sigdeliver.c
-CHIP_CSRCS += lm32_flushcache.c lm32_usetack.c
+CHIP_CSRCS += lm32_initialstate.c lm32_irq.c lm32_releasepending.c
+CHIP_CSRCS += lm32_releasestack.c lm32_stackframe.c lm32_swint.c
+CHIP_CSRCS += lm32_unblocktask.c lm32_reprioritizertr.c
+CHIP_CSRCS += lm32_schedulesigaction.c lm32_sigdeliver.c
+CHIP_CSRCS += lm32_flushcache.c lm32_usetack.c
diff --git a/arch/misoc/src/lm32/lm32_initialize.c b/arch/misoc/src/lm32/lm32_initialize.c
deleted file mode 100644
index 58ed160273..0000000000
--- a/arch/misoc/src/lm32/lm32_initialize.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/****************************************************************************
- * arch/misoc/src/lm32/lm32_initialize.c
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements. See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership. The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License. You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/arch.h>
-
-#include "misoc.h"
-
-/****************************************************************************
- * Public Functions
- ****************************************************************************/
-
-void up_initialize(void)
-{
- /* Initialize the serial driver */
-
- misoc_serial_initialize();
-
-#if 0 /* REVISIT */
- /* Initialize the network cores */
-
- misoc_net_initialize(0);
-#endif
-}
diff --git a/arch/misoc/src/minerva/Make.defs b/arch/misoc/src/minerva/Make.defs
index 145e271255..8c9002f450 100644
--- a/arch/misoc/src/minerva/Make.defs
+++ b/arch/misoc/src/minerva/Make.defs
@@ -20,18 +20,18 @@
HEAD_ASRC = minerva_vectors.S
-CMN_CSRCS = misoc_lowputs.c misoc_serial.c misoc_mdelay.c
-CMN_CSRCS += misoc_modifyreg8.c misoc_modifyreg16.c misoc_modifyreg32.c
-CMN_CSRCS += misoc_puts.c misoc_udelay.c misoc_timerisr.c misoc_net.c
-CMN_CSRCS += misoc_flushcache.c
+CMN_CSRCS = misoc_initialize.c misoc_lowputs.c misoc_serial.c
+CMN_CSRCS += misoc_mdelay.c misoc_modifyreg8.c misoc_modifyreg16.c
+CMN_CSRCS += misoc_modifyreg32.c misoc_puts.c misoc_udelay.c
+CMN_CSRCS += misoc_timerisr.c misoc_net.c misoc_flushcache.c
CHIP_ASRCS = minerva_syscall.S
CHIP_CSRCS = minerva_allocateheap.c minerva_assert.c minerva_blocktask.c
CHIP_CSRCS += minerva_copystate.c minerva_createstack.c minerva_decodeirq.c
CHIP_CSRCS += minerva_doirq.c minerva_dumpstate.c minerva_exit.c minerva_idle.c
-CHIP_CSRCS += minerva_initialize.c minerva_initialstate.c
-CHIP_CSRCS += minerva_irq.c minerva_releasepending.c minerva_releasestack.c
-CHIP_CSRCS += minerva_stackframe.c minerva_swint.c minerva_unblocktask.c
-CHIP_CSRCS += minerva_reprioritizertr.c minerva_schedulesigaction.c minerva_sigdeliver.c
+CHIP_CSRCS += minerva_initialstate.c minerva_irq.c minerva_releasepending.c
+CHIP_CSRCS += minerva_releasestack.c minerva_stackframe.c minerva_swint.c
+CHIP_CSRCS += minerva_unblocktask.c minerva_reprioritizertr.c
+CHIP_CSRCS += minerva_schedulesigaction.c minerva_sigdeliver.c
CHIP_CSRCS += minerva_flushcache.c minerva_doexceptions.c minerva_usetack.c